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Don't use multiprocessing-extensions instruction on processors that don't

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support SMP.

Submitted by:	loos@
Pointy hat to:	me
This commit is contained in:
Ian Lepore 2014-04-28 02:35:28 +00:00
parent 88b3694bd9
commit 440fe55df6
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=265036
1 changed files with 4 additions and 0 deletions
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4
sys/arm/arm/cpufunc_asm_armv7.S
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@ -251,7 +251,11 @@ ENTRY(armv7_idcache_wbinv_range)
END(armv7_idcache_wbinv_range)
ENTRY_NP(armv7_icache_sync_all)
#ifdef SMP
mcr p15, 0, r0, c7, c1, 0 /* Invalidate all I cache to PoU Inner Shareable */
#else
mcr p15, 0, r0, c7, c5, 0 /* Invalidate all I cache to PoU (ICIALLU) */
#endif
isb /* instruction synchronization barrier */
dsb /* data synchronization barrier */
RET