From 974000f192f9f74654b8835361cf35e606a10a76 Mon Sep 17 00:00:00 2001 From: Ruslan Bukin Date: Mon, 27 Mar 2023 16:14:10 +0100 Subject: [PATCH] Update OpenCSD to v1.4.0. Sponsored by: UKRI --- .gitignore | 5 + README.md | 84 +- decoder/build/linux/makefile | 23 +- decoder/build/linux/makefile.dev | 3 + decoder/build/linux/rctdl_c_api_lib/makefile | 2 + .../build/linux/ref_trace_decode_lib/makefile | 4 +- .../ref_trace_decode_lib.vcxproj | 7 + .../ref_trace_decode_lib.vcxproj.filters | 27 + decoder/build/win-vs2022/opencsd.props | 20 + .../Debug-dll/libopencsd_c_api.dll.recipe | 11 + ...tdl_c_api_lib.vcxproj.FileListAbsolute.txt | 0 .../Release-dll/libopencsd_c_api.dll.recipe | 11 + .../Release-dll/opencsd_c_api.dll.recipe | 11 + ...tdl_c_api_lib.vcxproj.FileListAbsolute.txt | 0 .../Win32/Release/libopencsd_c_api.lib.recipe | 7 + ...tdl_c_api_lib.vcxproj.FileListAbsolute.txt | 0 .../rctdl_c_api_lib/rctdl_c_api_lib.vcxproj | 327 + .../rctdl_c_api_lib.vcxproj.filters | 48 + .../x64/Debug-dll/libopencsd_c_api.dll.recipe | 11 + ...tdl_c_api_lib.vcxproj.FileListAbsolute.txt | 0 .../Release-dll/libopencsd_c_api.dll.recipe | 11 + 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decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/OTHERS_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/VAL_NON_DET_CODE_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/checkpoint_45_0_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/code_42_0_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/code_43_1_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/code_43_3_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/code_44_0_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/bindir/code_44_1_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/cpu_0.ini create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/decode/fulldecode.txt create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/rs_entry.bin create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/session1.bin create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/snapshot.ini create mode 100644 decoder/tests/snapshots-ete/trace_file_cid_vmid/trace.ini create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/ETE_0_s1.ini create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/OTHERS_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/VAL_NON_DET_CODE_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/checkpoint_45_0_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/code_42_0_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/code_43_1_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/code_43_3_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/code_44_0_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/bindir/code_44_1_exec create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/cpu_0.ini create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/decode/fulldecode.txt create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/rs_entry.bin create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/session1.bin create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/snapshot.ini create mode 100644 decoder/tests/snapshots-ete/trace_file_vmid/trace.ini create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/ETE_0_s1.ini create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/bindir_64/OTHERS_exec create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/bindir_64/TEST_NON_DET_CODE_exec create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/bindir_64/VAL_NON_DET_CODE_exec create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/bindir_64/VAL_TEST_CODE_exec create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/cpu_0.ini create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/session1.bin create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/snapshot.ini create mode 100644 decoder/tests/snapshots-ete/ts_bit64_set/trace.ini create mode 100644 decoder/tests/snapshots-ete/ts_marker/ETE_0_s1.ini create mode 100644 decoder/tests/snapshots-ete/ts_marker/bindir_64/OTHERS_exec create mode 100644 decoder/tests/snapshots-ete/ts_marker/bindir_64/VAL_NON_DET_CODE_exec create mode 100644 decoder/tests/snapshots-ete/ts_marker/cpu_0.ini create mode 100644 decoder/tests/snapshots-ete/ts_marker/session1.bin create mode 100644 decoder/tests/snapshots-ete/ts_marker/snapshot.ini create mode 100644 decoder/tests/snapshots-ete/ts_marker/trace.ini create mode 100644 decoder/tests/snapshots/stm-issue-27/device_0.ini create mode 100644 decoder/tests/snapshots/stm-issue-27/snapshot.ini create mode 100644 decoder/tests/snapshots/stm-issue-27/stuck_trace.bin create mode 100644 decoder/tests/snapshots/stm-issue-27/trace.ini create mode 100644 decoder/tests/source/frame_demux_test.cpp diff --git a/.gitignore b/.gitignore index 54627e695ab4..9908c67a2fa9 100644 --- a/.gitignore +++ b/.gitignore @@ -14,6 +14,9 @@ *.la *.lo +# gcc dependency files +*.d + # Shared objects (inc. Windows DLLs) *.dll *.so @@ -43,6 +46,7 @@ ipch/ *.pdb *.exp *.ilk +.vs/ # ignore emacs backup saves *~ @@ -74,3 +78,4 @@ decoder/docs/html/* *.VC.VC.opendb *.iobj *.ipdb +decoder/tests/results* diff --git a/README.md b/README.md index b8b13d57830e..450c8e3e53b8 100644 --- a/README.md +++ b/README.md @@ -27,11 +27,12 @@ Releases will appear on the master branch in the git repository with an appropri CoreSight Trace Component Support. ---------------------------------- -_Current Version 0.14.2_ +_Current Version 1.4.0_ ### Current support: -- ETMv4 (v4.5 [A/R profile] v4.4 [M profile]) instruction trace - packet processing and packet decode. +- ETE (v1.3) instruction trace - packet processing and packet decode. +- ETMv4 (v4.6 [A/R profile] v4.4 [M profile]) instruction trace - packet processing and packet decode. - PTM (v1.1) instruction trace - packet processing and packet decode. - ETMv3 (v3.5) instruction trace - packet processing and packet decode. - ETMv3 (v3.5) data trace - packet processing. @@ -211,6 +212,85 @@ Version and Modification Information - __Bugfix__: I-decode: Some Thumb instructions not correctly reported as implied returns. (github issue #24, submitted by kongy). +- _Version 0.14.3_: + - __Update__: Fix makefile to be compliant with RPM base distros. (github issue #26, submitted by jlinton) + - __Update__: Add section to autofdo document. + - __Bugfix__: STM: fix bug that was missing ASYNC packets. (github issue #27, reported by subhasish Karmakar) + +- _Version 0.14.4_: + - __Update__: makefile: Add DESTDIR to install targets. (github issue #30) + - __Update__: tests: add script to run single test only. + - __Update__: docs: update to location of ARM coresight driver backports directory. + - __Bugfix__: ETMv3: Fix missing comma in string list. (github issue #31) + - __Bugfix__: makefile: tests: Fix build race problem (github issue #32) + - __Bugfix__: tests: fix ignore tpiu command line options (github issue #28) + +- _Version 1.0.0_: + - __New Decode Protocol__: Support added for the ETE protocol, used by ARM PEs that implement the FEAT_ETE + feature. Supports new architectural features in this trace, including FEAT_TME. + - __Update__: Output Elememts: New protocol defines two new output elements. + - __Update__: Add support for WFIT / WFET instructions traced as P0 elements. + - __Update__: Architecture versioning. Arch v8 + PEs may add features in a flexible manner, and ARM also + declares future features ahead of architecture versions to allow support to be added. + APIs requiring an architecture version can now use ARCH_AA64 to declare a version of v8.3 + + additional features. This relaxes the strict versionnig rules that the decoder uses when + looking for Opcodes as trace waypoints. + - __Update__: docs: Add linux 'man' file and installation. + - __Bugfix__: build: Fix clean install, and remove static lib build test from main makefile to + dev makefile only. (github issue #33) + +- _Version 1.1.0_: + - __Update__: ETM v4.6 support. + - __Update__: C-API - add API functions to get last error and convert error code to string. + - __Bugfix__: ETMv4/ETE - fix loop problem in commit elements. + - __Bugfix__: ETMv4/ETE - make error handling consistent. + - __Bugfix__: Add Pull request #36 from github (Ross Burton) + - __Bugfix__: Add Pull request #37 from github (Ian Rogers) + +- _Version 1.1.1_: + - __Bugfix__: Fix include and install for ETE decoder headers. + +- _Version 1.2.0_: + - __Update__: Add API for counting packet decode statistics, and Frame debmux statistics. + - __Update__: Update test scripts to allow additional command line options to be passed. + - __Bugfix__: Fix various build warnings. + - __Bugfix__: Remove unused variable (github issue #38 from Yi Kong) + - __Bugfix__: Remove noisy printf (James Clark) + - __Bugfix__: Fix documentation issues (github issues #39 & #40 from rbresalier) + +- _Version 1.2.1_: + - __Bugfix__: ETM4x / ETE - output of context elements to client can in some circumstances + be delayed until after subsequent atoms have been processed leading to incorrect + memory decode access via the client callbacks. + Fixed to flush context elements immediately they are committed. + +- _Version 1.3.0_: + - __Admin__: Dev versions now have patch versions at least +100 from root public version + - __Update__: Add support for conditional branch (BC.cond) introduced for v8.8 / v9.3 architecture. + - __Update__: ETE: Add support for NSE bit - security state bit defining Root / Realm states in FEAT_RME. + +- _Version 1.3.1_: + - __Bugfix__: Add header file in snapshot parser - fix build for certain libc++ libs (github issue #43 from manojgupta) + - __Bugfix__: Fix typo in comment (github issue #42 from nothatDinger) + +- _Version 1.3.2_: + - __Bugfix__: ETM4x / ETE - 64 bit timestamp value - MS bit incorrectly masked to 1b0 during extraction from packet. + +- _Version 1.3.3_: + - __Update__: Add build directory for VS2022 build. + - __Update__: Add test program for Coresight Frame Demux code + - __Bugfix__: PTM: Fix incorrect extraction of Waypoint Address packet (github issue #48) + - __Bugfix__: Frame Demux: Fix HSYNC, FSYNC and 4xFSYNC handling that was causing out-of-bounds reads + on invalid data input. (issues #49, #50 and #51). Fixed error handling for incorrect + number of FSYNC packets in 4xFSYNC frame reset code that was not triggering an error + and allowing fun with mis-aligned input data. + - __Bugfix__: Fix silent failure if incorrect config flags set when setting up frame demux modes. + +- _Version 1.4.0_: + - __Update__: ETE: Add support for Arch v9.4 FEAT_ITE. ETE v1p3, sw trace instrumentation. + Adds in new generic output packet type: OCSD_GEN_TRC_ELEM_INSTRUMENTATION. + - __Bugfix__: Fix memory leak in mispredict handling (github issue #52 from yabinc) + Licence Information =================== diff --git a/decoder/build/linux/makefile b/decoder/build/linux/makefile index 659cf68c6376..5515737f0d00 100644 --- a/decoder/build/linux/makefile +++ b/decoder/build/linux/makefile @@ -65,9 +65,10 @@ export INSTALL=install # installation directory PREFIX ?=/usr LIB_PATH ?= lib -INSTALL_LIB_DIR=$(PREFIX)/$(LIB_PATH) -INSTALL_BIN_DIR=$(PREFIX)/bin -export INSTALL_INCLUDE_DIR=$(PREFIX)/include/ +INSTALL_LIB_DIR=$(DESTDIR)$(PREFIX)/$(LIB_PATH) +INSTALL_BIN_DIR=$(DESTDIR)$(PREFIX)/bin +export INSTALL_INCLUDE_DIR=$(DESTDIR)$(PREFIX)/include/ +INSTALL_MAN_DIR=$(DESTDIR)$(PREFIX)/share/man/man1 # compile flags CFLAGS += $(CPPFLAGS) -c -Wall -DLINUX -Wno-switch -Wlogical-op -fPIC @@ -114,19 +115,27 @@ all: libs tests libs: $(LIB_BASE_NAME)_lib $(LIB_CAPI_NAME)_lib +DEF_SO_PERM ?= 644 + install: libs tests mkdir -p $(INSTALL_LIB_DIR) $(INSTALL_INCLUDE_DIR) $(INSTALL_BIN_DIR) cp -d $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).so $(INSTALL_LIB_DIR)/ cp -d $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).so.$(SO_MAJOR_VER) $(INSTALL_LIB_DIR)/ - $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).so.$(SO_VER) $(INSTALL_LIB_DIR)/ + $(INSTALL) --mode=$(DEF_SO_PERM) $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).so.$(SO_VER) $(INSTALL_LIB_DIR)/ cp -d $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).so $(INSTALL_LIB_DIR)/ cp -d $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).so.$(SO_MAJOR_VER) $(INSTALL_LIB_DIR)/ - $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).so.$(SO_VER) $(INSTALL_LIB_DIR)/ + $(INSTALL) --mode=$(DEF_SO_PERM) $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).so.$(SO_VER) $(INSTALL_LIB_DIR)/ +ifndef DISABLE_STATIC $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_BASE_NAME).a $(INSTALL_LIB_DIR)/ $(INSTALL) --mode=644 $(LIB_TARGET_DIR)/lib$(LIB_CAPI_NAME).a $(INSTALL_LIB_DIR)/ +endif cd $(OCSD_ROOT)/build/linux/rctdl_c_api_lib && make install_inc $(INSTALL) --mode=755 $(BIN_TEST_TARGET_DIR)/trc_pkt_lister $(INSTALL_BIN_DIR)/ +install_man: + mkdir -p $(INSTALL_MAN_DIR) + $(INSTALL) --mode=644 $(OCSD_ROOT)/docs/man/trc_pkt_lister.1 $(INSTALL_MAN_DIR)/ + ################################ # build OpenCSD trace decode library @@ -164,6 +173,7 @@ tests: libs cd $(OCSD_ROOT)/tests/build/linux/trc_pkt_lister && $(MAKE) cd $(OCSD_ROOT)/tests/build/linux/c_api_pkt_print_test && $(MAKE) cd $(OCSD_ROOT)/tests/build/linux/mem_buffer_eg && $(MAKE) + cd $(OCSD_ROOT)/tests/build/linux/frame_demux_test && $(MAKE) # # build docs @@ -189,6 +199,7 @@ clean_tests: cd $(OCSD_ROOT)/tests/build/linux/trc_pkt_lister && $(MAKE) clean cd $(OCSD_ROOT)/tests/build/linux/c_api_pkt_print_test && $(MAKE) clean cd $(OCSD_ROOT)/tests/build/linux/mem_buffer_eg && $(MAKE) clean + cd $(OCSD_ROOT)/tests/build/linux/frame_demux_test && $(MAKE) clean -rmdir $(OCSD_TESTS)/lib clean_docs: @@ -198,3 +209,5 @@ clean_install: -rm $(INSTALL_LIB_DIR)/lib$(LIB_BASE_NAME).* -rm $(INSTALL_LIB_DIR)/lib$(LIB_CAPI_NAME).* -rm -r $(INSTALL_INCLUDE_DIR)/$(LIB_UAPI_INC_DIR) + -rm $(INSTALL_BIN_DIR)/trc_pkt_lister + -rm $(INSTALL_MAN_DIR)/trc_pkt_lister.1 diff --git a/decoder/build/linux/makefile.dev b/decoder/build/linux/makefile.dev index 5eb1ec9557fa..aaaa983845cf 100644 --- a/decoder/build/linux/makefile.dev +++ b/decoder/build/linux/makefile.dev @@ -63,5 +63,8 @@ else PLAT_DIR=linux$(BIT_VARIANT)/$(BUILD_VARIANT) endif +# for dev env, enable static link build test +export TEST_STATIC_LINKING=1 + # include the main makefile include makefile diff --git a/decoder/build/linux/rctdl_c_api_lib/makefile b/decoder/build/linux/rctdl_c_api_lib/makefile index a0bd5a345f2f..7b4055dd7f6b 100644 --- a/decoder/build/linux/rctdl_c_api_lib/makefile +++ b/decoder/build/linux/rctdl_c_api_lib/makefile @@ -113,6 +113,8 @@ install_inc: $(INSTALL) --mode=0644 $(INST_INC_SRC)/etmv3/trc_pkt_types_etmv3.h $(INST_INC_DST)/etmv3/ $(INSTALL) -d --mode=0755 $(INST_INC_DST)/etmv4 $(INSTALL) --mode=0644 $(INST_INC_SRC)/etmv4/trc_pkt_types_etmv4.h $(INST_INC_DST)/etmv4/ + $(INSTALL) -d --mode=0755 $(INST_INC_DST)/ete + $(INSTALL) --mode=0644 $(INST_INC_SRC)/ete/trc_pkt_types_ete.h $(INST_INC_DST)/ete/ $(INSTALL) -d --mode=0755 $(INST_INC_DST)/c_api $(INSTALL) --mode=0644 $(INST_INC_SRC)/c_api/ocsd_c_api_types.h $(INST_INC_DST)/c_api/ $(INSTALL) --mode=0644 $(INST_INC_SRC)/c_api/opencsd_c_api.h $(INST_INC_DST)/c_api/ diff --git a/decoder/build/linux/ref_trace_decode_lib/makefile b/decoder/build/linux/ref_trace_decode_lib/makefile index 7087036cc62e..58d5c6ecbfce 100644 --- a/decoder/build/linux/ref_trace_decode_lib/makefile +++ b/decoder/build/linux/ref_trace_decode_lib/makefile @@ -41,6 +41,7 @@ BUILD_DIR=./$(PLAT_DIR) VPATH= $(OCSD_SOURCE) \ $(OCSD_SOURCE)/etmv3 \ $(OCSD_SOURCE)/etmv4 \ + $(OCSD_SOURCE)/ete \ $(OCSD_SOURCE)/ptm \ $(OCSD_SOURCE)/i_dec \ $(OCSD_SOURCE)/mem_acc \ @@ -59,10 +60,11 @@ ETMV3OBJ= $(BUILD_DIR)/trc_cmp_cfg_etmv3.o \ $(BUILD_DIR)/trc_pkt_proc_etmv3_impl.o ETMV4OBJ= $(BUILD_DIR)/trc_cmp_cfg_etmv4.o \ + $(BUILD_DIR)/trc_etmv4_stack_elem.o \ $(BUILD_DIR)/trc_pkt_proc_etmv4i.o \ $(BUILD_DIR)/trc_pkt_decode_etmv4i.o \ $(BUILD_DIR)/trc_pkt_elem_etmv4i.o \ - $(BUILD_DIR)/trc_etmv4_stack_elem.o + $(BUILD_DIR)/trc_cmp_cfg_ete.o PTMOBJ= $(BUILD_DIR)/trc_cmp_cfg_ptm.o \ $(BUILD_DIR)/trc_pkt_elem_ptm.o \ diff --git a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj index f1aaece9b3ba..8dca67db3935 100644 --- a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj +++ b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj @@ -310,6 +310,7 @@ + @@ -339,6 +340,10 @@ + + + + @@ -354,6 +359,7 @@ + @@ -404,6 +410,7 @@ + diff --git a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters index cdb6f84f736d..47e9a3a64097 100644 --- a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters +++ b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters @@ -64,6 +64,12 @@ {baf047d0-0ff7-4502-b42b-4f1fda94d54b} + + {3d119e90-c89b-4f27-8163-305924453e1f} + + + {8cfdb19c-28fc-4e79-b8d5-4e54907b1f82} + @@ -87,6 +93,9 @@ docs-files + + docs-files + @@ -356,6 +365,21 @@ Header Files\common + + Header Files\ete + + + Header Files\ete + + + Header Files\ete + + + Header Files\ete + + + Header Files\etmv4 + @@ -484,5 +508,8 @@ Source Files + + Source Files\ete + \ No newline at end of file diff --git a/decoder/build/win-vs2022/opencsd.props b/decoder/build/win-vs2022/opencsd.props new file mode 100644 index 000000000000..64b1268db436 --- /dev/null +++ b/decoder/build/win-vs2022/opencsd.props @@ -0,0 +1,20 @@ + + + + + opencsd + opencsd_c_api + + + + + + $(LIB_BASE_NAME) + true + + + $(LIB_CAPI_NAME) + true + + + diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Debug-dll/libopencsd_c_api.dll.recipe b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Debug-dll/libopencsd_c_api.dll.recipe new file mode 100644 index 000000000000..d3b47221625c --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Debug-dll/libopencsd_c_api.dll.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\lib\win32\dbg\libopencsd_c_api.dll + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Debug-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Debug-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/libopencsd_c_api.dll.recipe b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/libopencsd_c_api.dll.recipe new file mode 100644 index 000000000000..a52a3b5aa20a --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/libopencsd_c_api.dll.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\lib\win32\rel\libopencsd_c_api.dll + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/opencsd_c_api.dll.recipe b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/opencsd_c_api.dll.recipe new file mode 100644 index 000000000000..af2a94039ca8 --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/opencsd_c_api.dll.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\lib\win32\rel\opencsd_c_api.dll + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release/libopencsd_c_api.lib.recipe b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release/libopencsd_c_api.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release/libopencsd_c_api.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/rctdl_c_api_lib/Win32/Release/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj b/decoder/build/win-vs2022/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj new file mode 100644 index 000000000000..e48ac6b9384f --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj @@ -0,0 +1,327 @@ + + + + + Debug-dll + Win32 + + + Debug-dll + x64 + + + Debug + Win32 + + + Debug + x64 + + + Release-dll + Win32 + + + Release-dll + x64 + + + Release + Win32 + + + Release + x64 + + + + {533F929A-A73B-46B6-9D5F-FFCD62F734E3} + Win32Proj + rctdl_c_api_lib + ocsd_c_api_lib + 10.0 + + + + StaticLibrary + true + MultiByte + v143 + + + DynamicLibrary + true + MultiByte + v143 + + + StaticLibrary + true + MultiByte + v143 + + + DynamicLibrary + true + MultiByte + v143 + + + StaticLibrary + false + true + MultiByte + v143 + + + DynamicLibrary + false + true + MultiByte + v143 + + + StaticLibrary + false + true + MultiByte + v143 + + + DynamicLibrary + false + true + MultiByte + v143 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME) + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME) + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_CAPI_NAME) + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_CAPI_NAME) + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_CAPI_NAME) + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_CAPI_NAME) + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME) + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME) + $(Platform)\$(Configuration)\ + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;_OCSD_C_API_DLL_EXPORT;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;_OCSD_C_API_DLL_EXPORT;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;_OCSD_C_API_DLL_EXPORT;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;_OCSD_C_API_DLL_EXPORT;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + + + + + + + + + + {7f500891-cc76-405f-933f-f682bc39f923} + + + + + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj.filters b/decoder/build/win-vs2022/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj.filters new file mode 100644 index 000000000000..a9b05adfdf4c --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/rctdl_c_api_lib.vcxproj.filters @@ -0,0 +1,48 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Header Files + + + Header Files + + + Source Files + + + Header Files + + + Source Files + + + Header Files + + + Header Files + + + + + Source Files + + + Source Files + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Debug-dll/libopencsd_c_api.dll.recipe b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Debug-dll/libopencsd_c_api.dll.recipe new file mode 100644 index 000000000000..93a8437a7efb --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Debug-dll/libopencsd_c_api.dll.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\lib\win64\dbg\libopencsd_c_api.dll + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Debug-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Debug-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release-dll/libopencsd_c_api.dll.recipe b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release-dll/libopencsd_c_api.dll.recipe new file mode 100644 index 000000000000..e21549441a4f --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release-dll/libopencsd_c_api.dll.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\lib\win64\rel\libopencsd_c_api.dll + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release-dll/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release/libopencsd_c_api.lib.recipe b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release/libopencsd_c_api.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release/libopencsd_c_api.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/rctdl_c_api_lib/x64/Release/rctdl_c_api_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Debug-dll/libopencsd.dll.recipe b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Debug-dll/libopencsd.dll.recipe new file mode 100644 index 000000000000..46308c7be98f --- /dev/null +++ b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Debug-dll/libopencsd.dll.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\lib\win32\dbg\libopencsd.dll + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release-dll/libopencsd.lib.recipe b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release-dll/libopencsd.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release-dll/libopencsd.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release-dll/ref_trace_decode_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release-dll/ref_trace_decode_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release/libopencsd.lib.recipe b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release/libopencsd.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release/libopencsd.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release/ref_trace_decode_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/ref_trace_decode_lib/Win32/Release/ref_trace_decode_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/ref_trace_decode_lib.sln b/decoder/build/win-vs2022/ref_trace_decode_lib/ref_trace_decode_lib.sln new file mode 100644 index 000000000000..ce4ee29fd977 --- /dev/null +++ b/decoder/build/win-vs2022/ref_trace_decode_lib/ref_trace_decode_lib.sln @@ -0,0 +1,166 @@ + +Microsoft Visual Studio Solution File, Format Version 12.00 +# Visual Studio Version 17 +VisualStudioVersion = 17.0.32929.387 +MinimumVisualStudioVersion = 10.0.40219.1 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "opencsd_lib", "ref_trace_decode_lib.vcxproj", "{7F500891-CC76-405F-933F-F682BC39F923}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "ocsd_c_api_lib", "..\rctdl_c_api_lib\rctdl_c_api_lib.vcxproj", "{533F929A-A73B-46B6-9D5F-FFCD62F734E3}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "c_api_pkt_print_test", "..\..\..\tests\build\win-vs2022\c_api_pkt_print_test\c_api_pkt_print_test.vcxproj", "{3AC169DA-E156-4D16-95DF-73D7302A5606}" + ProjectSection(ProjectDependencies) = postProject + {46219A32-8178-41C1-B3B1-B5A6E547515F} = {46219A32-8178-41C1-B3B1-B5A6E547515F} + {533F929A-A73B-46B6-9D5F-FFCD62F734E3} = {533F929A-A73B-46B6-9D5F-FFCD62F734E3} + EndProjectSection +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "ext_dcd_echo_test", "..\..\..\tests\build\win-vs2022\ext_dcd_echo_test\ext_dcd_echo_test.vcxproj", "{46219A32-8178-41C1-B3B1-B5A6E547515F}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "mem-buffer-eg", "..\..\..\tests\build\win-vs2022\mem-buffer-eg\mem-buffer-eg.vcxproj", "{BC090130-2C53-4CF6-8AD4-37BF72B8D01A}" + ProjectSection(ProjectDependencies) = postProject + {7F500891-CC76-405F-933F-F682BC39F923} = {7F500891-CC76-405F-933F-F682BC39F923} + EndProjectSection +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "snapshot_parser_lib", "..\..\..\tests\build\win-vs2022\snapshot_parser_lib\snapshot_parser_lib.vcxproj", "{DE1F395D-4F53-42FB-8AEF-993A4BF7E411}" +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "trc_pkt_lister", "..\..\..\tests\build\win-vs2022\trc_pkt_lister\trc_pkt_lister.vcxproj", "{18ABC652-AB11-4993-9491-1A7FB7117339}" + ProjectSection(ProjectDependencies) = postProject + {7F500891-CC76-405F-933F-F682BC39F923} = {7F500891-CC76-405F-933F-F682BC39F923} + EndProjectSection +EndProject +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "frame_demux_test", "..\..\..\tests\build\win-vs2022\frame_demux_test\frame_demux_test.vcxproj", "{98EE9884-A4EB-4C75-A911-DFEDF992754F}" + ProjectSection(ProjectDependencies) = postProject + {7F500891-CC76-405F-933F-F682BC39F923} = {7F500891-CC76-405F-933F-F682BC39F923} + EndProjectSection +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Win32 = Debug|Win32 + Debug|x64 = Debug|x64 + Debug-dll|Win32 = Debug-dll|Win32 + Debug-dll|x64 = Debug-dll|x64 + Release|Win32 = Release|Win32 + Release|x64 = Release|x64 + Release-dll|Win32 = Release-dll|Win32 + Release-dll|x64 = Release-dll|x64 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {7F500891-CC76-405F-933F-F682BC39F923}.Debug|Win32.ActiveCfg = Debug|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Debug|Win32.Build.0 = Debug|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Debug|x64.ActiveCfg = Debug|x64 + {7F500891-CC76-405F-933F-F682BC39F923}.Debug|x64.Build.0 = Debug|x64 + {7F500891-CC76-405F-933F-F682BC39F923}.Debug-dll|Win32.ActiveCfg = Debug|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Debug-dll|Win32.Build.0 = Debug|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Debug-dll|x64.ActiveCfg = Debug|x64 + {7F500891-CC76-405F-933F-F682BC39F923}.Debug-dll|x64.Build.0 = Debug|x64 + {7F500891-CC76-405F-933F-F682BC39F923}.Release|Win32.ActiveCfg = Release|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Release|Win32.Build.0 = Release|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Release|x64.ActiveCfg = Release|x64 + {7F500891-CC76-405F-933F-F682BC39F923}.Release|x64.Build.0 = Release|x64 + {7F500891-CC76-405F-933F-F682BC39F923}.Release-dll|Win32.ActiveCfg = Release|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Release-dll|Win32.Build.0 = Release|Win32 + {7F500891-CC76-405F-933F-F682BC39F923}.Release-dll|x64.ActiveCfg = Release|x64 + {7F500891-CC76-405F-933F-F682BC39F923}.Release-dll|x64.Build.0 = Release|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug|Win32.ActiveCfg = Debug|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug|Win32.Build.0 = Debug|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug|x64.ActiveCfg = Debug|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug|x64.Build.0 = Debug|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug-dll|Win32.ActiveCfg = Debug-dll|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug-dll|Win32.Build.0 = Debug-dll|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug-dll|x64.ActiveCfg = Debug-dll|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Debug-dll|x64.Build.0 = Debug-dll|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release|Win32.ActiveCfg = Release|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release|Win32.Build.0 = Release|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release|x64.ActiveCfg = Release|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release|x64.Build.0 = Release|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release-dll|Win32.ActiveCfg = Release-dll|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release-dll|Win32.Build.0 = Release-dll|Win32 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release-dll|x64.ActiveCfg = Release-dll|x64 + {533F929A-A73B-46B6-9D5F-FFCD62F734E3}.Release-dll|x64.Build.0 = Release-dll|x64 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug|Win32.ActiveCfg = Debug|Win32 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug|Win32.Build.0 = Debug|Win32 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug|x64.ActiveCfg = Debug|x64 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug|x64.Build.0 = Debug|x64 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug-dll|Win32.ActiveCfg = debug-dll|Win32 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug-dll|Win32.Build.0 = debug-dll|Win32 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug-dll|x64.ActiveCfg = debug-dll|x64 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Debug-dll|x64.Build.0 = debug-dll|x64 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Release|Win32.ActiveCfg = Release|Win32 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Release|Win32.Build.0 = Release|Win32 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Release|x64.ActiveCfg = Release|x64 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Release|x64.Build.0 = Release|x64 + {3AC169DA-E156-4D16-95DF-73D7302A5606}.Release-dll|Win32.ActiveCfg = Release-dll|Win32 + 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..\..\..\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME) + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME) + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME) + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + $(Platform)\$(Configuration)\ + lib$(LIB_BASE_NAME) + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + $(Platform)\$(Configuration)\ + lib$(LIB_BASE_NAME) + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + UninitializedLocalUsageCheck + ProgramDatabase + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions); + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions); + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters 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Files\etmv4 + + + Header Files\etmv4 + + + Header Files\etmv4 + + + Header Files\ptm + + + Header Files\ptm + + + Header Files\ptm + + + Header Files\ptm + + + Header Files\ptm + + + Header Files\mem_acc + + + Header Files\mem_acc + + + Header Files\mem_acc + + + Header Files\mem_acc + + + Header Files\i_dec + + + Header Files\i_dec + + + Header Files\etmv4 + + + Header Files\mem_acc + + + Header Files\stm + + + Header Files\stm + + + Header Files\stm + + + Header Files\stm + + + Header Files\stm + + + Header Files\etmv3 + + + Header Files\mem_acc + + + Header Files\mem_acc + + + Header Files\ptm + + + Source Files\etmv3 + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + Header Files\common + + + interfaces + + + Header Files\etmv4 + + + Source Files\etmv3 + + + Header Files\ptm + + + Header Files\stm + + + Header Files\common + + + Header Files\stm + + + Header Files\pkt_printers + + + Header Files\pkt_printers + + + Header Files\pkt_printers + + + Header Files\pkt_printers + + + Header Files\pkt_printers + + + Header Files\pkt_printers + + + Header Files\common + + + Header Files\etmv4 + + + Header Files + + + Header Files + + + Header Files + + + Header Files\mem_acc + + + Header Files + + + Header Files\common + + + Header Files\ete + + + Header Files\ete + + + Header Files\ete + + + Header Files\ete + + + Header Files\etmv4 + + + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files\ptm + + + Source Files\ptm + + + Source Files\ptm + + + Source Files\etmv4 + + + Source Files\etmv4 + + + Source Files\etmv3 + + + Source Files\etmv3 + + + Source Files\etmv3 + + + Source Files\etmv3 + + + Source Files\etmv3 + + + Source Files\etmv4 + + + Source Files\ptm + + + Source Files\stm + + + Source Files\stm + + + Source Files\i_dec + + + Source Files\i_dec + + + Source Files\mem_acc + + + Source Files\mem_acc + + + Source Files\mem_acc + + + Source Files\mem_acc + + + Source Files\mem_acc + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files\stm + + + Source Files\pkt_printers + + + Source Files\pkt_printers + + + Source Files + + + Source Files\etmv4 + + + Source Files\mem_acc + + + Source Files\etmv4 + + + Source Files + + + Source Files\ete + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/x64/Release/libopencsd.lib.recipe b/decoder/build/win-vs2022/ref_trace_decode_lib/x64/Release/libopencsd.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/build/win-vs2022/ref_trace_decode_lib/x64/Release/libopencsd.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/build/win-vs2022/ref_trace_decode_lib/x64/Release/ref_trace_decode_lib.vcxproj.FileListAbsolute.txt b/decoder/build/win-vs2022/ref_trace_decode_lib/x64/Release/ref_trace_decode_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/docs/build_libs.md b/decoder/docs/build_libs.md index dc7d85da9401..e3435a2a941c 100644 --- a/decoder/docs/build_libs.md +++ b/decoder/docs/build_libs.md @@ -18,7 +18,7 @@ Building the Library -------------------- The library and test programs are built from the library `./build/` directory, where - is either 'linux' or 'win-vs2015' + is either 'linux' or 'win-vs2015' / 'win-vs2022' See [`./docs/test_progs.md`](@ref test_progs) for further information on use of the test programs. @@ -86,6 +86,12 @@ The test programs are built to used the .so versions of the libraries. The test program build for `trc_pkt_lister` also builds an auxiliary library used by this program for test purposes only. This is the `libsnapshot_parser.a` library, delivered to the `./tests/lib/` directories. +**Note on Linux Build Directory Names** + +Due to tool limitations, the makefiles will not operate correctly if the path to the opencsd directories contains spaces. + +e.g. checking out the project into a directory such as ` /home/name/my opencsd/` will result in build failures. + __Installing on Linux__ The libraries can be installed on linux using the `make install` command. This will usually require root privileges. Installation will be the version in the `./lib/` directory, according to options chosen. diff --git a/decoder/docs/doxygen_config.dox b/decoder/docs/doxygen_config.dox index 3913d3ac5ea5..7590e47a7561 100644 --- a/decoder/docs/doxygen_config.dox +++ b/decoder/docs/doxygen_config.dox @@ -38,7 +38,7 @@ PROJECT_NAME = "OpenCSD - CoreSight Trace Decode Library" # could be handy for archiving the generated documentation or if some version # control system is used. -PROJECT_NUMBER = 0.14.2 +PROJECT_NUMBER = 1.4.0 # Using the PROJECT_BRIEF tag one can provide an optional one line description # for a project that appears at the top of each page and should give viewer a @@ -805,7 +805,8 @@ INPUT = ../include \ ./prog_guide \ ../include/opencsd \ ../include \ - ../tests/auto-fdo/autofdo.md + ../tests/auto-fdo/autofdo.md \ + ../include/opencsd/ete # This tag can be used to specify the character encoding of the source files # that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses diff --git a/decoder/docs/man/trc_pkt_lister.1 b/decoder/docs/man/trc_pkt_lister.1 new file mode 100644 index 000000000000..a2e26790d5f5 --- /dev/null +++ b/decoder/docs/man/trc_pkt_lister.1 @@ -0,0 +1,127 @@ +.\" Hey, EMACS: -*- nroff -*- +.TH TRC_PKT_LISTER 1 "2018-03-28" + +.SH NAME +trc_pkt_lister \- decodes captured CoreSight\*R trace +.SH SYNOPSIS +.RI trc_pkt_lister +[ \-ss_dir \fI\fP ] +[ -ss_verbose ] +[ \-id \fI\fP ] +[ \-src_name \fI\fP ] +[ \-decode ] +[ \-decode_only ] +[ \-src_addr_n ] +[ \-o_raw_packed ] +[ \-o_raw_unpacked ] +[ \-logstdout ] +[ \-logstderr ] +[ \-logfile ] +[ \-logfilename \fI\fP ] +.br +.SH DESCRIPTION +.B trc_pkt_lister +is a tool that takes a snapshot directory as an input, and lists and/or +decodes all the trace packets for a single source, for any currently +supported protocol. +.PP +The output will be a list of discrete packets, generic output packets +and any error messages to file and/or screen as selected by the input +command line options. +.PP +By default the program will list packets only (no decode), for the +first discovered trace sink (ETB, ETF, ETR) in the snapshot directory, +with all streams output. +.SH OPTIONS +.SS Snapshot selection +The program defaults to \./ if no \-ss_dir option is given +.TP +.B \-ss\_dir +Set the directory path to a trace snapshot. +.TP +\fB\fC\-ss\_verbose\fR +Verbose output when reading the snapshot. +.SS Decode options +.TP +.B \-id +Set an ID to list (may be used multiple times) \- default if no id set is for all IDs to be printed. +.TP +.B \-src\_name +List packets from a given snapshot source name (defaults to first source found). +.TP +.B \-decode +Full decode of the packets from the trace snapshot (default is to list undecoded packets only. +.TP +.B \-decode_only +Does not list the undecoded packets, just the trace decode. +.TP +.B \-src\_addr\_n +In ETE protocol, indicate skipped N atoms in source address packet ranges by breaking the decode +range into multiple ranges on N atoms. +.TP +.B \-o\_raw\_packed +Output raw packed trace frames. +.TP +.B \-o\_raw\_unpacked +Output raw unpacked trace data per ID. +.SS Output options +Default is to output to file and stdout. Setting any option overrides and limits to only +the options set. +.TP +.B \-logstdout +output to stdout. +.TP +.B \-logstderr +output to stderr. +.TP +.B \-logfile +output to file using the default log file name. +.TP +.B \-logfilename +change the name of the output log file. +.SH FILES +.B Trace Snapshot directory. +.PP +The \fR./tests/snapshots\fP directory contains a number of trace +snapshots used for testing the library. Trace snapshots are dumps of +captured binary trace data, CoreSight component configurations and +memory dumps to allow trace decode. +.PP +Snapshots are generated on ARM targets and can then be analysed +offline. The snapshot format is available in a separate document. +.SH EXAMPLE +Example command lines with short output excerpts. +.PP +.BI TC2 " ETMv3 packet processor output, raw packet output." +.br +Command line: +.br +.RI "trc\_pkt\_lister -ss\_dir ../../snapshots/TC2 -o_raw_unpacked" +.PP +Output: +.br +Frame Data; Index 17958; ID_DATA[0x11]; 16 04 c0 86 42 97 e1 c4 +.br +Idx:17945; ID:11; I_SYNC : Instruction Packet synchronisation.; (Periodic); Addr=0xc00 +416e2; S; ISA=Thumb2; +.br +Idx:17961; ID:11; P_HDR : Atom P-header.; WEN; Cycles=1 +.br +Frame Data; Index 17968; ID_DATA[0x11]; ce af 90 80 80 00 a4 84 a0 84 a4 88 +.br +Idx:17962; ID:11; TIMESTAMP : Timestamp Value.; TS=0x82f9d13097 (562536984727) +.br +Idx:17974; ID:11; P_HDR : Atom P-header.; WW; Cycles=2 +.PP +.BI Juno " ETB\_1 selected for STM packet output, raw packet output" +.br +Command line: +.br +.RI "trc\_pkt\_lister -ss\_dir ../../snapshots/juno_r1_1 -o\_raw\_unpacked -src\_name ETB\_1" +.PP +.BI Juno " ETMv4 full trace decode + packet monitor, source trace ID 0x10 only." +.br +Command line: +.br +.RI "trc\_pkt\_lister -ss\_dir ../../snapshots/juno\_r1\_1 -decode -id 0x10" + diff --git a/decoder/docs/prog_guide/prog_guide_generic_pkts.md b/decoder/docs/prog_guide/prog_guide_generic_pkts.md index e4d50b79fc80..aad15b847977 100644 --- a/decoder/docs/prog_guide/prog_guide_generic_pkts.md +++ b/decoder/docs/prog_guide/prog_guide_generic_pkts.md @@ -84,7 +84,11 @@ typedef struct _ocsd_generic_trace_elem { ocsd_swt_info_t sw_trace_info; /* software trace packet info */ uint32_t num_instr_range; /* number of instructions covered by range packet (for T32 this cannot be calculated from en-st/i_size) */ unsync_info_t unsync_eot_info; /* additional information for unsync / end-of-trace packets. */ - }; + trace_marker_payload_t sync_marker; /* marker element - sync later element to position in stream */ + trace_memtrans_t mem_trans; /* memory transaction packet - transaction event */ + trace_sw_ite_t sw_ite; /* PE sw instrumentation using FEAT_ITE */ + + }; const void *ptr_extended_data; /* pointer to extended data buffer (data trace, sw trace payload) / custom structure */ @@ -325,6 +329,58 @@ SW trace packets that have a payload will use the extended_data flag and pointer SW trace packets that include timestamp information will us the `has_ts` flag and fill in the timestamp value. +These packets are generated by memory writes to STM / ITM trace hardware. + +### OCSD_GEN_TRC_ELEM_SYNC_MARKER ### +__packet fields valid__: `sync_marker` + +Synchronisation marker - marks position in stream of an element that is output later. +e.g. a timestamp marker can be output to represent the correct position in the stream for a +timestamp packet the is output later. + +The `sync_marker` field has a structure as shown below. + +~~~{.c} +typedef enum _trace_sync_marker_t { + ELEM_MARKER_TS, /**< Marker for timestamp element */ +} trace_sync_marker_t; + +typedef struct _trace_marker_payload_t { + trace_sync_marker_t type; /**< type of sync marker */ + uint32_t value; /**< sync marker value - usage depends on type */ +} trace_marker_payload_t; +~~~ + +### OCSD_GEN_TRC_ELEM_MEMTRANS ### +__packet fields valid__: `mem_trans` + +Memory transaction elements may appear in the output stream, if they are not otherwise cancelled +by speculative trace packets. + +The memory transaction field has values as defined in the enum below:- + +~~~{.c} +typedef enum _memtrans_t { + OCSD_MEM_TRANS_TRACE_INIT,/* Trace started while PE in transactional state */ + OCSD_MEM_TRANS_START, /* Trace after this packet is part of a transactional memory sequence */ + OCSD_MEM_TRANS_COMMIT, /* Transactional memory sequence valid. */ + OCSD_MEM_TRANS_FAIL, /* Transactional memory sequence failed - operations since start of transaction have been unwound. */ +} trace_memtrans_t; +~~~ + +### OCSD_GEN_TRC_ELEM_INSTRUMENTATION ### +__packet fields valid__: `sw_ite` + +Software instrumentation packets generated by the PE `TRCIT` instruction (on cores with `FEAT_ITE`). + +The `sw_ite` structure has the fields defined below:- + +~~~{.c} +typedef struct _sw_ite_t { + uint8_t el; /* exception level for PE sw instrumentation instruction */ + uint64_t value; /* payload for PE sw instrumentation instruction */ +} trace_sw_ite_t; +~~~ ### OCSD_GEN_TRC_ELEM_CUSTOM ### __packet fields optional__: `extended_data -> ptr_extended_data`,_any others_ diff --git a/decoder/docs/prog_guide/prog_guide_main.md b/decoder/docs/prog_guide/prog_guide_main.md index 87afbf0225c6..9504bdc244d3 100644 --- a/decoder/docs/prog_guide/prog_guide_main.md +++ b/decoder/docs/prog_guide/prog_guide_main.md @@ -138,9 +138,17 @@ The error logger can be attached to an output logger - ocsdMsgLogger - which can error, or other error messages, out to screen or logging file. Errors can be filtered according to a severity rating, defined by @ref ocsd_err_severity_t. -The DecodeTree will use a default error logger from the library - with a message logger -that will output to `stderr`. Client applications can adjust the configuration of this error logger and -message logger, or provide their own configured error logger / message logger pair. +The DecodeTree can use a default error logger from the library - with a message logger that will output to `stderr`. + +Client applications can create and adjust the configuration of this error logger and message logger by getting and intialising + the logger. + +~~~{.cpp} + // ** Initialise default error logger. + DecodeTree::getDefaultErrorLogger()->initErrorLogger(verbosity,true); +~~~ + +Alternatively clients may provide their own configured error logger / message logger pair. The test program `trc_pkt_lister` provides a customised version of an `ocsdMsgLogger` / `ocsdDefaultErrorLogger` pair to ensure that messages and errors are logged to the screen and a file of its choice. This logger is eventually @@ -272,6 +280,7 @@ The different trace source types have different configuration structures, classe | protocol | config struct | class | name define | |:----------|:--------------------|:------------|:-----------------------------| +| __ETE__ | @ref ocsd_ete_cfg | ETEConfig | @ref OCSD_BUILTIN_DCD_ETE | | __ETMv4__ | @ref ocsd_etmv4_cfg | EtmV4Config | @ref OCSD_BUILTIN_DCD_ETMV4I | | __ETMv3__ | @ref ocsd_etmv3_cfg | EtmV3Config | @ref OCSD_BUILTIN_DCD_ETMV3 | | __PTM__ | @ref ocsd_ptm_cfg | PtmConfig | @ref OCSD_BUILTIN_DCD_PTM | @@ -300,15 +309,19 @@ types to be managed by a memory access mapper:- ~~~{.cpp} class DecodeTree { - ///... + // ... + ocsd_err_t createMemAccMapper(memacc_mapper_t type = MEMACC_MAP_GLOBAL); + // ... ocsd_err_t addBufferMemAcc(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const uint8_t *p_mem_buffer, const uint32_t mem_length); ocsd_err_t addBinFileMemAcc(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, const std::string &filepath); ocsd_err_t addBinFileRegionMemAcc(const ocsd_file_mem_region_t *region_array, const int num_regions, const ocsd_mem_space_acc_t mem_space, const std::string &filepath); */ ocsd_err_t addCallbackMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAcc_CB p_cb_func, const void *p_context); - ///... + // ... } ~~~ +The `createMemAccMapper()` function must be called to create the mapper, before the `add...MemAcc()` calls are used. + It is further possible to differentiate between memory image access objects by the memory space for which they are valid. If it is known that a certain code image is present in secure EL3, then an image can be associated with the @ref ocsd_mem_space_acc_t type value @ref OCSD_MEM_SPACE_EL3, which will allow another image to be present at the same address but a different exception level. However, for the majority of systems, such detailed knowledge of the code is not available, or @@ -323,6 +336,7 @@ The C-API contains a similar set of calls to set up memory access objects:- OCSD_C_API ocsd_err_t ocsd_dt_add_callback_mem_acc(const dcd_tree_handle_t handle, const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, Fn_MemAcc_CB p_cb_func, const void *p_context); ~~~ +Note that the C-API will automatically create a default mapper when the first memory access object is added. ### Adding the output callbacks ### diff --git a/decoder/docs/test_progs.md b/decoder/docs/test_progs.md index c02d02e96271..3af769244d0c 100644 --- a/decoder/docs/test_progs.md +++ b/decoder/docs/test_progs.md @@ -61,6 +61,8 @@ __Command Line Options__ - `-tpiu_hsync` : Input data is from a TPIU source that has both TPIU FSYNC and HSYNC packets present. - `-decode` : Full decode of the packets from the trace snapshot (default is to list undecoded packets only. - `-decode_only` : Does not list the undecoded packets, just the trace decode. +- `-src_addr_n` : ETE protocol; Indicate skipped N atoms in source address packet ranges by breaking the decode + range into multiple ranges on N atoms. - `-o_raw_packed` : Output raw packed trace frames. - `-o_raw_unpacked` : Output raw unpacked trace data per ID. diff --git a/decoder/include/common/ocsd_dcd_mngr.h b/decoder/include/common/ocsd_dcd_mngr.h index 3342eacb24ca..34c4ef1dc1c4 100644 --- a/decoder/include/common/ocsd_dcd_mngr.h +++ b/decoder/include/common/ocsd_dcd_mngr.h @@ -80,16 +80,16 @@ public: private: - ocsd_trace_protocol_t m_builtInProtocol; //!< Protocol ID if built in type. + const ocsd_trace_protocol_t m_builtInProtocol; //!< Protocol ID if built in type. }; template -DecoderMngrBase::DecoderMngrBase(const std::string &decoderTypeName, ocsd_trace_protocol_t builtInProtocol) + DecoderMngrBase::DecoderMngrBase(const std::string &decoderTypeName, ocsd_trace_protocol_t builtInProtocol) : + m_builtInProtocol(builtInProtocol) { OcsdLibDcdRegister *pDcdReg = OcsdLibDcdRegister::getDecoderRegister(); if(pDcdReg) pDcdReg->registerDecoderTypeByName(decoderTypeName,this); - m_builtInProtocol = builtInProtocol; } template @@ -362,6 +362,49 @@ public: } }; +/* full decode - extended config object - base + derived. */ +template< class P, // Packet class. + class Pt, // Packet enum type ID. + class Pc, // Processor config base class. + class PcEx, // Processor config derived class + class PcSt, // Processor config struct type + class PktProc, // Packet processor class. + class PktDcd> // Packet decoder class. + class DecodeMngrFullDcdExCfg : public DecoderMngrBase +{ +public: + DecodeMngrFullDcdExCfg(const std::string &name, ocsd_trace_protocol_t builtInProtocol) + : DecoderMngrBase(name, builtInProtocol) {}; + + virtual ~DecodeMngrFullDcdExCfg() {}; + + virtual TraceComponent *createPktProc(const bool useInstID, const int instID) + { + TraceComponent *pComp; + if (useInstID) + pComp = new (std::nothrow) PktProc(instID); + else + pComp = new (std::nothrow) PktProc(); + return pComp; + } + + virtual TraceComponent *createPktDecode(const bool useInstID, const int instID) + { + TraceComponent *pComp; + if (useInstID) + pComp = new (std::nothrow)PktDcd(instID); + else + pComp = new (std::nothrow)PktDcd(); + return pComp; + } + + virtual CSConfig *createConfig(const void *pDataStruct) + { + return new (std::nothrow) PcEx((PcSt *)pDataStruct); + } +}; + + /****************************************************************************************************/ /* Packet processor only, templated base for creating decoder objects */ /****************************************************************************************************/ diff --git a/decoder/include/common/ocsd_dcd_tree.h b/decoder/include/common/ocsd_dcd_tree.h index e4e74f2bc659..b1c3dc601cab 100644 --- a/decoder/include/common/ocsd_dcd_tree.h +++ b/decoder/include/common/ocsd_dcd_tree.h @@ -168,6 +168,30 @@ public: */ ocsd_err_t removeDecoder(const uint8_t CSID); + /*! + * Get the stats block for the channel indicated. + * Caller must check p_stats_block->version to esure that the block + * is filled in a compatible manner. + * + * @param CSID : Configured CoreSight trace ID for the decoder. + * @param p_stats_block: block pointer to set to reference the stats block. + * + * @return ocsd_err_t : Library error code - OCSD_OK if valid block pointer returned, + * OCSD_ERR_NOTINIT if decoder does not support stats counting. + */ + ocsd_err_t getDecoderStats(const uint8_t CSID, ocsd_decode_stats_t **p_stats_block); + + /*! + * Reset the stats block for the chosens decode channel. + * stats block is reset independently of the decoder reset to allow counts across + * multiple decode runs. + * + * @param handle : Handle to decode tree. + * @param CSID : Configured CoreSight trace ID for the decoder. + * + * @return ocsd_err_t : Library error code - OCSD_OK if successful. + */ + ocsd_err_t resetDecoderStats(const uint8_t CSID); /* get decoder elements currently in use */ @@ -387,7 +411,7 @@ private: void destroyMemAccMapper(); ocsd_err_t initCallbackMemAcc(const ocsd_vaddr_t st_address, const ocsd_vaddr_t en_address, const ocsd_mem_space_acc_t mem_space, void *p_cb_func, bool IDfn, const void *p_context); - + TrcPktProcI *getPktProcI(const uint8_t CSID); ocsd_dcd_tree_src_t m_dcd_tree_type; @@ -417,6 +441,9 @@ private: /**! default instruction decoder */ static TrcIDecode s_instruction_decoder; + + /**! demux stats block */ + ocsd_demux_stats_t m_demux_stats; }; /** @}*/ diff --git a/decoder/include/common/ocsd_error.h b/decoder/include/common/ocsd_error.h index e547f4878033..7c6ed3af141f 100644 --- a/decoder/include/common/ocsd_error.h +++ b/decoder/include/common/ocsd_error.h @@ -108,6 +108,17 @@ inline ocsdError& ocsdError::operator=(const ocsdError &err) return (*this = &err); } +/* class to get data path response values as strings */ +class ocsdDataRespStr +{ +public: + ocsdDataRespStr(ocsd_datapath_resp_t type) { m_type = type; } + ~ocsdDataRespStr() {}; + + const char* getStr(); +private: + ocsd_datapath_resp_t m_type; +}; /** @}*/ diff --git a/decoder/include/common/trc_core_arch_map.h b/decoder/include/common/trc_core_arch_map.h index b72b4b411fa4..aa976c39f908 100644 --- a/decoder/include/common/trc_core_arch_map.h +++ b/decoder/include/common/trc_core_arch_map.h @@ -53,7 +53,8 @@ * * Valid architecture profile names are:- * - ARMv7-A, ARMv7-R, ARMv7-M; - * - ARMv8-A, ARMv8.3A, ARMv8-R, ARMv8-M; + * - ARMv8-A, ARMv8.x-A, ARMv8-R, ARMv8-M; + * - ARM-AA64, ARM-aa64 * */ class CoreArchProfileMap @@ -65,36 +66,12 @@ public: ocsd_arch_profile_t getArchProfile(const std::string &coreName); private: + ocsd_arch_profile_t getPatternMatchCoreName(const std::string &coreName); std::map core_profiles; std::map arch_profiles; }; -inline ocsd_arch_profile_t CoreArchProfileMap::getArchProfile(const std::string &coreName) -{ - ocsd_arch_profile_t ap = { ARCH_UNKNOWN, profile_Unknown }; - bool bFound = false; - - std::map::const_iterator it; - - /* match against the core name map. */ - it = core_profiles.find(coreName); - if (it != core_profiles.end()) - { - ap = it->second; - bFound = true; - } - - /* scan architecture profiles on no core name match */ - if (!bFound) - { - it = arch_profiles.find(coreName); - if (it != arch_profiles.end()) - ap = it->second; - } - return ap; -} - #endif // ARM_TRC_CORE_ARCH_MAP_H_INCLUDED /* End of File trc_core_arch_map.h */ diff --git a/decoder/include/common/trc_frame_deformatter.h b/decoder/include/common/trc_frame_deformatter.h index e4297a41e8fd..cb2960fcdd07 100644 --- a/decoder/include/common/trc_frame_deformatter.h +++ b/decoder/include/common/trc_frame_deformatter.h @@ -73,6 +73,9 @@ public: componentAttachPt *getErrLogAttachPt(); + /* init decoder implementation object */ + ocsd_err_t Init(); + /* configuration - set operational mode for incoming stream (has FSYNCS etc) */ ocsd_err_t Configure(uint32_t cfg_flags); const uint32_t getConfigFlags() const; @@ -85,9 +88,13 @@ public: ocsd_datapath_resp_t Reset(); /* reset the decode to the start state, drop partial data - propogate to attached components */ ocsd_datapath_resp_t Flush(); /* flush existing data if possible, retain state - propogate to attached components */ + /* demux stats */ + void SetDemuxStatsBlock(ocsd_demux_stats_t *pStatsBlock); + private: TraceFmtDcdImpl *m_pDecoder; int m_instNum; + }; /** @}*/ diff --git a/decoder/include/common/trc_gen_elem.h b/decoder/include/common/trc_gen_elem.h index 5d8983a8c274..405abfef8341 100644 --- a/decoder/include/common/trc_gen_elem.h +++ b/decoder/include/common/trc_gen_elem.h @@ -69,19 +69,22 @@ public: void setExcepMarker() { excep_data_marker = 1; }; void setExceptionNum(uint32_t excepNum) { exception_number = excepNum; }; - - void setTraceOnReason(const trace_on_reason_t reason); void setUnSyncEOTReason(const unsync_info_t reason); + void setTransactionType(const trace_memtrans_t trans) { mem_trans = trans; }; void setAddrRange(const ocsd_vaddr_t st_addr, const ocsd_vaddr_t en_addr, const int num_instr = 1); void setLastInstrInfo(const bool exec, const ocsd_instr_type last_i_type, const ocsd_instr_subtype last_i_subtype, const uint8_t size); - void setAddrStart(const ocsd_vaddr_t st_addr) { this->st_addr = st_addr; }; + void setAddrStart(const ocsd_vaddr_t st_addr) { this->st_addr = st_addr; }; void setLastInstrCond(const int is_cond) { this->last_instr_cond = is_cond; }; void setSWTInfo(const ocsd_swt_info_t swt_info) { sw_trace_info = swt_info; }; void setExtendedDataPtr(const void *data_ptr); + void setITEInfo(const trace_sw_ite_t sw_instrumentation) { sw_ite = sw_instrumentation; }; + + void setSyncMarker(const trace_marker_payload_t &marker); + // stringize the element virtual void toString(std::string &str) const; @@ -208,6 +211,11 @@ inline void OcsdTraceElement::setExtendedDataPtr(const void *data_ptr) ptr_extended_data = data_ptr; } +inline void OcsdTraceElement::setSyncMarker(const trace_marker_payload_t &marker) +{ + sync_marker = marker; +} + // set persistent data between output packets. inline void OcsdTraceElement::copyPersistentData(const OcsdTraceElement &src) { diff --git a/decoder/include/common/trc_pkt_decode_base.h b/decoder/include/common/trc_pkt_decode_base.h index da702068f372..24ea2b05a6f9 100644 --- a/decoder/include/common/trc_pkt_decode_base.h +++ b/decoder/include/common/trc_pkt_decode_base.h @@ -96,6 +96,7 @@ protected: /* target access */ ocsd_err_t accessMemory(const ocsd_vaddr_t address, const ocsd_mem_space_acc_t mem_space, uint32_t *num_bytes, uint8_t *p_buffer); + ocsd_err_t invalidateMemAccCache(); /* instruction decode */ ocsd_err_t instrDecode(ocsd_instr_info *instr_info); @@ -180,6 +181,14 @@ inline ocsd_err_t TrcPktDecodeI::accessMemory(const ocsd_vaddr_t address, const return OCSD_ERR_DCD_INTERFACE_UNUSED; } +inline ocsd_err_t TrcPktDecodeI::invalidateMemAccCache() +{ + if (!m_uses_memaccess) + return OCSD_ERR_DCD_INTERFACE_UNUSED; + m_mem_access.first()->InvalidateMemAccCache(getCoreSightTraceID()); + return OCSD_OK; +} + /**********************************************************************/ template class TrcPktDecodeBase : public TrcPktDecodeI, public IPktDataIn

diff --git a/decoder/include/common/trc_pkt_proc_base.h b/decoder/include/common/trc_pkt_proc_base.h index 3098a3d0c0ea..8ed7d83b2d5a 100644 --- a/decoder/include/common/trc_pkt_proc_base.h +++ b/decoder/include/common/trc_pkt_proc_base.h @@ -43,6 +43,7 @@ #include "trc_component.h" #include "comp_attach_pt_t.h" +#include "opencsd/ocsd_if_version.h" /** @defgroup ocsd_pkt_proc OpenCSD Library : Packet Processors. @brief Classes providing Protocol Packet Processing capability. @@ -76,6 +77,8 @@ public: const uint8_t *pDataBlock, uint32_t *numBytesProcessed) = 0; + virtual ocsd_err_t getStatsBlock(ocsd_decode_stats_t **pp_stats) = 0; + virtual void resetStats() = 0; protected: /* implementation packet processing interface */ @@ -155,6 +158,10 @@ public: //!< Get the configuration for the decoder. virtual const Pc *getProtocolConfig() const { return m_config; }; +/* stats block access - derived class must init stats for the block to be returned. */ + virtual ocsd_err_t getStatsBlock(ocsd_decode_stats_t **pp_stats); + virtual void resetStats(); /* reset the counts - operates separately from decoder reset. */ + protected: /* data output functions */ @@ -183,6 +190,14 @@ protected: const bool checkInit(); // return true if init (configured and at least one output sink attached), false otherwise. + /* stats block updates - called by derived protocol specific decoder */ + void statsAddTotalCount(const uint64_t count) { m_stats.channel_total += count; }; + void statsAddUnsyncCount(const uint64_t count) { m_stats.channel_unsynced += count; }; + void statsAddBadSeqCount(const uint32_t count) { m_stats.bad_sequence_errs += count; }; + void statsAddBadHdrCount(const uint32_t count) { m_stats.bad_header_errs += count; }; + void statsInit() { m_stats_init = true; }; /* mark stats as in use */ + + private: /* decode control */ ocsd_datapath_resp_t Reset(const ocsd_trc_index_t index); @@ -195,20 +210,29 @@ private: componentAttachPt> m_pkt_indexer_i; bool m_b_is_init; + + /* decode statistics block */ + ocsd_decode_stats_t m_stats; + bool m_stats_init; /*< true if the specific decoder is using the stats */ + }; template TrcPktProcBase::TrcPktProcBase(const char *component_name) : TrcPktProcI(component_name), m_config(0), - m_b_is_init(false) + m_b_is_init(false), + m_stats_init(false) { + resetStats(); } template TrcPktProcBase::TrcPktProcBase(const char *component_name, int instIDNum) : TrcPktProcI(component_name, instIDNum), m_config(0), - m_b_is_init(false) + m_b_is_init(false), + m_stats_init(false) { + resetStats(); } template TrcPktProcBase::~TrcPktProcBase() @@ -405,6 +429,26 @@ template const bool TrcPktProcBase::check return m_b_is_init; } +template ocsd_err_t TrcPktProcBase::getStatsBlock(ocsd_decode_stats_t **pp_stats) +{ + + *pp_stats = &m_stats; + return m_stats_init ? OCSD_OK : OCSD_ERR_NOT_INIT; +} + +template void TrcPktProcBase::resetStats() +{ + m_stats.version = OCSD_VER_NUM; + m_stats.revision = OCSD_STATS_REVISION; + m_stats.channel_total = 0; + m_stats.channel_unsynced = 0; + m_stats.bad_header_errs = 0; + m_stats.bad_sequence_errs = 0; + m_stats.demux.frame_bytes = 0; + m_stats.demux.no_id_bytes = 0; + m_stats.demux.valid_id_bytes = 0; +} + /** @}*/ #endif // ARM_TRC_PKT_PROC_BASE_H_INCLUDED diff --git a/decoder/include/i_dec/trc_idec_arminst.h b/decoder/include/i_dec/trc_idec_arminst.h index 911b0cf7db95..e90ec04ae84d 100644 --- a/decoder/include/i_dec/trc_idec_arminst.h +++ b/decoder/include/i_dec/trc_idec_arminst.h @@ -44,7 +44,7 @@ /* supplementary decode information */ struct decode_info { - uint16_t arch_version; + ocsd_arch_version_t arch_version; ocsd_instr_subtype instr_sub_type; }; @@ -121,7 +121,8 @@ arm_barrier_t inst_A64_barrier(uint32_t inst); int inst_ARM_wfiwfe(uint32_t inst); int inst_Thumb_wfiwfe(uint32_t inst); -int inst_A64_wfiwfe(uint32_t inst); +int inst_A64_wfiwfe(uint32_t inst, struct decode_info *info); +int inst_A64_Tstart(uint32_t inst); /* Test whether an instruction is definitely undefined, e.g. because diff --git a/decoder/include/interfaces/trc_pkt_raw_in_i.h b/decoder/include/interfaces/trc_pkt_raw_in_i.h index 6f7b21383024..dfa7e057ca67 100644 --- a/decoder/include/interfaces/trc_pkt_raw_in_i.h +++ b/decoder/include/interfaces/trc_pkt_raw_in_i.h @@ -47,7 +47,7 @@ * * This interface provides a monitor point for the packet processor block. * The templated interface is called with a complete packet of the given - * type, plus the raw packet bytes. Use for tools which need to display compplete + * type, plus the raw packet bytes. Use for tools which need to display complete * packets or require additional processing on raw packet data. * * This interface is not part of the data decode path and cannot provide feedback. diff --git a/decoder/include/interfaces/trc_tgt_mem_access_i.h b/decoder/include/interfaces/trc_tgt_mem_access_i.h index effc9b5e161e..68a4e10055d4 100644 --- a/decoder/include/interfaces/trc_tgt_mem_access_i.h +++ b/decoder/include/interfaces/trc_tgt_mem_access_i.h @@ -83,6 +83,14 @@ public: const ocsd_mem_space_acc_t mem_space, uint32_t *num_bytes, uint8_t *p_buffer) = 0; + + /*! + * Invalidate any caching that the memory accessor functions are using. + * Generally called when a memory context changes in the trace. + * + * @param cs_trace_id : protocol source trace ID. + */ + virtual void InvalidateMemAccCache(const uint8_t cs_trace_id) = 0; }; diff --git a/decoder/include/mem_acc/trc_mem_acc_mapper.h b/decoder/include/mem_acc/trc_mem_acc_mapper.h index a700e9dbd07e..4a08498df14e 100644 --- a/decoder/include/mem_acc/trc_mem_acc_mapper.h +++ b/decoder/include/mem_acc/trc_mem_acc_mapper.h @@ -61,6 +61,8 @@ public: uint32_t *num_bytes, uint8_t *p_buffer); + virtual void InvalidateMemAccCache(const uint8_t cs_trace_id); + // mapper memory area configuration interface // add an accessor to this map diff --git a/decoder/include/opencsd.h b/decoder/include/opencsd.h index 615bbcafa2d9..8af4fd0df5ef 100644 --- a/decoder/include/opencsd.h +++ b/decoder/include/opencsd.h @@ -63,6 +63,7 @@ #include "opencsd/etmv4/etmv4_decoder.h" #include "opencsd/ptm/ptm_decoder.h" #include "opencsd/stm/stm_decoder.h" +#include "opencsd/ete/ete_decoder.h" /** C++ library object types */ #include "common/ocsd_error_logger.h" diff --git a/decoder/include/opencsd/c_api/ocsd_c_api_types.h b/decoder/include/opencsd/c_api/ocsd_c_api_types.h index cde351fc525f..7f9b4bab9494 100644 --- a/decoder/include/opencsd/c_api/ocsd_c_api_types.h +++ b/decoder/include/opencsd/c_api/ocsd_c_api_types.h @@ -46,6 +46,7 @@ #include "opencsd/etmv4/trc_pkt_types_etmv4.h" #include "opencsd/ptm/trc_pkt_types_ptm.h" #include "opencsd/stm/trc_pkt_types_stm.h" +#include "opencsd/ete/trc_pkt_types_ete.h" /** @ingroup lib_c_api @{*/ diff --git a/decoder/include/opencsd/c_api/opencsd_c_api.h b/decoder/include/opencsd/c_api/opencsd_c_api.h index 90201d436e08..ebbba87d952e 100644 --- a/decoder/include/opencsd/c_api/opencsd_c_api.h +++ b/decoder/include/opencsd/c_api/opencsd_c_api.h @@ -210,10 +210,36 @@ OCSD_C_API ocsd_err_t ocsd_dt_attach_packet_callback( const dcd_tree_handle_t h const void *p_context); - - +/*! + * Get the stats block for the channel indicated. + * Caller must check p_stats_block->version to esure that the block + * is filled in a compatible manner. + * + * @param handle : Handle to decode tree. + * @param CSID : Configured CoreSight trace ID for the decoder. + * @param p_stats_block: block pointer to set to reference the stats block. + * + * @return ocsd_err_t : Library error code - OCSD_OK if valid block pointer returned, + * OCSD_ERR_NOTINIT if decoder does not support stats counting. + */ +OCSD_C_API ocsd_err_t ocsd_dt_get_decode_stats( const dcd_tree_handle_t handle, + const unsigned char CSID, + ocsd_decode_stats_t **p_stats_block); - + +/*! + * Reset the stats block for the chosens decode channel. + * stats block is reset independently of the decoder reset to allow counts across + * multiple decode runs. + * + * @param handle : Handle to decode tree. + * @param CSID : Configured CoreSight trace ID for the decoder. + * + * @return ocsd_err_t : Library error code - OCSD_OK if successful. + */ +OCSD_C_API ocsd_err_t ocsd_dt_reset_decode_stats( const dcd_tree_handle_t handle, + const unsigned char CSID); + /** @}*/ /*---------------------- Memory Access for traced opcodes ----------------------------------------------------------------------------------*/ /** @name Library Memory Accessor configuration on decode tree. @@ -373,6 +399,28 @@ OCSD_C_API ocsd_err_t ocsd_def_errlog_set_strprint_cb(const dcd_tree_handle_t ha */ OCSD_C_API void ocsd_def_errlog_msgout(const char *msg); +/*! + * Convert an error code into a string. + * + * @param err : error code. + * @param buffer : buffer for return string + * @param buffer_size : length of buffer. + */ +OCSD_C_API void ocsd_err_str(const ocsd_err_t err, char *buffer, const int buffer_size); + +/*! + * returns the last error logged by the system, with the related trace byte index, trace channel id, + * and any error message related string. + * If index or channel ID are not valid these will return OCSD_BAD_TRC_INDEX and OCSD_BAD_CS_SRC_ID. + * + * return value is the error code of the last logged error, OCSD_OK for no error available. + * + * @param index : returns trace byte index relating to error, or OCSD_BAD_TRC_INDEX + * @param chan_id : returns trace channel ID relating to error, or OCSD_BAD_CS_SRC_ID + * @param message : buffer to copy the last error message. + * @param message_len: length of message buffer. + */ +OCSD_C_API ocsd_err_t ocsd_get_last_err(ocsd_trc_index_t *index, uint8_t *chan_id, char *message, const int message_len); /** @}*/ diff --git a/decoder/include/opencsd/ete/ete_decoder.h b/decoder/include/opencsd/ete/ete_decoder.h new file mode 100644 index 000000000000..ba0d718bfff1 --- /dev/null +++ b/decoder/include/opencsd/ete/ete_decoder.h @@ -0,0 +1,47 @@ +/* +* \file ete_decoder.h +* \brief OpenCSD : Top level header file for ETE decoder. +* +* \copyright Copyright (c) 2019, ARM Limited. All Rights Reserved. +*/ + +/* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef ARM_ETE_DECODER_H_INCLUDED +#define ARM_ETE_DECODER_H_INCLUDED + +// ETE actually uses extended ETMv4 packet processor and decode +// ETE specifics limited to configuration +// +#include "trc_cmp_cfg_ete.h" +#include "trc_pkt_types_ete.h" + +#endif // ARM_ETE_DECODER_H_INCLUDED + +/* End of File ete_decoder.h */ + diff --git a/decoder/include/opencsd/ete/trc_cmp_cfg_ete.h b/decoder/include/opencsd/ete/trc_cmp_cfg_ete.h new file mode 100644 index 000000000000..8365ffa88460 --- /dev/null +++ b/decoder/include/opencsd/ete/trc_cmp_cfg_ete.h @@ -0,0 +1,81 @@ +/* +* \file trc_cmp_cfg_ete.h +* \brief OpenCSD : ETE configuration +* +* \copyright Copyright (c) 2019, ARM Limited. All Rights Reserved. +*/ + +/* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef ARM_TRC_CMP_CFG_ETE_H_INCLUDED +#define ARM_TRC_CMP_CFG_ETE_H_INCLUDED + +#include "trc_pkt_types_ete.h" +#include "opencsd/etmv4/trc_cmp_cfg_etmv4.h" + +/** @addtogroup ocsd_protocol_cfg +@{*/ + +/** @name ETE configuration +@{*/ + +/*! + * @class ETEConfig + * @brief Interpreter class for ETE config structure + * + * ETE trace and config are a superset of ETMv4 trace and config - hence + * use the EtmV4Config class as a base. + */ +class ETEConfig : public EtmV4Config +{ +public: + ETEConfig(); + ETEConfig(const ocsd_ete_cfg *cfg_regs); + ~ETEConfig(); + + //! copy assignment operator for base structure into class. + ETEConfig & operator=(const ocsd_ete_cfg *p_cfg); + + //! cast operator returning struct const reference + operator const ocsd_ete_cfg &() const { return m_ete_cfg; }; + //! cast operator returning struct const pointer + operator const ocsd_ete_cfg *() const { return &m_ete_cfg; }; + +private: + void copyV4(); // copy relevent config to underlying structure. + + ocsd_ete_cfg m_ete_cfg; +}; + + +/** @}*/ +/** @}*/ + +#endif // ARM_TRC_CMP_CFG_ETE_H_INCLUDED + +/* End of File trc_cmp_cfg_ete.h */ diff --git a/decoder/include/opencsd/ete/trc_dcd_mngr_ete.h b/decoder/include/opencsd/ete/trc_dcd_mngr_ete.h new file mode 100644 index 000000000000..7b0c134b20c5 --- /dev/null +++ b/decoder/include/opencsd/ete/trc_dcd_mngr_ete.h @@ -0,0 +1,58 @@ +/* +* \file trc_dcd_mngr_ete.h +* \brief OpenCSD : ETE decoder creation. +* +* \copyright Copyright (c) 2019, ARM Limited. All Rights Reserved. +*/ + +/* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef ARM_TRC_DCD_MNGR_ETE_H_INCLUDED +#define ARM_TRC_DCD_MNGR_ETE_H_INCLUDED + +#include "common/ocsd_dcd_mngr.h" +#include "trc_cmp_cfg_ete.h" +#include "opencsd/etmv4/trc_pkt_decode_etmv4i.h" +#include "opencsd/etmv4/trc_pkt_proc_etmv4.h" + +class DecoderMngrETE : public DecodeMngrFullDcdExCfg< EtmV4ITrcPacket, + ocsd_etmv4_i_pkt_type, + EtmV4Config, + ETEConfig, + ocsd_ete_cfg, + TrcPktProcEtmV4I, + TrcPktDecodeEtmV4I> +{ +public: + DecoderMngrETE(const std::string &name) : DecodeMngrFullDcdExCfg(name, OCSD_PROTOCOL_ETE) {}; + virtual ~DecoderMngrETE() {}; +}; + +#endif // ARM_TRC_DCD_MNGR_ETE_H_INCLUDED + +/* End of File trc_dcd_mngr_ete.h */ diff --git a/decoder/include/opencsd/ete/trc_pkt_types_ete.h b/decoder/include/opencsd/ete/trc_pkt_types_ete.h new file mode 100644 index 000000000000..f87d454605fd --- /dev/null +++ b/decoder/include/opencsd/ete/trc_pkt_types_ete.h @@ -0,0 +1,66 @@ +/* + * \file trc_pkt_types_ete.h + * \brief OpenCSD : ETE types + * + * \copyright Copyright (c) 2019, ARM Limited. All Rights Reserved. + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef ARM_TRC_PKT_TYPES_ETE_H_INCLUDED +#define ARM_TRC_PKT_TYPES_ETE_H_INCLUDED + +#include "opencsd/trc_pkt_types.h" +#include "opencsd/etmv4/trc_pkt_types_etmv4.h" + /** @addtogroup trc_pkts + @{*/ + + /** @name ETE config Types + @{*/ + + +typedef struct _ocsd_ete_cfg +{ + uint32_t reg_idr0; /**< ID0 register */ + uint32_t reg_idr1; /**< ID1 register */ + uint32_t reg_idr2; /**< ID2 register */ + uint32_t reg_idr8; /**< ID8 - maxspec */ + uint32_t reg_devarch; /**< DevArch register */ + uint32_t reg_configr; /**< Config Register */ + uint32_t reg_traceidr; /**< Trace Stream ID register */ + ocsd_arch_version_t arch_ver; /**< Architecture version */ + ocsd_core_profile_t core_prof; /**< Core Profile */ +} ocsd_ete_cfg; + + +/** @}*/ +/** @}*/ + +#endif // ARM_TRC_PKT_TYPES_ETE_H_INCLUDED + +/* End of File trc_pkt_types_ete.h */ diff --git a/decoder/include/opencsd/etmv4/trc_cmp_cfg_etmv4.h b/decoder/include/opencsd/etmv4/trc_cmp_cfg_etmv4.h index 1d72d97afe59..223dbda44510 100644 --- a/decoder/include/opencsd/etmv4/trc_cmp_cfg_etmv4.h +++ b/decoder/include/opencsd/etmv4/trc_cmp_cfg_etmv4.h @@ -81,6 +81,7 @@ public: const bool hasCycleCountI() const; const bool hasRetStack() const; const uint8_t numEvents() const; + const bool eteHasTSMarker() const; typedef enum _condType { COND_PASS_FAIL, @@ -104,6 +105,7 @@ public: const uint32_t TimeStampSize() const; const bool commitOpt1() const; + const bool commTransP0() const; /* idr 1 */ const uint8_t MajVersion() const; @@ -151,6 +153,7 @@ public: const bool enabledCCI() const; const bool enabledCID() const; const bool enabledVMID() const; + const bool enabledVMIDOpt() const; typedef enum { COND_TR_DIS, @@ -253,6 +256,11 @@ inline const bool EtmV4Config::hasTrcExcpData() const return (bool)((m_cfg.reg_idr0 & 0x20000) == 0x20000); } +inline const bool EtmV4Config::eteHasTSMarker() const +{ + return (FullVersion() >= 0x51) && ((m_cfg.reg_idr0 & 0x800000) == 0x800000); +} + inline const uint32_t EtmV4Config::TimeStampSize() const { uint32_t tsSizeF = (m_cfg.reg_idr0 >> 24) & 0x1F; @@ -268,6 +276,11 @@ inline const bool EtmV4Config::commitOpt1() const return (bool)((m_cfg.reg_idr0 & 0x20000000) == 0x20000000) && hasCycleCountI(); } +inline const bool EtmV4Config::commTransP0() const +{ + return (bool)((m_cfg.reg_idr0 & 0x40000000) == 0x0); +} + /* idr 1 */ inline const uint8_t EtmV4Config::MajVersion() const { @@ -424,6 +437,20 @@ inline const bool EtmV4Config::enabledVMID() const return ((m_cfg.reg_configr & (0x1 << 7)) != 0); } +inline const bool EtmV4Config::enabledVMIDOpt() const +{ + bool vmidOptVal = ((m_cfg.reg_configr & (0x1 << 15)) != 0); + /* TRIDR2.VMIDOPT[30:29] determine value used */ + if (!vmidOpt()) { /* [29] = 1'b0 */ + vmidOptVal = false; /* res0 */ + if (FullVersion() >= 0x45) { + /* umless version > 4.5 in which case [30] determines res val */ + vmidOptVal = ((m_cfg.reg_idr2 & (0x1 << 30)) != 0); + } + } + return vmidOptVal; +} + inline const EtmV4Config::CondITrace_t EtmV4Config::enabledCondITrace() { if(!m_condTraceCalc) diff --git a/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h b/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h index 5a283c541f3e..21bd7af434de 100644 --- a/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h +++ b/decoder/include/opencsd/etmv4/trc_etmv4_stack_elem.h @@ -34,6 +34,7 @@ #define ARM_TRC_ETMV4_STACK_ELEM_H_INCLUDED #include "opencsd/etmv4/trc_pkt_types_etmv4.h" +#include "opencsd/trc_gen_elem_types.h" #include #include @@ -56,9 +57,16 @@ typedef enum _p0_elem_t P0_TS, P0_CC, P0_TS_CC, + P0_MARKER, P0_Q, P0_OVERFLOW, P0_FUNC_RET, + P0_SRC_ADDR, + P0_TRANS_TRACE_INIT, + P0_TRANS_START, + P0_TRANS_COMMIT, + P0_TRANS_FAIL, + P0_ITE, } p0_elem_t; @@ -101,6 +109,7 @@ class TrcStackElemAddr : public TrcStackElem { protected: TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const bool src_addr); virtual ~TrcStackElemAddr() {}; friend class EtmV4P0Stack; @@ -120,6 +129,14 @@ inline TrcStackElemAddr::TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, m_addr_val.isa = 0; } +inline TrcStackElemAddr::TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const bool src_addr) : + TrcStackElem(src_addr ? P0_SRC_ADDR : P0_ADDR, false, root_pkt, root_index) +{ + m_addr_val.val = 0; + m_addr_val.isa = 0; +} + + /************************************************************/ /** Q element */ class TrcStackQElem : public TrcStackElem @@ -294,6 +311,55 @@ inline TrcStackElemParam::TrcStackElemParam(const p0_elem_t p0_type, const bool { } +/************************************************************/ +/** Marker element */ + +class TrcStackElemMarker : public TrcStackElem +{ +protected: + TrcStackElemMarker(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElemMarker() {}; + + friend class EtmV4P0Stack; + +public: + void setMarker(const trace_marker_payload_t &marker) { m_marker = marker; }; + const trace_marker_payload_t &getMarker() const { return m_marker; }; + +private: + trace_marker_payload_t m_marker; +}; + +inline TrcStackElemMarker::TrcStackElemMarker(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : + TrcStackElem(P0_MARKER, false, root_pkt, root_index) +{ +} + +/************************************************************/ +/* Instrumentation element + */ + +class TrcStackElemITE : public TrcStackElem +{ +protected: + TrcStackElemITE(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElemITE() {}; + + friend class EtmV4P0Stack; + +public: + void setITE(const trace_sw_ite_t &ite) { m_ite = ite; }; + const trace_sw_ite_t &getITE() { return m_ite; }; + +private: + trace_sw_ite_t m_ite; +}; + +inline TrcStackElemITE::TrcStackElemITE(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : + TrcStackElem(P0_ITE, false, root_pkt, root_index) +{ +} + /************************************************************/ /* P0 element stack that allows push of elements, and deletion of elements when done. */ @@ -329,6 +395,10 @@ public: TrcStackElemCtxt *createContextElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_context_t &context, const uint8_t IS, const bool back = false); TrcStackElemAddr *createAddrElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_addr_val_t &addr_val); TrcStackQElem *createQElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const int count); + TrcStackElemMarker *createMarkerElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const trace_marker_payload_t &marker); + TrcStackElemAddr *createSrcAddrElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_addr_val_t &addr_val); + TrcStackElemITE *createITEElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const trace_sw_ite_t &ite); + private: std::deque m_P0_stack; //!< P0 decode element stack std::vector m_popped_elem; //!< save list of popped but not deleted elements. diff --git a/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h b/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h index 419cd828928c..7838ece04e57 100644 --- a/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h +++ b/decoder/include/opencsd/etmv4/trc_pkt_decode_etmv4i.h @@ -88,11 +88,29 @@ protected: // process Q element ocsd_err_t processQElement(); + // process a source address element + ocsd_err_t processSourceAddress(); + // process an element that cannot be cancelled / discarded ocsd_err_t processTS_CC_EventElem(TrcStackElem *pElem); + // process marker elements + ocsd_err_t processMarkerElem(TrcStackElem *pElem); + + // process a transaction element + ocsd_err_t processTransElem(TrcStackElem *pElem); + + // process an Instrumentation element + ocsd_err_t processITEElem(TrcStackElem *pElem); + // process a bad packet - ocsd_err_t handleBadPacket(const char *reason); + ocsd_err_t handleBadPacket(const char *reason, ocsd_trc_index_t index = OCSD_BAD_TRC_INDEX); + + // sequencing error on packet processing - optionally continue + ocsd_err_t handlePacketSeqErr(ocsd_err_t err, ocsd_trc_index_t index, const char *reason); + + // common packet error routine + ocsd_err_t handlePacketErr(ocsd_err_t err, ocsd_err_severity_t sev, ocsd_trc_index_t index, const char *reason); ocsd_err_t addElemCC(TrcStackElemParam *pParamElem); ocsd_err_t addElemTS(TrcStackElemParam *pParamElem, bool withCC); @@ -127,6 +145,13 @@ private: ocsd_err_t returnStackPop(); // pop return stack and update instruction address. void setElemTraceRange(OcsdTraceElement &elemIn, const instr_range_t &addr_range, const bool executed, ocsd_trc_index_t index); + void setElemTraceRangeInstr(OcsdTraceElement &elemIn, const instr_range_t &addr_range, + const bool executed, ocsd_trc_index_t index, ocsd_instr_info &instr); + + // true if we are ETE configured. + inline bool isETEConfig() { + return (m_config->MajVersion() >= ETE_ARCH_VERSION); + } ocsd_mem_space_acc_t getCurrMemSpace(); @@ -134,6 +159,7 @@ private: // timestamping uint64_t m_timestamp; // last broadcast global Timestamp. + bool m_ete_first_ts_marker; // state and context uint32_t m_context_id; // most recent context ID diff --git a/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h b/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h index 8ccf36b373db..02404749718d 100644 --- a/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h +++ b/decoder/include/opencsd/etmv4/trc_pkt_elem_etmv4i.h @@ -145,7 +145,7 @@ public: void setCondRF3(const uint16_t tokens); void setCondRF4(const uint8_t token); - void setContextInfo(const bool update, const uint8_t EL = 0, const uint8_t NS = 0, const uint8_t SF = 0); + void setContextInfo(const bool update, const uint8_t EL = 0, const uint8_t NS = 0, const uint8_t SF = 0, const uint8_t NSE = 0); void setContextVMID(const uint32_t VMID); void setContextCID(const uint32_t CID); @@ -160,6 +160,7 @@ public: void setEvent(const uint8_t event_val); void setQType(const bool has_count, const uint32_t count, const bool has_addr, const bool addr_match, const uint8_t type); + void setITE(const uint8_t el, const uint64_t value); // packet status interface - get packet info. const ocsd_etmv4_i_pkt_type getType() const { return type; }; @@ -200,6 +201,10 @@ public: const int getCommitElem() const { return commit_elements; }; const int getCancelElem() const { return cancel_elements; }; + // ITE + const uint8_t getITE_EL() const { return ite_pkt.el; }; + const uint64_t getITE_value() const { return ite_pkt.value; }; + // packet type const bool isBadPacket() const; @@ -207,6 +212,8 @@ public: virtual void toString(std::string &str) const; virtual void toStringFmt(const uint32_t fmtFlags, std::string &str) const; + void setProtocolVersion(const uint8_t version) { protocol_version = version; }; + private: const char *packetTypeName(const ocsd_etmv4_i_pkt_type type, const char **pDesc) const; void contextStr(std::string &ctxtStr) const; @@ -217,6 +224,8 @@ private: void push_vaddr(); void pop_vaddr_idx(const uint8_t idx); + const bool isETE() const { return (protocol_version & 0xF0) == 0x50; }; + Etmv4PktAddrStack m_addr_stack; }; @@ -412,7 +421,7 @@ inline void EtmV4ITrcPacket::setCondRF4(const uint8_t token) cond_result.f2f4_token = token; } -inline void EtmV4ITrcPacket::setContextInfo(const bool update, const uint8_t EL, const uint8_t NS, const uint8_t SF) +inline void EtmV4ITrcPacket::setContextInfo(const bool update, const uint8_t EL, const uint8_t NS, const uint8_t SF, const uint8_t NSE) { pkt_valid.bits.context_valid = 1; if(update) @@ -421,6 +430,7 @@ inline void EtmV4ITrcPacket::setContextInfo(const bool update, const uint8_t EL, context.EL = EL; context.NS = NS; context.SF = SF; + context.NSE = NSE; } } @@ -534,6 +544,12 @@ inline void EtmV4ITrcPacket::pop_vaddr_idx(const uint8_t idx) m_addr_stack.get_idx(idx, v_addr, v_addr_ISA); } +inline void EtmV4ITrcPacket::setITE(const uint8_t el, const uint64_t value) +{ + ite_pkt.el = el; + ite_pkt.value = value; +} + /** @}*/ #endif // ARM_TRC_PKT_ELEM_ETMV4I_H_INCLUDED diff --git a/decoder/include/opencsd/etmv4/trc_pkt_proc_etmv4i.h b/decoder/include/opencsd/etmv4/trc_pkt_proc_etmv4i.h index abc322654b8d..58c0d78806c3 100644 --- a/decoder/include/opencsd/etmv4/trc_pkt_proc_etmv4i.h +++ b/decoder/include/opencsd/etmv4/trc_pkt_proc_etmv4i.h @@ -117,6 +117,7 @@ private: #define TINFO_KEY_SECT 0x02 #define TINFO_SPEC_SECT 0x04 #define TINFO_CYCT_SECT 0x08 + #define TINFO_WNDW_SECT 0x10 #define TINFO_CTRL 0x20 #define TINFO_ALL_SECT 0x1F #define TINFO_ALL 0x3F @@ -178,9 +179,10 @@ private: void iPktQ(const uint8_t lastByte); void iAtom(const uint8_t lastByte); void iPktInvalidCfg(const uint8_t lastByte); // packet invalid in current config. + void iPktITE(const uint8_t lastByte); unsigned extractContField(const std::vector &buffer, const unsigned st_idx, uint32_t &value, const unsigned byte_limit = 5); - unsigned extractContField64(const std::vector &buffer, const unsigned st_idx, uint64_t &value, const unsigned byte_limit = 9); + unsigned extractTSField64(const std::vector &buffer, const unsigned st_idx, uint64_t &value); unsigned extractCondResult(const std::vector &buffer, const unsigned st_idx, uint32_t& key, uint8_t &result); void extractAndSetContextInfo(const std::vector &buffer, const int st_idx); int extract64BitLongAddr(const std::vector &buffer, const int st_idx, const uint8_t IS, uint64_t &value); diff --git a/decoder/include/opencsd/etmv4/trc_pkt_types_etmv4.h b/decoder/include/opencsd/etmv4/trc_pkt_types_etmv4.h index 7e98050c77c4..2a03b088c043 100644 --- a/decoder/include/opencsd/etmv4/trc_pkt_types_etmv4.h +++ b/decoder/include/opencsd/etmv4/trc_pkt_types_etmv4.h @@ -1,8 +1,8 @@ /* * \file trc_pkt_types_etmv4.h - * \brief OpenCSD : ETMv4 packet info + * \brief OpenCSD : ETMv4 / ETE packet info * - * \copyright Copyright (c) 2015,2019 ARM Limited. All Rights Reserved. + * \copyright Copyright (c) 2015,2019,2022 ARM Limited. All Rights Reserved. */ @@ -41,7 +41,7 @@ /** @addtogroup trc_pkts @{*/ -/** @name ETMv4 Packet Types +/** @name ETMv4 Packet Types, ETE packet Types @{*/ /** I stream packets. */ @@ -70,9 +70,12 @@ typedef enum _ocsd_etmv4_i_pkt_type ETM4_PKT_I_FUNC_RET = 0x05, /*!< b00000101 (V8M only) */ // Exceptions ETM4_PKT_I_EXCEPT = 0x06, /*!< b00000110 */ - ETM4_PKT_I_EXCEPT_RTN = 0x07, /*!< b00000111 */ + ETM4_PKT_I_EXCEPT_RTN = 0x07, /*!< b00000111 (ETE invalid) */ - /* unused encodings 0x08-0xB b00001000 to b00001011 */ + /* unused encoding 0x08 b00001000 */ + ETE_PKT_I_ITE = 0x09, /*! b00001001 (ETE only) */ + ETE_PKT_I_TRANS_ST = 0x0A, /*! b00001010 (ETE only) */ + ETE_PKT_I_TRANS_COMMIT = 0x0B, /*! b00001011 (ETE only) */ /* cycle count packets */ ETM4_PKT_I_CCNT_F2 = 0x0C, /*!< b0000110x */ @@ -91,7 +94,7 @@ typedef enum _ocsd_etmv4_i_pkt_type ETM4_PKT_I_CANCEL_F2 = 0x34, /*!< b001101xx */ ETM4_PKT_I_CANCEL_F3 = 0x38, /*!< b00111xxx */ - /* conditional instruction tracing */ + /* conditional instruction tracing - (reserved encodings ETE) */ ETM4_PKT_I_COND_I_F2 = 0x40, /*!< b01000000 - b01000010 */ ETM4_PKT_I_COND_FLUSH = 0x43, /*!< b01000011 */ ETM4_PKT_I_COND_RES_F4 = 0x44, /*!< b0100010x, b01000110 */ @@ -116,7 +119,8 @@ typedef enum _ocsd_etmv4_i_pkt_type ETM4_PKT_I_ADDR_CTXT_L_64IS0 = 0x85, /*!< b10000101 */ ETM4_PKT_I_ADDR_CTXT_L_64IS1, /*!< b10000110 */ /* unused encoding 0x87 b10000111 */ - /* unused encodings 0x88-0x8F b10001xxx */ + ETE_PKT_I_TS_MARKER = 0x88, /*!< b10001000 */ + /* unused encodings 0x89-0x8F b10001001 to b10001111 */ ETM4_PKT_I_ADDR_MATCH = 0x90, /*!< b10010000 to b10010010 0x92 */ /* unused encodings 0x93-0x94 b10010011 to b10010010 */ ETM4_PKT_I_ADDR_S_IS0 = 0x95, /*!< b10010101 */ @@ -132,7 +136,15 @@ typedef enum _ocsd_etmv4_i_pkt_type /* Q packets */ ETM4_PKT_I_Q = 0xA0, /*!< b1010xxxx */ - /* unused encodings 0xB0-0xBF b1011xxxx */ + /* ETE source address packets, unused ETMv4 */ + ETE_PKT_I_SRC_ADDR_MATCH = 0xB0, /*!< b101100xx */ + ETE_PKT_I_SRC_ADDR_S_IS0 = 0xB4, /*!< b10110100 */ + ETE_PKT_I_SRC_ADDR_S_IS1 = 0xB5, /*!< b10110101 */ + ETE_PKT_I_SRC_ADDR_L_32IS0 = 0xB6, /*!< b10110110 */ + ETE_PKT_I_SRC_ADDR_L_32IS1 = 0xB7, /*!< b10110111 */ + ETE_PKT_I_SRC_ADDR_L_64IS0 = 0xB8, /*!< b10111000 */ + ETE_PKT_I_SRC_ADDR_L_64IS1 = 0xB9, /*!< b10111001 */ + /* unused encodings 0xBA-0xBF b10111010 - b10111111 */ /* Atom packets */ ETM4_PKT_I_ATOM_F6 = 0xC0, /*!< b11000000 - b11010100 0xC0 - 0xD4, b11100000 - b11110100 0xE0 - 0xF4 */ @@ -147,15 +159,20 @@ typedef enum _ocsd_etmv4_i_pkt_type ETM4_PKT_I_DISCARD = 0x103, //!< b00000011 ETM4_PKT_I_OVERFLOW = 0x105, //!< b00000101 + // ETE extended types + ETE_PKT_I_PE_RESET = 0x400, // base type is exception packet. + ETE_PKT_I_TRANS_FAIL = 0x401, // base type is exception packet. + } ocsd_etmv4_i_pkt_type; typedef union _etmv4_trace_info_t { uint32_t val; //!< trace info full value. struct { uint32_t cc_enabled:1; //!< 1 if cycle count enabled - uint32_t cond_enabled:3; //!< conditional trace enabeld type + uint32_t cond_enabled:3; //!< conditional trace enabled type. uint32_t p0_load:1; //!< 1 if tracing with P0 load elements (for data trace) uint32_t p0_store:1; //!< 1 if tracing with P0 store elements (for data trace) + uint32_t in_trans_state:1; //!< 1 if starting trace when in a transactional state (ETE trace). } bits; //!< bitfields for trace info value. } etmv4_trace_info_t; @@ -167,6 +184,7 @@ typedef struct _etmv4_context_t { uint32_t updated:1; //!< updated this context packet (otherwise same as last time) uint32_t updated_c:1; //!< updated CtxtID uint32_t updated_v:1; //!< updated VMID + uint32_t NSE:1; //!< PE FEAT_RME: root / realm indicator }; uint32_t ctxtID; //!< Current ctxtID uint32_t VMID; //!< current VMID @@ -256,6 +274,11 @@ typedef struct _ocsd_etmv4_i_pkt }; } Q_pkt; + struct { + uint8_t el; + uint64_t value; + } ite_pkt; + //! valid bits for packet elements (addresses have their own valid bits). union { uint32_t val; @@ -277,6 +300,9 @@ typedef struct _ocsd_etmv4_i_pkt ocsd_etmv4_i_pkt_type err_type; uint8_t err_hdr_val; + // protocol version - validity of ETE specific fields 0xMm == v Major.minor + uint8_t protocol_version; + } ocsd_etmv4_i_pkt; @@ -359,6 +385,9 @@ typedef struct _ocsd_etmv4_cfg ocsd_core_profile_t core_prof; /**< Core Profile */ } ocsd_etmv4_cfg; +#define ETE_ARCH_VERSION 0x5 + +#define ETE_OPFLG_PKTDEC_SRCADDR_N_ATOMS 0x00010000 /**< Split source address output ranges for N-atoms */ /** @}*/ /** @}*/ diff --git a/decoder/include/opencsd/ocsd_if_types.h b/decoder/include/opencsd/ocsd_if_types.h index 23087ee694b1..f5ff6ac6c530 100644 --- a/decoder/include/opencsd/ocsd_if_types.h +++ b/decoder/include/opencsd/ocsd_if_types.h @@ -278,11 +278,13 @@ typedef enum _ocsd_arch_version { ARCH_V7 = 0x0700, /**< V7 architecture */ ARCH_V8 = 0x0800, /**< V8 architecture */ ARCH_V8r3 = 0x0803, /**< V8.3 architecture */ + ARCH_AA64 = 0x0864, /**< Min v8r3 plus additional AA64 PE features */ + ARCH_V8_max = ARCH_AA64, } ocsd_arch_version_t; // macros for arch version comparisons. -#define OCSD_IS_V8_ARCH(arch) ((arch >= ARCH_V8) && (arch <= ARCH_V8r3)) -#define OCSD_MIN_V8_ARCH(arch) (arch >= ARCH_V8) +#define OCSD_IS_V8_ARCH(arch) ((arch >= ARCH_V8) && (arch <= ARCH_V8_max)) +#define OCSD_IS_ARCH_MINVER(arch, min_arch) (arch >= min_arch) /** Core Profile */ typedef enum _ocsd_core_profile { @@ -336,8 +338,10 @@ typedef enum _ocsd_isa */ typedef enum _ocsd_sec_level { - ocsd_sec_secure, /**< Core is in secure state */ - ocsd_sec_nonsecure /**< Core is in non-secure state */ + ocsd_sec_secure, /**< Core is in secure state */ + ocsd_sec_nonsecure, /**< Core is in non-secure state */ + ocsd_sec_root, /**< PE FEAT_RME: Core is in root state. */ + ocsd_sec_realm, /**< PE FEAT_RME: Core is in realm state. */ } ocsd_sec_level ; /** Exception level type @@ -352,7 +356,7 @@ typedef enum _ocsd_ex_level } ocsd_ex_level; -/** instruction types - significant for waypoint calculaitons */ +/** instruction types - significant for waypoint calculations */ typedef enum _ocsd_instr_type { OCSD_INSTR_OTHER, /**< Other instruction - not significant for waypoints. */ OCSD_INSTR_BR, /**< Immediate Branch instruction */ @@ -360,6 +364,7 @@ typedef enum _ocsd_instr_type { OCSD_INSTR_ISB, /**< Barrier : ISB instruction */ OCSD_INSTR_DSB_DMB, /**< Barrier : DSB or DMB instruction */ OCSD_INSTR_WFI_WFE, /**< WFI or WFE traced as direct branch */ + OCSD_INSTR_TSTART, /**< PE Arch feature FEAT_TME - TSTART instruction */ } ocsd_instr_type; /** instruction sub types - addiitonal information passed to the output packets @@ -521,10 +526,11 @@ typedef struct _ocsd_file_mem_region { (common flags share bitfield with pkt processor common flags and create flags) @{*/ -#define OCSD_OPFLG_PKTDEC_ERROR_BAD_PKTS 0x00000100 /**< throw error on bad packets input (default is to unsync and wait) */ +#define OCSD_OPFLG_PKTDEC_ERROR_BAD_PKTS 0x00000100 /**< throw error on bad packets input (default is to warn) */ +#define OCSD_OPFLG_PKTDEC_HALT_BAD_PKTS 0x00000200 /**< halt decoder on bad packets (default is to log error and continue by resetting decoder and wait for sync */ /** mask to combine all common packet processor operational control flags */ -#define OCSD_OPFLG_PKTDEC_COMMON (OCSD_OPFLG_PKTDEC_ERROR_BAD_PKTS) +#define OCSD_OPFLG_PKTDEC_COMMON (OCSD_OPFLG_PKTDEC_ERROR_BAD_PKTS | OCSD_OPFLG_PKTDEC_HALT_BAD_PKTS) /** @}*/ @@ -547,6 +553,7 @@ typedef struct _ocsd_file_mem_region { #define OCSD_BUILTIN_DCD_ETMV4I "ETMV4I" /**< ETMv4 instruction decoder */ #define OCSD_BUILTIN_DCD_ETMV4D "ETMV4D" /**< ETMv4 data decoder */ #define OCSD_BUILTIN_DCD_PTM "PTM" /**< PTM decoder */ +#define OCSD_BUILTIN_DCD_ETE "ETE" /**< ETE decoder */ /*! Trace Protocol Builtin Types + extern */ @@ -559,6 +566,7 @@ typedef enum _ocsd_trace_protocol_t { OCSD_PROTOCOL_ETMV4D, /**< ETMV4 data trace protocol decoder. */ OCSD_PROTOCOL_PTM, /**< PTM program flow instruction trace protocol decoder. */ OCSD_PROTOCOL_STM, /**< STM system trace protocol decoder. */ + OCSD_PROTOCOL_ETE, /**< ETE trace protocol decoder */ /* others to be added here */ OCSD_PROTOCOL_BUILTIN_END, /**< Invalid protocol - built-in protocol types end marker */ @@ -627,6 +635,56 @@ typedef struct _ocsd_swt_info { /** @}*/ +/** @name Demux Statistics + + Contains statistics for the CoreSight frame demultiplexor. + + Counts total bytes sent to decoders registered against a trace ID, bytes in the input stream that are + associated with a trace ID that has no registered decoder, and frame bytes that are not trace data, but + are used to decode the frames - ID bytes, sync bytes etc. +@{*/ + +typedef struct _ocsd_demux_stats { + uint64_t valid_id_bytes; /**< number of bytes associated with an ID that has a registered decoder */ + uint64_t no_id_bytes; /**< number of bytes associated with an ID that has no decoder */ + uint64_t reserved_id_bytes; /**< number of bytes associated with reserved IDs */ + uint64_t unknown_id_bytes; /**< bytes processed before ID seen in input frames */ + uint64_t frame_bytes; /**< number of non-data bytes used for frame de-mux - ID bytes, sync etc */ +} ocsd_demux_stats_t; + +/** @}*/ + +/** @name Decode statistics + + Contains statistics for bytes decoded by the packet decoder, if statistics are supported. + + Stats block instantiated in the base class - derived protocol specific decoder must initialise and + use as required. + + The single channel block contains the stats for the requested channel via the API call. + + The global demux block contains the totals for all channels and non-data bytes used in CoreSight + frame demux. This block will show identical data for every requested channel via the API. + +@{*/ + +typedef struct _ocsd_decode_stats { + uint32_t version; /**< library version number */ + uint16_t revision; /**< revision number - defines the structure version for the stats. */ + /* single channel block */ + uint64_t channel_total; /**< total bytes processed for this channel */ + uint64_t channel_unsynced; /**< number of unsynced bytes processed on this channel */ + uint32_t bad_header_errs; /**< number of bad packet header errors */ + uint32_t bad_sequence_errs; /**< number of bad packet sequence errors */ + + ocsd_demux_stats_t demux; /**< global demux stats block */ +} ocsd_decode_stats_t; + +#define OCSD_STATS_REVISION 0x1 + +/** @}*/ + + /** @}*/ #endif // ARM_OCSD_IF_TYPES_H_INCLUDED diff --git a/decoder/include/opencsd/ocsd_if_version.h b/decoder/include/opencsd/ocsd_if_version.h index 38baa02e8b48..41033f0675ed 100644 --- a/decoder/include/opencsd/ocsd_if_version.h +++ b/decoder/include/opencsd/ocsd_if_version.h @@ -42,9 +42,9 @@ /** @name Library Versioning @{*/ -#define OCSD_VER_MAJOR 0x0 /**< Library Major Version */ -#define OCSD_VER_MINOR 0xE /**< Library Minor Version */ -#define OCSD_VER_PATCH 0x2 /**< Library Patch Version */ +#define OCSD_VER_MAJOR 0x1 /**< Library Major Version */ +#define OCSD_VER_MINOR 0x4 /**< Library Minor Version */ +#define OCSD_VER_PATCH 0x0 /**< Library Patch Version */ /** Library version number - MMMMnnpp format. MMMM = major version, @@ -53,7 +53,7 @@ */ #define OCSD_VER_NUM ((OCSD_VER_MAJOR << 16) | (OCSD_VER_MINOR << 8) | OCSD_VER_PATCH) -#define OCSD_VER_STRING "0.14.2" /**< Library Version string */ +#define OCSD_VER_STRING "1.4.0" /**< Library Version string */ #define OCSD_LIB_NAME "OpenCSD Library" /**< Library name string */ #define OCSD_LIB_SHORT_NAME "OCSD" /**< Library Short name string */ /** @}*/ diff --git a/decoder/include/opencsd/stm/trc_pkt_proc_stm.h b/decoder/include/opencsd/stm/trc_pkt_proc_stm.h index 909ac0cb0566..bc4391bfebfb 100644 --- a/decoder/include/opencsd/stm/trc_pkt_proc_stm.h +++ b/decoder/include/opencsd/stm/trc_pkt_proc_stm.h @@ -239,7 +239,8 @@ inline void TrcPktProcStm::checkSyncNibble() if((m_nibble == 0) && (m_num_F_nibbles >= 21)) { - m_is_sync = true; //this nibble marks a sync sequence - keep the F nibble count + m_is_sync = true; //this nibble marks a sync sequence + m_num_F_nibbles = 21; // set the F nibble count - lose any extra as unsynced data. } else { diff --git a/decoder/include/opencsd/trc_gen_elem_types.h b/decoder/include/opencsd/trc_gen_elem_types.h index 1a285a064b63..99194d118438 100644 --- a/decoder/include/opencsd/trc_gen_elem_types.h +++ b/decoder/include/opencsd/trc_gen_elem_types.h @@ -60,7 +60,10 @@ typedef enum _ocsd_gen_trc_elem_t OCSD_GEN_TRC_ELEM_TIMESTAMP, /*!< Timestamp - preceding elements happeded before this time. */ OCSD_GEN_TRC_ELEM_CYCLE_COUNT, /*!< Cycle count - cycles since last cycle count value - associated with a preceding instruction range. */ OCSD_GEN_TRC_ELEM_EVENT, /*!< Event - trigger or numbered event */ - OCSD_GEN_TRC_ELEM_SWTRACE, /*!< Software trace packet - may contain data payload. */ + OCSD_GEN_TRC_ELEM_SWTRACE, /*!< Software trace packet - may contain data payload. STM / ITM hardware trace with channel protocol */ + OCSD_GEN_TRC_ELEM_SYNC_MARKER, /*!< Synchronisation marker - marks position in stream of an element that is output later. */ + OCSD_GEN_TRC_ELEM_MEMTRANS, /*!< Trace indication of transactional memory operations. */ + OCSD_GEN_TRC_ELEM_INSTRUMENTATION, /*!< PE instrumentation trace - PE generated SW trace, application dependent protocol. */ OCSD_GEN_TRC_ELEM_CUSTOM, /*!< Fully custom packet type - used by none-ARM architecture decoders */ } ocsd_gen_trc_elem_t; @@ -86,6 +89,27 @@ typedef enum _unsync_info_t { UNSYNC_EOT, /**< end of trace - no additional info */ } unsync_info_t; +typedef enum _trace_sync_marker_t { + ELEM_MARKER_TS, /**< Marker for timestamp element */ +} trace_sync_marker_t; + +typedef struct _trace_marker_payload_t { + trace_sync_marker_t type; /**< type of sync marker */ + uint32_t value; /**< sync marker value - usage depends on type */ +} trace_marker_payload_t; + +typedef enum _memtrans_t { + OCSD_MEM_TRANS_TRACE_INIT,/**< Trace started while PE in transactional state */ + OCSD_MEM_TRANS_START, /**< Trace after this packet is part of a transactional memory sequence */ + OCSD_MEM_TRANS_COMMIT, /**< Transactional memory sequence valid. */ + OCSD_MEM_TRANS_FAIL, /**< Transactional memory sequence failed - operations since start of transaction have been unwound. */ +} trace_memtrans_t; + +typedef struct _sw_ite_t { + uint8_t el; /**< exception level for PE sw instrumentation instruction */ + uint64_t value; /**< payload for PE sw instrumentation instruction */ +} trace_sw_ite_t; + typedef struct _ocsd_generic_trace_elem { ocsd_gen_trc_elem_t elem_type; /**< Element type - remaining data interpreted according to this value */ ocsd_isa isa; /**< instruction set for executed instructions */ @@ -122,6 +146,9 @@ typedef struct _ocsd_generic_trace_elem { ocsd_swt_info_t sw_trace_info; /**< software trace packet info */ uint32_t num_instr_range; /**< number of instructions covered by range packet (for T32 this cannot be calculated from en-st/i_size) */ unsync_info_t unsync_eot_info; /**< additional information for unsync / end-of-trace packets. */ + trace_marker_payload_t sync_marker; /**< marker element - sync later element to position in stream */ + trace_memtrans_t mem_trans; /**< memory transaction packet - transaction event */ + trace_sw_ite_t sw_ite; /**< PE sw instrumentation using FEAT_ITE */ }; const void *ptr_extended_data; /**< pointer to extended data buffer (data trace, sw trace payload) / custom structure */ diff --git a/decoder/source/c_api/ocsd_c_api.cpp b/decoder/source/c_api/ocsd_c_api.cpp index 4824c427e3d1..750c847e78c8 100644 --- a/decoder/source/c_api/ocsd_c_api.cpp +++ b/decoder/source/c_api/ocsd_c_api.cpp @@ -234,8 +234,24 @@ OCSD_C_API ocsd_err_t ocsd_dt_attach_packet_callback( const dcd_tree_handle_t h return err; } -/*** Decode tree set element output */ +OCSD_C_API ocsd_err_t ocsd_dt_get_decode_stats(const dcd_tree_handle_t handle, + const unsigned char CSID, + ocsd_decode_stats_t **p_stats_block) +{ + DecodeTree *pDT = static_cast(handle); + + return pDT->getDecoderStats(CSID, p_stats_block); +} +OCSD_C_API ocsd_err_t ocsd_dt_reset_decode_stats(const dcd_tree_handle_t handle, + const unsigned char CSID) +{ + DecodeTree *pDT = static_cast(handle); + + return pDT->resetDecoderStats(CSID); +} + +/*** Decode tree set element output */ OCSD_C_API ocsd_err_t ocsd_dt_set_gen_elem_outfn(const dcd_tree_handle_t handle, FnTraceElemIn pFn, const void *p_context) { @@ -470,6 +486,39 @@ OCSD_C_API ocsd_err_t ocsd_dt_set_pkt_protocol_printer(const dcd_tree_handle_t h return err; } +OCSD_C_API void ocsd_err_str(const ocsd_err_t err, char *buffer, const int buffer_size) +{ + std::string err_str; + err_str = ocsdError::getErrorString(ocsdError(OCSD_ERR_SEV_ERROR, err)); + strncpy(buffer, err_str.c_str(), buffer_size - 1); + buffer[buffer_size - 1] = 0; +} + +OCSD_C_API ocsd_err_t ocsd_get_last_err(ocsd_trc_index_t *index, uint8_t *chan_id, char *message, const int message_len) +{ + ocsdError *p_err; + ocsd_err_t err = OCSD_OK; + std::string err_str; + + p_err = DecodeTree::getDefaultErrorLogger()->GetLastError(); + if (p_err) + { + *index = p_err->getErrorIndex(); + *chan_id = p_err->getErrorChanID(); + err_str = p_err->getErrorString(ocsdError(p_err)); + strncpy(message, err_str.c_str(), message_len - 1); + message[message_len - 1] = 0; + err = p_err->getErrorCode(); + } + else + { + message[0] = 0; + *index = OCSD_BAD_TRC_INDEX; + *chan_id = OCSD_BAD_CS_SRC_ID; + } + return err; +} + /*******************************************************************************/ /* C API local fns */ /*******************************************************************************/ diff --git a/decoder/source/ete/trc_cmp_cfg_ete.cpp b/decoder/source/ete/trc_cmp_cfg_ete.cpp new file mode 100644 index 000000000000..474cb2f7914a --- /dev/null +++ b/decoder/source/ete/trc_cmp_cfg_ete.cpp @@ -0,0 +1,98 @@ +/* +* \file trc_cmp_cfg_ete.cpp +* \brief OpenCSD : ETE config class +* +* \copyright Copyright (c) 2019, ARM Limited. All Rights Reserved. +*/ + +/* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#include "opencsd/ete/trc_cmp_cfg_ete.h" + +ETEConfig::ETEConfig() : EtmV4Config() +{ + m_ete_cfg.reg_idr0 = 0x28000EA1; + m_ete_cfg.reg_idr1 = 0x4100FFF3; + m_ete_cfg.reg_idr2 = 0x00000488; + m_ete_cfg.reg_idr8 = 0; + m_ete_cfg.reg_configr = 0xC1; + m_ete_cfg.reg_traceidr = 0; + m_ete_cfg.arch_ver = ARCH_AA64; + m_ete_cfg.core_prof = profile_CortexA; + m_ete_cfg.reg_devarch = 0x47705A13; + copyV4(); +} + +ETEConfig::ETEConfig(const ocsd_ete_cfg *cfg_regs) : EtmV4Config() +{ + m_ete_cfg = *cfg_regs; + copyV4(); +} + +ETEConfig::~ETEConfig() +{ + +} + +//! copy assignment operator for base structure into class. +ETEConfig & ETEConfig::operator=(const ocsd_ete_cfg *p_cfg) +{ + m_ete_cfg = *p_cfg; + copyV4(); + return *this; +} + +//! cast operator returning struct const reference +//operator const ocsd_ete_cfg &() const { return m_ete_cfg; }; +//! cast operator returning struct const pointer +//operator const ocsd_ete_cfg *() const { return &m_ete_cfg; }; + +// ete superset of etmv4 - move info to underlying structure. +void ETEConfig::copyV4() +{ + // copy over 1:1 regs + m_cfg.reg_idr0 = m_ete_cfg.reg_idr0; + m_cfg.reg_idr1 = m_ete_cfg.reg_idr1; + m_cfg.reg_idr2 = m_ete_cfg.reg_idr2; + m_cfg.reg_idr8 = m_ete_cfg.reg_idr8; + m_cfg.reg_idr9 = 0; + m_cfg.reg_idr10 = 0; + m_cfg.reg_idr11 = 0; + m_cfg.reg_idr12 = 0; + m_cfg.reg_idr13 = 0; + m_cfg.reg_configr = m_ete_cfg.reg_configr; + m_cfg.reg_traceidr = m_ete_cfg.reg_traceidr; + m_cfg.core_prof = m_ete_cfg.core_prof; + m_cfg.arch_ver = m_ete_cfg.arch_ver; + + // override major / minor version as part of devarch + m_MajVer = (uint8_t)((m_ete_cfg.reg_devarch & 0xF000) >> 12); + m_MinVer = (uint8_t)((m_ete_cfg.reg_devarch & 0xF0000) >> 16); +} + +/* End of File trc_cmp_cfg_ete.cpp */ diff --git a/decoder/source/etmv3/trc_pkt_elem_etmv3.cpp b/decoder/source/etmv3/trc_pkt_elem_etmv3.cpp index f1e411f72423..74034c3c3e8f 100644 --- a/decoder/source/etmv3/trc_pkt_elem_etmv3.cpp +++ b/decoder/source/etmv3/trc_pkt_elem_etmv3.cpp @@ -659,7 +659,7 @@ void EtmV3TrcPacket::getExcepStr(std::string &excepStr) const "IRQ4", "IRQ5", "IRQ6", "IRQ7", "IRQ0","usage Fault","NMI","SVC", "DebugMonitor", "Mem Manage","PendSV","SysTick", - "Reserved","PE Reset","Reserved","HardFault" + "Reserved","PE Reset","Reserved","HardFault", "Reserved","BusFault","Reserved","Reserved" }; diff --git a/decoder/source/etmv4/trc_cmp_cfg_etmv4.cpp b/decoder/source/etmv4/trc_cmp_cfg_etmv4.cpp index 9f5b37396b46..6f8bf790d293 100644 --- a/decoder/source/etmv4/trc_cmp_cfg_etmv4.cpp +++ b/decoder/source/etmv4/trc_cmp_cfg_etmv4.cpp @@ -98,7 +98,7 @@ void EtmV4Config::CalcVMIDSize() uint32_t vmidszF = (m_cfg.reg_idr2 >> 10) & 0x1F; if(vmidszF == 1) m_VMIDSize = 8; - else if(MinVersion() > 0) + else if(FullVersion() > 0x40) { if(vmidszF == 2) m_VMIDSize = 16; diff --git a/decoder/source/etmv4/trc_etmv4_stack_elem.cpp b/decoder/source/etmv4/trc_etmv4_stack_elem.cpp index 8e9ba9ac43ca..a5d889413eb2 100644 --- a/decoder/source/etmv4/trc_etmv4_stack_elem.cpp +++ b/decoder/source/etmv4/trc_etmv4_stack_elem.cpp @@ -128,6 +128,40 @@ TrcStackQElem *EtmV4P0Stack::createQElem(const ocsd_etmv4_i_pkt_type root_pkt, c return pElem; } +TrcStackElemMarker *EtmV4P0Stack::createMarkerElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const trace_marker_payload_t &marker) +{ + TrcStackElemMarker *pElem = new (std::nothrow) TrcStackElemMarker(root_pkt, root_index); + if (pElem) + { + pElem->setMarker(marker); + push_front(pElem); + } + return pElem; +} + +TrcStackElemAddr *EtmV4P0Stack::createSrcAddrElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_addr_val_t &addr_val) +{ + TrcStackElemAddr *pElem = new (std::nothrow) TrcStackElemAddr(root_pkt, root_index, true); + if (pElem) + { + pElem->setAddr(addr_val); + push_front(pElem); + } + return pElem; +} + +TrcStackElemITE *EtmV4P0Stack::createITEElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const trace_sw_ite_t &ite) +{ + TrcStackElemITE *pElem = new (std::nothrow) TrcStackElemITE(root_pkt, root_index); + if (pElem) + { + pElem->setITE(ite); + push_front(pElem); + } + return pElem; +} + + // iteration functions void EtmV4P0Stack::from_front_init() { @@ -150,6 +184,10 @@ void EtmV4P0Stack::erase_curr_from_front() erase_iter = m_iter; erase_iter--; m_P0_stack.erase(erase_iter); + + // explicitly delete the item here as the caller can no longer reference it. + // fixes memory leak from github issue #52 + delete *erase_iter; } diff --git a/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp b/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp index 393046ba23d1..89c45052868c 100644 --- a/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp +++ b/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp @@ -39,7 +39,8 @@ #define DCD_NAME "DCD_ETMV4" -static const uint32_t ETMV4_SUPPORTED_DECODE_OP_FLAGS = OCSD_OPFLG_PKTDEC_COMMON; +static const uint32_t ETMV4_SUPPORTED_DECODE_OP_FLAGS = OCSD_OPFLG_PKTDEC_COMMON | + ETE_OPFLG_PKTDEC_SRCADDR_N_ATOMS; TrcPktDecodeEtmV4I::TrcPktDecodeEtmV4I() : TrcPktDecodeBase(DCD_NAME) @@ -101,6 +102,14 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processPacket() m_curr_state = DECODE_PKTS; m_return_stack.flush(); } + /* ETE spec allows early event packets. */ + else if ((m_config->MajVersion() >= 0x5) && + (m_curr_packet_in->getType() == ETM4_PKT_I_EVENT)) + { + err = decodePacket(); + if (err) + resp = OCSD_RESP_FATAL_INVALID_DATA; + } bPktDone = true; break; @@ -261,6 +270,7 @@ void TrcPktDecodeEtmV4I::resetDecoder() m_out_elem.resetElemStack(); m_last_IS = 0; clearElemRes(); + m_ete_first_ts_marker = false; // elements associated with data trace #ifdef DATA_TRACE_SUPPORTED @@ -358,7 +368,25 @@ ocsd_err_t TrcPktDecodeEtmV4I::decodePacket() if (m_P0_stack.createAddrElem(m_curr_packet_in->getType(), m_index_curr_pkt, addr) == 0) bAllocErr = true; - is_addr = true; + is_addr = true; // may be waiting for target address from indirect branch + } + break; + + case ETE_PKT_I_SRC_ADDR_MATCH: + case ETE_PKT_I_SRC_ADDR_S_IS0: + case ETE_PKT_I_SRC_ADDR_S_IS1: + case ETE_PKT_I_SRC_ADDR_L_32IS0: + case ETE_PKT_I_SRC_ADDR_L_32IS1: + case ETE_PKT_I_SRC_ADDR_L_64IS0: + case ETE_PKT_I_SRC_ADDR_L_64IS1: + { + etmv4_addr_val_t addr; + + addr.val = m_curr_packet_in->getAddrVal(); + addr.isa = m_curr_packet_in->getAddrIS(); + if (m_P0_stack.createSrcAddrElem(m_curr_packet_in->getType(), m_index_curr_pkt, addr) == 0) + bAllocErr = true; + m_curr_spec_depth++; } break; @@ -438,16 +466,26 @@ ocsd_err_t TrcPktDecodeEtmV4I::decodePacket() } break; + case ETE_PKT_I_TS_MARKER: + { + trace_marker_payload_t marker; + marker.type = ELEM_MARKER_TS; + marker.value = 0; + if (m_P0_stack.createMarkerElem(m_curr_packet_in->getType(), m_index_curr_pkt, marker) == 0) + bAllocErr = true; + } + break; + case ETM4_PKT_I_BAD_SEQUENCE: - err = handleBadPacket("Bad byte sequence in packet."); + err = handleBadPacket("Bad byte sequence in packet.", m_index_curr_pkt); break; case ETM4_PKT_I_BAD_TRACEMODE: - err = handleBadPacket("Invalid packet type for trace mode."); + err = handleBadPacket("Invalid packet type for trace mode.", m_index_curr_pkt); break; case ETM4_PKT_I_RESERVED: - err = handleBadPacket("Reserved packet header"); + err = handleBadPacket("Reserved packet header", m_index_curr_pkt); break; // speculation @@ -502,8 +540,44 @@ ocsd_err_t TrcPktDecodeEtmV4I::decodePacket() } break; + /* transactional memory packets */ + case ETE_PKT_I_TRANS_ST: + { + if (m_P0_stack.createParamElemNoParam(P0_TRANS_START, m_config->commTransP0(), m_curr_packet_in->getType(), m_index_curr_pkt) == 0) + bAllocErr = true; + if (m_config->commTransP0()) + m_curr_spec_depth++; + } + break; + + case ETE_PKT_I_TRANS_COMMIT: + { + if (m_P0_stack.createParamElemNoParam(P0_TRANS_COMMIT, false, m_curr_packet_in->getType(), m_index_curr_pkt) == 0) + bAllocErr = true; + } + break; + + case ETE_PKT_I_TRANS_FAIL: + { + if (m_P0_stack.createParamElemNoParam(P0_TRANS_FAIL, false, m_curr_packet_in->getType(), m_index_curr_pkt) == 0) + bAllocErr = true; + } + break; + + /* PE Instrumentation packet */ + case ETE_PKT_I_ITE: + { + trace_sw_ite_t ite_pkt; + + ite_pkt.el = m_curr_packet_in->getITE_EL(); + ite_pkt.value = m_curr_packet_in->getITE_value(); + if (m_P0_stack.createITEElem(m_curr_packet_in->getType(), m_index_curr_pkt, ite_pkt) == 0) + bAllocErr = true; + } + break; + /*** presently unsupported packets ***/ - /* conditional instruction tracing */ + /* conditional instruction tracing */ case ETM4_PKT_I_COND_FLUSH: case ETM4_PKT_I_COND_I_F1: case ETM4_PKT_I_COND_I_F2: @@ -525,14 +599,16 @@ ocsd_err_t TrcPktDecodeEtmV4I::decodePacket() //resp = OCSD_RESP_FATAL_INVALID_DATA; #endif err = OCSD_ERR_UNSUPP_DECODE_PKT; - LogError(ocsdError(sev, err, "Data trace releated, unsupported packet type.")); + if (sev == OCSD_ERR_SEV_WARN) + LogError(ocsdError(sev, err, "Data trace related, unsupported packet type.")); + else + err = handlePacketSeqErr(err, m_index_curr_pkt, "Data trace related, unsupported packet type."); } break; default: // any other packet - bad packet error - err = OCSD_ERR_BAD_DECODE_PKT; - LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,"Unknown packet type.")); + err = handleBadPacket("Unknown packet type.", m_index_curr_pkt); break; } @@ -566,6 +642,9 @@ void TrcPktDecodeEtmV4I::doTraceInfoPacket() m_trace_info = m_curr_packet_in->getTraceInfo(); m_cc_threshold = m_curr_packet_in->getCCThreshold(); m_curr_spec_depth = m_curr_packet_in->getCurrSpecDepth(); + /* put a trans marker in stack if started in trans state */ + if (m_trace_info.bits.in_trans_state) + m_P0_stack.createParamElemNoParam(P0_TRANS_TRACE_INIT, false, m_curr_packet_in->getType(), m_index_curr_pkt); // elements associated with data trace #ifdef DATA_TRACE_SUPPORTED @@ -592,14 +671,18 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::resolveElements() if (m_elem_res.P0_commit) err = commitElements(); - if (!err && m_elem_res.P0_cancel) - err = cancelElements(); + // allow for early flush on context element + if (!m_elem_res.P0_commit) { - if (!err && m_elem_res.mispredict) - err = mispredictAtom(); - - if (!err && m_elem_res.discard) - err = discardElements(); + if (!err && m_elem_res.P0_cancel) + err = cancelElements(); + + if (!err && m_elem_res.mispredict) + err = mispredictAtom(); + + if (!err && m_elem_res.discard) + err = discardElements(); + } if (err != OCSD_OK) resp = OCSD_RESP_FATAL_INVALID_DATA; @@ -634,10 +717,11 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() int num_commit_req = m_elem_res.P0_commit; ocsd_trc_index_t err_idx = 0; TrcStackElem *pElem = 0; // stacked element pointer + bool contextFlush = false; err = m_out_elem.resetElemStack(); - while(m_elem_res.P0_commit && !err) + while(m_elem_res.P0_commit && !err && !contextFlush) { if (m_P0_stack.size() > 0) { @@ -646,7 +730,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() switch (pElem->getP0Type()) { - // indicates a trace restart - beginning of trace or discontinuiuty + // indicates a trace restart - beginning of trace or discontinuiuty case P0_TRC_ON: err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_TRACE_ON); if (!err) @@ -661,7 +745,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() { TrcStackElemAddr *pAddrElem = dynamic_cast(pElem); m_return_stack.clear_pop_pending(); // address removes the need to pop the indirect address target from the stack - if(pAddrElem) + if (pAddrElem) { SetInstrInfoInAddrISA(pAddrElem->getAddr().val, pAddrElem->getAddr().isa); m_need_addr = false; @@ -672,15 +756,24 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() case P0_CTXT: { TrcStackElemCtxt *pCtxtElem = dynamic_cast(pElem); - if(pCtxtElem) + if (pCtxtElem) { etmv4_context_t ctxt = pCtxtElem->getContext(); // check this is an updated context if(ctxt.updated) { err = m_out_elem.addElem(pElem->getRootIndex()); - if (!err) + if (!err) { updateContext(pCtxtElem, outElem()); + + // updated context - need to force this to be output to the client so correct memory + // context can be used. + contextFlush = true; + + // invalidate memory accessor cacheing - force next memory access out to client to + // ensure that the correct memory context is in play when decoding subsequent atoms. + invalidateMemAccCache(); + } } } } @@ -693,11 +786,15 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() err = processTS_CC_EventElem(pElem); break; + case P0_MARKER: + err = processMarkerElem(pElem); + break; + case P0_ATOM: { TrcStackElemAtom *pAtomElem = dynamic_cast(pElem); - if(pAtomElem) + if (pAtomElem) { while(!pAtomElem->isEmpty() && m_elem_res.P0_commit && !err) { @@ -709,13 +806,13 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() // if address and context do instruction trace follower. // otherwise skip atom and reduce committed elements - if(!m_need_ctxt && !m_need_addr) + if (!m_need_ctxt && !m_need_addr) { err = processAtom(atom); } m_elem_res.P0_commit--; // mark committed } - if(!pAtomElem->isEmpty()) + if (!pAtomElem->isEmpty()) bPopElem = false; // don't remove if still atoms to process. } } @@ -746,9 +843,27 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() m_elem_res.P0_commit--; break; + case P0_SRC_ADDR: + err = processSourceAddress(); + m_elem_res.P0_commit--; + break; + case P0_Q: err = processQElement(); m_elem_res.P0_commit--; + break; + + case P0_TRANS_START: + if (m_config->commTransP0()) + m_elem_res.P0_commit--; + case P0_TRANS_COMMIT: + case P0_TRANS_FAIL: + case P0_TRANS_TRACE_INIT: + err = processTransElem(pElem); + break; + + case P0_ITE: + err = processITEElem(pElem); break; } @@ -757,9 +872,8 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElements() } else { - // too few elements for commit operation - decode error. - err = OCSD_ERR_COMMIT_PKT_OVERRUN; - LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_COMMIT_PKT_OVERRUN,err_idx,m_CSID,"Not enough elements to commit")); + // too few elements for commit operation - decode error. + err = handlePacketSeqErr(OCSD_ERR_COMMIT_PKT_OVERRUN, err_idx, "Not enough elements to commit"); } } @@ -779,7 +893,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::returnStackPop() if (m_return_stack.overflow()) { err = OCSD_ERR_RET_STACK_OVERFLOW; - LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, "Trace Return Stack Overflow.")); + err = handlePacketSeqErr(err, OCSD_BAD_TRC_INDEX, "Trace Return Stack Overflow."); } else { @@ -824,6 +938,25 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElemOnEOT() case P0_CTXT: break; + // trans + // P0 trans - clear and stop, otherwise skip + case P0_TRANS_START: + if (m_config->commTransP0()) + m_P0_stack.delete_all(); + break; + + // non-speculative trans fail / commit - could appear at EoT after valid trace + // but without a subsequent P0 that would force output. + case P0_TRANS_FAIL: + case P0_TRANS_COMMIT: + if (m_max_spec_depth == 0 || m_curr_spec_depth == 0) + err = processTransElem(pElem); + break; + + // others - skip non P0 + case P0_TRANS_TRACE_INIT: + break; + // output case P0_EVENT: case P0_TS: @@ -831,6 +964,14 @@ ocsd_err_t TrcPktDecodeEtmV4I::commitElemOnEOT() case P0_TS_CC: err = processTS_CC_EventElem(pElem); break; + + case P0_MARKER: + err = processMarkerElem(pElem); + break; + + case P0_ITE: + err = processITEElem(pElem); + break; } m_P0_stack.delete_back(); } @@ -886,6 +1027,8 @@ ocsd_err_t TrcPktDecodeEtmV4I::cancelElements() case P0_TS: case P0_CC: case P0_TS_CC: + case P0_MARKER: + case P0_ITE: m_P0_stack.pop_front(false); temp.push_back(pElem); break; @@ -895,6 +1038,8 @@ ocsd_err_t TrcPktDecodeEtmV4I::cancelElements() break; } } + if (m_P0_stack.size() == 0) + P0StackDone = true; } } // may have some unseen elements @@ -908,21 +1053,23 @@ ocsd_err_t TrcPktDecodeEtmV4I::cancelElements() { // too few elements for commit operation - decode error. err = OCSD_ERR_COMMIT_PKT_OVERRUN; - LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, m_index_curr_pkt, m_CSID, "Not enough elements to cancel")); + err = handlePacketSeqErr(err, m_index_curr_pkt, "Not enough elements to cancel"); m_elem_res.P0_cancel = 0; break; } - - if (temp.size()) + } + + /* restore any saved elements that are unaffected by cancel. */ + if (temp.size()) + { + while (temp.size()) { - while (temp.size()) - { - pElem = temp.back(); - m_P0_stack.push_front(pElem); - temp.pop_back(false); - } + pElem = temp.back(); + m_P0_stack.push_front(pElem); + temp.pop_back(false); } } + m_curr_spec_depth -= num_cancel_req - m_elem_res.P0_cancel; return err; } @@ -964,7 +1111,8 @@ ocsd_err_t TrcPktDecodeEtmV4I::mispredictAtom() if (!bFoundAtom && !m_unseen_spec_elem) { err = OCSD_ERR_COMMIT_PKT_OVERRUN; - LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, m_index_curr_pkt, m_CSID, "Not found mispredict atom")); + err = handlePacketSeqErr(err, m_index_curr_pkt, "Not found mispredict atom"); + //LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, m_index_curr_pkt, m_CSID, "Not found mispredict atom")); } m_elem_res.mispredict = false; return err; @@ -980,7 +1128,12 @@ ocsd_err_t TrcPktDecodeEtmV4I::discardElements() while ((m_P0_stack.size() > 0) && !err) { pElem = m_P0_stack.back(); - err = processTS_CC_EventElem(pElem); + if (pElem->getP0Type() == P0_MARKER) + err = processMarkerElem(pElem); + else if (pElem->getP0Type() == P0_MARKER) + err = processITEElem(pElem); + else + err = processTS_CC_EventElem(pElem); m_P0_stack.delete_back(); } @@ -1002,6 +1155,8 @@ ocsd_err_t TrcPktDecodeEtmV4I::discardElements() ocsd_err_t TrcPktDecodeEtmV4I::processTS_CC_EventElem(TrcStackElem *pElem) { ocsd_err_t err = OCSD_OK; + // ignore ts for ETE if not seen first TS marker on systems that use this. + bool bPermitTS = !m_config->eteHasTSMarker() || m_ete_first_ts_marker; switch (pElem->getP0Type()) { @@ -1016,7 +1171,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::processTS_CC_EventElem(TrcStackElem *pElem) case P0_TS: { TrcStackElemParam *pParamElem = dynamic_cast(pElem); - if (pParamElem) + if (pParamElem && bPermitTS) err = addElemTS(pParamElem, false); } break; @@ -1032,7 +1187,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::processTS_CC_EventElem(TrcStackElem *pElem) case P0_TS_CC: { TrcStackElemParam *pParamElem = dynamic_cast(pElem); - if (pParamElem) + if (pParamElem && bPermitTS) err = addElemTS(pParamElem, true); } break; @@ -1041,6 +1196,46 @@ ocsd_err_t TrcPktDecodeEtmV4I::processTS_CC_EventElem(TrcStackElem *pElem) } +ocsd_err_t TrcPktDecodeEtmV4I::processMarkerElem(TrcStackElem *pElem) +{ + ocsd_err_t err = OCSD_OK; + TrcStackElemMarker *pMarkerElem = dynamic_cast(pElem); + + if (m_config->eteHasTSMarker() && (pMarkerElem->getMarker().type == ELEM_MARKER_TS)) + m_ete_first_ts_marker = true; + + if (!err) + { + err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_SYNC_MARKER); + if (!err) + m_out_elem.getCurrElem().setSyncMarker(pMarkerElem->getMarker()); + } + return err; +} + +ocsd_err_t TrcPktDecodeEtmV4I::processTransElem(TrcStackElem *pElem) +{ + ocsd_err_t err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_MEMTRANS); + if (!err) + { + outElem().setTransactionType((trace_memtrans_t)((int)OCSD_MEM_TRANS_FAIL - + ((int)P0_TRANS_FAIL - (int)pElem->getP0Type()))); + } + return err; +} + +ocsd_err_t TrcPktDecodeEtmV4I::processITEElem(TrcStackElem *pElem) +{ + ocsd_err_t err = OCSD_OK; + TrcStackElemITE *pITEElem = dynamic_cast(pElem); + + err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_INSTRUMENTATION); + if (!err) { + outElem().setITEInfo(pITEElem->getITE()); + } + return err; +} + ocsd_err_t TrcPktDecodeEtmV4I::addElemCC(TrcStackElemParam *pParamElem) { ocsd_err_t err = OCSD_OK; @@ -1078,16 +1273,22 @@ ocsd_err_t TrcPktDecodeEtmV4I::addElemEvent(TrcStackElemParam *pParamElem) return err; } -void TrcPktDecodeEtmV4I::setElemTraceRange(OcsdTraceElement &elemIn, const instr_range_t &addr_range, - const bool executed, ocsd_trc_index_t index) +void TrcPktDecodeEtmV4I::setElemTraceRange(OcsdTraceElement &elemIn, const instr_range_t &addr_range, + const bool executed, ocsd_trc_index_t index) +{ + setElemTraceRangeInstr(elemIn, addr_range, executed, index, m_instr_info); +} + +void TrcPktDecodeEtmV4I::setElemTraceRangeInstr(OcsdTraceElement &elemIn, const instr_range_t &addr_range, + const bool executed, ocsd_trc_index_t index, ocsd_instr_info &instr) { elemIn.setType(OCSD_GEN_TRC_ELEM_INSTR_RANGE); - elemIn.setLastInstrInfo(executed, m_instr_info.type, m_instr_info.sub_type, m_instr_info.instr_size); - elemIn.setISA(m_instr_info.isa); - elemIn.setLastInstrCond(m_instr_info.is_conditional); + elemIn.setLastInstrInfo(executed, instr.type, instr.sub_type, instr.instr_size); + elemIn.setISA(instr.isa); + elemIn.setLastInstrCond(instr.is_conditional); elemIn.setAddrRange(addr_range.st_addr, addr_range.en_addr, addr_range.num_instr); if (executed) - m_instr_info.isa = m_instr_info.next_isa; + instr.isa = instr.next_isa; } ocsd_err_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom) @@ -1096,6 +1297,7 @@ ocsd_err_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom) TrcStackElem *pElem = m_P0_stack.back(); // get the atom element WP_res_t WPRes; instr_range_t addr_range; + bool ETE_ERET = false; // new element for this processed atom if ((err = m_out_elem.addElem(pElem->getRootIndex())) != OCSD_OK) @@ -1114,7 +1316,8 @@ ocsd_err_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom) } else { - LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,pElem->getRootIndex(),m_CSID,"Error processing atom packet.")); + err = handlePacketSeqErr(err, pElem->getRootIndex(), "Error processing atom packet."); + //LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,pElem->getRootIndex(),m_CSID,"Error processing atom packet.")); return err; } } @@ -1144,10 +1347,22 @@ ocsd_err_t TrcPktDecodeEtmV4I::processAtom(const ocsd_atm_val atom) if (m_instr_info.is_link) m_return_stack.push(nextAddr,m_instr_info.isa); m_return_stack.set_pop_pending(); // need to know next packet before we know what is to happen + + /* ETE does not have ERET trace packets - however to maintain the illusion if we see an ERET + output a gen elem ERET packet */ + if (isETEConfig() && (m_instr_info.sub_type == OCSD_S_INSTR_V8_ERET)) + ETE_ERET = true; } break; } setElemTraceRange(outElem(), addr_range, (atom == ATOM_E), pElem->getRootIndex()); + + if (ETE_ERET) + { + err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_EXCEPTION_RET); + if (err) + return err; + } } else { @@ -1182,55 +1397,64 @@ ocsd_err_t TrcPktDecodeEtmV4I::processException() TrcStackElemAddr *pAddressElem = 0; TrcStackElemCtxt *pCtxtElem = 0; bool branch_target = false; // exception address implies prior branch target address - ocsd_vaddr_t excep_ret_addr; + ocsd_vaddr_t excep_ret_addr = 0; ocsd_trc_index_t excep_pkt_index; WP_res_t WPRes = WP_NOT_FOUND; + bool ETE_resetPkt = false; // grab the exception element off the stack pExceptElem = dynamic_cast(m_P0_stack.back()); // get the exception element excep_pkt_index = pExceptElem->getRootIndex(); branch_target = pExceptElem->getPrevSame(); + if (pExceptElem->getRootPkt() == ETE_PKT_I_PE_RESET) + ETE_resetPkt = true; m_P0_stack.pop_back(); // remove the exception element - pElem = m_P0_stack.back(); // look at next element. - if(pElem->getP0Type() == P0_CTXT) + // ETE reset has no follow up address, the rest of the exceptions do.... + if (!ETE_resetPkt) { - pCtxtElem = dynamic_cast(pElem); - m_P0_stack.pop_back(); // remove the context element - pElem = m_P0_stack.back(); // next one should be an address element - } - - if(pElem->getP0Type() != P0_ADDR) - { - // no following address element - indicate processing error. - LogError(ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_BAD_PACKET_SEQ, excep_pkt_index,m_CSID,"Address missing in exception packet.")); - return OCSD_ERR_BAD_PACKET_SEQ; - } - else - { - // extract address - pAddressElem = static_cast(pElem); - excep_ret_addr = pAddressElem->getAddr().val; - - // see if there is an address + optional context element implied - // prior to the exception. - if (branch_target) + pElem = m_P0_stack.back(); // look at next element. + if (pElem->getP0Type() == P0_CTXT) { - // this was a branch target address - update current setting - bool b64bit = m_instr_info.isa == ocsd_isa_aarch64; - if (pCtxtElem) { - b64bit = pCtxtElem->getContext().SF; - } - - // as the exception address was also a branch target address then update the - // current maintained address value. This also means that there is no range to - // output before the exception packet. - m_instr_info.instr_addr = excep_ret_addr; - m_instr_info.isa = (pAddressElem->getAddr().isa == 0) ? - (b64bit ? ocsd_isa_aarch64 : ocsd_isa_arm) : ocsd_isa_thumb2; - m_need_addr = false; + pCtxtElem = dynamic_cast(pElem); + m_P0_stack.pop_back(); // remove the context element + pElem = m_P0_stack.back(); // next one should be an address element } - } + + if (pElem->getP0Type() != P0_ADDR) + { + // no following address element - indicate processing error. + + err = handlePacketSeqErr(OCSD_ERR_BAD_PACKET_SEQ, m_index_curr_pkt, "Address missing in exception packet."); + //LogError(ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_BAD_PACKET_SEQ, excep_pkt_index, m_CSID, "Address missing in exception packet.")); + return err; + } + else + { + // extract address + pAddressElem = static_cast(pElem); + excep_ret_addr = pAddressElem->getAddr().val; + + // see if there is an address + optional context element implied + // prior to the exception. + if (branch_target) + { + // this was a branch target address - update current setting + bool b64bit = m_instr_info.isa == ocsd_isa_aarch64; + if (pCtxtElem) { + b64bit = pCtxtElem->getContext().SF; + } + + // as the exception address was also a branch target address then update the + // current maintained address value. This also means that there is no range to + // output before the exception packet. + m_instr_info.instr_addr = excep_ret_addr; + m_instr_info.isa = (pAddressElem->getAddr().isa == 0) ? + (b64bit ? ocsd_isa_aarch64 : ocsd_isa_arm) : ocsd_isa_thumb2; + m_need_addr = false; + } + } + } // need to output something - set up an element if ((err = m_out_elem.addElem(excep_pkt_index))) @@ -1246,69 +1470,72 @@ ocsd_err_t TrcPktDecodeEtmV4I::processException() return err; } - // if the preferred return address is not the end of the last output range... - if (m_instr_info.instr_addr != excep_ret_addr) - { - bool range_out = false; - instr_range_t addr_range; - - // look for match to return address. - err = traceInstrToWP(addr_range, WPRes, true, excep_ret_addr); - - if(err != OCSD_OK) + if (!ETE_resetPkt) + { + // if the preferred return address is not the end of the last output range... + if (m_instr_info.instr_addr != excep_ret_addr) { - if(err == OCSD_ERR_UNSUPPORTED_ISA) + bool range_out = false; + instr_range_t addr_range; + + // look for match to return address. + err = traceInstrToWP(addr_range, WPRes, true, excep_ret_addr); + + if (err != OCSD_OK) { - m_need_addr = true; - m_need_ctxt = true; - LogError(ocsdError(OCSD_ERR_SEV_WARN,err, excep_pkt_index,m_CSID,"Warning: unsupported instruction set processing exception packet.")); + if (err == OCSD_ERR_UNSUPPORTED_ISA) + { + m_need_addr = true; + m_need_ctxt = true; + LogError(ocsdError(OCSD_ERR_SEV_WARN, err, excep_pkt_index, m_CSID, "Warning: unsupported instruction set processing exception packet.")); + } + else + { + LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, excep_pkt_index, m_CSID, "Error processing exception packet.")); + } + return err; } - else - { - LogError(ocsdError(OCSD_ERR_SEV_ERROR,err, excep_pkt_index,m_CSID,"Error processing exception packet.")); - } - return err; - } - if(WPFound(WPRes)) - { - // waypoint address found - output range - setElemTraceRange(outElem(), addr_range, true, excep_pkt_index); - range_out = true; - } - else - { - // no waypoint - likely inaccessible memory range. - m_need_addr = true; // need an address update - - if(addr_range.st_addr != addr_range.en_addr) + if (WPFound(WPRes)) { - // some trace before we were out of memory access range + // waypoint address found - output range setElemTraceRange(outElem(), addr_range, true, excep_pkt_index); range_out = true; } + else + { + // no waypoint - likely inaccessible memory range. + m_need_addr = true; // need an address update + + if (addr_range.st_addr != addr_range.en_addr) + { + // some trace before we were out of memory access range + setElemTraceRange(outElem(), addr_range, true, excep_pkt_index); + range_out = true; + } + } + + // used the element need another for NACC or EXCEP. + if (range_out) + { + if ((err = m_out_elem.addElem(excep_pkt_index))) + return err; + } } - // used the element need another for NACC or EXCEP. - if (range_out) + // watchpoint walk resulted in inaccessible memory call... + if (WPNacc(WPRes)) { + + outElem().setType(OCSD_GEN_TRC_ELEM_ADDR_NACC); + outElem().st_addr = m_instr_info.instr_addr; + + // used the element - need another for the final exception packet. if ((err = m_out_elem.addElem(excep_pkt_index))) return err; } } - - // watchpoint walk resulted in inaccessible memory call... - if (WPNacc(WPRes)) - { - - outElem().setType(OCSD_GEN_TRC_ELEM_ADDR_NACC); - outElem().st_addr = m_instr_info.instr_addr; - // used the element - need another for the final exception packet. - if ((err = m_out_elem.addElem(excep_pkt_index))) - return err; - } - // output exception element. outElem().setType(OCSD_GEN_TRC_ELEM_EXCEPTION); @@ -1453,6 +1680,163 @@ ocsd_err_t TrcPktDecodeEtmV4I::processQElement() return err; } +ocsd_err_t TrcPktDecodeEtmV4I::processSourceAddress() +{ + ocsd_err_t err = OCSD_OK; + TrcStackElemAddr *pElem = dynamic_cast(m_P0_stack.back()); // get the address element + etmv4_addr_val_t srcAddr = pElem->getAddr(); + uint32_t opcode, bytesReq = 4; + ocsd_vaddr_t currAddr = m_instr_info.instr_addr; // get the latest decoded address. + instr_range_t out_range; + bool bSplitRangeOnN = getComponentOpMode() & ETE_OPFLG_PKTDEC_SRCADDR_N_ATOMS ? true : false; + + // check we can read instruction @ source address + err = accessMemory(srcAddr.val, getCurrMemSpace(), &bytesReq, (uint8_t *)&opcode); + if (err != OCSD_OK) + { + LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Mem access error processing source address packet.")); + return err; + } + + if (bytesReq != 4) + { + // can't access - no bytes returned - output nacc. + err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_ADDR_NACC); + outElem().setAddrStart(srcAddr.val); + return err; + } + + // analyze opcode @ source address. + m_instr_info.opcode = opcode; + m_instr_info.instr_addr = srcAddr.val; + err = instrDecode(&m_instr_info); + if (err != OCSD_OK) + { + LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Instruction decode error processing source address packet.")); + return err; + } + m_instr_info.instr_addr += m_instr_info.instr_size; + + // initial instruction count for the range. + out_range.num_instr = 1; + + // calculate range traced... + if (m_need_addr || (currAddr > srcAddr.val)) + { + // we were waiting for a target address, or missing trace + // that indicates how we got to the source address. + m_need_addr = false; + out_range.st_addr = srcAddr.val; + } + else + out_range.st_addr = currAddr; + out_range.en_addr = m_instr_info.instr_addr; + + // count instructions + if (out_range.en_addr - out_range.st_addr > m_instr_info.instr_size) + { + if ((m_instr_info.isa != ocsd_isa_thumb2) && !bSplitRangeOnN) + { + // all 4 byte instructions - just calculate... + out_range.num_instr = (uint32_t)(out_range.en_addr - out_range.st_addr) / 4; + } + else + { + // need to count T32 - 2 or 4 byte instructions or we are spotting N atoms + ocsd_instr_info instr; // going back to start of range so make a copy of info. + bool bMemAccErr = false; + + instr.instr_addr = out_range.st_addr; + instr.isa = m_instr_info.isa; + instr.pe_type = m_instr_info.pe_type; + instr.dsb_dmb_waypoints = m_instr_info.dsb_dmb_waypoints; + instr.wfi_wfe_branch = m_instr_info.wfi_wfe_branch; + out_range.num_instr = 0; + + while ((instr.instr_addr < out_range.en_addr) && !bMemAccErr) + { + bytesReq = 4; + err = accessMemory(instr.instr_addr, getCurrMemSpace(), &bytesReq, (uint8_t *)&opcode); + if (err != OCSD_OK) + { + LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Mem access error processing source address packet.")); + return err; + } + + if (bytesReq == 4) + { + instr.opcode = opcode; + err = instrDecode(&instr); + if (err != OCSD_OK) + { + LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, pElem->getRootIndex(), m_CSID, "Instruction decode error processing source address packet.")); + return err; + } + + instr.instr_addr += instr.instr_size; + out_range.num_instr++; + + /* if we are doing N atom ranges ...*/ + if (bSplitRangeOnN && (instr.instr_addr < out_range.en_addr)) + { + if (instr.type != OCSD_INSTR_OTHER) + { + instr_range_t mid_range = out_range; + mid_range.en_addr = instr.instr_addr; + + err = m_out_elem.addElem(pElem->getRootIndex()); + if (err) + return err; + setElemTraceRangeInstr(outElem(), mid_range, false, pElem->getRootIndex(), instr); + + out_range.st_addr = mid_range.en_addr; + out_range.num_instr = 0; + } + } + } + else + { + // something inaccessible between last and current... + bMemAccErr = true; + + err = m_out_elem.addElemType(pElem->getRootIndex(), OCSD_GEN_TRC_ELEM_ADDR_NACC); + if (err) + return err; + outElem().setAddrStart(srcAddr.val); + + // force range to the one instruction + out_range.num_instr = 1; + out_range.st_addr = srcAddr.val; + out_range.en_addr = m_instr_info.instr_addr; // instr after the decoded instruction @ srcAddr. + } + } + } + } + + // got to the source address - output trace range, and instruction as E atom. + switch (m_instr_info.type) + { + case OCSD_INSTR_BR: + if (m_instr_info.is_link) + m_return_stack.push(m_instr_info.instr_addr, m_instr_info.isa); + m_instr_info.instr_addr = m_instr_info.branch_addr; + break; + + case OCSD_INSTR_BR_INDIRECT: + m_need_addr = true; // indirect branch taken - need new address. + if (m_instr_info.is_link) + m_return_stack.push(m_instr_info.instr_addr, m_instr_info.isa); + m_return_stack.set_pop_pending(); // need to know next packet before we know what is to happen + break; + } + m_instr_info.isa = m_instr_info.next_isa; + + // set the trace range element. + m_out_elem.addElem(pElem->getRootIndex()); + setElemTraceRange(outElem(), out_range, true, pElem->getRootIndex()); + return err; +} + void TrcPktDecodeEtmV4I::SetInstrInfoInAddrISA(const ocsd_vaddr_t addr_val, const uint8_t isa) { m_instr_info.instr_addr = addr_val; @@ -1518,7 +1902,10 @@ void TrcPktDecodeEtmV4I::updateContext(TrcStackElemCtxt *pCtxtElem, OcsdTraceEle m_is_64bit = (ctxt.SF != 0); elem.context.bits64 = ctxt.SF; m_is_secure = (ctxt.NS == 0); - elem.context.security_level = ctxt.NS ? ocsd_sec_nonsecure : ocsd_sec_secure; + if (ctxt.NSE) + elem.context.security_level = ctxt.NS ? ocsd_sec_realm : ocsd_sec_root; + else + elem.context.security_level = ctxt.NS ? ocsd_sec_nonsecure : ocsd_sec_secure; elem.context.exception_level = (ocsd_ex_level)ctxt.EL; elem.context.el_valid = 1; if(ctxt.updated_c) @@ -1537,27 +1924,42 @@ void TrcPktDecodeEtmV4I::updateContext(TrcStackElemCtxt *pCtxtElem, OcsdTraceEle m_need_ctxt = false; } -ocsd_err_t TrcPktDecodeEtmV4I::handleBadPacket(const char *reason) +ocsd_err_t TrcPktDecodeEtmV4I::handleBadPacket(const char *reason, ocsd_trc_index_t index /* = OCSD_BAD_TRC_INDEX */) { - ocsd_err_t err = OCSD_OK; + ocsd_err_severity_t sev = OCSD_ERR_SEV_WARN; + if (getComponentOpMode() & OCSD_OPFLG_PKTDEC_ERROR_BAD_PKTS) + sev = OCSD_ERR_SEV_ERROR; - if(getComponentOpMode() & OCSD_OPFLG_PKTDEC_ERROR_BAD_PKTS) + return handlePacketErr(OCSD_ERR_BAD_DECODE_PKT, sev, index, reason); +} + +ocsd_err_t TrcPktDecodeEtmV4I::handlePacketSeqErr(ocsd_err_t err, ocsd_trc_index_t index, const char *reason) +{ + return handlePacketErr(err, OCSD_ERR_SEV_ERROR, index, reason); +} + +ocsd_err_t TrcPktDecodeEtmV4I::handlePacketErr(ocsd_err_t err, ocsd_err_severity_t sev, ocsd_trc_index_t index, const char *reason) +{ + bool resetOnBadPackets = true; + + if(getComponentOpMode() & OCSD_OPFLG_PKTDEC_HALT_BAD_PKTS) + resetOnBadPackets = false; + + LogError(ocsdError(sev, err, index, getCoreSightTraceID(), reason)); + + if (resetOnBadPackets) { - // error out - stop decoding - err = OCSD_ERR_BAD_DECODE_PKT; - LogError(ocsdError(OCSD_ERR_SEV_ERROR,err,reason)); - } - else - { - LogError(ocsdError(OCSD_ERR_SEV_WARN, OCSD_ERR_BAD_DECODE_PKT, reason)); // switch to unsync - clear decode state resetDecoder(); m_curr_state = NO_SYNC; m_unsync_eot_info = UNSYNC_BAD_PACKET; + err = OCSD_OK; } return err; + } + inline ocsd_mem_space_acc_t TrcPktDecodeEtmV4I::getCurrMemSpace() { static ocsd_mem_space_acc_t SMemSpace[] = { diff --git a/decoder/source/etmv4/trc_pkt_elem_etmv4i.cpp b/decoder/source/etmv4/trc_pkt_elem_etmv4i.cpp index 853fde499a1b..825b5f79e41b 100644 --- a/decoder/source/etmv4/trc_pkt_elem_etmv4i.cpp +++ b/decoder/source/etmv4/trc_pkt_elem_etmv4i.cpp @@ -38,6 +38,7 @@ EtmV4ITrcPacket::EtmV4ITrcPacket() { + protocol_version = 0x42; // min protocol version. } EtmV4ITrcPacket::~EtmV4ITrcPacket() @@ -101,6 +102,8 @@ void EtmV4ITrcPacket::toString(std::string &str) const contextStr(ctxtStr); case ETM4_PKT_I_ADDR_L_32IS0: case ETM4_PKT_I_ADDR_L_32IS1: + case ETE_PKT_I_SRC_ADDR_L_32IS0: + case ETE_PKT_I_SRC_ADDR_L_32IS1: trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true, (v_addr.pkt_bits < 32) ? v_addr.pkt_bits : 0); str += "; Addr=" + valStr + "; " + ctxtStr; break; @@ -110,6 +113,8 @@ void EtmV4ITrcPacket::toString(std::string &str) const contextStr(ctxtStr); case ETM4_PKT_I_ADDR_L_64IS0: case ETM4_PKT_I_ADDR_L_64IS1: + case ETE_PKT_I_SRC_ADDR_L_64IS0: + case ETE_PKT_I_SRC_ADDR_L_64IS1: trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true, (v_addr.pkt_bits < 64) ? v_addr.pkt_bits : 0); str += "; Addr=" + valStr + "; " + ctxtStr; break; @@ -121,11 +126,14 @@ void EtmV4ITrcPacket::toString(std::string &str) const case ETM4_PKT_I_ADDR_S_IS0: case ETM4_PKT_I_ADDR_S_IS1: + case ETE_PKT_I_SRC_ADDR_S_IS0: + case ETE_PKT_I_SRC_ADDR_S_IS1: trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true, v_addr.pkt_bits); str += "; Addr=" + valStr; break; case ETM4_PKT_I_ADDR_MATCH: + case ETE_PKT_I_SRC_ADDR_MATCH: addrMatchIdx(valStr); str += ", " + valStr; trcPrintableElem::getValStr(valStr, (v_addr.size == VA_64BIT) ? 64 : 32, v_addr.valid_bits, v_addr.val, true); @@ -161,7 +169,10 @@ void EtmV4ITrcPacket::toString(std::string &str) const { std::ostringstream oss; oss << "; INFO=" << std::hex << "0x" << trace_info.val; - oss << " { CC." << std::dec << trace_info.bits.cc_enabled << " }"; + oss << " { CC." << std::dec << trace_info.bits.cc_enabled; + if (isETE()) + oss << ", TSTATE." << std::dec << trace_info.bits.in_trans_state; + oss << " }"; if (trace_info.bits.cc_enabled) oss << "; CC_THRESHOLD=" << std::hex << "0x" << cc_threshold; str += oss.str(); @@ -264,6 +275,14 @@ void EtmV4ITrcPacket::toString(std::string &str) const } } break; + + case ETE_PKT_I_ITE: + { + std::ostringstream oss; + oss << "; EL" << std::dec << (int)ite_pkt.el << "; Payload=0x" << std::hex << ite_pkt.value; + str += oss.str(); + } + break; } } @@ -349,6 +368,16 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co pName = "I_EXCEPT_RTN"; pDesc = "Exception Return."; break; + + case ETE_PKT_I_TRANS_ST: + pName = "I_TRANS_ST"; + pDesc = "Transaction Start."; + break; + + case ETE_PKT_I_TRANS_COMMIT: + pName = "I_TRANS_COMMIT"; + pDesc = "Transaction Commit."; + break; case ETM4_PKT_I_CCNT_F1: pName = "I_CCNT_F1"; @@ -481,6 +510,11 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co pDesc = "Address & Context, Long, 64 bit, IS1."; break; + case ETE_PKT_I_TS_MARKER: + pName = "I_TS_MARKER"; + pDesc = "Timestamp Marker"; + break; + case ETM4_PKT_I_ADDR_MATCH: pName = "I_ADDR_MATCH"; pDesc = "Exact Address Match."; @@ -521,6 +555,41 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co pDesc = "Q Packet."; break; + case ETE_PKT_I_SRC_ADDR_MATCH: + pName = "I_SRC_ADDR_MATCH"; + pDesc = "Exact Source Address Match."; + break; + + case ETE_PKT_I_SRC_ADDR_S_IS0: + pName = "I_SRC_ADDR_S_IS0"; + pDesc = "Source Address, Short, IS0."; + break; + + case ETE_PKT_I_SRC_ADDR_S_IS1: + pName = "I_SRC_ADDR_S_IS1"; + pDesc = "Source Address, Short, IS1."; + break; + + case ETE_PKT_I_SRC_ADDR_L_32IS0: + pName = "I_SCR_ADDR_L_32IS0"; + pDesc = "Source Address, Long, 32 bit, IS0."; + break; + + case ETE_PKT_I_SRC_ADDR_L_32IS1: + pName = "I_SRC_ADDR_L_32IS1"; + pDesc = "Source Address, Long, 32 bit, IS1."; + break; + + case ETE_PKT_I_SRC_ADDR_L_64IS0: + pName = "I_SRC_ADDR_L_64IS0"; + pDesc = "Source Address, Long, 64 bit, IS0."; + break; + + case ETE_PKT_I_SRC_ADDR_L_64IS1: + pName = "I_SRC_ADDR_L_64IS1"; + pDesc = "Source Address, Long, 64 bit, IS1."; + break; + case ETM4_PKT_I_ATOM_F6: pName = "I_ATOM_F6"; pDesc = "Atom format 6."; @@ -566,6 +635,21 @@ const char *EtmV4ITrcPacket::packetTypeName(const ocsd_etmv4_i_pkt_type type, co pDesc = "Overflow."; break; + case ETE_PKT_I_PE_RESET: + pName = "I_PE_RESET"; + pDesc = "PE Reset."; + break; + + case ETE_PKT_I_TRANS_FAIL: + pName = "I_TRANS_FAIL"; + pDesc = "Transaction Fail."; + break; + + case ETE_PKT_I_ITE: + pName = "I_ITE"; + pDesc = "Instrumentation"; + break; + default: break; } diff --git a/decoder/source/etmv4/trc_pkt_proc_etmv4i.cpp b/decoder/source/etmv4/trc_pkt_proc_etmv4i.cpp index d8c7d84667d1..d767bdc85643 100644 --- a/decoder/source/etmv4/trc_pkt_proc_etmv4i.cpp +++ b/decoder/source/etmv4/trc_pkt_proc_etmv4i.cpp @@ -45,6 +45,9 @@ static const uint32_t ETMV4_SUPPORTED_OP_FLAGS = OCSD_OPFLG_PKTPROC_COMMON; +// test defines - if testing with ETMv4 sources, disable error on ERET. +// #define ETE_TRACE_ERET_AS_IGNORE + /* trace etmv4 packet processing class */ TrcPktProcEtmV4I::TrcPktProcEtmV4I() : TrcPktProcBase(ETMV4I_PKTS_NAME), m_isInit(false), @@ -70,7 +73,9 @@ ocsd_err_t TrcPktProcEtmV4I::onProtocolConfig() InitProcessorState(); m_config = *TrcPktProcBase::getProtocolConfig(); BuildIPacketTable(); // packet table based on config + m_curr_packet.setProtocolVersion(m_config.FullVersion()); m_isInit = true; + statsInit(); return OCSD_OK; } @@ -152,6 +157,10 @@ ocsd_datapath_resp_t TrcPktProcEtmV4I::processData( const ocsd_trc_index_t inde (err.getErrorCode() == OCSD_ERR_INVALID_PCKT_HDR)) { // send invalid packets up the pipe to let the next stage decide what to do. + if (err.getErrorCode() == OCSD_ERR_INVALID_PCKT_HDR) + statsAddBadHdrCount(1); + else + statsAddBadSeqCount(1); m_process_state = SEND_PKT; done = false; } @@ -171,6 +180,7 @@ ocsd_datapath_resp_t TrcPktProcEtmV4I::processData( const ocsd_trc_index_t inde } } while (!done); + statsAddTotalCount(m_trcIn.processed()); *numBytesProcessed = m_trcIn.processed(); return resp; } @@ -241,8 +251,8 @@ ocsd_datapath_resp_t TrcPktProcEtmV4I::outputUnsyncedRawPacket() { ocsd_datapath_resp_t resp = OCSD_RESP_CONT; - - outputRawPacketToMonitor(m_packet_index,&m_curr_packet,m_dump_unsynced_bytes,&m_currPacketData[0]); + statsAddUnsyncCount(m_dump_unsynced_bytes); + outputRawPacketToMonitor(m_packet_index,&m_curr_packet,m_dump_unsynced_bytes,&m_currPacketData[0]); if(!m_sent_notsync_packet) { @@ -290,6 +300,7 @@ void TrcPktProcEtmV4I::iPktNoPayload(const uint8_t lastByte) switch(m_curr_packet.type) { case ETM4_PKT_I_ADDR_MATCH: + case ETE_PKT_I_SRC_ADDR_MATCH: m_curr_packet.setAddressExactMatch(lastByte & 0x3); break; @@ -307,6 +318,8 @@ void TrcPktProcEtmV4I::iPktNoPayload(const uint8_t lastByte) case ETM4_PKT_I_EXCEPT_RTN: case ETM4_PKT_I_TRACE_ON: case ETM4_PKT_I_FUNC_RET: + case ETE_PKT_I_TRANS_ST: + case ETE_PKT_I_TRANS_COMMIT: case ETM4_PKT_I_IGNORE: default: break; } @@ -437,6 +450,8 @@ void TrcPktProcEtmV4I::iPktTraceInfo(const uint8_t lastByte) m_tinfo_sections.sectFlags |= (lastByte & 0x80) ? 0 : TINFO_SPEC_SECT; else if(!(m_tinfo_sections.sectFlags & TINFO_CYCT_SECT)) m_tinfo_sections.sectFlags |= (lastByte & 0x80) ? 0 : TINFO_CYCT_SECT; + else if (!(m_tinfo_sections.sectFlags & TINFO_WNDW_SECT)) + m_tinfo_sections.sectFlags |= (lastByte & 0x80) ? 0 : TINFO_WNDW_SECT; } // all sections accounted for? @@ -469,6 +484,11 @@ void TrcPktProcEtmV4I::iPktTraceInfo(const uint8_t lastByte) idx += extractContField(m_currPacketData,idx,fieldVal); m_curr_packet.setTraceInfoCyct(fieldVal); } + if ((presSect & TINFO_WNDW_SECT) && (idx < m_currPacketData.size())) + { + idx += extractContField(m_currPacketData, idx, fieldVal); + /* Trace commit window unsupported in current ETE versions */ + } m_process_state = SEND_PKT; m_first_trace_info = true; } @@ -502,8 +522,11 @@ void TrcPktProcEtmV4I::iPktTimestamp(const uint8_t lastByte) { int idx = 1; uint64_t tsVal; - int ts_bytes = extractContField64(m_currPacketData, idx, tsVal); - int ts_bits = ts_bytes < 7 ? ts_bytes * 7 : 64; + int ts_bytes = extractTSField64(m_currPacketData, idx, tsVal); + int ts_bits; + + // if ts_bytes 8 or less, then cont bits on each byte, otherwise full 64 bit value for 9 bytes + ts_bits = ts_bytes < 9 ? ts_bytes * 7 : 64; if(!m_curr_packet.pkt_valid.bits.ts_valid && m_first_trace_info) ts_bits = 64; // after trace info, missing bits are all 0. @@ -534,6 +557,13 @@ void TrcPktProcEtmV4I::iPktException(const uint8_t lastByte) case 1: m_excep_size = 3; break; case 2: if((lastByte & 0x80) == 0x00) m_excep_size = 2; + // ETE exception reset or trans failed + if (m_config.MajVersion() >= 0x5) + { + excep_type = (m_currPacketData[1] >> 1) & 0x1F; + if ((excep_type == 0x0) || (excep_type == 0x18)) + m_excep_size = 3; + } break; } @@ -553,6 +583,18 @@ void TrcPktProcEtmV4I::iPktException(const uint8_t lastByte) m_curr_packet.setExceptionInfo(excep_type,addr_interp,m_fault_pending, m_type); m_process_state = SEND_PKT; + // ETE exception reset or trans failed + if (m_config.MajVersion() >= 0x5) + { + if ((excep_type == 0x0) || (excep_type == 0x18)) + { + m_curr_packet.set64BitAddress(0, 0); + if (excep_type == 0x18) + m_curr_packet.setType(ETE_PKT_I_TRANS_FAIL); + else + m_curr_packet.setType(ETE_PKT_I_PE_RESET); + } + } // allow the standard address packet handlers to process the address packet field for the exception. } } @@ -833,7 +875,7 @@ void TrcPktProcEtmV4I::extractAndSetContextInfo(const std::vector &buff // on input, buffer index points at the info byte - always present uint8_t infoByte = m_currPacketData[st_idx]; - m_curr_packet.setContextInfo(true, (infoByte & 0x3), (infoByte >> 5) & 0x1, (infoByte >> 4) & 0x1); + m_curr_packet.setContextInfo(true, (infoByte & 0x3), (infoByte >> 5) & 0x1, (infoByte >> 4) & 0x1, (infoByte >> 3) & 0x1); // see if there are VMID and CID bytes, and how many. int nVMID_bytes = ((infoByte & 0x40) == 0x40) ? (m_config.vmidSize()/8) : 0; @@ -937,7 +979,8 @@ void TrcPktProcEtmV4I::iPktShortAddr(const uint8_t lastByte) { m_addr_done = false; m_addrIS = 0; - if (lastByte == ETM4_PKT_I_ADDR_S_IS1) + if ((lastByte == ETM4_PKT_I_ADDR_S_IS1) || + (lastByte == ETE_PKT_I_SRC_ADDR_S_IS1)) m_addrIS = 1; } else if(!m_addr_done) @@ -988,14 +1031,18 @@ void TrcPktProcEtmV4I::iPktLongAddr(const uint8_t lastByte) switch(m_curr_packet.type) { case ETM4_PKT_I_ADDR_L_32IS1: + case ETE_PKT_I_SRC_ADDR_L_32IS1: m_addrIS = 1; case ETM4_PKT_I_ADDR_L_32IS0: + case ETE_PKT_I_SRC_ADDR_L_32IS0: m_addrBytes = 4; break; case ETM4_PKT_I_ADDR_L_64IS1: + case ETE_PKT_I_SRC_ADDR_L_64IS1: m_addrIS = 1; case ETM4_PKT_I_ADDR_L_64IS0: + case ETE_PKT_I_SRC_ADDR_L_64IS0: m_addrBytes = 8; m_bAddr64bit = true; break; @@ -1203,6 +1250,23 @@ void TrcPktProcEtmV4I::iAtom(const uint8_t lastByte) m_process_state = SEND_PKT; } +void TrcPktProcEtmV4I::iPktITE(const uint8_t /* lastByte */) +{ + uint64_t value; + int shift = 0; + + /* packet is always 10 bytes, Header, EL info byte, 8 bytes payload */ + if (m_currPacketData.size() == 10) { + value = 0; + for (int i = 2; i < 10; i++) { + value |= ((uint64_t)m_currPacketData[i]) << shift; + shift += 8; + } + m_curr_packet.setITE(m_currPacketData[1], value); + m_process_state = SEND_PKT; + } +} + // header byte processing is table driven. void TrcPktProcEtmV4I::BuildIPacketTable() { @@ -1247,7 +1311,35 @@ void TrcPktProcEtmV4I::BuildIPacketTable() // b0000 0111 - exception return m_i_table[0x07].pkt_type = ETM4_PKT_I_EXCEPT_RTN; - m_i_table[0x07].pptkFn = &TrcPktProcEtmV4I::iPktNoPayload; + if (m_config.MajVersion() >= 0x5) // not valid for ETE + { +#ifdef ETE_TRACE_ERET_AS_IGNORE + m_i_table[0x07].pkt_type = ETM4_PKT_I_IGNORE; + m_i_table[0x07].pptkFn = &EtmV4IPktProcImpl::iPktNoPayload; +#else + m_i_table[0x07].pptkFn = &TrcPktProcEtmV4I::iPktInvalidCfg; +#endif + } + else + m_i_table[0x07].pptkFn = &TrcPktProcEtmV4I::iPktNoPayload; + + // b00001010, b00001011 ETE TRANS packets + // b00001001 - ETE sw instrumentation packet + if (m_config.MajVersion() >= 0x5) + { + m_i_table[0x0A].pkt_type = ETE_PKT_I_TRANS_ST; + m_i_table[0x0A].pptkFn = &TrcPktProcEtmV4I::iPktNoPayload; + + m_i_table[0x0B].pkt_type = ETE_PKT_I_TRANS_COMMIT; + m_i_table[0x0B].pptkFn = &TrcPktProcEtmV4I::iPktNoPayload; + + // FEAT_ITE - sw instrumentation packet + if (m_config.MinVersion() >= 0x3) + { + m_i_table[0x09].pkt_type = ETE_PKT_I_ITE; + m_i_table[0x09].pptkFn = &TrcPktProcEtmV4I::iPktITE; + } + } // b0000 110x - cycle count f2 // b0000 111x - cycle count f1 @@ -1443,6 +1535,12 @@ void TrcPktProcEtmV4I::BuildIPacketTable() m_i_table[0x85+i].pptkFn = &TrcPktProcEtmV4I::iPktAddrCtxt; } + // 0b1000 1000 - ETE 1.1 TS Marker. also ETMv4.6 + if(m_config.FullVersion() >= 0x46) + { + m_i_table[0x88].pkt_type = ETE_PKT_I_TS_MARKER; + m_i_table[0x88].pptkFn = &TrcPktProcEtmV4I::iPktNoPayload; + } // 0b1001 0000 to b1001 0010 - exact match addr for(int i = 0; i < 3; i++) { @@ -1492,6 +1590,30 @@ void TrcPktProcEtmV4I::BuildIPacketTable() } } + // b10110000 - b10111001 - ETE src address packets + if (m_config.FullVersion() >= 0x50) + { + for (int i = 0; i < 3; i++) + { + m_i_table[0xB0 + i].pkt_type = ETE_PKT_I_SRC_ADDR_MATCH; + m_i_table[0xB0 + i].pptkFn = &TrcPktProcEtmV4I::iPktNoPayload; + } + + m_i_table[0xB4].pkt_type = ETE_PKT_I_SRC_ADDR_S_IS0; + m_i_table[0xB4].pptkFn = &TrcPktProcEtmV4I::iPktShortAddr; + m_i_table[0xB5].pkt_type = ETE_PKT_I_SRC_ADDR_S_IS1; + m_i_table[0xB5].pptkFn = &TrcPktProcEtmV4I::iPktShortAddr; + + m_i_table[0xB6].pkt_type = ETE_PKT_I_SRC_ADDR_L_32IS0; + m_i_table[0xB6].pptkFn = &TrcPktProcEtmV4I::iPktLongAddr; + m_i_table[0xB7].pkt_type = ETE_PKT_I_SRC_ADDR_L_32IS1; + m_i_table[0xB7].pptkFn = &TrcPktProcEtmV4I::iPktLongAddr; + m_i_table[0xB8].pkt_type = ETE_PKT_I_SRC_ADDR_L_64IS0; + m_i_table[0xB8].pptkFn = &TrcPktProcEtmV4I::iPktLongAddr; + m_i_table[0xB9].pkt_type = ETE_PKT_I_SRC_ADDR_L_64IS1; + m_i_table[0xB9].pptkFn = &TrcPktProcEtmV4I::iPktLongAddr; + } + // Atom Packets - all no payload but have specific pattern generation fn for(int i = 0xC0; i <= 0xD4; i++) // atom f6 { @@ -1559,20 +1681,33 @@ void TrcPktProcEtmV4I::BuildIPacketTable() return idx; } -unsigned TrcPktProcEtmV4I::extractContField64(const std::vector &buffer, const unsigned st_idx, uint64_t &value, const unsigned byte_limit /*= 9*/) +unsigned TrcPktProcEtmV4I::extractTSField64(const std::vector &buffer, const unsigned st_idx, uint64_t &value) { + const unsigned max_byte_idx = 8; /* the 9th byte, index 8, will use full 8 bits for value */ unsigned idx = 0; bool lastByte = false; uint8_t byteVal; + uint8_t byteValMask = 0x7f; + + /* init value */ value = 0; - while(!lastByte && (idx < byte_limit)) // max 9 bytes for 64 bit value; + while(!lastByte) // max 9 bytes for 64 bit value; { if(buffer.size() > (st_idx + idx)) { // each byte has seven bits + cont bit byteVal = buffer[(st_idx + idx)]; - lastByte = (byteVal & 0x80) != 0x80; - value |= ((uint64_t)(byteVal & 0x7F)) << (idx * 7); + + /* detect the final byte - which uses full 8 bits as value */ + if (idx == max_byte_idx) + { + byteValMask = 0xFF; /* last byte of 9, no cont bit */ + lastByte = true; + } + else + lastByte = (byteVal & 0x80) != 0x80; + + value |= ((uint64_t)(byteVal & byteValMask)) << (idx * 7); idx++; } else @@ -1580,6 +1715,7 @@ unsigned TrcPktProcEtmV4I::extractContField64(const std::vector &buffer throwBadSequenceError("Invalid 64 bit continuation fields in packet"); } } + // index is the count of bytes used here. return idx; } diff --git a/decoder/source/i_dec/trc_i_decode.cpp b/decoder/source/i_dec/trc_i_decode.cpp index 614fc1d8b45c..0e0589512002 100644 --- a/decoder/source/i_dec/trc_i_decode.cpp +++ b/decoder/source/i_dec/trc_i_decode.cpp @@ -42,7 +42,7 @@ ocsd_err_t TrcIDecode::DecodeInstruction(ocsd_instr_info *instr_info) struct decode_info info; info.instr_sub_type = OCSD_S_INSTR_NONE; - info.arch_version = (uint16_t)(instr_info->pe_type.arch); + info.arch_version = instr_info->pe_type.arch; switch(instr_info->isa) { @@ -136,14 +136,12 @@ ocsd_err_t TrcIDecode::DecodeA64(ocsd_instr_info *instr_info, struct decode_info if(inst_A64_is_indirect_branch_link(instr_info->opcode, &instr_info->is_link, info)) { instr_info->type = OCSD_INSTR_BR_INDIRECT; -// instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode); } else if(inst_A64_is_direct_branch_link(instr_info->opcode, &instr_info->is_link, info)) { inst_A64_branch_destination(instr_info->instr_addr,instr_info->opcode,&branchAddr); instr_info->type = OCSD_INSTR_BR; instr_info->branch_addr = (ocsd_vaddr_t)branchAddr; -// instr_info->is_link = inst_A64_is_branch_and_link(instr_info->opcode); } else if((barrier = inst_A64_barrier(instr_info->opcode)) != ARM_BARRIER_NONE) { @@ -160,12 +158,15 @@ ocsd_err_t TrcIDecode::DecodeA64(ocsd_instr_info *instr_info, struct decode_info break; } } - else if (instr_info->wfi_wfe_branch) + else if (instr_info->wfi_wfe_branch && + inst_A64_wfiwfe(instr_info->opcode, info)) { - if (inst_A64_wfiwfe(instr_info->opcode)) - { - instr_info->type = OCSD_INSTR_WFI_WFE; - } + instr_info->type = OCSD_INSTR_WFI_WFE; + } + else if (OCSD_IS_ARCH_MINVER(info->arch_version, ARCH_AA64)) + { + if (inst_A64_Tstart(instr_info->opcode)) + instr_info->type = OCSD_INSTR_TSTART; } instr_info->is_conditional = inst_A64_is_conditional(instr_info->opcode); diff --git a/decoder/source/i_dec/trc_idec_arminst.cpp b/decoder/source/i_dec/trc_idec_arminst.cpp index 3652e84921f3..76951fd38183 100644 --- a/decoder/source/i_dec/trc_idec_arminst.cpp +++ b/decoder/source/i_dec/trc_idec_arminst.cpp @@ -244,8 +244,9 @@ int inst_A64_is_direct_branch_link(uint32_t inst, uint8_t *is_link, struct decod int is_direct_branch = 1; if ((inst & 0x7c000000) == 0x34000000) { /* CB, TB */ - } else if ((inst & 0xff000010) == 0x54000000) { + } else if ((inst & 0xff000000) == 0x54000000) { /* B */ + /* BC 8.8 / 9.3 arch - bit 4 = 1'b1 */ } else if ((inst & 0x7c000000) == 0x14000000) { /* B, BL imm */ if (inst & 0x80000000) { @@ -258,11 +259,26 @@ int inst_A64_is_direct_branch_link(uint32_t inst, uint8_t *is_link, struct decod return is_direct_branch; } -int inst_A64_wfiwfe(uint32_t inst) +int inst_A64_wfiwfe(uint32_t inst, struct decode_info *info) { /* WFI, WFE may be traced as branches in etm 4.3++ */ if ((inst & 0xffffffdf) == 0xd503205f) return 1; + + /* new feature introduced post v8.3 */ + if (OCSD_IS_ARCH_MINVER(info->arch_version, ARCH_AA64)) + { + /* WFIT / WFET for later archs */ + if ((inst & 0xffffffc0) == 0xd5031000) + return 1; + } + return 0; +} + +int inst_A64_Tstart(uint32_t inst) +{ + if ((inst & 0xffffffe0) == 0xd5233060) + return 1; return 0; } @@ -288,7 +304,7 @@ int inst_A64_is_indirect_branch_link(uint32_t inst, uint8_t *is_link, struct dec } else if ((inst & 0xffffffff) == 0xd69f03e0) { /* ERET */ info->instr_sub_type = OCSD_S_INSTR_V8_ERET; - } else if (info->arch_version >= 0x0803) { + } else if (OCSD_IS_ARCH_MINVER(info->arch_version, ARCH_V8r3)) { /* new pointer auth instr for v8.3 arch */ if ((inst & 0xffdff800) == 0xd71f0800) { /* BRAA, BRAB, BLRAA, BLRBB */ @@ -399,8 +415,9 @@ int inst_A64_branch_destination(uint64_t addr, uint32_t inst, uint64_t *pnpc) { uint64_t npc; int is_direct_branch = 1; - if ((inst & 0xff000010) == 0x54000000) { + if ((inst & 0xff000000) == 0x54000000) { /* B */ + /* BC */ npc = addr + ((int32_t)((inst & 0x00ffffe0) << 8) >> 11); } else if ((inst & 0x7c000000) == 0x14000000) { /* B, BL imm */ @@ -484,7 +501,7 @@ int inst_A64_is_branch_and_link(uint32_t inst, struct decode_info *info) } else if ((inst & 0xfc000000) == 0x94000000) { /* BL */ info->instr_sub_type = OCSD_S_INSTR_BR_LINK; - } else if (info->arch_version >= 0x0803) { + } else if (OCSD_IS_ARCH_MINVER(info->arch_version, ARCH_V8r3)) { /* new pointer auth instr for v8.3 arch */ if ((inst & 0xfffff800) == 0xd73f0800) { /* BLRAA, BLRBB */ @@ -553,8 +570,9 @@ int inst_A64_is_conditional(uint32_t inst) if ((inst & 0x7c000000) == 0x34000000) { /* CB, TB */ return 1; - } else if ((inst & 0xff000010) == 0x54000000) { + } else if ((inst & 0xff000000) == 0x54000000) { /* B.cond */ + /* BC.cond */ return 1; } return 0; diff --git a/decoder/source/mem_acc/trc_mem_acc_mapper.cpp b/decoder/source/mem_acc/trc_mem_acc_mapper.cpp index 53edfe1a1616..dc07a1ed5a25 100644 --- a/decoder/source/mem_acc/trc_mem_acc_mapper.cpp +++ b/decoder/source/mem_acc/trc_mem_acc_mapper.cpp @@ -119,6 +119,14 @@ ocsd_err_t TrcMemAccMapper::ReadTargetMemory(const ocsd_vaddr_t address, const u return err; } +void TrcMemAccMapper::InvalidateMemAccCache(const uint8_t /* cs_trace_id */) +{ + // default mapper does not use cs_trace_id for cache invalidation. + if (m_cache.enabled()) + m_cache.invalidateAll(); + m_acc_curr = 0; +} + void TrcMemAccMapper::RemoveAllAccessors() { TrcMemAccessorBase *pAcc = 0; diff --git a/decoder/source/ocsd_dcd_tree.cpp b/decoder/source/ocsd_dcd_tree.cpp index be15e36e9cb3..8e29269d1690 100644 --- a/decoder/source/ocsd_dcd_tree.cpp +++ b/decoder/source/ocsd_dcd_tree.cpp @@ -101,6 +101,13 @@ DecodeTree::DecodeTree() : { for(int i = 0; i < 0x80; i++) m_decode_elements[i] = 0; + + // reset the global demux stats. + m_demux_stats.frame_bytes = 0; + m_demux_stats.no_id_bytes = 0; + m_demux_stats.valid_id_bytes = 0; + m_demux_stats.unknown_id_bytes = 0; + m_demux_stats.reserved_id_bytes = 0; } DecodeTree::~DecodeTree() @@ -486,6 +493,62 @@ ocsd_err_t DecodeTree::removeDecoder(const uint8_t CSID) return err; } +ocsd_err_t DecodeTree::getDecoderStats(const uint8_t CSID, ocsd_decode_stats_t **p_stats_block) +{ + ocsd_err_t err = OCSD_OK; + TrcPktProcI *pPktProc = getPktProcI(CSID); + if (!pPktProc) + return OCSD_ERR_INVALID_PARAM_VAL; + err = pPktProc->getStatsBlock(p_stats_block); + if (err == OCSD_OK) { + // copy in the global demux stats. + (*p_stats_block)->demux.frame_bytes = m_demux_stats.frame_bytes; + (*p_stats_block)->demux.no_id_bytes = m_demux_stats.no_id_bytes; + (*p_stats_block)->demux.valid_id_bytes = m_demux_stats.valid_id_bytes; + (*p_stats_block)->demux.unknown_id_bytes = m_demux_stats.unknown_id_bytes; + (*p_stats_block)->demux.reserved_id_bytes = m_demux_stats.reserved_id_bytes; + } + return err; +} + +ocsd_err_t DecodeTree::resetDecoderStats(const uint8_t CSID) +{ + TrcPktProcI *pPktProc = getPktProcI(CSID); + if (!pPktProc) + return OCSD_ERR_INVALID_PARAM_VAL; + pPktProc->resetStats(); + + // reset the global demux stats. + m_demux_stats.frame_bytes = 0; + m_demux_stats.no_id_bytes = 0; + m_demux_stats.valid_id_bytes = 0; + m_demux_stats.unknown_id_bytes = 0; + m_demux_stats.reserved_id_bytes = 0; + return OCSD_OK; +} + +TrcPktProcI *DecodeTree::getPktProcI(const uint8_t CSID) +{ + TrcPktProcI *pPktProc = 0; + TraceComponent *pComp, *pAssoc; + DecodeTreeElement *pElem = getDecoderElement(CSID); + + if (pElem) + { + pComp = pElem->getDecoderHandle(); + if (pComp) + { + /* if this is a full decoder then the associated component is the packet processor */ + pAssoc = pComp->getAssocComponent(); + if (pAssoc) + pPktProc = dynamic_cast(pAssoc); + else + pPktProc = dynamic_cast(pComp); + } + } + return pPktProc; +} + DecodeTreeElement * DecodeTree::getDecoderElement(const uint8_t CSID) const { DecodeTreeElement *ret_elem = 0; @@ -511,7 +574,7 @@ DecodeTreeElement *DecodeTree::getNextElement(uint8_t &elemID) if(m_decode_elem_iter < 0x80) { // find a none zero entry or end of range - while((m_decode_elements[m_decode_elem_iter] == 0) && (m_decode_elem_iter < 0x80)) + while((m_decode_elem_iter < 0x80) && (m_decode_elements[m_decode_elem_iter] == 0)) m_decode_elem_iter++; // return entry unless end of range @@ -527,7 +590,7 @@ DecodeTreeElement *DecodeTree::getNextElement(uint8_t &elemID) bool DecodeTree::initialise(const ocsd_dcd_tree_src_t type, uint32_t formatterCfgFlags) { - bool initOK = true; + ocsd_err_t err; m_dcd_tree_type = type; if(type == OCSD_TRC_SRC_FRAME_FORMATTED) { @@ -535,14 +598,19 @@ bool DecodeTree::initialise(const ocsd_dcd_tree_src_t type, uint32_t formatterCf m_frame_deformatter_root = new (std::nothrow) TraceFormatterFrameDecoder(); if(m_frame_deformatter_root) { - m_frame_deformatter_root->Configure(formatterCfgFlags); + if (m_frame_deformatter_root->Init() != OCSD_OK) + return false; m_frame_deformatter_root->getErrLogAttachPt()->attach(DecodeTree::s_i_error_logger); + err = m_frame_deformatter_root->Configure(formatterCfgFlags); + if (err != OCSD_OK) + return false; m_i_decoder_root = dynamic_cast(m_frame_deformatter_root); + m_frame_deformatter_root->SetDemuxStatsBlock(&m_demux_stats); } else - initOK = false; + return false; } - return initOK; + return true; } void DecodeTree::setSingleRoot(TrcPktProcI *pComp) @@ -621,6 +689,7 @@ ocsd_err_t DecodeTree::addPacketPrinter(uint8_t CSID, bool bMonitor, ItemPrinter switch (protocol) { case OCSD_PROTOCOL_ETMV4I: + case OCSD_PROTOCOL_ETE: { PacketPrinter *pTPrinter = dynamic_cast *>(pPrinter); if (bMonitor) diff --git a/decoder/source/ocsd_error.cpp b/decoder/source/ocsd_error.cpp index 74e9e4977f60..ee01064a3476 100644 --- a/decoder/source/ocsd_error.cpp +++ b/decoder/source/ocsd_error.cpp @@ -229,4 +229,25 @@ void ocsdError::appendErrorDetails(std::string &errStr, const ocsdError &error) errStr = oss.str(); } + +const char* ocsdDataRespStr::getStr() +{ + static const char* szRespStr[] = { + "OCSD_RESP_CONT: Continue processing.", + "OCSD_RESP_WARN_CONT: Continue processing -> a component logged a warning.", + "OCSD_RESP_ERR_CONT: Continue processing -> a component logged an error.", + "OCSD_RESP_WAIT: Pause processing", + "OCSD_RESP_WARN_WAIT: Pause processing -> a component logged a warning.", + "OCSD_RESP_ERR_WAIT: Pause processing -> a component logged an error.", + "OCSD_RESP_FATAL_NOT_INIT: Processing Fatal Error : component unintialised.", + "OCSD_RESP_FATAL_INVALID_OP: Processing Fatal Error : invalid data path operation.", + "OCSD_RESP_FATAL_INVALID_PARAM: Processing Fatal Error : invalid parameter in datapath call.", + "OCSD_RESP_FATAL_INVALID_DATA: Processing Fatal Error : invalid trace data.", + "OCSD_RESP_FATAL_SYS_ERR: Processing Fatal Error : internal system error." + }; + if ((m_type < OCSD_RESP_CONT) || (m_type > OCSD_RESP_FATAL_SYS_ERR)) + return "Unknown OCSD_RESP type."; + return szRespStr[m_type]; +} + /* End of File ocsd_error.cpp */ diff --git a/decoder/source/ocsd_gen_elem_stack.cpp b/decoder/source/ocsd_gen_elem_stack.cpp index bb758427a9b8..66fe75d9899a 100644 --- a/decoder/source/ocsd_gen_elem_stack.cpp +++ b/decoder/source/ocsd_gen_elem_stack.cpp @@ -42,6 +42,7 @@ OcsdGenElemStack::OcsdGenElemStack() : m_curr_elem_idx(0), m_send_elem_idx(0), m_CSID(0), + m_sendIf(NULL), m_is_init(false) { diff --git a/decoder/source/ocsd_lib_dcd_register.cpp b/decoder/source/ocsd_lib_dcd_register.cpp index adb042dcadff..0233c89eaa06 100644 --- a/decoder/source/ocsd_lib_dcd_register.cpp +++ b/decoder/source/ocsd_lib_dcd_register.cpp @@ -39,13 +39,15 @@ #include "opencsd/etmv3/trc_dcd_mngr_etmv3.h" #include "opencsd/ptm/trc_dcd_mngr_ptm.h" #include "opencsd/stm/trc_dcd_mngr_stm.h" +#include "opencsd/ete/trc_dcd_mngr_ete.h" // create array of built-in decoders to register with library static built_in_decoder_info_t sBuiltInArray[] = { CREATE_BUILTIN_ENTRY(DecoderMngrEtmV4I,OCSD_BUILTIN_DCD_ETMV4I), CREATE_BUILTIN_ENTRY(DecoderMngrEtmV3, OCSD_BUILTIN_DCD_ETMV3), CREATE_BUILTIN_ENTRY(DecoderMngrPtm, OCSD_BUILTIN_DCD_PTM), - CREATE_BUILTIN_ENTRY(DecoderMngrStm, OCSD_BUILTIN_DCD_STM) + CREATE_BUILTIN_ENTRY(DecoderMngrStm, OCSD_BUILTIN_DCD_STM), + CREATE_BUILTIN_ENTRY(DecoderMngrETE, OCSD_BUILTIN_DCD_ETE) //{ 0, 0, 0} }; @@ -90,7 +92,6 @@ OcsdLibDcdRegister::~OcsdLibDcdRegister() m_pLastTypedDecoderMngr = 0; } - const ocsd_err_t OcsdLibDcdRegister::registerDecoderTypeByName(const std::string &name, IDecoderMngr *p_decoder_fact) { if(isRegisteredDecoder(name)) diff --git a/decoder/source/pkt_printers/trc_print_fact.cpp b/decoder/source/pkt_printers/trc_print_fact.cpp index 52dcb6b3e1ac..6b5df1f472e0 100644 --- a/decoder/source/pkt_printers/trc_print_fact.cpp +++ b/decoder/source/pkt_printers/trc_print_fact.cpp @@ -55,8 +55,9 @@ ItemPrinter *PktPrinterFact::createProtocolPrinter(std::vector &p { ItemPrinter *pPrinter = 0; switch (protocol) - { + { case OCSD_PROTOCOL_ETMV4I: + case OCSD_PROTOCOL_ETE: pPrinter = new (std::nothrow) PacketPrinter(CSID); break; case OCSD_PROTOCOL_ETMV3: diff --git a/decoder/source/ptm/trc_pkt_proc_ptm.cpp b/decoder/source/ptm/trc_pkt_proc_ptm.cpp index 7c90b62e6413..668a14b73df0 100644 --- a/decoder/source/ptm/trc_pkt_proc_ptm.cpp +++ b/decoder/source/ptm/trc_pkt_proc_ptm.cpp @@ -224,6 +224,7 @@ void TrcPktProcPtm::InitProcessorState() m_waitASyncSOPkt = false; m_bAsyncRawOp = false; m_bOPNotSyncPkt = false; + m_excepAltISA = 0; m_curr_packet.ResetState(); InitPacketState(); @@ -559,7 +560,7 @@ void TrcPktProcPtm::pktWPointUpdate() m_gotExcepBytes = false; // mark as not got all required exception bytes thus far m_numExcepBytes = 0; // 0 read in - m_addrPktIsa = ocsd_isa_unknown; // not set by this packet as yet + m_addrPktIsa = ocsd_isa_unknown; // not set by this packet as yet } // collect all the bytes needed @@ -567,10 +568,12 @@ void TrcPktProcPtm::pktWPointUpdate() { if(readByte(currByte)) { + byteIdx = m_currPacketData.size() - 1; if(!m_gotAddrBytes) { - if(byteIdx < 4) + // byteIdx for address byte will run from 1 to 5 - first 4 my have continuation or not. + if(byteIdx <= 4) { // address bytes 1 - 4; // ISA stays the same diff --git a/decoder/source/trc_core_arch_map.cpp b/decoder/source/trc_core_arch_map.cpp index a26f79db996e..f25ab1e5ddfa 100644 --- a/decoder/source/trc_core_arch_map.cpp +++ b/decoder/source/trc_core_arch_map.cpp @@ -72,17 +72,6 @@ static ap_map_elem_t ap_map_array[] = { "Cortex-M4", { ARCH_V7, profile_CortexM } } }; -static ap_map_elem_t arch_map_array[] = -{ - { "ARMv7-A", { ARCH_V7, profile_CortexA } }, - { "ARMv7-R", { ARCH_V7, profile_CortexR } }, - { "ARMv7-M", { ARCH_V7, profile_CortexM } }, - { "ARMv8-A", { ARCH_V8, profile_CortexA } }, - { "ARMv8.3-A", { ARCH_V8r3, profile_CortexA } }, - { "ARMv8-R", { ARCH_V8, profile_CortexR } }, - { "ARMv8-M", { ARCH_V8, profile_CortexM } }, -}; - CoreArchProfileMap::CoreArchProfileMap() { unsigned i; @@ -90,10 +79,99 @@ CoreArchProfileMap::CoreArchProfileMap() { core_profiles[ap_map_array[i].name] = ap_map_array[i].ap; } - for (i = 0; i < sizeof(arch_map_array) / sizeof(_ap_map_elements); i++) - { - arch_profiles[arch_map_array[i].name] = arch_map_array[i].ap; - } } +ocsd_arch_profile_t CoreArchProfileMap::getArchProfile(const std::string &coreName) +{ + ocsd_arch_profile_t ap = { ARCH_UNKNOWN, profile_Unknown }; + bool bFound = false; + + std::map::const_iterator it; + + /* match against the core name map. */ + it = core_profiles.find(coreName); + if (it != core_profiles.end()) + { + ap = it->second; + bFound = true; + } + + /* try a pattern match on core name - pick up ARMvM[.m]-P and ARM-{aa|AA}64[-P] */ + if (!bFound) + ap = getPatternMatchCoreName(coreName); + + return ap; +} +ocsd_arch_profile_t CoreArchProfileMap::getPatternMatchCoreName(const std::string &coreName) +{ + ocsd_arch_profile_t ap = { ARCH_UNKNOWN, profile_Unknown }; + size_t pos; + + /* look for ARMvM[.m]-P */ + pos = coreName.find("ARMv"); + if (pos == 0) + { + int majver = coreName[4] - '0'; + int minver = 0; + int dotoffset = 0; + + pos = coreName.find_first_of("."); + if (pos == 5) { + minver = coreName[6] - '0'; + dotoffset = 2; + } + else if (pos != std::string::npos) + return ap; + + if (majver == 7) + ap.arch = ARCH_V7; + else if (majver >= 8) { + ap.arch = ARCH_AA64; /* default to 8.3+*/ + if (majver == 8) { + if (minver < 3) + ap.arch = ARCH_V8; + else if (minver == 3) + ap.arch = ARCH_V8r3; + } + } + else + return ap; /* no valid version - return unknown */ + + if (coreName.find_first_of("-", 4) == (size_t)(5 + dotoffset)) { + int profile_idx = 6 + dotoffset; + if (coreName[profile_idx] == 'A') + ap.profile = profile_CortexA; + else if (coreName[profile_idx] == 'R') + ap.profile = profile_CortexR; + else if (coreName[profile_idx] == 'M') + ap.profile = profile_CortexM; + else + ap.arch = ARCH_UNKNOWN; /*reset arch, return unknown*/ + } + else + ap.arch = ARCH_UNKNOWN; /*reset arch, return unknown*/ + return ap; + } + + /* look for ARM-{AA|aa}64[-P] */ + pos = coreName.find("ARM-"); + if (pos == 0) + { + pos = coreName.find("aa64"); + if (pos != 4) + pos = coreName.find("AA64"); + if (pos == 4) + { + ap.arch = ARCH_AA64; + ap.profile = profile_CortexA; + if (coreName.find_first_of("-", 7) == 8) { + if (coreName[9] == 'R') + ap.profile = profile_CortexR; + else if (coreName[9] == 'M') + ap.profile = profile_CortexM; + } + } + } + return ap; +} /* End of File trc_core_arch_map.cpp */ diff --git a/decoder/source/trc_frame_deformatter.cpp b/decoder/source/trc_frame_deformatter.cpp index 4d46854a655b..3b2aead875ca 100644 --- a/decoder/source/trc_frame_deformatter.cpp +++ b/decoder/source/trc_frame_deformatter.cpp @@ -54,7 +54,8 @@ TraceFmtDcdImpl::TraceFmtDcdImpl() : TraceComponent(DEFORMATTER_NAME), m_use_force_sync(false), m_alignment(16), // assume frame aligned data as default. m_b_output_packed_raw(false), - m_b_output_unpacked_raw(false) + m_b_output_unpacked_raw(false), + m_pStatsBlock(0) { resetStateParams(); @@ -244,7 +245,12 @@ ocsd_datapath_resp_t TraceFmtDcdImpl::processTraceData( if(m_trc_curr_idx != index) // none continuous trace data - throw an error. throw ocsdError(OCSD_ERR_SEV_ERROR,OCSD_ERR_DFMTR_NOTCONTTRACE,index); } - + + // record the incoming block for extraction routines to use. + m_in_block_base = pDataBlock; + m_in_block_size = dataBlockSize; + m_in_block_processed = 0; + if(dataBlockSize % m_alignment) // must be correctly aligned data { ocsdError err(OCSD_ERR_SEV_ERROR, OCSD_ERR_INVALID_PARAM_VAL); @@ -254,11 +260,6 @@ ocsd_datapath_resp_t TraceFmtDcdImpl::processTraceData( throw ocsdError(&err); } - // record the incoming block for extraction routines to use. - m_in_block_base = pDataBlock; - m_in_block_size = dataBlockSize; - m_in_block_processed = 0; - // processing loop... if(checkForSync()) { @@ -324,12 +325,18 @@ ocsd_err_t TraceFmtDcdImpl::DecodeConfigure(uint32_t flags) } else { + // alightment is the multiple of bytes the buffer size must be. m_cfgFlags = flags; + + // using memory aligned buffers, the formatter always outputs 16 byte frames so enforce + // this on the input m_alignment = 16; - if(flags & OCSD_DFRMTR_HAS_FSYNCS) - m_alignment = 4; - else if(flags & OCSD_DFRMTR_HAS_HSYNCS) + // if we have HSYNCS then always align to 2 byte buffers + if(flags & OCSD_DFRMTR_HAS_HSYNCS) m_alignment = 2; + // otherwise FSYNCS only can have 4 byte aligned buffers. + else if(flags & OCSD_DFRMTR_HAS_FSYNCS) + m_alignment = 4; } return err; } @@ -344,6 +351,7 @@ void TraceFmtDcdImpl::resetStateParams() // current frame processing m_ex_frm_n_bytes = 0; + m_b_fsync_start_eob = false; m_trc_curr_idx_sof = OCSD_BAD_TRC_INDEX; } @@ -415,20 +423,23 @@ void TraceFmtDcdImpl::outputUnsyncedBytes(uint32_t /*num_bytes*/) //**TBD: } -int TraceFmtDcdImpl::checkForResetFSyncPatterns() +ocsd_err_t TraceFmtDcdImpl::checkForResetFSyncPatterns(uint32_t &f_sync_bytes) { const uint32_t FSYNC_PATTERN = 0x7FFFFFFF; // LE host pattern for FSYNC bool check_for_fsync = true; int num_fsyncs = 0; - const uint8_t *dataPtr = m_in_block_base + m_in_block_processed; + uint32_t bytes_processed = m_in_block_processed; + const uint8_t *dataPtr = m_in_block_base + bytes_processed; + ocsd_err_t err = OCSD_OK; - while (check_for_fsync && (m_in_block_processed < m_in_block_size)) + while (check_for_fsync && (bytes_processed < m_in_block_size)) { // look for consecutive fsyncs as padding or for reset downstream - both cases will reset downstream.... if (*((uint32_t *)(dataPtr)) == FSYNC_PATTERN) { dataPtr += sizeof(uint32_t); - num_fsyncs++; + num_fsyncs++; + bytes_processed += sizeof(uint32_t); } else check_for_fsync = false; @@ -436,7 +447,6 @@ int TraceFmtDcdImpl::checkForResetFSyncPatterns() if (num_fsyncs) { - printf("Frame deformatter: Found %d FSYNCS\n",num_fsyncs); if ((num_fsyncs % 4) == 0) { // reset the upstream decoders @@ -449,32 +459,40 @@ int TraceFmtDcdImpl::checkForResetFSyncPatterns() } else { - // TBD: throw processing error, none frame size block of fsyncs + err = OCSD_ERR_DFMTR_BAD_FHSYNC; } } - return num_fsyncs * 4; + f_sync_bytes += num_fsyncs * 4; + return err; } - +/* Extract a single frame from the input buffer. */ bool TraceFmtDcdImpl::extractFrame() { const uint32_t FSYNC_PATTERN = 0x7FFFFFFF; // LE host pattern for FSYNC const uint16_t HSYNC_PATTERN = 0x7FFF; // LE host pattern for HSYNC + const uint16_t FSYNC_START = 0xFFFF; // LE host pattern for start 2 bytes of fsync - - bool cont_process = true; // continue processing after extraction. + ocsd_err_t err; uint32_t f_sync_bytes = 0; // skipped f sync bytes uint32_t h_sync_bytes = 0; // skipped h sync bytes uint32_t ex_bytes = 0; // extracted this pass (may be filling out part frame) + uint32_t buf_left = m_in_block_size - m_in_block_processed; // bytes remaining in buffer this pass. - // memory aligned sources are always multiples of frames, aligned to start. + // last call was end of input block - but carried on to process full frame. + // exit early here. + if (!buf_left) + return false; + + // memory aligned input data is forced to be always multiples of 16 byte frames, aligned to start. if( m_cfgFlags & OCSD_DFRMTR_FRAME_MEM_ALIGN) { // some linux drivers (e.g. for perf) will insert FSYNCS to pad or differentiate - // between blocks of aligned data, always in frame aligned complete 16 byte frames. + // between blocks of aligned data, always in frame aligned complete 16 byte frames. + // we need to skip past these frames, resetting as we go. if (m_cfgFlags & OCSD_DFRMTR_RESET_ON_4X_FSYNC) { - f_sync_bytes = checkForResetFSyncPatterns(); + err = checkForResetFSyncPatterns(f_sync_bytes); /* in this case the FSYNC pattern is output on both packed and unpacked cases */ if (f_sync_bytes && (m_b_output_packed_raw || m_b_output_unpacked_raw)) @@ -486,77 +504,96 @@ bool TraceFmtDcdImpl::extractFrame() m_in_block_base + m_in_block_processed, 0); } + + // throw processing error, none frame size block of fsyncs + if (err) + throw ocsdError(OCSD_ERR_SEV_ERROR, err, m_trc_curr_idx, "Incorrect FSYNC frame reset pattern"); + + buf_left -= f_sync_bytes; } - if((m_in_block_processed+f_sync_bytes) == m_in_block_size) + if (buf_left) { - m_ex_frm_n_bytes = 0; - cont_process = false; // end of input data. - } - else - { - // always a complete frame. - m_ex_frm_n_bytes = OCSD_DFRMTR_FRAME_SIZE; - memcpy(m_ex_frm_data, m_in_block_base + m_in_block_processed + f_sync_bytes, m_ex_frm_n_bytes); - m_trc_curr_idx_sof = m_trc_curr_idx + f_sync_bytes; - ex_bytes = OCSD_DFRMTR_FRAME_SIZE; + // always a complete frame - the input data has to be 16 byte multiple alignment. + m_ex_frm_n_bytes = OCSD_DFRMTR_FRAME_SIZE; + memcpy(m_ex_frm_data, m_in_block_base + m_in_block_processed + f_sync_bytes, m_ex_frm_n_bytes); + m_trc_curr_idx_sof = m_trc_curr_idx + f_sync_bytes; + ex_bytes = OCSD_DFRMTR_FRAME_SIZE; } } else { // extract data accounting for frame syncs and hsyncs if present. // we know we are aligned at this point - could be FSYNC or HSYNCs here. + // HSYNC present, library forces input to be aligned 2 byte multiples + // FSYNC - w/o HSYNCs, forces input to be aligned 4 byte multiples. // check what we a looking for - bool hasFSyncs = ((m_cfgFlags & OCSD_DFRMTR_HAS_FSYNCS) == OCSD_DFRMTR_HAS_FSYNCS); - bool hasHSyncs = ((m_cfgFlags & OCSD_DFRMTR_HAS_HSYNCS) == OCSD_DFRMTR_HAS_HSYNCS); + bool hasFSyncs = ((m_cfgFlags & OCSD_DFRMTR_HAS_FSYNCS) == OCSD_DFRMTR_HAS_FSYNCS); + bool hasHSyncs = ((m_cfgFlags & OCSD_DFRMTR_HAS_HSYNCS) == OCSD_DFRMTR_HAS_HSYNCS); + + const uint8_t* dataPtr = m_in_block_base + m_in_block_processed; + uint16_t data_pair_val; - const uint8_t *dataPtr = m_in_block_base+m_in_block_processed; - const uint8_t *eodPtr = m_in_block_base+m_in_block_size; - - cont_process = (bool)(dataPtr < eodPtr); - // can have FSYNCS at start of frame (in middle is an error). - if(hasFSyncs && cont_process && (m_ex_frm_n_bytes == 0)) + if (hasFSyncs && (m_ex_frm_n_bytes == 0)) { - while((*((uint32_t *)(dataPtr)) == FSYNC_PATTERN) && cont_process) + // was there an fsync start at the end of the last buffer? + if (m_b_fsync_start_eob) { + // last 2 of FSYNC look like HSYNC + if (*(uint16_t*)(dataPtr) != HSYNC_PATTERN) + { + // this means 0xFFFF followed by something else - invalid ID + ???? + throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad FSYNC pattern before frame or invalid ID.(0x7F)"); + } + else + { + f_sync_bytes += 2; + buf_left -= 2; + dataPtr += 2; + } + m_b_fsync_start_eob = false; + } + + // regular fsync checks + while ((buf_left >= 4) && (*((uint32_t*)(dataPtr)) == FSYNC_PATTERN)) { f_sync_bytes += 4; dataPtr += 4; - cont_process = (bool)(dataPtr < eodPtr); + buf_left -= 4; + } + + // handle possible part fsync at the end of a buffer + if (buf_left == 2) + { + if (*(uint16_t*)(dataPtr) == FSYNC_START) + { + f_sync_bytes += 2; + buf_left -= 2; + dataPtr += 2; + m_b_fsync_start_eob = true; + } } } - // not an FSYNC - while((m_ex_frm_n_bytes < OCSD_DFRMTR_FRAME_SIZE) && cont_process) + // process remaining data in pairs of bytes + while ((m_ex_frm_n_bytes < OCSD_DFRMTR_FRAME_SIZE) && buf_left) { - // check for illegal out of sequence FSYNC - if((m_ex_frm_n_bytes % 4) == 0) - { - if(*((uint32_t *)(dataPtr)) == FSYNC_PATTERN) - { - // throw an illegal FSYNC error - throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad FSYNC in frame."); - } - } - // mark start of frame after FSyncs - if(m_ex_frm_n_bytes == 0) + if (m_ex_frm_n_bytes == 0) m_trc_curr_idx_sof = m_trc_curr_idx + f_sync_bytes; m_ex_frm_data[m_ex_frm_n_bytes] = dataPtr[0]; - m_ex_frm_data[m_ex_frm_n_bytes+1] = dataPtr[1]; - m_ex_frm_n_bytes+=2; - ex_bytes +=2; + m_ex_frm_data[m_ex_frm_n_bytes + 1] = dataPtr[1]; + + data_pair_val = *((uint16_t*)(dataPtr)); // check pair is not HSYNC - if(*((uint16_t *)(dataPtr)) == HSYNC_PATTERN) + if (data_pair_val == HSYNC_PATTERN) { - if(hasHSyncs) + if (hasHSyncs) { - m_ex_frm_n_bytes-=2; - ex_bytes -= 2; - h_sync_bytes+=2; + h_sync_bytes += 2; } else { @@ -564,22 +601,27 @@ bool TraceFmtDcdImpl::extractFrame() throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad HSYNC in frame."); } } + // can't have a start of FSYNC here / illegal trace ID + else if (data_pair_val == FSYNC_START) + { + throw ocsdError(OCSD_ERR_SEV_ERROR, OCSD_ERR_DFMTR_BAD_FHSYNC, m_trc_curr_idx, "Bad FSYNC start in frame or invalid ID (0x7F)."); + } + else + { + m_ex_frm_n_bytes += 2; + ex_bytes += 2; + } + buf_left -= 2; dataPtr += 2; - cont_process = (bool)(dataPtr < eodPtr); } - - // if we hit the end of data but still have a complete frame waiting, - // need to continue processing to allow it to be used. - if(!cont_process && (m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE)) - cont_process = true; } // total bytes processed this pass uint32_t total_processed = ex_bytes + f_sync_bytes + h_sync_bytes; // output raw data on raw frame channel - packed raw. - if (((m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE) || !cont_process) && m_b_output_packed_raw) + if (((m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE) || (buf_left == 0)) && m_b_output_packed_raw) { outputRawMonBytes( OCSD_OP_DATA, m_trc_curr_idx, @@ -595,7 +637,11 @@ bool TraceFmtDcdImpl::extractFrame() // update index past the processed data m_trc_curr_idx += total_processed; - return cont_process; + // update any none trace data byte stats + addToFrameStats((uint64_t)(f_sync_bytes + h_sync_bytes)); + + // if we are exiting with a full frame then signal processing to continue + return (bool)(m_ex_frm_n_bytes == OCSD_DFRMTR_FRAME_SIZE); } bool TraceFmtDcdImpl::unpackFrame() @@ -604,6 +650,7 @@ bool TraceFmtDcdImpl::unpackFrame() uint8_t frameFlagBit = 0x1; uint8_t newSrcID = OCSD_BAD_CS_SRC_ID; bool PrevIDandIDChange = false; + uint64_t noneDataBytes = 0; // init output processing m_out_data_idx = 0; @@ -650,6 +697,7 @@ bool TraceFmtDcdImpl::unpackFrame() /// TBD - ID indexing in here. } + noneDataBytes++; } else // it's just data @@ -671,6 +719,7 @@ bool TraceFmtDcdImpl::unpackFrame() { // no matter if change or not, no associated data in byte 15 anyway so just set. m_curr_src_ID = (m_ex_frm_data[14] >> 1) & 0x7f; + noneDataBytes++; } // it's data else @@ -678,6 +727,9 @@ bool TraceFmtDcdImpl::unpackFrame() m_out_data[m_out_data_idx].data[m_out_data[m_out_data_idx].valid++] = m_ex_frm_data[14] | ((frameFlagBit & m_ex_frm_data[15]) ? 0x1 : 0x0); } m_ex_frm_n_bytes = 0; // mark frame as empty; + + noneDataBytes++; // byte 15 is always non-data. + addToFrameStats(noneDataBytes); // update the non data byte stats. return true; } @@ -716,6 +768,8 @@ bool TraceFmtDcdImpl::outputFrame() m_out_data[m_out_processed].data + m_out_data[m_out_processed].used, &bytes_used)); + addToIDStats((uint64_t)bytes_used); + if(!dataPathCont()) { cont_processing = false; @@ -739,7 +793,12 @@ bool TraceFmtDcdImpl::outputFrame() m_out_data[m_out_processed].valid, m_out_data[m_out_processed].data, m_out_data[m_out_processed].id); - } + } + + if (isReservedID(m_out_data[m_out_processed].id)) + addToReservedIDStats((uint64_t)m_out_data[m_out_processed].valid); + else + addToNoIDStats((uint64_t)m_out_data[m_out_processed].valid); m_out_processed++; // skip past this data. } } @@ -754,13 +813,44 @@ bool TraceFmtDcdImpl::outputFrame() m_out_data[m_out_processed].valid, m_out_data[m_out_processed].data, m_out_data[m_out_processed].id); - } + } + addToUnknownIDStats((uint64_t)m_out_data[m_out_processed].valid); m_out_processed++; // skip past this data. } } return cont_processing; } + +void TraceFmtDcdImpl::addToIDStats(uint64_t val) +{ + if (m_pStatsBlock) + m_pStatsBlock->valid_id_bytes += val; +} +void TraceFmtDcdImpl::addToNoIDStats(uint64_t val) +{ + if (m_pStatsBlock) + m_pStatsBlock->no_id_bytes += val; +} + +void TraceFmtDcdImpl::addToFrameStats(uint64_t val) +{ + if (m_pStatsBlock) + m_pStatsBlock->frame_bytes += val; +} + +void TraceFmtDcdImpl::addToUnknownIDStats(uint64_t val) +{ + if (m_pStatsBlock) + m_pStatsBlock->unknown_id_bytes += val; +} + +void TraceFmtDcdImpl::addToReservedIDStats(uint64_t val) +{ + if (m_pStatsBlock) + m_pStatsBlock->reserved_id_bytes += val; +} + /***************************************************************/ /* interface */ /***************************************************************/ @@ -819,21 +909,27 @@ componentAttachPt *TraceFormatterFrameDecoder::getErrLogAttachPt return (m_pDecoder != 0) ? m_pDecoder->getErrorLogAttachPt() : 0; } -/* configuration - set operational mode for incoming stream (has FSYNCS etc) */ -ocsd_err_t TraceFormatterFrameDecoder::Configure(uint32_t cfg_flags) +ocsd_err_t TraceFormatterFrameDecoder::Init() { - if(!m_pDecoder) - { - if(m_instNum >= 0) + if (!m_pDecoder) + { + if (m_instNum >= 0) m_pDecoder = new (std::nothrow) TraceFmtDcdImpl(m_instNum); else m_pDecoder = new (std::nothrow) TraceFmtDcdImpl(); - if(!m_pDecoder) return OCSD_ERR_MEM; + if (!m_pDecoder) return OCSD_ERR_MEM; } - m_pDecoder->DecodeConfigure(cfg_flags); return OCSD_OK; } +/* configuration - set operational mode for incoming stream (has FSYNCS etc) */ +ocsd_err_t TraceFormatterFrameDecoder::Configure(uint32_t cfg_flags) +{ + if (!m_pDecoder) + return OCSD_ERR_NOT_INIT; + return m_pDecoder->DecodeConfigure(cfg_flags); +} + const uint32_t TraceFormatterFrameDecoder::getConfigFlags() const { uint32_t flags = 0; @@ -865,5 +961,10 @@ ocsd_datapath_resp_t TraceFormatterFrameDecoder::Flush() return (m_pDecoder == 0) ? OCSD_RESP_FATAL_NOT_INIT : m_pDecoder->Flush(); } +void TraceFormatterFrameDecoder::SetDemuxStatsBlock(ocsd_demux_stats_t *pStatsBlock) +{ + if (m_pDecoder) + m_pDecoder->SetDemuxStatsBlock(pStatsBlock); +} /* End of File trc_frame_deformatter.cpp */ diff --git a/decoder/source/trc_frame_deformatter_impl.h b/decoder/source/trc_frame_deformatter_impl.h index e1fc17ab259f..3571d5f2fc47 100644 --- a/decoder/source/trc_frame_deformatter_impl.h +++ b/decoder/source/trc_frame_deformatter_impl.h @@ -75,6 +75,8 @@ private: ocsd_err_t DecodeConfigure(uint32_t flags); ocsd_err_t SetForcedSyncIndex(ocsd_trc_index_t index, bool bSet); + void SetDemuxStatsBlock(ocsd_demux_stats_t *pStatsBlock) { m_pStatsBlock = pStatsBlock; }; + private: ocsd_datapath_resp_t executeNoneDataOpAllIDs(ocsd_datapath_op_t op, const ocsd_trc_index_t index = 0); ocsd_datapath_resp_t processTraceData(const ocsd_trc_index_t index, @@ -113,12 +115,20 @@ private: void setRawChanFilterAll(bool bEnable); const bool rawChanEnabled(const uint8_t id) const; - int checkForResetFSyncPatterns(); + ocsd_err_t checkForResetFSyncPatterns(uint32_t &f_sync_bytes); friend class TraceFormatterFrameDecoder; - // attachment points + // stats updates + void addToIDStats(uint64_t val); + void addToNoIDStats(uint64_t val); + void addToFrameStats(uint64_t val); + void addToUnknownIDStats(uint64_t val); + void addToReservedIDStats(uint64_t val); + + bool isReservedID(uint8_t ID) { return ((ID == 0) || (ID >= 0x70)); }; + // attachment points componentAttachPt m_IDStreams[128]; componentAttachPt m_RawTraceFrame; @@ -142,12 +152,18 @@ private: // incoming frame buffer uint8_t m_ex_frm_data[OCSD_DFRMTR_FRAME_SIZE]; // buffer the current frame in case we have to stop part way through int m_ex_frm_n_bytes; // number of valid bytes in the current frame (extraction) + bool m_b_fsync_start_eob; // flag to indicate that the end of the last buffer was a pair of bytes + // (0xffff) that could only validly be the start and FSYNC. ocsd_trc_index_t m_trc_curr_idx_sof; // trace source index at start of frame. - // channel output data - can never be more than a frame of data for a single ID. - out_chan_data m_out_data[7]; // can only be 8 ID changes in a frame, but last on has no associated data so 7 possible data blocks + /* channel output data - can never be more than a frame of data for a single ID. + * 8 possible ID changes per frame. Although the final one can have no associated data, a pathological + * case exists with 7 ID changes, all data associated with a previous frame, except for last + * ID / data byte which is data. Not possible with normal hardware but guard against corrupt input. + */ + out_chan_data m_out_data[8]; // output data for a given ID int m_out_data_idx; // number of out_chan_data frames used. - int m_out_processed; // number of complete out_chan_data frames output. + int m_out_processed; // number of complete out_chan_data frames output. /* local copy of input buffer pointers*/ const uint8_t *m_in_block_base; @@ -159,6 +175,8 @@ private: bool m_b_output_unpacked_raw; bool m_raw_chan_enable[128]; + + ocsd_demux_stats_t *m_pStatsBlock; }; diff --git a/decoder/source/trc_gen_elem.cpp b/decoder/source/trc_gen_elem.cpp index e1774203ebc5..c94c5a7c6848 100644 --- a/decoder/source/trc_gen_elem.cpp +++ b/decoder/source/trc_gen_elem.cpp @@ -54,7 +54,10 @@ static const char *s_elem_descs[][2] = {"OCSD_GEN_TRC_ELEM_TIMESTAMP","Timestamp - preceding elements happeded before this time."}, {"OCSD_GEN_TRC_ELEM_CYCLE_COUNT","Cycle count - cycles since last cycle count value - associated with a preceding instruction range."}, {"OCSD_GEN_TRC_ELEM_EVENT","Event - numbered event or trigger"}, - {"OCSD_GEN_TRC_ELEM_SWTRACE","Software trace packet - may contain data payload."}, + {"OCSD_GEN_TRC_ELEM_SWTRACE","Software trace packet - may contain data payload. STM / ITM hardware trace with channel protocol."}, + {"OCSD_GEN_TRC_ELEM_SYNC_MARKER","Synchronisation marker - marks position in stream of an element that is output later."}, + {"OCSD_GEN_TRC_ELEM_MEMTRANS","Trace indication of transactional memory operations."}, + {"OCSD_GEN_TRC_ELEM_INSTRUMENTATION", "PE instrumentation trace - PE generated SW trace, application dependent protocol."}, {"OCSD_GEN_TRC_ELEM_CUSTOM","Fully custom packet type."} }; @@ -64,7 +67,8 @@ static const char *instr_type[] = { "iBR ", "ISB ", "DSB.DMB", - "WFI.WFE" + "WFI.WFE", + "TSTART" }; #define T_SIZE (sizeof(instr_type) / sizeof(const char *)) @@ -105,6 +109,16 @@ static const char *s_unsync_reason[] = { "bad-packet", // UNSYNC_BAD_PACKET - bad packet at input - resync to restart. "end-of-trace", // UNSYNC_EOT - end of trace info. }; +static const char *s_transaction_type[] = { + "Init", + "Start", + "Commit", + "Fail" +}; + +static const char *s_marker_t[] = { + "Timestamp marker", // ELEM_MARKER_TS +}; void OcsdTraceElement::toString(std::string &str) const { @@ -158,7 +172,14 @@ void OcsdTraceElement::toString(std::string &str) const { oss << "EL" << std::dec << (int)(context.exception_level); } - oss << (context.security_level == ocsd_sec_secure ? "S; " : "N; ") << (context.bits64 ? "64-bit; " : "32-bit; "); + switch (context.security_level) + { + case ocsd_sec_secure: oss << "S; "; break; + case ocsd_sec_nonsecure: oss << "N; "; break; + case ocsd_sec_root: oss << "Root; "; break; + case ocsd_sec_realm: oss << "Realm; "; break; + } + oss << (context.bits64 ? "64-bit; " : "32-bit; "); if(context.vmid_valid) oss << "VMID=0x" << std::hex << context.vmid << "; "; if(context.ctxt_id_valid) @@ -190,6 +211,19 @@ void OcsdTraceElement::toString(std::string &str) const oss << " [" << s_unsync_reason[unsync_eot_info] << "]"; break; + case OCSD_GEN_TRC_ELEM_SYNC_MARKER: + oss << " [" << s_marker_t[sync_marker.type] << "(0x" << std::setfill('0') << std::setw(8) << std::hex << sync_marker.value << ")]"; + break; + + case OCSD_GEN_TRC_ELEM_MEMTRANS: + if (mem_trans <= OCSD_MEM_TRANS_FAIL) + oss << s_transaction_type[mem_trans]; + break; + + case OCSD_GEN_TRC_ELEM_INSTRUMENTATION: + oss << "EL" << std::dec << (int)sw_ite.el << "; 0x" << std::setfill('0') << std::setw(16) << std::hex << sw_ite.value; + break; + default: break; } if(has_cc) diff --git a/decoder/source/trc_printable_elem.cpp b/decoder/source/trc_printable_elem.cpp index 88c7bb226f41..2b60c030d53f 100644 --- a/decoder/source/trc_printable_elem.cpp +++ b/decoder/source/trc_printable_elem.cpp @@ -52,8 +52,6 @@ void trcPrintableElem::getValStr(std::string &valStr, const int valTotalBitSize, assert((valTotalBitSize >= 4) && (valTotalBitSize <= 64)); - uint64_t LimitMask = ~0ULL; - LimitMask >>= 64-valTotalBitSize; valStr = "0x"; if(asHex) diff --git a/decoder/tests/auto-fdo/autofdo.md b/decoder/tests/auto-fdo/autofdo.md index 69ed1520eda8..5d55cd05db77 100644 --- a/decoder/tests/auto-fdo/autofdo.md +++ b/decoder/tests/auto-fdo/autofdo.md @@ -87,12 +87,12 @@ kernel and many targets are using older kernels. To enable CoreSight trace on these targets, Arm have provided backports of the latest CoreSight drivers and ETM strobing patch at: - + This repository can be cloned with: ``` -git clone git://linux-arm.org/linux-coresight-backports.git +git clone https://git.gitlab.arm.com/linux-arm/linux-coresight-backports.git ``` You can include these backports in your kernel by either merging the @@ -433,10 +433,50 @@ sudo ./set_strobing.sh 5000 10000 perf record -e cs_etm/@tmc_etr0/u --per-thread -- " perf inject -i perf.data -o inj.data --itrace=i100000il create_llvm_prof -binary=/path/to/binary -profile=inj.data -out=program.llvmprof +clang -O2 -fprofile-sample-use=program.llvmprof -o program program.c ``` Use `create_gcov` for gcc. +## High Level Summary for recoding on Arm board and decoding on different host + +1. (on Arm board) + + sudo ./set_strobing.sh 5000 10000 + perf record -e cs_etm/@tmc_etr0/u --per-thread -- . + If you specify `-N, --no-buildid-cache`, perf will just take care of recording the target binary and nothing will be copied.
If you don't specify it, any recorded dynamic library will be copied to ~/.debug in the board. + +2. (on Arm board) `perf archive` which saves all the found libraries in a tar (internally, it looks into perf.data file and performs a lookup using perf-buildid-list --with-hits) +3. (on host) `scp` to copy perf.data and the .tar file generated from `perf archive`. +4. (on host) Run `tar xvf perf_data.tar.bz2 -C ~/.debug` to populate the buildid-cache +5. (on host) Double check the setup is correct: + + a. `perf buildid-list -i perf.data` gives you the list of dynamic libraries buildids whose trace has been recorded and saved in perf.data. + b. `perf buildid-cache --list` lists the dynamic libraries in the buildid cache that will be used by `perf inject`. + Make sure the output of (a) and (b) overlaps as in buildid value for those binaries you are interested into optimizing with afdo. + +6. (on host) `perf inject -i perf.data -o inj.data --itrace=i100000il` will check for the dynamic libraries using the buildid inside the buildid-cache and post-process the trace.
buildids have to be the same, otherwise it won't be possible to post-process the trace. + +7. (on host) `create_llvm_prof -binary=/path/to/binary -profile=inj.data -out=program.llvmprof` takes the output from perf-inject and tranforms it into a format that the compiler can read. +8. (on host) `clang -O2 -fprofile-sample-use=program.llvmprof -o program program.c` to make clang use the produced profile.
+ If you are confident enough that your profile is accurate, you can add the `-fprofile-sample-accurate` flag, which will penalize all the callsites without corresponding profile, marking them as cold. + +If you are using the same host for both building the binary to be traced and re-building it with afdo: + +1. You won't need to copy back any dynamic libraries from the board (since you already have them), and can use `--no-buildid-cache` when recording +2. You have to make sure the relevant dynamic libraries to be optimized are present in the buildid-cache. + +You can easily add a dynamic library manually into the build-id cache by running: + +`perf buildid-cache --add -vvv` + +You can easily check what is currently contained in you buildid-cache by running: + +`perf buildid-cache --list` + +You can check the buildid of a given binary/dynamic library: + +`file ` ## References diff --git a/decoder/tests/build/linux/c_api_pkt_print_test/makefile b/decoder/tests/build/linux/c_api_pkt_print_test/makefile index b0b56044e032..f1108e4d3439 100644 --- a/decoder/tests/build/linux/c_api_pkt_print_test/makefile +++ b/decoder/tests/build/linux/c_api_pkt_print_test/makefile @@ -51,12 +51,12 @@ OBJECTS = $(BUILD_DIR)/c_api_pkt_print_test.o LIBS = -L$(LIB_TARGET_DIR) -l$(LIB_BASE_NAME) -l$(LIB_CAPI_NAME) \ -L$(LIB_TEST_TARGET_DIR) -l_echo_test_dcd -all: build_dir copy_libs +all: copy_libs test_app: $(BIN_TEST_TARGET_DIR)/$(PROG) - $(BIN_TEST_TARGET_DIR)/$(PROG): $(OBJECTS) + $(BIN_TEST_TARGET_DIR)/$(PROG): $(OBJECTS) | build_dir mkdir -p $(BIN_TEST_TARGET_DIR) $(LINKER) $(LDFLAGS) $(OBJECTS) -Wl,--start-group $(LIBS) -Wl,--end-group -o $(BIN_TEST_TARGET_DIR)/$(PROG) cp $(LIB_TARGET_DIR)/*.so . @@ -77,7 +77,7 @@ DEPS := $(OBJECTS:%.o=%.d) -include $(DEPS) ## object compile -$(BUILD_DIR)/%.o : %.c +$(BUILD_DIR)/%.o : %.c | build_dir $(CC) $(CFLAGS) $(CC_INCLUDES) -MMD $< -o $@ #### clean diff --git a/decoder/tests/build/linux/echo_test_dcd_lib/makefile b/decoder/tests/build/linux/echo_test_dcd_lib/makefile index 31ca38fe12ed..8c255a85aba2 100644 --- a/decoder/tests/build/linux/echo_test_dcd_lib/makefile +++ b/decoder/tests/build/linux/echo_test_dcd_lib/makefile @@ -48,9 +48,9 @@ CC_INCLUDES = \ OBJECTS = $(BUILD_DIR)/ext_dcd_echo_test.o \ $(BUILD_DIR)/ext_dcd_echo_test_fact.o -all: build_dir $(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a +all: $(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a -$(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a: $(OBJECTS) +$(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a: $(OBJECTS) | build_dir mkdir -p $(LIB_TEST_TARGET_DIR) $(LIB) $(ARFLAGS) $(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a $(OBJECTS) @@ -64,7 +64,7 @@ DEPS := $(OBJECTS:%.o=%.d) -include $(DEPS) ## object compile -$(BUILD_DIR)/%.o : %.c +$(BUILD_DIR)/%.o : %.c | build_dir $(CC) $(CFLAGS) $(CC_INCLUDES) -MMD $< -o $@ #### clean diff --git a/decoder/tests/build/linux/frame_demux_test/makefile b/decoder/tests/build/linux/frame_demux_test/makefile new file mode 100644 index 000000000000..29c75a00138a --- /dev/null +++ b/decoder/tests/build/linux/frame_demux_test/makefile @@ -0,0 +1,88 @@ +######################################################## +# Copyright 2022 ARM Limited. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without modification, +# are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# 3. Neither the name of the copyright holder nor the names of its contributors +# may be used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +################################################################################# + +######## +# opencsd: makefile for the frame demux test program +# + +CXX := $(MASTER_CXX) +LINKER := $(MASTER_LINKER) + +PROG = frame-demux-test + +BUILD_DIR=./$(PLAT_DIR) + +VPATH = $(OCSD_TESTS)/source + +CXX_INCLUDES = \ + -I$(OCSD_TESTS)/source \ + -I$(OCSD_INCLUDE) + +OBJECTS = $(BUILD_DIR)/frame_demux_test.o + +LIBS = -L$(LIB_TEST_TARGET_DIR) -L$(LIB_TARGET_DIR) -l$(LIB_BASE_NAME) + +all: copy_libs + +test_app: $(BIN_TEST_TARGET_DIR)/$(PROG) + + + $(BIN_TEST_TARGET_DIR)/$(PROG): $(OBJECTS) | build_dir + mkdir -p $(BIN_TEST_TARGET_DIR) + $(LINKER) $(LDFLAGS) $(OBJECTS) -Wl,--start-group $(LIBS) -Wl,--end-group -o $(BIN_TEST_TARGET_DIR)/$(PROG) + +build_dir: + mkdir -p $(BUILD_DIR) + +.PHONY: copy_libs +copy_libs: $(BIN_TEST_TARGET_DIR)/$(PROG) + cp $(LIB_TARGET_DIR)/*.so* $(BIN_TEST_TARGET_DIR)/. + + + +#### build rules +## object dependencies +DEPS := $(OBJECTS:%.o=%.d) + +-include $(DEPS) + +## object compile +$(BUILD_DIR)/%.o : %.cpp | build_dir + $(CXX) $(CXXFLAGS) $(CXX_INCLUDES) -MMD $< -o $@ + +#### clean +.PHONY: clean +clean : + -rm $(BIN_TEST_TARGET_DIR)/$(PROG) $(OBJECTS) + -rm $(DEPS) + -rm $(BIN_TEST_TARGET_DIR)/*.so* + -rmdir $(BUILD_DIR) + +# end of file makefile diff --git a/decoder/tests/build/linux/mem_buffer_eg/makefile b/decoder/tests/build/linux/mem_buffer_eg/makefile index 850ed497dafa..79395217a3c0 100644 --- a/decoder/tests/build/linux/mem_buffer_eg/makefile +++ b/decoder/tests/build/linux/mem_buffer_eg/makefile @@ -51,12 +51,12 @@ OBJECTS = $(BUILD_DIR)/mem_buff_demo.o LIBS = -L$(LIB_TEST_TARGET_DIR) -lsnapshot_parser \ -L$(LIB_TARGET_DIR) -l$(LIB_BASE_NAME) -all: build_dir copy_libs +all: copy_libs test_app: $(BIN_TEST_TARGET_DIR)/$(PROG) - $(BIN_TEST_TARGET_DIR)/$(PROG): $(OBJECTS) + $(BIN_TEST_TARGET_DIR)/$(PROG): $(OBJECTS) | build_dir mkdir -p $(BIN_TEST_TARGET_DIR) $(LINKER) $(LDFLAGS) $(OBJECTS) -Wl,--start-group $(LIBS) -Wl,--end-group -o $(BIN_TEST_TARGET_DIR)/$(PROG) @@ -76,7 +76,7 @@ DEPS := $(OBJECTS:%.o=%.d) -include $(DEPS) ## object compile -$(BUILD_DIR)/%.o : %.cpp +$(BUILD_DIR)/%.o : %.cpp | build_dir $(CXX) $(CXXFLAGS) $(CXX_INCLUDES) -MMD $< -o $@ #### clean diff --git a/decoder/tests/build/linux/snapshot_parser_lib/makefile b/decoder/tests/build/linux/snapshot_parser_lib/makefile index 295bab61780e..ae566eba98e5 100644 --- a/decoder/tests/build/linux/snapshot_parser_lib/makefile +++ b/decoder/tests/build/linux/snapshot_parser_lib/makefile @@ -63,9 +63,9 @@ OBJECTS=$(BUILD_DIR)/device_info.o \ $(BUILD_DIR)/snapshot_reader.o \ $(BUILD_DIR)/ss_to_dcdtree.o -all: build_dir $(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a +all: $(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a -$(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a: $(OBJECTS) +$(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a: $(OBJECTS) | build_dir mkdir -p $(LIB_TEST_TARGET_DIR) $(LIB) $(ARFLAGS) $(LIB_TEST_TARGET_DIR)/$(LIB_NAME).a $(OBJECTS) @@ -80,7 +80,7 @@ DEPS := $(OBJECTS:%.o=%.d) -include $(DEPS) ## object compile -$(BUILD_DIR)/%.o : %.cpp +$(BUILD_DIR)/%.o : %.cpp | build_dir $(CXX) $(CXXFLAGS) $(CXX_INCLUDES) -MMD $< -o $@ ### clean diff --git a/decoder/tests/build/linux/trc_pkt_lister/makefile b/decoder/tests/build/linux/trc_pkt_lister/makefile index 54ce27d351a6..df0af0a10737 100644 --- a/decoder/tests/build/linux/trc_pkt_lister/makefile +++ b/decoder/tests/build/linux/trc_pkt_lister/makefile @@ -36,6 +36,7 @@ CXX := $(MASTER_CXX) LINKER := $(MASTER_LINKER) PROG = trc_pkt_lister +PROG_S = trc_pkt_lister_s BUILD_DIR=./$(PLAT_DIR) @@ -51,19 +52,28 @@ OBJECTS = $(BUILD_DIR)/trc_pkt_lister.o LIBS = -L$(LIB_TEST_TARGET_DIR) -lsnapshot_parser \ -L$(LIB_TARGET_DIR) -l$(LIB_BASE_NAME) -all: build_dir copy_libs +all: copy_libs test_app: $(BIN_TEST_TARGET_DIR)/$(PROG) - $(BIN_TEST_TARGET_DIR)/$(PROG): $(OBJECTS) + $(BIN_TEST_TARGET_DIR)/$(PROG): $(OBJECTS) | build_dir mkdir -p $(BIN_TEST_TARGET_DIR) $(LINKER) $(LDFLAGS) $(OBJECTS) -Wl,--start-group $(LIBS) -Wl,--end-group -o $(BIN_TEST_TARGET_DIR)/$(PROG) +$(BIN_TEST_TARGET_DIR)/$(PROG_S): $(OBJECTS) | build_dir + mkdir -p $(BIN_TEST_TARGET_DIR) + $(LINKER) -static $(LDFLAGS) $(OBJECTS) -Wl,--start-group $(LIBS) -Wl,--end-group -o $(BIN_TEST_TARGET_DIR)/$(PROG_S) + + + build_dir: mkdir -p $(BUILD_DIR) .PHONY: copy_libs +ifdef TEST_STATIC_LINKING +copy_libs: $(BIN_TEST_TARGET_DIR)/$(PROG_S) +endif copy_libs: $(BIN_TEST_TARGET_DIR)/$(PROG) cp $(LIB_TARGET_DIR)/*.so* $(BIN_TEST_TARGET_DIR)/. @@ -76,13 +86,16 @@ DEPS := $(OBJECTS:%.o=%.d) -include $(DEPS) ## object compile -$(BUILD_DIR)/%.o : %.cpp +$(BUILD_DIR)/%.o : %.cpp | build_dir $(CXX) $(CXXFLAGS) $(CXX_INCLUDES) -MMD $< -o $@ #### clean .PHONY: clean clean : -rm $(BIN_TEST_TARGET_DIR)/$(PROG) $(OBJECTS) +ifdef TEST_STATIC_LINKING + -rm $(BIN_TEST_TARGET_DIR)/$(PROG_S) +endif -rm $(DEPS) -rm $(BIN_TEST_TARGET_DIR)/*.so* -rmdir $(BUILD_DIR) diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test-dl.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test-dl.exe.recipe new file mode 100644 index 000000000000..2e84a2a7e0ae --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test-dl.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\rel\c_api_pkt_print_test-dl.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test.exe.recipe new file mode 100644 index 000000000000..d6a9f40abd65 --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\rel\c_api_pkt_print_test.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test_dll.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test_dll.exe.recipe new file mode 100644 index 000000000000..9607cfe1b87e --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release-dll/c_api_pkt_print_test_dll.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\rel\c_api_pkt_print_test_dll.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release/c_api_pkt_print_test.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release/c_api_pkt_print_test.exe.recipe new file mode 100644 index 000000000000..d6a9f40abd65 --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release/c_api_pkt_print_test.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\rel\c_api_pkt_print_test.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/Release/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/c_api_pkt_print_test.vcxproj b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/c_api_pkt_print_test.vcxproj new file mode 100644 index 000000000000..985a84e709c2 --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/c_api_pkt_print_test.vcxproj @@ -0,0 +1,347 @@ + + + + + debug-dll + Win32 + + + debug-dll + x64 + + + Debug + Win32 + + + Debug + x64 + + + Release-dll + Win32 + + + Release-dll + x64 + + + Release + Win32 + + + Release + x64 + + + + + + + {3AC169DA-E156-4D16-95DF-73D7302A5606} + Win32Proj + c_api_pkt_print_test + 10.0 + + + + Application + true + MultiByte + v143 + + + Application + true + MultiByte + v143 + true + + + Application + true + MultiByte + v143 + + + Application + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + $(ProjectName)_dll + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + $(ProjectName)_dll + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + $(ProjectName)_dll + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + $(ProjectName)_dll + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;OCSD_USE_STATIC_C_API;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_CAPI_NAME).lib;lib$(LIB_BASE_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + + + + + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_CAPI_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + + + copy ..\..\..\..\lib\win32\dbg\*.dll ..\..\..\bin\win32\dbg\. + + + false + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;OCSD_USE_STATIC_C_API;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + lib$(LIB_CAPI_NAME).lib;lib$(LIB_BASE_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + lib$(LIB_CAPI_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + + + false + + + copy ..\..\..\..\lib\win64\dbg\*.dll ..\..\..\bin\win64\dbg\. + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;OCSD_USE_STATIC_C_API;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME).lib;lib$(LIB_BASE_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + + + false + + + copy ..\..\..\..\lib\win32\rel\*.dll ..\..\..\bin\win32\rel\. + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;OCSD_USE_STATIC_C_API;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME).lib;lib$(LIB_BASE_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\..\tests\ext_dcd_test_eg\c_api_echo_test + + + Console + true + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_CAPI_NAME).lib;ext_dcd_echo_test.lib;%(AdditionalDependencies) + + + false + + + copy ..\..\..\..\lib\win64\rel\*.dll ..\..\..\bin\win64\rel\. + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/c_api_pkt_print_test.vcxproj.filters b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/c_api_pkt_print_test.vcxproj.filters new file mode 100644 index 000000000000..e8fc90b49ed5 --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/c_api_pkt_print_test.vcxproj.filters @@ -0,0 +1,22 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Source Files + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/debug-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/debug-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/debug-dll/c_api_pkt_print_test_dll.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/debug-dll/c_api_pkt_print_test_dll.exe.recipe new file mode 100644 index 000000000000..96aa2daede23 --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/debug-dll/c_api_pkt_print_test_dll.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\dbg\c_api_pkt_print_test_dll.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release-dll/c_api_pkt_print_test_dll.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release-dll/c_api_pkt_print_test_dll.exe.recipe new file mode 100644 index 000000000000..35c848c55b0d --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release-dll/c_api_pkt_print_test_dll.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win64\rel\c_api_pkt_print_test_dll.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release/c_api_pkt_print_test.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release/c_api_pkt_print_test.exe.recipe new file mode 100644 index 000000000000..6707fc0fedbb --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release/c_api_pkt_print_test.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win64\rel\c_api_pkt_print_test.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/Release/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/debug-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/debug-dll/c_api_pkt_print_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/debug-dll/c_api_pkt_print_test_dll.exe.recipe b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/debug-dll/c_api_pkt_print_test_dll.exe.recipe new file mode 100644 index 000000000000..63d719b6744f --- /dev/null +++ b/decoder/tests/build/win-vs2022/c_api_pkt_print_test/x64/debug-dll/c_api_pkt_print_test_dll.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win64\dbg\c_api_pkt_print_test_dll.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/ext_dcd_echo_test/Release/ext_dcd_echo_test.lib.recipe b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/Release/ext_dcd_echo_test.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/Release/ext_dcd_echo_test.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/ext_dcd_echo_test/Release/ext_dcd_echo_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/Release/ext_dcd_echo_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/ext_dcd_echo_test/ext_dcd_echo_test.vcxproj b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/ext_dcd_echo_test.vcxproj new file mode 100644 index 000000000000..74b8e1ad40ed --- /dev/null +++ b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/ext_dcd_echo_test.vcxproj @@ -0,0 +1,291 @@ + + + + + Debug-dll + Win32 + + + Debug-dll + x64 + + + Debug + Win32 + + + Release-dll + Win32 + + + Release-dll + x64 + + + Release + Win32 + + + Debug + x64 + + + Release + x64 + + + + {46219A32-8178-41C1-B3B1-B5A6E547515F} + Win32Proj + ext_dcd_echo_test + 10.0 + + + + StaticLibrary + true + v143 + MultiByte + + + StaticLibrary + true + v143 + MultiByte + + + StaticLibrary + false + v143 + true + MultiByte + + + StaticLibrary + false + v143 + true + MultiByte + + + StaticLibrary + true + v143 + MultiByte + + + StaticLibrary + true + v143 + MultiByte + + + StaticLibrary + false + v143 + true + MultiByte + + + StaticLibrary + false + v143 + true + MultiByte + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + false + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + false + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + + + Level3 + Disabled + _DEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + + + Level3 + Disabled + _DEBUG;_LIB;%(PreprocessorDefinitions) + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + NDEBUG;_LIB;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + NDEBUG;_LIB;%(PreprocessorDefinitions) + ..\..\..\..\include;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + + + + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/ext_dcd_echo_test/ext_dcd_echo_test.vcxproj.filters b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/ext_dcd_echo_test.vcxproj.filters new file mode 100644 index 000000000000..10fc54c1caa4 --- /dev/null +++ b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/ext_dcd_echo_test.vcxproj.filters @@ -0,0 +1,33 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hh;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Header Files + + + Header Files + + + + + Source Files + + + Source Files + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/ext_dcd_echo_test/x64/Release/ext_dcd_echo_test.lib.recipe b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/x64/Release/ext_dcd_echo_test.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/x64/Release/ext_dcd_echo_test.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/ext_dcd_echo_test/x64/Release/ext_dcd_echo_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/ext_dcd_echo_test/x64/Release/ext_dcd_echo_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/frame_demux_test/Win32/Release/frame_demux_test.exe.recipe b/decoder/tests/build/win-vs2022/frame_demux_test/Win32/Release/frame_demux_test.exe.recipe new file mode 100644 index 000000000000..b85a437eb594 --- /dev/null +++ b/decoder/tests/build/win-vs2022/frame_demux_test/Win32/Release/frame_demux_test.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\rel\frame_demux_test.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/frame_demux_test/Win32/Release/frame_demux_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/frame_demux_test/Win32/Release/frame_demux_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/frame_demux_test/frame_demux_test.vcxproj b/decoder/tests/build/win-vs2022/frame_demux_test/frame_demux_test.vcxproj new file mode 100644 index 000000000000..117f9f94e062 --- /dev/null +++ b/decoder/tests/build/win-vs2022/frame_demux_test/frame_demux_test.vcxproj @@ -0,0 +1,172 @@ + + + + + Debug + Win32 + + + Release + Win32 + + + Debug + x64 + + + Release + x64 + + + + 16.0 + Win32Proj + {98ee9884-a4eb-4c75-a911-dfedf992754f} + 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true + true + true + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + true + ..\..\..\..\include + + + Console + true + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + Level3 + true + WIN32;_DEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + true + ..\..\..\..\include + + + Console + true + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + Level3 + true + true + true + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + true + ..\..\..\..\include + + + Console + true + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/frame_demux_test/frame_demux_test.vcxproj.filters b/decoder/tests/build/win-vs2022/frame_demux_test/frame_demux_test.vcxproj.filters new file mode 100644 index 000000000000..8069d24a8e06 --- /dev/null +++ b/decoder/tests/build/win-vs2022/frame_demux_test/frame_demux_test.vcxproj.filters @@ -0,0 +1,22 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;c++;cppm;ixx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hh;hpp;hxx;h++;hm;inl;inc;ipp;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Source Files + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/frame_demux_test/x64/Release/frame_demux_test.exe.recipe b/decoder/tests/build/win-vs2022/frame_demux_test/x64/Release/frame_demux_test.exe.recipe new file mode 100644 index 000000000000..c98207c230e7 --- /dev/null +++ b/decoder/tests/build/win-vs2022/frame_demux_test/x64/Release/frame_demux_test.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win64\rel\frame_demux_test.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/frame_demux_test/x64/Release/frame_demux_test.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/frame_demux_test/x64/Release/frame_demux_test.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/mem-buffer-eg/Win32/Release/mem-buffer-eg.exe.recipe b/decoder/tests/build/win-vs2022/mem-buffer-eg/Win32/Release/mem-buffer-eg.exe.recipe new file mode 100644 index 000000000000..f1b64a06e5aa --- /dev/null +++ b/decoder/tests/build/win-vs2022/mem-buffer-eg/Win32/Release/mem-buffer-eg.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\rel\mem-buffer-eg.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/mem-buffer-eg/Win32/Release/mem-buffer-eg.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/mem-buffer-eg/Win32/Release/mem-buffer-eg.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/mem-buffer-eg/mem-buffer-eg.vcxproj b/decoder/tests/build/win-vs2022/mem-buffer-eg/mem-buffer-eg.vcxproj new file mode 100644 index 000000000000..66de3347413f --- /dev/null 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..\..\..\bin\win$(PlatformArchitecture)\rel\ + $(Platform)\$(Configuration)\ + + + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + $(Platform)\$(Configuration)\ + + + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + + + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + + + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + + + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + + + + Level3 + Disabled + + + ..\..\..\..\include + WIN32;_DEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + + + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + true + + + + + Level3 + Disabled + + + ..\..\..\..\include + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions) + + + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + true + + + + + Level3 + Disabled + false + ..\..\..\..\include + WIN32;_DEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;;%(PreprocessorDefinitions) + + + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + Level3 + Disabled + false + ..\..\..\..\include + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions) + + + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + Level3 + MaxSpeed + true + true + + + ..\..\..\..\include + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + + + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + Level3 + MaxSpeed + true + true + + + ..\..\..\..\include + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + + + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + Level3 + MaxSpeed + true + true + false + ..\..\..\..\include + WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions) + + + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + Level3 + MaxSpeed + true + true + false + ..\..\..\..\include + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + + + true + true + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/mem-buffer-eg/mem-buffer-eg.vcxproj.filters b/decoder/tests/build/win-vs2022/mem-buffer-eg/mem-buffer-eg.vcxproj.filters new file mode 100644 index 000000000000..ce99a9eb1d73 --- /dev/null +++ b/decoder/tests/build/win-vs2022/mem-buffer-eg/mem-buffer-eg.vcxproj.filters @@ -0,0 +1,22 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hh;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Source Files + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/mem-buffer-eg/x64/Release/mem-buffer-eg.exe.recipe b/decoder/tests/build/win-vs2022/mem-buffer-eg/x64/Release/mem-buffer-eg.exe.recipe new file mode 100644 index 000000000000..1f4bcbb09bff --- /dev/null +++ b/decoder/tests/build/win-vs2022/mem-buffer-eg/x64/Release/mem-buffer-eg.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win64\rel\mem-buffer-eg.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/mem-buffer-eg/x64/Release/mem-buffer-eg.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/mem-buffer-eg/x64/Release/mem-buffer-eg.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/Release-dll/snapshot_parser_lib.lib.recipe b/decoder/tests/build/win-vs2022/snapshot_parser_lib/Release-dll/snapshot_parser_lib.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/tests/build/win-vs2022/snapshot_parser_lib/Release-dll/snapshot_parser_lib.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/Release-dll/snapshot_parser_lib.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/snapshot_parser_lib/Release-dll/snapshot_parser_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/Win32/Release/snapshot_parser_lib.lib.recipe b/decoder/tests/build/win-vs2022/snapshot_parser_lib/Win32/Release/snapshot_parser_lib.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/tests/build/win-vs2022/snapshot_parser_lib/Win32/Release/snapshot_parser_lib.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/Win32/Release/snapshot_parser_lib.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/snapshot_parser_lib/Win32/Release/snapshot_parser_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/snapshot_parser_lib.vcxproj b/decoder/tests/build/win-vs2022/snapshot_parser_lib/snapshot_parser_lib.vcxproj new file mode 100644 index 000000000000..0b67d0c90a42 --- /dev/null +++ b/decoder/tests/build/win-vs2022/snapshot_parser_lib/snapshot_parser_lib.vcxproj @@ -0,0 +1,316 @@ + + + + + Debug-dll + Win32 + + + Debug-dll + x64 + + + Debug + Win32 + + + Debug + x64 + + + Release-dll + Win32 + + + Release-dll + x64 + + + Release + Win32 + + + Release + x64 + + + + {DE1F395D-4F53-42FB-8AEF-993A4BF7E411} + Win32Proj + snapshot_parser_lib + 10.0 + + + + StaticLibrary + true + MultiByte + v143 + + + StaticLibrary + true + MultiByte + v143 + + + StaticLibrary + true + MultiByte + v143 + + + StaticLibrary + true + MultiByte + v143 + + + StaticLibrary + false + true + MultiByte + v143 + + + StaticLibrary + false + true + MultiByte + v143 + + + StaticLibrary + false + true + MultiByte + v143 + + + StaticLibrary + false + true + MultiByte + v143 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\dbg\ + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + $(Platform)\$(Configuration)\ + + + ..\..\..\lib\win$(PlatformArchitecture)\rel\ + $(Platform)\$(Configuration)\ + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + false + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + false + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_LIB;%(PreprocessorDefinitions) + ../../../snapshot_parser_lib/include;../../../../include;%(AdditionalIncludeDirectories) + $(OutDir)$(TargetName)_vc$(PlatformToolsetVersion).pdb + + + Windows + true + true + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/snapshot_parser_lib.vcxproj.filters b/decoder/tests/build/win-vs2022/snapshot_parser_lib/snapshot_parser_lib.vcxproj.filters new file mode 100644 index 000000000000..86d406797c3e --- /dev/null +++ b/decoder/tests/build/win-vs2022/snapshot_parser_lib/snapshot_parser_lib.vcxproj.filters @@ -0,0 +1,72 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + Header Files + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/x64/Release/snapshot_parser_lib.lib.recipe b/decoder/tests/build/win-vs2022/snapshot_parser_lib/x64/Release/snapshot_parser_lib.lib.recipe new file mode 100644 index 000000000000..a53f9611dce7 --- /dev/null +++ b/decoder/tests/build/win-vs2022/snapshot_parser_lib/x64/Release/snapshot_parser_lib.lib.recipe @@ -0,0 +1,7 @@ + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/snapshot_parser_lib/x64/Release/snapshot_parser_lib.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/snapshot_parser_lib/x64/Release/snapshot_parser_lib.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/trc_pkt_lister/Release-dll/trc_pkt_lister.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/trc_pkt_lister/Release-dll/trc_pkt_lister.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/trc_pkt_lister/Win32/Release/trc_pkt_lister.exe.recipe b/decoder/tests/build/win-vs2022/trc_pkt_lister/Win32/Release/trc_pkt_lister.exe.recipe new file mode 100644 index 000000000000..7aa56e8c0be9 --- /dev/null +++ b/decoder/tests/build/win-vs2022/trc_pkt_lister/Win32/Release/trc_pkt_lister.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win32\rel\trc_pkt_lister.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/trc_pkt_lister/Win32/Release/trc_pkt_lister.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/trc_pkt_lister/Win32/Release/trc_pkt_lister.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/build/win-vs2022/trc_pkt_lister/trc_pkt_lister.vcxproj b/decoder/tests/build/win-vs2022/trc_pkt_lister/trc_pkt_lister.vcxproj new file mode 100644 index 000000000000..e1daff7a9c4f --- /dev/null +++ b/decoder/tests/build/win-vs2022/trc_pkt_lister/trc_pkt_lister.vcxproj @@ -0,0 +1,327 @@ + + + + + Debug-dll + Win32 + + + Debug-dll + x64 + + + Debug + Win32 + + + Debug + x64 + + + Release-dll + Win32 + + + Release-dll + x64 + + + Release + Win32 + + + Release + x64 + + + + {18ABC652-AB11-4993-9491-1A7FB7117339} + Win32Proj + trc_pkt_lister + 10.0 + + + + Application + true + MultiByte + v143 + false + + + Application + true + MultiByte + v143 + + + Application + true + MultiByte + v143 + + + Application + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + Application + false + true + MultiByte + v143 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + $(Platform)\$(Configuration)\ + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + $(Platform)\$(Configuration)\ + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + + + true + ..\..\..\bin\win$(PlatformArchitecture)\dbg\ + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + $(Platform)\$(Configuration)\ + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + $(Platform)\$(Configuration)\ + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + + + false + ..\..\..\bin\win$(PlatformArchitecture)\rel\ + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + + + + + + + Level3 + Disabled + WIN32;_DEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\dbg\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\dbg\ + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + true + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + true + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + true + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_CONSOLE;%(PreprocessorDefinitions) + ..\..\..\..\include;..\..\..\snapshot_parser_lib\include + + + Console + true + true + true + lib$(LIB_BASE_NAME).lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;%(AdditionalDependencies) + ..\..\..\..\lib\win$(PlatformArchitecture)\rel\;..\..\..\..\tests\lib\win$(PlatformArchitecture)\rel\ + + + + + + + + {de1f395d-4f53-42fb-8aef-993a4bf7e411} + + + + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/trc_pkt_lister/trc_pkt_lister.vcxproj.filters b/decoder/tests/build/win-vs2022/trc_pkt_lister/trc_pkt_lister.vcxproj.filters new file mode 100644 index 000000000000..9f44406f52d6 --- /dev/null +++ b/decoder/tests/build/win-vs2022/trc_pkt_lister/trc_pkt_lister.vcxproj.filters @@ -0,0 +1,27 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + + + Source Files + + + + + Header Files + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/trc_pkt_lister/x64/Release/trc_pkt_lister.exe.recipe b/decoder/tests/build/win-vs2022/trc_pkt_lister/x64/Release/trc_pkt_lister.exe.recipe new file mode 100644 index 000000000000..69966dcb8834 --- /dev/null +++ b/decoder/tests/build/win-vs2022/trc_pkt_lister/x64/Release/trc_pkt_lister.exe.recipe @@ -0,0 +1,11 @@ + + + + + C:\work\OpenCSD\ocsd-linaro\decoder\tests\bin\win64\rel\trc_pkt_lister.exe + + + + + + \ No newline at end of file diff --git a/decoder/tests/build/win-vs2022/trc_pkt_lister/x64/Release/trc_pkt_lister.vcxproj.FileListAbsolute.txt b/decoder/tests/build/win-vs2022/trc_pkt_lister/x64/Release/trc_pkt_lister.vcxproj.FileListAbsolute.txt new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/decoder/tests/run_pkt_decode_single.bash b/decoder/tests/run_pkt_decode_single.bash new file mode 100755 index 000000000000..30252402fdf9 --- /dev/null +++ b/decoder/tests/run_pkt_decode_single.bash @@ -0,0 +1,77 @@ +#!/bin/bash +################################################################################# +# Copyright 2018 ARM. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without modification, +# are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# 3. Neither the name of the copyright holder nor the names of its contributors +# may be used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +################################################################################# +# OpenCSD library: run single test +# +# +################################################################################# +# Usage options:- +# * default: run test on binary + libs in ./bin/linux64/rel +# run_pkt_decode_tests.bash +# +# * use installed opencsd libraries & program +# run_pkt_decode_tests.bash use-installed +# +# + +OUT_DIR=./results +SNAPSHOT_DIR=./snapshots +BIN_DIR=./bin/linux64/rel/ + +TEST="a57_single_step" + +mkdir -p ${OUT_DIR} + +if [ "$1" == "use-installed" ]; then + BIN_DIR="" + shift +fi + +if [ "$1" != "" ]; then + TEST=$1 + shift +fi + +echo "Running trc_pkt_lister on single snapshot ${TEST}" + + +if [ "${BIN_DIR}" != "" ]; then + echo "Tests using BIN_DIR = ${BIN_DIR}" + export LD_LIBRARY_PATH=${BIN_DIR}. + echo "LD_LIBRARY_PATH set to ${BIN_DIR}" +else + echo "Tests using installed binaries" +fi + +# === test the decode set === +${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/${TEST}" $@ -decode -logfilename "${OUT_DIR}/${TEST}.ppl" +echo "Done : Return $?" + + diff --git a/decoder/tests/run_pkt_decode_tests-ete.bash b/decoder/tests/run_pkt_decode_tests-ete.bash new file mode 100755 index 000000000000..a9fe0cc36e07 --- /dev/null +++ b/decoder/tests/run_pkt_decode_tests-ete.bash @@ -0,0 +1,117 @@ +#!/bin/bash +################################################################################# +# Copyright 2019 ARM. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without modification, +# are permitted provided that the following conditions are met: +# +# 1. Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright notice, +# this list of conditions and the following disclaimer in the documentation +# and/or other materials provided with the distribution. +# +# 3. Neither the name of the copyright holder nor the names of its contributors +# may be used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +################################################################################# +# OpenCSD library: Test script. +# +# Test script to run packet lister on each of the snapshots retained with the repository. +# No attempt is made to compare output results to previous versions, (output formatting +# may change due to bugfix / enhancements) or assess the validity of the trace output. +# +################################################################################# +# Usage options:- +# * default: run tests on binary + libs in ./bin/linux64/rel +# run_pkt_decode_tests.bash +# +# * use installed opencsd libraries & program +# run_pkt_decode_tests.bash use-installed +# +# * use supplied path for binary + libs (must have trailing /) +# run_pkt_decode_tests.bash // +# + +OUT_DIR=./results-ete +SNAPSHOT_DIR=./snapshots-ete +BIN_DIR=./bin/linux64/rel/ + +# directories for tests using full decode +declare -a test_dirs_decode=( "001-ack_test" + "002-ack_test_scr" + "ete-bc-instr" + "ete_ip" + "ete-ite-instr" + "ete_mem" + "ete_spec_1" + "ete_spec_2" + "ete_spec_3" + "event_test" + "infrastructure" + "q_elem" + "src_addr" + "tme_simple" + "tme_tcancel" + "tme_test" + "trace_file_cid_vmid" + "trace_file_vmid" + "ts_bit64_set" + "ts_marker" + ) + + +# directories for tests using I_SRC_ADDR_range option +declare -a test_dirs_decode_src_addr_opt=( "002-ack_test_scr" + "ete_ip" + "src_addr" + ) + + +echo "Running trc_pkt_lister on snapshot directories." + +mkdir -p ${OUT_DIR} + +if [ "$1" == "use-installed" ]; then + BIN_DIR="" + shift +elif [ "$1" == "-bindir" ]; then + BIN_DIR=$2 + shift + shift +fi + +echo "Tests using BIN_DIR = ${BIN_DIR}" + +if [ "${BIN_DIR}" != "" ]; then + export LD_LIBRARY_PATH=${BIN_DIR}. + echo "LD_LIBRARY_PATH set to ${BIN_DIR}" +fi + +# === test the decode set === +for test_dir in "${test_dirs_decode[@]}" +do + echo "Testing $test_dir..." + ${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/$test_dir" $@ -decode -logfilename "${OUT_DIR}/$test_dir.ppl" + echo "Done : Return $?" +done + +for test_dir_n in "${test_dirs_decode_src_addr_opt[@]}" +do + echo "Testing with -src_addr_n $test_dir_n..." + ${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/$test_dir_n" $@ -decode -src_addr_n -logfilename "${OUT_DIR}/${test_dir_n}_src_addr_N.ppl" + echo "Done : Return $?" +done diff --git a/decoder/tests/run_pkt_decode_tests.bash b/decoder/tests/run_pkt_decode_tests.bash index 09f642b097c8..27a855e92899 100755 --- a/decoder/tests/run_pkt_decode_tests.bash +++ b/decoder/tests/run_pkt_decode_tests.bash @@ -40,10 +40,10 @@ # run_pkt_decode_tests.bash # # * use installed opencsd libraries & program -# run_pkt_decode_tests.bash use-installed +# run_pkt_decode_tests.bash use-installed # # * use supplied path for binary + libs (must have trailing /) -# run_pkt_decode_tests.bash // +# run_pkt_decode_tests.bash -bindir // # OUT_DIR=./results @@ -62,6 +62,7 @@ declare -a test_dirs_decode=( "juno-ret-stck" "stm_only" "stm_only-2" "stm_only-juno" + "stm-issue-27" "TC2" "Snowball" "test-file-mem-offsets" @@ -74,8 +75,11 @@ mkdir -p ${OUT_DIR} if [ "$1" == "use-installed" ]; then BIN_DIR="" -elif [ "$1" != "" ]; then - BIN_DIR=$1 + shift +elif [ "$1" == "-bindir" ]; then + BIN_DIR=$2 + shift + shift fi echo "Tests using BIN_DIR = ${BIN_DIR}" @@ -89,17 +93,17 @@ fi for test_dir in "${test_dirs_decode[@]}" do echo "Testing $test_dir..." - ${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/$test_dir" -decode -logfilename "${OUT_DIR}/$test_dir.ppl" + ${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/$test_dir" $@ -decode -logfilename "${OUT_DIR}/$test_dir.ppl" echo "Done : Return $?" done # === test a packet only example === echo "Testing init-short-addr..." -${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/init-short-addr" -pkt_mon -logfilename "${OUT_DIR}/init-short-addr.ppl" +${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/init-short-addr" $@ -pkt_mon -logfilename "${OUT_DIR}/init-short-addr.ppl" # === test the TPIU deformatter === echo "Testing a55-test-tpiu..." -${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/a55-test-tpiu" -dstream_format -o_raw_packed -o_raw_unpacked -logfilename "${OUT_DIR}/a55-test-tpiu.ppl" +${BIN_DIR}trc_pkt_lister -ss_dir "${SNAPSHOT_DIR}/a55-test-tpiu" $@ -dstream_format -o_raw_packed -o_raw_unpacked -logfilename "${OUT_DIR}/a55-test-tpiu.ppl" echo "Done : Return $?" # === test the C-API lib - this test prog is not installed === @@ -110,3 +114,12 @@ if [ "$1" != "use-installed" ]; then echo "moving result file." mv ./c_api_test.log ./${OUT_DIR}/c_api_test.ppl fi + +# === run the Frame decoder test - program not installed === +if [ "$1" != "use-installed" ]; then + echo "Running Frame demux test" + ${BIN_DIR}frame-demux-test > /dev/null + echo "Done : Return $?" + echo "moving result file." + mv ./frame_demux_test.ppl ./${OUT_DIR}/. +fi diff --git a/decoder/tests/snapshot_parser_lib/include/snapshot_parser.h b/decoder/tests/snapshot_parser_lib/include/snapshot_parser.h index 8b9171255d0c..9e5b37189099 100644 --- a/decoder/tests/snapshot_parser_lib/include/snapshot_parser.h +++ b/decoder/tests/snapshot_parser_lib/include/snapshot_parser.h @@ -135,9 +135,9 @@ namespace Parser std::vector GetBufferNameList(ParsedTrace &metadata); - static ITraceErrorLog *s_pErrorLogger = 0; - static ocsd_hndl_err_log_t s_errlog_handle = 0; - static bool s_verbose_logging = true; + //static ITraceErrorLog *s_pErrorLogger = 0; + //static ocsd_hndl_err_log_t s_errlog_handle = 0; + //static bool s_verbose_logging = true; void SetIErrorLogger(ITraceErrorLog *i_err_log); void SetVerboseLogging(bool verbose); diff --git a/decoder/tests/snapshot_parser_lib/include/snapshot_parser_util.h b/decoder/tests/snapshot_parser_lib/include/snapshot_parser_util.h index 815afe9267d9..d4fd6cd952ad 100644 --- a/decoder/tests/snapshot_parser_lib/include/snapshot_parser_util.h +++ b/decoder/tests/snapshot_parser_lib/include/snapshot_parser_util.h @@ -35,6 +35,7 @@ #ifndef ARM_SNAPSHOT_PARSER_UTIL_H_INCLUDED #define ARM_SNAPSHOT_PARSER_UTIL_H_INCLUDED +#include #include #include #include diff --git a/decoder/tests/snapshot_parser_lib/include/ss_key_value_names.h b/decoder/tests/snapshot_parser_lib/include/ss_key_value_names.h index 6e3a301dae50..ad0823b556a0 100644 --- a/decoder/tests/snapshot_parser_lib/include/ss_key_value_names.h +++ b/decoder/tests/snapshot_parser_lib/include/ss_key_value_names.h @@ -58,6 +58,10 @@ const char * const ETMv4RegIDR11("TRCIDR11"); const char * const ETMv4RegIDR12("TRCIDR12"); const char * const ETMv4RegIDR13("TRCIDR13"); +/*** ETE ***/ +const char *const ETEProtocol("ETE"); +const char *const ETERegDevArch("TRCDEVARCH"); + /*** ETMv3/PTM ***/ const char * const ETMv3Protocol("ETM3"); const char * const PTMProtocol("PTM1"); diff --git a/decoder/tests/snapshot_parser_lib/include/ss_to_dcdtree.h b/decoder/tests/snapshot_parser_lib/include/ss_to_dcdtree.h index a84e1843881f..3c85f9d152da 100644 --- a/decoder/tests/snapshot_parser_lib/include/ss_to_dcdtree.h +++ b/decoder/tests/snapshot_parser_lib/include/ss_to_dcdtree.h @@ -52,7 +52,7 @@ public: void initialise(SnapShotReader *m_pReader, ITraceErrorLog *m_pErrLogInterface); - bool createDecodeTree(const std::string &SourceBufferName, bool bPacketProcOnly); + bool createDecodeTree(const std::string &SourceBufferName, bool bPacketProcOnly, uint32_t add_create_flags = 0); void destroyDecodeTree(); DecodeTree *getDecodeTree() const { return m_pDecodeTree; }; const char *getBufferFileName() const { return m_BufferFileName.c_str(); }; @@ -66,6 +66,7 @@ private: bool createETMv4Decoder(const std::string &coreName, Parser::Parsed *devSrc, const bool bDataChannel = false); bool createETMv3Decoder(const std::string &coreName, Parser::Parsed *devSrc); bool createPTMDecoder(const std::string &coreName, Parser::Parsed *devSrc); + bool createETEDecoder(const std::string &coreName, Parser::Parsed *devSrc); // TBD add etmv4d // create a decoder related to a software trace source (ITM, STM) @@ -91,7 +92,7 @@ private: void processDumpfiles(std::vector &dumps); - + uint32_t m_add_create_flags; bool m_bInit; DecodeTree *m_pDecodeTree; diff --git a/decoder/tests/snapshot_parser_lib/source/snapshot_parser.cpp b/decoder/tests/snapshot_parser_lib/source/snapshot_parser.cpp index 6e62d1e200c2..4570700dd4c8 100644 --- a/decoder/tests/snapshot_parser_lib/source/snapshot_parser.cpp +++ b/decoder/tests/snapshot_parser_lib/source/snapshot_parser.cpp @@ -49,6 +49,10 @@ using namespace Parser; #include "opencsd.h" +static ITraceErrorLog *s_pErrorLogger = 0; +static ocsd_hndl_err_log_t s_errlog_handle = 0; +static bool s_verbose_logging = true; + /************************************************************************* * Note, this file handles the parsring of the general (device specific) * ini file and the (much smaller) device_list file diff --git a/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp b/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp index 4eeec732c15b..902ce566f44e 100644 --- a/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp +++ b/decoder/tests/snapshot_parser_lib/source/ss_to_dcdtree.cpp @@ -45,6 +45,7 @@ CreateDcdTreeFromSnapShot::CreateDcdTreeFromSnapShot() : m_BufferFileName("") { m_errlog_handle = 0; + m_add_create_flags = 0; } CreateDcdTreeFromSnapShot::~CreateDcdTreeFromSnapShot() @@ -63,8 +64,9 @@ void CreateDcdTreeFromSnapShot::initialise(SnapShotReader *pReader, ITraceErrorL } } -bool CreateDcdTreeFromSnapShot::createDecodeTree(const std::string &SourceName, bool bPacketProcOnly) +bool CreateDcdTreeFromSnapShot::createDecodeTree(const std::string &SourceName, bool bPacketProcOnly, uint32_t add_create_flags) { + m_add_create_flags = add_create_flags; if(m_bInit) { if(!m_pReader->snapshotReadOK()) @@ -236,6 +238,10 @@ bool CreateDcdTreeFromSnapShot::createPEDecoder(const std::string &coreName, Par { bCreatedDecoder = createPTMDecoder(coreName,devSrc); } + else if (devTypeName == ETEProtocol) + { + bCreatedDecoder = createETEDecoder(coreName, devSrc); + } return bCreatedDecoder; } @@ -277,7 +283,7 @@ bool CreateDcdTreeFromSnapShot::createETMv4Decoder(const std::string &coreName, EtmV4Config configObj(&config); const char *decoderName = bDataChannel ? OCSD_BUILTIN_DCD_ETMV4D : OCSD_BUILTIN_DCD_ETMV4I; - err = m_pDecodeTree->createDecoder(decoderName, m_bPacketProcOnly ? OCSD_CREATE_FLG_PACKET_PROC : OCSD_CREATE_FLG_FULL_DECODER,&configObj); + err = m_pDecodeTree->createDecoder(decoderName, m_add_create_flags | (m_bPacketProcOnly ? OCSD_CREATE_FLG_PACKET_PROC : OCSD_CREATE_FLG_FULL_DECODER),&configObj); if(err == OCSD_OK) createdDecoder = true; @@ -291,6 +297,53 @@ bool CreateDcdTreeFromSnapShot::createETMv4Decoder(const std::string &coreName, return createdDecoder; } +bool CreateDcdTreeFromSnapShot::createETEDecoder(const std::string &coreName, Parser::Parsed *devSrc) +{ + bool createdDecoder = false; + bool configOK = true; + + // generate the config data from the device data. + ocsd_ete_cfg config; + + // ete regs are same names Etmv4 in places... + regs_to_access_t regs_to_access[] = { + { ETMv4RegCfg, true, &config.reg_configr, 0 }, + { ETMv4RegIDR, true, &config.reg_traceidr, 0 }, + { ETMv4RegIDR0, true, &config.reg_idr0, 0 }, + { ETMv4RegIDR1, false, &config.reg_idr1, 0x4100F403 }, + { ETMv4RegIDR2, true, &config.reg_idr2, 0 }, + { ETMv4RegIDR8, false, &config.reg_idr8, 0 }, + { ETERegDevArch, false, &config.reg_devarch, 0x47705A13 }, + }; + + // extract registers + configOK = getRegisters(devSrc->regDefs, sizeof(regs_to_access) / sizeof(regs_to_access_t), regs_to_access); + + // extract core profile + if (configOK) + configOK = getCoreProfile(coreName, config.arch_ver, config.core_prof); + + // good config - generate the decoder on the tree. + if (configOK) + { + ocsd_err_t err = OCSD_OK; + ETEConfig configObj(&config); + const char *decoderName = OCSD_BUILTIN_DCD_ETE; + + err = m_pDecodeTree->createDecoder(decoderName, m_add_create_flags | (m_bPacketProcOnly ? OCSD_CREATE_FLG_PACKET_PROC : OCSD_CREATE_FLG_FULL_DECODER), &configObj); + + if (err == OCSD_OK) + createdDecoder = true; + else + { + std::string msg = "Snapshot processor : failed to create " + (std::string)decoderName + " decoder on decode tree."; + LogError(ocsdError(OCSD_ERR_SEV_ERROR, err, msg)); + } + } + + return createdDecoder; +} + // create an ETMv3 decoder based on the register values in the deviceN.ini file. bool CreateDcdTreeFromSnapShot::createETMv3Decoder(const std::string &coreName, Parser::Parsed *devSrc) { diff --git a/decoder/tests/snapshots-ete/001-ack_test/ETE_0_s1.ini b/decoder/tests/snapshots-ete/001-ack_test/ETE_0_s1.ini new file mode 100644 index 000000000000..85938730c344 --- /dev/null +++ b/decoder/tests/snapshots-ete/001-ack_test/ETE_0_s1.ini @@ -0,0 +1,15 @@ +[device] +name=ETE_0_s1 +class=trace_source +type=ETE + + +[regs] +TRCCONFIGR=0x1 +TRCTRACEIDR=0x2 +TRCDEVARCH=0x47705a13 +TRCIDR0=0x8000aa1 +TRCIDR1=0x4100fff0 +TRCIDR2=0xc0001088 +TRCIDR8=0x000 + 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0000000000000000000000000000000000000000..9bc1ceb99ba71fa19c3062ee6db00ddeedf7342f GIT binary patch literal 132 zcmV-~0DJ%7M^>`oZ&tG6`+u_I0}-<1FCMbxJA1O`w*#{0UuUxDlY6r1BM`FcZv(RH zZ+o)rD+;phBNMXjI|#Dx=S;Hj+hVfugJ81qOBk~A#|5(V&wsM@4{Wmb!*8fE$8(4y>8d~~)`gemWu#A6@anK3GuwwZ-vZuUc6@D&LgFm!Aw)a^0}f lyknFphC#O>$s$tZ8nxKTB^yqOg=sEH;7k4qF1iz9gy zucM)|GON&-ED8UD+$A&FoYzTgFO$97z2VL5s%V6cDRwsBd^_L!_I(fF_gZrxUmEN6 zprGi*?HnkYedY3VuEzmMmx>1IoAluAsG_R?PCz5GE(pASr17v(kB+}w$vJ>~B}I=1 zT!^9;udtoq{&rK~bd&-Xxhvxs?`1$scCgmaIIpl?`>qt-;L9~Vx0f#`49r{L;RB=g z$bXHWtD!hs@-IzOLs~_qnF4<#zg7>h=)cssS!1OIt8_uWp8V@;z%fQI(${k4YtSk! zJ#!(z#t)6fIKa(gfm=UScURig0>QN$wEdl`q*ZRDz_qf%4;u>C%Nkqn6}~HL^6t1C z1~2dMMg75+q@3q~u1IpTy^r?*FDHVg7hU*IDmVwfqQJd~v*mAW+cz2FglvX&Wdf7- z%93PQX^Kjes4OZp%sNT?fUCcM(*uGLuANPN3c9;+JYO2;02i42QP^{iB=eib?5&AY zbU$b@e=1*^GJIkAhM;JL`3iT-oeqC9!-J4Ye3SI_jhTuiJ0a#k(Io$lqq;uV@hLBD X*0Fh~p>CPU0: TestName - v8int_bfm +5515 clk cpu0 IT (5479) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +5515 clk cpu0 MW1 13000000:000013000000_NS 0a +5516 clk cpu0 IT (5480) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +5516 clk cpu0 MR1 0004ceb2:00001004ceb2_NS 0a +5516 clk cpu0 R X8 000000000000000A +5517 clk cpu0 IT (5481) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +5517 clk cpu0 R cpsr 800003c0 +5518 clk cpu0 IS (5482) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +5519 clk cpu0 IS (5483) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +5520 clk cpu0 IT (5484) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +5520 clk cpu0 R cpsr 000003c0 +5521 clk cpu0 IT (5485) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +5522 clk cpu0 IT (5486) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +5522 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +5522 clk cpu0 R X9 0000000013000000 +5523 clk cpu0 IT (5487) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +5523 clk cpu0 R X27 000000000004CEB2 +5524 clk cpu0 IT (5488) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +5524 clk cpu0 R X20 000000000004CEB3 +TUBE CPU0: +5525 clk cpu0 IT (5489) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +5525 clk cpu0 MW1 13000000:000013000000_NS 0a +5526 clk cpu0 IT (5490) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +5526 clk cpu0 MR1 0004ceb3:00001004ceb3_NS 00 +5526 clk cpu0 R X8 0000000000000000 +5527 clk cpu0 IT (5491) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +5527 clk cpu0 R cpsr 800003c0 +5528 clk cpu0 IS (5492) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +5529 clk cpu0 IT (5493) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +5530 clk cpu0 IT (5494) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +5531 clk cpu0 IT (5495) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +5531 clk cpu0 MR8 03045850:000000845850_NS 00000000_0004ce9b +5531 clk cpu0 MR8 03045858:000000845858_NS 00000000_0009c560 +5531 clk cpu0 R X19 000000000004CE9B +5531 clk cpu0 R X30 000000000009C560 +5532 clk cpu0 IT (5496) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +5532 clk cpu0 MR8 03045840:000000845840_NS 00000000_00000000 +5532 clk cpu0 MR8 03045848:000000845848_NS 00000000_03008528 +5532 clk cpu0 R X20 0000000003008528 +5532 clk cpu0 R X21 0000000000000000 +5533 clk cpu0 IT (5497) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +5533 clk cpu0 MR8 03045830:000000845830_NS fffe0000_00003fff +5533 clk cpu0 MR8 03045838:000000845838_NS ffffffff_fffe0003 +5533 clk cpu0 R X22 FFFFFFFFFFFE0003 +5533 clk cpu0 R X23 FFFE000000003FFF +5534 clk cpu0 IT (5498) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +5534 clk cpu0 MR8 03045820:000000845820_NS 00000000_0000003c +5534 clk cpu0 MR8 03045828:000000845828_NS 00000000_00007c00 +5534 clk cpu0 R X24 0000000000007C00 +5534 clk cpu0 R X25 000000000000003C +5535 clk cpu0 IT (5499) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +5535 clk cpu0 MR8 03045810:000000845810_NS 00010001_00010001 +5535 clk cpu0 MR8 03045818:000000845818_NS ffe000ff_ffe000ff +5535 clk cpu0 R X26 FFE000FFFFE000FF +5535 clk cpu0 R X27 0001000100010001 +5536 clk cpu0 IT (5500) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +5536 clk cpu0 MR8 03045800:000000845800_NS ff7fff7f_ff7fff7f +5536 clk cpu0 R X28 FF7FFF7FFF7FFF7F +5537 clk cpu0 IT (5501) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +5537 clk cpu0 R SP_EL0 0000000003045860 +5538 clk cpu0 IT (5502) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +5539 clk cpu0 IT (5503) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +5539 clk cpu0 R X0 0000000000000001 +5540 clk cpu0 IT (5504) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +5540 clk cpu0 R X1 0000000000000000 +5541 clk cpu0 IT (5505) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +5541 clk cpu0 R X2 0000000000000000 +5542 clk cpu0 IT (5506) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +5543 clk cpu0 IT (5507) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +5544 clk cpu0 IT (5508) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +5544 clk cpu0 R X0 0000000003008528 +5545 clk cpu0 IT (5509) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +5545 clk cpu0 R X30 000000000009C57C +5546 clk cpu0 IT (5510) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +5547 clk cpu0 IT (5511) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +5547 clk cpu0 R X8 0000000006216000 +5548 clk cpu0 IT (5512) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +5548 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5548 clk cpu0 R X8 0000000000000001 +5549 clk cpu0 IT (5513) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +5549 clk cpu0 R cpsr 800003c0 +5550 clk cpu0 IT (5514) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +5551 clk cpu0 IT (5515) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +5552 clk cpu0 IT (5516) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +5552 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_00000000 +5552 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_0009d8ac +5552 clk cpu0 R X19 0000000000000000 +5552 clk cpu0 R X30 000000000009D8AC +5553 clk cpu0 IT (5517) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +5553 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_00f00000 +5553 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_00300000 +5553 clk cpu0 R X20 0000000000300000 +5553 clk cpu0 R X21 0000000000F00000 +5554 clk cpu0 IT (5518) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +5554 clk cpu0 R SP_EL0 00000000030458F0 +5555 clk cpu0 IT (5519) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +5556 clk cpu0 IT (5520) 0009d8ac:00001009d8ac_NS b0030b88 O EL0t_n : ADRP x8,0x620e8ac +5556 clk cpu0 R X8 000000000620E000 +5557 clk cpu0 IT (5521) 0009d8b0:00001009d8b0_NS 91000108 O EL0t_n : ADD x8,x8,#0 +5557 clk cpu0 R X8 000000000620E000 +5558 clk cpu0 IT (5522) 0009d8b4:00001009d8b4_NS 52800309 O EL0t_n : MOV w9,#0x18 +5558 clk cpu0 R X9 0000000000000018 +5559 clk cpu0 IT (5523) 0009d8b8:00001009d8b8_NS 5280018a O EL0t_n : MOV w10,#0xc +5559 clk cpu0 R X10 000000000000000C +5560 clk cpu0 IT (5524) 0009d8bc:00001009d8bc_NS 9ba92269 O EL0t_n : UMADDL x9,w19,w9,x8 +5560 clk cpu0 R X9 000000000620E000 +5560 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c6 ALLOC 0x00001009d8c0_NS +5560 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1630 ALLOC 0x00001009d8c0_NS +5561 clk cpu0 IT (5525) 0009d8c0:00001009d8c0_NS 9baa226a O EL0t_n : UMADDL x10,w19,w10,x8 +5561 clk cpu0 R X10 000000000620E000 +5562 clk cpu0 IT (5526) 0009d8c4:00001009d8c4_NS 5290060b O EL0t_n : MOV w11,#0x8030 +5562 clk cpu0 R X11 0000000000008030 +5563 clk cpu0 IT (5527) 0009d8c8:00001009d8c8_NS 91402129 O EL0t_n : ADD x9,x9,#8,LSL #12 +5563 clk cpu0 R X9 0000000006216000 +5564 clk cpu0 IT (5528) 0009d8cc:00001009d8cc_NS 8b0b014a O EL0t_n : ADD x10,x10,x11 +5564 clk cpu0 R X10 0000000006216030 +5565 clk cpu0 IT (5529) 0009d8d0:00001009d8d0_NS 5290090b O EL0t_n : MOV w11,#0x8048 +5565 clk cpu0 R X11 0000000000008048 +5566 clk cpu0 IT (5530) 0009d8d4:00001009d8d4_NS b900013f O EL0t_n : STR wzr,[x9,#0] +5566 clk cpu0 MW4 06216000:000015216000_NS 00000000 +5566 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 INVAL 0x000050282000_NS +5566 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 ALLOC 0x000015216000_NS +5566 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 DIRTY 0x000015216000_NS +5566 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000015216000_NS +5566 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000015216000_NS +5567 clk cpu0 IT (5531) 0009d8d8:00001009d8d8_NS b9000d3f O EL0t_n : STR wzr,[x9,#0xc] +5567 clk cpu0 MW4 0621600c:00001521600c_NS 00000000 +5568 clk cpu0 IT (5532) 0009d8dc:00001009d8dc_NS 52800069 O EL0t_n : MOV w9,#3 +5568 clk cpu0 R X9 0000000000000003 +5569 clk cpu0 IT (5533) 0009d8e0:00001009d8e0_NS b82b6909 O EL0t_n : STR w9,[x8,x11] +5569 clk cpu0 MW4 06216048:000015216048_NS 00000003 +5569 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0102 DIRTY 0x000015216040_NS +5569 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1810 INVAL 0x000015216040_NS +5570 clk cpu0 IT (5534) 0009d8e4:00001009d8e4_NS 29007d5f O EL0t_n : STP wzr,wzr,[x10,#0] +5570 clk cpu0 MW4 06216030:000015216030_NS 00000000 +5570 clk cpu0 MW4 06216034:000015216034_NS 00000000 +5571 clk cpu0 IT (5535) 0009d8e8:00001009d8e8_NS b900095f O EL0t_n : STR wzr,[x10,#8] +5571 clk cpu0 MW4 06216038:000015216038_NS 00000000 +5572 clk cpu0 IT (5536) 0009d8ec:00001009d8ec_NS 52900989 O EL0t_n : MOV w9,#0x804c +5572 clk cpu0 R X9 000000000000804C +5573 clk cpu0 IT (5537) 0009d8f0:00001009d8f0_NS b8696901 O EL0t_n : LDR w1,[x8,x9] +5573 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5573 clk cpu0 R X1 0000000000000001 +5574 clk cpu0 IT (5538) 0009d8f4:00001009d8f4_NS 52900c29 O EL0t_n : MOV w9,#0x8061 +5574 clk cpu0 R X9 0000000000008061 +5575 clk cpu0 IT (5539) 0009d8f8:00001009d8f8_NS 8b090100 O EL0t_n : ADD x0,x8,x9 +5575 clk cpu0 R X0 0000000006216061 +5576 clk cpu0 IT (5540) 0009d8fc:00001009d8fc_NS 97fffe9e O EL0t_n : BL 0x9d374 +5576 clk cpu0 R X30 000000000009D900 +5577 clk cpu0 IT (5541) 0009d374:00001009d374_NS f81e0ff4 O EL0t_n : STR x20,[sp,#-0x20]! +5577 clk cpu0 MW8 030458d0:0000008458d0_NS 00000000_00300000 +5577 clk cpu0 R SP_EL0 00000000030458D0 +5578 clk cpu0 IT (5542) 0009d378:00001009d378_NS a9017bf3 O EL0t_n : STP x19,x30,[sp,#0x10] +5578 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_00000000 +5578 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_0009d900 +5579 clk cpu0 IT (5543) 0009d37c:00001009d37c_NS 2a0103f4 O EL0t_n : MOV w20,w1 +5579 clk cpu0 R X20 0000000000000001 +5580 clk cpu0 IT (5544) 0009d380:00001009d380_NS aa0003f3 O EL0t_n : MOV x19,x0 +5580 clk cpu0 R X19 0000000006216061 +5581 clk cpu0 IT (5545) 0009d384:00001009d384_NS 940027b7 O EL0t_n : BL 0xa7260 +5581 clk cpu0 R X30 000000000009D388 +5582 clk cpu0 IT (5546) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +5582 clk cpu0 R X0 0000000000000000 +5583 clk cpu0 IT (5547) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +5583 clk cpu0 R cpsr 800007c0 +5584 clk cpu0 IT (5548) 0009d388:00001009d388_NS b9000fe0 O EL0t_n : STR w0,[sp,#0xc] +5584 clk cpu0 MW4 030458dc:0000008458dc_NS 00000000 +5584 clk cpu0 R cpsr 800003c0 +5585 clk cpu0 IT (5549) 0009d38c:00001009d38c_NS b9400fe8 O EL0t_n : LDR w8,[sp,#0xc] +5585 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +5585 clk cpu0 R X8 0000000000000000 +5586 clk cpu0 IT (5550) 0009d390:00001009d390_NS 91000e69 O EL0t_n : ADD x9,x19,#3 +5586 clk cpu0 R X9 0000000006216064 +5587 clk cpu0 IT (5551) 0009d394:00001009d394_NS 38686928 O EL0t_n : LDRB w8,[x9,x8] +5587 clk cpu0 MR1 06216064:000015216064_NS 00 +5587 clk cpu0 R X8 0000000000000000 +5588 clk cpu0 IT (5552) 0009d398:00001009d398_NS b9400fea O EL0t_n : LDR w10,[sp,#0xc] +5588 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +5588 clk cpu0 R X10 0000000000000000 +5589 clk cpu0 IT (5553) 0009d39c:00001009d39c_NS 2a2803e8 O EL0t_n : MVN w8,w8 +5589 clk cpu0 R X8 00000000FFFFFFFF +5590 clk cpu0 IT (5554) 0009d3a0:00001009d3a0_NS 382a6928 O EL0t_n : STRB w8,[x9,x10] +5590 clk cpu0 MW1 06216064:000015216064_NS ff +5591 clk cpu0 IT (5555) 0009d3a4:00001009d3a4_NS d5033f9f O EL0t_n : DSB SY +5592 clk cpu0 IT (5556) 0009d3a8:00001009d3a8_NS aa1303e0 O EL0t_n : MOV x0,x19 +5592 clk cpu0 R X0 0000000006216061 +5593 clk cpu0 IT (5557) 0009d3ac:00001009d3ac_NS 97ffed6c O EL0t_n : BL 0x9895c +5593 clk cpu0 R X30 000000000009D3B0 +5594 clk cpu0 IT (5558) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +5594 clk cpu0 R X8 0000000006216000 +5595 clk cpu0 IT (5559) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +5595 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5595 clk cpu0 R X8 0000000000000001 +5596 clk cpu0 IT (5560) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +5596 clk cpu0 R cpsr 800003c0 +5597 clk cpu0 IT (5561) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +5598 clk cpu0 IT (5562) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +5599 clk cpu0 IT (5563) 0009d3b0:00001009d3b0_NS 39400668 O EL0t_n : LDRB w8,[x19,#1] +5599 clk cpu0 MR1 06216062:000015216062_NS 00 +5599 clk cpu0 R X8 0000000000000000 +5600 clk cpu0 IT (5564) 0009d3b4:00001009d3b4_NS 11000508 O EL0t_n : ADD w8,w8,#1 +5600 clk cpu0 R X8 0000000000000001 +5601 clk cpu0 IT (5565) 0009d3b8:00001009d3b8_NS 39000668 O EL0t_n : STRB w8,[x19,#1] +5601 clk cpu0 MW1 06216062:000015216062_NS 01 +5602 clk cpu0 IT (5566) 0009d3bc:00001009d3bc_NS 39400668 O EL0t_n : LDRB w8,[x19,#1] +5602 clk cpu0 MR1 06216062:000015216062_NS 01 +5602 clk cpu0 R X8 0000000000000001 +5603 clk cpu0 IT (5567) 0009d3c0:00001009d3c0_NS 6b14011f O EL0t_n : CMP w8,w20 +5603 clk cpu0 R cpsr 600003c0 +5604 clk cpu0 IS (5568) 0009d3c4:00001009d3c4_NS 540002c1 O EL0t_n : B.NE 0x9d41c +5605 clk cpu0 IT (5569) 0009d3c8:00001009d3c8_NS 3900067f O EL0t_n : STRB wzr,[x19,#1] +5605 clk cpu0 MW1 06216062:000015216062_NS 00 +5606 clk cpu0 IT (5570) 0009d3cc:00001009d3cc_NS b9000bff O EL0t_n : STR wzr,[sp,#8] +5606 clk cpu0 MW4 030458d8:0000008458d8_NS 00000000 +5607 clk cpu0 IT (5571) 0009d3d0:00001009d3d0_NS b0030bc8 O EL0t_n : ADRP x8,0x62163d0 +5607 clk cpu0 R X8 0000000006216000 +5608 clk cpu0 IT (5572) 0009d3d4:00001009d3d4_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +5608 clk cpu0 MR4 030458d8:0000008458d8_NS 00000000 +5608 clk cpu0 R X9 0000000000000000 +5609 clk cpu0 IT (5573) 0009d3d8:00001009d3d8_NS b9404d0a O EL0t_n : LDR w10,[x8,#0x4c] +5609 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5609 clk cpu0 R X10 0000000000000001 +5610 clk cpu0 IT (5574) 0009d3dc:00001009d3dc_NS 6b0a013f O EL0t_n : CMP w9,w10 +5610 clk cpu0 R cpsr 800003c0 +5611 clk cpu0 IS (5575) 0009d3e0:00001009d3e0_NS 54000142 O EL0t_n : B.CS 0x9d408 +5612 clk cpu0 IT (5576) 0009d3e4:00001009d3e4_NS b9400fe9 O EL0t_n : LDR w9,[sp,#0xc] +5612 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +5612 clk cpu0 R X9 0000000000000000 +5613 clk cpu0 IT (5577) 0009d3e8:00001009d3e8_NS 91000e6a O EL0t_n : ADD x10,x19,#3 +5613 clk cpu0 R X10 0000000006216064 +5614 clk cpu0 IT (5578) 0009d3ec:00001009d3ec_NS 38696949 O EL0t_n : LDRB w9,[x10,x9] +5614 clk cpu0 MR1 06216064:000015216064_NS ff +5614 clk cpu0 R X9 00000000000000FF +5615 clk cpu0 IT (5579) 0009d3f0:00001009d3f0_NS b9400beb O EL0t_n : LDR w11,[sp,#8] +5615 clk cpu0 MR4 030458d8:0000008458d8_NS 00000000 +5615 clk cpu0 R X11 0000000000000000 +5616 clk cpu0 IT (5580) 0009d3f4:00001009d3f4_NS 382b6949 O EL0t_n : STRB w9,[x10,x11] +5616 clk cpu0 MW1 06216064:000015216064_NS ff +5617 clk cpu0 IT (5581) 0009d3f8:00001009d3f8_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +5617 clk cpu0 MR4 030458d8:0000008458d8_NS 00000000 +5617 clk cpu0 R X9 0000000000000000 +5618 clk cpu0 IT (5582) 0009d3fc:00001009d3fc_NS 11000529 O EL0t_n : ADD w9,w9,#1 +5618 clk cpu0 R X9 0000000000000001 +5619 clk cpu0 IT (5583) 0009d400:00001009d400_NS b9000be9 O EL0t_n : STR w9,[sp,#8] +5619 clk cpu0 MW4 030458d8:0000008458d8_NS 00000001 +5620 clk cpu0 IT (5584) 0009d404:00001009d404_NS 17fffff4 O EL0t_n : B 0x9d3d4 +5621 clk cpu0 IT (5585) 0009d3d4:00001009d3d4_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +5621 clk cpu0 MR4 030458d8:0000008458d8_NS 00000001 +5621 clk cpu0 R X9 0000000000000001 +5622 clk cpu0 IT (5586) 0009d3d8:00001009d3d8_NS b9404d0a O EL0t_n : LDR w10,[x8,#0x4c] +5622 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5622 clk cpu0 R X10 0000000000000001 +5623 clk cpu0 IT (5587) 0009d3dc:00001009d3dc_NS 6b0a013f O EL0t_n : CMP w9,w10 +5623 clk cpu0 R cpsr 600003c0 +5624 clk cpu0 IT (5588) 0009d3e0:00001009d3e0_NS 54000142 O EL0t_n : B.CS 0x9d408 +5625 clk cpu0 IT (5589) 0009d408:00001009d408_NS d5033fbf O EL0t_n : DMB SY +5626 clk cpu0 IT (5590) 0009d40c:00001009d40c_NS b9400fe8 O EL0t_n : LDR w8,[sp,#0xc] +5626 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +5626 clk cpu0 R X8 0000000000000000 +5627 clk cpu0 IT (5591) 0009d410:00001009d410_NS 8b080268 O EL0t_n : ADD x8,x19,x8 +5627 clk cpu0 R X8 0000000006216061 +5628 clk cpu0 IT (5592) 0009d414:00001009d414_NS 39400d08 O EL0t_n : LDRB w8,[x8,#3] +5628 clk cpu0 MR1 06216064:000015216064_NS ff +5628 clk cpu0 R X8 00000000000000FF +5629 clk cpu0 IT (5593) 0009d418:00001009d418_NS 39000a68 O EL0t_n : STRB w8,[x19,#2] +5629 clk cpu0 MW1 06216063:000015216063_NS ff +5630 clk cpu0 IT (5594) 0009d41c:00001009d41c_NS d5033f9f O EL0t_n : DSB SY +5631 clk cpu0 IT (5595) 0009d420:00001009d420_NS aa1303e0 O EL0t_n : MOV x0,x19 +5631 clk cpu0 R X0 0000000006216061 +5632 clk cpu0 IT (5596) 0009d424:00001009d424_NS 97fff985 O EL0t_n : BL 0x9ba38 +5632 clk cpu0 R X30 000000000009D428 +5633 clk cpu0 IT (5597) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +5634 clk cpu0 IT (5598) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +5634 clk cpu0 R X8 0000000006216000 +5635 clk cpu0 IT (5599) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +5635 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5635 clk cpu0 R X8 0000000000000001 +5636 clk cpu0 IT (5600) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +5636 clk cpu0 R cpsr 800003c0 +5637 clk cpu0 IT (5601) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +5638 clk cpu0 IT (5602) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +5639 clk cpu0 IT (5603) 0009d428:00001009d428_NS 39400a68 O EL0t_n : LDRB w8,[x19,#2] +5639 clk cpu0 MR1 06216063:000015216063_NS ff +5639 clk cpu0 R X8 00000000000000FF +5640 clk cpu0 IT (5604) 0009d42c:00001009d42c_NS b9400fe9 O EL0t_n : LDR w9,[sp,#0xc] +5640 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +5640 clk cpu0 R X9 0000000000000000 +5641 clk cpu0 IT (5605) 0009d430:00001009d430_NS 8b090269 O EL0t_n : ADD x9,x19,x9 +5641 clk cpu0 R X9 0000000006216061 +5642 clk cpu0 IT (5606) 0009d434:00001009d434_NS 39400d29 O EL0t_n : LDRB w9,[x9,#3] +5642 clk cpu0 MR1 06216064:000015216064_NS ff +5642 clk cpu0 R X9 00000000000000FF +5643 clk cpu0 IT (5607) 0009d438:00001009d438_NS 6b09011f O EL0t_n : CMP w8,w9 +5643 clk cpu0 R cpsr 600003c0 +5644 clk cpu0 IT (5608) 0009d43c:00001009d43c_NS 54000060 O EL0t_n : B.EQ 0x9d448 +5645 clk cpu0 IT (5609) 0009d448:00001009d448_NS d5033fbf O EL0t_n : DMB SY +5646 clk cpu0 IT (5610) 0009d44c:00001009d44c_NS a9417bf3 O EL0t_n : LDP x19,x30,[sp,#0x10] +5646 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_00000000 +5646 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_0009d900 +5646 clk cpu0 R X19 0000000000000000 +5646 clk cpu0 R X30 000000000009D900 +5647 clk cpu0 IT (5611) 0009d450:00001009d450_NS f84207f4 O EL0t_n : LDR x20,[sp],#0x20 +5647 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_00300000 +5647 clk cpu0 R SP_EL0 00000000030458F0 +5647 clk cpu0 R X20 0000000000300000 +5648 clk cpu0 IT (5612) 0009d454:00001009d454_NS d65f03c0 O EL0t_n : RET +5648 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c8 ALLOC 0x00001009d900_NS +5648 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1640 ALLOC 0x00001009d900_NS +5649 clk cpu0 IT (5613) 0009d900:00001009d900_NS a9417bf3 O EL0t_n : LDP x19,x30,[sp,#0x10] +5649 clk cpu0 MR8 03045900:000000845900_NS 18181818_18181818 +5649 clk cpu0 MR8 03045908:000000845908_NS 00000000_01000094 +5649 clk cpu0 R X19 1818181818181818 +5649 clk cpu0 R X30 0000000001000094 +5650 clk cpu0 IT (5614) 0009d904:00001009d904_NS 52800020 O EL0t_n : MOV w0,#1 +5650 clk cpu0 R X0 0000000000000001 +5651 clk cpu0 IT (5615) 0009d908:00001009d908_NS f84207f4 O EL0t_n : LDR x20,[sp],#0x20 +5651 clk cpu0 MR8 030458f0:0000008458f0_NS 001fffff_fffffffe +5651 clk cpu0 R SP_EL0 0000000003045910 +5651 clk cpu0 R X20 001FFFFFFFFFFFFE +5652 clk cpu0 IT (5616) 0009d90c:00001009d90c_NS 1400264b O EL0t_n : B 0xa7238 +5652 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0191 ALLOC 0x0000100a7200_NS +5652 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1c81 ALLOC 0x0000100a7200_NS +5653 clk cpu0 IT (5617) 000a7238:0000100a7238_NS d4000121 O EL0t_n : SVC #9 +5653 clk cpu0 E 000a7238:0000100a7238_NS EL1h 00000019 CoreEvent_ModeChange +5653 clk cpu0 E 000a7238:0000100a7238_NS 00000088 CoreEvent_LOWER_64_SYNC +5653 clk cpu0 R cpsr 620003c5 +5653 clk cpu0 R PMBIDR_EL1 00000030 +5653 clk cpu0 R ESR_EL1 56000009 +5653 clk cpu0 R SPSR_EL1 600003c0 +5653 clk cpu0 R TRBIDR_EL1 000000000000003b +5653 clk cpu0 R ELR_EL1 00000000000a723c +5653 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +5653 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +5653 clk cpu0 TTW ITLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +5653 clk cpu0 TTW ITLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +5653 clk cpu0 TTW ITLB LPAE 1:2 000070450000 0000000070460003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070460000 +5653 clk cpu0 TTW ITLB LPAE 1:3 000070460068 00000000100344c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000010034000 +5653 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x00034000_NS EL1_n vmid=0:0x0010034000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5653 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x00034000_NS EL1_n vmid=0:0x0010034000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5653 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000016000000_NS +5653 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070440000_NS +5653 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070250000_NS +5653 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070450000_NS +5653 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0002 INVAL 0x000070450040_NS +5653 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0002 ALLOC 0x000070460040_NS +5653 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 INVAL 0x00001009d400_NS +5653 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 ALLOC 0x000010035400_NS +5653 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0019 ALLOC 0x000070460040_NS +5653 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1502 ALLOC 0x000010035400_NS +5654 clk cpu0 IT (5618) 00035400:000010035400_NS 1400168d O EL1h_n : B 0x3ae34 +5654 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070450000_NS +5654 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070250000_NS +5654 clk cpu0 TTW ITLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +5654 clk cpu0 TTW ITLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +5654 clk cpu0 TTW ITLB LPAE 1:2 000070450000 0000000070460003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070460000 +5654 clk cpu0 TTW ITLB LPAE 1:3 000070460070 00000000100384c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000010038000 +5654 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x00038000_NS EL1_n vmid=0:0x0010038000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5654 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x00038000_NS EL1_n vmid=0:0x0010038000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5654 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070440000_NS +5654 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070450000_NS +5654 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0170 ALLOC 0x00001003ae00_NS +5654 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0b80 ALLOC 0x00001003ae00_NS +5655 clk cpu0 IT (5619) 0003ae34:00001003ae34_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +5655 clk cpu0 R SP_EL1 0000000003800710 +5656 clk cpu0 IT (5620) 0003ae38:00001003ae38_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +5656 clk cpu0 MW8 03800710:000010800710_NS 00000000_00000001 +5656 clk cpu0 MW8 03800718:000010800718_NS 00000000_00000001 +5657 clk cpu0 IT (5621) 0003ae3c:00001003ae3c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +5657 clk cpu0 R X0 0000000056000009 +5657 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0173 ALLOC 0x00001003ae40_NS +5657 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0b91 ALLOC 0x00001003ae40_NS +5658 clk cpu0 IT (5622) 0003ae40:00001003ae40_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +5658 clk cpu0 R X1 0000000000000015 +5659 clk cpu0 IT (5623) 0003ae44:00001003ae44_NS 7100543f O EL1h_n : CMP w1,#0x15 +5659 clk cpu0 R cpsr 620003c5 +5660 clk cpu0 IT (5624) 0003ae48:00001003ae48_NS 54000060 O EL1h_n : B.EQ 0x3ae54 +5661 clk cpu0 IT (5625) 0003ae54:00001003ae54_NS 53003c01 O EL1h_n : UXTH w1,w0 +5661 clk cpu0 R X1 0000000000000009 +5662 clk cpu0 IT (5626) 0003ae58:00001003ae58_NS 7100143f O EL1h_n : CMP w1,#5 +5662 clk cpu0 R cpsr 220003c5 +5663 clk cpu0 IS (5627) 0003ae5c:00001003ae5c_NS 540155ab O EL1h_n : B.LT 0x3d910 +5664 clk cpu0 IT (5628) 0003ae60:00001003ae60_NS 7100283f O EL1h_n : CMP w1,#0xa +5664 clk cpu0 R cpsr 820003c5 +5665 clk cpu0 IS (5629) 0003ae64:00001003ae64_NS 5401556c O EL1h_n : B.GT 0x3d910 +5666 clk cpu0 IT (5630) 0003ae68:00001003ae68_NS 7100203f O EL1h_n : CMP w1,#8 +5666 clk cpu0 R cpsr 220003c5 +5667 clk cpu0 IS (5631) 0003ae6c:00001003ae6c_NS 540153e0 O EL1h_n : B.EQ 0x3d8e8 +5668 clk cpu0 IT (5632) 0003ae70:00001003ae70_NS 71001c3f O EL1h_n : CMP w1,#7 +5668 clk cpu0 R cpsr 220003c5 +5669 clk cpu0 IS (5633) 0003ae74:00001003ae74_NS 54000180 O EL1h_n : B.EQ 0x3aea4 +5670 clk cpu0 IT (5634) 0003ae78:00001003ae78_NS 7100183f O EL1h_n : CMP w1,#6 +5670 clk cpu0 R cpsr 220003c5 +5671 clk cpu0 IS (5635) 0003ae7c:00001003ae7c_NS 54014f00 O EL1h_n : B.EQ 0x3d85c +5671 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0175 ALLOC 0x00001003ae80_NS +5671 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0ba1 ALLOC 0x00001003ae80_NS +5672 clk cpu0 IT (5636) 0003ae80:00001003ae80_NS 7100243f O EL1h_n : CMP w1,#9 +5672 clk cpu0 R cpsr 620003c5 +5673 clk cpu0 IT (5637) 0003ae84:00001003ae84_NS 54014ac0 O EL1h_n : B.EQ 0x3d7dc +5673 clk cpu0 TTW ITLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +5673 clk cpu0 TTW ITLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +5673 clk cpu0 TTW ITLB LPAE 1:2 000070450000 0000000070460003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070460000 +5673 clk cpu0 TTW ITLB LPAE 1:3 000070460078 000000001003c4c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x000000001003c000 +5673 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x0003c000_NS EL1_n vmid=0:0x001003c000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5673 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x0003c000_NS EL1_n vmid=0:0x001003c000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5673 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070250000_NS +5673 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070440000_NS +5673 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bf ALLOC 0x00001003d7c0_NS +5673 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15f1 ALLOC 0x00001003d7c0_NS +5674 clk cpu0 IT (5638) 0003d7dc:00001003d7dc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +5674 clk cpu0 MR8 03800710:000010800710_NS 00000000_00000001 +5674 clk cpu0 MR8 03800718:000010800718_NS 00000000_00000001 +5674 clk cpu0 R X0 0000000000000001 +5674 clk cpu0 R X1 0000000000000001 +5675 clk cpu0 IT (5639) 0003d7e0:00001003d7e0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +5675 clk cpu0 R SP_EL1 0000000003800810 +5676 clk cpu0 IT (5640) 0003d7e4:00001003d7e4_NS f100081f O EL1h_n : CMP x0,#2 +5676 clk cpu0 R cpsr 820003c5 +5677 clk cpu0 IS (5641) 0003d7e8:00001003d7e8_NS 540001ec O EL1h_n : B.GT 0x3d824 +5678 clk cpu0 IT (5642) 0003d7ec:00001003d7ec_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +5678 clk cpu0 MW8 03800800:000010800800_NS 00000000_00000000 +5678 clk cpu0 MW8 03800808:000010800808_NS 00000000_00300000 +5678 clk cpu0 R SP_EL1 0000000003800800 +5679 clk cpu0 IT (5643) 0003d7f0:00001003d7f0_NS d5384022 O EL1h_n : MRS x2,ELR_EL1 +5679 clk cpu0 R X2 00000000000A723C +5680 clk cpu0 IT (5644) 0003d7f4:00001003d7f4_NS d5384003 O EL1h_n : MRS x3,SPSR_el1 +5680 clk cpu0 R X3 00000000600003C0 +5681 clk cpu0 IT (5645) 0003d7f8:00001003d7f8_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +5681 clk cpu0 MW8 038007f0:0000108007f0_NS 00000000_000a723c +5681 clk cpu0 MW8 038007f8:0000108007f8_NS 00000000_600003c0 +5681 clk cpu0 R SP_EL1 00000000038007F0 +5682 clk cpu0 IT (5646) 0003d7fc:00001003d7fc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +5682 clk cpu0 MW8 038007e0:0000108007e0_NS 7fff7fff_7fff7fff +5682 clk cpu0 MW8 038007e8:0000108007e8_NS 00000000_01000094 +5682 clk cpu0 R SP_EL1 00000000038007E0 +5682 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x00001003d800_NS +5682 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1601 ALLOC 0x00001003d800_NS +5683 clk cpu0 IT (5647) 0003d800:00001003d800_NS a9bf3bed O EL1h_n : STP x13,x14,[sp,#-0x10]! +5683 clk cpu0 MW8 038007d0:0000108007d0_NS 00000000_0a2e7473 +5683 clk cpu0 MW8 038007d8:0000108007d8_NS 00000000_2e747300 +5683 clk cpu0 R SP_EL1 00000000038007D0 +5684 clk cpu0 IT (5648) 0003d804:00001003d804_NS 97ff4bd5 O EL1h_n : BL 0x10758 +5684 clk cpu0 R X30 000000000003D808 +5684 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003b ALLOC 0x000010010740_NS +5684 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01d1 ALLOC 0x000010010740_NS +5685 clk cpu0 IT (5649) 00010758:000010010758_NS a9bf7bfc O EL1h_n : STP x28,x30,[sp,#-0x10]! +5685 clk cpu0 MW8 038007c0:0000108007c0_NS ff7fff7f_ff7fff7f +5685 clk cpu0 MW8 038007c8:0000108007c8_NS 00000000_0003d808 +5685 clk cpu0 R SP_EL1 00000000038007C0 +5686 clk cpu0 IT (5650) 0001075c:00001001075c_NS d14403ff O EL1h_n : SUB sp,sp,#0x100,LSL #12 +5686 clk cpu0 R SP_EL1 00000000037007C0 +5687 clk cpu0 IT (5651) 00010760:000010010760_NS d10683ff O EL1h_n : SUB sp,sp,#0x1a0 +5687 clk cpu0 R SP_EL1 0000000003700620 +5688 clk cpu0 IT (5652) 00010764:000010010764_NS 914403e8 O EL1h_n : ADD x8,sp,#0x100,LSL #12 +5688 clk cpu0 R X8 0000000003800620 +5689 clk cpu0 IT (5653) 00010768:000010010768_NS 91067108 O EL1h_n : ADD x8,x8,#0x19c +5689 clk cpu0 R X8 00000000038007BC +5690 clk cpu0 IT (5654) 0001076c:00001001076c_NS 9105c3e9 O EL1h_n : ADD x9,sp,#0x170 +5690 clk cpu0 R X9 0000000003700790 +5691 clk cpu0 IT (5655) 00010770:000010010770_NS b000000a O EL1h_n : ADRP x10,0x11770 +5691 clk cpu0 R X10 0000000000011000 +5692 clk cpu0 IT (5656) 00010774:000010010774_NS 9108d14a O EL1h_n : ADD x10,x10,#0x234 +5692 clk cpu0 R X10 0000000000011234 +5693 clk cpu0 IT (5657) 00010778:000010010778_NS 5280270b O EL1h_n : MOV w11,#0x138 +5693 clk cpu0 R X11 0000000000000138 +5694 clk cpu0 IT (5658) 0001077c:00001001077c_NS d280002c O EL1h_n : MOV x12,#1 +5694 clk cpu0 R X12 0000000000000001 +5694 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003c ALLOC 0x000010010780_NS +5694 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e1 ALLOC 0x000010010780_NS +5695 clk cpu0 IT (5659) 00010780:000010010780_NS 5280000d O EL1h_n : MOV w13,#0 +5695 clk cpu0 R X13 0000000000000000 +5696 clk cpu0 IT (5660) 00010784:000010010784_NS 529e000e O EL1h_n : MOV w14,#0xf000 +5696 clk cpu0 R X14 000000000000F000 +5697 clk cpu0 IT (5661) 00010788:000010010788_NS 5280018f O EL1h_n : MOV w15,#0xc +5697 clk cpu0 R X15 000000000000000C +5698 clk cpu0 IT (5662) 0001078c:00001001078c_NS 5281e010 O EL1h_n : MOV w16,#0xf00 +5698 clk cpu0 R X16 0000000000000F00 +5699 clk cpu0 IT (5663) 00010790:000010010790_NS 52800111 O EL1h_n : MOV w17,#8 +5699 clk cpu0 R X17 0000000000000008 +5700 clk cpu0 IT (5664) 00010794:000010010794_NS 52800032 O EL1h_n : MOV w18,#1 +5700 clk cpu0 R X18 0000000000000001 +5701 clk cpu0 IT (5665) 00010798:000010010798_NS 90017fc1 O EL1h_n : ADRP x1,0x3008798 +5701 clk cpu0 R X1 0000000003008000 +5702 clk cpu0 IT (5666) 0001079c:00001001079c_NS 9114c021 O EL1h_n : ADD x1,x1,#0x530 +5702 clk cpu0 R X1 0000000003008530 +5703 clk cpu0 IT (5667) 000107a0:0000100107a0_NS d2800002 O EL1h_n : MOV x2,#0 +5703 clk cpu0 R X2 0000000000000000 +5704 clk cpu0 IT (5668) 000107a4:0000100107a4_NS b00180c3 O EL1h_n : ADRP x3,0x30297a4 +5704 clk cpu0 R X3 0000000003029000 +5705 clk cpu0 IT (5669) 000107a8:0000100107a8_NS 91144063 O EL1h_n : ADD x3,x3,#0x510 +5705 clk cpu0 R X3 0000000003029510 +5706 clk cpu0 IT (5670) 000107ac:0000100107ac_NS b00180c4 O EL1h_n : ADRP x4,0x30297ac +5706 clk cpu0 R X4 0000000003029000 +5707 clk cpu0 IT (5671) 000107b0:0000100107b0_NS 910fc084 O EL1h_n : ADD x4,x4,#0x3f0 +5707 clk cpu0 R X4 00000000030293F0 +5708 clk cpu0 IT (5672) 000107b4:0000100107b4_NS b9000100 O EL1h_n : STR w0,[x8,#0] +5708 clk cpu0 MW4 038007bc:0000108007bc_NS 00000001 +5709 clk cpu0 IT (5673) 000107b8:0000100107b8_NS f90063e8 O EL1h_n : STR x8,[sp,#0xc0] +5709 clk cpu0 TTW DTLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +5709 clk cpu0 TTW DTLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +5709 clk cpu0 TTW DTLB LPAE 1:2 000070450008 0000000070470003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070470000 +5709 clk cpu0 TTW DTLB LPAE 1:3 000070472e00 0000000000f00463 : BLOCK ATTRIDX=0 NS=1 AP=1 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000000f00000 +5709 clk cpu0 MW8 037006e0:000000f006e0_NS 00000000_038007bc +5709 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x03700000_NS EL1_n vmid=0:0x0000f00000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5709 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x03700000_NS EL1_n vmid=0:0x0000f00000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070450000_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070250000_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070440000_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070450000_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0170 ALLOC 0x000070472e00_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0037 CLEAN 0x0000108006c0_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0037 INVAL 0x0000108006c0_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0037 ALLOC 0x000000f006c0_NS +5709 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0037 DIRTY 0x000000f006c0_NS +5709 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0b81 ALLOC 0x000070472e00_NS +5709 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01b2 ALLOC 0x0000108006c0_NS +5709 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f006c0_NS +5709 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f006c0_NS +5710 clk cpu0 IT (5674) 000107bc:0000100107bc_NS f9005fe9 O EL1h_n : STR x9,[sp,#0xb8] +5710 clk cpu0 MW8 037006d8:000000f006d8_NS 00000000_03700790 +5710 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003e ALLOC 0x0000100107c0_NS +5710 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01f0 ALLOC 0x0000100107c0_NS +5711 clk cpu0 IT (5675) 000107c0:0000100107c0_NS f9005bea O EL1h_n : STR x10,[sp,#0xb0] +5711 clk cpu0 MW8 037006d0:000000f006d0_NS 00000000_00011234 +5712 clk cpu0 IT (5676) 000107c4:0000100107c4_NS b900afeb O EL1h_n : STR w11,[sp,#0xac] +5712 clk cpu0 MW4 037006cc:000000f006cc_NS 00000138 +5713 clk cpu0 IT (5677) 000107c8:0000100107c8_NS f90053ec O EL1h_n : STR x12,[sp,#0xa0] +5713 clk cpu0 MW8 037006c0:000000f006c0_NS 00000000_00000001 +5714 clk cpu0 IT (5678) 000107cc:0000100107cc_NS b9009fed O EL1h_n : STR w13,[sp,#0x9c] +5714 clk cpu0 MW4 037006bc:000000f006bc_NS 00000000 +5714 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0035 ALLOC 0x000000f00680_NS +5714 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0035 DIRTY 0x000000f00680_NS +5714 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00680_NS +5714 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00680_NS +5715 clk cpu0 IT (5679) 000107d0:0000100107d0_NS b9009bee O EL1h_n : STR w14,[sp,#0x98] +5715 clk cpu0 MW4 037006b8:000000f006b8_NS 0000f000 +5716 clk cpu0 IT (5680) 000107d4:0000100107d4_NS b90097ef O EL1h_n : STR w15,[sp,#0x94] +5716 clk cpu0 MW4 037006b4:000000f006b4_NS 0000000c +5717 clk cpu0 IT (5681) 000107d8:0000100107d8_NS b90093f0 O EL1h_n : STR w16,[sp,#0x90] +5717 clk cpu0 MW4 037006b0:000000f006b0_NS 00000f00 +5718 clk cpu0 IT (5682) 000107dc:0000100107dc_NS b9008ff1 O EL1h_n : STR w17,[sp,#0x8c] +5718 clk cpu0 MW4 037006ac:000000f006ac_NS 00000008 +5719 clk cpu0 IT (5683) 000107e0:0000100107e0_NS b9008bf2 O EL1h_n : STR w18,[sp,#0x88] +5719 clk cpu0 MW4 037006a8:000000f006a8_NS 00000001 +5720 clk cpu0 IT (5684) 000107e4:0000100107e4_NS f90043e1 O EL1h_n : STR x1,[sp,#0x80] +5720 clk cpu0 MW8 037006a0:000000f006a0_NS 00000000_03008530 +5721 clk cpu0 IT (5685) 000107e8:0000100107e8_NS f9003fe2 O EL1h_n : STR x2,[sp,#0x78] +5721 clk cpu0 MW8 03700698:000000f00698_NS 00000000_00000000 +5722 clk cpu0 IT (5686) 000107ec:0000100107ec_NS f9003be3 O EL1h_n : STR x3,[sp,#0x70] +5722 clk cpu0 MW8 03700690:000000f00690_NS 00000000_03029510 +5723 clk cpu0 IT (5687) 000107f0:0000100107f0_NS f90037e4 O EL1h_n : STR x4,[sp,#0x68] +5723 clk cpu0 MW8 03700688:000000f00688_NS 00000000_030293f0 +5724 clk cpu0 IT (5688) 000107f4:0000100107f4_NS 94025a9b O EL1h_n : BL 0xa7260 +5724 clk cpu0 R X30 00000000000107F8 +5725 clk cpu0 IT (5689) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +5725 clk cpu0 R X0 0000000000000000 +5726 clk cpu0 IT (5690) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +5726 clk cpu0 R cpsr 820007c5 +5727 clk cpu0 IT (5691) 000107f8:0000100107f8_NS b9018be0 O EL1h_n : STR w0,[sp,#0x188] +5727 clk cpu0 MW4 037007a8:000000f007a8_NS 00000000 +5727 clk cpu0 R cpsr 820003c5 +5727 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d CLEAN 0x000010800780_NS +5727 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d INVAL 0x000010800780_NS +5727 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d ALLOC 0x000000f00780_NS +5727 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d DIRTY 0x000000f00780_NS +5727 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e2 ALLOC 0x000010800780_NS +5727 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00780_NS +5727 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00780_NS +5728 clk cpu0 IT (5692) 000107fc:0000100107fc_NS 94021f5c O EL1h_n : BL 0x9856c +5728 clk cpu0 R X30 0000000000010800 +5728 clk cpu0 CACHE cpu.cpu0.l1icache LINE 002a INVAL 0x00001009c540_NS +5728 clk cpu0 CACHE cpu.cpu0.l1icache LINE 002a ALLOC 0x000010098540_NS +5728 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0151 ALLOC 0x000010098540_NS +5729 clk cpu0 IT (5693) 0009856c:00001009856c_NS d0030be8 O EL1h_n : ADRP x8,0x621656c +5729 clk cpu0 R X8 0000000006216000 +5730 clk cpu0 IT (5694) 00098570:000010098570_NS b9404d00 O EL1h_n : LDR w0,[x8,#0x4c] +5730 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5730 clk cpu0 R X0 0000000000000001 +5731 clk cpu0 IT (5695) 00098574:000010098574_NS d65f03c0 O EL1h_n : RET +5731 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0040 ALLOC 0x000010010800_NS +5731 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0203 ALLOC 0x000010010800_NS +5732 clk cpu0 IT (5696) 00010800:000010010800_NS b90187e0 O EL1h_n : STR w0,[sp,#0x184] +5732 clk cpu0 MW4 037007a4:000000f007a4_NS 00000001 +5733 clk cpu0 IT (5697) 00010804:000010010804_NS f9405be8 O EL1h_n : LDR x8,[sp,#0xb0] +5733 clk cpu0 MR8 037006d0:000000f006d0_NS 00000000_00011234 +5733 clk cpu0 R X8 0000000000011234 +5734 clk cpu0 IT (5698) 00010808:000010010808_NS d63f0100 O EL1h_n : BLR x8 +5734 clk cpu0 R cpsr 82000bc5 +5734 clk cpu0 R X30 000000000001080C +5734 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0090 ALLOC 0x000010011200_NS +5734 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0480 ALLOC 0x000010011200_NS +5735 clk cpu0 IT (5699) 00011234:000010011234_NS d2a2c480 O EL1h_n : MOV x0,#0x16240000 +5735 clk cpu0 R cpsr 820003c5 +5735 clk cpu0 R X0 0000000016240000 +5736 clk cpu0 IT (5700) 00011238:000010011238_NS d65f03c0 O EL1h_n : RET +5737 clk cpu0 IT (5701) 0001080c:00001001080c_NS f9006fe0 O EL1h_n : STR x0,[sp,#0xd8] +5737 clk cpu0 MW8 037006f8:000000f006f8_NS 00000000_16240000 +5738 clk cpu0 IT (5702) 00010810:000010010810_NS b9418beb O EL1h_n : LDR w11,[sp,#0x188] +5738 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +5738 clk cpu0 R X11 0000000000000000 +5739 clk cpu0 IT (5703) 00010814:000010010814_NS 2a0b03e0 O EL1h_n : MOV w0,w11 +5739 clk cpu0 R X0 0000000000000000 +5740 clk cpu0 IT (5704) 00010818:000010010818_NS 94000270 O EL1h_n : BL 0x111d8 +5740 clk cpu0 R X30 000000000001081C +5740 clk cpu0 CACHE cpu.cpu0.l1icache LINE 008e ALLOC 0x0000100111c0_NS +5740 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0470 ALLOC 0x0000100111c0_NS +5741 clk cpu0 IT (5705) 000111d8:0000100111d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +5741 clk cpu0 R SP_EL1 0000000003700600 +5742 clk cpu0 IT (5706) 000111dc:0000100111dc_NS f9000bfe O EL1h_n : STR x30,[sp,#0x10] +5742 clk cpu0 MW8 03700610:000000f00610_NS 00000000_0001081c +5742 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0031 ALLOC 0x000000f00600_NS +5742 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0031 DIRTY 0x000000f00600_NS +5742 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00600_NS +5742 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00600_NS +5743 clk cpu0 IT (5707) 000111e0:0000100111e0_NS 39003fe0 O EL1h_n : STRB w0,[sp,#0xf] +5743 clk cpu0 MW1 0370060f:000000f0060f_NS 00 +5744 clk cpu0 IT (5708) 000111e4:0000100111e4_NS 94000291 O EL1h_n : BL 0x11c28 +5744 clk cpu0 R X30 00000000000111E8 +5744 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00e0 ALLOC 0x000010011c00_NS +5744 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0700 ALLOC 0x000010011c00_NS +5745 clk cpu0 IT (5709) 00011c28:000010011c28_NS d2a46008 O EL1h_n : MOV x8,#0x23000000 +5745 clk cpu0 R X8 0000000023000000 +5746 clk cpu0 IT (5710) 00011c2c:000010011c2c_NS 90018309 O EL1h_n : ADRP x9,0x3071c2c +5746 clk cpu0 R X9 0000000003071000 +5747 clk cpu0 IT (5711) 00011c30:000010011c30_NS 9124a129 O EL1h_n : ADD x9,x9,#0x928 +5747 clk cpu0 R X9 0000000003071928 +5748 clk cpu0 IT (5712) 00011c34:000010011c34_NS f9000128 O EL1h_n : STR x8,[x9,#0] +5748 clk cpu0 TTW DTLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +5748 clk cpu0 TTW DTLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +5748 clk cpu0 TTW DTLB LPAE 1:2 000070450008 0000000070470003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070470000 +5748 clk cpu0 TTW DTLB LPAE 1:3 0000704720e0 0000000000870463 : BLOCK ATTRIDX=0 NS=1 AP=1 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000000870000 +5748 clk cpu0 MW8 03071928:000000871928_NS 00000000_23000000 +5748 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x03070000_NS EL1_n vmid=0:0x0000870000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5748 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x03070000_NS EL1_n vmid=0:0x0000870000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +5748 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070450000_NS +5748 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070440000_NS +5748 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070250000_NS +5748 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070450000_NS +5748 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0107 ALLOC 0x0000704720c0_NS +5748 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00c9 ALLOC 0x000000871900_NS +5748 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00c9 DIRTY 0x000000871900_NS +5748 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0830 ALLOC 0x0000704720c0_NS +5748 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000871900_NS +5748 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000871900_NS +5749 clk cpu0 IT (5713) 00011c38:000010011c38_NS f9400120 O EL1h_n : LDR x0,[x9,#0] +5749 clk cpu0 MR8 03071928:000000871928_NS 00000000_23000000 +5749 clk cpu0 R X0 0000000023000000 +5750 clk cpu0 IT (5714) 00011c3c:000010011c3c_NS d65f03c0 O EL1h_n : RET +5751 clk cpu0 IT (5715) 000111e8:0000100111e8_NS 91400800 O EL1h_n : ADD x0,x0,#2,LSL #12 +5751 clk cpu0 R X0 0000000023002000 +5752 clk cpu0 IT (5716) 000111ec:0000100111ec_NS f9400bfe O EL1h_n : LDR x30,[sp,#0x10] +5752 clk cpu0 MR8 03700610:000000f00610_NS 00000000_0001081c +5752 clk cpu0 R X30 000000000001081C +5753 clk cpu0 IT (5717) 000111f0:0000100111f0_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +5753 clk cpu0 R SP_EL1 0000000003700620 +5754 clk cpu0 IT (5718) 000111f4:0000100111f4_NS d65f03c0 O EL1h_n : RET +5755 clk cpu0 IT (5719) 0001081c:00001001081c_NS f9006be0 O EL1h_n : STR x0,[sp,#0xd0] +5755 clk cpu0 MW8 037006f0:000000f006f0_NS 00000000_23002000 +5756 clk cpu0 IT (5720) 00010820:000010010820_NS b940afe0 O EL1h_n : LDR w0,[sp,#0xac] +5756 clk cpu0 MR4 037006cc:000000f006cc_NS 00000138 +5756 clk cpu0 R X0 0000000000000138 +5757 clk cpu0 IT (5721) 00010824:000010010824_NS 94021f7d O EL1h_n : BL 0x98618 +5757 clk cpu0 R X30 0000000000010828 +5757 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0031 INVAL 0x000010010600_NS +5757 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0031 ALLOC 0x000010098600_NS +5757 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0184 ALLOC 0x000010098600_NS +5758 clk cpu0 IT (5722) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +5758 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +5758 clk cpu0 R SP_EL1 0000000003700600 +5759 clk cpu0 IT (5723) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +5759 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +5759 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010828 +5760 clk cpu0 IT (5724) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +5760 clk cpu0 R X19 0000000000000138 +5761 clk cpu0 IT (5725) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +5761 clk cpu0 R X30 0000000000098628 +5762 clk cpu0 IT (5726) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +5762 clk cpu0 R X0 0000000000000000 +5763 clk cpu0 IT (5727) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +5763 clk cpu0 R cpsr 820007c5 +5764 clk cpu0 IT (5728) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +5764 clk cpu0 R cpsr 820003c5 +5765 clk cpu0 IT (5729) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +5765 clk cpu0 R X20 0000000000000000 +5766 clk cpu0 IS (5730) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +5767 clk cpu0 IT (5731) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +5767 clk cpu0 R X8 0000000000000000 +5768 clk cpu0 IT (5732) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +5768 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0032 INVAL 0x000010010640_NS +5768 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0032 ALLOC 0x000010098640_NS +5768 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0193 ALLOC 0x000010098640_NS +5769 clk cpu0 IT (5733) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +5769 clk cpu0 R X8 0000000003000000 +5770 clk cpu0 IT (5734) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +5770 clk cpu0 R X8 0000000003000268 +5771 clk cpu0 IT (5735) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +5771 clk cpu0 R X9 0000000000000C50 +5772 clk cpu0 IT (5736) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +5772 clk cpu0 R X8 0000000003000268 +5773 clk cpu0 IT (5737) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +5773 clk cpu0 MR8 030003a0:0000008003a0_NS 00000000_00000038 +5773 clk cpu0 R X19 0000000000000038 +5773 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 001d ALLOC 0x000000800380_NS +5773 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 00e0 ALLOC 0x000000800380_NS +5774 clk cpu0 IT (5738) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +5774 clk cpu0 R X8 000000000000BAAD +5775 clk cpu0 IT (5739) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +5775 clk cpu0 R X8 00000000900DBAAD +5776 clk cpu0 IT (5740) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +5776 clk cpu0 R cpsr 820003c5 +5777 clk cpu0 IT (5741) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +5777 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0035 ALLOC 0x000010098680_NS +5777 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01a1 ALLOC 0x000010098680_NS +5778 clk cpu0 IT (5742) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +5778 clk cpu0 R X0 0000000000000038 +5779 clk cpu0 IT (5743) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +5779 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +5779 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010828 +5779 clk cpu0 R X19 1818181818181818 +5779 clk cpu0 R X30 0000000000010828 +5780 clk cpu0 IT (5744) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +5780 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +5780 clk cpu0 R SP_EL1 0000000003700620 +5780 clk cpu0 R X20 001FFFFFFFFFFFFE +5781 clk cpu0 IT (5745) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +5782 clk cpu0 IT (5746) 00010828:000010010828_NS d352fc08 O EL1h_n : LSR x8,x0,#18 +5782 clk cpu0 R X8 0000000000000000 +5783 clk cpu0 IT (5747) 0001082c:00001001082c_NS f94053e9 O EL1h_n : LDR x9,[sp,#0xa0] +5783 clk cpu0 MR8 037006c0:000000f006c0_NS 00000000_00000001 +5783 clk cpu0 R X9 0000000000000001 +5784 clk cpu0 IT (5748) 00010830:000010010830_NS 8a090108 O EL1h_n : AND x8,x8,x9 +5784 clk cpu0 R X8 0000000000000000 +5785 clk cpu0 IT (5749) 00010834:000010010834_NS b900cfe8 O EL1h_n : STR w8,[sp,#0xcc] +5785 clk cpu0 MW4 037006ec:000000f006ec_NS 00000000 +5786 clk cpu0 IT (5750) 00010838:000010010838_NS b9409fe0 O EL1h_n : LDR w0,[sp,#0x9c] +5786 clk cpu0 MR4 037006bc:000000f006bc_NS 00000000 +5786 clk cpu0 R X0 0000000000000000 +5787 clk cpu0 IT (5751) 0001083c:00001001083c_NS b9409be1 O EL1h_n : LDR w1,[sp,#0x98] +5787 clk cpu0 MR4 037006b8:000000f006b8_NS 0000f000 +5787 clk cpu0 R X1 000000000000F000 +5787 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0042 ALLOC 0x000010010840_NS +5787 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0212 ALLOC 0x000010010840_NS +5788 clk cpu0 IT (5752) 00010840:000010010840_NS 94021fcb O EL1h_n : BL 0x9876c +5788 clk cpu0 R X30 0000000000010844 +5788 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003b INVAL 0x000010010740_NS +5788 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003b ALLOC 0x000010098740_NS +5788 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01d2 ALLOC 0x000010098740_NS +5789 clk cpu0 IT (5753) 0009876c:00001009876c_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +5789 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +5789 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010844 +5789 clk cpu0 R SP_EL1 0000000003700610 +5790 clk cpu0 IT (5754) 00098770:000010098770_NS 71403c3f O EL1h_n : CMP w1,#0xf,LSL #12 +5790 clk cpu0 R cpsr 620003c5 +5791 clk cpu0 IT (5755) 00098774:000010098774_NS 54000100 O EL1h_n : B.EQ 0x98794 +5791 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003d ALLOC 0x000010098780_NS +5791 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e3 ALLOC 0x000010098780_NS +5792 clk cpu0 IT (5756) 00098794:000010098794_NS d0030be8 O EL1h_n : ADRP x8,0x6216794 +5792 clk cpu0 R X8 0000000006216000 +5793 clk cpu0 IT (5757) 00098798:000010098798_NS b9410913 O EL1h_n : LDR w19,[x8,#0x108] +5793 clk cpu0 MR4 06216108:000015216108_NS 00030001 +5793 clk cpu0 R X19 0000000000030001 +5794 clk cpu0 IT (5758) 0009879c:00001009879c_NS 14000005 O EL1h_n : B 0x987b0 +5795 clk cpu0 IT (5759) 000987b0:0000100987b0_NS 2a1303e0 O EL1h_n : MOV w0,w19 +5795 clk cpu0 R X0 0000000000030001 +5796 clk cpu0 IT (5760) 000987b4:0000100987b4_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +5796 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +5796 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010844 +5796 clk cpu0 R SP_EL1 0000000003700620 +5796 clk cpu0 R X19 1818181818181818 +5796 clk cpu0 R X30 0000000000010844 +5797 clk cpu0 IT (5761) 000987b8:0000100987b8_NS d65f03c0 O EL1h_n : RET +5798 clk cpu0 IT (5762) 00010844:000010010844_NS b9016fe0 O EL1h_n : STR w0,[sp,#0x16c] +5798 clk cpu0 MW4 0370078c:000000f0078c_NS 00030001 +5799 clk cpu0 IT (5763) 00010848:000010010848_NS b9416fe8 O EL1h_n : LDR w8,[sp,#0x16c] +5799 clk cpu0 MR4 0370078c:000000f0078c_NS 00030001 +5799 clk cpu0 R X8 0000000000030001 +5800 clk cpu0 IT (5764) 0001084c:00001001084c_NS b9409beb O EL1h_n : LDR w11,[sp,#0x98] +5800 clk cpu0 MR4 037006b8:000000f006b8_NS 0000f000 +5800 clk cpu0 R X11 000000000000F000 +5801 clk cpu0 IT (5765) 00010850:000010010850_NS 0a0b0108 O EL1h_n : AND w8,w8,w11 +5801 clk cpu0 R X8 0000000000000000 +5802 clk cpu0 IT (5766) 00010854:000010010854_NS b94097ed O EL1h_n : LDR w13,[sp,#0x94] +5802 clk cpu0 MR4 037006b4:000000f006b4_NS 0000000c +5802 clk cpu0 R X13 000000000000000C +5803 clk cpu0 IT (5767) 00010858:000010010858_NS 1acd2508 O EL1h_n : LSR w8,w8,w13 +5803 clk cpu0 R X8 0000000000000000 +5804 clk cpu0 IT (5768) 0001085c:00001001085c_NS 2a0803e9 O EL1h_n : MOV w9,w8 +5804 clk cpu0 R X9 0000000000000000 +5805 clk cpu0 IT (5769) 00010860:000010010860_NS d3407d29 O EL1h_n : UBFX x9,x9,#0,#32 +5805 clk cpu0 R X9 0000000000000000 +5806 clk cpu0 IT (5770) 00010864:000010010864_NS f9405fea O EL1h_n : LDR x10,[sp,#0xb8] +5806 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +5806 clk cpu0 R X10 0000000003700790 +5807 clk cpu0 IT (5771) 00010868:000010010868_NS f9000549 O EL1h_n : STR x9,[x10,#8] +5807 clk cpu0 MW8 03700798:000000f00798_NS 00000000_00000000 +5808 clk cpu0 IT (5772) 0001086c:00001001086c_NS b9416fe8 O EL1h_n : LDR w8,[sp,#0x16c] +5808 clk cpu0 MR4 0370078c:000000f0078c_NS 00030001 +5808 clk cpu0 R X8 0000000000030001 +5809 clk cpu0 IT (5773) 00010870:000010010870_NS b94093ee O EL1h_n : LDR w14,[sp,#0x90] +5809 clk cpu0 MR4 037006b0:000000f006b0_NS 00000f00 +5809 clk cpu0 R X14 0000000000000F00 +5810 clk cpu0 IT (5774) 00010874:000010010874_NS 0a0e0108 O EL1h_n : AND w8,w8,w14 +5810 clk cpu0 R X8 0000000000000000 +5811 clk cpu0 IT (5775) 00010878:000010010878_NS b9408fef O EL1h_n : LDR w15,[sp,#0x8c] +5811 clk cpu0 MR4 037006ac:000000f006ac_NS 00000008 +5811 clk cpu0 R X15 0000000000000008 +5812 clk cpu0 IT (5776) 0001087c:00001001087c_NS 1acf2508 O EL1h_n : LSR w8,w8,w15 +5812 clk cpu0 R X8 0000000000000000 +5812 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0044 ALLOC 0x000010010880_NS +5812 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0222 ALLOC 0x000010010880_NS +5813 clk cpu0 IT (5777) 00010880:000010010880_NS b9408bf0 O EL1h_n : LDR w16,[sp,#0x88] +5813 clk cpu0 MR4 037006a8:000000f006a8_NS 00000001 +5813 clk cpu0 R X16 0000000000000001 +5814 clk cpu0 IT (5778) 00010884:000010010884_NS 0a280208 O EL1h_n : BIC w8,w16,w8 +5814 clk cpu0 R X8 0000000000000001 +5815 clk cpu0 IT (5779) 00010888:000010010888_NS 2a0803e9 O EL1h_n : MOV w9,w8 +5815 clk cpu0 R X9 0000000000000001 +5816 clk cpu0 IT (5780) 0001088c:00001001088c_NS d3407d29 O EL1h_n : UBFX x9,x9,#0,#32 +5816 clk cpu0 R X9 0000000000000001 +5817 clk cpu0 IT (5781) 00010890:000010010890_NS f9000149 O EL1h_n : STR x9,[x10,#0] +5817 clk cpu0 MW8 03700790:000000f00790_NS 00000000_00000001 +5818 clk cpu0 IT (5782) 00010894:000010010894_NS 940002c0 O EL1h_n : BL 0x11394 +5818 clk cpu0 R X30 0000000000010898 +5818 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009c INVAL 0x00001009d380 +5818 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009c ALLOC 0x000010011380_NS +5818 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 04e0 ALLOC 0x000010011380_NS +5819 clk cpu0 IT (5783) 00011394:000010011394_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +5819 clk cpu0 R SP_EL1 0000000003700590 +5820 clk cpu0 IT (5784) 00011398:000010011398_NS f90043fe O EL1h_n : STR x30,[sp,#0x80] +5820 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00010898 +5821 clk cpu0 IT (5785) 0001139c:00001001139c_NS d2800068 O EL1h_n : MOV x8,#3 +5821 clk cpu0 R X8 0000000000000003 +5822 clk cpu0 IT (5786) 000113a0:0000100113a0_NS 52811009 O EL1h_n : MOV w9,#0x880 +5822 clk cpu0 R X9 0000000000000880 +5823 clk cpu0 IT (5787) 000113a4:0000100113a4_NS d28001ea O EL1h_n : MOV x10,#0xf +5823 clk cpu0 R X10 000000000000000F +5824 clk cpu0 IT (5788) 000113a8:0000100113a8_NS 52802700 O EL1h_n : MOV w0,#0x138 +5824 clk cpu0 R X0 0000000000000138 +5825 clk cpu0 IT (5789) 000113ac:0000100113ac_NS d280002b O EL1h_n : MOV x11,#1 +5825 clk cpu0 R X11 0000000000000001 +5826 clk cpu0 IT (5790) 000113b0:0000100113b0_NS 5280000c O EL1h_n : MOV w12,#0 +5826 clk cpu0 R X12 0000000000000000 +5827 clk cpu0 IT (5791) 000113b4:0000100113b4_NS 529e000d O EL1h_n : MOV w13,#0xf000 +5827 clk cpu0 R X13 000000000000F000 +5828 clk cpu0 IT (5792) 000113b8:0000100113b8_NS 5280018e O EL1h_n : MOV w14,#0xc +5828 clk cpu0 R X14 000000000000000C +5829 clk cpu0 IT (5793) 000113bc:0000100113bc_NS 5280002f O EL1h_n : MOV w15,#1 +5829 clk cpu0 R X15 0000000000000001 +5829 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009f INVAL 0x00001009d3c0_NS +5829 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009f ALLOC 0x0000100113c0_NS +5829 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 04f0 ALLOC 0x0000100113c0_NS +5830 clk cpu0 IT (5794) 000113c0:0000100113c0_NS f00001c1 O EL1h_n : ADRP x1,0x4c3c0 +5830 clk cpu0 R X1 000000000004C000 +5831 clk cpu0 IT (5795) 000113c4:0000100113c4_NS 91332421 O EL1h_n : ADD x1,x1,#0xcc9 +5831 clk cpu0 R X1 000000000004CCC9 +5832 clk cpu0 IT (5796) 000113c8:0000100113c8_NS 5281e010 O EL1h_n : MOV w16,#0xf00 +5832 clk cpu0 R X16 0000000000000F00 +5833 clk cpu0 IT (5797) 000113cc:0000100113cc_NS 52800111 O EL1h_n : MOV w17,#8 +5833 clk cpu0 R X17 0000000000000008 +5834 clk cpu0 IT (5798) 000113d0:0000100113d0_NS f9002be8 O EL1h_n : STR x8,[sp,#0x50] +5834 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000003 +5834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 002f ALLOC 0x000000f005c0_NS +5834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 002f DIRTY 0x000000f005c0_NS +5834 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f005c0_NS +5834 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f005c0_NS +5835 clk cpu0 IT (5799) 000113d4:0000100113d4_NS f90027e8 O EL1h_n : STR x8,[sp,#0x48] +5835 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00000003 +5836 clk cpu0 IT (5800) 000113d8:0000100113d8_NS b90043e0 O EL1h_n : STR w0,[sp,#0x40] +5836 clk cpu0 MW4 037005d0:000000f005d0_NS 00000138 +5837 clk cpu0 IT (5801) 000113dc:0000100113dc_NS 2a0903e0 O EL1h_n : MOV w0,w9 +5837 clk cpu0 R X0 0000000000000880 +5838 clk cpu0 IT (5802) 000113e0:0000100113e0_NS b9003fe9 O EL1h_n : STR w9,[sp,#0x3c] +5838 clk cpu0 MW4 037005cc:000000f005cc_NS 00000880 +5839 clk cpu0 IT (5803) 000113e4:0000100113e4_NS f9001bea O EL1h_n : STR x10,[sp,#0x30] +5839 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_0000000f +5840 clk cpu0 IT (5804) 000113e8:0000100113e8_NS f90017eb O EL1h_n : STR x11,[sp,#0x28] +5840 clk cpu0 MW8 037005b8:000000f005b8_NS 00000000_00000001 +5840 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 002d ALLOC 0x000000f00580_NS +5840 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 002d DIRTY 0x000000f00580_NS +5840 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00580_NS +5840 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00580_NS +5841 clk cpu0 IT (5805) 000113ec:0000100113ec_NS b90027ec O EL1h_n : STR w12,[sp,#0x24] +5841 clk cpu0 MW4 037005b4:000000f005b4_NS 00000000 +5842 clk cpu0 IT (5806) 000113f0:0000100113f0_NS b90023ed O EL1h_n : STR w13,[sp,#0x20] +5842 clk cpu0 MW4 037005b0:000000f005b0_NS 0000f000 +5843 clk cpu0 IT (5807) 000113f4:0000100113f4_NS b9001fee O EL1h_n : STR w14,[sp,#0x1c] +5843 clk cpu0 MW4 037005ac:000000f005ac_NS 0000000c +5844 clk cpu0 IT (5808) 000113f8:0000100113f8_NS b9001bef O EL1h_n : STR w15,[sp,#0x18] +5844 clk cpu0 MW4 037005a8:000000f005a8_NS 00000001 +5845 clk cpu0 IT (5809) 000113fc:0000100113fc_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +5845 clk cpu0 MW8 037005a0:000000f005a0_NS 00000000_0004ccc9 +5845 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a0 INVAL 0x00001009d400 +5845 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a0 ALLOC 0x000010011400_NS +5845 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0500 ALLOC 0x000010011400_NS +5846 clk cpu0 IT (5810) 00011400:000010011400_NS b9000ff0 O EL1h_n : STR w16,[sp,#0xc] +5846 clk cpu0 MW4 0370059c:000000f0059c_NS 00000f00 +5847 clk cpu0 IT (5811) 00011404:000010011404_NS b9000bf1 O EL1h_n : STR w17,[sp,#8] +5847 clk cpu0 MW4 03700598:000000f00598_NS 00000008 +5848 clk cpu0 IT (5812) 00011408:000010011408_NS 94021c84 O EL1h_n : BL 0x98618 +5848 clk cpu0 R X30 000000000001140C +5849 clk cpu0 IT (5813) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +5849 clk cpu0 MW8 03700570:000000f00570_NS 001fffff_fffffffe +5849 clk cpu0 R SP_EL1 0000000003700570 +5849 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 002b ALLOC 0x000000f00540_NS +5849 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 002b DIRTY 0x000000f00540_NS +5849 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00540_NS +5849 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00540_NS +5850 clk cpu0 IT (5814) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +5850 clk cpu0 MW8 03700580:000000f00580_NS 18181818_18181818 +5850 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0001140c +5851 clk cpu0 IT (5815) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +5851 clk cpu0 R X19 0000000000000880 +5852 clk cpu0 IT (5816) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +5852 clk cpu0 R X30 0000000000098628 +5853 clk cpu0 IT (5817) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +5853 clk cpu0 R X0 0000000000000000 +5854 clk cpu0 IT (5818) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +5854 clk cpu0 R cpsr 620007c5 +5855 clk cpu0 IT (5819) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +5855 clk cpu0 R cpsr 820003c5 +5856 clk cpu0 IT (5820) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +5856 clk cpu0 R X20 0000000000000000 +5857 clk cpu0 IS (5821) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +5858 clk cpu0 IT (5822) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +5858 clk cpu0 R X8 0000000000000000 +5859 clk cpu0 IT (5823) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +5860 clk cpu0 IT (5824) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +5860 clk cpu0 R X8 0000000003000000 +5861 clk cpu0 IT (5825) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +5861 clk cpu0 R X8 0000000003000268 +5862 clk cpu0 IT (5826) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +5862 clk cpu0 R X9 0000000000000C50 +5863 clk cpu0 IT (5827) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +5863 clk cpu0 R X8 0000000003000268 +5864 clk cpu0 IT (5828) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +5864 clk cpu0 MR8 03000ae8:000000800ae8_NS 12012111_23111112 +5864 clk cpu0 R X19 1201211123111112 +5865 clk cpu0 IT (5829) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +5865 clk cpu0 R X8 000000000000BAAD +5866 clk cpu0 IT (5830) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +5866 clk cpu0 R X8 00000000900DBAAD +5867 clk cpu0 IT (5831) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +5867 clk cpu0 R cpsr 220003c5 +5868 clk cpu0 IT (5832) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +5869 clk cpu0 IT (5833) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +5869 clk cpu0 R X0 1201211123111112 +5870 clk cpu0 IT (5834) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +5870 clk cpu0 MR8 03700580:000000f00580_NS 18181818_18181818 +5870 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0001140c +5870 clk cpu0 R X19 1818181818181818 +5870 clk cpu0 R X30 000000000001140C +5871 clk cpu0 IT (5835) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +5871 clk cpu0 MR8 03700570:000000f00570_NS 001fffff_fffffffe +5871 clk cpu0 R SP_EL1 0000000003700590 +5871 clk cpu0 R X20 001FFFFFFFFFFFFE +5872 clk cpu0 IT (5836) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +5873 clk cpu0 IT (5837) 0001140c:00001001140c_NS d34cfc08 O EL1h_n : LSR x8,x0,#12 +5873 clk cpu0 R X8 0001201211123111 +5874 clk cpu0 IT (5838) 00011410:000010011410_NS f9401bea O EL1h_n : LDR x10,[sp,#0x30] +5874 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_0000000f +5874 clk cpu0 R X10 000000000000000F +5875 clk cpu0 IT (5839) 00011414:000010011414_NS 8a0a0108 O EL1h_n : AND x8,x8,x10 +5875 clk cpu0 R X8 0000000000000001 +5876 clk cpu0 IT (5840) 00011418:000010011418_NS b9007fe8 O EL1h_n : STR w8,[sp,#0x7c] +5876 clk cpu0 MW4 0370060c:000000f0060c_NS 00000001 +5877 clk cpu0 IT (5841) 0001141c:00001001141c_NS b9403fe0 O EL1h_n : LDR w0,[sp,#0x3c] +5877 clk cpu0 MR4 037005cc:000000f005cc_NS 00000880 +5877 clk cpu0 R X0 0000000000000880 +5878 clk cpu0 IT (5842) 00011420:000010011420_NS 94021c7e O EL1h_n : BL 0x98618 +5878 clk cpu0 R X30 0000000000011424 +5879 clk cpu0 IT (5843) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +5879 clk cpu0 MW8 03700570:000000f00570_NS 001fffff_fffffffe +5879 clk cpu0 R SP_EL1 0000000003700570 +5880 clk cpu0 IT (5844) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +5880 clk cpu0 MW8 03700580:000000f00580_NS 18181818_18181818 +5880 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011424 +5881 clk cpu0 IT (5845) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +5881 clk cpu0 R X19 0000000000000880 +5882 clk cpu0 IT (5846) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +5882 clk cpu0 R X30 0000000000098628 +5883 clk cpu0 IT (5847) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +5883 clk cpu0 R X0 0000000000000000 +5884 clk cpu0 IT (5848) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +5884 clk cpu0 R cpsr 220007c5 +5885 clk cpu0 IT (5849) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +5885 clk cpu0 R cpsr 820003c5 +5886 clk cpu0 IT (5850) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +5886 clk cpu0 R X20 0000000000000000 +5887 clk cpu0 IS (5851) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +5888 clk cpu0 IT (5852) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +5888 clk cpu0 R X8 0000000000000000 +5889 clk cpu0 IT (5853) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +5890 clk cpu0 IT (5854) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +5890 clk cpu0 R X8 0000000003000000 +5891 clk cpu0 IT (5855) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +5891 clk cpu0 R X8 0000000003000268 +5892 clk cpu0 IT (5856) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +5892 clk cpu0 R X9 0000000000000C50 +5893 clk cpu0 IT (5857) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +5893 clk cpu0 R X8 0000000003000268 +5894 clk cpu0 IT (5858) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +5894 clk cpu0 MR8 03000ae8:000000800ae8_NS 12012111_23111112 +5894 clk cpu0 R X19 1201211123111112 +5895 clk cpu0 IT (5859) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +5895 clk cpu0 R X8 000000000000BAAD +5896 clk cpu0 IT (5860) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +5896 clk cpu0 R X8 00000000900DBAAD +5897 clk cpu0 IT (5861) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +5897 clk cpu0 R cpsr 220003c5 +5898 clk cpu0 IT (5862) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +5899 clk cpu0 IT (5863) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +5899 clk cpu0 R X0 1201211123111112 +5900 clk cpu0 IT (5864) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +5900 clk cpu0 MR8 03700580:000000f00580_NS 18181818_18181818 +5900 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011424 +5900 clk cpu0 R X19 1818181818181818 +5900 clk cpu0 R X30 0000000000011424 +5901 clk cpu0 IT (5865) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +5901 clk cpu0 MR8 03700570:000000f00570_NS 001fffff_fffffffe +5901 clk cpu0 R SP_EL1 0000000003700590 +5901 clk cpu0 R X20 001FFFFFFFFFFFFE +5902 clk cpu0 IT (5866) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +5903 clk cpu0 IT (5867) 00011424:000010011424_NS d348fc0a O EL1h_n : LSR x10,x0,#8 +5903 clk cpu0 R X10 0012012111231111 +5904 clk cpu0 IT (5868) 00011428:000010011428_NS f9401beb O EL1h_n : LDR x11,[sp,#0x30] +5904 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_0000000f +5904 clk cpu0 R X11 000000000000000F +5905 clk cpu0 IT (5869) 0001142c:00001001142c_NS 8a0b014a O EL1h_n : AND x10,x10,x11 +5905 clk cpu0 R X10 0000000000000001 +5906 clk cpu0 IT (5870) 00011430:000010011430_NS b9007bea O EL1h_n : STR w10,[sp,#0x78] +5906 clk cpu0 MW4 03700608:000000f00608_NS 00000001 +5907 clk cpu0 IT (5871) 00011434:000010011434_NS b94043e0 O EL1h_n : LDR w0,[sp,#0x40] +5907 clk cpu0 MR4 037005d0:000000f005d0_NS 00000138 +5907 clk cpu0 R X0 0000000000000138 +5908 clk cpu0 IT (5872) 00011438:000010011438_NS 94021c78 O EL1h_n : BL 0x98618 +5908 clk cpu0 R X30 000000000001143C +5909 clk cpu0 IT (5873) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +5909 clk cpu0 MW8 03700570:000000f00570_NS 001fffff_fffffffe +5909 clk cpu0 R SP_EL1 0000000003700570 +5910 clk cpu0 IT (5874) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +5910 clk cpu0 MW8 03700580:000000f00580_NS 18181818_18181818 +5910 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0001143c +5911 clk cpu0 IT (5875) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +5911 clk cpu0 R X19 0000000000000138 +5912 clk cpu0 IT (5876) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +5912 clk cpu0 R X30 0000000000098628 +5913 clk cpu0 IT (5877) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +5913 clk cpu0 R X0 0000000000000000 +5914 clk cpu0 IT (5878) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +5914 clk cpu0 R cpsr 220007c5 +5915 clk cpu0 IT (5879) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +5915 clk cpu0 R cpsr 820003c5 +5916 clk cpu0 IT (5880) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +5916 clk cpu0 R X20 0000000000000000 +5917 clk cpu0 IS (5881) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +5918 clk cpu0 IT (5882) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +5918 clk cpu0 R X8 0000000000000000 +5919 clk cpu0 IT (5883) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +5920 clk cpu0 IT (5884) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +5920 clk cpu0 R X8 0000000003000000 +5921 clk cpu0 IT (5885) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +5921 clk cpu0 R X8 0000000003000268 +5922 clk cpu0 IT (5886) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +5922 clk cpu0 R X9 0000000000000C50 +5923 clk cpu0 IT (5887) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +5923 clk cpu0 R X8 0000000003000268 +5924 clk cpu0 IT (5888) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +5924 clk cpu0 MR8 030003a0:0000008003a0_NS 00000000_00000038 +5924 clk cpu0 R X19 0000000000000038 +5925 clk cpu0 IT (5889) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +5925 clk cpu0 R X8 000000000000BAAD +5926 clk cpu0 IT (5890) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +5926 clk cpu0 R X8 00000000900DBAAD +5927 clk cpu0 IT (5891) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +5927 clk cpu0 R cpsr 820003c5 +5928 clk cpu0 IT (5892) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +5929 clk cpu0 IT (5893) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +5929 clk cpu0 R X0 0000000000000038 +5930 clk cpu0 IT (5894) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +5930 clk cpu0 MR8 03700580:000000f00580_NS 18181818_18181818 +5930 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0001143c +5930 clk cpu0 R X19 1818181818181818 +5930 clk cpu0 R X30 000000000001143C +5931 clk cpu0 IT (5895) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +5931 clk cpu0 MR8 03700570:000000f00570_NS 001fffff_fffffffe +5931 clk cpu0 R SP_EL1 0000000003700590 +5931 clk cpu0 R X20 001FFFFFFFFFFFFE +5932 clk cpu0 IT (5896) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +5933 clk cpu0 IT (5897) 0001143c:00001001143c_NS d352fc0b O EL1h_n : LSR x11,x0,#18 +5933 clk cpu0 R X11 0000000000000000 +5933 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a3 INVAL 0x00001009d440_NS +5933 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a3 ALLOC 0x000010011440_NS +5933 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0510 ALLOC 0x000010011440_NS +5934 clk cpu0 IT (5898) 00011440:000010011440_NS f94017f2 O EL1h_n : LDR x18,[sp,#0x28] +5934 clk cpu0 MR8 037005b8:000000f005b8_NS 00000000_00000001 +5934 clk cpu0 R X18 0000000000000001 +5935 clk cpu0 IT (5899) 00011444:000010011444_NS 8a12016b O EL1h_n : AND x11,x11,x18 +5935 clk cpu0 R X11 0000000000000000 +5936 clk cpu0 IT (5900) 00011448:000010011448_NS b90077eb O EL1h_n : STR w11,[sp,#0x74] +5936 clk cpu0 MW4 03700604:000000f00604_NS 00000000 +5937 clk cpu0 IT (5901) 0001144c:00001001144c_NS b94027e0 O EL1h_n : LDR w0,[sp,#0x24] +5937 clk cpu0 MR4 037005b4:000000f005b4_NS 00000000 +5937 clk cpu0 R X0 0000000000000000 +5938 clk cpu0 IT (5902) 00011450:000010011450_NS b94023e1 O EL1h_n : LDR w1,[sp,#0x20] +5938 clk cpu0 MR4 037005b0:000000f005b0_NS 0000f000 +5938 clk cpu0 R X1 000000000000F000 +5939 clk cpu0 IT (5903) 00011454:000010011454_NS 94021cc6 O EL1h_n : BL 0x9876c +5939 clk cpu0 R X30 0000000000011458 +5940 clk cpu0 IT (5904) 0009876c:00001009876c_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +5940 clk cpu0 MW8 03700580:000000f00580_NS 18181818_18181818 +5940 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011458 +5940 clk cpu0 R SP_EL1 0000000003700580 +5941 clk cpu0 IT (5905) 00098770:000010098770_NS 71403c3f O EL1h_n : CMP w1,#0xf,LSL #12 +5941 clk cpu0 R cpsr 620003c5 +5942 clk cpu0 IT (5906) 00098774:000010098774_NS 54000100 O EL1h_n : B.EQ 0x98794 +5943 clk cpu0 IT (5907) 00098794:000010098794_NS d0030be8 O EL1h_n : ADRP x8,0x6216794 +5943 clk cpu0 R X8 0000000006216000 +5944 clk cpu0 IT (5908) 00098798:000010098798_NS b9410913 O EL1h_n : LDR w19,[x8,#0x108] +5944 clk cpu0 MR4 06216108:000015216108_NS 00030001 +5944 clk cpu0 R X19 0000000000030001 +5945 clk cpu0 IT (5909) 0009879c:00001009879c_NS 14000005 O EL1h_n : B 0x987b0 +5946 clk cpu0 IT (5910) 000987b0:0000100987b0_NS 2a1303e0 O EL1h_n : MOV w0,w19 +5946 clk cpu0 R X0 0000000000030001 +5947 clk cpu0 IT (5911) 000987b4:0000100987b4_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +5947 clk cpu0 MR8 03700580:000000f00580_NS 18181818_18181818 +5947 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011458 +5947 clk cpu0 R SP_EL1 0000000003700590 +5947 clk cpu0 R X19 1818181818181818 +5947 clk cpu0 R X30 0000000000011458 +5948 clk cpu0 IT (5912) 000987b8:0000100987b8_NS d65f03c0 O EL1h_n : RET +5949 clk cpu0 IT (5913) 00011458:000010011458_NS b90047e0 O EL1h_n : STR w0,[sp,#0x44] +5949 clk cpu0 MW4 037005d4:000000f005d4_NS 00030001 +5950 clk cpu0 IT (5914) 0001145c:00001001145c_NS b94047e8 O EL1h_n : LDR w8,[sp,#0x44] +5950 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +5950 clk cpu0 R X8 0000000000030001 +5951 clk cpu0 IT (5915) 00011460:000010011460_NS b94023e9 O EL1h_n : LDR w9,[sp,#0x20] +5951 clk cpu0 MR4 037005b0:000000f005b0_NS 0000f000 +5951 clk cpu0 R X9 000000000000F000 +5952 clk cpu0 IT (5916) 00011464:000010011464_NS 0a090108 O EL1h_n : AND w8,w8,w9 +5952 clk cpu0 R X8 0000000000000000 +5953 clk cpu0 IT (5917) 00011468:000010011468_NS b9401fea O EL1h_n : LDR w10,[sp,#0x1c] +5953 clk cpu0 MR4 037005ac:000000f005ac_NS 0000000c +5953 clk cpu0 R X10 000000000000000C +5954 clk cpu0 IT (5918) 0001146c:00001001146c_NS 1aca2508 O EL1h_n : LSR w8,w8,w10 +5954 clk cpu0 R X8 0000000000000000 +5955 clk cpu0 IT (5919) 00011470:000010011470_NS 2a0803f2 O EL1h_n : MOV w18,w8 +5955 clk cpu0 R X18 0000000000000000 +5956 clk cpu0 IT (5920) 00011474:000010011474_NS d3407e52 O EL1h_n : UBFX x18,x18,#0,#32 +5956 clk cpu0 R X18 0000000000000000 +5957 clk cpu0 IT (5921) 00011478:000010011478_NS f90037f2 O EL1h_n : STR x18,[sp,#0x68] +5957 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000000 +5958 clk cpu0 IT (5922) 0001147c:00001001147c_NS b94047e2 O EL1h_n : LDR w2,[sp,#0x44] +5958 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +5958 clk cpu0 R X2 0000000000030001 +5958 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a4 ALLOC 0x000010011480_NS +5958 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0520 ALLOC 0x000010011480_NS +5959 clk cpu0 IT (5923) 00011480:000010011480_NS f94037e3 O EL1h_n : LDR x3,[sp,#0x68] +5959 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +5959 clk cpu0 R X3 0000000000000000 +5960 clk cpu0 IT (5924) 00011484:000010011484_NS b9401be0 O EL1h_n : LDR w0,[sp,#0x18] +5960 clk cpu0 MR4 037005a8:000000f005a8_NS 00000001 +5960 clk cpu0 R X0 0000000000000001 +5961 clk cpu0 IT (5925) 00011488:000010011488_NS f9400be1 O EL1h_n : LDR x1,[sp,#0x10] +5961 clk cpu0 MR8 037005a0:000000f005a0_NS 00000000_0004ccc9 +5961 clk cpu0 R X1 000000000004CCC9 +5962 clk cpu0 IT (5926) 0001148c:00001001148c_NS 94022c10 O EL1h_n : BL 0x9c4cc +5962 clk cpu0 R X30 0000000000011490 +5963 clk cpu0 IT (5927) 0009c4cc:00001009c4cc_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +5963 clk cpu0 R SP_EL1 0000000003700500 +5964 clk cpu0 IT (5928) 0009c4d0:00001009c4d0_NS d0030bc8 O EL1h_n : ADRP x8,0x62164d0 +5964 clk cpu0 R X8 0000000006216000 +5965 clk cpu0 IT (5929) 0009c4d4:00001009c4d4_NS b940f908 O EL1h_n : LDR w8,[x8,#0xf8] +5965 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +5965 clk cpu0 R X8 0000000000000003 +5966 clk cpu0 IT (5930) 0009c4d8:00001009c4d8_NS a90753f5 O EL1h_n : STP x21,x20,[sp,#0x70] +5966 clk cpu0 MW8 03700570:000000f00570_NS 00000000_00f00000 +5966 clk cpu0 MW8 03700578:000000f00578_NS 001fffff_fffffffe +5967 clk cpu0 IT (5931) 0009c4dc:00001009c4dc_NS a9087bf3 O EL1h_n : STP x19,x30,[sp,#0x80] +5967 clk cpu0 MW8 03700580:000000f00580_NS 18181818_18181818 +5967 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011490 +5968 clk cpu0 IT (5932) 0009c4e0:00001009c4e0_NS a9000fe2 O EL1h_n : STP x2,x3,[sp,#0] +5968 clk cpu0 MW8 03700500:000000f00500_NS 00000000_00030001 +5968 clk cpu0 MW8 03700508:000000f00508_NS 00000000_00000000 +5968 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0028 ALLOC 0x000000f00500_NS +5968 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0028 DIRTY 0x000000f00500_NS +5968 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00500_NS +5968 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00500_NS +5969 clk cpu0 IT (5933) 0009c4e4:00001009c4e4_NS 6b00011f O EL1h_n : CMP w8,w0 +5969 clk cpu0 R cpsr 220003c5 +5970 clk cpu0 IT (5934) 0009c4e8:00001009c4e8_NS a90117e4 O EL1h_n : STP x4,x5,[sp,#0x10] +5970 clk cpu0 MW8 03700510:000000f00510_NS 00000000_030293f0 +5970 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000fffe0 +5971 clk cpu0 IT (5935) 0009c4ec:00001009c4ec_NS a9021fe6 O EL1h_n : STP x6,x7,[sp,#0x20] +5971 clk cpu0 MW8 03700520:000000f00520_NS e7ffe7ff_e7ffe7ff +5971 clk cpu0 MW8 03700528:000000f00528_NS 0001ffff_fe000000 +5972 clk cpu0 IT (5936) 0009c4f0:00001009c4f0_NS a9067fff O EL1h_n : STP xzr,xzr,[sp,#0x60] +5972 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00000000 +5972 clk cpu0 MW8 03700568:000000f00568_NS 00000000_00000000 +5973 clk cpu0 IT (5937) 0009c4f4:00001009c4f4_NS a9057fff O EL1h_n : STP xzr,xzr,[sp,#0x50] +5973 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +5973 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000000 +5974 clk cpu0 IS (5938) 0009c4f8:00001009c4f8_NS 54000423 O EL1h_n : B.CC 0x9c57c +5975 clk cpu0 IT (5939) 0009c4fc:00001009c4fc_NS 90017b74 O EL1h_n : ADRP x20,0x30084fc +5975 clk cpu0 R X20 0000000003008000 +5976 clk cpu0 IT (5940) 0009c500:00001009c500_NS 9114a294 O EL1h_n : ADD x20,x20,#0x528 +5976 clk cpu0 R X20 0000000003008528 +5977 clk cpu0 IT (5941) 0009c504:00001009c504_NS aa1403e0 O EL1h_n : MOV x0,x20 +5977 clk cpu0 R X0 0000000003008528 +5978 clk cpu0 IT (5942) 0009c508:00001009c508_NS aa0103f3 O EL1h_n : MOV x19,x1 +5978 clk cpu0 R X19 000000000004CCC9 +5979 clk cpu0 IT (5943) 0009c50c:00001009c50c_NS 97fff114 O EL1h_n : BL 0x9895c +5979 clk cpu0 R X30 000000000009C510 +5980 clk cpu0 IT (5944) 0009895c:00001009895c_NS d0030be8 O EL1h_n : ADRP x8,0x621695c +5980 clk cpu0 R X8 0000000006216000 +5981 clk cpu0 IT (5945) 00098960:000010098960_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +5981 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +5981 clk cpu0 R X8 0000000000000001 +5982 clk cpu0 IT (5946) 00098964:000010098964_NS 7100091f O EL1h_n : CMP w8,#2 +5982 clk cpu0 R cpsr 820003c5 +5983 clk cpu0 IT (5947) 00098968:000010098968_NS 54000043 O EL1h_n : B.CC 0x98970 +5984 clk cpu0 IT (5948) 00098970:000010098970_NS d65f03c0 O EL1h_n : RET +5985 clk cpu0 IT (5949) 0009c510:00001009c510_NS 910003e9 O EL1h_n : MOV x9,sp +5985 clk cpu0 R X9 0000000003700500 +5986 clk cpu0 IT (5950) 0009c514:00001009c514_NS 128005e8 O EL1h_n : MOV w8,#0xffffffd0 +5986 clk cpu0 R X8 00000000FFFFFFD0 +5987 clk cpu0 IT (5951) 0009c518:00001009c518_NS 910243ea O EL1h_n : ADD x10,sp,#0x90 +5987 clk cpu0 R X10 0000000003700590 +5988 clk cpu0 IT (5952) 0009c51c:00001009c51c_NS 9100c129 O EL1h_n : ADD x9,x9,#0x30 +5988 clk cpu0 R X9 0000000003700530 +5989 clk cpu0 IT (5953) 0009c520:00001009c520_NS 2a1f03e0 O EL1h_n : MOV w0,wzr +5989 clk cpu0 R X0 0000000000000000 +5990 clk cpu0 IT (5954) 0009c524:00001009c524_NS 2a1f03e1 O EL1h_n : MOV w1,wzr +5990 clk cpu0 R X1 0000000000000000 +5991 clk cpu0 IT (5955) 0009c528:00001009c528_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +5991 clk cpu0 R X2 0000000000000000 +5992 clk cpu0 IT (5956) 0009c52c:00001009c52c_NS f90037e8 O EL1h_n : STR x8,[sp,#0x68] +5992 clk cpu0 MW8 03700568:000000f00568_NS 00000000_ffffffd0 +5993 clk cpu0 IT (5957) 0009c530:00001009c530_NS a90527ea O EL1h_n : STP x10,x9,[sp,#0x50] +5993 clk cpu0 MW8 03700550:000000f00550_NS 00000000_03700590 +5993 clk cpu0 MW8 03700558:000000f00558_NS 00000000_03700530 +5994 clk cpu0 IT (5958) 0009c534:00001009c534_NS d503201f O EL1h_n : NOP +5995 clk cpu0 IT (5959) 0009c538:00001009c538_NS a945a3ea O EL1h_n : LDP x10,x8,[sp,#0x58] +5995 clk cpu0 MR8 03700558:000000f00558_NS 00000000_03700530 +5995 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00000000 +5995 clk cpu0 R X8 0000000000000000 +5995 clk cpu0 R X10 0000000003700530 +5996 clk cpu0 IT (5960) 0009c53c:00001009c53c_NS f9402be9 O EL1h_n : LDR x9,[sp,#0x50] +5996 clk cpu0 MR8 03700550:000000f00550_NS 00000000_03700590 +5996 clk cpu0 R X9 0000000003700590 +5996 clk cpu0 CACHE cpu.cpu0.l1icache LINE 002b INVAL 0x000010040540_NS +5996 clk cpu0 CACHE cpu.cpu0.l1icache LINE 002b ALLOC 0x00001009c540_NS +5997 clk cpu0 IT (5961) 0009c540:00001009c540_NS f94037eb O EL1h_n : LDR x11,[sp,#0x68] +5997 clk cpu0 MR8 03700568:000000f00568_NS 00000000_ffffffd0 +5997 clk cpu0 R X11 00000000FFFFFFD0 +5998 clk cpu0 IT (5962) 0009c544:00001009c544_NS 2a0003f5 O EL1h_n : MOV w21,w0 +5998 clk cpu0 R X21 0000000000000000 +5999 clk cpu0 IT (5963) 0009c548:00001009c548_NS 9100c3e1 O EL1h_n : ADD x1,sp,#0x30 +5999 clk cpu0 R X1 0000000003700530 +6000 clk cpu0 IT (5964) 0009c54c:00001009c54c_NS aa1303e0 O EL1h_n : MOV x0,x19 +6000 clk cpu0 R X0 000000000004CCC9 +6001 clk cpu0 IT (5965) 0009c550:00001009c550_NS a903a3ea O EL1h_n : STP x10,x8,[sp,#0x38] +6001 clk cpu0 MW8 03700538:000000f00538_NS 00000000_03700530 +6001 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000000 +6002 clk cpu0 IT (5966) 0009c554:00001009c554_NS f9001be9 O EL1h_n : STR x9,[sp,#0x30] +6002 clk cpu0 MW8 03700530:000000f00530_NS 00000000_03700590 +6003 clk cpu0 IT (5967) 0009c558:00001009c558_NS f90027eb O EL1h_n : STR x11,[sp,#0x48] +6003 clk cpu0 MW8 03700548:000000f00548_NS 00000000_ffffffd0 +6004 clk cpu0 IT (5968) 0009c55c:00001009c55c_NS 97ffd97b O EL1h_n : BL 0x92b48 +6004 clk cpu0 R X30 000000000009C560 +6005 clk cpu0 IT (5969) 00092b48:000010092b48_NS d10283ff O EL1h_n : SUB sp,sp,#0xa0 +6005 clk cpu0 R SP_EL1 0000000003700460 +6006 clk cpu0 IT (5970) 00092b4c:000010092b4c_NS a9097bf3 O EL1h_n : STP x19,x30,[sp,#0x90] +6006 clk cpu0 MW8 037004f0:000000f004f0_NS 00000000_0004ccc9 +6006 clk cpu0 MW8 037004f8:000000f004f8_NS 00000000_0009c560 +6006 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0027 ALLOC 0x000000f004c0_NS +6006 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0027 DIRTY 0x000000f004c0_NS +6006 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f004c0_NS +6006 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f004c0_NS +6007 clk cpu0 IT (5971) 00092b50:000010092b50_NS aa0103f3 O EL1h_n : MOV x19,x1 +6007 clk cpu0 R X19 0000000003700530 +6008 clk cpu0 IT (5972) 00092b54:000010092b54_NS d0fffdc1 O EL1h_n : ADRP x1,0x4cb54 +6008 clk cpu0 R X1 000000000004C000 +6009 clk cpu0 IT (5973) 00092b58:000010092b58_NS a90853f5 O EL1h_n : STP x21,x20,[sp,#0x80] +6009 clk cpu0 MW8 037004e0:000000f004e0_NS 00000000_00000000 +6009 clk cpu0 MW8 037004e8:000000f004e8_NS 00000000_03008528 +6010 clk cpu0 IT (5974) 00092b5c:000010092b5c_NS aa0003f4 O EL1h_n : MOV x20,x0 +6010 clk cpu0 R X20 000000000004CCC9 +6011 clk cpu0 IT (5975) 00092b60:000010092b60_NS 91002c21 O EL1h_n : ADD x1,x1,#0xb +6011 clk cpu0 R X1 000000000004C00B +6012 clk cpu0 IT (5976) 00092b64:000010092b64_NS 910013e0 O EL1h_n : ADD x0,sp,#4 +6012 clk cpu0 R X0 0000000003700464 +6013 clk cpu0 IT (5977) 00092b68:000010092b68_NS 52800762 O EL1h_n : MOV w2,#0x3b +6013 clk cpu0 R X2 000000000000003B +6014 clk cpu0 IT (5978) 00092b6c:000010092b6c_NS f90023fc O EL1h_n : STR x28,[sp,#0x40] +6014 clk cpu0 MW8 037004a0:000000f004a0_NS ff7fff7f_ff7fff7f +6014 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0025 INVAL 0x0000162f0480_NS +6014 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0025 ALLOC 0x000000f00480_NS +6014 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0025 DIRTY 0x000000f00480_NS +6014 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00480_NS +6014 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00480_NS +6015 clk cpu0 IT (5979) 00092b70:000010092b70_NS a9056bfb O EL1h_n : STP x27,x26,[sp,#0x50] +6015 clk cpu0 MW8 037004b0:000000f004b0_NS 00010001_00010001 +6015 clk cpu0 MW8 037004b8:000000f004b8_NS ffe000ff_ffe000ff +6016 clk cpu0 IT (5980) 00092b74:000010092b74_NS a90663f9 O EL1h_n : STP x25,x24,[sp,#0x60] +6016 clk cpu0 MW8 037004c0:000000f004c0_NS 00000000_0000003c +6016 clk cpu0 MW8 037004c8:000000f004c8_NS 00000000_00007c00 +6017 clk cpu0 IT (5981) 00092b78:000010092b78_NS a9075bf7 O EL1h_n : STP x23,x22,[sp,#0x70] +6017 clk cpu0 MW8 037004d0:000000f004d0_NS fffe0000_00003fff +6017 clk cpu0 MW8 037004d8:000000f004d8_NS ffffffff_fffe0003 +6018 clk cpu0 IT (5982) 00092b7c:000010092b7c_NS 97fdf655 O EL1h_n : BL 0x104d0 +6018 clk cpu0 R X30 0000000000092B80 +6019 clk cpu0 IT (5983) 000104d0:0000100104d0_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +6019 clk cpu0 MW8 03700450:000000f00450_NS 00000000_03700530 +6019 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00092b80 +6019 clk cpu0 R SP_EL1 0000000003700450 +6019 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0022 CLEAN 0x00001084c440_NS +6019 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0022 INVAL 0x00001084c440_NS +6019 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0022 ALLOC 0x000000f00440_NS +6019 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0022 DIRTY 0x000000f00440_NS +6019 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1111 ALLOC 0x00001084c440_NS +6019 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00440_NS +6019 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00440_NS +6020 clk cpu0 IT (5984) 000104d4:0000100104d4_NS aa0003f3 O EL1h_n : MOV x19,x0 +6020 clk cpu0 R X19 0000000003700464 +6021 clk cpu0 IT (5985) 000104d8:0000100104d8_NS 9400002b O EL1h_n : BL 0x10584 +6021 clk cpu0 R X30 00000000000104DC +6022 clk cpu0 IT (5986) 00010584:000010010584_NS f100105f O EL1h_n : CMP x2,#4 +6022 clk cpu0 R cpsr 220003c5 +6023 clk cpu0 IS (5987) 00010588:000010010588_NS 54000643 O EL1h_n : B.CC 0x10650 +6024 clk cpu0 IT (5988) 0001058c:00001001058c_NS f240041f O EL1h_n : TST x0,#3 +6024 clk cpu0 R cpsr 420003c5 +6025 clk cpu0 IT (5989) 00010590:000010010590_NS 54000320 O EL1h_n : B.EQ 0x105f4 +6026 clk cpu0 IT (5990) 000105f4:0000100105f4_NS 7200042a O EL1h_n : ANDS w10,w1,#3 +6026 clk cpu0 R cpsr 020003c5 +6026 clk cpu0 R X10 0000000000000003 +6027 clk cpu0 IS (5991) 000105f8:0000100105f8_NS 54000440 O EL1h_n : B.EQ 0x10680 +6028 clk cpu0 IT (5992) 000105fc:0000100105fc_NS 52800409 O EL1h_n : MOV w9,#0x20 +6028 clk cpu0 R X9 0000000000000020 +6028 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0030 INVAL 0x000010094600 +6028 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0030 ALLOC 0x000010010600_NS +6029 clk cpu0 IT (5993) 00010600:000010010600_NS cb0a0028 O EL1h_n : SUB x8,x1,x10 +6029 clk cpu0 R X8 000000000004C008 +6030 clk cpu0 IT (5994) 00010604:000010010604_NS f100105f O EL1h_n : CMP x2,#4 +6030 clk cpu0 R cpsr 220003c5 +6031 clk cpu0 IT (5995) 00010608:000010010608_NS 4b0a0d29 O EL1h_n : SUB w9,w9,w10,LSL #3 +6031 clk cpu0 R X9 0000000000000008 +6032 clk cpu0 IS (5996) 0001060c:00001001060c_NS 540001c3 O EL1h_n : B.CC 0x10644 +6033 clk cpu0 IT (5997) 00010610:000010010610_NS b940010c O EL1h_n : LDR w12,[x8,#0] +6033 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +6033 clk cpu0 R X12 000000000A00000A +6033 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070440000_NS +6033 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x00001004c000_NS +6034 clk cpu0 IT (5998) 00010614:000010010614_NS 531d714a O EL1h_n : UBFIZ w10,w10,#3,#29 +6034 clk cpu0 R X10 0000000000000018 +6035 clk cpu0 IT (5999) 00010618:000010010618_NS aa0203eb O EL1h_n : MOV x11,x2 +6035 clk cpu0 R X11 000000000000003B +6036 clk cpu0 IT (6000) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6036 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +6036 clk cpu0 R X8 000000000004C00C +6036 clk cpu0 R X13 000000006F727245 +6037 clk cpu0 IT (6001) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6037 clk cpu0 R X12 000000000000000A +6038 clk cpu0 IT (6002) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6038 clk cpu0 R X11 0000000000000037 +6039 clk cpu0 IT (6003) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6039 clk cpu0 R cpsr 220003c5 +6040 clk cpu0 IT (6004) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6040 clk cpu0 R X14 0000000072724500 +6041 clk cpu0 IT (6005) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6041 clk cpu0 R X12 000000007272450A +6042 clk cpu0 IT (6006) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6042 clk cpu0 MW4 03700464:000000f00464_NS 7272450a +6042 clk cpu0 R X0 0000000003700468 +6043 clk cpu0 IT (6007) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6043 clk cpu0 R X12 000000006F727245 +6044 clk cpu0 IT (6008) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6045 clk cpu0 IT (6009) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6045 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +6045 clk cpu0 R X8 000000000004C010 +6045 clk cpu0 R X13 0000000049203A72 +6046 clk cpu0 IT (6010) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6046 clk cpu0 R X12 000000000000006F +6047 clk cpu0 IT (6011) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6047 clk cpu0 R X11 0000000000000033 +6048 clk cpu0 IT (6012) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6048 clk cpu0 R cpsr 220003c5 +6049 clk cpu0 IT (6013) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6049 clk cpu0 R X14 00000000203A7200 +6050 clk cpu0 IT (6014) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6050 clk cpu0 R X12 00000000203A726F +6051 clk cpu0 IT (6015) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6051 clk cpu0 MW4 03700468:000000f00468_NS 203a726f +6051 clk cpu0 R X0 000000000370046C +6052 clk cpu0 IT (6016) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6052 clk cpu0 R X12 0000000049203A72 +6053 clk cpu0 IT (6017) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6054 clk cpu0 IT (6018) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6054 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +6054 clk cpu0 R X8 000000000004C014 +6054 clk cpu0 R X13 0000000067656C6C +6055 clk cpu0 IT (6019) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6055 clk cpu0 R X12 0000000000000049 +6056 clk cpu0 IT (6020) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6056 clk cpu0 R X11 000000000000002F +6057 clk cpu0 IT (6021) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6057 clk cpu0 R cpsr 220003c5 +6058 clk cpu0 IT (6022) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6058 clk cpu0 R X14 00000000656C6C00 +6059 clk cpu0 IT (6023) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6059 clk cpu0 R X12 00000000656C6C49 +6060 clk cpu0 IT (6024) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6060 clk cpu0 MW4 0370046c:000000f0046c_NS 656c6c49 +6060 clk cpu0 R X0 0000000003700470 +6061 clk cpu0 IT (6025) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6061 clk cpu0 R X12 0000000067656C6C +6062 clk cpu0 IT (6026) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6063 clk cpu0 IT (6027) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6063 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +6063 clk cpu0 R X8 000000000004C018 +6063 clk cpu0 R X13 0000000066206C61 +6064 clk cpu0 IT (6028) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6064 clk cpu0 R X12 0000000000000067 +6065 clk cpu0 IT (6029) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6065 clk cpu0 R X11 000000000000002B +6066 clk cpu0 IT (6030) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6066 clk cpu0 R cpsr 220003c5 +6067 clk cpu0 IT (6031) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6067 clk cpu0 R X14 00000000206C6100 +6068 clk cpu0 IT (6032) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6068 clk cpu0 R X12 00000000206C6167 +6069 clk cpu0 IT (6033) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6069 clk cpu0 MW4 03700470:000000f00470_NS 206c6167 +6069 clk cpu0 R X0 0000000003700474 +6070 clk cpu0 IT (6034) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6070 clk cpu0 R X12 0000000066206C61 +6071 clk cpu0 IT (6035) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6072 clk cpu0 IT (6036) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6072 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +6072 clk cpu0 R X8 000000000004C01C +6072 clk cpu0 R X13 00000000616D726F +6073 clk cpu0 IT (6037) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6073 clk cpu0 R X12 0000000000000066 +6074 clk cpu0 IT (6038) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6074 clk cpu0 R X11 0000000000000027 +6075 clk cpu0 IT (6039) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6075 clk cpu0 R cpsr 220003c5 +6076 clk cpu0 IT (6040) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6076 clk cpu0 R X14 000000006D726F00 +6077 clk cpu0 IT (6041) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6077 clk cpu0 R X12 000000006D726F66 +6078 clk cpu0 IT (6042) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6078 clk cpu0 MW4 03700474:000000f00474_NS 6d726f66 +6078 clk cpu0 R X0 0000000003700478 +6079 clk cpu0 IT (6043) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6079 clk cpu0 R X12 00000000616D726F +6080 clk cpu0 IT (6044) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6081 clk cpu0 IT (6045) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6081 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +6081 clk cpu0 R X8 000000000004C020 +6081 clk cpu0 R X13 0000000070732074 +6082 clk cpu0 IT (6046) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6082 clk cpu0 R X12 0000000000000061 +6083 clk cpu0 IT (6047) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6083 clk cpu0 R X11 0000000000000023 +6084 clk cpu0 IT (6048) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6084 clk cpu0 R cpsr 220003c5 +6085 clk cpu0 IT (6049) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6085 clk cpu0 R X14 0000000073207400 +6086 clk cpu0 IT (6050) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6086 clk cpu0 R X12 0000000073207461 +6087 clk cpu0 IT (6051) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6087 clk cpu0 MW4 03700478:000000f00478_NS 73207461 +6087 clk cpu0 R X0 000000000370047C +6088 clk cpu0 IT (6052) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6088 clk cpu0 R X12 0000000070732074 +6089 clk cpu0 IT (6053) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6090 clk cpu0 IT (6054) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6090 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +6090 clk cpu0 R X8 000000000004C024 +6090 clk cpu0 R X13 0000000066696365 +6091 clk cpu0 IT (6055) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6091 clk cpu0 R X12 0000000000000070 +6092 clk cpu0 IT (6056) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6092 clk cpu0 R X11 000000000000001F +6093 clk cpu0 IT (6057) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6093 clk cpu0 R cpsr 220003c5 +6094 clk cpu0 IT (6058) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6094 clk cpu0 R X14 0000000069636500 +6095 clk cpu0 IT (6059) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6095 clk cpu0 R X12 0000000069636570 +6096 clk cpu0 IT (6060) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6096 clk cpu0 MW4 0370047c:000000f0047c_NS 69636570 +6096 clk cpu0 R X0 0000000003700480 +6097 clk cpu0 IT (6061) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6097 clk cpu0 R X12 0000000066696365 +6098 clk cpu0 IT (6062) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6099 clk cpu0 IT (6063) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6099 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +6099 clk cpu0 R X8 000000000004C028 +6099 clk cpu0 R X13 0000000020726569 +6100 clk cpu0 IT (6064) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6100 clk cpu0 R X12 0000000000000066 +6101 clk cpu0 IT (6065) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6101 clk cpu0 R X11 000000000000001B +6102 clk cpu0 IT (6066) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6102 clk cpu0 R cpsr 220003c5 +6103 clk cpu0 IT (6067) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6103 clk cpu0 R X14 0000000072656900 +6104 clk cpu0 IT (6068) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6104 clk cpu0 R X12 0000000072656966 +6105 clk cpu0 IT (6069) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6105 clk cpu0 MW4 03700480:000000f00480_NS 72656966 +6105 clk cpu0 R X0 0000000003700484 +6106 clk cpu0 IT (6070) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6106 clk cpu0 R X12 0000000020726569 +6107 clk cpu0 IT (6071) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6108 clk cpu0 IT (6072) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6108 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +6108 clk cpu0 R X8 000000000004C02C +6108 clk cpu0 R X13 0000000064657375 +6109 clk cpu0 IT (6073) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6109 clk cpu0 R X12 0000000000000020 +6110 clk cpu0 IT (6074) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6110 clk cpu0 R X11 0000000000000017 +6111 clk cpu0 IT (6075) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6111 clk cpu0 R cpsr 220003c5 +6112 clk cpu0 IT (6076) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6112 clk cpu0 R X14 0000000065737500 +6113 clk cpu0 IT (6077) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6113 clk cpu0 R X12 0000000065737520 +6114 clk cpu0 IT (6078) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6114 clk cpu0 MW4 03700484:000000f00484_NS 65737520 +6114 clk cpu0 R X0 0000000003700488 +6115 clk cpu0 IT (6079) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6115 clk cpu0 R X12 0000000064657375 +6116 clk cpu0 IT (6080) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6117 clk cpu0 IT (6081) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6117 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +6117 clk cpu0 R X8 000000000004C030 +6117 clk cpu0 R X13 000000005F27203A +6118 clk cpu0 IT (6082) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6118 clk cpu0 R X12 0000000000000064 +6119 clk cpu0 IT (6083) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6119 clk cpu0 R X11 0000000000000013 +6120 clk cpu0 IT (6084) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6120 clk cpu0 R cpsr 220003c5 +6121 clk cpu0 IT (6085) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6121 clk cpu0 R X14 0000000027203A00 +6122 clk cpu0 IT (6086) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6122 clk cpu0 R X12 0000000027203A64 +6123 clk cpu0 IT (6087) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6123 clk cpu0 MW4 03700488:000000f00488_NS 27203a64 +6123 clk cpu0 R X0 000000000370048C +6124 clk cpu0 IT (6088) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6124 clk cpu0 R X12 000000005F27203A +6125 clk cpu0 IT (6089) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6126 clk cpu0 IT (6090) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6126 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +6126 clk cpu0 R X8 000000000004C034 +6126 clk cpu0 R X13 0000000045202E27 +6127 clk cpu0 IT (6091) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6127 clk cpu0 R X12 000000000000005F +6128 clk cpu0 IT (6092) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6128 clk cpu0 R X11 000000000000000F +6129 clk cpu0 IT (6093) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6129 clk cpu0 R cpsr 220003c5 +6130 clk cpu0 IT (6094) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6130 clk cpu0 R X14 00000000202E2700 +6131 clk cpu0 IT (6095) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6131 clk cpu0 R X12 00000000202E275F +6132 clk cpu0 IT (6096) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6132 clk cpu0 MW4 0370048c:000000f0048c_NS 202e275f +6132 clk cpu0 R X0 0000000003700490 +6133 clk cpu0 IT (6097) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6133 clk cpu0 R X12 0000000045202E27 +6134 clk cpu0 IT (6098) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6135 clk cpu0 IT (6099) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6135 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +6135 clk cpu0 R X8 000000000004C038 +6135 clk cpu0 R X13 000000006E69646E +6136 clk cpu0 IT (6100) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6136 clk cpu0 R X12 0000000000000045 +6137 clk cpu0 IT (6101) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6137 clk cpu0 R X11 000000000000000B +6138 clk cpu0 IT (6102) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6138 clk cpu0 R cpsr 220003c5 +6139 clk cpu0 IT (6103) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6139 clk cpu0 R X14 0000000069646E00 +6140 clk cpu0 IT (6104) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6140 clk cpu0 R X12 0000000069646E45 +6141 clk cpu0 IT (6105) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6141 clk cpu0 MW4 03700490:000000f00490_NS 69646e45 +6141 clk cpu0 R X0 0000000003700494 +6142 clk cpu0 IT (6106) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6142 clk cpu0 R X12 000000006E69646E +6143 clk cpu0 IT (6107) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6144 clk cpu0 IT (6108) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6144 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +6144 clk cpu0 R X8 000000000004C03C +6144 clk cpu0 R X13 0000000065542067 +6145 clk cpu0 IT (6109) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6145 clk cpu0 R X12 000000000000006E +6146 clk cpu0 IT (6110) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6146 clk cpu0 R X11 0000000000000007 +6147 clk cpu0 IT (6111) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6147 clk cpu0 R cpsr 220003c5 +6148 clk cpu0 IT (6112) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6148 clk cpu0 R X14 0000000054206700 +6149 clk cpu0 IT (6113) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6149 clk cpu0 R X12 000000005420676E +6150 clk cpu0 IT (6114) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6150 clk cpu0 MW4 03700494:000000f00494_NS 5420676e +6150 clk cpu0 R X0 0000000003700498 +6151 clk cpu0 IT (6115) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6151 clk cpu0 R X12 0000000065542067 +6152 clk cpu0 IT (6116) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6153 clk cpu0 IT (6117) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +6153 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +6153 clk cpu0 R X8 000000000004C040 +6153 clk cpu0 R X13 000000000A2E7473 +6154 clk cpu0 IT (6118) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +6154 clk cpu0 R X12 0000000000000065 +6155 clk cpu0 IT (6119) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +6155 clk cpu0 R X11 0000000000000003 +6156 clk cpu0 IT (6120) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +6156 clk cpu0 R cpsr 620003c5 +6157 clk cpu0 IT (6121) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +6157 clk cpu0 R X14 000000002E747300 +6158 clk cpu0 IT (6122) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +6158 clk cpu0 R X12 000000002E747365 +6159 clk cpu0 IT (6123) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +6159 clk cpu0 MW4 03700498:000000f00498_NS 2e747365 +6159 clk cpu0 R X0 000000000370049C +6160 clk cpu0 IT (6124) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +6160 clk cpu0 R X12 000000000A2E7473 +6161 clk cpu0 IS (6125) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +6161 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0033 INVAL 0x000010094640 +6161 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0033 ALLOC 0x000010010640_NS +6162 clk cpu0 IT (6126) 00010640:000010010640_NS 92400442 O EL1h_n : AND x2,x2,#3 +6162 clk cpu0 R X2 0000000000000003 +6163 clk cpu0 IT (6127) 00010644:000010010644_NS 53037d29 O EL1h_n : LSR w9,w9,#3 +6163 clk cpu0 R X9 0000000000000001 +6164 clk cpu0 IT (6128) 00010648:000010010648_NS cb090108 O EL1h_n : SUB x8,x8,x9 +6164 clk cpu0 R X8 000000000004C03F +6165 clk cpu0 IT (6129) 0001064c:00001001064c_NS 91001101 O EL1h_n : ADD x1,x8,#4 +6165 clk cpu0 R X1 000000000004C043 +6166 clk cpu0 IT (6130) 00010650:000010010650_NS 7100045f O EL1h_n : CMP w2,#1 +6166 clk cpu0 R cpsr 220003c5 +6167 clk cpu0 IS (6131) 00010654:000010010654_NS 5400014b O EL1h_n : B.LT 0x1067c +6168 clk cpu0 IT (6132) 00010658:000010010658_NS 39400028 O EL1h_n : LDRB w8,[x1,#0] +6168 clk cpu0 MR1 0004c043:00001004c043_NS 0a +6168 clk cpu0 R X8 000000000000000A +6169 clk cpu0 IT (6133) 0001065c:00001001065c_NS 39000008 O EL1h_n : STRB w8,[x0,#0] +6169 clk cpu0 MW1 0370049c:000000f0049c_NS 0a +6170 clk cpu0 IS (6134) 00010660:000010010660_NS 540000e0 O EL1h_n : B.EQ 0x1067c +6171 clk cpu0 IT (6135) 00010664:000010010664_NS 39400428 O EL1h_n : LDRB w8,[x1,#1] +6171 clk cpu0 MR1 0004c044:00001004c044_NS 00 +6171 clk cpu0 R X8 0000000000000000 +6172 clk cpu0 IT (6136) 00010668:000010010668_NS 71000c5f O EL1h_n : CMP w2,#3 +6172 clk cpu0 R cpsr 620003c5 +6173 clk cpu0 IT (6137) 0001066c:00001001066c_NS 39000408 O EL1h_n : STRB w8,[x0,#1] +6173 clk cpu0 MW1 0370049d:000000f0049d_NS 00 +6174 clk cpu0 IS (6138) 00010670:000010010670_NS 5400006b O EL1h_n : B.LT 0x1067c +6175 clk cpu0 IT (6139) 00010674:000010010674_NS 39400828 O EL1h_n : LDRB w8,[x1,#2] +6175 clk cpu0 MR1 0004c045:00001004c045_NS 00 +6175 clk cpu0 R X8 0000000000000000 +6176 clk cpu0 IT (6140) 00010678:000010010678_NS 39000808 O EL1h_n : STRB w8,[x0,#2] +6176 clk cpu0 MW1 0370049e:000000f0049e_NS 00 +6177 clk cpu0 IT (6141) 0001067c:00001001067c_NS d65f03c0 O EL1h_n : RET +6178 clk cpu0 IT (6142) 000104dc:0000100104dc_NS aa1303e0 O EL1h_n : MOV x0,x19 +6178 clk cpu0 R X0 0000000003700464 +6179 clk cpu0 IT (6143) 000104e0:0000100104e0_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +6179 clk cpu0 MR8 03700450:000000f00450_NS 00000000_03700530 +6179 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00092b80 +6179 clk cpu0 R SP_EL1 0000000003700460 +6179 clk cpu0 R X19 0000000003700530 +6179 clk cpu0 R X30 0000000000092B80 +6180 clk cpu0 IT (6144) 000104e4:0000100104e4_NS d65f03c0 O EL1h_n : RET +6181 clk cpu0 IT (6145) 00092b80:000010092b80_NS d0fffdd6 O EL1h_n : ADRP x22,0x4cb80 +6181 clk cpu0 R X22 000000000004C000 +6182 clk cpu0 IT (6146) 00092b84:000010092b84_NS d0fffdd7 O EL1h_n : ADRP x23,0x4cb84 +6182 clk cpu0 R X23 000000000004C000 +6183 clk cpu0 IT (6147) 00092b88:000010092b88_NS 2a1f03fa O EL1h_n : MOV w26,wzr +6183 clk cpu0 R X26 0000000000000000 +6184 clk cpu0 IT (6148) 00092b8c:000010092b8c_NS f0017cb5 O EL1h_n : ADRP x21,0x3029b8c +6184 clk cpu0 R X21 0000000003029000 +6185 clk cpu0 IT (6149) 00092b90:000010092b90_NS 910422d6 O EL1h_n : ADD x22,x22,#0x108 +6185 clk cpu0 R X22 000000000004C108 +6186 clk cpu0 IT (6150) 00092b94:000010092b94_NS 9104a6f7 O EL1h_n : ADD x23,x23,#0x129 +6186 clk cpu0 R X23 000000000004C129 +6187 clk cpu0 IT (6151) 00092b98:000010092b98_NS f0017d78 O EL1h_n : ADRP x24,0x3041b98 +6187 clk cpu0 R X24 0000000003041000 +6188 clk cpu0 IT (6152) 00092b9c:000010092b9c_NS 90030c39 O EL1h_n : ADRP x25,0x6216b9c +6188 clk cpu0 R X25 0000000006216000 +6189 clk cpu0 IT (6153) 00092ba0:000010092ba0_NS 14000005 O EL1h_n : B 0x92bb4 +6190 clk cpu0 IT (6154) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6190 clk cpu0 MR1 0004ccc9:00001004ccc9_NS 20 +6190 clk cpu0 R X8 0000000000000020 +6190 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0067 ALLOC 0x00001004ccc0_NS +6190 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1330 ALLOC 0x00001004ccc0_NS +6191 clk cpu0 IT (6155) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6191 clk cpu0 R cpsr 820003c5 +6192 clk cpu0 IS (6156) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6193 clk cpu0 IS (6157) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6194 clk cpu0 IT (6158) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6194 clk cpu0 R cpsr 020003c5 +6195 clk cpu0 IT (6159) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6196 clk cpu0 IT (6160) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6196 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6196 clk cpu0 R X9 0000000013000000 +6197 clk cpu0 IT (6161) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6197 clk cpu0 R X27 000000000004CCC9 +6198 clk cpu0 IT (6162) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6198 clk cpu0 R X20 000000000004CCCA +6199 clk cpu0 IT (6163) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6199 clk cpu0 MW1 13000000:000013000000_NS 20 +6200 clk cpu0 IT (6164) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6200 clk cpu0 MR1 0004ccca:00001004ccca_NS 45 +6200 clk cpu0 R X8 0000000000000045 +6201 clk cpu0 IT (6165) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6201 clk cpu0 R cpsr 220003c5 +6202 clk cpu0 IS (6166) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6203 clk cpu0 IS (6167) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6204 clk cpu0 IT (6168) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6204 clk cpu0 R cpsr 020003c5 +6205 clk cpu0 IT (6169) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6206 clk cpu0 IT (6170) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6206 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6206 clk cpu0 R X9 0000000013000000 +6207 clk cpu0 IT (6171) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6207 clk cpu0 R X27 000000000004CCCA +6208 clk cpu0 IT (6172) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6208 clk cpu0 R X20 000000000004CCCB +6209 clk cpu0 IT (6173) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6209 clk cpu0 MW1 13000000:000013000000_NS 45 +6210 clk cpu0 IT (6174) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6210 clk cpu0 MR1 0004cccb:00001004cccb_NS 6e +6210 clk cpu0 R X8 000000000000006E +6211 clk cpu0 IT (6175) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6211 clk cpu0 R cpsr 220003c5 +6212 clk cpu0 IS (6176) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6213 clk cpu0 IS (6177) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6214 clk cpu0 IT (6178) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6214 clk cpu0 R cpsr 020003c5 +6215 clk cpu0 IT (6179) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6216 clk cpu0 IT (6180) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6216 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6216 clk cpu0 R X9 0000000013000000 +6217 clk cpu0 IT (6181) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6217 clk cpu0 R X27 000000000004CCCB +6218 clk cpu0 IT (6182) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6218 clk cpu0 R X20 000000000004CCCC +6219 clk cpu0 IT (6183) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6219 clk cpu0 MW1 13000000:000013000000_NS 6e +6220 clk cpu0 IT (6184) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6220 clk cpu0 MR1 0004cccc:00001004cccc_NS 61 +6220 clk cpu0 R X8 0000000000000061 +6221 clk cpu0 IT (6185) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6221 clk cpu0 R cpsr 220003c5 +6222 clk cpu0 IS (6186) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6223 clk cpu0 IS (6187) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6224 clk cpu0 IT (6188) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6224 clk cpu0 R cpsr 020003c5 +6225 clk cpu0 IT (6189) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6226 clk cpu0 IT (6190) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6226 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6226 clk cpu0 R X9 0000000013000000 +6227 clk cpu0 IT (6191) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6227 clk cpu0 R X27 000000000004CCCC +6228 clk cpu0 IT (6192) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6228 clk cpu0 R X20 000000000004CCCD +6229 clk cpu0 IT (6193) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6229 clk cpu0 MW1 13000000:000013000000_NS 61 +6230 clk cpu0 IT (6194) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6230 clk cpu0 MR1 0004cccd:00001004cccd_NS 62 +6230 clk cpu0 R X8 0000000000000062 +6231 clk cpu0 IT (6195) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6231 clk cpu0 R cpsr 220003c5 +6232 clk cpu0 IS (6196) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6233 clk cpu0 IS (6197) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6234 clk cpu0 IT (6198) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6234 clk cpu0 R cpsr 020003c5 +6235 clk cpu0 IT (6199) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6236 clk cpu0 IT (6200) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6236 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6236 clk cpu0 R X9 0000000013000000 +6237 clk cpu0 IT (6201) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6237 clk cpu0 R X27 000000000004CCCD +6238 clk cpu0 IT (6202) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6238 clk cpu0 R X20 000000000004CCCE +6239 clk cpu0 IT (6203) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6239 clk cpu0 MW1 13000000:000013000000_NS 62 +6240 clk cpu0 IT (6204) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6240 clk cpu0 MR1 0004ccce:00001004ccce_NS 6c +6240 clk cpu0 R X8 000000000000006C +6241 clk cpu0 IT (6205) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6241 clk cpu0 R cpsr 220003c5 +6242 clk cpu0 IS (6206) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6243 clk cpu0 IS (6207) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6244 clk cpu0 IT (6208) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6244 clk cpu0 R cpsr 020003c5 +6245 clk cpu0 IT (6209) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6246 clk cpu0 IT (6210) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6246 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6246 clk cpu0 R X9 0000000013000000 +6247 clk cpu0 IT (6211) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6247 clk cpu0 R X27 000000000004CCCE +6248 clk cpu0 IT (6212) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6248 clk cpu0 R X20 000000000004CCCF +6249 clk cpu0 IT (6213) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6249 clk cpu0 MW1 13000000:000013000000_NS 6c +6250 clk cpu0 IT (6214) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6250 clk cpu0 MR1 0004cccf:00001004cccf_NS 65 +6250 clk cpu0 R X8 0000000000000065 +6251 clk cpu0 IT (6215) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6251 clk cpu0 R cpsr 220003c5 +6252 clk cpu0 IS (6216) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6253 clk cpu0 IS (6217) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6254 clk cpu0 IT (6218) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6254 clk cpu0 R cpsr 020003c5 +6255 clk cpu0 IT (6219) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6256 clk cpu0 IT (6220) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6256 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6256 clk cpu0 R X9 0000000013000000 +6257 clk cpu0 IT (6221) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6257 clk cpu0 R X27 000000000004CCCF +6258 clk cpu0 IT (6222) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6258 clk cpu0 R X20 000000000004CCD0 +6259 clk cpu0 IT (6223) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6259 clk cpu0 MW1 13000000:000013000000_NS 65 +6260 clk cpu0 IT (6224) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6260 clk cpu0 MR1 0004ccd0:00001004ccd0_NS 20 +6260 clk cpu0 R X8 0000000000000020 +6261 clk cpu0 IT (6225) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6261 clk cpu0 R cpsr 820003c5 +6262 clk cpu0 IS (6226) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6263 clk cpu0 IS (6227) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6264 clk cpu0 IT (6228) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6264 clk cpu0 R cpsr 420003c5 +6265 clk cpu0 IS (6229) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6266 clk cpu0 IT (6230) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +6266 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +6266 clk cpu0 R X8 0000000000000000 +6267 clk cpu0 IT (6231) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +6267 clk cpu0 MR8 0004ccd0:00001004ccd0_NS 72746563_61727420 +6267 clk cpu0 R X0 7274656361727420 +6268 clk cpu0 IT (6232) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +6268 clk cpu0 R cpsr 820003c5 +6269 clk cpu0 IT (6233) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +6270 clk cpu0 IT (6234) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +6270 clk cpu0 R X27 0000000000000000 +6271 clk cpu0 IT (6235) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +6271 clk cpu0 R X28 000000000004CCD0 +6272 clk cpu0 IT (6236) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +6272 clk cpu0 R X8 00000000FFFFFFF8 +6273 clk cpu0 IT (6237) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6273 clk cpu0 R cpsr 020003c5 +6273 clk cpu0 R X9 0000000000000020 +6274 clk cpu0 IS (6238) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6275 clk cpu0 IT (6239) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6275 clk cpu0 R cpsr 820003c5 +6276 clk cpu0 IS (6240) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6277 clk cpu0 IT (6241) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6277 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6277 clk cpu0 R X9 0000000013000000 +6278 clk cpu0 IT (6242) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6278 clk cpu0 R cpsr 820003c5 +6278 clk cpu0 R X8 00000000FFFFFFF9 +6279 clk cpu0 IT (6243) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6279 clk cpu0 MW1 13000000:000013000000_NS 20 +6280 clk cpu0 IT (6244) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6280 clk cpu0 R X0 0072746563617274 +6281 clk cpu0 IT (6245) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6282 clk cpu0 IT (6246) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6282 clk cpu0 R cpsr 020003c5 +6282 clk cpu0 R X9 0000000000000074 +6283 clk cpu0 IS (6247) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6284 clk cpu0 IT (6248) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6284 clk cpu0 R cpsr 220003c5 +6285 clk cpu0 IS (6249) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6286 clk cpu0 IT (6250) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6286 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6286 clk cpu0 R X9 0000000013000000 +6287 clk cpu0 IT (6251) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6287 clk cpu0 R cpsr 820003c5 +6287 clk cpu0 R X8 00000000FFFFFFFA +6288 clk cpu0 IT (6252) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6288 clk cpu0 MW1 13000000:000013000000_NS 74 +6289 clk cpu0 IT (6253) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6289 clk cpu0 R X0 0000727465636172 +6290 clk cpu0 IT (6254) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6291 clk cpu0 IT (6255) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6291 clk cpu0 R cpsr 020003c5 +6291 clk cpu0 R X9 0000000000000072 +6292 clk cpu0 IS (6256) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6293 clk cpu0 IT (6257) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6293 clk cpu0 R cpsr 220003c5 +6294 clk cpu0 IS (6258) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6295 clk cpu0 IT (6259) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6295 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6295 clk cpu0 R X9 0000000013000000 +6296 clk cpu0 IT (6260) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6296 clk cpu0 R cpsr 820003c5 +6296 clk cpu0 R X8 00000000FFFFFFFB +6297 clk cpu0 IT (6261) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6297 clk cpu0 MW1 13000000:000013000000_NS 72 +6298 clk cpu0 IT (6262) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6298 clk cpu0 R X0 0000007274656361 +6299 clk cpu0 IT (6263) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6300 clk cpu0 IT (6264) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6300 clk cpu0 R cpsr 020003c5 +6300 clk cpu0 R X9 0000000000000061 +6301 clk cpu0 IS (6265) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6302 clk cpu0 IT (6266) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6302 clk cpu0 R cpsr 220003c5 +6303 clk cpu0 IS (6267) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6304 clk cpu0 IT (6268) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6304 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6304 clk cpu0 R X9 0000000013000000 +6305 clk cpu0 IT (6269) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6305 clk cpu0 R cpsr 820003c5 +6305 clk cpu0 R X8 00000000FFFFFFFC +6306 clk cpu0 IT (6270) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6306 clk cpu0 MW1 13000000:000013000000_NS 61 +6307 clk cpu0 IT (6271) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6307 clk cpu0 R X0 0000000072746563 +6308 clk cpu0 IT (6272) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6309 clk cpu0 IT (6273) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6309 clk cpu0 R cpsr 020003c5 +6309 clk cpu0 R X9 0000000000000063 +6310 clk cpu0 IS (6274) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6311 clk cpu0 IT (6275) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6311 clk cpu0 R cpsr 220003c5 +6312 clk cpu0 IS (6276) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6313 clk cpu0 IT (6277) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6313 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6313 clk cpu0 R X9 0000000013000000 +6314 clk cpu0 IT (6278) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6314 clk cpu0 R cpsr 820003c5 +6314 clk cpu0 R X8 00000000FFFFFFFD +6315 clk cpu0 IT (6279) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6315 clk cpu0 MW1 13000000:000013000000_NS 63 +6316 clk cpu0 IT (6280) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6316 clk cpu0 R X0 0000000000727465 +6317 clk cpu0 IT (6281) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6318 clk cpu0 IT (6282) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6318 clk cpu0 R cpsr 020003c5 +6318 clk cpu0 R X9 0000000000000065 +6319 clk cpu0 IS (6283) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6320 clk cpu0 IT (6284) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6320 clk cpu0 R cpsr 220003c5 +6321 clk cpu0 IS (6285) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6322 clk cpu0 IT (6286) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6322 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6322 clk cpu0 R X9 0000000013000000 +6323 clk cpu0 IT (6287) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6323 clk cpu0 R cpsr 820003c5 +6323 clk cpu0 R X8 00000000FFFFFFFE +6324 clk cpu0 IT (6288) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6324 clk cpu0 MW1 13000000:000013000000_NS 65 +6325 clk cpu0 IT (6289) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6325 clk cpu0 R X0 0000000000007274 +6326 clk cpu0 IT (6290) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6327 clk cpu0 IT (6291) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6327 clk cpu0 R cpsr 020003c5 +6327 clk cpu0 R X9 0000000000000074 +6328 clk cpu0 IS (6292) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6329 clk cpu0 IT (6293) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6329 clk cpu0 R cpsr 220003c5 +6330 clk cpu0 IS (6294) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6331 clk cpu0 IT (6295) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6331 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6331 clk cpu0 R X9 0000000013000000 +6332 clk cpu0 IT (6296) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6332 clk cpu0 R cpsr 820003c5 +6332 clk cpu0 R X8 00000000FFFFFFFF +6333 clk cpu0 IT (6297) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6333 clk cpu0 MW1 13000000:000013000000_NS 74 +6334 clk cpu0 IT (6298) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6334 clk cpu0 R X0 0000000000000072 +6335 clk cpu0 IT (6299) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6336 clk cpu0 IT (6300) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6336 clk cpu0 R cpsr 020003c5 +6336 clk cpu0 R X9 0000000000000072 +6337 clk cpu0 IS (6301) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6338 clk cpu0 IT (6302) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6338 clk cpu0 R cpsr 220003c5 +6339 clk cpu0 IS (6303) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6340 clk cpu0 IT (6304) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6340 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6340 clk cpu0 R X9 0000000013000000 +6341 clk cpu0 IT (6305) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6341 clk cpu0 R cpsr 620003c5 +6341 clk cpu0 R X8 0000000000000000 +6342 clk cpu0 IT (6306) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6342 clk cpu0 MW1 13000000:000013000000_NS 72 +6343 clk cpu0 IT (6307) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6343 clk cpu0 R X0 0000000000000000 +6344 clk cpu0 IS (6308) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6345 clk cpu0 IT (6309) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +6345 clk cpu0 MR8 0004ccd8:00001004ccd8_NS 69206c65_2e656361 +6345 clk cpu0 R X0 69206C652E656361 +6345 clk cpu0 R X28 000000000004CCD8 +6346 clk cpu0 IT (6310) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +6346 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +6346 clk cpu0 R X9 0000000000000000 +6347 clk cpu0 IT (6311) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +6347 clk cpu0 R X8 0000000000000000 +6348 clk cpu0 IT (6312) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +6348 clk cpu0 R X27 0000000000000008 +6349 clk cpu0 IT (6313) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +6349 clk cpu0 R cpsr 820003c5 +6350 clk cpu0 IT (6314) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +6351 clk cpu0 IT (6315) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +6351 clk cpu0 R X8 00000000FFFFFFF8 +6352 clk cpu0 IT (6316) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6352 clk cpu0 R cpsr 020003c5 +6352 clk cpu0 R X9 0000000000000061 +6353 clk cpu0 IS (6317) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6354 clk cpu0 IT (6318) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6354 clk cpu0 R cpsr 220003c5 +6355 clk cpu0 IS (6319) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6356 clk cpu0 IT (6320) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6356 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6356 clk cpu0 R X9 0000000013000000 +6357 clk cpu0 IT (6321) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6357 clk cpu0 R cpsr 820003c5 +6357 clk cpu0 R X8 00000000FFFFFFF9 +6358 clk cpu0 IT (6322) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6358 clk cpu0 MW1 13000000:000013000000_NS 61 +6359 clk cpu0 IT (6323) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6359 clk cpu0 R X0 0069206C652E6563 +6360 clk cpu0 IT (6324) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6361 clk cpu0 IT (6325) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6361 clk cpu0 R cpsr 020003c5 +6361 clk cpu0 R X9 0000000000000063 +6362 clk cpu0 IS (6326) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6363 clk cpu0 IT (6327) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6363 clk cpu0 R cpsr 220003c5 +6364 clk cpu0 IS (6328) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6365 clk cpu0 IT (6329) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6365 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6365 clk cpu0 R X9 0000000013000000 +6366 clk cpu0 IT (6330) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6366 clk cpu0 R cpsr 820003c5 +6366 clk cpu0 R X8 00000000FFFFFFFA +6367 clk cpu0 IT (6331) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6367 clk cpu0 MW1 13000000:000013000000_NS 63 +6368 clk cpu0 IT (6332) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6368 clk cpu0 R X0 000069206C652E65 +6369 clk cpu0 IT (6333) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6370 clk cpu0 IT (6334) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6370 clk cpu0 R cpsr 020003c5 +6370 clk cpu0 R X9 0000000000000065 +6371 clk cpu0 IS (6335) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6372 clk cpu0 IT (6336) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6372 clk cpu0 R cpsr 220003c5 +6373 clk cpu0 IS (6337) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6374 clk cpu0 IT (6338) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6374 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6374 clk cpu0 R X9 0000000013000000 +6375 clk cpu0 IT (6339) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6375 clk cpu0 R cpsr 820003c5 +6375 clk cpu0 R X8 00000000FFFFFFFB +6376 clk cpu0 IT (6340) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6376 clk cpu0 MW1 13000000:000013000000_NS 65 +6377 clk cpu0 IT (6341) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6377 clk cpu0 R X0 00000069206C652E +6378 clk cpu0 IT (6342) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6379 clk cpu0 IT (6343) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6379 clk cpu0 R cpsr 020003c5 +6379 clk cpu0 R X9 000000000000002E +6380 clk cpu0 IS (6344) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6381 clk cpu0 IT (6345) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6381 clk cpu0 R cpsr 220003c5 +6382 clk cpu0 IS (6346) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6383 clk cpu0 IT (6347) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6383 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6383 clk cpu0 R X9 0000000013000000 +6384 clk cpu0 IT (6348) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6384 clk cpu0 R cpsr 820003c5 +6384 clk cpu0 R X8 00000000FFFFFFFC +6385 clk cpu0 IT (6349) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6385 clk cpu0 MW1 13000000:000013000000_NS 2e +6386 clk cpu0 IT (6350) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6386 clk cpu0 R X0 0000000069206C65 +6387 clk cpu0 IT (6351) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6388 clk cpu0 IT (6352) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6388 clk cpu0 R cpsr 020003c5 +6388 clk cpu0 R X9 0000000000000065 +6389 clk cpu0 IS (6353) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6390 clk cpu0 IT (6354) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6390 clk cpu0 R cpsr 220003c5 +6391 clk cpu0 IS (6355) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6392 clk cpu0 IT (6356) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6392 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6392 clk cpu0 R X9 0000000013000000 +6393 clk cpu0 IT (6357) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6393 clk cpu0 R cpsr 820003c5 +6393 clk cpu0 R X8 00000000FFFFFFFD +6394 clk cpu0 IT (6358) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6394 clk cpu0 MW1 13000000:000013000000_NS 65 +6395 clk cpu0 IT (6359) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6395 clk cpu0 R X0 000000000069206C +6396 clk cpu0 IT (6360) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6397 clk cpu0 IT (6361) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6397 clk cpu0 R cpsr 020003c5 +6397 clk cpu0 R X9 000000000000006C +6398 clk cpu0 IS (6362) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6399 clk cpu0 IT (6363) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6399 clk cpu0 R cpsr 220003c5 +6400 clk cpu0 IS (6364) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6401 clk cpu0 IT (6365) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6401 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6401 clk cpu0 R X9 0000000013000000 +6402 clk cpu0 IT (6366) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6402 clk cpu0 R cpsr 820003c5 +6402 clk cpu0 R X8 00000000FFFFFFFE +6403 clk cpu0 IT (6367) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6403 clk cpu0 MW1 13000000:000013000000_NS 6c +6404 clk cpu0 IT (6368) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6404 clk cpu0 R X0 0000000000006920 +6405 clk cpu0 IT (6369) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6406 clk cpu0 IT (6370) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6406 clk cpu0 R cpsr 020003c5 +6406 clk cpu0 R X9 0000000000000020 +6407 clk cpu0 IS (6371) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6408 clk cpu0 IT (6372) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6408 clk cpu0 R cpsr 820003c5 +6409 clk cpu0 IS (6373) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6410 clk cpu0 IT (6374) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6410 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6410 clk cpu0 R X9 0000000013000000 +6411 clk cpu0 IT (6375) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6411 clk cpu0 R cpsr 820003c5 +6411 clk cpu0 R X8 00000000FFFFFFFF +6412 clk cpu0 IT (6376) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6412 clk cpu0 MW1 13000000:000013000000_NS 20 +6413 clk cpu0 IT (6377) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6413 clk cpu0 R X0 0000000000000069 +6414 clk cpu0 IT (6378) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6415 clk cpu0 IT (6379) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6415 clk cpu0 R cpsr 020003c5 +6415 clk cpu0 R X9 0000000000000069 +6416 clk cpu0 IS (6380) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6417 clk cpu0 IT (6381) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6417 clk cpu0 R cpsr 220003c5 +6418 clk cpu0 IS (6382) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6419 clk cpu0 IT (6383) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6419 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6419 clk cpu0 R X9 0000000013000000 +6420 clk cpu0 IT (6384) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6420 clk cpu0 R cpsr 620003c5 +6420 clk cpu0 R X8 0000000000000000 +6421 clk cpu0 IT (6385) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6421 clk cpu0 MW1 13000000:000013000000_NS 69 +6422 clk cpu0 IT (6386) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6422 clk cpu0 R X0 0000000000000000 +6423 clk cpu0 IS (6387) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6424 clk cpu0 IT (6388) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +6424 clk cpu0 MR8 0004cce0:00001004cce0_NS 2078253d_206f666e +6424 clk cpu0 R X0 2078253D206F666E +6424 clk cpu0 R X28 000000000004CCE0 +6425 clk cpu0 IT (6389) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +6425 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +6425 clk cpu0 R X9 0000000000000000 +6426 clk cpu0 IT (6390) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +6426 clk cpu0 R X8 0000000000000008 +6427 clk cpu0 IT (6391) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +6427 clk cpu0 R X27 0000000000000010 +6428 clk cpu0 IT (6392) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +6428 clk cpu0 R cpsr 820003c5 +6429 clk cpu0 IT (6393) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +6430 clk cpu0 IT (6394) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +6430 clk cpu0 R X8 00000000FFFFFFF8 +6431 clk cpu0 IT (6395) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6431 clk cpu0 R cpsr 020003c5 +6431 clk cpu0 R X9 000000000000006E +6432 clk cpu0 IS (6396) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6433 clk cpu0 IT (6397) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6433 clk cpu0 R cpsr 220003c5 +6434 clk cpu0 IS (6398) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6435 clk cpu0 IT (6399) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6435 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6435 clk cpu0 R X9 0000000013000000 +6436 clk cpu0 IT (6400) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6436 clk cpu0 R cpsr 820003c5 +6436 clk cpu0 R X8 00000000FFFFFFF9 +6437 clk cpu0 IT (6401) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6437 clk cpu0 MW1 13000000:000013000000_NS 6e +6438 clk cpu0 IT (6402) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6438 clk cpu0 R X0 002078253D206F66 +6439 clk cpu0 IT (6403) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6440 clk cpu0 IT (6404) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6440 clk cpu0 R cpsr 020003c5 +6440 clk cpu0 R X9 0000000000000066 +6441 clk cpu0 IS (6405) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6442 clk cpu0 IT (6406) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6442 clk cpu0 R cpsr 220003c5 +6443 clk cpu0 IS (6407) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6444 clk cpu0 IT (6408) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6444 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6444 clk cpu0 R X9 0000000013000000 +6445 clk cpu0 IT (6409) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6445 clk cpu0 R cpsr 820003c5 +6445 clk cpu0 R X8 00000000FFFFFFFA +6446 clk cpu0 IT (6410) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6446 clk cpu0 MW1 13000000:000013000000_NS 66 +6447 clk cpu0 IT (6411) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6447 clk cpu0 R X0 00002078253D206F +6448 clk cpu0 IT (6412) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6449 clk cpu0 IT (6413) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6449 clk cpu0 R cpsr 020003c5 +6449 clk cpu0 R X9 000000000000006F +6450 clk cpu0 IS (6414) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6451 clk cpu0 IT (6415) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6451 clk cpu0 R cpsr 220003c5 +6452 clk cpu0 IS (6416) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6453 clk cpu0 IT (6417) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6453 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6453 clk cpu0 R X9 0000000013000000 +6454 clk cpu0 IT (6418) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6454 clk cpu0 R cpsr 820003c5 +6454 clk cpu0 R X8 00000000FFFFFFFB +6455 clk cpu0 IT (6419) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6455 clk cpu0 MW1 13000000:000013000000_NS 6f +6456 clk cpu0 IT (6420) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6456 clk cpu0 R X0 0000002078253D20 +6457 clk cpu0 IT (6421) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6458 clk cpu0 IT (6422) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6458 clk cpu0 R cpsr 020003c5 +6458 clk cpu0 R X9 0000000000000020 +6459 clk cpu0 IS (6423) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6460 clk cpu0 IT (6424) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6460 clk cpu0 R cpsr 820003c5 +6461 clk cpu0 IS (6425) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6462 clk cpu0 IT (6426) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6462 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6462 clk cpu0 R X9 0000000013000000 +6463 clk cpu0 IT (6427) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6463 clk cpu0 R cpsr 820003c5 +6463 clk cpu0 R X8 00000000FFFFFFFC +6464 clk cpu0 IT (6428) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6464 clk cpu0 MW1 13000000:000013000000_NS 20 +6465 clk cpu0 IT (6429) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6465 clk cpu0 R X0 000000002078253D +6466 clk cpu0 IT (6430) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6467 clk cpu0 IT (6431) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6467 clk cpu0 R cpsr 020003c5 +6467 clk cpu0 R X9 000000000000003D +6468 clk cpu0 IS (6432) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6469 clk cpu0 IT (6433) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6469 clk cpu0 R cpsr 220003c5 +6470 clk cpu0 IS (6434) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6471 clk cpu0 IT (6435) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6471 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6471 clk cpu0 R X9 0000000013000000 +6472 clk cpu0 IT (6436) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6472 clk cpu0 R cpsr 820003c5 +6472 clk cpu0 R X8 00000000FFFFFFFD +6473 clk cpu0 IT (6437) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6473 clk cpu0 MW1 13000000:000013000000_NS 3d +6474 clk cpu0 IT (6438) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6474 clk cpu0 R X0 0000000000207825 +6475 clk cpu0 IT (6439) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6476 clk cpu0 IT (6440) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6476 clk cpu0 R cpsr 020003c5 +6476 clk cpu0 R X9 0000000000000025 +6477 clk cpu0 IS (6441) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6478 clk cpu0 IT (6442) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6478 clk cpu0 R cpsr 620003c5 +6479 clk cpu0 IT (6443) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6480 clk cpu0 IT (6444) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +6480 clk cpu0 R X8 000000000000000D +6481 clk cpu0 IT (6445) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +6481 clk cpu0 R X9 0000000000000014 +6482 clk cpu0 IT (6446) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +6482 clk cpu0 R X9 000000000004CCE4 +6483 clk cpu0 IT (6447) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +6483 clk cpu0 R cpsr 020003c5 +6484 clk cpu0 IT (6448) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +6484 clk cpu0 R X27 000000000004CCE4 +6485 clk cpu0 IT (6449) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +6485 clk cpu0 R X20 000000000004CCE5 +6486 clk cpu0 IT (6450) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +6487 clk cpu0 IT (6451) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6487 clk cpu0 MR1 0004cce5:00001004cce5_NS 25 +6487 clk cpu0 R X8 0000000000000025 +6488 clk cpu0 IT (6452) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6488 clk cpu0 R cpsr 620003c5 +6489 clk cpu0 IT (6453) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6490 clk cpu0 IT (6454) 00092c30:000010092c30_NS b90736bf O EL1h_n : STR wzr,[x21,#0x734] +6490 clk cpu0 MW4 03029734:000000829734_NS 00000000 +6491 clk cpu0 IT (6455) 00092c34:000010092c34_NS aa1403fb O EL1h_n : MOV x27,x20 +6491 clk cpu0 R X27 000000000004CCE5 +6492 clk cpu0 IT (6456) 00092c38:000010092c38_NS 38401f7c O EL1h_n : LDRB w28,[x27,#1]! +6492 clk cpu0 MR1 0004cce6:00001004cce6_NS 78 +6492 clk cpu0 R X27 000000000004CCE6 +6492 clk cpu0 R X28 0000000000000078 +6493 clk cpu0 IT (6457) 00092c3c:000010092c3c_NS 7100c39f O EL1h_n : CMP w28,#0x30 +6493 clk cpu0 R cpsr 220003c5 +6494 clk cpu0 IS (6458) 00092c40:000010092c40_NS 54000060 O EL1h_n : B.EQ 0x92c4c +6495 clk cpu0 IT (6459) 00092c44:000010092c44_NS 3500041c O EL1h_n : CBNZ w28,0x92cc4 +6496 clk cpu0 IT (6460) 00092cc4:000010092cc4_NS 51016388 O EL1h_n : SUB w8,w28,#0x58 +6496 clk cpu0 R X8 0000000000000020 +6497 clk cpu0 IT (6461) 00092cc8:000010092cc8_NS 7100811f O EL1h_n : CMP w8,#0x20 +6497 clk cpu0 R cpsr 620003c5 +6498 clk cpu0 IS (6462) 00092ccc:000010092ccc_NS 54000b48 O EL1h_n : B.HI 0x92e34 +6499 clk cpu0 IT (6463) 00092cd0:000010092cd0_NS 10000089 O EL1h_n : ADR x9,0x92ce0 +6499 clk cpu0 R X9 0000000000092CE0 +6500 clk cpu0 IT (6464) 00092cd4:000010092cd4_NS 38686aca O EL1h_n : LDRB w10,[x22,x8] +6500 clk cpu0 MR1 0004c128:00001004c128_NS 00 +6500 clk cpu0 R X10 0000000000000000 +6501 clk cpu0 IT (6465) 00092cd8:000010092cd8_NS 8b0a0929 O EL1h_n : ADD x9,x9,x10,LSL #2 +6501 clk cpu0 R X9 0000000000092CE0 +6502 clk cpu0 IT (6466) 00092cdc:000010092cdc_NS d61f0120 O EL1h_n : BR x9 +6502 clk cpu0 R cpsr 620007c5 +6503 clk cpu0 IT (6467) 00092ce0:000010092ce0_NS b9801a68 O EL1h_n : LDRSW x8,[x19,#0x18] +6503 clk cpu0 MR4 03700548:000000f00548_NS ffffffd0 +6503 clk cpu0 R cpsr 620003c5 +6503 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +6504 clk cpu0 IS (6468) 00092ce4:000010092ce4_NS 36f800a8 O EL1h_n : TBZ w8,#31,0x92cf8 +6505 clk cpu0 IT (6469) 00092ce8:000010092ce8_NS 11002109 O EL1h_n : ADD w9,w8,#8 +6505 clk cpu0 R X9 00000000FFFFFFD8 +6506 clk cpu0 IT (6470) 00092cec:000010092cec_NS 7100013f O EL1h_n : CMP w9,#0 +6506 clk cpu0 R cpsr a20003c5 +6507 clk cpu0 IT (6471) 00092cf0:000010092cf0_NS b9001a69 O EL1h_n : STR w9,[x19,#0x18] +6507 clk cpu0 MW4 03700548:000000f00548_NS ffffffd8 +6508 clk cpu0 IT (6472) 00092cf4:000010092cf4_NS 54000cad O EL1h_n : B.LE 0x92e88 +6509 clk cpu0 IT (6473) 00092e88:000010092e88_NS f9400669 O EL1h_n : LDR x9,[x19,#8] +6509 clk cpu0 MR8 03700538:000000f00538_NS 00000000_03700530 +6509 clk cpu0 R X9 0000000003700530 +6510 clk cpu0 IT (6474) 00092e8c:000010092e8c_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +6510 clk cpu0 R X8 0000000003700500 +6511 clk cpu0 IT (6475) 00092e90:000010092e90_NS 17ffff9d O EL1h_n : B 0x92d04 +6512 clk cpu0 IT (6476) 00092d04:000010092d04_NS f9400100 O EL1h_n : LDR x0,[x8,#0] +6512 clk cpu0 MR8 03700500:000000f00500_NS 00000000_00030001 +6512 clk cpu0 R X0 0000000000030001 +6513 clk cpu0 IT (6477) 00092d08:000010092d08_NS 52800201 O EL1h_n : MOV w1,#0x10 +6513 clk cpu0 R X1 0000000000000010 +6514 clk cpu0 IT (6478) 00092d0c:000010092d0c_NS 94000a58 O EL1h_n : BL 0x9566c +6514 clk cpu0 R X30 0000000000092D10 +6515 clk cpu0 IT (6479) 0009566c:00001009566c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +6515 clk cpu0 R SP_EL1 0000000003700440 +6516 clk cpu0 IT (6480) 00095670:000010095670_NS b204c7e8 O EL1h_n : ORR x8,xzr,#0x3030303030303030 +6516 clk cpu0 R X8 3030303030303030 +6517 clk cpu0 IT (6481) 00095674:000010095674_NS a900a3e8 O EL1h_n : STP x8,x8,[sp,#8] +6517 clk cpu0 MW8 03700448:000000f00448_NS 30303030_30303030 +6517 clk cpu0 MW8 03700450:000000f00450_NS 30303030_30303030 +6518 clk cpu0 IT (6482) 00095678:000010095678_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +6518 clk cpu0 MW4 03700458:000000f00458_NS 30303030 +6519 clk cpu0 IS (6483) 0009567c:00001009567c_NS b4000220 O EL1h_n : CBZ x0,0x956c0 +6519 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b4 ALLOC 0x000010095680_NS +6519 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15a0 ALLOC 0x000010095680_NS +6520 clk cpu0 IT (6484) 00095680:000010095680_NS aa1f03eb O EL1h_n : MOV x11,xzr +6520 clk cpu0 R X11 0000000000000000 +6521 clk cpu0 IT (6485) 00095684:000010095684_NS 2a0103e8 O EL1h_n : MOV w8,w1 +6521 clk cpu0 R X8 0000000000000010 +6522 clk cpu0 IT (6486) 00095688:000010095688_NS 1103dc29 O EL1h_n : ADD w9,w1,#0xf7 +6522 clk cpu0 R X9 0000000000000107 +6523 clk cpu0 IT (6487) 0009568c:00001009568c_NS 910023ea O EL1h_n : ADD x10,sp,#8 +6523 clk cpu0 R X10 0000000003700448 +6524 clk cpu0 IT (6488) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +6524 clk cpu0 R X12 0000000000003000 +6525 clk cpu0 IT (6489) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +6525 clk cpu0 R X13 0000000000000001 +6526 clk cpu0 IT (6490) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +6526 clk cpu0 R cpsr 820003c5 +6527 clk cpu0 IT (6491) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +6527 clk cpu0 R X14 0000000000000000 +6528 clk cpu0 IT (6492) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +6528 clk cpu0 R X13 0000000000000001 +6529 clk cpu0 IT (6493) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +6529 clk cpu0 R X13 0000000000000031 +6530 clk cpu0 IT (6494) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +6530 clk cpu0 R cpsr 220003c5 +6531 clk cpu0 IT (6495) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +6531 clk cpu0 MW1 03700448:000000f00448_NS 31 +6532 clk cpu0 IT (6496) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +6532 clk cpu0 R X11 0000000000000001 +6533 clk cpu0 IT (6497) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +6533 clk cpu0 R X0 0000000000003000 +6534 clk cpu0 IT (6498) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +6535 clk cpu0 IT (6499) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +6535 clk cpu0 R X12 0000000000000300 +6536 clk cpu0 IT (6500) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +6536 clk cpu0 R X13 0000000000000000 +6537 clk cpu0 IT (6501) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +6537 clk cpu0 R cpsr 820003c5 +6538 clk cpu0 IT (6502) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +6538 clk cpu0 R X14 0000000000000000 +6539 clk cpu0 IT (6503) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +6539 clk cpu0 R X13 0000000000000000 +6540 clk cpu0 IT (6504) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +6540 clk cpu0 R X13 0000000000000030 +6541 clk cpu0 IT (6505) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +6541 clk cpu0 R cpsr 220003c5 +6542 clk cpu0 IT (6506) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +6542 clk cpu0 MW1 03700449:000000f00449_NS 30 +6543 clk cpu0 IT (6507) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +6543 clk cpu0 R X11 0000000000000002 +6544 clk cpu0 IT (6508) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +6544 clk cpu0 R X0 0000000000000300 +6545 clk cpu0 IT (6509) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +6546 clk cpu0 IT (6510) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +6546 clk cpu0 R X12 0000000000000030 +6547 clk cpu0 IT (6511) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +6547 clk cpu0 R X13 0000000000000000 +6548 clk cpu0 IT (6512) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +6548 clk cpu0 R cpsr 820003c5 +6549 clk cpu0 IT (6513) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +6549 clk cpu0 R X14 0000000000000000 +6550 clk cpu0 IT (6514) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +6550 clk cpu0 R X13 0000000000000000 +6551 clk cpu0 IT (6515) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +6551 clk cpu0 R X13 0000000000000030 +6552 clk cpu0 IT (6516) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +6552 clk cpu0 R cpsr 220003c5 +6553 clk cpu0 IT (6517) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +6553 clk cpu0 MW1 0370044a:000000f0044a_NS 30 +6554 clk cpu0 IT (6518) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +6554 clk cpu0 R X11 0000000000000003 +6555 clk cpu0 IT (6519) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +6555 clk cpu0 R X0 0000000000000030 +6556 clk cpu0 IT (6520) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +6557 clk cpu0 IT (6521) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +6557 clk cpu0 R X12 0000000000000003 +6558 clk cpu0 IT (6522) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +6558 clk cpu0 R X13 0000000000000000 +6559 clk cpu0 IT (6523) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +6559 clk cpu0 R cpsr 820003c5 +6560 clk cpu0 IT (6524) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +6560 clk cpu0 R X14 0000000000000000 +6561 clk cpu0 IT (6525) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +6561 clk cpu0 R X13 0000000000000000 +6562 clk cpu0 IT (6526) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +6562 clk cpu0 R X13 0000000000000030 +6563 clk cpu0 IT (6527) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +6563 clk cpu0 R cpsr 220003c5 +6564 clk cpu0 IT (6528) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +6564 clk cpu0 MW1 0370044b:000000f0044b_NS 30 +6565 clk cpu0 IT (6529) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +6565 clk cpu0 R X11 0000000000000004 +6566 clk cpu0 IT (6530) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +6566 clk cpu0 R X0 0000000000000003 +6567 clk cpu0 IT (6531) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +6568 clk cpu0 IT (6532) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +6568 clk cpu0 R X12 0000000000000000 +6569 clk cpu0 IT (6533) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +6569 clk cpu0 R X13 0000000000000003 +6570 clk cpu0 IT (6534) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +6570 clk cpu0 R cpsr 820003c5 +6571 clk cpu0 IT (6535) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +6571 clk cpu0 R X14 0000000000000000 +6572 clk cpu0 IT (6536) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +6572 clk cpu0 R X13 0000000000000003 +6573 clk cpu0 IT (6537) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +6573 clk cpu0 R X13 0000000000000033 +6574 clk cpu0 IT (6538) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +6574 clk cpu0 R cpsr 820003c5 +6575 clk cpu0 IT (6539) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +6575 clk cpu0 MW1 0370044c:000000f0044c_NS 33 +6576 clk cpu0 IT (6540) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +6576 clk cpu0 R X11 0000000000000005 +6577 clk cpu0 IT (6541) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +6577 clk cpu0 R X0 0000000000000000 +6578 clk cpu0 IS (6542) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +6579 clk cpu0 IT (6543) 000956bc:0000100956bc_NS 14000002 O EL1h_n : B 0x956c4 +6580 clk cpu0 IT (6544) 000956c4:0000100956c4_NS 90017ca8 O EL1h_n : ADRP x8,0x30296c4 +6580 clk cpu0 R X8 0000000003029000 +6581 clk cpu0 IT (6545) 000956c8:0000100956c8_NS b9473508 O EL1h_n : LDR w8,[x8,#0x734] +6581 clk cpu0 MR4 03029734:000000829734_NS 00000000 +6581 clk cpu0 R X8 0000000000000000 +6582 clk cpu0 IT (6546) 000956cc:0000100956cc_NS 6b0b011f O EL1h_n : CMP w8,w11 +6582 clk cpu0 R cpsr 820003c5 +6583 clk cpu0 IT (6547) 000956d0:0000100956d0_NS 1a8bc108 O EL1h_n : CSEL w8,w8,w11,GT +6583 clk cpu0 R X8 0000000000000005 +6584 clk cpu0 IT (6548) 000956d4:0000100956d4_NS 7100051f O EL1h_n : CMP w8,#1 +6584 clk cpu0 R cpsr 220003c5 +6585 clk cpu0 IS (6549) 000956d8:0000100956d8_NS 540001ab O EL1h_n : B.LT 0x9570c +6586 clk cpu0 IT (6550) 000956dc:0000100956dc_NS 910023e9 O EL1h_n : ADD x9,sp,#8 +6586 clk cpu0 R X9 0000000003700448 +6587 clk cpu0 IT (6551) 000956e0:0000100956e0_NS 93407d08 O EL1h_n : SXTW x8,w8 +6587 clk cpu0 R X8 0000000000000005 +6588 clk cpu0 IT (6552) 000956e4:0000100956e4_NS d1000529 O EL1h_n : SUB x9,x9,#1 +6588 clk cpu0 R X9 0000000003700447 +6589 clk cpu0 IT (6553) 000956e8:0000100956e8_NS b0030c0a O EL1h_n : ADRP x10,0x62166e8 +6589 clk cpu0 R X10 0000000006216000 +6590 clk cpu0 IT (6554) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +6590 clk cpu0 MR1 0370044c:000000f0044c_NS 33 +6590 clk cpu0 R X11 0000000000000033 +6591 clk cpu0 IT (6555) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +6591 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6591 clk cpu0 R X12 0000000013000000 +6592 clk cpu0 IT (6556) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +6592 clk cpu0 R X8 0000000000000004 +6593 clk cpu0 IT (6557) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +6593 clk cpu0 R cpsr 220003c5 +6594 clk cpu0 IT (6558) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +6594 clk cpu0 MW1 13000000:000013000000_NS 33 +6595 clk cpu0 IT (6559) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +6596 clk cpu0 IT (6560) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +6596 clk cpu0 MR1 0370044b:000000f0044b_NS 30 +6596 clk cpu0 R X11 0000000000000030 +6597 clk cpu0 IT (6561) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +6597 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6597 clk cpu0 R X12 0000000013000000 +6598 clk cpu0 IT (6562) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +6598 clk cpu0 R X8 0000000000000003 +6599 clk cpu0 IT (6563) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +6599 clk cpu0 R cpsr 220003c5 +6600 clk cpu0 IT (6564) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +6600 clk cpu0 MW1 13000000:000013000000_NS 30 +6601 clk cpu0 IT (6565) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +6602 clk cpu0 IT (6566) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +6602 clk cpu0 MR1 0370044a:000000f0044a_NS 30 +6602 clk cpu0 R X11 0000000000000030 +6603 clk cpu0 IT (6567) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +6603 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6603 clk cpu0 R X12 0000000013000000 +6604 clk cpu0 IT (6568) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +6604 clk cpu0 R X8 0000000000000002 +6605 clk cpu0 IT (6569) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +6605 clk cpu0 R cpsr 220003c5 +6606 clk cpu0 IT (6570) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +6606 clk cpu0 MW1 13000000:000013000000_NS 30 +6607 clk cpu0 IT (6571) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +6608 clk cpu0 IT (6572) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +6608 clk cpu0 MR1 03700449:000000f00449_NS 30 +6608 clk cpu0 R X11 0000000000000030 +6609 clk cpu0 IT (6573) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +6609 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6609 clk cpu0 R X12 0000000013000000 +6610 clk cpu0 IT (6574) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +6610 clk cpu0 R X8 0000000000000001 +6611 clk cpu0 IT (6575) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +6611 clk cpu0 R cpsr 220003c5 +6612 clk cpu0 IT (6576) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +6612 clk cpu0 MW1 13000000:000013000000_NS 30 +6613 clk cpu0 IT (6577) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +6614 clk cpu0 IT (6578) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +6614 clk cpu0 MR1 03700448:000000f00448_NS 31 +6614 clk cpu0 R X11 0000000000000031 +6615 clk cpu0 IT (6579) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +6615 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6615 clk cpu0 R X12 0000000013000000 +6616 clk cpu0 IT (6580) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +6616 clk cpu0 R X8 0000000000000000 +6617 clk cpu0 IT (6581) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +6617 clk cpu0 R cpsr 620003c5 +6618 clk cpu0 IT (6582) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +6618 clk cpu0 MW1 13000000:000013000000_NS 31 +6619 clk cpu0 IS (6583) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +6620 clk cpu0 IT (6584) 00095704:000010095704_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +6620 clk cpu0 R SP_EL1 0000000003700460 +6621 clk cpu0 IT (6585) 00095708:000010095708_NS d65f03c0 O EL1h_n : RET +6622 clk cpu0 IT (6586) 00092d10:000010092d10_NS 91000774 O EL1h_n : ADD x20,x27,#1 +6622 clk cpu0 R X20 000000000004CCE7 +6623 clk cpu0 IT (6587) 00092d14:000010092d14_NS 17ffffa8 O EL1h_n : B 0x92bb4 +6624 clk cpu0 IT (6588) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6624 clk cpu0 MR1 0004cce7:00001004cce7_NS 20 +6624 clk cpu0 R X8 0000000000000020 +6625 clk cpu0 IT (6589) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6625 clk cpu0 R cpsr 820003c5 +6626 clk cpu0 IS (6590) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6627 clk cpu0 IS (6591) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6628 clk cpu0 IT (6592) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6628 clk cpu0 R cpsr 020003c5 +6629 clk cpu0 IT (6593) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6630 clk cpu0 IT (6594) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6630 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6630 clk cpu0 R X9 0000000013000000 +6631 clk cpu0 IT (6595) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6631 clk cpu0 R X27 000000000004CCE7 +6632 clk cpu0 IT (6596) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6632 clk cpu0 R X20 000000000004CCE8 +6633 clk cpu0 IT (6597) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6633 clk cpu0 MW1 13000000:000013000000_NS 20 +6634 clk cpu0 IT (6598) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6634 clk cpu0 MR1 0004cce8:00001004cce8_NS 2c +6634 clk cpu0 R X8 000000000000002C +6635 clk cpu0 IT (6599) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6635 clk cpu0 R cpsr 220003c5 +6636 clk cpu0 IS (6600) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6637 clk cpu0 IS (6601) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6638 clk cpu0 IT (6602) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6638 clk cpu0 R cpsr 420003c5 +6639 clk cpu0 IS (6603) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6640 clk cpu0 IT (6604) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +6640 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +6640 clk cpu0 R X8 0000000000000000 +6641 clk cpu0 IT (6605) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +6641 clk cpu0 MR8 0004cce8:00001004cce8_NS 6c652072_7575632c +6641 clk cpu0 R X0 6C6520727575632C +6642 clk cpu0 IT (6606) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +6642 clk cpu0 R cpsr 820003c5 +6643 clk cpu0 IT (6607) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +6644 clk cpu0 IT (6608) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +6644 clk cpu0 R X27 0000000000000000 +6645 clk cpu0 IT (6609) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +6645 clk cpu0 R X28 000000000004CCE8 +6646 clk cpu0 IT (6610) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +6646 clk cpu0 R X8 00000000FFFFFFF8 +6647 clk cpu0 IT (6611) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6647 clk cpu0 R cpsr 020003c5 +6647 clk cpu0 R X9 000000000000002C +6648 clk cpu0 IS (6612) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6649 clk cpu0 IT (6613) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6649 clk cpu0 R cpsr 220003c5 +6650 clk cpu0 IS (6614) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6651 clk cpu0 IT (6615) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6651 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6651 clk cpu0 R X9 0000000013000000 +6652 clk cpu0 IT (6616) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6652 clk cpu0 R cpsr 820003c5 +6652 clk cpu0 R X8 00000000FFFFFFF9 +6653 clk cpu0 IT (6617) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6653 clk cpu0 MW1 13000000:000013000000_NS 2c +6654 clk cpu0 IT (6618) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6654 clk cpu0 R X0 006C652072757563 +6655 clk cpu0 IT (6619) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6656 clk cpu0 IT (6620) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6656 clk cpu0 R cpsr 020003c5 +6656 clk cpu0 R X9 0000000000000063 +6657 clk cpu0 IS (6621) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6658 clk cpu0 IT (6622) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6658 clk cpu0 R cpsr 220003c5 +6659 clk cpu0 IS (6623) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6660 clk cpu0 IT (6624) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6660 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6660 clk cpu0 R X9 0000000013000000 +6661 clk cpu0 IT (6625) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6661 clk cpu0 R cpsr 820003c5 +6661 clk cpu0 R X8 00000000FFFFFFFA +6662 clk cpu0 IT (6626) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6662 clk cpu0 MW1 13000000:000013000000_NS 63 +6663 clk cpu0 IT (6627) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6663 clk cpu0 R X0 00006C6520727575 +6664 clk cpu0 IT (6628) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6665 clk cpu0 IT (6629) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6665 clk cpu0 R cpsr 020003c5 +6665 clk cpu0 R X9 0000000000000075 +6666 clk cpu0 IS (6630) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6667 clk cpu0 IT (6631) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6667 clk cpu0 R cpsr 220003c5 +6668 clk cpu0 IS (6632) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6669 clk cpu0 IT (6633) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6669 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6669 clk cpu0 R X9 0000000013000000 +6670 clk cpu0 IT (6634) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6670 clk cpu0 R cpsr 820003c5 +6670 clk cpu0 R X8 00000000FFFFFFFB +6671 clk cpu0 IT (6635) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6671 clk cpu0 MW1 13000000:000013000000_NS 75 +6672 clk cpu0 IT (6636) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6672 clk cpu0 R X0 0000006C65207275 +6673 clk cpu0 IT (6637) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6674 clk cpu0 IT (6638) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6674 clk cpu0 R cpsr 020003c5 +6674 clk cpu0 R X9 0000000000000075 +6675 clk cpu0 IS (6639) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6676 clk cpu0 IT (6640) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6676 clk cpu0 R cpsr 220003c5 +6677 clk cpu0 IS (6641) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6678 clk cpu0 IT (6642) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6678 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6678 clk cpu0 R X9 0000000013000000 +6679 clk cpu0 IT (6643) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6679 clk cpu0 R cpsr 820003c5 +6679 clk cpu0 R X8 00000000FFFFFFFC +6680 clk cpu0 IT (6644) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6680 clk cpu0 MW1 13000000:000013000000_NS 75 +6681 clk cpu0 IT (6645) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6681 clk cpu0 R X0 000000006C652072 +6682 clk cpu0 IT (6646) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6683 clk cpu0 IT (6647) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6683 clk cpu0 R cpsr 020003c5 +6683 clk cpu0 R X9 0000000000000072 +6684 clk cpu0 IS (6648) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6685 clk cpu0 IT (6649) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6685 clk cpu0 R cpsr 220003c5 +6686 clk cpu0 IS (6650) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6687 clk cpu0 IT (6651) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6687 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6687 clk cpu0 R X9 0000000013000000 +6688 clk cpu0 IT (6652) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6688 clk cpu0 R cpsr 820003c5 +6688 clk cpu0 R X8 00000000FFFFFFFD +6689 clk cpu0 IT (6653) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6689 clk cpu0 MW1 13000000:000013000000_NS 72 +6690 clk cpu0 IT (6654) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6690 clk cpu0 R X0 00000000006C6520 +6691 clk cpu0 IT (6655) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6692 clk cpu0 IT (6656) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6692 clk cpu0 R cpsr 020003c5 +6692 clk cpu0 R X9 0000000000000020 +6693 clk cpu0 IS (6657) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6694 clk cpu0 IT (6658) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6694 clk cpu0 R cpsr 820003c5 +6695 clk cpu0 IS (6659) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6696 clk cpu0 IT (6660) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6696 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6696 clk cpu0 R X9 0000000013000000 +6697 clk cpu0 IT (6661) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6697 clk cpu0 R cpsr 820003c5 +6697 clk cpu0 R X8 00000000FFFFFFFE +6698 clk cpu0 IT (6662) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6698 clk cpu0 MW1 13000000:000013000000_NS 20 +6699 clk cpu0 IT (6663) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6699 clk cpu0 R X0 0000000000006C65 +6700 clk cpu0 IT (6664) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6701 clk cpu0 IT (6665) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6701 clk cpu0 R cpsr 020003c5 +6701 clk cpu0 R X9 0000000000000065 +6702 clk cpu0 IS (6666) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6703 clk cpu0 IT (6667) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6703 clk cpu0 R cpsr 220003c5 +6704 clk cpu0 IS (6668) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6705 clk cpu0 IT (6669) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6705 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6705 clk cpu0 R X9 0000000013000000 +6706 clk cpu0 IT (6670) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6706 clk cpu0 R cpsr 820003c5 +6706 clk cpu0 R X8 00000000FFFFFFFF +6707 clk cpu0 IT (6671) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6707 clk cpu0 MW1 13000000:000013000000_NS 65 +6708 clk cpu0 IT (6672) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6708 clk cpu0 R X0 000000000000006C +6709 clk cpu0 IT (6673) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6710 clk cpu0 IT (6674) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6710 clk cpu0 R cpsr 020003c5 +6710 clk cpu0 R X9 000000000000006C +6711 clk cpu0 IS (6675) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6712 clk cpu0 IT (6676) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6712 clk cpu0 R cpsr 220003c5 +6713 clk cpu0 IS (6677) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6714 clk cpu0 IT (6678) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6714 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6714 clk cpu0 R X9 0000000013000000 +6715 clk cpu0 IT (6679) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6715 clk cpu0 R cpsr 620003c5 +6715 clk cpu0 R X8 0000000000000000 +6716 clk cpu0 IT (6680) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6716 clk cpu0 MW1 13000000:000013000000_NS 6c +6717 clk cpu0 IT (6681) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6717 clk cpu0 R X0 0000000000000000 +6718 clk cpu0 IS (6682) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6719 clk cpu0 IT (6683) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +6719 clk cpu0 MR8 0004ccf0:00001004ccf0_NS 740a000a_78253d20 +6719 clk cpu0 R X0 740A000A78253D20 +6719 clk cpu0 R X28 000000000004CCF0 +6720 clk cpu0 IT (6684) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +6720 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +6720 clk cpu0 R X9 0000000000000000 +6721 clk cpu0 IT (6685) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +6721 clk cpu0 R X8 0000000000000000 +6722 clk cpu0 IT (6686) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +6722 clk cpu0 R X27 0000000000000008 +6723 clk cpu0 IT (6687) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +6723 clk cpu0 R cpsr 820003c5 +6724 clk cpu0 IT (6688) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +6725 clk cpu0 IT (6689) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +6725 clk cpu0 R X8 00000000FFFFFFF8 +6726 clk cpu0 IT (6690) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6726 clk cpu0 R cpsr 020003c5 +6726 clk cpu0 R X9 0000000000000020 +6727 clk cpu0 IS (6691) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6728 clk cpu0 IT (6692) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6728 clk cpu0 R cpsr 820003c5 +6729 clk cpu0 IS (6693) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6730 clk cpu0 IT (6694) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6730 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6730 clk cpu0 R X9 0000000013000000 +6731 clk cpu0 IT (6695) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6731 clk cpu0 R cpsr 820003c5 +6731 clk cpu0 R X8 00000000FFFFFFF9 +6732 clk cpu0 IT (6696) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6732 clk cpu0 MW1 13000000:000013000000_NS 20 +6733 clk cpu0 IT (6697) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6733 clk cpu0 R X0 00740A000A78253D +6734 clk cpu0 IT (6698) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6735 clk cpu0 IT (6699) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6735 clk cpu0 R cpsr 020003c5 +6735 clk cpu0 R X9 000000000000003D +6736 clk cpu0 IS (6700) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6737 clk cpu0 IT (6701) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6737 clk cpu0 R cpsr 220003c5 +6738 clk cpu0 IS (6702) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6739 clk cpu0 IT (6703) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6739 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6739 clk cpu0 R X9 0000000013000000 +6740 clk cpu0 IT (6704) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +6740 clk cpu0 R cpsr 820003c5 +6740 clk cpu0 R X8 00000000FFFFFFFA +6741 clk cpu0 IT (6705) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +6741 clk cpu0 MW1 13000000:000013000000_NS 3d +6742 clk cpu0 IT (6706) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +6742 clk cpu0 R X0 0000740A000A7825 +6743 clk cpu0 IT (6707) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +6744 clk cpu0 IT (6708) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +6744 clk cpu0 R cpsr 020003c5 +6744 clk cpu0 R X9 0000000000000025 +6745 clk cpu0 IS (6709) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +6746 clk cpu0 IT (6710) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +6746 clk cpu0 R cpsr 620003c5 +6747 clk cpu0 IT (6711) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +6748 clk cpu0 IT (6712) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +6748 clk cpu0 R X8 0000000000000002 +6749 clk cpu0 IT (6713) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +6749 clk cpu0 R X9 0000000000000009 +6750 clk cpu0 IT (6714) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +6750 clk cpu0 R X9 000000000004CCF1 +6751 clk cpu0 IT (6715) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +6751 clk cpu0 R cpsr 020003c5 +6752 clk cpu0 IT (6716) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +6752 clk cpu0 R X27 000000000004CCF1 +6753 clk cpu0 IT (6717) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +6753 clk cpu0 R X20 000000000004CCF2 +6754 clk cpu0 IT (6718) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +6755 clk cpu0 IT (6719) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6755 clk cpu0 MR1 0004ccf2:00001004ccf2_NS 25 +6755 clk cpu0 R X8 0000000000000025 +6756 clk cpu0 IT (6720) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6756 clk cpu0 R cpsr 620003c5 +6757 clk cpu0 IT (6721) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6758 clk cpu0 IT (6722) 00092c30:000010092c30_NS b90736bf O EL1h_n : STR wzr,[x21,#0x734] +6758 clk cpu0 MW4 03029734:000000829734_NS 00000000 +6759 clk cpu0 IT (6723) 00092c34:000010092c34_NS aa1403fb O EL1h_n : MOV x27,x20 +6759 clk cpu0 R X27 000000000004CCF2 +6760 clk cpu0 IT (6724) 00092c38:000010092c38_NS 38401f7c O EL1h_n : LDRB w28,[x27,#1]! +6760 clk cpu0 MR1 0004ccf3:00001004ccf3_NS 78 +6760 clk cpu0 R X27 000000000004CCF3 +6760 clk cpu0 R X28 0000000000000078 +6761 clk cpu0 IT (6725) 00092c3c:000010092c3c_NS 7100c39f O EL1h_n : CMP w28,#0x30 +6761 clk cpu0 R cpsr 220003c5 +6762 clk cpu0 IS (6726) 00092c40:000010092c40_NS 54000060 O EL1h_n : B.EQ 0x92c4c +6763 clk cpu0 IT (6727) 00092c44:000010092c44_NS 3500041c O EL1h_n : CBNZ w28,0x92cc4 +6764 clk cpu0 IT (6728) 00092cc4:000010092cc4_NS 51016388 O EL1h_n : SUB w8,w28,#0x58 +6764 clk cpu0 R X8 0000000000000020 +6765 clk cpu0 IT (6729) 00092cc8:000010092cc8_NS 7100811f O EL1h_n : CMP w8,#0x20 +6765 clk cpu0 R cpsr 620003c5 +6766 clk cpu0 IS (6730) 00092ccc:000010092ccc_NS 54000b48 O EL1h_n : B.HI 0x92e34 +6767 clk cpu0 IT (6731) 00092cd0:000010092cd0_NS 10000089 O EL1h_n : ADR x9,0x92ce0 +6767 clk cpu0 R X9 0000000000092CE0 +6768 clk cpu0 IT (6732) 00092cd4:000010092cd4_NS 38686aca O EL1h_n : LDRB w10,[x22,x8] +6768 clk cpu0 MR1 0004c128:00001004c128_NS 00 +6768 clk cpu0 R X10 0000000000000000 +6769 clk cpu0 IT (6733) 00092cd8:000010092cd8_NS 8b0a0929 O EL1h_n : ADD x9,x9,x10,LSL #2 +6769 clk cpu0 R X9 0000000000092CE0 +6770 clk cpu0 IT (6734) 00092cdc:000010092cdc_NS d61f0120 O EL1h_n : BR x9 +6770 clk cpu0 R cpsr 620007c5 +6771 clk cpu0 IT (6735) 00092ce0:000010092ce0_NS b9801a68 O EL1h_n : LDRSW x8,[x19,#0x18] +6771 clk cpu0 MR4 03700548:000000f00548_NS ffffffd8 +6771 clk cpu0 R cpsr 620003c5 +6771 clk cpu0 R X8 FFFFFFFFFFFFFFD8 +6772 clk cpu0 IS (6736) 00092ce4:000010092ce4_NS 36f800a8 O EL1h_n : TBZ w8,#31,0x92cf8 +6773 clk cpu0 IT (6737) 00092ce8:000010092ce8_NS 11002109 O EL1h_n : ADD w9,w8,#8 +6773 clk cpu0 R X9 00000000FFFFFFE0 +6774 clk cpu0 IT (6738) 00092cec:000010092cec_NS 7100013f O EL1h_n : CMP w9,#0 +6774 clk cpu0 R cpsr a20003c5 +6775 clk cpu0 IT (6739) 00092cf0:000010092cf0_NS b9001a69 O EL1h_n : STR w9,[x19,#0x18] +6775 clk cpu0 MW4 03700548:000000f00548_NS ffffffe0 +6776 clk cpu0 IT (6740) 00092cf4:000010092cf4_NS 54000cad O EL1h_n : B.LE 0x92e88 +6777 clk cpu0 IT (6741) 00092e88:000010092e88_NS f9400669 O EL1h_n : LDR x9,[x19,#8] +6777 clk cpu0 MR8 03700538:000000f00538_NS 00000000_03700530 +6777 clk cpu0 R X9 0000000003700530 +6778 clk cpu0 IT (6742) 00092e8c:000010092e8c_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +6778 clk cpu0 R X8 0000000003700508 +6779 clk cpu0 IT (6743) 00092e90:000010092e90_NS 17ffff9d O EL1h_n : B 0x92d04 +6780 clk cpu0 IT (6744) 00092d04:000010092d04_NS f9400100 O EL1h_n : LDR x0,[x8,#0] +6780 clk cpu0 MR8 03700508:000000f00508_NS 00000000_00000000 +6780 clk cpu0 R X0 0000000000000000 +6781 clk cpu0 IT (6745) 00092d08:000010092d08_NS 52800201 O EL1h_n : MOV w1,#0x10 +6781 clk cpu0 R X1 0000000000000010 +6782 clk cpu0 IT (6746) 00092d0c:000010092d0c_NS 94000a58 O EL1h_n : BL 0x9566c +6782 clk cpu0 R X30 0000000000092D10 +6783 clk cpu0 IT (6747) 0009566c:00001009566c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +6783 clk cpu0 R SP_EL1 0000000003700440 +6784 clk cpu0 IT (6748) 00095670:000010095670_NS b204c7e8 O EL1h_n : ORR x8,xzr,#0x3030303030303030 +6784 clk cpu0 R X8 3030303030303030 +6785 clk cpu0 IT (6749) 00095674:000010095674_NS a900a3e8 O EL1h_n : STP x8,x8,[sp,#8] +6785 clk cpu0 MW8 03700448:000000f00448_NS 30303030_30303030 +6785 clk cpu0 MW8 03700450:000000f00450_NS 30303030_30303030 +6786 clk cpu0 IT (6750) 00095678:000010095678_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +6786 clk cpu0 MW4 03700458:000000f00458_NS 30303030 +6787 clk cpu0 IT (6751) 0009567c:00001009567c_NS b4000220 O EL1h_n : CBZ x0,0x956c0 +6788 clk cpu0 IT (6752) 000956c0:0000100956c0_NS 2a1f03eb O EL1h_n : MOV w11,wzr +6788 clk cpu0 R X11 0000000000000000 +6789 clk cpu0 IT (6753) 000956c4:0000100956c4_NS 90017ca8 O EL1h_n : ADRP x8,0x30296c4 +6789 clk cpu0 R X8 0000000003029000 +6790 clk cpu0 IT (6754) 000956c8:0000100956c8_NS b9473508 O EL1h_n : LDR w8,[x8,#0x734] +6790 clk cpu0 MR4 03029734:000000829734_NS 00000000 +6790 clk cpu0 R X8 0000000000000000 +6791 clk cpu0 IT (6755) 000956cc:0000100956cc_NS 6b0b011f O EL1h_n : CMP w8,w11 +6791 clk cpu0 R cpsr 620003c5 +6792 clk cpu0 IT (6756) 000956d0:0000100956d0_NS 1a8bc108 O EL1h_n : CSEL w8,w8,w11,GT +6792 clk cpu0 R X8 0000000000000000 +6793 clk cpu0 IT (6757) 000956d4:0000100956d4_NS 7100051f O EL1h_n : CMP w8,#1 +6793 clk cpu0 R cpsr 820003c5 +6794 clk cpu0 IT (6758) 000956d8:0000100956d8_NS 540001ab O EL1h_n : B.LT 0x9570c +6795 clk cpu0 IT (6759) 0009570c:00001009570c_NS 910023e9 O EL1h_n : ADD x9,sp,#8 +6795 clk cpu0 R X9 0000000003700448 +6796 clk cpu0 IT (6760) 00095710:000010095710_NS b0030c0a O EL1h_n : ADRP x10,0x6216710 +6796 clk cpu0 R X10 0000000006216000 +6797 clk cpu0 IT (6761) 00095714:000010095714_NS 38684928 O EL1h_n : LDRB w8,[x9,w8,UXTW] +6797 clk cpu0 MR1 03700448:000000f00448_NS 30 +6797 clk cpu0 R X8 0000000000000030 +6798 clk cpu0 IT (6762) 00095718:000010095718_NS f9407149 O EL1h_n : LDR x9,[x10,#0xe0] +6798 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6798 clk cpu0 R X9 0000000013000000 +6799 clk cpu0 IT (6763) 0009571c:00001009571c_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6799 clk cpu0 MW1 13000000:000013000000_NS 30 +6800 clk cpu0 IT (6764) 00095720:000010095720_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +6800 clk cpu0 R SP_EL1 0000000003700460 +6801 clk cpu0 IT (6765) 00095724:000010095724_NS d65f03c0 O EL1h_n : RET +6802 clk cpu0 IT (6766) 00092d10:000010092d10_NS 91000774 O EL1h_n : ADD x20,x27,#1 +6802 clk cpu0 R X20 000000000004CCF4 +6803 clk cpu0 IT (6767) 00092d14:000010092d14_NS 17ffffa8 O EL1h_n : B 0x92bb4 +6804 clk cpu0 IT (6768) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6804 clk cpu0 MR1 0004ccf4:00001004ccf4_NS 0a +6804 clk cpu0 R X8 000000000000000A +6805 clk cpu0 IT (6769) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6805 clk cpu0 R cpsr 820003c5 +6806 clk cpu0 IS (6770) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6807 clk cpu0 IS (6771) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6808 clk cpu0 IT (6772) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +6808 clk cpu0 R cpsr 020003c5 +6809 clk cpu0 IT (6773) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +6810 clk cpu0 IT (6774) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +6810 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +6810 clk cpu0 R X9 0000000013000000 +6811 clk cpu0 IT (6775) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +6811 clk cpu0 R X27 000000000004CCF4 +6812 clk cpu0 IT (6776) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +6812 clk cpu0 R X20 000000000004CCF5 +TUBE CPU0: Enable tracetrace.el info =30001 ,cuur el =0 +6813 clk cpu0 IT (6777) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +6813 clk cpu0 MW1 13000000:000013000000_NS 0a +6814 clk cpu0 IT (6778) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +6814 clk cpu0 MR1 0004ccf5:00001004ccf5_NS 00 +6814 clk cpu0 R X8 0000000000000000 +6815 clk cpu0 IT (6779) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +6815 clk cpu0 R cpsr 820003c5 +6816 clk cpu0 IS (6780) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +6817 clk cpu0 IT (6781) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +6818 clk cpu0 IT (6782) 00092f98:000010092f98_NS d5033f9f O EL1h_n : DSB SY +6819 clk cpu0 IT (6783) 00092f9c:000010092f9c_NS a9497bf3 O EL1h_n : LDP x19,x30,[sp,#0x90] +6819 clk cpu0 MR8 037004f0:000000f004f0_NS 00000000_0004ccc9 +6819 clk cpu0 MR8 037004f8:000000f004f8_NS 00000000_0009c560 +6819 clk cpu0 R X19 000000000004CCC9 +6819 clk cpu0 R X30 000000000009C560 +6820 clk cpu0 IT (6784) 00092fa0:000010092fa0_NS a94853f5 O EL1h_n : LDP x21,x20,[sp,#0x80] +6820 clk cpu0 MR8 037004e0:000000f004e0_NS 00000000_00000000 +6820 clk cpu0 MR8 037004e8:000000f004e8_NS 00000000_03008528 +6820 clk cpu0 R X20 0000000003008528 +6820 clk cpu0 R X21 0000000000000000 +6821 clk cpu0 IT (6785) 00092fa4:000010092fa4_NS a9475bf7 O EL1h_n : LDP x23,x22,[sp,#0x70] +6821 clk cpu0 MR8 037004d0:000000f004d0_NS fffe0000_00003fff +6821 clk cpu0 MR8 037004d8:000000f004d8_NS ffffffff_fffe0003 +6821 clk cpu0 R X22 FFFFFFFFFFFE0003 +6821 clk cpu0 R X23 FFFE000000003FFF +6822 clk cpu0 IT (6786) 00092fa8:000010092fa8_NS a94663f9 O EL1h_n : LDP x25,x24,[sp,#0x60] +6822 clk cpu0 MR8 037004c0:000000f004c0_NS 00000000_0000003c +6822 clk cpu0 MR8 037004c8:000000f004c8_NS 00000000_00007c00 +6822 clk cpu0 R X24 0000000000007C00 +6822 clk cpu0 R X25 000000000000003C +6823 clk cpu0 IT (6787) 00092fac:000010092fac_NS a9456bfb O EL1h_n : LDP x27,x26,[sp,#0x50] +6823 clk cpu0 MR8 037004b0:000000f004b0_NS 00010001_00010001 +6823 clk cpu0 MR8 037004b8:000000f004b8_NS ffe000ff_ffe000ff +6823 clk cpu0 R X26 FFE000FFFFE000FF +6823 clk cpu0 R X27 0001000100010001 +6824 clk cpu0 IT (6788) 00092fb0:000010092fb0_NS f94023fc O EL1h_n : LDR x28,[sp,#0x40] +6824 clk cpu0 MR8 037004a0:000000f004a0_NS ff7fff7f_ff7fff7f +6824 clk cpu0 R X28 FF7FFF7FFF7FFF7F +6825 clk cpu0 IT (6789) 00092fb4:000010092fb4_NS 910283ff O EL1h_n : ADD sp,sp,#0xa0 +6825 clk cpu0 R SP_EL1 0000000003700500 +6826 clk cpu0 IT (6790) 00092fb8:000010092fb8_NS d65f03c0 O EL1h_n : RET +6827 clk cpu0 IT (6791) 0009c560:00001009c560_NS 52800020 O EL1h_n : MOV w0,#1 +6827 clk cpu0 R X0 0000000000000001 +6828 clk cpu0 IT (6792) 0009c564:00001009c564_NS 2a1503e1 O EL1h_n : MOV w1,w21 +6828 clk cpu0 R X1 0000000000000000 +6829 clk cpu0 IT (6793) 0009c568:00001009c568_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +6829 clk cpu0 R X2 0000000000000000 +6830 clk cpu0 IT (6794) 0009c56c:00001009c56c_NS d503201f O EL1h_n : NOP +6831 clk cpu0 IT (6795) 0009c570:00001009c570_NS d5033f9f O EL1h_n : DSB SY +6832 clk cpu0 IT (6796) 0009c574:00001009c574_NS aa1403e0 O EL1h_n : MOV x0,x20 +6832 clk cpu0 R X0 0000000003008528 +6833 clk cpu0 IT (6797) 0009c578:00001009c578_NS 97fffd30 O EL1h_n : BL 0x9ba38 +6833 clk cpu0 R X30 000000000009C57C +6834 clk cpu0 IT (6798) 0009ba38:00001009ba38_NS d5033fbf O EL1h_n : DMB SY +6835 clk cpu0 IT (6799) 0009ba3c:00001009ba3c_NS f0030bc8 O EL1h_n : ADRP x8,0x6216a3c +6835 clk cpu0 R X8 0000000006216000 +6836 clk cpu0 IT (6800) 0009ba40:00001009ba40_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +6836 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +6836 clk cpu0 R X8 0000000000000001 +6837 clk cpu0 IT (6801) 0009ba44:00001009ba44_NS 7100091f O EL1h_n : CMP w8,#2 +6837 clk cpu0 R cpsr 820003c5 +6838 clk cpu0 IT (6802) 0009ba48:00001009ba48_NS 54000083 O EL1h_n : B.CC 0x9ba58 +6839 clk cpu0 IT (6803) 0009ba58:00001009ba58_NS d65f03c0 O EL1h_n : RET +6840 clk cpu0 IT (6804) 0009c57c:00001009c57c_NS a9487bf3 O EL1h_n : LDP x19,x30,[sp,#0x80] +6840 clk cpu0 MR8 03700580:000000f00580_NS 18181818_18181818 +6840 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011490 +6840 clk cpu0 R X19 1818181818181818 +6840 clk cpu0 R X30 0000000000011490 +6841 clk cpu0 IT (6805) 0009c580:00001009c580_NS a94753f5 O EL1h_n : LDP x21,x20,[sp,#0x70] +6841 clk cpu0 MR8 03700570:000000f00570_NS 00000000_00f00000 +6841 clk cpu0 MR8 03700578:000000f00578_NS 001fffff_fffffffe +6841 clk cpu0 R X20 001FFFFFFFFFFFFE +6841 clk cpu0 R X21 0000000000F00000 +6842 clk cpu0 IT (6806) 0009c584:00001009c584_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +6842 clk cpu0 R SP_EL1 0000000003700590 +6843 clk cpu0 IT (6807) 0009c588:00001009c588_NS d65f03c0 O EL1h_n : RET +6844 clk cpu0 IT (6808) 00011490:000010011490_NS b94047e8 O EL1h_n : LDR w8,[sp,#0x44] +6844 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +6844 clk cpu0 R X8 0000000000030001 +6845 clk cpu0 IT (6809) 00011494:000010011494_NS b9400fe9 O EL1h_n : LDR w9,[sp,#0xc] +6845 clk cpu0 MR4 0370059c:000000f0059c_NS 00000f00 +6845 clk cpu0 R X9 0000000000000F00 +6846 clk cpu0 IT (6810) 00011498:000010011498_NS 0a090108 O EL1h_n : AND w8,w8,w9 +6846 clk cpu0 R X8 0000000000000000 +6847 clk cpu0 IT (6811) 0001149c:00001001149c_NS b9400bea O EL1h_n : LDR w10,[sp,#8] +6847 clk cpu0 MR4 03700598:000000f00598_NS 00000008 +6847 clk cpu0 R X10 0000000000000008 +6848 clk cpu0 IT (6812) 000114a0:0000100114a0_NS 1aca2508 O EL1h_n : LSR w8,w8,w10 +6848 clk cpu0 R X8 0000000000000000 +6849 clk cpu0 IT (6813) 000114a4:0000100114a4_NS b9401beb O EL1h_n : LDR w11,[sp,#0x18] +6849 clk cpu0 MR4 037005a8:000000f005a8_NS 00000001 +6849 clk cpu0 R X11 0000000000000001 +6850 clk cpu0 IT (6814) 000114a8:0000100114a8_NS 0a280168 O EL1h_n : BIC w8,w11,w8 +6850 clk cpu0 R X8 0000000000000001 +6851 clk cpu0 IT (6815) 000114ac:0000100114ac_NS 2a0803f2 O EL1h_n : MOV w18,w8 +6851 clk cpu0 R X18 0000000000000001 +6852 clk cpu0 IT (6816) 000114b0:0000100114b0_NS d3407e52 O EL1h_n : UBFX x18,x18,#0,#32 +6852 clk cpu0 R X18 0000000000000001 +6853 clk cpu0 IT (6817) 000114b4:0000100114b4_NS f90033f2 O EL1h_n : STR x18,[sp,#0x60] +6853 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +6854 clk cpu0 IT (6818) 000114b8:0000100114b8_NS f94033f2 O EL1h_n : LDR x18,[sp,#0x60] +6854 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +6854 clk cpu0 R X18 0000000000000001 +6855 clk cpu0 IT (6819) 000114bc:0000100114bc_NS f9002ff2 O EL1h_n : STR x18,[sp,#0x58] +6855 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00000001 +6855 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a6 ALLOC 0x0000100114c0_NS +6855 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0530 ALLOC 0x0000100114c0_NS +6856 clk cpu0 IT (6820) 000114c0:0000100114c0_NS b9407be8 O EL1h_n : LDR w8,[sp,#0x78] +6856 clk cpu0 MR4 03700608:000000f00608_NS 00000001 +6856 clk cpu0 R X8 0000000000000001 +6857 clk cpu0 IT (6821) 000114c4:0000100114c4_NS 35000048 O EL1h_n : CBNZ w8,0x114cc +6858 clk cpu0 IT (6822) 000114cc:0000100114cc_NS f94037e8 O EL1h_n : LDR x8,[sp,#0x68] +6858 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +6858 clk cpu0 R X8 0000000000000000 +6859 clk cpu0 IT (6823) 000114d0:0000100114d0_NS f100091f O EL1h_n : CMP x8,#2 +6859 clk cpu0 R cpsr 820003c5 +6860 clk cpu0 IT (6824) 000114d4:0000100114d4_NS 1a9f17e9 O EL1h_n : CSET w9,EQ +6860 clk cpu0 R X9 0000000000000000 +6861 clk cpu0 IS (6825) 000114d8:0000100114d8_NS 37000049 O EL1h_n : TBNZ w9,#0,0x114e0 +6862 clk cpu0 IT (6826) 000114dc:0000100114dc_NS 14000003 O EL1h_n : B 0x114e8 +6863 clk cpu0 IT (6827) 000114e8:0000100114e8_NS d2800068 O EL1h_n : MOV x8,#3 +6863 clk cpu0 R X8 0000000000000003 +6864 clk cpu0 IT (6828) 000114ec:0000100114ec_NS f9002be8 O EL1h_n : STR x8,[sp,#0x50] +6864 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000003 +6865 clk cpu0 IT (6829) 000114f0:0000100114f0_NS b9407fe8 O EL1h_n : LDR w8,[sp,#0x7c] +6865 clk cpu0 MR4 0370060c:000000f0060c_NS 00000001 +6865 clk cpu0 R X8 0000000000000001 +6866 clk cpu0 IT (6830) 000114f4:0000100114f4_NS 35000048 O EL1h_n : CBNZ w8,0x114fc +6867 clk cpu0 IT (6831) 000114fc:0000100114fc_NS f94033e8 O EL1h_n : LDR x8,[sp,#0x60] +6867 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +6867 clk cpu0 R X8 0000000000000001 +6867 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a8 ALLOC 0x000010011500_NS +6867 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0540 ALLOC 0x000010011500_NS +6868 clk cpu0 IT (6832) 00011500:000010011500_NS b5000088 O EL1h_n : CBNZ x8,0x11510 +6869 clk cpu0 IT (6833) 00011510:000010011510_NS d2800068 O EL1h_n : MOV x8,#3 +6869 clk cpu0 R X8 0000000000000003 +6870 clk cpu0 IT (6834) 00011514:000010011514_NS f90027e8 O EL1h_n : STR x8,[sp,#0x48] +6870 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00000003 +6871 clk cpu0 IT (6835) 00011518:000010011518_NS b94077e8 O EL1h_n : LDR w8,[sp,#0x74] +6871 clk cpu0 MR4 03700604:000000f00604_NS 00000000 +6871 clk cpu0 R X8 0000000000000000 +6872 clk cpu0 IT (6836) 0001151c:00001001151c_NS f94033e9 O EL1h_n : LDR x9,[sp,#0x60] +6872 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +6872 clk cpu0 R X9 0000000000000001 +6873 clk cpu0 IT (6837) 00011520:000010011520_NS f100013f O EL1h_n : CMP x9,#0 +6873 clk cpu0 R cpsr 220003c5 +6874 clk cpu0 IT (6838) 00011524:000010011524_NS 1a9f17ea O EL1h_n : CSET w10,EQ +6874 clk cpu0 R X10 0000000000000000 +6875 clk cpu0 IT (6839) 00011528:000010011528_NS 5280002b O EL1h_n : MOV w11,#1 +6875 clk cpu0 R X11 0000000000000001 +6876 clk cpu0 IT (6840) 0001152c:00001001152c_NS 0a0b014a O EL1h_n : AND w10,w10,w11 +6876 clk cpu0 R X10 0000000000000000 +6877 clk cpu0 IT (6841) 00011530:000010011530_NS 0a0a0108 O EL1h_n : AND w8,w8,w10 +6877 clk cpu0 R X8 0000000000000000 +6878 clk cpu0 IS (6842) 00011534:000010011534_NS 35000048 O EL1h_n : CBNZ w8,0x1153c +6879 clk cpu0 IT (6843) 00011538:000010011538_NS 14000004 O EL1h_n : B 0x11548 +6879 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00aa ALLOC 0x000010011540_NS +6879 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0550 ALLOC 0x000010011540_NS +6880 clk cpu0 IT (6844) 00011548:000010011548_NS f94033e8 O EL1h_n : LDR x8,[sp,#0x60] +6880 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +6880 clk cpu0 R X8 0000000000000001 +6881 clk cpu0 IT (6845) 0001154c:00001001154c_NS f90003e8 O EL1h_n : STR x8,[sp,#0] +6881 clk cpu0 MW8 03700590:000000f00590_NS 00000000_00000001 +6882 clk cpu0 IT (6846) 00011550:000010011550_NS f94003e8 O EL1h_n : LDR x8,[sp,#0] +6882 clk cpu0 MR8 03700590:000000f00590_NS 00000000_00000001 +6882 clk cpu0 R X8 0000000000000001 +6883 clk cpu0 IT (6847) 00011554:000010011554_NS f90033e8 O EL1h_n : STR x8,[sp,#0x60] +6883 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +6884 clk cpu0 IT (6848) 00011558:000010011558_NS b9407fe9 O EL1h_n : LDR w9,[sp,#0x7c] +6884 clk cpu0 MR4 0370060c:000000f0060c_NS 00000001 +6884 clk cpu0 R X9 0000000000000001 +6885 clk cpu0 IT (6849) 0001155c:00001001155c_NS 35000049 O EL1h_n : CBNZ w9,0x11564 +6886 clk cpu0 IT (6850) 00011564:000010011564_NS f94027e8 O EL1h_n : LDR x8,[sp,#0x48] +6886 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00000003 +6886 clk cpu0 R X8 0000000000000003 +6887 clk cpu0 IT (6851) 00011568:000010011568_NS d2800309 O EL1h_n : MOV x9,#0x18 +6887 clk cpu0 R X9 0000000000000018 +6888 clk cpu0 IT (6852) 0001156c:00001001156c_NS 9ac92100 O EL1h_n : LSL x0,x8,x9 +6888 clk cpu0 R X0 0000000003000000 +6889 clk cpu0 IT (6853) 00011570:000010011570_NS f94037e2 O EL1h_n : LDR x2,[sp,#0x68] +6889 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +6889 clk cpu0 R X2 0000000000000000 +6890 clk cpu0 IT (6854) 00011574:000010011574_NS f94033e3 O EL1h_n : LDR x3,[sp,#0x60] +6890 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +6890 clk cpu0 R X3 0000000000000001 +6891 clk cpu0 IT (6855) 00011578:000010011578_NS d2a06001 O EL1h_n : MOV x1,#0x3000000 +6891 clk cpu0 R X1 0000000003000000 +6892 clk cpu0 IT (6856) 0001157c:00001001157c_NS 94025656 O EL1h_n : BL 0xa6ed4 +6892 clk cpu0 R X30 0000000000011580 +6892 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0176 ALLOC 0x0000100a6ec0_NS +6892 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1bb0 ALLOC 0x0000100a6ec0_NS +6893 clk cpu0 IT (6857) 000a6ed4:0000100a6ed4_NS a9bf27e8 O EL1h_n : STP x8,x9,[sp,#-0x10]! +6893 clk cpu0 MW8 03700580:000000f00580_NS 00000000_00000003 +6893 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00000018 +6893 clk cpu0 R SP_EL1 0000000003700580 +6894 clk cpu0 IT (6858) 000a6ed8:0000100a6ed8_NS aa0103e8 O EL1h_n : MOV x8,x1 +6894 clk cpu0 R X8 0000000003000000 +6895 clk cpu0 IT (6859) 000a6edc:0000100a6edc_NS aa0303e9 O EL1h_n : MOV x9,x3 +6895 clk cpu0 R X9 0000000000000001 +6896 clk cpu0 IT (6860) 000a6ee0:0000100a6ee0_NS f1000c5f O EL1h_n : CMP x2,#3 +6896 clk cpu0 R cpsr 820003c5 +6897 clk cpu0 IT (6861) 000a6ee4:0000100a6ee4_NS 540001eb O EL1h_n : B.LT 0xa6f20 +6897 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0178 ALLOC 0x0000100a6f00_NS +6897 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1bc0 ALLOC 0x0000100a6f00_NS +6898 clk cpu0 IT (6862) 000a6f20:0000100a6f20_NS f100045f O EL1h_n : CMP x2,#1 +6898 clk cpu0 R cpsr 820003c5 +6899 clk cpu0 IT (6863) 000a6f24:0000100a6f24_NS 540000eb O EL1h_n : B.LT 0xa6f40 +6899 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017b ALLOC 0x0000100a6f40_NS +6899 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1bd0 ALLOC 0x0000100a6f40_NS +6900 clk cpu0 IT (6864) 000a6f40:0000100a6f40_NS aa0003e1 O EL1h_n : MOV x1,x0 +6900 clk cpu0 R X1 0000000003000000 +6901 clk cpu0 IT (6865) 000a6f44:0000100a6f44_NS d28000e0 O EL1h_n : MOV x0,#7 +6901 clk cpu0 R X0 0000000000000007 +6902 clk cpu0 IT (6866) 000a6f48:0000100a6f48_NS 32120000 O EL1h_n : ORR w0,w0,#0x4000 +6902 clk cpu0 R X0 0000000000004007 +6903 clk cpu0 IT (6867) 000a6f4c:0000100a6f4c_NS f2a004c0 O EL1h_n : MOVK x0,#0x26,LSL #16 +6903 clk cpu0 R X0 0000000000264007 +6904 clk cpu0 IT (6868) 000a6f50:0000100a6f50_NS d40000e1 O EL1h_n : SVC #7 +6904 clk cpu0 E 000a6f50:0000100a6f50_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +6904 clk cpu0 R cpsr 820003c5 +6904 clk cpu0 R PMBIDR_EL1 00000030 +6904 clk cpu0 R ESR_EL1 56000007 +6904 clk cpu0 R SPSR_EL1 820003c5 +6904 clk cpu0 R TRBIDR_EL1 000000000000003b +6904 clk cpu0 R ELR_EL1 00000000000a6f54 +6904 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0091 ALLOC 0x000010035200_NS +6904 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1480 ALLOC 0x000010035200_NS +6905 clk cpu0 IT (6869) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +6905 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 INVAL 0x000010095800_NS +6905 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 ALLOC 0x000010035800_NS +6905 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1602 ALLOC 0x000010035800_NS +6906 clk cpu0 IT (6870) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +6906 clk cpu0 R SP_EL1 0000000003700480 +6907 clk cpu0 IT (6871) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +6907 clk cpu0 MW8 03700480:000000f00480_NS 00000000_00264007 +6907 clk cpu0 MW8 03700488:000000f00488_NS 00000000_03000000 +6908 clk cpu0 IT (6872) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +6908 clk cpu0 R X0 0000000056000007 +6909 clk cpu0 IT (6873) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +6909 clk cpu0 R X1 0000000000000015 +6910 clk cpu0 IT (6874) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +6910 clk cpu0 R cpsr 620003c5 +6911 clk cpu0 IT (6875) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +6912 clk cpu0 IT (6876) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +6912 clk cpu0 R X1 0000000000000007 +6913 clk cpu0 IT (6877) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +6913 clk cpu0 R cpsr 220003c5 +6914 clk cpu0 IS (6878) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +6915 clk cpu0 IT (6879) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +6915 clk cpu0 R cpsr 820003c5 +6916 clk cpu0 IS (6880) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +6917 clk cpu0 IT (6881) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +6917 clk cpu0 R cpsr 820003c5 +6918 clk cpu0 IS (6882) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +6918 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c3 ALLOC 0x000010035840_NS +6918 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1611 ALLOC 0x000010035840_NS +6919 clk cpu0 IT (6883) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +6919 clk cpu0 R cpsr 620003c5 +6920 clk cpu0 IT (6884) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +6921 clk cpu0 IT (6885) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +6921 clk cpu0 MR8 03700480:000000f00480_NS 00000000_00264007 +6921 clk cpu0 MR8 03700488:000000f00488_NS 00000000_03000000 +6921 clk cpu0 R X0 0000000000264007 +6921 clk cpu0 R X1 0000000003000000 +6922 clk cpu0 IT (6886) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +6922 clk cpu0 R SP_EL1 0000000003700580 +6923 clk cpu0 IT (6887) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +6923 clk cpu0 R cpsr 220003c5 +6923 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c5 ALLOC 0x000010035880_NS +6923 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1621 ALLOC 0x000010035880_NS +6924 clk cpu0 IT (6888) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +6925 clk cpu0 IT (6889) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +6925 clk cpu0 MW8 03700570:000000f00570_NS 00000000_030293f0 +6925 clk cpu0 MW8 03700578:000000f00578_NS 00000000_000fffe0 +6925 clk cpu0 R SP_EL1 0000000003700570 +6926 clk cpu0 IT (6890) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +6926 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00264007 +6926 clk cpu0 MW8 03700568:000000f00568_NS 00000000_03000000 +6926 clk cpu0 R SP_EL1 0000000003700560 +6927 clk cpu0 IT (6891) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +6927 clk cpu0 R X5 0000000000000000 +6928 clk cpu0 IT (6892) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +6928 clk cpu0 R X1 0000000000000000 +6929 clk cpu0 IT (6893) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +6929 clk cpu0 R cpsr 820003c5 +6930 clk cpu0 IT (6894) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +6930 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00264007 +6930 clk cpu0 MR8 03700568:000000f00568_NS 00000000_03000000 +6930 clk cpu0 R SP_EL1 0000000003700570 +6930 clk cpu0 R X0 0000000000264007 +6930 clk cpu0 R X1 0000000003000000 +6931 clk cpu0 IT (6895) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +6931 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c9 ALLOC 0x000010035900_NS +6931 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1641 ALLOC 0x000010035900_NS +6932 clk cpu0 IT (6896) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +6932 clk cpu0 MW8 03700560:000000f00560_NS e7ffe7ff_e7ffe7ff +6932 clk cpu0 MW8 03700568:000000f00568_NS 0001ffff_fe000000 +6932 clk cpu0 R SP_EL1 0000000003700560 +6933 clk cpu0 IT (6897) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +6933 clk cpu0 R X6 0000000000000000 +6934 clk cpu0 IT (6898) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +6934 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +6934 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000001 +6934 clk cpu0 R SP_EL1 0000000003700550 +6935 clk cpu0 IT (6899) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +6935 clk cpu0 MW8 03700540:000000f00540_NS 7fff7fff_7fff7fff +6935 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011580 +6935 clk cpu0 R SP_EL1 0000000003700540 +6936 clk cpu0 IT (6900) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +6936 clk cpu0 R X3 0000000000000001 +6937 clk cpu0 IT (6901) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +6937 clk cpu0 R cpsr 620003c5 +6938 clk cpu0 IT (6902) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +6938 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00ca INVAL 0x0000100a5940 +6938 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00ca ALLOC 0x000010035940_NS +6938 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1652 ALLOC 0x000010035940_NS +6939 clk cpu0 IT (6903) 00035944:000010035944_NS 580557e2 O EL1h_n : LDR x2,0x40440 +6939 clk cpu0 MR8 00040440:000010040440_NS 00000000_00035e90 +6939 clk cpu0 R X2 0000000000035E90 +6939 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0023 INVAL 0x000010200440_NS +6939 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0023 ALLOC 0x000010040440_NS +6939 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0112 ALLOC 0x000010040440_NS +6940 clk cpu0 IT (6904) 00035948:000010035948_NS 53107c03 O EL1h_n : LSR w3,w0,#16 +6940 clk cpu0 R X3 0000000000000026 +6941 clk cpu0 IT (6905) 0003594c:00001003594c_NS 12003c63 O EL1h_n : AND w3,w3,#0xffff +6941 clk cpu0 R X3 0000000000000026 +6942 clk cpu0 IT (6906) 00035950:000010035950_NS d37df063 O EL1h_n : LSL x3,x3,#3 +6942 clk cpu0 R X3 0000000000000130 +6943 clk cpu0 IT (6907) 00035954:000010035954_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +6943 clk cpu0 R X2 0000000000035FC0 +6944 clk cpu0 IT (6908) 00035958:000010035958_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +6944 clk cpu0 MR8 00035fc0:000010035fc0_NS 00000000_000380c8 +6944 clk cpu0 R X4 00000000000380C8 +6944 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x00034000_NS EL1_n vmid=0:0x0010034000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +6944 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00ff ALLOC 0x000010035fc0_NS +6944 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 17f0 ALLOC 0x000010035fc0_NS +6945 clk cpu0 IT (6909) 0003595c:00001003595c_NS d63f0080 O EL1h_n : BLR x4 +6945 clk cpu0 R cpsr 62000bc5 +6945 clk cpu0 R X30 0000000000035960 +6945 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0007 INVAL 0x00001009c0c0_NS +6945 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0007 ALLOC 0x0000100380c0_NS +6945 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0031 ALLOC 0x0000100380c0_NS +6946 clk cpu0 IT (6910) 000380c8:0000100380c8_NS d40000e3 O EL1h_n : SMC #7 +6946 clk cpu0 E 000380c8:0000100380c8_NS EL3h 00000019 CoreEvent_ModeChange +6946 clk cpu0 E 000380c8:0000100380c8_NS 00000088 CoreEvent_LOWER_64_SYNC +6946 clk cpu0 R cpsr 620003cd +6946 clk cpu0 R DBGDSCRext 00020000 +6946 clk cpu0 R PMBIDR_EL1 00000020 +6946 clk cpu0 R ESR_EL3 5e000007 +6946 clk cpu0 R SPSR_EL3 62000bc5 +6946 clk cpu0 R TRBIDR_EL1 000000000000002b +6946 clk cpu0 R ELR_EL3 00000000000380cc +6946 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +6946 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +6946 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0121 ALLOC 0x000010012400 +6946 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0901 ALLOC 0x000010012400 +6947 clk cpu0 IT (6911) 00012400:000010012400 14000c92 O EL3h_s : B 0x15648 +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x00001004c000_NS +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x00002c190000 +6947 clk cpu0 TTW ITLB LPAE 1:0 00002c190000 0000000050210003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000050210000 +6947 clk cpu0 TTW ITLB LPAE 1:1 000050210000 0000000060410003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000060410000 +6947 clk cpu0 TTW ITLB LPAE 1:2 000060410000 000000002c1a0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x000000002c1a0000 +6947 clk cpu0 TTW ITLB LPAE 1:3 00002c1a0028 00000000100144c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000010014000 +6947 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x00014000 EL3_s, nG asid=0:0x0010014000 Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +6947 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x00014000 EL3_s, nG asid=0:0x0010014000 Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070450000_NS +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000050210000 +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x00002c190000 +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000060410000 +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000050210000 +6947 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x00002c1a0000 +6947 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 ALLOC 0x000010015640 +6947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000c INVAL 0x0000702d0000_NS +6947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000c ALLOC 0x000050210000 +6947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000d INVAL 0x000070250000_NS +6947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000d ALLOC 0x000060410000 +6947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000e INVAL 0x000070440000_NS +6947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000e ALLOC 0x00002c1a0000 +6947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1591 ALLOC 0x000010015640 +6948 clk cpu0 IT (6912) 00015648:000010015648 d10403ff O EL3h_s : SUB sp,sp,#0x100 +6948 clk cpu0 R SP_EL3 000000000384C400 +6949 clk cpu0 IT (6913) 0001564c:00001001564c a90007e0 O EL3h_s : STP x0,x1,[sp,#0] +6949 clk cpu0 MW8 0384c400:00001084c400_NS 00000000_00264007 +6949 clk cpu0 MW8 0384c408:00001084c408_NS 00000000_03000000 +6949 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0021 INVAL 0x0000704a0400_NS +6949 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0021 ALLOC 0x00001084c400_NS +6949 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1101 CLEAN 0x00001084c400_NS +6949 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1101 INVAL 0x00001084c400_NS +6950 clk cpu0 IT (6914) 00015650:000010015650 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +6950 clk cpu0 R X0 000000005E000007 +6951 clk cpu0 IT (6915) 00015654:000010015654 531a7c01 O EL3h_s : LSR w1,w0,#26 +6951 clk cpu0 R X1 0000000000000017 +6952 clk cpu0 IT (6916) 00015658:000010015658 7100543f O EL3h_s : CMP w1,#0x15 +6952 clk cpu0 R cpsr 220003cd +6953 clk cpu0 IS (6917) 0001565c:00001001565c 540005e0 O EL3h_s : B.EQ 0x15718 +6954 clk cpu0 IT (6918) 00015660:000010015660 7100583f O EL3h_s : CMP w1,#0x16 +6954 clk cpu0 R cpsr 220003cd +6955 clk cpu0 IS (6919) 00015664:000010015664 54000360 O EL3h_s : B.EQ 0x156d0 +6956 clk cpu0 IT (6920) 00015668:000010015668 71005c3f O EL3h_s : CMP w1,#0x17 +6956 clk cpu0 R cpsr 620003cd +6957 clk cpu0 IT (6921) 0001566c:00001001566c 540000e0 O EL3h_s : B.EQ 0x15688 +6957 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b5 ALLOC 0x000010015680 +6957 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15a1 ALLOC 0x000010015680 +6958 clk cpu0 IT (6922) 00015688:000010015688 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +6958 clk cpu0 R X0 000000005E000007 +6959 clk cpu0 IT (6923) 0001568c:00001001568c 53003c01 O EL3h_s : UXTH w1,w0 +6959 clk cpu0 R X1 0000000000000007 +6960 clk cpu0 IT (6924) 00015690:000010015690 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +6960 clk cpu0 R X0 000000005E000007 +6961 clk cpu0 IT (6925) 00015694:000010015694 7100143f O EL3h_s : CMP w1,#5 +6961 clk cpu0 R cpsr 220003cd +6962 clk cpu0 IS (6926) 00015698:000010015698 5400b46b O EL3h_s : B.LT 0x16d24 +6963 clk cpu0 IT (6927) 0001569c:00001001569c 7100283f O EL3h_s : CMP w1,#0xa +6963 clk cpu0 R cpsr 820003cd +6964 clk cpu0 IS (6928) 000156a0:0000100156a0 5400b42c O EL3h_s : B.GT 0x16d24 +6965 clk cpu0 IT (6929) 000156a4:0000100156a4 71001c3f O EL3h_s : CMP w1,#7 +6965 clk cpu0 R cpsr 620003cd +6966 clk cpu0 IT (6930) 000156a8:0000100156a8 540005c0 O EL3h_s : B.EQ 0x15760 +6966 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00ba ALLOC 0x000010015740 +6966 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15d0 ALLOC 0x000010015740 +6967 clk cpu0 IT (6931) 00015760:000010015760 a94007e0 O EL3h_s : LDP x0,x1,[sp,#0] +6967 clk cpu0 MR8 0384c400:00001084c400_NS 00000000_00264007 +6967 clk cpu0 MR8 0384c408:00001084c408_NS 00000000_03000000 +6967 clk cpu0 R X0 0000000000264007 +6967 clk cpu0 R X1 0000000003000000 +6968 clk cpu0 IT (6932) 00015764:000010015764 910403ff O EL3h_s : ADD sp,sp,#0x100 +6968 clk cpu0 R SP_EL3 000000000384C500 +6969 clk cpu0 IT (6933) 00015768:000010015768 f103bc3f O EL3h_s : CMP x1,#0xef +6969 clk cpu0 R cpsr 220003cd +6970 clk cpu0 IT (6934) 0001576c:00001001576c 54000061 O EL3h_s : B.NE 0x15778 +6971 clk cpu0 IT (6935) 00015778:000010015778 a9bf17e4 O EL3h_s : STP x4,x5,[sp,#-0x10]! +6971 clk cpu0 MW8 0384c4f0:00001084c4f0_NS 00000000_000380c8 +6971 clk cpu0 MW8 0384c4f8:00001084c4f8_NS 00000000_00000000 +6971 clk cpu0 R SP_EL3 000000000384C4F0 +6972 clk cpu0 IT (6936) 0001577c:00001001577c a9bf07e0 O EL3h_s : STP x0,x1,[sp,#-0x10]! +6972 clk cpu0 MW8 0384c4e0:00001084c4e0_NS 00000000_00264007 +6972 clk cpu0 MW8 0384c4e8:00001084c4e8_NS 00000000_03000000 +6972 clk cpu0 R SP_EL3 000000000384C4E0 +6972 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bc ALLOC 0x000010015780 +6972 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15e0 ALLOC 0x000010015780 +6973 clk cpu0 IT (6937) 00015780:000010015780 d2800005 O EL3h_s : MOV x5,#0 +6973 clk cpu0 R X5 0000000000000000 +6974 clk cpu0 IT (6938) 00015784:000010015784 d34d3401 O EL3h_s : UBFIZ x1,x0,#51,#14 +6974 clk cpu0 R X1 0000000000000000 +6975 clk cpu0 IT (6939) 00015788:000010015788 f100043f O EL3h_s : CMP x1,#1 +6975 clk cpu0 R cpsr 820003cd +6976 clk cpu0 IT (6940) 0001578c:00001001578c a8c107e0 O EL3h_s : LDP x0,x1,[sp],#0x10 +6976 clk cpu0 MR8 0384c4e0:00001084c4e0_NS 00000000_00264007 +6976 clk cpu0 MR8 0384c4e8:00001084c4e8_NS 00000000_03000000 +6976 clk cpu0 R SP_EL3 000000000384C4F0 +6976 clk cpu0 R X0 0000000000264007 +6976 clk cpu0 R X1 0000000003000000 +6977 clk cpu0 IT (6941) 00015790:000010015790 540003a1 O EL3h_s : B.NE 0x15804 +6977 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 INVAL 0x00001003d800_NS +6977 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x000010015800 +6977 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1603 ALLOC 0x000010015800 +6978 clk cpu0 IT (6942) 00015804:000010015804 a9bf0fe2 O EL3h_s : STP x2,x3,[sp,#-0x10]! +6978 clk cpu0 MW8 0384c4e0:00001084c4e0_NS 00000000_00035fc0 +6978 clk cpu0 MW8 0384c4e8:00001084c4e8_NS 00000000_00000130 +6978 clk cpu0 R SP_EL3 000000000384C4E0 +6979 clk cpu0 IT (6943) 00015808:000010015808 a9bf7bfd O EL3h_s : STP x29,x30,[sp,#-0x10]! +6979 clk cpu0 MW8 0384c4d0:00001084c4d0_NS 7fff7fff_7fff7fff +6979 clk cpu0 MW8 0384c4d8:00001084c4d8_NS 00000000_00035960 +6979 clk cpu0 R SP_EL3 000000000384C4D0 +6980 clk cpu0 IT (6944) 0001580c:00001001580c 530e3803 O EL3h_s : UBFIZ w3,w0,#18,#15 +6980 clk cpu0 R X3 0000000000000001 +6981 clk cpu0 IT (6945) 00015810:000010015810 7100047f O EL3h_s : CMP w3,#1 +6981 clk cpu0 R cpsr 620003cd +6982 clk cpu0 IT (6946) 00015814:000010015814 54000180 O EL3h_s : B.EQ 0x15844 +6982 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 INVAL 0x00001009d840_NS +6982 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 ALLOC 0x000010015840 +6982 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1612 ALLOC 0x000010015840 +6983 clk cpu0 IT (6947) 00015844:000010015844 580177a2 O EL3h_s : LDR x2,0x18738 +6983 clk cpu0 MR8 00018738:000010018738 00000000_00015d90 +6983 clk cpu0 R X2 0000000000015D90 +6984 clk cpu0 IT (6948) 00015848:000010015848 53107c03 O EL3h_s : LSR w3,w0,#16 +6984 clk cpu0 R X3 0000000000000026 +6985 clk cpu0 IT (6949) 0001584c:00001001584c 12003c63 O EL3h_s : AND w3,w3,#0xffff +6985 clk cpu0 R X3 0000000000000026 +6986 clk cpu0 IT (6950) 00015850:000010015850 d37df063 O EL3h_s : LSL x3,x3,#3 +6986 clk cpu0 R X3 0000000000000130 +6987 clk cpu0 IT (6951) 00015854:000010015854 8b030042 O EL3h_s : ADD x2,x2,x3 +6987 clk cpu0 R X2 0000000000015EC0 +6988 clk cpu0 IT (6952) 00015858:000010015858 f9400044 O EL3h_s : LDR x4,[x2,#0] +6988 clk cpu0 MR8 00015ec0:000010015ec0 00000000_00016b00 +6988 clk cpu0 R X4 0000000000016B00 +6988 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x00014000 EL3_s, nG asid=0:0x0010014000 Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +6988 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00f6 ALLOC 0x000010015ec0 +6988 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 17b0 ALLOC 0x000010015ec0 +6989 clk cpu0 IT (6953) 0001585c:00001001585c d63f0080 O EL3h_s : BLR x4 +6989 clk cpu0 R cpsr 62000bcd +6989 clk cpu0 R X30 0000000000015860 +6989 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0158 ALLOC 0x000010016b00 +6989 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1ac0 ALLOC 0x000010016b00 +6990 clk cpu0 IT (6954) 00016b00:000010016b00 d53e1322 O EL3h_s : MRS x2,MDCR_EL3 +6990 clk cpu0 R cpsr 620003cd +6990 clk cpu0 R X2 0000000010040000 +6991 clk cpu0 IT (6955) 00016b04:000010016b04 8a080021 O EL3h_s : AND x1,x1,x8 +6991 clk cpu0 R X1 0000000003000000 +6992 clk cpu0 IT (6956) 00016b08:000010016b08 8a280042 O EL3h_s : BIC x2,x2,x8 +6992 clk cpu0 R X2 0000000010040000 +6993 clk cpu0 IT (6957) 00016b0c:000010016b0c aa020021 O EL3h_s : ORR x1,x1,x2 +6993 clk cpu0 R X1 0000000013040000 +6994 clk cpu0 IT (6958) 00016b10:000010016b10 a9bf7bfd O EL3h_s : STP x29,x30,[sp,#-0x10]! +6994 clk cpu0 MW8 0384c4c0:00001084c4c0_NS 7fff7fff_7fff7fff +6994 clk cpu0 MW8 0384c4c8:00001084c4c8_NS 00000000_00015860 +6994 clk cpu0 R SP_EL3 000000000384C4C0 +6995 clk cpu0 IT (6959) 00016b14:000010016b14 a9bf07e0 O EL3h_s : STP x0,x1,[sp,#-0x10]! +6995 clk cpu0 MW8 0384c4b0:00001084c4b0_NS 00000000_00264007 +6995 clk cpu0 MW8 0384c4b8:00001084c4b8_NS 00000000_13040000 +6995 clk cpu0 R SP_EL3 000000000384C4B0 +6996 clk cpu0 IT (6960) 00016b18:000010016b18 d503201f O EL3h_s : NOP +6997 clk cpu0 IT (6961) 00016b1c:000010016b1c a8c107e0 O EL3h_s : LDP x0,x1,[sp],#0x10 +6997 clk cpu0 MR8 0384c4b0:00001084c4b0_NS 00000000_00264007 +6997 clk cpu0 MR8 0384c4b8:00001084c4b8_NS 00000000_13040000 +6997 clk cpu0 R SP_EL3 000000000384C4C0 +6997 clk cpu0 R X0 0000000000264007 +6997 clk cpu0 R X1 0000000013040000 +6998 clk cpu0 IT (6962) 00016b20:000010016b20 d51e1321 O EL3h_s : MSR MDCR_EL3,x1 +6998 clk cpu0 R MDCR_EL3 00000000:13040000 +6999 clk cpu0 IT (6963) 00016b24:000010016b24 d5033fdf O EL3h_s : ISB +6999 clk cpu0 R PMBIDR_EL1 00000020 +6999 clk cpu0 R TRBIDR_EL1 000000000000002b +7000 clk cpu0 IT (6964) 00016b28:000010016b28 d503201f O EL3h_s : NOP +7001 clk cpu0 IT (6965) 00016b2c:000010016b2c a8c17bfd O EL3h_s : LDP x29,x30,[sp],#0x10 +7001 clk cpu0 MR8 0384c4c0:00001084c4c0_NS 7fff7fff_7fff7fff +7001 clk cpu0 MR8 0384c4c8:00001084c4c8_NS 00000000_00015860 +7001 clk cpu0 R SP_EL3 000000000384C4D0 +7001 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7001 clk cpu0 R X30 0000000000015860 +7002 clk cpu0 IT (6966) 00016b30:000010016b30 d65f03c0 O EL3h_s : RET +7003 clk cpu0 IT (6967) 00015860:000010015860 a8c17bfd O EL3h_s : LDP x29,x30,[sp],#0x10 +7003 clk cpu0 MR8 0384c4d0:00001084c4d0_NS 7fff7fff_7fff7fff +7003 clk cpu0 MR8 0384c4d8:00001084c4d8_NS 00000000_00035960 +7003 clk cpu0 R SP_EL3 000000000384C4E0 +7003 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7003 clk cpu0 R X30 0000000000035960 +7004 clk cpu0 IT (6968) 00015864:000010015864 a8c10fe2 O EL3h_s : LDP x2,x3,[sp],#0x10 +7004 clk cpu0 MR8 0384c4e0:00001084c4e0_NS 00000000_00035fc0 +7004 clk cpu0 MR8 0384c4e8:00001084c4e8_NS 00000000_00000130 +7004 clk cpu0 R SP_EL3 000000000384C4F0 +7004 clk cpu0 R X2 0000000000035FC0 +7004 clk cpu0 R X3 0000000000000130 +7005 clk cpu0 IT (6969) 00015868:000010015868 a8c117e4 O EL3h_s : LDP x4,x5,[sp],#0x10 +7005 clk cpu0 MR8 0384c4f0:00001084c4f0_NS 00000000_000380c8 +7005 clk cpu0 MR8 0384c4f8:00001084c4f8_NS 00000000_00000000 +7005 clk cpu0 R SP_EL3 000000000384C500 +7005 clk cpu0 R X4 00000000000380C8 +7005 clk cpu0 R X5 0000000000000000 +7006 clk cpu0 IT (6970) 0001586c:00001001586c d69f03e0 O EL3h_s : ERET +7006 clk cpu0 E 00000000 EL1h 00000019 CoreEvent_ModeChange +7006 clk cpu0 R cpsr 62000bc5 +7006 clk cpu0 R DBGDSCRext 00060000 +7006 clk cpu0 R PMBIDR_EL1 00000030 +7006 clk cpu0 R TRBIDR_EL1 000000000000003b +7006 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +7006 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +7007 clk cpu0 IT (6971) 000380cc:0000100380cc_NS d65f03c0 O EL1h_n : RET +7008 clk cpu0 IT (6972) 00035960:000010035960_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +7008 clk cpu0 MR8 03700540:000000f00540_NS 7fff7fff_7fff7fff +7008 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011580 +7008 clk cpu0 R cpsr 620003c5 +7008 clk cpu0 R SP_EL1 0000000003700550 +7008 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7008 clk cpu0 R X30 0000000000011580 +7009 clk cpu0 IT (6973) 00035964:000010035964_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +7009 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000000 +7009 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00000001 +7009 clk cpu0 R SP_EL1 0000000003700560 +7009 clk cpu0 R X2 0000000000000000 +7009 clk cpu0 R X3 0000000000000001 +7010 clk cpu0 IT (6974) 00035968:000010035968_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +7010 clk cpu0 MR8 03700560:000000f00560_NS e7ffe7ff_e7ffe7ff +7010 clk cpu0 MR8 03700568:000000f00568_NS 0001ffff_fe000000 +7010 clk cpu0 R SP_EL1 0000000003700570 +7010 clk cpu0 R X6 E7FFE7FFE7FFE7FF +7010 clk cpu0 R X7 0001FFFFFE000000 +7011 clk cpu0 IT (6975) 0003596c:00001003596c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +7011 clk cpu0 MR8 03700570:000000f00570_NS 00000000_030293f0 +7011 clk cpu0 MR8 03700578:000000f00578_NS 00000000_000fffe0 +7011 clk cpu0 R SP_EL1 0000000003700580 +7011 clk cpu0 R X4 00000000030293F0 +7011 clk cpu0 R X5 00000000000FFFE0 +7012 clk cpu0 IT (6976) 00035970:000010035970_NS 1400000c O EL1h_n : B 0x359a0 +7012 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cc INVAL 0x0000100a5980 +7012 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cc ALLOC 0x000010035980_NS +7012 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1662 ALLOC 0x000010035980_NS +7013 clk cpu0 IT (6977) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +7013 clk cpu0 R cpsr 820003c5 +7013 clk cpu0 R PMBIDR_EL1 00000030 +7013 clk cpu0 R TRBIDR_EL1 000000000000003b +7014 clk cpu0 IT (6978) 000a6f54:0000100a6f54_NS a8c127e8 O EL1h_n : LDP x8,x9,[sp],#0x10 +7014 clk cpu0 MR8 03700580:000000f00580_NS 00000000_00000003 +7014 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00000018 +7014 clk cpu0 R SP_EL1 0000000003700590 +7014 clk cpu0 R X8 0000000000000003 +7014 clk cpu0 R X9 0000000000000018 +7015 clk cpu0 IT (6979) 000a6f58:0000100a6f58_NS d65f03c0 O EL1h_n : RET +7015 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00ac ALLOC 0x000010011580_NS +7015 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0560 ALLOC 0x000010011580_NS +7016 clk cpu0 IT (6980) 00011580:000010011580_NS f9402fe8 O EL1h_n : LDR x8,[sp,#0x58] +7016 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000001 +7016 clk cpu0 R X8 0000000000000001 +7017 clk cpu0 IS (6981) 00011584:000010011584_NS b4000048 O EL1h_n : CBZ x8,0x1158c +7018 clk cpu0 IT (6982) 00011588:000010011588_NS 14000007 O EL1h_n : B 0x115a4 +7019 clk cpu0 IT (6983) 000115a4:0000100115a4_NS b9407be8 O EL1h_n : LDR w8,[sp,#0x78] +7019 clk cpu0 MR4 03700608:000000f00608_NS 00000001 +7019 clk cpu0 R X8 0000000000000001 +7020 clk cpu0 IT (6984) 000115a8:0000100115a8_NS 35000048 O EL1h_n : CBNZ w8,0x115b0 +7021 clk cpu0 IT (6985) 000115b0:0000100115b0_NS f9402be8 O EL1h_n : LDR x8,[sp,#0x50] +7021 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000003 +7021 clk cpu0 R X8 0000000000000003 +7022 clk cpu0 IT (6986) 000115b4:0000100115b4_NS d2800309 O EL1h_n : MOV x9,#0x18 +7022 clk cpu0 R X9 0000000000000018 +7023 clk cpu0 IT (6987) 000115b8:0000100115b8_NS 9ac92100 O EL1h_n : LSL x0,x8,x9 +7023 clk cpu0 R X0 0000000003000000 +7024 clk cpu0 IT (6988) 000115bc:0000100115bc_NS f94037e2 O EL1h_n : LDR x2,[sp,#0x68] +7024 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +7024 clk cpu0 R X2 0000000000000000 +7024 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00ae ALLOC 0x0000100115c0_NS +7024 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0571 ALLOC 0x0000100115c0_NS +7025 clk cpu0 IT (6989) 000115c0:0000100115c0_NS f94033e3 O EL1h_n : LDR x3,[sp,#0x60] +7025 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +7025 clk cpu0 R X3 0000000000000001 +7026 clk cpu0 IT (6990) 000115c4:0000100115c4_NS d2a06001 O EL1h_n : MOV x1,#0x3000000 +7026 clk cpu0 R X1 0000000003000000 +7027 clk cpu0 IT (6991) 000115c8:0000100115c8_NS 940256a1 O EL1h_n : BL 0xa704c +7027 clk cpu0 R X30 00000000000115CC +7027 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0183 ALLOC 0x0000100a7040_NS +7027 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1c11 ALLOC 0x0000100a7040_NS +7028 clk cpu0 IT (6992) 000a704c:0000100a704c_NS a9bf27e8 O EL1h_n : STP x8,x9,[sp,#-0x10]! +7028 clk cpu0 MW8 03700580:000000f00580_NS 00000000_00000003 +7028 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00000018 +7028 clk cpu0 R SP_EL1 0000000003700580 +7029 clk cpu0 IT (6993) 000a7050:0000100a7050_NS aa0103e8 O EL1h_n : MOV x8,x1 +7029 clk cpu0 R X8 0000000003000000 +7030 clk cpu0 IT (6994) 000a7054:0000100a7054_NS aa0303e9 O EL1h_n : MOV x9,x3 +7030 clk cpu0 R X9 0000000000000001 +7031 clk cpu0 IT (6995) 000a7058:0000100a7058_NS f100085f O EL1h_n : CMP x2,#2 +7031 clk cpu0 R cpsr 820003c5 +7032 clk cpu0 IT (6996) 000a705c:0000100a705c_NS 540001eb O EL1h_n : B.LT 0xa7098 +7032 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0184 INVAL 0x00001009f080 +7032 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0184 ALLOC 0x0000100a7080_NS +7032 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1c22 ALLOC 0x0000100a7080_NS +7033 clk cpu0 IT (6997) 000a7098:0000100a7098_NS f100045f O EL1h_n : CMP x2,#1 +7033 clk cpu0 R cpsr 820003c5 +7034 clk cpu0 IT (6998) 000a709c:0000100a709c_NS 54000221 O EL1h_n : B.NE 0xa70e0 +7034 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0186 ALLOC 0x0000100a70c0_NS +7034 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1c30 ALLOC 0x0000100a70c0_NS +7035 clk cpu0 IT (6999) 000a70e0:0000100a70e0_NS aa0003e1 O EL1h_n : MOV x1,x0 +7035 clk cpu0 R X1 0000000003000000 +7036 clk cpu0 IT (7000) 000a70e4:0000100a70e4_NS d28000e0 O EL1h_n : MOV x0,#7 +7036 clk cpu0 R X0 0000000000000007 +7037 clk cpu0 IT (7001) 000a70e8:0000100a70e8_NS 32120000 O EL1h_n : ORR w0,w0,#0x4000 +7037 clk cpu0 R X0 0000000000004007 +7038 clk cpu0 IT (7002) 000a70ec:0000100a70ec_NS f2a004e0 O EL1h_n : MOVK x0,#0x27,LSL #16 +7038 clk cpu0 R X0 0000000000274007 +7039 clk cpu0 IT (7003) 000a70f0:0000100a70f0_NS d40000e1 O EL1h_n : SVC #7 +7039 clk cpu0 E 000a70f0:0000100a70f0_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +7039 clk cpu0 R cpsr 820003c5 +7039 clk cpu0 R PMBIDR_EL1 00000030 +7039 clk cpu0 R ESR_EL1 56000007 +7039 clk cpu0 R SPSR_EL1 820003c5 +7039 clk cpu0 R TRBIDR_EL1 000000000000003b +7039 clk cpu0 R ELR_EL1 00000000000a70f4 +7040 clk cpu0 IT (7004) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +7041 clk cpu0 IT (7005) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +7041 clk cpu0 R SP_EL1 0000000003700480 +7042 clk cpu0 IT (7006) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +7042 clk cpu0 MW8 03700480:000000f00480_NS 00000000_00274007 +7042 clk cpu0 MW8 03700488:000000f00488_NS 00000000_03000000 +7043 clk cpu0 IT (7007) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +7043 clk cpu0 R X0 0000000056000007 +7044 clk cpu0 IT (7008) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +7044 clk cpu0 R X1 0000000000000015 +7045 clk cpu0 IT (7009) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +7045 clk cpu0 R cpsr 620003c5 +7046 clk cpu0 IT (7010) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +7047 clk cpu0 IT (7011) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +7047 clk cpu0 R X1 0000000000000007 +7048 clk cpu0 IT (7012) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +7048 clk cpu0 R cpsr 220003c5 +7049 clk cpu0 IS (7013) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +7050 clk cpu0 IT (7014) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +7050 clk cpu0 R cpsr 820003c5 +7051 clk cpu0 IS (7015) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +7052 clk cpu0 IT (7016) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +7052 clk cpu0 R cpsr 820003c5 +7053 clk cpu0 IS (7017) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +7054 clk cpu0 IT (7018) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +7054 clk cpu0 R cpsr 620003c5 +7055 clk cpu0 IT (7019) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +7056 clk cpu0 IT (7020) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +7056 clk cpu0 MR8 03700480:000000f00480_NS 00000000_00274007 +7056 clk cpu0 MR8 03700488:000000f00488_NS 00000000_03000000 +7056 clk cpu0 R X0 0000000000274007 +7056 clk cpu0 R X1 0000000003000000 +7057 clk cpu0 IT (7021) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +7057 clk cpu0 R SP_EL1 0000000003700580 +7058 clk cpu0 IT (7022) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +7058 clk cpu0 R cpsr 220003c5 +7059 clk cpu0 IT (7023) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +7060 clk cpu0 IT (7024) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +7060 clk cpu0 MW8 03700570:000000f00570_NS 00000000_030293f0 +7060 clk cpu0 MW8 03700578:000000f00578_NS 00000000_000fffe0 +7060 clk cpu0 R SP_EL1 0000000003700570 +7061 clk cpu0 IT (7025) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +7061 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00274007 +7061 clk cpu0 MW8 03700568:000000f00568_NS 00000000_03000000 +7061 clk cpu0 R SP_EL1 0000000003700560 +7062 clk cpu0 IT (7026) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +7062 clk cpu0 R X5 0000000000000000 +7063 clk cpu0 IT (7027) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +7063 clk cpu0 R X1 0000000000000000 +7064 clk cpu0 IT (7028) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +7064 clk cpu0 R cpsr 820003c5 +7065 clk cpu0 IT (7029) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +7065 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00274007 +7065 clk cpu0 MR8 03700568:000000f00568_NS 00000000_03000000 +7065 clk cpu0 R SP_EL1 0000000003700570 +7065 clk cpu0 R X0 0000000000274007 +7065 clk cpu0 R X1 0000000003000000 +7066 clk cpu0 IT (7030) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +7067 clk cpu0 IT (7031) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +7067 clk cpu0 MW8 03700560:000000f00560_NS e7ffe7ff_e7ffe7ff +7067 clk cpu0 MW8 03700568:000000f00568_NS 0001ffff_fe000000 +7067 clk cpu0 R SP_EL1 0000000003700560 +7068 clk cpu0 IT (7032) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +7068 clk cpu0 R X6 0000000000000000 +7069 clk cpu0 IT (7033) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +7069 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +7069 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000001 +7069 clk cpu0 R SP_EL1 0000000003700550 +7070 clk cpu0 IT (7034) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +7070 clk cpu0 MW8 03700540:000000f00540_NS 7fff7fff_7fff7fff +7070 clk cpu0 MW8 03700548:000000f00548_NS 00000000_000115cc +7070 clk cpu0 R SP_EL1 0000000003700540 +7071 clk cpu0 IT (7035) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +7071 clk cpu0 R X3 0000000000000001 +7072 clk cpu0 IT (7036) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +7072 clk cpu0 R cpsr 620003c5 +7073 clk cpu0 IT (7037) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +7074 clk cpu0 IT (7038) 00035944:000010035944_NS 580557e2 O EL1h_n : LDR x2,0x40440 +7074 clk cpu0 MR8 00040440:000010040440_NS 00000000_00035e90 +7074 clk cpu0 R X2 0000000000035E90 +7075 clk cpu0 IT (7039) 00035948:000010035948_NS 53107c03 O EL1h_n : LSR w3,w0,#16 +7075 clk cpu0 R X3 0000000000000027 +7076 clk cpu0 IT (7040) 0003594c:00001003594c_NS 12003c63 O EL1h_n : AND w3,w3,#0xffff +7076 clk cpu0 R X3 0000000000000027 +7077 clk cpu0 IT (7041) 00035950:000010035950_NS d37df063 O EL1h_n : LSL x3,x3,#3 +7077 clk cpu0 R X3 0000000000000138 +7078 clk cpu0 IT (7042) 00035954:000010035954_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +7078 clk cpu0 R X2 0000000000035FC8 +7079 clk cpu0 IT (7043) 00035958:000010035958_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +7079 clk cpu0 MR8 00035fc8:000010035fc8_NS 00000000_000380d0 +7079 clk cpu0 R X4 00000000000380D0 +7080 clk cpu0 IT (7044) 0003595c:00001003595c_NS d63f0080 O EL1h_n : BLR x4 +7080 clk cpu0 R cpsr 62000bc5 +7080 clk cpu0 R X30 0000000000035960 +7081 clk cpu0 IT (7045) 000380d0:0000100380d0_NS d5384244 O EL1h_n : MRS x4,CURRENTEL +7081 clk cpu0 R cpsr 620003c5 +7081 clk cpu0 R X4 0000000000000004 +7082 clk cpu0 IT (7046) 000380d4:0000100380d4_NS f100209f O EL1h_n : CMP x4,#8 +7082 clk cpu0 R cpsr 820003c5 +7083 clk cpu0 IS (7047) 000380d8:0000100380d8_NS 54000160 O EL1h_n : B.EQ 0x38104 +7084 clk cpu0 IT (7048) 000380dc:0000100380dc_NS f1000d3f O EL1h_n : CMP x9,#3 +7084 clk cpu0 R cpsr 820003c5 +7085 clk cpu0 IT (7049) 000380e0:0000100380e0_NS 54000061 O EL1h_n : B.NE 0x380ec +7086 clk cpu0 IT (7050) 000380ec:0000100380ec_NS f100053f O EL1h_n : CMP x9,#1 +7086 clk cpu0 R cpsr 620003c5 +7087 clk cpu0 IS (7051) 000380f0:0000100380f0_NS 54000061 O EL1h_n : B.NE 0x380fc +7088 clk cpu0 IT (7052) 000380f4:0000100380f4_NS d40000e2 O EL1h_n : HVC #7 +7088 clk cpu0 E 000380f4:0000100380f4_NS EL2h 00000019 CoreEvent_ModeChange +7088 clk cpu0 E 000380f4:0000100380f4_NS 00000088 CoreEvent_LOWER_64_SYNC +7088 clk cpu0 R cpsr 620003c9 +7088 clk cpu0 R PMBIDR_EL1 00000030 +7088 clk cpu0 R ESR_EL2 5a000007 +7088 clk cpu0 R SPSR_EL2 620003c5 +7088 clk cpu0 R TRBIDR_EL1 000000000000002b +7088 clk cpu0 R ELR_EL2 00000000000380f8 +7088 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +7088 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000060410000 +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x0000702c0000_NS +7088 clk cpu0 TTW ITLB LPAE 1:0 0000702c0000 00000000702d0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x00000000702d0000 +7088 clk cpu0 TTW ITLB LPAE 1:1 0000702d0000 00000000702e0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x00000000702e0000 +7088 clk cpu0 TTW ITLB LPAE 1:2 0000702e0000 00000000702f0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x00000000702f0000 +7088 clk cpu0 TTW ITLB LPAE 1:3 0000702f0030 00000000100184c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000010018000 +7088 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x00018000_NS EL2_n, nG asid=0:0x0010018000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7088 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x00018000_NS EL2_n, nG asid=0:0x0010018000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x00002c1a0000 +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x0000702d0000_NS +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x0000702c0000_NS +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x0000702e0000_NS +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x0000702d0000_NS +7088 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x0000702f0000_NS +7088 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0061 ALLOC 0x000010018c00_NS +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000d INVAL 0x000060410000 +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000d ALLOC 0x0000702d0000_NS +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000e INVAL 0x00002c1a0000 +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000e ALLOC 0x0000702e0000_NS +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000f CLEAN 0x000010810000_NS +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000f INVAL 0x000010810000_NS +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000f ALLOC 0x0000702f0000_NS +7088 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0301 ALLOC 0x000010018c00_NS +7089 clk cpu0 IT (7053) 00018c00:000010018c00_NS 14001079 O EL2h_n : B 0x1cde4 +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x0000702e0000_NS +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x0000702c0000_NS +7089 clk cpu0 TTW ITLB LPAE 1:0 0000702c0000 00000000702d0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x00000000702d0000 +7089 clk cpu0 TTW ITLB LPAE 1:1 0000702d0000 00000000702e0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x00000000702e0000 +7089 clk cpu0 TTW ITLB LPAE 1:2 0000702e0000 00000000702f0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x00000000702f0000 +7089 clk cpu0 TTW ITLB LPAE 1:3 0000702f0038 000000001001c4c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x000000001001c000 +7089 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x0001c000_NS EL2_n, nG asid=0:0x001001c000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7089 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x0001c000_NS EL2_n, nG asid=0:0x001001c000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x0000702f0000_NS +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x0000702d0000_NS +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x0000702c0000_NS +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x0000702e0000_NS +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x0000702d0000_NS +7089 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x0000702f0000_NS +7089 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006f ALLOC 0x00001001cdc0_NS +7089 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1370 ALLOC 0x00001001cdc0_NS +7090 clk cpu0 IT (7054) 0001cde4:00001001cde4_NS d10403ff O EL2h_n : SUB sp,sp,#0x100 +7090 clk cpu0 R SP_EL2 000000000383C1D0 +7091 clk cpu0 IT (7055) 0001cde8:00001001cde8_NS a90007e0 O EL2h_n : STP x0,x1,[sp,#0] +7091 clk cpu0 MW8 0383c1d0:00001083c1d0_NS 00000000_00274007 +7091 clk cpu0 MW8 0383c1d8:00001083c1d8_NS 00000000_03000000 +7092 clk cpu0 IT (7056) 0001cdec:00001001cdec_NS d53c5200 O EL2h_n : MRS x0,ESR_EL2 +7092 clk cpu0 R X0 000000005A000007 +7093 clk cpu0 IT (7057) 0001cdf0:00001001cdf0_NS 531a7c01 O EL2h_n : LSR w1,w0,#26 +7093 clk cpu0 R X1 0000000000000016 +7094 clk cpu0 IT (7058) 0001cdf4:00001001cdf4_NS 7100543f O EL2h_n : CMP w1,#0x15 +7094 clk cpu0 R cpsr 220003c9 +7095 clk cpu0 IS (7059) 0001cdf8:00001001cdf8_NS 54000340 O EL2h_n : B.EQ 0x1ce60 +7096 clk cpu0 IT (7060) 0001cdfc:00001001cdfc_NS 7100583f O EL2h_n : CMP w1,#0x16 +7096 clk cpu0 R cpsr 620003c9 +7096 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0071 ALLOC 0x00001001ce00_NS +7096 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1380 ALLOC 0x00001001ce00_NS +7097 clk cpu0 IT (7061) 0001ce00:00001001ce00_NS 540000a0 O EL2h_n : B.EQ 0x1ce14 +7098 clk cpu0 IT (7062) 0001ce14:00001001ce14_NS d53c5200 O EL2h_n : MRS x0,ESR_EL2 +7098 clk cpu0 R X0 000000005A000007 +7099 clk cpu0 IT (7063) 0001ce18:00001001ce18_NS 53003c01 O EL2h_n : UXTH w1,w0 +7099 clk cpu0 R X1 0000000000000007 +7100 clk cpu0 IT (7064) 0001ce1c:00001001ce1c_NS 7100143f O EL2h_n : CMP w1,#5 +7100 clk cpu0 R cpsr 220003c9 +7101 clk cpu0 IS (7065) 0001ce20:00001001ce20_NS 5400f50b O EL2h_n : B.LT 0x1ecc0 +7102 clk cpu0 IT (7066) 0001ce24:00001001ce24_NS 7100283f O EL2h_n : CMP w1,#0xa +7102 clk cpu0 R cpsr 820003c9 +7103 clk cpu0 IS (7067) 0001ce28:00001001ce28_NS 5400f4cc O EL2h_n : B.GT 0x1ecc0 +7104 clk cpu0 IT (7068) 0001ce2c:00001001ce2c_NS 71001c3f O EL2h_n : CMP w1,#7 +7104 clk cpu0 R cpsr 620003c9 +7105 clk cpu0 IT (7069) 0001ce30:00001001ce30_NS 540003a0 O EL2h_n : B.EQ 0x1cea4 +7105 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0074 ALLOC 0x00001001ce80_NS +7105 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13a1 ALLOC 0x00001001ce80_NS +7106 clk cpu0 IT (7070) 0001cea4:00001001cea4_NS a94007e0 O EL2h_n : LDP x0,x1,[sp,#0] +7106 clk cpu0 MR8 0383c1d0:00001083c1d0_NS 00000000_00274007 +7106 clk cpu0 MR8 0383c1d8:00001083c1d8_NS 00000000_03000000 +7106 clk cpu0 R X0 0000000000274007 +7106 clk cpu0 R X1 0000000003000000 +7107 clk cpu0 IT (7071) 0001cea8:00001001cea8_NS 910403ff O EL2h_n : ADD sp,sp,#0x100 +7107 clk cpu0 R SP_EL2 000000000383C2D0 +7108 clk cpu0 IT (7072) 0001ceac:00001001ceac_NS f103bc3f O EL2h_n : CMP x1,#0xef +7108 clk cpu0 R cpsr 220003c9 +7109 clk cpu0 IT (7073) 0001ceb0:00001001ceb0_NS 54000061 O EL2h_n : B.NE 0x1cebc +7110 clk cpu0 IT (7074) 0001cebc:00001001cebc_NS a9bf17e4 O EL2h_n : STP x4,x5,[sp,#-0x10]! +7110 clk cpu0 MW8 0383c2c0:00001083c2c0_NS 00000000_00000004 +7110 clk cpu0 MW8 0383c2c8:00001083c2c8_NS 00000000_00000000 +7110 clk cpu0 R SP_EL2 000000000383C2C0 +7110 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0076 ALLOC 0x00001001cec0_NS +7110 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13b0 ALLOC 0x00001001cec0_NS +7111 clk cpu0 IT (7075) 0001cec0:00001001cec0_NS a9bf07e0 O EL2h_n : STP x0,x1,[sp,#-0x10]! +7111 clk cpu0 MW8 0383c2b0:00001083c2b0_NS 00000000_00274007 +7111 clk cpu0 MW8 0383c2b8:00001083c2b8_NS 00000000_03000000 +7111 clk cpu0 R SP_EL2 000000000383C2B0 +7112 clk cpu0 IT (7076) 0001cec4:00001001cec4_NS d2800005 O EL2h_n : MOV x5,#0 +7112 clk cpu0 R X5 0000000000000000 +7113 clk cpu0 IT (7077) 0001cec8:00001001cec8_NS d34d3401 O EL2h_n : UBFIZ x1,x0,#51,#14 +7113 clk cpu0 R X1 0000000000000000 +7114 clk cpu0 IT (7078) 0001cecc:00001001cecc_NS f100043f O EL2h_n : CMP x1,#1 +7114 clk cpu0 R cpsr 820003c9 +7115 clk cpu0 IT (7079) 0001ced0:00001001ced0_NS a8c107e0 O EL2h_n : LDP x0,x1,[sp],#0x10 +7115 clk cpu0 MR8 0383c2b0:00001083c2b0_NS 00000000_00274007 +7115 clk cpu0 MR8 0383c2b8:00001083c2b8_NS 00000000_03000000 +7115 clk cpu0 R SP_EL2 000000000383C2C0 +7115 clk cpu0 R X0 0000000000274007 +7115 clk cpu0 R X1 0000000003000000 +7116 clk cpu0 IT (7080) 0001ced4:00001001ced4_NS 540003a1 O EL2h_n : B.NE 0x1cf48 +7116 clk cpu0 CACHE cpu.cpu0.l1icache LINE 007a ALLOC 0x00001001cf40_NS +7116 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13d0 ALLOC 0x00001001cf40_NS +7117 clk cpu0 IT (7081) 0001cf48:00001001cf48_NS a9bf0fe2 O EL2h_n : STP x2,x3,[sp,#-0x10]! +7117 clk cpu0 MW8 0383c2b0:00001083c2b0_NS 00000000_00035fc8 +7117 clk cpu0 MW8 0383c2b8:00001083c2b8_NS 00000000_00000138 +7117 clk cpu0 R SP_EL2 000000000383C2B0 +7118 clk cpu0 IT (7082) 0001cf4c:00001001cf4c_NS a9bf7bfd O EL2h_n : STP x29,x30,[sp,#-0x10]! +7118 clk cpu0 MW8 0383c2a0:00001083c2a0_NS 7fff7fff_7fff7fff +7118 clk cpu0 MW8 0383c2a8:00001083c2a8_NS 00000000_00035960 +7118 clk cpu0 R SP_EL2 000000000383C2A0 +7119 clk cpu0 IT (7083) 0001cf50:00001001cf50_NS 530e3803 O EL2h_n : UBFIZ w3,w0,#18,#15 +7119 clk cpu0 R X3 0000000000000001 +7120 clk cpu0 IT (7084) 0001cf54:00001001cf54_NS f100047f O EL2h_n : CMP x3,#1 +7120 clk cpu0 R cpsr 620003c9 +7121 clk cpu0 IT (7085) 0001cf58:00001001cf58_NS 540000c0 O EL2h_n : B.EQ 0x1cf70 +7122 clk cpu0 IT (7086) 0001cf70:00001001cf70_NS 5801e582 O EL2h_n : LDR x2,0x20c20 +7122 clk cpu0 MR8 00020c20:000010020c20_NS 00000000_0001d590 +7122 clk cpu0 R X2 000000000001D590 +7122 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0061 ALLOC 0x000010020c00_NS +7122 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0302 ALLOC 0x000010020c00_NS +7123 clk cpu0 IT (7087) 0001cf74:00001001cf74_NS 53107c03 O EL2h_n : LSR w3,w0,#16 +7123 clk cpu0 R X3 0000000000000027 +7124 clk cpu0 IT (7088) 0001cf78:00001001cf78_NS 12003c63 O EL2h_n : AND w3,w3,#0xffff +7124 clk cpu0 R X3 0000000000000027 +7125 clk cpu0 IT (7089) 0001cf7c:00001001cf7c_NS d37df063 O EL2h_n : LSL x3,x3,#3 +7125 clk cpu0 R X3 0000000000000138 +7125 clk cpu0 CACHE cpu.cpu0.l1icache LINE 007c ALLOC 0x00001001cf80_NS +7125 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13e0 ALLOC 0x00001001cf80_NS +7126 clk cpu0 IT (7090) 0001cf80:00001001cf80_NS 8b030042 O EL2h_n : ADD x2,x2,x3 +7126 clk cpu0 R X2 000000000001D6C8 +7127 clk cpu0 IT (7091) 0001cf84:00001001cf84_NS f9400044 O EL2h_n : LDR x4,[x2,#0] +7127 clk cpu0 MR8 0001d6c8:00001001d6c8_NS 00000000_0001eacc +7127 clk cpu0 R X4 000000000001EACC +7127 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x0001c000_NS EL2_n, nG asid=0:0x001001c000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7127 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00b7 ALLOC 0x00001001d6c0_NS +7127 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15b1 ALLOC 0x00001001d6c0_NS +7128 clk cpu0 IT (7092) 0001cf88:00001001cf88_NS d63f0080 O EL2h_n : BLR x4 +7128 clk cpu0 R cpsr 62000bc9 +7128 clk cpu0 R X30 000000000001CF8C +7128 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0156 ALLOC 0x00001001eac0_NS +7128 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1ab0 ALLOC 0x00001001eac0_NS +7129 clk cpu0 IT (7093) 0001eacc:00001001eacc_NS d53c1122 O EL2h_n : MRS x2,MDCR_EL2 +7129 clk cpu0 R cpsr 620003c9 +7129 clk cpu0 R X2 0000000000000008 +7130 clk cpu0 IT (7094) 0001ead0:00001001ead0_NS 8a080021 O EL2h_n : AND x1,x1,x8 +7130 clk cpu0 R X1 0000000003000000 +7131 clk cpu0 IT (7095) 0001ead4:00001001ead4_NS 8a280042 O EL2h_n : BIC x2,x2,x8 +7131 clk cpu0 R X2 0000000000000008 +7132 clk cpu0 IT (7096) 0001ead8:00001001ead8_NS aa020021 O EL2h_n : ORR x1,x1,x2 +7132 clk cpu0 R X1 0000000003000008 +7133 clk cpu0 IT (7097) 0001eadc:00001001eadc_NS a9bf7bfd O EL2h_n : STP x29,x30,[sp,#-0x10]! +7133 clk cpu0 MW8 0383c290:00001083c290_NS 7fff7fff_7fff7fff +7133 clk cpu0 MW8 0383c298:00001083c298_NS 00000000_0001cf8c +7133 clk cpu0 R SP_EL2 000000000383C290 +7134 clk cpu0 IT (7098) 0001eae0:00001001eae0_NS a9bf07e0 O EL2h_n : STP x0,x1,[sp,#-0x10]! +7134 clk cpu0 MW8 0383c280:00001083c280_NS 00000000_00274007 +7134 clk cpu0 MW8 0383c288:00001083c288_NS 00000000_03000008 +7134 clk cpu0 R SP_EL2 000000000383C280 +7135 clk cpu0 IT (7099) 0001eae4:00001001eae4_NS d503201f O EL2h_n : NOP +7136 clk cpu0 IT (7100) 0001eae8:00001001eae8_NS a8c107e0 O EL2h_n : LDP x0,x1,[sp],#0x10 +7136 clk cpu0 MR8 0383c280:00001083c280_NS 00000000_00274007 +7136 clk cpu0 MR8 0383c288:00001083c288_NS 00000000_03000008 +7136 clk cpu0 R SP_EL2 000000000383C290 +7136 clk cpu0 R X0 0000000000274007 +7136 clk cpu0 R X1 0000000003000008 +7137 clk cpu0 IT (7101) 0001eaec:00001001eaec_NS d51c1121 O EL2h_n : MSR MDCR_EL2,x1 +7137 clk cpu0 R MDCR_EL2 00000000:03000008 +7138 clk cpu0 IT (7102) 0001eaf0:00001001eaf0_NS d5033fdf O EL2h_n : ISB +7138 clk cpu0 R PMBIDR_EL1 00000030 +7138 clk cpu0 R TRBIDR_EL1 000000000000002b +7139 clk cpu0 IT (7103) 0001eaf4:00001001eaf4_NS d503201f O EL2h_n : NOP +7140 clk cpu0 IT (7104) 0001eaf8:00001001eaf8_NS a8c17bfd O EL2h_n : LDP x29,x30,[sp],#0x10 +7140 clk cpu0 MR8 0383c290:00001083c290_NS 7fff7fff_7fff7fff +7140 clk cpu0 MR8 0383c298:00001083c298_NS 00000000_0001cf8c +7140 clk cpu0 R SP_EL2 000000000383C2A0 +7140 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7140 clk cpu0 R X30 000000000001CF8C +7141 clk cpu0 IT (7105) 0001eafc:00001001eafc_NS d65f03c0 O EL2h_n : RET +7142 clk cpu0 IT (7106) 0001cf8c:00001001cf8c_NS a8c17bfd O EL2h_n : LDP x29,x30,[sp],#0x10 +7142 clk cpu0 MR8 0383c2a0:00001083c2a0_NS 7fff7fff_7fff7fff +7142 clk cpu0 MR8 0383c2a8:00001083c2a8_NS 00000000_00035960 +7142 clk cpu0 R SP_EL2 000000000383C2B0 +7142 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7142 clk cpu0 R X30 0000000000035960 +7143 clk cpu0 IT (7107) 0001cf90:00001001cf90_NS a8c10fe2 O EL2h_n : LDP x2,x3,[sp],#0x10 +7143 clk cpu0 MR8 0383c2b0:00001083c2b0_NS 00000000_00035fc8 +7143 clk cpu0 MR8 0383c2b8:00001083c2b8_NS 00000000_00000138 +7143 clk cpu0 R SP_EL2 000000000383C2C0 +7143 clk cpu0 R X2 0000000000035FC8 +7143 clk cpu0 R X3 0000000000000138 +7144 clk cpu0 IT (7108) 0001cf94:00001001cf94_NS a8c117e4 O EL2h_n : LDP x4,x5,[sp],#0x10 +7144 clk cpu0 MR8 0383c2c0:00001083c2c0_NS 00000000_00000004 +7144 clk cpu0 MR8 0383c2c8:00001083c2c8_NS 00000000_00000000 +7144 clk cpu0 R SP_EL2 000000000383C2D0 +7144 clk cpu0 R X4 0000000000000004 +7144 clk cpu0 R X5 0000000000000000 +7145 clk cpu0 IT (7109) 0001cf98:00001001cf98_NS 1400000b O EL2h_n : B 0x1cfc4 +7145 clk cpu0 CACHE cpu.cpu0.l1icache LINE 007e ALLOC 0x00001001cfc0_NS +7145 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13f0 ALLOC 0x00001001cfc0_NS +7146 clk cpu0 IT (7110) 0001cfc4:00001001cfc4_NS aa0003e2 O EL2h_n : MOV x2,x0 +7146 clk cpu0 R X2 0000000000274007 +7147 clk cpu0 IT (7111) 0001cfc8:00001001cfc8_NS aa0003e3 O EL2h_n : MOV x3,x0 +7147 clk cpu0 R X3 0000000000274007 +7148 clk cpu0 IT (7112) 0001cfcc:00001001cfcc_NS d34f3c42 O EL2h_n : UBFIZ x2,x2,#49,#16 +7148 clk cpu0 R X2 0000000000000000 +7149 clk cpu0 IT (7113) 0001cfd0:00001001cfd0_NS f100045f O EL2h_n : CMP x2,#1 +7149 clk cpu0 R cpsr 820003c9 +7150 clk cpu0 IT (7114) 0001cfd4:00001001cfd4_NS 540003e1 O EL2h_n : B.NE 0x1d050 +7150 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0082 ALLOC 0x00001001d040_NS +7150 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1410 ALLOC 0x00001001d040_NS +7151 clk cpu0 IT (7115) 0001d050:00001001d050_NS d69f03e0 O EL2h_n : ERET +7151 clk cpu0 E 00000000 EL1h 00000019 CoreEvent_ModeChange +7151 clk cpu0 R cpsr 620003c5 +7151 clk cpu0 R PMBIDR_EL1 00000030 +7151 clk cpu0 R TRBIDR_EL1 000000000000002b +7151 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +7151 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +7152 clk cpu0 IT (7116) 000380f8:0000100380f8_NS 1400000f O EL1h_n : B 0x38134 +7152 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0009 ALLOC 0x000010038100_NS +7152 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0044 ALLOC 0x000010038100_NS +7153 clk cpu0 IT (7117) 00038134:000010038134_NS d65f03c0 O EL1h_n : RET +7154 clk cpu0 IT (7118) 00035960:000010035960_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +7154 clk cpu0 MR8 03700540:000000f00540_NS 7fff7fff_7fff7fff +7154 clk cpu0 MR8 03700548:000000f00548_NS 00000000_000115cc +7154 clk cpu0 R SP_EL1 0000000003700550 +7154 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7154 clk cpu0 R X30 00000000000115CC +7155 clk cpu0 IT (7119) 00035964:000010035964_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +7155 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000000 +7155 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00000001 +7155 clk cpu0 R SP_EL1 0000000003700560 +7155 clk cpu0 R X2 0000000000000000 +7155 clk cpu0 R X3 0000000000000001 +7156 clk cpu0 IT (7120) 00035968:000010035968_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +7156 clk cpu0 MR8 03700560:000000f00560_NS e7ffe7ff_e7ffe7ff +7156 clk cpu0 MR8 03700568:000000f00568_NS 0001ffff_fe000000 +7156 clk cpu0 R SP_EL1 0000000003700570 +7156 clk cpu0 R X6 E7FFE7FFE7FFE7FF +7156 clk cpu0 R X7 0001FFFFFE000000 +7157 clk cpu0 IT (7121) 0003596c:00001003596c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +7157 clk cpu0 MR8 03700570:000000f00570_NS 00000000_030293f0 +7157 clk cpu0 MR8 03700578:000000f00578_NS 00000000_000fffe0 +7157 clk cpu0 R SP_EL1 0000000003700580 +7157 clk cpu0 R X4 00000000030293F0 +7157 clk cpu0 R X5 00000000000FFFE0 +7158 clk cpu0 IT (7122) 00035970:000010035970_NS 1400000c O EL1h_n : B 0x359a0 +7159 clk cpu0 IT (7123) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +7159 clk cpu0 R cpsr 820003c5 +7159 clk cpu0 R PMBIDR_EL1 00000030 +7159 clk cpu0 R TRBIDR_EL1 000000000000002b +7160 clk cpu0 IT (7124) 000a70f4:0000100a70f4_NS a8c127e8 O EL1h_n : LDP x8,x9,[sp],#0x10 +7160 clk cpu0 MR8 03700580:000000f00580_NS 00000000_00000003 +7160 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00000018 +7160 clk cpu0 R SP_EL1 0000000003700590 +7160 clk cpu0 R X8 0000000000000003 +7160 clk cpu0 R X9 0000000000000018 +7161 clk cpu0 IT (7125) 000a70f8:0000100a70f8_NS d65f03c0 O EL1h_n : RET +7162 clk cpu0 IT (7126) 000115cc:0000100115cc_NS f94043fe O EL1h_n : LDR x30,[sp,#0x80] +7162 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00010898 +7162 clk cpu0 R X30 0000000000010898 +7163 clk cpu0 IT (7127) 000115d0:0000100115d0_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +7163 clk cpu0 R SP_EL1 0000000003700620 +7164 clk cpu0 IT (7128) 000115d4:0000100115d4_NS d65f03c0 O EL1h_n : RET +7165 clk cpu0 IT (7129) 00010898:000010010898_NS f94043e9 O EL1h_n : LDR x9,[sp,#0x80] +7165 clk cpu0 MR8 037006a0:000000f006a0_NS 00000000_03008530 +7165 clk cpu0 R X9 0000000003008530 +7166 clk cpu0 IT (7130) 0001089c:00001001089c_NS f940012a O EL1h_n : LDR x10,[x9,#0] +7166 clk cpu0 TTW DTLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +7166 clk cpu0 TTW DTLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +7166 clk cpu0 TTW DTLB LPAE 1:2 000070450008 0000000070470003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070470000 +7166 clk cpu0 TTW DTLB LPAE 1:3 000070472010 0000000000808463 : BLOCK ATTRIDX=0 NS=1 AP=1 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000000808000 +7166 clk cpu0 MR8 03008530:000000808530_NS 00000000_00000000 +7166 clk cpu0 R X10 0000000000000000 +7166 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x03008000_NS EL1_n vmid=0:0x0000808000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7166 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x03008000_NS EL1_n vmid=0:0x0000808000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x0000702e0000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070250000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x0000702f0000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070440000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070250000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070450000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0100 INVAL 0x000070462000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0100 ALLOC 0x000070472000_NS +7166 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0029 ALLOC 0x000000808500_NS +7166 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000d INVAL 0x0000702d0000_NS +7166 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000d ALLOC 0x000070250000_NS +7166 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000e INVAL 0x0000702e0000_NS +7166 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000e ALLOC 0x000070440000_NS +7166 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0143 ALLOC 0x000000808500_NS +7167 clk cpu0 IT (7131) 000108a0:0000100108a0_NS f9403fec O EL1h_n : LDR x12,[sp,#0x78] +7167 clk cpu0 MR8 03700698:000000f00698_NS 00000000_00000000 +7167 clk cpu0 R X12 0000000000000000 +7168 clk cpu0 IT (7132) 000108a4:0000100108a4_NS eb0c015f O EL1h_n : CMP x10,x12 +7168 clk cpu0 R cpsr 620003c5 +7169 clk cpu0 IT (7133) 000108a8:0000100108a8_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +7169 clk cpu0 R X8 0000000000000001 +7170 clk cpu0 IT (7134) 000108ac:0000100108ac_NS 37000048 O EL1h_n : TBNZ w8,#0,0x108b4 +7171 clk cpu0 IT (7135) 000108b4:0000100108b4_NS b0000008 O EL1h_n : ADRP x8,0x118b4 +7171 clk cpu0 R X8 0000000000011000 +7172 clk cpu0 IT (7136) 000108b8:0000100108b8_NS 91089108 O EL1h_n : ADD x8,x8,#0x224 +7172 clk cpu0 R X8 0000000000011224 +7173 clk cpu0 IT (7137) 000108bc:0000100108bc_NS d63f0100 O EL1h_n : BLR x8 +7173 clk cpu0 R cpsr 62000bc5 +7173 clk cpu0 R X30 00000000000108C0 +7174 clk cpu0 IT (7138) 00011224:000010011224_NS f81f0ffe O EL1h_n : STR x30,[sp,#-0x10]! +7174 clk cpu0 MW8 03700610:000000f00610_NS 00000000_000108c0 +7174 clk cpu0 R cpsr 620003c5 +7174 clk cpu0 R SP_EL1 0000000003700610 +7175 clk cpu0 IT (7139) 00011228:000010011228_NS 94000280 O EL1h_n : BL 0x11c28 +7175 clk cpu0 R X30 000000000001122C +7176 clk cpu0 IT (7140) 00011c28:000010011c28_NS d2a46008 O EL1h_n : MOV x8,#0x23000000 +7176 clk cpu0 R X8 0000000023000000 +7177 clk cpu0 IT (7141) 00011c2c:000010011c2c_NS 90018309 O EL1h_n : ADRP x9,0x3071c2c +7177 clk cpu0 R X9 0000000003071000 +7178 clk cpu0 IT (7142) 00011c30:000010011c30_NS 9124a129 O EL1h_n : ADD x9,x9,#0x928 +7178 clk cpu0 R X9 0000000003071928 +7179 clk cpu0 IT (7143) 00011c34:000010011c34_NS f9000128 O EL1h_n : STR x8,[x9,#0] +7179 clk cpu0 MW8 03071928:000000871928_NS 00000000_23000000 +7180 clk cpu0 IT (7144) 00011c38:000010011c38_NS f9400120 O EL1h_n : LDR x0,[x9,#0] +7180 clk cpu0 MR8 03071928:000000871928_NS 00000000_23000000 +7180 clk cpu0 R X0 0000000023000000 +7181 clk cpu0 IT (7145) 00011c3c:000010011c3c_NS d65f03c0 O EL1h_n : RET +7182 clk cpu0 IT (7146) 0001122c:00001001122c_NS f84107fe O EL1h_n : LDR x30,[sp],#0x10 +7182 clk cpu0 MR8 03700610:000000f00610_NS 00000000_000108c0 +7182 clk cpu0 R SP_EL1 0000000003700620 +7182 clk cpu0 R X30 00000000000108C0 +7183 clk cpu0 IT (7147) 00011230:000010011230_NS d65f03c0 O EL1h_n : RET +7183 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0046 ALLOC 0x0000100108c0_NS +7183 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0230 ALLOC 0x0000100108c0_NS +7184 clk cpu0 IT (7148) 000108c0:0000100108c0_NS f94043e8 O EL1h_n : LDR x8,[sp,#0x80] +7184 clk cpu0 MR8 037006a0:000000f006a0_NS 00000000_03008530 +7184 clk cpu0 R X8 0000000003008530 +7185 clk cpu0 IT (7149) 000108c4:0000100108c4_NS f9000100 O EL1h_n : STR x0,[x8,#0] +7185 clk cpu0 MW8 03008530:000000808530_NS 00000000_23000000 +7185 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0029 DIRTY 0x000000808500_NS +7185 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0143 INVAL 0x000000808500_NS +7186 clk cpu0 IT (7150) 000108c8:0000100108c8_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +7186 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +7186 clk cpu0 R X3 0000000000000000 +7187 clk cpu0 IT (7151) 000108cc:0000100108cc_NS 52803d80 O EL1h_n : MOV w0,#0x1ec +7187 clk cpu0 R X0 00000000000001EC +7188 clk cpu0 IT (7152) 000108d0:0000100108d0_NS 52800021 O EL1h_n : MOV w1,#1 +7188 clk cpu0 R X1 0000000000000001 +7189 clk cpu0 IT (7153) 000108d4:0000100108d4_NS 52800068 O EL1h_n : MOV w8,#3 +7189 clk cpu0 R X8 0000000000000003 +7190 clk cpu0 IT (7154) 000108d8:0000100108d8_NS 2a0803e2 O EL1h_n : MOV w2,w8 +7190 clk cpu0 R X2 0000000000000003 +7191 clk cpu0 IT (7155) 000108dc:0000100108dc_NS b90067e8 O EL1h_n : STR w8,[sp,#0x64] +7191 clk cpu0 MW4 03700684:000000f00684_NS 00000003 +7192 clk cpu0 IT (7156) 000108e0:0000100108e0_NS 94022b85 O EL1h_n : BL 0x9b6f4 +7192 clk cpu0 R X30 00000000000108E4 +7192 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01b7 ALLOC 0x00001009b6c0_NS +7192 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0db1 ALLOC 0x00001009b6c0_NS +7193 clk cpu0 IT (7157) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +7193 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +7193 clk cpu0 R SP_EL1 0000000003700600 +7194 clk cpu0 IT (7158) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +7194 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +7194 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000108e4 +7195 clk cpu0 IT (7159) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +7195 clk cpu0 R cpsr 220003c5 +7195 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01b9 ALLOC 0x00001009b700_NS +7195 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0dc1 ALLOC 0x00001009b700_NS +7196 clk cpu0 IT (7160) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +7196 clk cpu0 R X19 00000000000001EC +7197 clk cpu0 IS (7161) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +7198 clk cpu0 IT (7162) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +7198 clk cpu0 R cpsr 620003c5 +7199 clk cpu0 IT (7163) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +7199 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01bb ALLOC 0x00001009b740_NS +7199 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0dd1 ALLOC 0x00001009b740_NS +7200 clk cpu0 IT (7164) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +7200 clk cpu0 R X1 00000000000001EC +7201 clk cpu0 IT (7165) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +7201 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +7201 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000108e4 +7201 clk cpu0 R X19 1818181818181818 +7201 clk cpu0 R X30 00000000000108E4 +7202 clk cpu0 IT (7166) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +7202 clk cpu0 R X0 0000000000000001 +7203 clk cpu0 IT (7167) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +7203 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +7203 clk cpu0 R SP_EL1 0000000003700620 +7203 clk cpu0 R X20 001FFFFFFFFFFFFE +7204 clk cpu0 IT (7168) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +7204 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017b INVAL 0x0000100a6f40_NS +7204 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017b ALLOC 0x00001009ef40_NS +7204 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1bd1 ALLOC 0x00001009ef40_NS +7205 clk cpu0 IT (7169) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +7205 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +7205 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000108e4 +7205 clk cpu0 R SP_EL1 0000000003700610 +7206 clk cpu0 IT (7170) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +7206 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +7206 clk cpu0 R cpsr 620003c5 +7206 clk cpu0 R PMBIDR_EL1 00000030 +7206 clk cpu0 R ESR_EL1 56000005 +7206 clk cpu0 R SPSR_EL1 620003c5 +7206 clk cpu0 R TRBIDR_EL1 000000000000002b +7206 clk cpu0 R ELR_EL1 000000000009ef50 +7207 clk cpu0 IT (7171) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +7208 clk cpu0 IT (7172) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +7208 clk cpu0 R SP_EL1 0000000003700510 +7209 clk cpu0 IT (7173) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +7209 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +7209 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001ec +7210 clk cpu0 IT (7174) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +7210 clk cpu0 R X0 0000000056000005 +7211 clk cpu0 IT (7175) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +7211 clk cpu0 R X1 0000000000000015 +7212 clk cpu0 IT (7176) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +7212 clk cpu0 R cpsr 620003c5 +7213 clk cpu0 IT (7177) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +7214 clk cpu0 IT (7178) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +7214 clk cpu0 R X1 0000000000000005 +7215 clk cpu0 IT (7179) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +7215 clk cpu0 R cpsr 620003c5 +7216 clk cpu0 IS (7180) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +7217 clk cpu0 IT (7181) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +7217 clk cpu0 R cpsr 820003c5 +7218 clk cpu0 IS (7182) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +7219 clk cpu0 IT (7183) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +7219 clk cpu0 R cpsr 820003c5 +7220 clk cpu0 IS (7184) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +7221 clk cpu0 IT (7185) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +7221 clk cpu0 R cpsr 820003c5 +7222 clk cpu0 IS (7186) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +7223 clk cpu0 IT (7187) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +7223 clk cpu0 R cpsr 820003c5 +7224 clk cpu0 IS (7188) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +7225 clk cpu0 IT (7189) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +7225 clk cpu0 R cpsr 820003c5 +7226 clk cpu0 IS (7190) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +7227 clk cpu0 IT (7191) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +7227 clk cpu0 R cpsr 820003c5 +7228 clk cpu0 IS (7192) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +7229 clk cpu0 IT (7193) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +7229 clk cpu0 R cpsr 620003c5 +7230 clk cpu0 IT (7194) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +7230 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000d ALLOC 0x000010038180_NS +7230 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0061 ALLOC 0x000010038180_NS +7231 clk cpu0 IT (7195) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +7231 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +7231 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001ec +7231 clk cpu0 R X0 0000000000000001 +7231 clk cpu0 R X1 00000000000001EC +7232 clk cpu0 IT (7196) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +7232 clk cpu0 R SP_EL1 0000000003700610 +7233 clk cpu0 IT (7197) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +7233 clk cpu0 R X0 00000000000001EC +7234 clk cpu0 IT (7198) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +7234 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +7234 clk cpu0 MW8 03700608:000000f00608_NS 00000000_000108e4 +7234 clk cpu0 R SP_EL1 0000000003700600 +7235 clk cpu0 IT (7199) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +7235 clk cpu0 R X30 00000000000381B4 +7235 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01bf ALLOC 0x00001009b7c0_NS +7235 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0df1 ALLOC 0x00001009b7c0_NS +7236 clk cpu0 IT (7200) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +7236 clk cpu0 R X9 0000000003003000 +7237 clk cpu0 IT (7201) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +7237 clk cpu0 R X8 000000000000007B +7238 clk cpu0 IT (7202) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +7238 clk cpu0 R X9 00000000030039C8 +7239 clk cpu0 IT (7203) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +7239 clk cpu0 MR8 03003da0:000000803da0_NS 00000000_0009f790 +7239 clk cpu0 R X0 000000000009F790 +7239 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 01ec ALLOC 0x000000803d80_NS +7239 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0f61 ALLOC 0x000000803d80_NS +7240 clk cpu0 IT (7204) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +7240 clk cpu0 R cpsr 620007c5 +7240 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01bd ALLOC 0x00001009f780_NS +7240 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1de0 ALLOC 0x00001009f780_NS +7241 clk cpu0 IT (7205) 0009f790:00001009f790_NS d5310be0 O EL1h_n : MRS x0,TRCIDR3 +7241 clk cpu0 R cpsr 620003c5 +7241 clk cpu0 R X0 000000000D7F0004 +7242 clk cpu0 IT (7206) 0009f794:00001009f794_NS d65f03c0 O EL1h_n : RET +7243 clk cpu0 IT (7207) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +7243 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +7243 clk cpu0 MR8 03700608:000000f00608_NS 00000000_000108e4 +7243 clk cpu0 R SP_EL1 0000000003700610 +7243 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7243 clk cpu0 R X30 00000000000108E4 +7244 clk cpu0 IT (7208) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +7244 clk cpu0 R cpsr 620003c5 +7244 clk cpu0 R PMBIDR_EL1 00000030 +7244 clk cpu0 R TRBIDR_EL1 000000000000002b +7245 clk cpu0 IT (7209) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +7245 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +7245 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000108e4 +7245 clk cpu0 R SP_EL1 0000000003700620 +7245 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7245 clk cpu0 R X30 00000000000108E4 +7246 clk cpu0 IT (7210) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +7247 clk cpu0 IT (7211) 000108e4:0000100108e4_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +7247 clk cpu0 MW4 037007b8:000000f007b8_NS 0d7f0004 +7248 clk cpu0 IT (7212) 000108e8:0000100108e8_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +7248 clk cpu0 MR4 037007b8:000000f007b8_NS 0d7f0004 +7248 clk cpu0 R X8 000000000D7F0004 +7249 clk cpu0 IT (7213) 000108ec:0000100108ec_NS 52ae0009 O EL1h_n : MOV w9,#0x70000000 +7249 clk cpu0 R X9 0000000070000000 +7250 clk cpu0 IT (7214) 000108f0:0000100108f0_NS 0a090108 O EL1h_n : AND w8,w8,w9 +7250 clk cpu0 R X8 0000000000000000 +7251 clk cpu0 IT (7215) 000108f4:0000100108f4_NS 52800389 O EL1h_n : MOV w9,#0x1c +7251 clk cpu0 R X9 000000000000001C +7252 clk cpu0 IT (7216) 000108f8:0000100108f8_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +7252 clk cpu0 R X8 0000000000000000 +7253 clk cpu0 IT (7217) 000108fc:0000100108fc_NS b90197e8 O EL1h_n : STR w8,[sp,#0x194] +7253 clk cpu0 MW4 037007b4:000000f007b4_NS 00000000 +7253 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0048 ALLOC 0x000010010900_NS +7253 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0240 ALLOC 0x000010010900_NS +7254 clk cpu0 IT (7218) 00010900:000010010900_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +7254 clk cpu0 MR4 037007b8:000000f007b8_NS 0d7f0004 +7254 clk cpu0 R X8 000000000D7F0004 +7255 clk cpu0 IT (7219) 00010904:000010010904_NS 52860009 O EL1h_n : MOV w9,#0x3000 +7255 clk cpu0 R X9 0000000000003000 +7256 clk cpu0 IT (7220) 00010908:000010010908_NS 0a090108 O EL1h_n : AND w8,w8,w9 +7256 clk cpu0 R X8 0000000000000000 +7257 clk cpu0 IT (7221) 0001090c:00001001090c_NS 52800189 O EL1h_n : MOV w9,#0xc +7257 clk cpu0 R X9 000000000000000C +7258 clk cpu0 IT (7222) 00010910:000010010910_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +7258 clk cpu0 R X8 0000000000000000 +7259 clk cpu0 IT (7223) 00010914:000010010914_NS b90193e8 O EL1h_n : STR w8,[sp,#0x190] +7259 clk cpu0 MW4 037007b0:000000f007b0_NS 00000000 +7260 clk cpu0 IT (7224) 00010918:000010010918_NS b94197e8 O EL1h_n : LDR w8,[sp,#0x194] +7260 clk cpu0 MR4 037007b4:000000f007b4_NS 00000000 +7260 clk cpu0 R X8 0000000000000000 +7261 clk cpu0 IT (7225) 0001091c:00001001091c_NS b94193e9 O EL1h_n : LDR w9,[sp,#0x190] +7261 clk cpu0 MR4 037007b0:000000f007b0_NS 00000000 +7261 clk cpu0 R X9 0000000000000000 +7262 clk cpu0 IT (7226) 00010920:000010010920_NS b94067ea O EL1h_n : LDR w10,[sp,#0x64] +7262 clk cpu0 MR4 03700684:000000f00684_NS 00000003 +7262 clk cpu0 R X10 0000000000000003 +7263 clk cpu0 IT (7227) 00010924:000010010924_NS 1aca2129 O EL1h_n : LSL w9,w9,w10 +7263 clk cpu0 R X9 0000000000000000 +7264 clk cpu0 IT (7228) 00010928:000010010928_NS 2a090108 O EL1h_n : ORR w8,w8,w9 +7264 clk cpu0 R X8 0000000000000000 +7265 clk cpu0 IT (7229) 0001092c:00001001092c_NS b9018fe8 O EL1h_n : STR w8,[sp,#0x18c] +7265 clk cpu0 MW4 037007ac:000000f007ac_NS 00000000 +7266 clk cpu0 IT (7230) 00010930:000010010930_NS f94063eb O EL1h_n : LDR x11,[sp,#0xc0] +7266 clk cpu0 MR8 037006e0:000000f006e0_NS 00000000_038007bc +7266 clk cpu0 R X11 00000000038007BC +7267 clk cpu0 IT (7231) 00010934:000010010934_NS b9400168 O EL1h_n : LDR w8,[x11,#0] +7267 clk cpu0 MR4 038007bc:0000108007bc_NS 00000001 +7267 clk cpu0 R X8 0000000000000001 +7267 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d CLEAN 0x000000f00780_NS +7267 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d INVAL 0x000000f00780_NS +7267 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d ALLOC 0x000010800780_NS +7267 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e4 ALLOC 0x000000f00780_NS +7268 clk cpu0 IT (7232) 00010938:000010010938_NS 7100051f O EL1h_n : CMP w8,#1 +7268 clk cpu0 R cpsr 620003c5 +7269 clk cpu0 IT (7233) 0001093c:00001001093c_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +7269 clk cpu0 R X8 0000000000000001 +7269 clk cpu0 CACHE cpu.cpu0.l1icache LINE 004a INVAL 0x000010098940 +7269 clk cpu0 CACHE cpu.cpu0.l1icache LINE 004a ALLOC 0x000010010940_NS +7269 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0253 ALLOC 0x000010010940_NS +7270 clk cpu0 IT (7234) 00010940:000010010940_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10948 +7271 clk cpu0 IT (7235) 00010948:000010010948_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +7271 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +7271 clk cpu0 R X8 0000000000000001 +7271 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003c INVAL 0x000010040780_NS +7271 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003c ALLOC 0x000000f00780_NS +7272 clk cpu0 IT (7236) 0001094c:00001001094c_NS 7100051f O EL1h_n : CMP w8,#1 +7272 clk cpu0 R cpsr 620003c5 +7273 clk cpu0 IT (7237) 00010950:000010010950_NS 1a9fd7e8 O EL1h_n : CSET w8,GT +7273 clk cpu0 R X8 0000000000000000 +7274 clk cpu0 IS (7238) 00010954:000010010954_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1095c +7275 clk cpu0 IT (7239) 00010958:000010010958_NS 1400000e O EL1h_n : B 0x10990 +7275 clk cpu0 CACHE cpu.cpu0.l1icache LINE 004d ALLOC 0x000010010980_NS +7275 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0261 ALLOC 0x000010010980_NS +7276 clk cpu0 IT (7240) 00010990:000010010990_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +7276 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +7276 clk cpu0 R X8 0000000000000001 +7277 clk cpu0 IT (7241) 00010994:000010010994_NS 7100051f O EL1h_n : CMP w8,#1 +7277 clk cpu0 R cpsr 620003c5 +7278 clk cpu0 IT (7242) 00010998:000010010998_NS 1a9fd7e8 O EL1h_n : CSET w8,GT +7278 clk cpu0 R X8 0000000000000000 +7279 clk cpu0 IS (7243) 0001099c:00001001099c_NS 37000048 O EL1h_n : TBNZ w8,#0,0x109a4 +7280 clk cpu0 IT (7244) 000109a0:0000100109a0_NS 14000008 O EL1h_n : B 0x109c0 +7280 clk cpu0 CACHE cpu.cpu0.l1icache LINE 004f ALLOC 0x0000100109c0_NS +7280 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0271 ALLOC 0x0000100109c0_NS +7281 clk cpu0 IT (7245) 000109c0:0000100109c0_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +7281 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +7281 clk cpu0 R X8 0000000000000001 +7282 clk cpu0 IT (7246) 000109c4:0000100109c4_NS 7100051f O EL1h_n : CMP w8,#1 +7282 clk cpu0 R cpsr 620003c5 +7283 clk cpu0 IT (7247) 000109c8:0000100109c8_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +7283 clk cpu0 R X8 0000000000000001 +7284 clk cpu0 IT (7248) 000109cc:0000100109cc_NS 37000088 O EL1h_n : TBNZ w8,#0,0x109dc +7285 clk cpu0 IT (7249) 000109dc:0000100109dc_NS 52800028 O EL1h_n : MOV w8,#1 +7285 clk cpu0 R X8 0000000000000001 +7286 clk cpu0 IT (7250) 000109e0:0000100109e0_NS 2a0803e0 O EL1h_n : MOV w0,w8 +7286 clk cpu0 R X0 0000000000000001 +7287 clk cpu0 IT (7251) 000109e4:0000100109e4_NS 900001e1 O EL1h_n : ADRP x1,0x4c9e4 +7287 clk cpu0 R X1 000000000004C000 +7288 clk cpu0 IT (7252) 000109e8:0000100109e8_NS 91326821 O EL1h_n : ADD x1,x1,#0xc9a +7288 clk cpu0 R X1 000000000004CC9A +7289 clk cpu0 IT (7253) 000109ec:0000100109ec_NS b90063e8 O EL1h_n : STR w8,[sp,#0x60] +7289 clk cpu0 MW4 03700680:000000f00680_NS 00000001 +7290 clk cpu0 IT (7254) 000109f0:0000100109f0_NS 94022eb7 O EL1h_n : BL 0x9c4cc +7290 clk cpu0 R X30 00000000000109F4 +7291 clk cpu0 IT (7255) 0009c4cc:00001009c4cc_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +7291 clk cpu0 R SP_EL1 0000000003700590 +7292 clk cpu0 IT (7256) 0009c4d0:00001009c4d0_NS d0030bc8 O EL1h_n : ADRP x8,0x62164d0 +7292 clk cpu0 R X8 0000000006216000 +7293 clk cpu0 IT (7257) 0009c4d4:00001009c4d4_NS b940f908 O EL1h_n : LDR w8,[x8,#0xf8] +7293 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +7293 clk cpu0 R X8 0000000000000003 +7294 clk cpu0 IT (7258) 0009c4d8:00001009c4d8_NS a90753f5 O EL1h_n : STP x21,x20,[sp,#0x70] +7294 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +7294 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +7295 clk cpu0 IT (7259) 0009c4dc:00001009c4dc_NS a9087bf3 O EL1h_n : STP x19,x30,[sp,#0x80] +7295 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +7295 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000109f4 +7296 clk cpu0 IT (7260) 0009c4e0:00001009c4e0_NS a9000fe2 O EL1h_n : STP x2,x3,[sp,#0] +7296 clk cpu0 MW8 03700590:000000f00590_NS 00000000_00000003 +7296 clk cpu0 MW8 03700598:000000f00598_NS 00000000_00000000 +7297 clk cpu0 IT (7261) 0009c4e4:00001009c4e4_NS 6b00011f O EL1h_n : CMP w8,w0 +7297 clk cpu0 R cpsr 220003c5 +7298 clk cpu0 IT (7262) 0009c4e8:00001009c4e8_NS a90117e4 O EL1h_n : STP x4,x5,[sp,#0x10] +7298 clk cpu0 MW8 037005a0:000000f005a0_NS 00000000_030293f0 +7298 clk cpu0 MW8 037005a8:000000f005a8_NS 00000000_000fffe0 +7299 clk cpu0 IT (7263) 0009c4ec:00001009c4ec_NS a9021fe6 O EL1h_n : STP x6,x7,[sp,#0x20] +7299 clk cpu0 MW8 037005b0:000000f005b0_NS e7ffe7ff_e7ffe7ff +7299 clk cpu0 MW8 037005b8:000000f005b8_NS 0001ffff_fe000000 +7300 clk cpu0 IT (7264) 0009c4f0:00001009c4f0_NS a9067fff O EL1h_n : STP xzr,xzr,[sp,#0x60] +7300 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000000 +7300 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000000 +7301 clk cpu0 IT (7265) 0009c4f4:00001009c4f4_NS a9057fff O EL1h_n : STP xzr,xzr,[sp,#0x50] +7301 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000000 +7301 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00000000 +7302 clk cpu0 IS (7266) 0009c4f8:00001009c4f8_NS 54000423 O EL1h_n : B.CC 0x9c57c +7303 clk cpu0 IT (7267) 0009c4fc:00001009c4fc_NS 90017b74 O EL1h_n : ADRP x20,0x30084fc +7303 clk cpu0 R X20 0000000003008000 +7304 clk cpu0 IT (7268) 0009c500:00001009c500_NS 9114a294 O EL1h_n : ADD x20,x20,#0x528 +7304 clk cpu0 R X20 0000000003008528 +7305 clk cpu0 IT (7269) 0009c504:00001009c504_NS aa1403e0 O EL1h_n : MOV x0,x20 +7305 clk cpu0 R X0 0000000003008528 +7306 clk cpu0 IT (7270) 0009c508:00001009c508_NS aa0103f3 O EL1h_n : MOV x19,x1 +7306 clk cpu0 R X19 000000000004CC9A +7307 clk cpu0 IT (7271) 0009c50c:00001009c50c_NS 97fff114 O EL1h_n : BL 0x9895c +7307 clk cpu0 R X30 000000000009C510 +7308 clk cpu0 IT (7272) 0009895c:00001009895c_NS d0030be8 O EL1h_n : ADRP x8,0x621695c +7308 clk cpu0 R X8 0000000006216000 +7309 clk cpu0 IT (7273) 00098960:000010098960_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +7309 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +7309 clk cpu0 R X8 0000000000000001 +7310 clk cpu0 IT (7274) 00098964:000010098964_NS 7100091f O EL1h_n : CMP w8,#2 +7310 clk cpu0 R cpsr 820003c5 +7311 clk cpu0 IT (7275) 00098968:000010098968_NS 54000043 O EL1h_n : B.CC 0x98970 +7312 clk cpu0 IT (7276) 00098970:000010098970_NS d65f03c0 O EL1h_n : RET +7313 clk cpu0 IT (7277) 0009c510:00001009c510_NS 910003e9 O EL1h_n : MOV x9,sp +7313 clk cpu0 R X9 0000000003700590 +7314 clk cpu0 IT (7278) 0009c514:00001009c514_NS 128005e8 O EL1h_n : MOV w8,#0xffffffd0 +7314 clk cpu0 R X8 00000000FFFFFFD0 +7315 clk cpu0 IT (7279) 0009c518:00001009c518_NS 910243ea O EL1h_n : ADD x10,sp,#0x90 +7315 clk cpu0 R X10 0000000003700620 +7316 clk cpu0 IT (7280) 0009c51c:00001009c51c_NS 9100c129 O EL1h_n : ADD x9,x9,#0x30 +7316 clk cpu0 R X9 00000000037005C0 +7317 clk cpu0 IT (7281) 0009c520:00001009c520_NS 2a1f03e0 O EL1h_n : MOV w0,wzr +7317 clk cpu0 R X0 0000000000000000 +7318 clk cpu0 IT (7282) 0009c524:00001009c524_NS 2a1f03e1 O EL1h_n : MOV w1,wzr +7318 clk cpu0 R X1 0000000000000000 +7319 clk cpu0 IT (7283) 0009c528:00001009c528_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +7319 clk cpu0 R X2 0000000000000000 +7320 clk cpu0 IT (7284) 0009c52c:00001009c52c_NS f90037e8 O EL1h_n : STR x8,[sp,#0x68] +7320 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_ffffffd0 +7321 clk cpu0 IT (7285) 0009c530:00001009c530_NS a90527ea O EL1h_n : STP x10,x9,[sp,#0x50] +7321 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_03700620 +7321 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_037005c0 +7322 clk cpu0 IT (7286) 0009c534:00001009c534_NS d503201f O EL1h_n : NOP +7323 clk cpu0 IT (7287) 0009c538:00001009c538_NS a945a3ea O EL1h_n : LDP x10,x8,[sp,#0x58] +7323 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_037005c0 +7323 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +7323 clk cpu0 R X8 0000000000000000 +7323 clk cpu0 R X10 00000000037005C0 +7324 clk cpu0 IT (7288) 0009c53c:00001009c53c_NS f9402be9 O EL1h_n : LDR x9,[sp,#0x50] +7324 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_03700620 +7324 clk cpu0 R X9 0000000003700620 +7325 clk cpu0 IT (7289) 0009c540:00001009c540_NS f94037eb O EL1h_n : LDR x11,[sp,#0x68] +7325 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_ffffffd0 +7325 clk cpu0 R X11 00000000FFFFFFD0 +7326 clk cpu0 IT (7290) 0009c544:00001009c544_NS 2a0003f5 O EL1h_n : MOV w21,w0 +7326 clk cpu0 R X21 0000000000000000 +7327 clk cpu0 IT (7291) 0009c548:00001009c548_NS 9100c3e1 O EL1h_n : ADD x1,sp,#0x30 +7327 clk cpu0 R X1 00000000037005C0 +7328 clk cpu0 IT (7292) 0009c54c:00001009c54c_NS aa1303e0 O EL1h_n : MOV x0,x19 +7328 clk cpu0 R X0 000000000004CC9A +7329 clk cpu0 IT (7293) 0009c550:00001009c550_NS a903a3ea O EL1h_n : STP x10,x8,[sp,#0x38] +7329 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_037005c0 +7329 clk cpu0 MW8 037005d0:000000f005d0_NS 00000000_00000000 +7330 clk cpu0 IT (7294) 0009c554:00001009c554_NS f9001be9 O EL1h_n : STR x9,[sp,#0x30] +7330 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_03700620 +7331 clk cpu0 IT (7295) 0009c558:00001009c558_NS f90027eb O EL1h_n : STR x11,[sp,#0x48] +7331 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_ffffffd0 +7332 clk cpu0 IT (7296) 0009c55c:00001009c55c_NS 97ffd97b O EL1h_n : BL 0x92b48 +7332 clk cpu0 R X30 000000000009C560 +7333 clk cpu0 IT (7297) 00092b48:000010092b48_NS d10283ff O EL1h_n : SUB sp,sp,#0xa0 +7333 clk cpu0 R SP_EL1 00000000037004F0 +7334 clk cpu0 IT (7298) 00092b4c:000010092b4c_NS a9097bf3 O EL1h_n : STP x19,x30,[sp,#0x90] +7334 clk cpu0 MW8 03700580:000000f00580_NS 00000000_0004cc9a +7334 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0009c560 +7335 clk cpu0 IT (7299) 00092b50:000010092b50_NS aa0103f3 O EL1h_n : MOV x19,x1 +7335 clk cpu0 R X19 00000000037005C0 +7336 clk cpu0 IT (7300) 00092b54:000010092b54_NS d0fffdc1 O EL1h_n : ADRP x1,0x4cb54 +7336 clk cpu0 R X1 000000000004C000 +7337 clk cpu0 IT (7301) 00092b58:000010092b58_NS a90853f5 O EL1h_n : STP x21,x20,[sp,#0x80] +7337 clk cpu0 MW8 03700570:000000f00570_NS 00000000_00000000 +7337 clk cpu0 MW8 03700578:000000f00578_NS 00000000_03008528 +7338 clk cpu0 IT (7302) 00092b5c:000010092b5c_NS aa0003f4 O EL1h_n : MOV x20,x0 +7338 clk cpu0 R X20 000000000004CC9A +7339 clk cpu0 IT (7303) 00092b60:000010092b60_NS 91002c21 O EL1h_n : ADD x1,x1,#0xb +7339 clk cpu0 R X1 000000000004C00B +7340 clk cpu0 IT (7304) 00092b64:000010092b64_NS 910013e0 O EL1h_n : ADD x0,sp,#4 +7340 clk cpu0 R X0 00000000037004F4 +7341 clk cpu0 IT (7305) 00092b68:000010092b68_NS 52800762 O EL1h_n : MOV w2,#0x3b +7341 clk cpu0 R X2 000000000000003B +7342 clk cpu0 IT (7306) 00092b6c:000010092b6c_NS f90023fc O EL1h_n : STR x28,[sp,#0x40] +7342 clk cpu0 MW8 03700530:000000f00530_NS ff7fff7f_ff7fff7f +7343 clk cpu0 IT (7307) 00092b70:000010092b70_NS a9056bfb O EL1h_n : STP x27,x26,[sp,#0x50] +7343 clk cpu0 MW8 03700540:000000f00540_NS 00010001_00010001 +7343 clk cpu0 MW8 03700548:000000f00548_NS ffe000ff_ffe000ff +7344 clk cpu0 IT (7308) 00092b74:000010092b74_NS a90663f9 O EL1h_n : STP x25,x24,[sp,#0x60] +7344 clk cpu0 MW8 03700550:000000f00550_NS 00000000_0000003c +7344 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00007c00 +7345 clk cpu0 IT (7309) 00092b78:000010092b78_NS a9075bf7 O EL1h_n : STP x23,x22,[sp,#0x70] +7345 clk cpu0 MW8 03700560:000000f00560_NS fffe0000_00003fff +7345 clk cpu0 MW8 03700568:000000f00568_NS ffffffff_fffe0003 +7346 clk cpu0 IT (7310) 00092b7c:000010092b7c_NS 97fdf655 O EL1h_n : BL 0x104d0 +7346 clk cpu0 R X30 0000000000092B80 +7347 clk cpu0 IT (7311) 000104d0:0000100104d0_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +7347 clk cpu0 MW8 037004e0:000000f004e0_NS 00000000_037005c0 +7347 clk cpu0 MW8 037004e8:000000f004e8_NS 00000000_00092b80 +7347 clk cpu0 R SP_EL1 00000000037004E0 +7348 clk cpu0 IT (7312) 000104d4:0000100104d4_NS aa0003f3 O EL1h_n : MOV x19,x0 +7348 clk cpu0 R X19 00000000037004F4 +7349 clk cpu0 IT (7313) 000104d8:0000100104d8_NS 9400002b O EL1h_n : BL 0x10584 +7349 clk cpu0 R X30 00000000000104DC +7350 clk cpu0 IT (7314) 00010584:000010010584_NS f100105f O EL1h_n : CMP x2,#4 +7350 clk cpu0 R cpsr 220003c5 +7351 clk cpu0 IS (7315) 00010588:000010010588_NS 54000643 O EL1h_n : B.CC 0x10650 +7352 clk cpu0 IT (7316) 0001058c:00001001058c_NS f240041f O EL1h_n : TST x0,#3 +7352 clk cpu0 R cpsr 420003c5 +7353 clk cpu0 IT (7317) 00010590:000010010590_NS 54000320 O EL1h_n : B.EQ 0x105f4 +7354 clk cpu0 IT (7318) 000105f4:0000100105f4_NS 7200042a O EL1h_n : ANDS w10,w1,#3 +7354 clk cpu0 R cpsr 020003c5 +7354 clk cpu0 R X10 0000000000000003 +7355 clk cpu0 IS (7319) 000105f8:0000100105f8_NS 54000440 O EL1h_n : B.EQ 0x10680 +7356 clk cpu0 IT (7320) 000105fc:0000100105fc_NS 52800409 O EL1h_n : MOV w9,#0x20 +7356 clk cpu0 R X9 0000000000000020 +7357 clk cpu0 IT (7321) 00010600:000010010600_NS cb0a0028 O EL1h_n : SUB x8,x1,x10 +7357 clk cpu0 R X8 000000000004C008 +7358 clk cpu0 IT (7322) 00010604:000010010604_NS f100105f O EL1h_n : CMP x2,#4 +7358 clk cpu0 R cpsr 220003c5 +7359 clk cpu0 IT (7323) 00010608:000010010608_NS 4b0a0d29 O EL1h_n : SUB w9,w9,w10,LSL #3 +7359 clk cpu0 R X9 0000000000000008 +7360 clk cpu0 IS (7324) 0001060c:00001001060c_NS 540001c3 O EL1h_n : B.CC 0x10644 +7361 clk cpu0 IT (7325) 00010610:000010010610_NS b940010c O EL1h_n : LDR w12,[x8,#0] +7361 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +7361 clk cpu0 R X12 000000000A00000A +7361 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070450000_NS +7361 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x00001004c000_NS +7362 clk cpu0 IT (7326) 00010614:000010010614_NS 531d714a O EL1h_n : UBFIZ w10,w10,#3,#29 +7362 clk cpu0 R X10 0000000000000018 +7363 clk cpu0 IT (7327) 00010618:000010010618_NS aa0203eb O EL1h_n : MOV x11,x2 +7363 clk cpu0 R X11 000000000000003B +7364 clk cpu0 IT (7328) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7364 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +7364 clk cpu0 R X8 000000000004C00C +7364 clk cpu0 R X13 000000006F727245 +7365 clk cpu0 IT (7329) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7365 clk cpu0 R X12 000000000000000A +7366 clk cpu0 IT (7330) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7366 clk cpu0 R X11 0000000000000037 +7367 clk cpu0 IT (7331) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7367 clk cpu0 R cpsr 220003c5 +7368 clk cpu0 IT (7332) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7368 clk cpu0 R X14 0000000072724500 +7369 clk cpu0 IT (7333) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7369 clk cpu0 R X12 000000007272450A +7370 clk cpu0 IT (7334) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7370 clk cpu0 MW4 037004f4:000000f004f4_NS 7272450a +7370 clk cpu0 R X0 00000000037004F8 +7371 clk cpu0 IT (7335) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7371 clk cpu0 R X12 000000006F727245 +7372 clk cpu0 IT (7336) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7373 clk cpu0 IT (7337) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7373 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +7373 clk cpu0 R X8 000000000004C010 +7373 clk cpu0 R X13 0000000049203A72 +7374 clk cpu0 IT (7338) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7374 clk cpu0 R X12 000000000000006F +7375 clk cpu0 IT (7339) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7375 clk cpu0 R X11 0000000000000033 +7376 clk cpu0 IT (7340) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7376 clk cpu0 R cpsr 220003c5 +7377 clk cpu0 IT (7341) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7377 clk cpu0 R X14 00000000203A7200 +7378 clk cpu0 IT (7342) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7378 clk cpu0 R X12 00000000203A726F +7379 clk cpu0 IT (7343) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7379 clk cpu0 MW4 037004f8:000000f004f8_NS 203a726f +7379 clk cpu0 R X0 00000000037004FC +7380 clk cpu0 IT (7344) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7380 clk cpu0 R X12 0000000049203A72 +7381 clk cpu0 IT (7345) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7382 clk cpu0 IT (7346) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7382 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +7382 clk cpu0 R X8 000000000004C014 +7382 clk cpu0 R X13 0000000067656C6C +7383 clk cpu0 IT (7347) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7383 clk cpu0 R X12 0000000000000049 +7384 clk cpu0 IT (7348) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7384 clk cpu0 R X11 000000000000002F +7385 clk cpu0 IT (7349) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7385 clk cpu0 R cpsr 220003c5 +7386 clk cpu0 IT (7350) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7386 clk cpu0 R X14 00000000656C6C00 +7387 clk cpu0 IT (7351) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7387 clk cpu0 R X12 00000000656C6C49 +7388 clk cpu0 IT (7352) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7388 clk cpu0 MW4 037004fc:000000f004fc_NS 656c6c49 +7388 clk cpu0 R X0 0000000003700500 +7389 clk cpu0 IT (7353) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7389 clk cpu0 R X12 0000000067656C6C +7390 clk cpu0 IT (7354) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7391 clk cpu0 IT (7355) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7391 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +7391 clk cpu0 R X8 000000000004C018 +7391 clk cpu0 R X13 0000000066206C61 +7392 clk cpu0 IT (7356) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7392 clk cpu0 R X12 0000000000000067 +7393 clk cpu0 IT (7357) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7393 clk cpu0 R X11 000000000000002B +7394 clk cpu0 IT (7358) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7394 clk cpu0 R cpsr 220003c5 +7395 clk cpu0 IT (7359) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7395 clk cpu0 R X14 00000000206C6100 +7396 clk cpu0 IT (7360) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7396 clk cpu0 R X12 00000000206C6167 +7397 clk cpu0 IT (7361) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7397 clk cpu0 MW4 03700500:000000f00500_NS 206c6167 +7397 clk cpu0 R X0 0000000003700504 +7398 clk cpu0 IT (7362) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7398 clk cpu0 R X12 0000000066206C61 +7399 clk cpu0 IT (7363) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7400 clk cpu0 IT (7364) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7400 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +7400 clk cpu0 R X8 000000000004C01C +7400 clk cpu0 R X13 00000000616D726F +7401 clk cpu0 IT (7365) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7401 clk cpu0 R X12 0000000000000066 +7402 clk cpu0 IT (7366) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7402 clk cpu0 R X11 0000000000000027 +7403 clk cpu0 IT (7367) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7403 clk cpu0 R cpsr 220003c5 +7404 clk cpu0 IT (7368) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7404 clk cpu0 R X14 000000006D726F00 +7405 clk cpu0 IT (7369) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7405 clk cpu0 R X12 000000006D726F66 +7406 clk cpu0 IT (7370) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7406 clk cpu0 MW4 03700504:000000f00504_NS 6d726f66 +7406 clk cpu0 R X0 0000000003700508 +7407 clk cpu0 IT (7371) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7407 clk cpu0 R X12 00000000616D726F +7408 clk cpu0 IT (7372) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7409 clk cpu0 IT (7373) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7409 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +7409 clk cpu0 R X8 000000000004C020 +7409 clk cpu0 R X13 0000000070732074 +7410 clk cpu0 IT (7374) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7410 clk cpu0 R X12 0000000000000061 +7411 clk cpu0 IT (7375) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7411 clk cpu0 R X11 0000000000000023 +7412 clk cpu0 IT (7376) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7412 clk cpu0 R cpsr 220003c5 +7413 clk cpu0 IT (7377) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7413 clk cpu0 R X14 0000000073207400 +7414 clk cpu0 IT (7378) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7414 clk cpu0 R X12 0000000073207461 +7415 clk cpu0 IT (7379) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7415 clk cpu0 MW4 03700508:000000f00508_NS 73207461 +7415 clk cpu0 R X0 000000000370050C +7416 clk cpu0 IT (7380) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7416 clk cpu0 R X12 0000000070732074 +7417 clk cpu0 IT (7381) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7418 clk cpu0 IT (7382) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7418 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +7418 clk cpu0 R X8 000000000004C024 +7418 clk cpu0 R X13 0000000066696365 +7419 clk cpu0 IT (7383) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7419 clk cpu0 R X12 0000000000000070 +7420 clk cpu0 IT (7384) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7420 clk cpu0 R X11 000000000000001F +7421 clk cpu0 IT (7385) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7421 clk cpu0 R cpsr 220003c5 +7422 clk cpu0 IT (7386) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7422 clk cpu0 R X14 0000000069636500 +7423 clk cpu0 IT (7387) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7423 clk cpu0 R X12 0000000069636570 +7424 clk cpu0 IT (7388) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7424 clk cpu0 MW4 0370050c:000000f0050c_NS 69636570 +7424 clk cpu0 R X0 0000000003700510 +7425 clk cpu0 IT (7389) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7425 clk cpu0 R X12 0000000066696365 +7426 clk cpu0 IT (7390) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7427 clk cpu0 IT (7391) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7427 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +7427 clk cpu0 R X8 000000000004C028 +7427 clk cpu0 R X13 0000000020726569 +7428 clk cpu0 IT (7392) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7428 clk cpu0 R X12 0000000000000066 +7429 clk cpu0 IT (7393) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7429 clk cpu0 R X11 000000000000001B +7430 clk cpu0 IT (7394) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7430 clk cpu0 R cpsr 220003c5 +7431 clk cpu0 IT (7395) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7431 clk cpu0 R X14 0000000072656900 +7432 clk cpu0 IT (7396) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7432 clk cpu0 R X12 0000000072656966 +7433 clk cpu0 IT (7397) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7433 clk cpu0 MW4 03700510:000000f00510_NS 72656966 +7433 clk cpu0 R X0 0000000003700514 +7434 clk cpu0 IT (7398) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7434 clk cpu0 R X12 0000000020726569 +7435 clk cpu0 IT (7399) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7436 clk cpu0 IT (7400) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7436 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +7436 clk cpu0 R X8 000000000004C02C +7436 clk cpu0 R X13 0000000064657375 +7437 clk cpu0 IT (7401) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7437 clk cpu0 R X12 0000000000000020 +7438 clk cpu0 IT (7402) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7438 clk cpu0 R X11 0000000000000017 +7439 clk cpu0 IT (7403) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7439 clk cpu0 R cpsr 220003c5 +7440 clk cpu0 IT (7404) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7440 clk cpu0 R X14 0000000065737500 +7441 clk cpu0 IT (7405) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7441 clk cpu0 R X12 0000000065737520 +7442 clk cpu0 IT (7406) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7442 clk cpu0 MW4 03700514:000000f00514_NS 65737520 +7442 clk cpu0 R X0 0000000003700518 +7443 clk cpu0 IT (7407) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7443 clk cpu0 R X12 0000000064657375 +7444 clk cpu0 IT (7408) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7445 clk cpu0 IT (7409) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7445 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +7445 clk cpu0 R X8 000000000004C030 +7445 clk cpu0 R X13 000000005F27203A +7446 clk cpu0 IT (7410) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7446 clk cpu0 R X12 0000000000000064 +7447 clk cpu0 IT (7411) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7447 clk cpu0 R X11 0000000000000013 +7448 clk cpu0 IT (7412) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7448 clk cpu0 R cpsr 220003c5 +7449 clk cpu0 IT (7413) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7449 clk cpu0 R X14 0000000027203A00 +7450 clk cpu0 IT (7414) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7450 clk cpu0 R X12 0000000027203A64 +7451 clk cpu0 IT (7415) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7451 clk cpu0 MW4 03700518:000000f00518_NS 27203a64 +7451 clk cpu0 R X0 000000000370051C +7452 clk cpu0 IT (7416) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7452 clk cpu0 R X12 000000005F27203A +7453 clk cpu0 IT (7417) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7454 clk cpu0 IT (7418) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7454 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +7454 clk cpu0 R X8 000000000004C034 +7454 clk cpu0 R X13 0000000045202E27 +7455 clk cpu0 IT (7419) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7455 clk cpu0 R X12 000000000000005F +7456 clk cpu0 IT (7420) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7456 clk cpu0 R X11 000000000000000F +7457 clk cpu0 IT (7421) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7457 clk cpu0 R cpsr 220003c5 +7458 clk cpu0 IT (7422) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7458 clk cpu0 R X14 00000000202E2700 +7459 clk cpu0 IT (7423) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7459 clk cpu0 R X12 00000000202E275F +7460 clk cpu0 IT (7424) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7460 clk cpu0 MW4 0370051c:000000f0051c_NS 202e275f +7460 clk cpu0 R X0 0000000003700520 +7461 clk cpu0 IT (7425) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7461 clk cpu0 R X12 0000000045202E27 +7462 clk cpu0 IT (7426) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7463 clk cpu0 IT (7427) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7463 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +7463 clk cpu0 R X8 000000000004C038 +7463 clk cpu0 R X13 000000006E69646E +7464 clk cpu0 IT (7428) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7464 clk cpu0 R X12 0000000000000045 +7465 clk cpu0 IT (7429) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7465 clk cpu0 R X11 000000000000000B +7466 clk cpu0 IT (7430) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7466 clk cpu0 R cpsr 220003c5 +7467 clk cpu0 IT (7431) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7467 clk cpu0 R X14 0000000069646E00 +7468 clk cpu0 IT (7432) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7468 clk cpu0 R X12 0000000069646E45 +7469 clk cpu0 IT (7433) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7469 clk cpu0 MW4 03700520:000000f00520_NS 69646e45 +7469 clk cpu0 R X0 0000000003700524 +7470 clk cpu0 IT (7434) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7470 clk cpu0 R X12 000000006E69646E +7471 clk cpu0 IT (7435) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7472 clk cpu0 IT (7436) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7472 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +7472 clk cpu0 R X8 000000000004C03C +7472 clk cpu0 R X13 0000000065542067 +7473 clk cpu0 IT (7437) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7473 clk cpu0 R X12 000000000000006E +7474 clk cpu0 IT (7438) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7474 clk cpu0 R X11 0000000000000007 +7475 clk cpu0 IT (7439) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7475 clk cpu0 R cpsr 220003c5 +7476 clk cpu0 IT (7440) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7476 clk cpu0 R X14 0000000054206700 +7477 clk cpu0 IT (7441) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7477 clk cpu0 R X12 000000005420676E +7478 clk cpu0 IT (7442) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7478 clk cpu0 MW4 03700524:000000f00524_NS 5420676e +7478 clk cpu0 R X0 0000000003700528 +7479 clk cpu0 IT (7443) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7479 clk cpu0 R X12 0000000065542067 +7480 clk cpu0 IT (7444) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7481 clk cpu0 IT (7445) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +7481 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +7481 clk cpu0 R X8 000000000004C040 +7481 clk cpu0 R X13 000000000A2E7473 +7482 clk cpu0 IT (7446) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +7482 clk cpu0 R X12 0000000000000065 +7483 clk cpu0 IT (7447) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +7483 clk cpu0 R X11 0000000000000003 +7484 clk cpu0 IT (7448) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +7484 clk cpu0 R cpsr 620003c5 +7485 clk cpu0 IT (7449) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +7485 clk cpu0 R X14 000000002E747300 +7486 clk cpu0 IT (7450) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +7486 clk cpu0 R X12 000000002E747365 +7487 clk cpu0 IT (7451) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +7487 clk cpu0 MW4 03700528:000000f00528_NS 2e747365 +7487 clk cpu0 R X0 000000000370052C +7488 clk cpu0 IT (7452) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +7488 clk cpu0 R X12 000000000A2E7473 +7489 clk cpu0 IS (7453) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +7490 clk cpu0 IT (7454) 00010640:000010010640_NS 92400442 O EL1h_n : AND x2,x2,#3 +7490 clk cpu0 R X2 0000000000000003 +7491 clk cpu0 IT (7455) 00010644:000010010644_NS 53037d29 O EL1h_n : LSR w9,w9,#3 +7491 clk cpu0 R X9 0000000000000001 +7492 clk cpu0 IT (7456) 00010648:000010010648_NS cb090108 O EL1h_n : SUB x8,x8,x9 +7492 clk cpu0 R X8 000000000004C03F +7493 clk cpu0 IT (7457) 0001064c:00001001064c_NS 91001101 O EL1h_n : ADD x1,x8,#4 +7493 clk cpu0 R X1 000000000004C043 +7494 clk cpu0 IT (7458) 00010650:000010010650_NS 7100045f O EL1h_n : CMP w2,#1 +7494 clk cpu0 R cpsr 220003c5 +7495 clk cpu0 IS (7459) 00010654:000010010654_NS 5400014b O EL1h_n : B.LT 0x1067c +7496 clk cpu0 IT (7460) 00010658:000010010658_NS 39400028 O EL1h_n : LDRB w8,[x1,#0] +7496 clk cpu0 MR1 0004c043:00001004c043_NS 0a +7496 clk cpu0 R X8 000000000000000A +7497 clk cpu0 IT (7461) 0001065c:00001001065c_NS 39000008 O EL1h_n : STRB w8,[x0,#0] +7497 clk cpu0 MW1 0370052c:000000f0052c_NS 0a +7498 clk cpu0 IS (7462) 00010660:000010010660_NS 540000e0 O EL1h_n : B.EQ 0x1067c +7499 clk cpu0 IT (7463) 00010664:000010010664_NS 39400428 O EL1h_n : LDRB w8,[x1,#1] +7499 clk cpu0 MR1 0004c044:00001004c044_NS 00 +7499 clk cpu0 R X8 0000000000000000 +7500 clk cpu0 IT (7464) 00010668:000010010668_NS 71000c5f O EL1h_n : CMP w2,#3 +7500 clk cpu0 R cpsr 620003c5 +7501 clk cpu0 IT (7465) 0001066c:00001001066c_NS 39000408 O EL1h_n : STRB w8,[x0,#1] +7501 clk cpu0 MW1 0370052d:000000f0052d_NS 00 +7502 clk cpu0 IS (7466) 00010670:000010010670_NS 5400006b O EL1h_n : B.LT 0x1067c +7503 clk cpu0 IT (7467) 00010674:000010010674_NS 39400828 O EL1h_n : LDRB w8,[x1,#2] +7503 clk cpu0 MR1 0004c045:00001004c045_NS 00 +7503 clk cpu0 R X8 0000000000000000 +7504 clk cpu0 IT (7468) 00010678:000010010678_NS 39000808 O EL1h_n : STRB w8,[x0,#2] +7504 clk cpu0 MW1 0370052e:000000f0052e_NS 00 +7505 clk cpu0 IT (7469) 0001067c:00001001067c_NS d65f03c0 O EL1h_n : RET +7506 clk cpu0 IT (7470) 000104dc:0000100104dc_NS aa1303e0 O EL1h_n : MOV x0,x19 +7506 clk cpu0 R X0 00000000037004F4 +7507 clk cpu0 IT (7471) 000104e0:0000100104e0_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +7507 clk cpu0 MR8 037004e0:000000f004e0_NS 00000000_037005c0 +7507 clk cpu0 MR8 037004e8:000000f004e8_NS 00000000_00092b80 +7507 clk cpu0 R SP_EL1 00000000037004F0 +7507 clk cpu0 R X19 00000000037005C0 +7507 clk cpu0 R X30 0000000000092B80 +7508 clk cpu0 IT (7472) 000104e4:0000100104e4_NS d65f03c0 O EL1h_n : RET +7509 clk cpu0 IT (7473) 00092b80:000010092b80_NS d0fffdd6 O EL1h_n : ADRP x22,0x4cb80 +7509 clk cpu0 R X22 000000000004C000 +7510 clk cpu0 IT (7474) 00092b84:000010092b84_NS d0fffdd7 O EL1h_n : ADRP x23,0x4cb84 +7510 clk cpu0 R X23 000000000004C000 +7511 clk cpu0 IT (7475) 00092b88:000010092b88_NS 2a1f03fa O EL1h_n : MOV w26,wzr +7511 clk cpu0 R X26 0000000000000000 +7512 clk cpu0 IT (7476) 00092b8c:000010092b8c_NS f0017cb5 O EL1h_n : ADRP x21,0x3029b8c +7512 clk cpu0 R X21 0000000003029000 +7513 clk cpu0 IT (7477) 00092b90:000010092b90_NS 910422d6 O EL1h_n : ADD x22,x22,#0x108 +7513 clk cpu0 R X22 000000000004C108 +7514 clk cpu0 IT (7478) 00092b94:000010092b94_NS 9104a6f7 O EL1h_n : ADD x23,x23,#0x129 +7514 clk cpu0 R X23 000000000004C129 +7515 clk cpu0 IT (7479) 00092b98:000010092b98_NS f0017d78 O EL1h_n : ADRP x24,0x3041b98 +7515 clk cpu0 R X24 0000000003041000 +7516 clk cpu0 IT (7480) 00092b9c:000010092b9c_NS 90030c39 O EL1h_n : ADRP x25,0x6216b9c +7516 clk cpu0 R X25 0000000006216000 +7517 clk cpu0 IT (7481) 00092ba0:000010092ba0_NS 14000005 O EL1h_n : B 0x92bb4 +7518 clk cpu0 IT (7482) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7518 clk cpu0 MR1 0004cc9a:00001004cc9a_NS 65 +7518 clk cpu0 R X8 0000000000000065 +7518 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0064 ALLOC 0x00001004cc80_NS +7518 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1320 ALLOC 0x00001004cc80_NS +7519 clk cpu0 IT (7483) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7519 clk cpu0 R cpsr 220003c5 +7520 clk cpu0 IS (7484) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7521 clk cpu0 IS (7485) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7522 clk cpu0 IT (7486) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +7522 clk cpu0 R cpsr 020003c5 +7523 clk cpu0 IT (7487) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +7524 clk cpu0 IT (7488) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7524 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7524 clk cpu0 R X9 0000000013000000 +7525 clk cpu0 IT (7489) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +7525 clk cpu0 R X27 000000000004CC9A +7526 clk cpu0 IT (7490) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +7526 clk cpu0 R X20 000000000004CC9B +7527 clk cpu0 IT (7491) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +7527 clk cpu0 MW1 13000000:000013000000_NS 65 +7528 clk cpu0 IT (7492) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7528 clk cpu0 MR1 0004cc9b:00001004cc9b_NS 6e +7528 clk cpu0 R X8 000000000000006E +7529 clk cpu0 IT (7493) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7529 clk cpu0 R cpsr 220003c5 +7530 clk cpu0 IS (7494) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7531 clk cpu0 IS (7495) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7532 clk cpu0 IT (7496) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +7532 clk cpu0 R cpsr 020003c5 +7533 clk cpu0 IT (7497) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +7534 clk cpu0 IT (7498) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7534 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7534 clk cpu0 R X9 0000000013000000 +7535 clk cpu0 IT (7499) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +7535 clk cpu0 R X27 000000000004CC9B +7536 clk cpu0 IT (7500) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +7536 clk cpu0 R X20 000000000004CC9C +7537 clk cpu0 IT (7501) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +7537 clk cpu0 MW1 13000000:000013000000_NS 6e +7538 clk cpu0 IT (7502) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7538 clk cpu0 MR1 0004cc9c:00001004cc9c_NS 61 +7538 clk cpu0 R X8 0000000000000061 +7539 clk cpu0 IT (7503) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7539 clk cpu0 R cpsr 220003c5 +7540 clk cpu0 IS (7504) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7541 clk cpu0 IS (7505) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7542 clk cpu0 IT (7506) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +7542 clk cpu0 R cpsr 020003c5 +7543 clk cpu0 IT (7507) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +7544 clk cpu0 IT (7508) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7544 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7544 clk cpu0 R X9 0000000013000000 +7545 clk cpu0 IT (7509) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +7545 clk cpu0 R X27 000000000004CC9C +7546 clk cpu0 IT (7510) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +7546 clk cpu0 R X20 000000000004CC9D +7547 clk cpu0 IT (7511) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +7547 clk cpu0 MW1 13000000:000013000000_NS 61 +7548 clk cpu0 IT (7512) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7548 clk cpu0 MR1 0004cc9d:00001004cc9d_NS 62 +7548 clk cpu0 R X8 0000000000000062 +7549 clk cpu0 IT (7513) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7549 clk cpu0 R cpsr 220003c5 +7550 clk cpu0 IS (7514) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7551 clk cpu0 IS (7515) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7552 clk cpu0 IT (7516) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +7552 clk cpu0 R cpsr 020003c5 +7553 clk cpu0 IT (7517) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +7554 clk cpu0 IT (7518) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7554 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7554 clk cpu0 R X9 0000000013000000 +7555 clk cpu0 IT (7519) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +7555 clk cpu0 R X27 000000000004CC9D +7556 clk cpu0 IT (7520) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +7556 clk cpu0 R X20 000000000004CC9E +7557 clk cpu0 IT (7521) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +7557 clk cpu0 MW1 13000000:000013000000_NS 62 +7558 clk cpu0 IT (7522) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7558 clk cpu0 MR1 0004cc9e:00001004cc9e_NS 6c +7558 clk cpu0 R X8 000000000000006C +7559 clk cpu0 IT (7523) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7559 clk cpu0 R cpsr 220003c5 +7560 clk cpu0 IS (7524) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7561 clk cpu0 IS (7525) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7562 clk cpu0 IT (7526) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +7562 clk cpu0 R cpsr 020003c5 +7563 clk cpu0 IT (7527) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +7564 clk cpu0 IT (7528) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7564 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7564 clk cpu0 R X9 0000000013000000 +7565 clk cpu0 IT (7529) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +7565 clk cpu0 R X27 000000000004CC9E +7566 clk cpu0 IT (7530) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +7566 clk cpu0 R X20 000000000004CC9F +7567 clk cpu0 IT (7531) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +7567 clk cpu0 MW1 13000000:000013000000_NS 6c +7568 clk cpu0 IT (7532) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7568 clk cpu0 MR1 0004cc9f:00001004cc9f_NS 65 +7568 clk cpu0 R X8 0000000000000065 +7569 clk cpu0 IT (7533) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7569 clk cpu0 R cpsr 220003c5 +7570 clk cpu0 IS (7534) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7571 clk cpu0 IS (7535) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7572 clk cpu0 IT (7536) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +7572 clk cpu0 R cpsr 020003c5 +7573 clk cpu0 IT (7537) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +7574 clk cpu0 IT (7538) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7574 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7574 clk cpu0 R X9 0000000013000000 +7575 clk cpu0 IT (7539) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +7575 clk cpu0 R X27 000000000004CC9F +7576 clk cpu0 IT (7540) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +7576 clk cpu0 R X20 000000000004CCA0 +7577 clk cpu0 IT (7541) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +7577 clk cpu0 MW1 13000000:000013000000_NS 65 +7578 clk cpu0 IT (7542) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7578 clk cpu0 MR1 0004cca0:00001004cca0_NS 64 +7578 clk cpu0 R X8 0000000000000064 +7579 clk cpu0 IT (7543) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7579 clk cpu0 R cpsr 220003c5 +7580 clk cpu0 IS (7544) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7581 clk cpu0 IS (7545) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7582 clk cpu0 IT (7546) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +7582 clk cpu0 R cpsr 420003c5 +7583 clk cpu0 IS (7547) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +7584 clk cpu0 IT (7548) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +7584 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +7584 clk cpu0 R X8 0000000000000000 +7585 clk cpu0 IT (7549) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +7585 clk cpu0 MR8 0004cca0:00001004cca0_NS 2e656361_72742064 +7585 clk cpu0 R X0 2E65636172742064 +7586 clk cpu0 IT (7550) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +7586 clk cpu0 R cpsr 820003c5 +7587 clk cpu0 IT (7551) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +7588 clk cpu0 IT (7552) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +7588 clk cpu0 R X27 0000000000000000 +7589 clk cpu0 IT (7553) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +7589 clk cpu0 R X28 000000000004CCA0 +7590 clk cpu0 IT (7554) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +7590 clk cpu0 R X8 00000000FFFFFFF8 +7591 clk cpu0 IT (7555) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7591 clk cpu0 R cpsr 020003c5 +7591 clk cpu0 R X9 0000000000000064 +7592 clk cpu0 IS (7556) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7593 clk cpu0 IT (7557) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7593 clk cpu0 R cpsr 220003c5 +7594 clk cpu0 IS (7558) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7595 clk cpu0 IT (7559) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7595 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7595 clk cpu0 R X9 0000000013000000 +7596 clk cpu0 IT (7560) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7596 clk cpu0 R cpsr 820003c5 +7596 clk cpu0 R X8 00000000FFFFFFF9 +7597 clk cpu0 IT (7561) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7597 clk cpu0 MW1 13000000:000013000000_NS 64 +7598 clk cpu0 IT (7562) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7598 clk cpu0 R X0 002E656361727420 +7599 clk cpu0 IT (7563) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7600 clk cpu0 IT (7564) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7600 clk cpu0 R cpsr 020003c5 +7600 clk cpu0 R X9 0000000000000020 +7601 clk cpu0 IS (7565) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7602 clk cpu0 IT (7566) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7602 clk cpu0 R cpsr 820003c5 +7603 clk cpu0 IS (7567) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7604 clk cpu0 IT (7568) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7604 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7604 clk cpu0 R X9 0000000013000000 +7605 clk cpu0 IT (7569) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7605 clk cpu0 R cpsr 820003c5 +7605 clk cpu0 R X8 00000000FFFFFFFA +7606 clk cpu0 IT (7570) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7606 clk cpu0 MW1 13000000:000013000000_NS 20 +7607 clk cpu0 IT (7571) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7607 clk cpu0 R X0 00002E6563617274 +7608 clk cpu0 IT (7572) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7609 clk cpu0 IT (7573) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7609 clk cpu0 R cpsr 020003c5 +7609 clk cpu0 R X9 0000000000000074 +7610 clk cpu0 IS (7574) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7611 clk cpu0 IT (7575) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7611 clk cpu0 R cpsr 220003c5 +7612 clk cpu0 IS (7576) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7613 clk cpu0 IT (7577) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7613 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7613 clk cpu0 R X9 0000000013000000 +7614 clk cpu0 IT (7578) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7614 clk cpu0 R cpsr 820003c5 +7614 clk cpu0 R X8 00000000FFFFFFFB +7615 clk cpu0 IT (7579) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7615 clk cpu0 MW1 13000000:000013000000_NS 74 +7616 clk cpu0 IT (7580) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7616 clk cpu0 R X0 0000002E65636172 +7617 clk cpu0 IT (7581) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7618 clk cpu0 IT (7582) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7618 clk cpu0 R cpsr 020003c5 +7618 clk cpu0 R X9 0000000000000072 +7619 clk cpu0 IS (7583) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7620 clk cpu0 IT (7584) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7620 clk cpu0 R cpsr 220003c5 +7621 clk cpu0 IS (7585) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7622 clk cpu0 IT (7586) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7622 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7622 clk cpu0 R X9 0000000013000000 +7623 clk cpu0 IT (7587) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7623 clk cpu0 R cpsr 820003c5 +7623 clk cpu0 R X8 00000000FFFFFFFC +7624 clk cpu0 IT (7588) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7624 clk cpu0 MW1 13000000:000013000000_NS 72 +7625 clk cpu0 IT (7589) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7625 clk cpu0 R X0 000000002E656361 +7626 clk cpu0 IT (7590) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7627 clk cpu0 IT (7591) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7627 clk cpu0 R cpsr 020003c5 +7627 clk cpu0 R X9 0000000000000061 +7628 clk cpu0 IS (7592) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7629 clk cpu0 IT (7593) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7629 clk cpu0 R cpsr 220003c5 +7630 clk cpu0 IS (7594) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7631 clk cpu0 IT (7595) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7631 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7631 clk cpu0 R X9 0000000013000000 +7632 clk cpu0 IT (7596) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7632 clk cpu0 R cpsr 820003c5 +7632 clk cpu0 R X8 00000000FFFFFFFD +7633 clk cpu0 IT (7597) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7633 clk cpu0 MW1 13000000:000013000000_NS 61 +7634 clk cpu0 IT (7598) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7634 clk cpu0 R X0 00000000002E6563 +7635 clk cpu0 IT (7599) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7636 clk cpu0 IT (7600) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7636 clk cpu0 R cpsr 020003c5 +7636 clk cpu0 R X9 0000000000000063 +7637 clk cpu0 IS (7601) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7638 clk cpu0 IT (7602) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7638 clk cpu0 R cpsr 220003c5 +7639 clk cpu0 IS (7603) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7640 clk cpu0 IT (7604) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7640 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7640 clk cpu0 R X9 0000000013000000 +7641 clk cpu0 IT (7605) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7641 clk cpu0 R cpsr 820003c5 +7641 clk cpu0 R X8 00000000FFFFFFFE +7642 clk cpu0 IT (7606) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7642 clk cpu0 MW1 13000000:000013000000_NS 63 +7643 clk cpu0 IT (7607) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7643 clk cpu0 R X0 0000000000002E65 +7644 clk cpu0 IT (7608) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7645 clk cpu0 IT (7609) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7645 clk cpu0 R cpsr 020003c5 +7645 clk cpu0 R X9 0000000000000065 +7646 clk cpu0 IS (7610) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7647 clk cpu0 IT (7611) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7647 clk cpu0 R cpsr 220003c5 +7648 clk cpu0 IS (7612) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7649 clk cpu0 IT (7613) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7649 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7649 clk cpu0 R X9 0000000013000000 +7650 clk cpu0 IT (7614) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7650 clk cpu0 R cpsr 820003c5 +7650 clk cpu0 R X8 00000000FFFFFFFF +7651 clk cpu0 IT (7615) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7651 clk cpu0 MW1 13000000:000013000000_NS 65 +7652 clk cpu0 IT (7616) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7652 clk cpu0 R X0 000000000000002E +7653 clk cpu0 IT (7617) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7654 clk cpu0 IT (7618) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7654 clk cpu0 R cpsr 020003c5 +7654 clk cpu0 R X9 000000000000002E +7655 clk cpu0 IS (7619) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7656 clk cpu0 IT (7620) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7656 clk cpu0 R cpsr 220003c5 +7657 clk cpu0 IS (7621) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7658 clk cpu0 IT (7622) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7658 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7658 clk cpu0 R X9 0000000013000000 +7659 clk cpu0 IT (7623) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7659 clk cpu0 R cpsr 620003c5 +7659 clk cpu0 R X8 0000000000000000 +7660 clk cpu0 IT (7624) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7660 clk cpu0 MW1 13000000:000013000000_NS 2e +7661 clk cpu0 IT (7625) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7661 clk cpu0 R X0 0000000000000000 +7662 clk cpu0 IS (7626) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7663 clk cpu0 IT (7627) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +7663 clk cpu0 MR8 0004cca8:00001004cca8_NS 6c626173_6964000a +7663 clk cpu0 R X0 6C6261736964000A +7663 clk cpu0 R X28 000000000004CCA8 +7664 clk cpu0 IT (7628) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +7664 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +7664 clk cpu0 R X9 0000000000000000 +7665 clk cpu0 IT (7629) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +7665 clk cpu0 R X8 0000000000000000 +7666 clk cpu0 IT (7630) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +7666 clk cpu0 R X27 0000000000000008 +7667 clk cpu0 IT (7631) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +7667 clk cpu0 R cpsr 820003c5 +7668 clk cpu0 IT (7632) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +7669 clk cpu0 IT (7633) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +7669 clk cpu0 R X8 00000000FFFFFFF8 +7670 clk cpu0 IT (7634) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7670 clk cpu0 R cpsr 020003c5 +7670 clk cpu0 R X9 000000000000000A +7671 clk cpu0 IS (7635) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7672 clk cpu0 IT (7636) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +7672 clk cpu0 R cpsr 820003c5 +7673 clk cpu0 IS (7637) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +7674 clk cpu0 IT (7638) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +7674 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +7674 clk cpu0 R X9 0000000013000000 +7675 clk cpu0 IT (7639) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +7675 clk cpu0 R cpsr 820003c5 +7675 clk cpu0 R X8 00000000FFFFFFF9 +TUBE CPU0: enabled trace. +7676 clk cpu0 IT (7640) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +7676 clk cpu0 MW1 13000000:000013000000_NS 0a +7677 clk cpu0 IT (7641) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +7677 clk cpu0 R X0 006C626173696400 +7678 clk cpu0 IT (7642) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +7679 clk cpu0 IT (7643) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +7679 clk cpu0 R cpsr 420003c5 +7679 clk cpu0 R X9 0000000000000000 +7680 clk cpu0 IT (7644) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +7681 clk cpu0 IT (7645) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +7681 clk cpu0 R X8 0000000000000001 +7682 clk cpu0 IT (7646) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +7682 clk cpu0 R X9 0000000000000008 +7683 clk cpu0 IT (7647) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +7683 clk cpu0 R X9 000000000004CCA8 +7684 clk cpu0 IT (7648) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +7684 clk cpu0 R cpsr 020003c5 +7685 clk cpu0 IT (7649) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +7685 clk cpu0 R X27 000000000004CCA8 +7686 clk cpu0 IT (7650) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +7686 clk cpu0 R X20 000000000004CCA9 +7687 clk cpu0 IT (7651) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +7688 clk cpu0 IT (7652) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +7688 clk cpu0 MR1 0004cca9:00001004cca9_NS 00 +7688 clk cpu0 R X8 0000000000000000 +7689 clk cpu0 IT (7653) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +7689 clk cpu0 R cpsr 820003c5 +7690 clk cpu0 IS (7654) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +7691 clk cpu0 IT (7655) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +7692 clk cpu0 IT (7656) 00092f98:000010092f98_NS d5033f9f O EL1h_n : DSB SY +7693 clk cpu0 IT (7657) 00092f9c:000010092f9c_NS a9497bf3 O EL1h_n : LDP x19,x30,[sp,#0x90] +7693 clk cpu0 MR8 03700580:000000f00580_NS 00000000_0004cc9a +7693 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0009c560 +7693 clk cpu0 R X19 000000000004CC9A +7693 clk cpu0 R X30 000000000009C560 +7694 clk cpu0 IT (7658) 00092fa0:000010092fa0_NS a94853f5 O EL1h_n : LDP x21,x20,[sp,#0x80] +7694 clk cpu0 MR8 03700570:000000f00570_NS 00000000_00000000 +7694 clk cpu0 MR8 03700578:000000f00578_NS 00000000_03008528 +7694 clk cpu0 R X20 0000000003008528 +7694 clk cpu0 R X21 0000000000000000 +7695 clk cpu0 IT (7659) 00092fa4:000010092fa4_NS a9475bf7 O EL1h_n : LDP x23,x22,[sp,#0x70] +7695 clk cpu0 MR8 03700560:000000f00560_NS fffe0000_00003fff +7695 clk cpu0 MR8 03700568:000000f00568_NS ffffffff_fffe0003 +7695 clk cpu0 R X22 FFFFFFFFFFFE0003 +7695 clk cpu0 R X23 FFFE000000003FFF +7696 clk cpu0 IT (7660) 00092fa8:000010092fa8_NS a94663f9 O EL1h_n : LDP x25,x24,[sp,#0x60] +7696 clk cpu0 MR8 03700550:000000f00550_NS 00000000_0000003c +7696 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00007c00 +7696 clk cpu0 R X24 0000000000007C00 +7696 clk cpu0 R X25 000000000000003C +7697 clk cpu0 IT (7661) 00092fac:000010092fac_NS a9456bfb O EL1h_n : LDP x27,x26,[sp,#0x50] +7697 clk cpu0 MR8 03700540:000000f00540_NS 00010001_00010001 +7697 clk cpu0 MR8 03700548:000000f00548_NS ffe000ff_ffe000ff +7697 clk cpu0 R X26 FFE000FFFFE000FF +7697 clk cpu0 R X27 0001000100010001 +7698 clk cpu0 IT (7662) 00092fb0:000010092fb0_NS f94023fc O EL1h_n : LDR x28,[sp,#0x40] +7698 clk cpu0 MR8 03700530:000000f00530_NS ff7fff7f_ff7fff7f +7698 clk cpu0 R X28 FF7FFF7FFF7FFF7F +7699 clk cpu0 IT (7663) 00092fb4:000010092fb4_NS 910283ff O EL1h_n : ADD sp,sp,#0xa0 +7699 clk cpu0 R SP_EL1 0000000003700590 +7700 clk cpu0 IT (7664) 00092fb8:000010092fb8_NS d65f03c0 O EL1h_n : RET +7701 clk cpu0 IT (7665) 0009c560:00001009c560_NS 52800020 O EL1h_n : MOV w0,#1 +7701 clk cpu0 R X0 0000000000000001 +7702 clk cpu0 IT (7666) 0009c564:00001009c564_NS 2a1503e1 O EL1h_n : MOV w1,w21 +7702 clk cpu0 R X1 0000000000000000 +7703 clk cpu0 IT (7667) 0009c568:00001009c568_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +7703 clk cpu0 R X2 0000000000000000 +7704 clk cpu0 IT (7668) 0009c56c:00001009c56c_NS d503201f O EL1h_n : NOP +7705 clk cpu0 IT (7669) 0009c570:00001009c570_NS d5033f9f O EL1h_n : DSB SY +7706 clk cpu0 IT (7670) 0009c574:00001009c574_NS aa1403e0 O EL1h_n : MOV x0,x20 +7706 clk cpu0 R X0 0000000003008528 +7707 clk cpu0 IT (7671) 0009c578:00001009c578_NS 97fffd30 O EL1h_n : BL 0x9ba38 +7707 clk cpu0 R X30 000000000009C57C +7708 clk cpu0 IT (7672) 0009ba38:00001009ba38_NS d5033fbf O EL1h_n : DMB SY +7709 clk cpu0 IT (7673) 0009ba3c:00001009ba3c_NS f0030bc8 O EL1h_n : ADRP x8,0x6216a3c +7709 clk cpu0 R X8 0000000006216000 +7710 clk cpu0 IT (7674) 0009ba40:00001009ba40_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +7710 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +7710 clk cpu0 R X8 0000000000000001 +7711 clk cpu0 IT (7675) 0009ba44:00001009ba44_NS 7100091f O EL1h_n : CMP w8,#2 +7711 clk cpu0 R cpsr 820003c5 +7712 clk cpu0 IT (7676) 0009ba48:00001009ba48_NS 54000083 O EL1h_n : B.CC 0x9ba58 +7713 clk cpu0 IT (7677) 0009ba58:00001009ba58_NS d65f03c0 O EL1h_n : RET +7714 clk cpu0 IT (7678) 0009c57c:00001009c57c_NS a9487bf3 O EL1h_n : LDP x19,x30,[sp,#0x80] +7714 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +7714 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000109f4 +7714 clk cpu0 R X19 1818181818181818 +7714 clk cpu0 R X30 00000000000109F4 +7715 clk cpu0 IT (7679) 0009c580:00001009c580_NS a94753f5 O EL1h_n : LDP x21,x20,[sp,#0x70] +7715 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +7715 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +7715 clk cpu0 R X20 001FFFFFFFFFFFFE +7715 clk cpu0 R X21 0000000000F00000 +7716 clk cpu0 IT (7680) 0009c584:00001009c584_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +7716 clk cpu0 R SP_EL1 0000000003700620 +7717 clk cpu0 IT (7681) 0009c588:00001009c588_NS d65f03c0 O EL1h_n : RET +7718 clk cpu0 IT (7682) 000109f4:0000100109f4_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +7718 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +7718 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003c DIRTY 0x000000f00780_NS +7718 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e4 CLEAN 0x000000f00780_NS +7718 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e4 INVAL 0x000000f00780_NS +7719 clk cpu0 IT (7683) 000109f8:0000100109f8_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +7719 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +7719 clk cpu0 R X2 0000000000000000 +7720 clk cpu0 IT (7684) 000109fc:0000100109fc_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +7720 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +7720 clk cpu0 R X4 0000000000000000 +7720 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0051 ALLOC 0x000010010a00_NS +7720 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0281 ALLOC 0x000010010a00_NS +7721 clk cpu0 IT (7685) 00010a00:000010010a00_NS 52800500 O EL1h_n : MOV w0,#0x28 +7721 clk cpu0 R X0 0000000000000028 +7722 clk cpu0 IT (7686) 00010a04:000010010a04_NS b94063e1 O EL1h_n : LDR w1,[sp,#0x60] +7722 clk cpu0 MR4 03700680:000000f00680_NS 00000001 +7722 clk cpu0 R X1 0000000000000001 +7723 clk cpu0 IT (7687) 00010a08:000010010a08_NS 52800063 O EL1h_n : MOV w3,#3 +7723 clk cpu0 R X3 0000000000000003 +7724 clk cpu0 IT (7688) 00010a0c:000010010a0c_NS 94023439 O EL1h_n : BL 0x9daf0 +7724 clk cpu0 R X30 0000000000010A10 +7724 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d6 ALLOC 0x00001009dac0_NS +7724 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 16b0 ALLOC 0x00001009dac0_NS +7725 clk cpu0 IT (7689) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +7725 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +7725 clk cpu0 R SP_EL1 00000000037005F0 +7726 clk cpu0 IT (7690) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +7726 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +7726 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +7727 clk cpu0 IT (7691) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +7727 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +7727 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010a10 +7728 clk cpu0 IT (7692) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +7728 clk cpu0 R X19 0000000000000000 +7728 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d8 ALLOC 0x00001009db00_NS +7728 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 16c0 ALLOC 0x00001009db00_NS +7729 clk cpu0 IT (7693) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +7729 clk cpu0 R cpsr 220003c5 +7730 clk cpu0 IT (7694) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +7730 clk cpu0 R X20 0000000000000028 +7731 clk cpu0 IS (7695) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +7732 clk cpu0 IT (7696) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +7732 clk cpu0 R cpsr 620003c5 +7733 clk cpu0 IT (7697) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +7733 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00da ALLOC 0x00001009db40_NS +7733 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 16d0 ALLOC 0x00001009db40_NS +7734 clk cpu0 IT (7698) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +7734 clk cpu0 R X1 0000000000000028 +7735 clk cpu0 IT (7699) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +7735 clk cpu0 R X2 0000000000000000 +7736 clk cpu0 IT (7700) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +7736 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +7736 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010a10 +7736 clk cpu0 R X19 1818181818181818 +7736 clk cpu0 R X30 0000000000010A10 +7736 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00dc ALLOC 0x00001009db80_NS +7736 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 16e1 ALLOC 0x00001009db80_NS +7737 clk cpu0 IT (7701) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +7737 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +7737 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +7737 clk cpu0 R X20 001FFFFFFFFFFFFE +7737 clk cpu0 R X21 0000000000F00000 +7738 clk cpu0 IT (7702) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +7738 clk cpu0 R X0 0000000000000002 +7739 clk cpu0 IT (7703) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +7739 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +7739 clk cpu0 R SP_EL1 0000000003700620 +7739 clk cpu0 R X22 FFFFFFFFFFFE0003 +7740 clk cpu0 IT (7704) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +7741 clk cpu0 IT (7705) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +7741 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +7741 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010a10 +7741 clk cpu0 R SP_EL1 0000000003700610 +7742 clk cpu0 IT (7706) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +7742 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +7742 clk cpu0 R cpsr 620003c5 +7742 clk cpu0 R PMBIDR_EL1 00000030 +7742 clk cpu0 R ESR_EL1 5600000a +7742 clk cpu0 R SPSR_EL1 620003c5 +7742 clk cpu0 R TRBIDR_EL1 000000000000002b +7742 clk cpu0 R ELR_EL1 000000000009ef60 +7743 clk cpu0 IT (7707) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +7744 clk cpu0 IT (7708) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +7744 clk cpu0 R SP_EL1 0000000003700510 +7745 clk cpu0 IT (7709) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +7745 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +7745 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000028 +7746 clk cpu0 IT (7710) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +7746 clk cpu0 R X0 000000005600000A +7747 clk cpu0 IT (7711) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +7747 clk cpu0 R X1 0000000000000015 +7748 clk cpu0 IT (7712) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +7748 clk cpu0 R cpsr 620003c5 +7749 clk cpu0 IT (7713) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +7750 clk cpu0 IT (7714) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +7750 clk cpu0 R X1 000000000000000A +7751 clk cpu0 IT (7715) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +7751 clk cpu0 R cpsr 220003c5 +7752 clk cpu0 IS (7716) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +7753 clk cpu0 IT (7717) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +7753 clk cpu0 R cpsr 620003c5 +7754 clk cpu0 IS (7718) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +7755 clk cpu0 IT (7719) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +7755 clk cpu0 R cpsr 220003c5 +7756 clk cpu0 IS (7720) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +7757 clk cpu0 IT (7721) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +7757 clk cpu0 R cpsr 220003c5 +7758 clk cpu0 IS (7722) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +7759 clk cpu0 IT (7723) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +7759 clk cpu0 R cpsr 220003c5 +7760 clk cpu0 IS (7724) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +7761 clk cpu0 IT (7725) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +7761 clk cpu0 R cpsr 220003c5 +7762 clk cpu0 IS (7726) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +7763 clk cpu0 IT (7727) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +7763 clk cpu0 R cpsr 220003c5 +7764 clk cpu0 IS (7728) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +7765 clk cpu0 IT (7729) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +7765 clk cpu0 R cpsr 220003c5 +7766 clk cpu0 IS (7730) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +7767 clk cpu0 IT (7731) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +7767 clk cpu0 R cpsr 620003c5 +7768 clk cpu0 IT (7732) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +7769 clk cpu0 IT (7733) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +7769 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +7769 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000028 +7769 clk cpu0 R X0 0000000000000002 +7769 clk cpu0 R X1 0000000000000028 +7769 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000e INVAL 0x0000100941c0 +7769 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000e ALLOC 0x0000100381c0_NS +7769 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0071 ALLOC 0x0000100381c0_NS +7770 clk cpu0 IT (7734) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +7770 clk cpu0 R SP_EL1 0000000003700610 +7771 clk cpu0 IT (7735) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +7771 clk cpu0 R X0 0000000000000028 +7772 clk cpu0 IT (7736) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +7772 clk cpu0 R X1 0000000000000000 +7773 clk cpu0 IT (7737) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +7773 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +7773 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010a10 +7773 clk cpu0 R SP_EL1 0000000003700600 +7774 clk cpu0 IT (7738) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +7774 clk cpu0 R X30 00000000000381D4 +7774 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00de ALLOC 0x00001009dbc0_NS +7774 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 16f0 ALLOC 0x00001009dbc0_NS +7775 clk cpu0 IT (7739) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +7775 clk cpu0 R X9 0000000003006000 +7776 clk cpu0 IT (7740) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +7776 clk cpu0 R X8 000000000000000A +7777 clk cpu0 IT (7741) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +7777 clk cpu0 R X9 00000000030062A0 +7778 clk cpu0 IT (7742) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +7778 clk cpu0 TTW DTLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +7778 clk cpu0 TTW DTLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +7778 clk cpu0 TTW DTLB LPAE 1:2 000070450008 0000000070470003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070470000 +7778 clk cpu0 TTW DTLB LPAE 1:3 000070472008 0000000000804463 : BLOCK ATTRIDX=0 NS=1 AP=1 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000000804000 +7778 clk cpu0 MR8 030062f0:0000008062f0_NS 00000000_000a110c +7778 clk cpu0 R X2 00000000000A110C +7778 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x03004000_NS EL1_n vmid=0:0x0000804000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7778 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x03004000_NS EL1_n vmid=0:0x0000804000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7778 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x00001004c000_NS +7778 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070250000_NS +7778 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070440000_NS +7778 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070450000_NS +7778 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0116 ALLOC 0x0000008062c0_NS +7778 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 18b0 ALLOC 0x0000008062c0_NS +7778 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00e1 ALLOC 0x00001009dc00_NS +7778 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1700 ALLOC 0x00001009dc00_NS +7779 clk cpu0 IT (7743) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +7779 clk cpu0 R X0 0000000000000000 +7780 clk cpu0 IT (7744) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +7780 clk cpu0 R cpsr 620007c5 +7780 clk cpu0 TTW ITLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +7780 clk cpu0 TTW ITLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +7780 clk cpu0 TTW ITLB LPAE 1:2 000070450000 0000000070460003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070460000 +7780 clk cpu0 TTW ITLB LPAE 1:3 000070460140 00000000100a04c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x00000000100a0000 +7780 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x000a0000_NS EL1_n vmid=0:0x00100a0000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7780 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x000a0000_NS EL1_n vmid=0:0x00100a0000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7780 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070450000_NS +7780 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070440000_NS +7780 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070250000_NS +7780 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070450000_NS +7780 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0088 ALLOC 0x0000100a1100_NS +7780 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0440 ALLOC 0x0000100a1100_NS +7781 clk cpu0 IT (7745) 000a110c:0000100a110c_NS d5110a00 O EL1h_n : MSR s2_1_c0_c10_0,x0 +7781 clk cpu0 R cpsr 620003c5 +7781 clk cpu0 R TRCRSR 00000000:00000000 +7782 clk cpu0 IT (7746) 000a1110:0000100a1110_NS d65f03c0 O EL1h_n : RET +7783 clk cpu0 IT (7747) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +7783 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +7783 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010a10 +7783 clk cpu0 R SP_EL1 0000000003700610 +7783 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7783 clk cpu0 R X30 0000000000010A10 +7784 clk cpu0 IT (7748) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +7784 clk cpu0 R cpsr 620003c5 +7784 clk cpu0 R PMBIDR_EL1 00000030 +7784 clk cpu0 R TRBIDR_EL1 000000000000002b +7785 clk cpu0 IT (7749) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +7785 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +7785 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010a10 +7785 clk cpu0 R SP_EL1 0000000003700620 +7785 clk cpu0 R X29 7FFF7FFF7FFF7FFF +7785 clk cpu0 R X30 0000000000010A10 +7786 clk cpu0 IT (7750) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +7787 clk cpu0 IT (7751) 00010a10:000010010a10_NS f94043e9 O EL1h_n : LDR x9,[sp,#0x80] +7787 clk cpu0 MR8 037006a0:000000f006a0_NS 00000000_03008530 +7787 clk cpu0 R X9 0000000003008530 +7788 clk cpu0 IT (7752) 00010a14:000010010a14_NS f9400121 O EL1h_n : LDR x1,[x9,#0] +7788 clk cpu0 MR8 03008530:000000808530_NS 00000000_23000000 +7788 clk cpu0 R X1 0000000023000000 +7789 clk cpu0 IT (7753) 00010a18:000010010a18_NS 910383e0 O EL1h_n : ADD x0,sp,#0xe0 +7789 clk cpu0 R X0 0000000003700700 +7790 clk cpu0 IT (7754) 00010a1c:000010010a1c_NS 52800028 O EL1h_n : MOV w8,#1 +7790 clk cpu0 R X8 0000000000000001 +7791 clk cpu0 IT (7755) 00010a20:000010010a20_NS 2a0803e3 O EL1h_n : MOV w3,w8 +7791 clk cpu0 R X3 0000000000000001 +7792 clk cpu0 IT (7756) 00010a24:000010010a24_NS 2a0303e2 O EL1h_n : MOV w2,w3 +7792 clk cpu0 R X2 0000000000000001 +7793 clk cpu0 IT (7757) 00010a28:000010010a28_NS b9005fe8 O EL1h_n : STR w8,[sp,#0x5c] +7793 clk cpu0 MW4 0370067c:000000f0067c_NS 00000001 +7793 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0032 ALLOC 0x000000f00640_NS +7793 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0032 DIRTY 0x000000f00640_NS +7793 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00640_NS +7793 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00640_NS +7794 clk cpu0 IT (7758) 00010a2c:000010010a2c_NS 9400021f O EL1h_n : BL 0x112a8 +7794 clk cpu0 R X30 0000000000010A30 +7794 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0094 ALLOC 0x000010011280_NS +7794 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 04a0 ALLOC 0x000010011280_NS +7795 clk cpu0 IT (7759) 000112a8:0000100112a8_NS d10103ff O EL1h_n : SUB sp,sp,#0x40 +7795 clk cpu0 R SP_EL1 00000000037005E0 +7796 clk cpu0 IT (7760) 000112ac:0000100112ac_NS f9001bfe O EL1h_n : STR x30,[sp,#0x30] +7796 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00010a30 +7797 clk cpu0 IT (7761) 000112b0:0000100112b0_NS f90017e0 O EL1h_n : STR x0,[sp,#0x28] +7797 clk cpu0 MW8 03700608:000000f00608_NS 00000000_03700700 +7798 clk cpu0 IT (7762) 000112b4:0000100112b4_NS f90013e1 O EL1h_n : STR x1,[sp,#0x20] +7798 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000000 +7799 clk cpu0 IT (7763) 000112b8:0000100112b8_NS 39007fe2 O EL1h_n : STRB w2,[sp,#0x1f] +7799 clk cpu0 MW1 037005ff:000000f005ff_NS 01 +7800 clk cpu0 IT (7764) 000112bc:0000100112bc_NS 39407fe8 O EL1h_n : LDRB w8,[sp,#0x1f] +7800 clk cpu0 MR1 037005ff:000000f005ff_NS 01 +7800 clk cpu0 R X8 0000000000000001 +7800 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0096 ALLOC 0x0000100112c0_NS +7800 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 04b0 ALLOC 0x0000100112c0_NS +7801 clk cpu0 IT (7765) 000112c0:0000100112c0_NS 7100051f O EL1h_n : CMP w8,#1 +7801 clk cpu0 R cpsr 620003c5 +7802 clk cpu0 IT (7766) 000112c4:0000100112c4_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +7802 clk cpu0 R X8 0000000000000001 +7803 clk cpu0 IT (7767) 000112c8:0000100112c8_NS 37000048 O EL1h_n : TBNZ w8,#0,0x112d0 +7804 clk cpu0 IT (7768) 000112d0:0000100112d0_NS 39407fe8 O EL1h_n : LDRB w8,[sp,#0x1f] +7804 clk cpu0 MR1 037005ff:000000f005ff_NS 01 +7804 clk cpu0 R X8 0000000000000001 +7805 clk cpu0 IT (7769) 000112d4:0000100112d4_NS f94017e9 O EL1h_n : LDR x9,[sp,#0x28] +7805 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7805 clk cpu0 R X9 0000000003700700 +7806 clk cpu0 IT (7770) 000112d8:0000100112d8_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +7806 clk cpu0 MW1 03700700:000000f00700_NS 01 +7806 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 CLEAN 0x000010800700_NS +7806 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 INVAL 0x000010800700_NS +7806 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 ALLOC 0x000000f00700_NS +7806 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 DIRTY 0x000000f00700_NS +7806 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01c1 ALLOC 0x000010800700_NS +7806 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00700_NS +7806 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00700_NS +7807 clk cpu0 IT (7771) 000112dc:0000100112dc_NS f94017e1 O EL1h_n : LDR x1,[sp,#0x28] +7807 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7807 clk cpu0 R X1 0000000003700700 +7808 clk cpu0 IT (7772) 000112e0:0000100112e0_NS 910083e9 O EL1h_n : ADD x9,sp,#0x20 +7808 clk cpu0 R X9 0000000003700600 +7809 clk cpu0 IT (7773) 000112e4:0000100112e4_NS aa0903e0 O EL1h_n : MOV x0,x9 +7809 clk cpu0 R X0 0000000003700600 +7810 clk cpu0 IT (7774) 000112e8:0000100112e8_NS 52800028 O EL1h_n : MOV w8,#1 +7810 clk cpu0 R X8 0000000000000001 +7811 clk cpu0 IT (7775) 000112ec:0000100112ec_NS 2a0803e2 O EL1h_n : MOV w2,w8 +7811 clk cpu0 R X2 0000000000000001 +7812 clk cpu0 IT (7776) 000112f0:0000100112f0_NS f9000be9 O EL1h_n : STR x9,[sp,#0x10] +7812 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_03700600 +7813 clk cpu0 IT (7777) 000112f4:0000100112f4_NS b9000fe8 O EL1h_n : STR w8,[sp,#0xc] +7813 clk cpu0 MW4 037005ec:000000f005ec_NS 00000001 +7814 clk cpu0 IT (7778) 000112f8:0000100112f8_NS 940000b8 O EL1h_n : BL 0x115d8 +7814 clk cpu0 R X30 00000000000112FC +7815 clk cpu0 IT (7779) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +7815 clk cpu0 R SP_EL1 00000000037005C0 +7816 clk cpu0 IT (7780) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +7816 clk cpu0 R X8 0000000000000000 +7817 clk cpu0 IT (7781) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +7817 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_03700600 +7818 clk cpu0 IT (7782) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +7818 clk cpu0 MW8 037005d0:000000f005d0_NS 00000000_03700700 +7819 clk cpu0 IT (7783) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +7819 clk cpu0 MW1 037005cf:000000f005cf_NS 01 +7820 clk cpu0 IT (7784) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +7820 clk cpu0 MW1 037005ce:000000f005ce_NS 00 +7821 clk cpu0 IT (7785) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +7821 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +7821 clk cpu0 R X8 0000000000000000 +7822 clk cpu0 IT (7786) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +7822 clk cpu0 MR1 037005cf:000000f005cf_NS 01 +7822 clk cpu0 R X9 0000000000000001 +7823 clk cpu0 IT (7787) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +7823 clk cpu0 R cpsr 820003c5 +7824 clk cpu0 IT (7788) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7824 clk cpu0 R X8 0000000000000001 +7824 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b0 ALLOC 0x000010011600_NS +7824 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0580 ALLOC 0x000010011600_NS +7825 clk cpu0 IT (7789) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +7826 clk cpu0 IT (7790) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +7826 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700700 +7826 clk cpu0 R X8 0000000003700700 +7827 clk cpu0 IT (7791) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +7827 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +7827 clk cpu0 R X9 0000000000000000 +7828 clk cpu0 IT (7792) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +7828 clk cpu0 R X10 0000000000000000 +7829 clk cpu0 IT (7793) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +7829 clk cpu0 R X10 0000000000000000 +7830 clk cpu0 IT (7794) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +7830 clk cpu0 R X8 0000000003700700 +7831 clk cpu0 IT (7795) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +7831 clk cpu0 MR1 03700700:000000f00700_NS 01 +7831 clk cpu0 R X9 0000000000000001 +7832 clk cpu0 IT (7796) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +7832 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +7832 clk cpu0 R X8 0000000003700600 +7833 clk cpu0 IT (7797) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +7833 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000000 +7833 clk cpu0 R X8 0000000023000000 +7834 clk cpu0 IT (7798) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +7834 clk cpu0 TTW DTLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +7834 clk cpu0 TTW DTLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +7834 clk cpu0 TTW DTLB LPAE 1:2 000070450088 00000000502a0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x00000000502a0000 +7834 clk cpu0 TTW DTLB LPAE 1:3 0000502a2000 0000000016240463 : BLOCK ATTRIDX=0 NS=1 AP=1 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000016240000 +7834 clk cpu0 MW1 23000000:000016240000_NS 01 +7834 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x23000000_NS EL1_n vmid=0:0x0016240000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7834 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x23000000_NS EL1_n vmid=0:0x0016240000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070440000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070250000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070450000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070440000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0004 INVAL 0x000000800080_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0004 ALLOC 0x000070450080_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 CLEAN 0x000015216000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 INVAL 0x000015216000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 ALLOC 0x0000502a2000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070250000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000016240000_NS +7834 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 DIRTY 0x000016240000_NS +7834 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0026 ALLOC 0x000070450080_NS +7834 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1800 ALLOC 0x000015216000_NS +7834 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0808 ALLOC 0x0000502a2000_NS +7834 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016240000_NS +7834 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016240000_NS +7835 clk cpu0 IT (7799) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +7835 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +7835 clk cpu0 R X8 0000000003700600 +7836 clk cpu0 IT (7800) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +7836 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000000 +7836 clk cpu0 R X10 0000000023000000 +7837 clk cpu0 IT (7801) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +7837 clk cpu0 R X11 0000000000000001 +7838 clk cpu0 IT (7802) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +7838 clk cpu0 R X10 0000000023000001 +7839 clk cpu0 IT (7803) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +7839 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000001 +7839 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 INVAL 0x000010015640 +7839 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 ALLOC 0x000010011640_NS +7839 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0590 ALLOC 0x000010011640_NS +7840 clk cpu0 IT (7804) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +7840 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +7840 clk cpu0 R X8 0000000000000000 +7841 clk cpu0 IT (7805) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7841 clk cpu0 R X8 0000000000000001 +7842 clk cpu0 IT (7806) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +7842 clk cpu0 MW1 037005ce:000000f005ce_NS 01 +7843 clk cpu0 IT (7807) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +7844 clk cpu0 IT (7808) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +7844 clk cpu0 MR1 037005ce:000000f005ce_NS 01 +7844 clk cpu0 R X8 0000000000000001 +7845 clk cpu0 IT (7809) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +7845 clk cpu0 MR1 037005cf:000000f005cf_NS 01 +7845 clk cpu0 R X9 0000000000000001 +7846 clk cpu0 IT (7810) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +7846 clk cpu0 R cpsr 620003c5 +7847 clk cpu0 IT (7811) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7847 clk cpu0 R X8 0000000000000000 +7848 clk cpu0 IS (7812) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +7849 clk cpu0 IT (7813) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +7850 clk cpu0 IT (7814) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +7850 clk cpu0 R SP_EL1 00000000037005E0 +7851 clk cpu0 IT (7815) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +7852 clk cpu0 IT (7816) 000112fc:0000100112fc_NS f94017e9 O EL1h_n : LDR x9,[sp,#0x28] +7852 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7852 clk cpu0 R X9 0000000003700700 +7852 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0098 ALLOC 0x000010011300_NS +7852 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 04c0 ALLOC 0x000010011300_NS +7853 clk cpu0 IT (7817) 00011300:000010011300_NS d280002a O EL1h_n : MOV x10,#1 +7853 clk cpu0 R X10 0000000000000001 +7854 clk cpu0 IT (7818) 00011304:000010011304_NS 52800008 O EL1h_n : MOV w8,#0 +7854 clk cpu0 R X8 0000000000000000 +7855 clk cpu0 IT (7819) 00011308:000010011308_NS 39000528 O EL1h_n : STRB w8,[x9,#1] +7855 clk cpu0 MW1 03700701:000000f00701_NS 00 +7856 clk cpu0 IT (7820) 0001130c:00001001130c_NS f94017e9 O EL1h_n : LDR x9,[sp,#0x28] +7856 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7856 clk cpu0 R X9 0000000003700700 +7857 clk cpu0 IT (7821) 00011310:000010011310_NS 8b0a0121 O EL1h_n : ADD x1,x9,x10 +7857 clk cpu0 R X1 0000000003700701 +7858 clk cpu0 IT (7822) 00011314:000010011314_NS f9400be0 O EL1h_n : LDR x0,[sp,#0x10] +7858 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_03700600 +7858 clk cpu0 R X0 0000000003700600 +7859 clk cpu0 IT (7823) 00011318:000010011318_NS b9400fe2 O EL1h_n : LDR w2,[sp,#0xc] +7859 clk cpu0 MR4 037005ec:000000f005ec_NS 00000001 +7859 clk cpu0 R X2 0000000000000001 +7860 clk cpu0 IT (7824) 0001131c:00001001131c_NS 940000af O EL1h_n : BL 0x115d8 +7860 clk cpu0 R X30 0000000000011320 +7861 clk cpu0 IT (7825) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +7861 clk cpu0 R SP_EL1 00000000037005C0 +7862 clk cpu0 IT (7826) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +7862 clk cpu0 R X8 0000000000000000 +7863 clk cpu0 IT (7827) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +7863 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_03700600 +7864 clk cpu0 IT (7828) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +7864 clk cpu0 MW8 037005d0:000000f005d0_NS 00000000_03700701 +7865 clk cpu0 IT (7829) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +7865 clk cpu0 MW1 037005cf:000000f005cf_NS 01 +7866 clk cpu0 IT (7830) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +7866 clk cpu0 MW1 037005ce:000000f005ce_NS 00 +7867 clk cpu0 IT (7831) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +7867 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +7867 clk cpu0 R X8 0000000000000000 +7868 clk cpu0 IT (7832) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +7868 clk cpu0 MR1 037005cf:000000f005cf_NS 01 +7868 clk cpu0 R X9 0000000000000001 +7869 clk cpu0 IT (7833) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +7869 clk cpu0 R cpsr 820003c5 +7870 clk cpu0 IT (7834) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7870 clk cpu0 R X8 0000000000000001 +7871 clk cpu0 IT (7835) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +7872 clk cpu0 IT (7836) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +7872 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700701 +7872 clk cpu0 R X8 0000000003700701 +7873 clk cpu0 IT (7837) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +7873 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +7873 clk cpu0 R X9 0000000000000000 +7874 clk cpu0 IT (7838) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +7874 clk cpu0 R X10 0000000000000000 +7875 clk cpu0 IT (7839) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +7875 clk cpu0 R X10 0000000000000000 +7876 clk cpu0 IT (7840) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +7876 clk cpu0 R X8 0000000003700701 +7877 clk cpu0 IT (7841) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +7877 clk cpu0 MR1 03700701:000000f00701_NS 00 +7877 clk cpu0 R X9 0000000000000000 +7878 clk cpu0 IT (7842) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +7878 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +7878 clk cpu0 R X8 0000000003700600 +7879 clk cpu0 IT (7843) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +7879 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000001 +7879 clk cpu0 R X8 0000000023000001 +7880 clk cpu0 IT (7844) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +7880 clk cpu0 MW1 23000001:000016240001_NS 00 +7881 clk cpu0 IT (7845) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +7881 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +7881 clk cpu0 R X8 0000000003700600 +7882 clk cpu0 IT (7846) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +7882 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000001 +7882 clk cpu0 R X10 0000000023000001 +7883 clk cpu0 IT (7847) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +7883 clk cpu0 R X11 0000000000000001 +7884 clk cpu0 IT (7848) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +7884 clk cpu0 R X10 0000000023000002 +7885 clk cpu0 IT (7849) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +7885 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000002 +7886 clk cpu0 IT (7850) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +7886 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +7886 clk cpu0 R X8 0000000000000000 +7887 clk cpu0 IT (7851) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7887 clk cpu0 R X8 0000000000000001 +7888 clk cpu0 IT (7852) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +7888 clk cpu0 MW1 037005ce:000000f005ce_NS 01 +7889 clk cpu0 IT (7853) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +7890 clk cpu0 IT (7854) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +7890 clk cpu0 MR1 037005ce:000000f005ce_NS 01 +7890 clk cpu0 R X8 0000000000000001 +7891 clk cpu0 IT (7855) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +7891 clk cpu0 MR1 037005cf:000000f005cf_NS 01 +7891 clk cpu0 R X9 0000000000000001 +7892 clk cpu0 IT (7856) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +7892 clk cpu0 R cpsr 620003c5 +7893 clk cpu0 IT (7857) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7893 clk cpu0 R X8 0000000000000000 +7894 clk cpu0 IS (7858) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +7895 clk cpu0 IT (7859) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +7896 clk cpu0 IT (7860) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +7896 clk cpu0 R SP_EL1 00000000037005E0 +7897 clk cpu0 IT (7861) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +7898 clk cpu0 IT (7862) 00011320:000010011320_NS 52800008 O EL1h_n : MOV w8,#0 +7898 clk cpu0 R X8 0000000000000000 +7899 clk cpu0 IT (7863) 00011324:000010011324_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +7899 clk cpu0 MW2 037005fc:000000f005fc_NS 0000 +7900 clk cpu0 IT (7864) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7900 clk cpu0 MR2 037005fc:000000f005fc_NS 0000 +7900 clk cpu0 R X8 0000000000000000 +7901 clk cpu0 IT (7865) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +7901 clk cpu0 R cpsr 820003c5 +7902 clk cpu0 IT (7866) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7902 clk cpu0 R X8 0000000000000001 +7903 clk cpu0 IT (7867) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +7904 clk cpu0 IT (7868) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +7904 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7904 clk cpu0 R X8 0000000003700700 +7904 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009b INVAL 0x00001009d340_NS +7904 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009b ALLOC 0x000010011340_NS +7904 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 04d0 ALLOC 0x000010011340_NS +7905 clk cpu0 IT (7869) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +7905 clk cpu0 R X9 0000000000000002 +7906 clk cpu0 IT (7870) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7906 clk cpu0 R X8 0000000003700702 +7907 clk cpu0 IT (7871) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +7907 clk cpu0 MR2 037005fc:000000f005fc_NS 0000 +7907 clk cpu0 R X10 0000000000000000 +7908 clk cpu0 IT (7872) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +7908 clk cpu0 R X9 0000000000000000 +7909 clk cpu0 IT (7873) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7909 clk cpu0 R X8 0000000003700702 +7910 clk cpu0 IT (7874) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +7910 clk cpu0 R X10 0000000000000000 +7911 clk cpu0 IT (7875) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +7911 clk cpu0 MW1 03700702:000000f00702_NS 00 +7912 clk cpu0 IT (7876) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7912 clk cpu0 MR2 037005fc:000000f005fc_NS 0000 +7912 clk cpu0 R X8 0000000000000000 +7913 clk cpu0 IT (7877) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7913 clk cpu0 R X8 0000000000000001 +7914 clk cpu0 IT (7878) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +7914 clk cpu0 MW2 037005fc:000000f005fc_NS 0001 +7915 clk cpu0 IT (7879) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +7916 clk cpu0 IT (7880) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7916 clk cpu0 MR2 037005fc:000000f005fc_NS 0001 +7916 clk cpu0 R X8 0000000000000001 +7917 clk cpu0 IT (7881) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +7917 clk cpu0 R cpsr 820003c5 +7918 clk cpu0 IT (7882) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7918 clk cpu0 R X8 0000000000000001 +7919 clk cpu0 IT (7883) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +7920 clk cpu0 IT (7884) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +7920 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7920 clk cpu0 R X8 0000000003700700 +7921 clk cpu0 IT (7885) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +7921 clk cpu0 R X9 0000000000000002 +7922 clk cpu0 IT (7886) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7922 clk cpu0 R X8 0000000003700702 +7923 clk cpu0 IT (7887) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +7923 clk cpu0 MR2 037005fc:000000f005fc_NS 0001 +7923 clk cpu0 R X10 0000000000000001 +7924 clk cpu0 IT (7888) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +7924 clk cpu0 R X9 0000000000000001 +7925 clk cpu0 IT (7889) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7925 clk cpu0 R X8 0000000003700703 +7926 clk cpu0 IT (7890) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +7926 clk cpu0 R X10 0000000000000000 +7927 clk cpu0 IT (7891) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +7927 clk cpu0 MW1 03700703:000000f00703_NS 00 +7928 clk cpu0 IT (7892) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7928 clk cpu0 MR2 037005fc:000000f005fc_NS 0001 +7928 clk cpu0 R X8 0000000000000001 +7929 clk cpu0 IT (7893) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7929 clk cpu0 R X8 0000000000000002 +7930 clk cpu0 IT (7894) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +7930 clk cpu0 MW2 037005fc:000000f005fc_NS 0002 +7931 clk cpu0 IT (7895) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +7932 clk cpu0 IT (7896) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7932 clk cpu0 MR2 037005fc:000000f005fc_NS 0002 +7932 clk cpu0 R X8 0000000000000002 +7933 clk cpu0 IT (7897) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +7933 clk cpu0 R cpsr 820003c5 +7934 clk cpu0 IT (7898) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7934 clk cpu0 R X8 0000000000000001 +7935 clk cpu0 IT (7899) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +7936 clk cpu0 IT (7900) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +7936 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7936 clk cpu0 R X8 0000000003700700 +7937 clk cpu0 IT (7901) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +7937 clk cpu0 R X9 0000000000000002 +7938 clk cpu0 IT (7902) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7938 clk cpu0 R X8 0000000003700702 +7939 clk cpu0 IT (7903) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +7939 clk cpu0 MR2 037005fc:000000f005fc_NS 0002 +7939 clk cpu0 R X10 0000000000000002 +7940 clk cpu0 IT (7904) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +7940 clk cpu0 R X9 0000000000000002 +7941 clk cpu0 IT (7905) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7941 clk cpu0 R X8 0000000003700704 +7942 clk cpu0 IT (7906) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +7942 clk cpu0 R X10 0000000000000000 +7943 clk cpu0 IT (7907) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +7943 clk cpu0 MW1 03700704:000000f00704_NS 00 +7944 clk cpu0 IT (7908) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7944 clk cpu0 MR2 037005fc:000000f005fc_NS 0002 +7944 clk cpu0 R X8 0000000000000002 +7945 clk cpu0 IT (7909) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7945 clk cpu0 R X8 0000000000000003 +7946 clk cpu0 IT (7910) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +7946 clk cpu0 MW2 037005fc:000000f005fc_NS 0003 +7947 clk cpu0 IT (7911) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +7948 clk cpu0 IT (7912) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7948 clk cpu0 MR2 037005fc:000000f005fc_NS 0003 +7948 clk cpu0 R X8 0000000000000003 +7949 clk cpu0 IT (7913) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +7949 clk cpu0 R cpsr 820003c5 +7950 clk cpu0 IT (7914) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7950 clk cpu0 R X8 0000000000000001 +7951 clk cpu0 IT (7915) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +7952 clk cpu0 IT (7916) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +7952 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7952 clk cpu0 R X8 0000000003700700 +7953 clk cpu0 IT (7917) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +7953 clk cpu0 R X9 0000000000000002 +7954 clk cpu0 IT (7918) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7954 clk cpu0 R X8 0000000003700702 +7955 clk cpu0 IT (7919) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +7955 clk cpu0 MR2 037005fc:000000f005fc_NS 0003 +7955 clk cpu0 R X10 0000000000000003 +7956 clk cpu0 IT (7920) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +7956 clk cpu0 R X9 0000000000000003 +7957 clk cpu0 IT (7921) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7957 clk cpu0 R X8 0000000003700705 +7958 clk cpu0 IT (7922) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +7958 clk cpu0 R X10 0000000000000000 +7959 clk cpu0 IT (7923) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +7959 clk cpu0 MW1 03700705:000000f00705_NS 00 +7960 clk cpu0 IT (7924) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7960 clk cpu0 MR2 037005fc:000000f005fc_NS 0003 +7960 clk cpu0 R X8 0000000000000003 +7961 clk cpu0 IT (7925) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7961 clk cpu0 R X8 0000000000000004 +7962 clk cpu0 IT (7926) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +7962 clk cpu0 MW2 037005fc:000000f005fc_NS 0004 +7963 clk cpu0 IT (7927) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +7964 clk cpu0 IT (7928) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7964 clk cpu0 MR2 037005fc:000000f005fc_NS 0004 +7964 clk cpu0 R X8 0000000000000004 +7965 clk cpu0 IT (7929) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +7965 clk cpu0 R cpsr 820003c5 +7966 clk cpu0 IT (7930) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7966 clk cpu0 R X8 0000000000000001 +7967 clk cpu0 IT (7931) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +7968 clk cpu0 IT (7932) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +7968 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7968 clk cpu0 R X8 0000000003700700 +7969 clk cpu0 IT (7933) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +7969 clk cpu0 R X9 0000000000000002 +7970 clk cpu0 IT (7934) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7970 clk cpu0 R X8 0000000003700702 +7971 clk cpu0 IT (7935) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +7971 clk cpu0 MR2 037005fc:000000f005fc_NS 0004 +7971 clk cpu0 R X10 0000000000000004 +7972 clk cpu0 IT (7936) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +7972 clk cpu0 R X9 0000000000000004 +7973 clk cpu0 IT (7937) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7973 clk cpu0 R X8 0000000003700706 +7974 clk cpu0 IT (7938) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +7974 clk cpu0 R X10 0000000000000000 +7975 clk cpu0 IT (7939) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +7975 clk cpu0 MW1 03700706:000000f00706_NS 00 +7976 clk cpu0 IT (7940) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7976 clk cpu0 MR2 037005fc:000000f005fc_NS 0004 +7976 clk cpu0 R X8 0000000000000004 +7977 clk cpu0 IT (7941) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7977 clk cpu0 R X8 0000000000000005 +7978 clk cpu0 IT (7942) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +7978 clk cpu0 MW2 037005fc:000000f005fc_NS 0005 +7979 clk cpu0 IT (7943) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +7980 clk cpu0 IT (7944) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7980 clk cpu0 MR2 037005fc:000000f005fc_NS 0005 +7980 clk cpu0 R X8 0000000000000005 +7981 clk cpu0 IT (7945) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +7981 clk cpu0 R cpsr 820003c5 +7982 clk cpu0 IT (7946) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7982 clk cpu0 R X8 0000000000000001 +7983 clk cpu0 IT (7947) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +7984 clk cpu0 IT (7948) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +7984 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +7984 clk cpu0 R X8 0000000003700700 +7985 clk cpu0 IT (7949) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +7985 clk cpu0 R X9 0000000000000002 +7986 clk cpu0 IT (7950) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7986 clk cpu0 R X8 0000000003700702 +7987 clk cpu0 IT (7951) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +7987 clk cpu0 MR2 037005fc:000000f005fc_NS 0005 +7987 clk cpu0 R X10 0000000000000005 +7988 clk cpu0 IT (7952) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +7988 clk cpu0 R X9 0000000000000005 +7989 clk cpu0 IT (7953) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +7989 clk cpu0 R X8 0000000003700707 +7990 clk cpu0 IT (7954) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +7990 clk cpu0 R X10 0000000000000000 +7991 clk cpu0 IT (7955) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +7991 clk cpu0 MW1 03700707:000000f00707_NS 00 +7992 clk cpu0 IT (7956) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7992 clk cpu0 MR2 037005fc:000000f005fc_NS 0005 +7992 clk cpu0 R X8 0000000000000005 +7993 clk cpu0 IT (7957) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +7993 clk cpu0 R X8 0000000000000006 +7994 clk cpu0 IT (7958) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +7994 clk cpu0 MW2 037005fc:000000f005fc_NS 0006 +7995 clk cpu0 IT (7959) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +7996 clk cpu0 IT (7960) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +7996 clk cpu0 MR2 037005fc:000000f005fc_NS 0006 +7996 clk cpu0 R X8 0000000000000006 +7997 clk cpu0 IT (7961) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +7997 clk cpu0 R cpsr 820003c5 +7998 clk cpu0 IT (7962) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +7998 clk cpu0 R X8 0000000000000001 +7999 clk cpu0 IT (7963) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8000 clk cpu0 IT (7964) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8000 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8000 clk cpu0 R X8 0000000003700700 +8001 clk cpu0 IT (7965) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8001 clk cpu0 R X9 0000000000000002 +8002 clk cpu0 IT (7966) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8002 clk cpu0 R X8 0000000003700702 +8003 clk cpu0 IT (7967) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8003 clk cpu0 MR2 037005fc:000000f005fc_NS 0006 +8003 clk cpu0 R X10 0000000000000006 +8004 clk cpu0 IT (7968) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8004 clk cpu0 R X9 0000000000000006 +8005 clk cpu0 IT (7969) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8005 clk cpu0 R X8 0000000003700708 +8006 clk cpu0 IT (7970) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8006 clk cpu0 R X10 0000000000000000 +8007 clk cpu0 IT (7971) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8007 clk cpu0 MW1 03700708:000000f00708_NS 00 +8008 clk cpu0 IT (7972) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8008 clk cpu0 MR2 037005fc:000000f005fc_NS 0006 +8008 clk cpu0 R X8 0000000000000006 +8009 clk cpu0 IT (7973) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8009 clk cpu0 R X8 0000000000000007 +8010 clk cpu0 IT (7974) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8010 clk cpu0 MW2 037005fc:000000f005fc_NS 0007 +8011 clk cpu0 IT (7975) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8012 clk cpu0 IT (7976) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8012 clk cpu0 MR2 037005fc:000000f005fc_NS 0007 +8012 clk cpu0 R X8 0000000000000007 +8013 clk cpu0 IT (7977) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8013 clk cpu0 R cpsr 820003c5 +8014 clk cpu0 IT (7978) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8014 clk cpu0 R X8 0000000000000001 +8015 clk cpu0 IT (7979) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8016 clk cpu0 IT (7980) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8016 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8016 clk cpu0 R X8 0000000003700700 +8017 clk cpu0 IT (7981) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8017 clk cpu0 R X9 0000000000000002 +8018 clk cpu0 IT (7982) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8018 clk cpu0 R X8 0000000003700702 +8019 clk cpu0 IT (7983) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8019 clk cpu0 MR2 037005fc:000000f005fc_NS 0007 +8019 clk cpu0 R X10 0000000000000007 +8020 clk cpu0 IT (7984) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8020 clk cpu0 R X9 0000000000000007 +8021 clk cpu0 IT (7985) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8021 clk cpu0 R X8 0000000003700709 +8022 clk cpu0 IT (7986) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8022 clk cpu0 R X10 0000000000000000 +8023 clk cpu0 IT (7987) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8023 clk cpu0 MW1 03700709:000000f00709_NS 00 +8024 clk cpu0 IT (7988) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8024 clk cpu0 MR2 037005fc:000000f005fc_NS 0007 +8024 clk cpu0 R X8 0000000000000007 +8025 clk cpu0 IT (7989) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8025 clk cpu0 R X8 0000000000000008 +8026 clk cpu0 IT (7990) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8026 clk cpu0 MW2 037005fc:000000f005fc_NS 0008 +8027 clk cpu0 IT (7991) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8028 clk cpu0 IT (7992) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8028 clk cpu0 MR2 037005fc:000000f005fc_NS 0008 +8028 clk cpu0 R X8 0000000000000008 +8029 clk cpu0 IT (7993) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8029 clk cpu0 R cpsr 820003c5 +8030 clk cpu0 IT (7994) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8030 clk cpu0 R X8 0000000000000001 +8031 clk cpu0 IT (7995) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8032 clk cpu0 IT (7996) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8032 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8032 clk cpu0 R X8 0000000003700700 +8033 clk cpu0 IT (7997) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8033 clk cpu0 R X9 0000000000000002 +8034 clk cpu0 IT (7998) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8034 clk cpu0 R X8 0000000003700702 +8035 clk cpu0 IT (7999) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8035 clk cpu0 MR2 037005fc:000000f005fc_NS 0008 +8035 clk cpu0 R X10 0000000000000008 +8036 clk cpu0 IT (8000) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8036 clk cpu0 R X9 0000000000000008 +8037 clk cpu0 IT (8001) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8037 clk cpu0 R X8 000000000370070A +8038 clk cpu0 IT (8002) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8038 clk cpu0 R X10 0000000000000000 +8039 clk cpu0 IT (8003) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8039 clk cpu0 MW1 0370070a:000000f0070a_NS 00 +8040 clk cpu0 IT (8004) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8040 clk cpu0 MR2 037005fc:000000f005fc_NS 0008 +8040 clk cpu0 R X8 0000000000000008 +8041 clk cpu0 IT (8005) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8041 clk cpu0 R X8 0000000000000009 +8042 clk cpu0 IT (8006) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8042 clk cpu0 MW2 037005fc:000000f005fc_NS 0009 +8043 clk cpu0 IT (8007) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8044 clk cpu0 IT (8008) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8044 clk cpu0 MR2 037005fc:000000f005fc_NS 0009 +8044 clk cpu0 R X8 0000000000000009 +8045 clk cpu0 IT (8009) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8045 clk cpu0 R cpsr 820003c5 +8046 clk cpu0 IT (8010) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8046 clk cpu0 R X8 0000000000000001 +8047 clk cpu0 IT (8011) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8048 clk cpu0 IT (8012) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8048 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8048 clk cpu0 R X8 0000000003700700 +8049 clk cpu0 IT (8013) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8049 clk cpu0 R X9 0000000000000002 +8050 clk cpu0 IT (8014) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8050 clk cpu0 R X8 0000000003700702 +8051 clk cpu0 IT (8015) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8051 clk cpu0 MR2 037005fc:000000f005fc_NS 0009 +8051 clk cpu0 R X10 0000000000000009 +8052 clk cpu0 IT (8016) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8052 clk cpu0 R X9 0000000000000009 +8053 clk cpu0 IT (8017) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8053 clk cpu0 R X8 000000000370070B +8054 clk cpu0 IT (8018) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8054 clk cpu0 R X10 0000000000000000 +8055 clk cpu0 IT (8019) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8055 clk cpu0 MW1 0370070b:000000f0070b_NS 00 +8056 clk cpu0 IT (8020) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8056 clk cpu0 MR2 037005fc:000000f005fc_NS 0009 +8056 clk cpu0 R X8 0000000000000009 +8057 clk cpu0 IT (8021) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8057 clk cpu0 R X8 000000000000000A +8058 clk cpu0 IT (8022) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8058 clk cpu0 MW2 037005fc:000000f005fc_NS 000a +8059 clk cpu0 IT (8023) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8060 clk cpu0 IT (8024) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8060 clk cpu0 MR2 037005fc:000000f005fc_NS 000a +8060 clk cpu0 R X8 000000000000000A +8061 clk cpu0 IT (8025) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8061 clk cpu0 R cpsr 820003c5 +8062 clk cpu0 IT (8026) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8062 clk cpu0 R X8 0000000000000001 +8063 clk cpu0 IT (8027) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8064 clk cpu0 IT (8028) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8064 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8064 clk cpu0 R X8 0000000003700700 +8065 clk cpu0 IT (8029) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8065 clk cpu0 R X9 0000000000000002 +8066 clk cpu0 IT (8030) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8066 clk cpu0 R X8 0000000003700702 +8067 clk cpu0 IT (8031) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8067 clk cpu0 MR2 037005fc:000000f005fc_NS 000a +8067 clk cpu0 R X10 000000000000000A +8068 clk cpu0 IT (8032) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8068 clk cpu0 R X9 000000000000000A +8069 clk cpu0 IT (8033) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8069 clk cpu0 R X8 000000000370070C +8070 clk cpu0 IT (8034) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8070 clk cpu0 R X10 0000000000000000 +8071 clk cpu0 IT (8035) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8071 clk cpu0 MW1 0370070c:000000f0070c_NS 00 +8072 clk cpu0 IT (8036) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8072 clk cpu0 MR2 037005fc:000000f005fc_NS 000a +8072 clk cpu0 R X8 000000000000000A +8073 clk cpu0 IT (8037) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8073 clk cpu0 R X8 000000000000000B +8074 clk cpu0 IT (8038) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8074 clk cpu0 MW2 037005fc:000000f005fc_NS 000b +8075 clk cpu0 IT (8039) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8076 clk cpu0 IT (8040) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8076 clk cpu0 MR2 037005fc:000000f005fc_NS 000b +8076 clk cpu0 R X8 000000000000000B +8077 clk cpu0 IT (8041) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8077 clk cpu0 R cpsr 820003c5 +8078 clk cpu0 IT (8042) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8078 clk cpu0 R X8 0000000000000001 +8079 clk cpu0 IT (8043) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8080 clk cpu0 IT (8044) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8080 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8080 clk cpu0 R X8 0000000003700700 +8081 clk cpu0 IT (8045) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8081 clk cpu0 R X9 0000000000000002 +8082 clk cpu0 IT (8046) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8082 clk cpu0 R X8 0000000003700702 +8083 clk cpu0 IT (8047) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8083 clk cpu0 MR2 037005fc:000000f005fc_NS 000b +8083 clk cpu0 R X10 000000000000000B +8084 clk cpu0 IT (8048) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8084 clk cpu0 R X9 000000000000000B +8085 clk cpu0 IT (8049) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8085 clk cpu0 R X8 000000000370070D +8086 clk cpu0 IT (8050) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8086 clk cpu0 R X10 0000000000000000 +8087 clk cpu0 IT (8051) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8087 clk cpu0 MW1 0370070d:000000f0070d_NS 00 +8088 clk cpu0 IT (8052) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8088 clk cpu0 MR2 037005fc:000000f005fc_NS 000b +8088 clk cpu0 R X8 000000000000000B +8089 clk cpu0 IT (8053) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8089 clk cpu0 R X8 000000000000000C +8090 clk cpu0 IT (8054) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8090 clk cpu0 MW2 037005fc:000000f005fc_NS 000c +8091 clk cpu0 IT (8055) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8092 clk cpu0 IT (8056) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8092 clk cpu0 MR2 037005fc:000000f005fc_NS 000c +8092 clk cpu0 R X8 000000000000000C +8093 clk cpu0 IT (8057) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8093 clk cpu0 R cpsr 820003c5 +8094 clk cpu0 IT (8058) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8094 clk cpu0 R X8 0000000000000001 +8095 clk cpu0 IT (8059) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8096 clk cpu0 IT (8060) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8096 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8096 clk cpu0 R X8 0000000003700700 +8097 clk cpu0 IT (8061) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8097 clk cpu0 R X9 0000000000000002 +8098 clk cpu0 IT (8062) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8098 clk cpu0 R X8 0000000003700702 +8099 clk cpu0 IT (8063) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8099 clk cpu0 MR2 037005fc:000000f005fc_NS 000c +8099 clk cpu0 R X10 000000000000000C +8100 clk cpu0 IT (8064) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8100 clk cpu0 R X9 000000000000000C +8101 clk cpu0 IT (8065) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8101 clk cpu0 R X8 000000000370070E +8102 clk cpu0 IT (8066) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8102 clk cpu0 R X10 0000000000000000 +8103 clk cpu0 IT (8067) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8103 clk cpu0 MW1 0370070e:000000f0070e_NS 00 +8104 clk cpu0 IT (8068) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8104 clk cpu0 MR2 037005fc:000000f005fc_NS 000c +8104 clk cpu0 R X8 000000000000000C +8105 clk cpu0 IT (8069) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8105 clk cpu0 R X8 000000000000000D +8106 clk cpu0 IT (8070) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8106 clk cpu0 MW2 037005fc:000000f005fc_NS 000d +8107 clk cpu0 IT (8071) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8108 clk cpu0 IT (8072) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8108 clk cpu0 MR2 037005fc:000000f005fc_NS 000d +8108 clk cpu0 R X8 000000000000000D +8109 clk cpu0 IT (8073) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8109 clk cpu0 R cpsr 820003c5 +8110 clk cpu0 IT (8074) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8110 clk cpu0 R X8 0000000000000001 +8111 clk cpu0 IT (8075) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8112 clk cpu0 IT (8076) 0001133c:00001001133c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8112 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8112 clk cpu0 R X8 0000000003700700 +8113 clk cpu0 IT (8077) 00011340:000010011340_NS d2800049 O EL1h_n : MOV x9,#2 +8113 clk cpu0 R X9 0000000000000002 +8114 clk cpu0 IT (8078) 00011344:000010011344_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8114 clk cpu0 R X8 0000000003700702 +8115 clk cpu0 IT (8079) 00011348:000010011348_NS 79403bea O EL1h_n : LDRH w10,[sp,#0x1c] +8115 clk cpu0 MR2 037005fc:000000f005fc_NS 000d +8115 clk cpu0 R X10 000000000000000D +8116 clk cpu0 IT (8080) 0001134c:00001001134c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +8116 clk cpu0 R X9 000000000000000D +8117 clk cpu0 IT (8081) 00011350:000010011350_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +8117 clk cpu0 R X8 000000000370070F +8118 clk cpu0 IT (8082) 00011354:000010011354_NS 5280000a O EL1h_n : MOV w10,#0 +8118 clk cpu0 R X10 0000000000000000 +8119 clk cpu0 IT (8083) 00011358:000010011358_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +8119 clk cpu0 MW1 0370070f:000000f0070f_NS 00 +8120 clk cpu0 IT (8084) 0001135c:00001001135c_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8120 clk cpu0 MR2 037005fc:000000f005fc_NS 000d +8120 clk cpu0 R X8 000000000000000D +8121 clk cpu0 IT (8085) 00011360:000010011360_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8121 clk cpu0 R X8 000000000000000E +8122 clk cpu0 IT (8086) 00011364:000010011364_NS 79003be8 O EL1h_n : STRH w8,[sp,#0x1c] +8122 clk cpu0 MW2 037005fc:000000f005fc_NS 000e +8123 clk cpu0 IT (8087) 00011368:000010011368_NS 17fffff0 O EL1h_n : B 0x11328 +8124 clk cpu0 IT (8088) 00011328:000010011328_NS 79403be8 O EL1h_n : LDRH w8,[sp,#0x1c] +8124 clk cpu0 MR2 037005fc:000000f005fc_NS 000e +8124 clk cpu0 R X8 000000000000000E +8125 clk cpu0 IT (8089) 0001132c:00001001132c_NS 7100391f O EL1h_n : CMP w8,#0xe +8125 clk cpu0 R cpsr 620003c5 +8126 clk cpu0 IT (8090) 00011330:000010011330_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8126 clk cpu0 R X8 0000000000000000 +8127 clk cpu0 IS (8091) 00011334:000010011334_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1133c +8128 clk cpu0 IT (8092) 00011338:000010011338_NS 1400000d O EL1h_n : B 0x1136c +8129 clk cpu0 IT (8093) 0001136c:00001001136c_NS f94017e8 O EL1h_n : LDR x8,[sp,#0x28] +8129 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +8129 clk cpu0 R X8 0000000003700700 +8130 clk cpu0 IT (8094) 00011370:000010011370_NS d2800049 O EL1h_n : MOV x9,#2 +8130 clk cpu0 R X9 0000000000000002 +8131 clk cpu0 IT (8095) 00011374:000010011374_NS 8b090101 O EL1h_n : ADD x1,x8,x9 +8131 clk cpu0 R X1 0000000003700702 +8132 clk cpu0 IT (8096) 00011378:000010011378_NS 910083e0 O EL1h_n : ADD x0,sp,#0x20 +8132 clk cpu0 R X0 0000000003700600 +8133 clk cpu0 IT (8097) 0001137c:00001001137c_NS 528001c2 O EL1h_n : MOV w2,#0xe +8133 clk cpu0 R X2 000000000000000E +8134 clk cpu0 IT (8098) 00011380:000010011380_NS 94000096 O EL1h_n : BL 0x115d8 +8134 clk cpu0 R X30 0000000000011384 +8135 clk cpu0 IT (8099) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +8135 clk cpu0 R SP_EL1 00000000037005C0 +8136 clk cpu0 IT (8100) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +8136 clk cpu0 R X8 0000000000000000 +8137 clk cpu0 IT (8101) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +8137 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_03700600 +8138 clk cpu0 IT (8102) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +8138 clk cpu0 MW8 037005d0:000000f005d0_NS 00000000_03700702 +8139 clk cpu0 IT (8103) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +8139 clk cpu0 MW1 037005cf:000000f005cf_NS 0e +8140 clk cpu0 IT (8104) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8140 clk cpu0 MW1 037005ce:000000f005ce_NS 00 +8141 clk cpu0 IT (8105) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8141 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +8141 clk cpu0 R X8 0000000000000000 +8142 clk cpu0 IT (8106) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8142 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8142 clk cpu0 R X9 000000000000000E +8143 clk cpu0 IT (8107) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8143 clk cpu0 R cpsr 820003c5 +8144 clk cpu0 IT (8108) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8144 clk cpu0 R X8 0000000000000001 +8145 clk cpu0 IT (8109) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8146 clk cpu0 IT (8110) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8146 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8146 clk cpu0 R X8 0000000003700702 +8147 clk cpu0 IT (8111) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8147 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +8147 clk cpu0 R X9 0000000000000000 +8148 clk cpu0 IT (8112) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8148 clk cpu0 R X10 0000000000000000 +8149 clk cpu0 IT (8113) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8149 clk cpu0 R X10 0000000000000000 +8150 clk cpu0 IT (8114) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8150 clk cpu0 R X8 0000000003700702 +8151 clk cpu0 IT (8115) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8151 clk cpu0 MR1 03700702:000000f00702_NS 00 +8151 clk cpu0 R X9 0000000000000000 +8152 clk cpu0 IT (8116) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8152 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8152 clk cpu0 R X8 0000000003700600 +8153 clk cpu0 IT (8117) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8153 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000002 +8153 clk cpu0 R X8 0000000023000002 +8154 clk cpu0 IT (8118) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8154 clk cpu0 MW1 23000002:000016240002_NS 00 +8155 clk cpu0 IT (8119) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8155 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8155 clk cpu0 R X8 0000000003700600 +8156 clk cpu0 IT (8120) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8156 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000002 +8156 clk cpu0 R X10 0000000023000002 +8157 clk cpu0 IT (8121) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8157 clk cpu0 R X11 0000000000000001 +8158 clk cpu0 IT (8122) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8158 clk cpu0 R X10 0000000023000003 +8159 clk cpu0 IT (8123) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8159 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000003 +8160 clk cpu0 IT (8124) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8160 clk cpu0 MR1 037005ce:000000f005ce_NS 00 +8160 clk cpu0 R X8 0000000000000000 +8161 clk cpu0 IT (8125) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8161 clk cpu0 R X8 0000000000000001 +8162 clk cpu0 IT (8126) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8162 clk cpu0 MW1 037005ce:000000f005ce_NS 01 +8163 clk cpu0 IT (8127) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8164 clk cpu0 IT (8128) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8164 clk cpu0 MR1 037005ce:000000f005ce_NS 01 +8164 clk cpu0 R X8 0000000000000001 +8165 clk cpu0 IT (8129) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8165 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8165 clk cpu0 R X9 000000000000000E +8166 clk cpu0 IT (8130) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8166 clk cpu0 R cpsr 820003c5 +8167 clk cpu0 IT (8131) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8167 clk cpu0 R X8 0000000000000001 +8168 clk cpu0 IT (8132) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8169 clk cpu0 IT (8133) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8169 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8169 clk cpu0 R X8 0000000003700702 +8170 clk cpu0 IT (8134) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8170 clk cpu0 MR1 037005ce:000000f005ce_NS 01 +8170 clk cpu0 R X9 0000000000000001 +8171 clk cpu0 IT (8135) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8171 clk cpu0 R X10 0000000000000001 +8172 clk cpu0 IT (8136) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8172 clk cpu0 R X10 0000000000000001 +8173 clk cpu0 IT (8137) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8173 clk cpu0 R X8 0000000003700703 +8174 clk cpu0 IT (8138) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8174 clk cpu0 MR1 03700703:000000f00703_NS 00 +8174 clk cpu0 R X9 0000000000000000 +8175 clk cpu0 IT (8139) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8175 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8175 clk cpu0 R X8 0000000003700600 +8176 clk cpu0 IT (8140) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8176 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000003 +8176 clk cpu0 R X8 0000000023000003 +8177 clk cpu0 IT (8141) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8177 clk cpu0 MW1 23000003:000016240003_NS 00 +8178 clk cpu0 IT (8142) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8178 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8178 clk cpu0 R X8 0000000003700600 +8179 clk cpu0 IT (8143) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8179 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000003 +8179 clk cpu0 R X10 0000000023000003 +8180 clk cpu0 IT (8144) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8180 clk cpu0 R X11 0000000000000001 +8181 clk cpu0 IT (8145) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8181 clk cpu0 R X10 0000000023000004 +8182 clk cpu0 IT (8146) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8182 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000004 +8183 clk cpu0 IT (8147) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8183 clk cpu0 MR1 037005ce:000000f005ce_NS 01 +8183 clk cpu0 R X8 0000000000000001 +8184 clk cpu0 IT (8148) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8184 clk cpu0 R X8 0000000000000002 +8185 clk cpu0 IT (8149) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8185 clk cpu0 MW1 037005ce:000000f005ce_NS 02 +8186 clk cpu0 IT (8150) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8187 clk cpu0 IT (8151) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8187 clk cpu0 MR1 037005ce:000000f005ce_NS 02 +8187 clk cpu0 R X8 0000000000000002 +8188 clk cpu0 IT (8152) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8188 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8188 clk cpu0 R X9 000000000000000E +8189 clk cpu0 IT (8153) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8189 clk cpu0 R cpsr 820003c5 +8190 clk cpu0 IT (8154) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8190 clk cpu0 R X8 0000000000000001 +8191 clk cpu0 IT (8155) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8192 clk cpu0 IT (8156) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8192 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8192 clk cpu0 R X8 0000000003700702 +8193 clk cpu0 IT (8157) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8193 clk cpu0 MR1 037005ce:000000f005ce_NS 02 +8193 clk cpu0 R X9 0000000000000002 +8194 clk cpu0 IT (8158) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8194 clk cpu0 R X10 0000000000000002 +8195 clk cpu0 IT (8159) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8195 clk cpu0 R X10 0000000000000002 +8196 clk cpu0 IT (8160) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8196 clk cpu0 R X8 0000000003700704 +8197 clk cpu0 IT (8161) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8197 clk cpu0 MR1 03700704:000000f00704_NS 00 +8197 clk cpu0 R X9 0000000000000000 +8198 clk cpu0 IT (8162) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8198 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8198 clk cpu0 R X8 0000000003700600 +8199 clk cpu0 IT (8163) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8199 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000004 +8199 clk cpu0 R X8 0000000023000004 +8200 clk cpu0 IT (8164) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8200 clk cpu0 MW1 23000004:000016240004_NS 00 +8201 clk cpu0 IT (8165) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8201 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8201 clk cpu0 R X8 0000000003700600 +8202 clk cpu0 IT (8166) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8202 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000004 +8202 clk cpu0 R X10 0000000023000004 +8203 clk cpu0 IT (8167) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8203 clk cpu0 R X11 0000000000000001 +8204 clk cpu0 IT (8168) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8204 clk cpu0 R X10 0000000023000005 +8205 clk cpu0 IT (8169) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8205 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000005 +8206 clk cpu0 IT (8170) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8206 clk cpu0 MR1 037005ce:000000f005ce_NS 02 +8206 clk cpu0 R X8 0000000000000002 +8207 clk cpu0 IT (8171) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8207 clk cpu0 R X8 0000000000000003 +8208 clk cpu0 IT (8172) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8208 clk cpu0 MW1 037005ce:000000f005ce_NS 03 +8209 clk cpu0 IT (8173) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8210 clk cpu0 IT (8174) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8210 clk cpu0 MR1 037005ce:000000f005ce_NS 03 +8210 clk cpu0 R X8 0000000000000003 +8211 clk cpu0 IT (8175) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8211 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8211 clk cpu0 R X9 000000000000000E +8212 clk cpu0 IT (8176) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8212 clk cpu0 R cpsr 820003c5 +8213 clk cpu0 IT (8177) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8213 clk cpu0 R X8 0000000000000001 +8214 clk cpu0 IT (8178) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8215 clk cpu0 IT (8179) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8215 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8215 clk cpu0 R X8 0000000003700702 +8216 clk cpu0 IT (8180) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8216 clk cpu0 MR1 037005ce:000000f005ce_NS 03 +8216 clk cpu0 R X9 0000000000000003 +8217 clk cpu0 IT (8181) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8217 clk cpu0 R X10 0000000000000003 +8218 clk cpu0 IT (8182) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8218 clk cpu0 R X10 0000000000000003 +8219 clk cpu0 IT (8183) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8219 clk cpu0 R X8 0000000003700705 +8220 clk cpu0 IT (8184) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8220 clk cpu0 MR1 03700705:000000f00705_NS 00 +8220 clk cpu0 R X9 0000000000000000 +8221 clk cpu0 IT (8185) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8221 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8221 clk cpu0 R X8 0000000003700600 +8222 clk cpu0 IT (8186) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8222 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000005 +8222 clk cpu0 R X8 0000000023000005 +8223 clk cpu0 IT (8187) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8223 clk cpu0 MW1 23000005:000016240005_NS 00 +8224 clk cpu0 IT (8188) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8224 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8224 clk cpu0 R X8 0000000003700600 +8225 clk cpu0 IT (8189) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8225 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000005 +8225 clk cpu0 R X10 0000000023000005 +8226 clk cpu0 IT (8190) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8226 clk cpu0 R X11 0000000000000001 +8227 clk cpu0 IT (8191) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8227 clk cpu0 R X10 0000000023000006 +8228 clk cpu0 IT (8192) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8228 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000006 +8229 clk cpu0 IT (8193) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8229 clk cpu0 MR1 037005ce:000000f005ce_NS 03 +8229 clk cpu0 R X8 0000000000000003 +8230 clk cpu0 IT (8194) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8230 clk cpu0 R X8 0000000000000004 +8231 clk cpu0 IT (8195) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8231 clk cpu0 MW1 037005ce:000000f005ce_NS 04 +8232 clk cpu0 IT (8196) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8233 clk cpu0 IT (8197) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8233 clk cpu0 MR1 037005ce:000000f005ce_NS 04 +8233 clk cpu0 R X8 0000000000000004 +8234 clk cpu0 IT (8198) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8234 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8234 clk cpu0 R X9 000000000000000E +8235 clk cpu0 IT (8199) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8235 clk cpu0 R cpsr 820003c5 +8236 clk cpu0 IT (8200) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8236 clk cpu0 R X8 0000000000000001 +8237 clk cpu0 IT (8201) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8238 clk cpu0 IT (8202) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8238 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8238 clk cpu0 R X8 0000000003700702 +8239 clk cpu0 IT (8203) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8239 clk cpu0 MR1 037005ce:000000f005ce_NS 04 +8239 clk cpu0 R X9 0000000000000004 +8240 clk cpu0 IT (8204) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8240 clk cpu0 R X10 0000000000000004 +8241 clk cpu0 IT (8205) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8241 clk cpu0 R X10 0000000000000004 +8242 clk cpu0 IT (8206) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8242 clk cpu0 R X8 0000000003700706 +8243 clk cpu0 IT (8207) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8243 clk cpu0 MR1 03700706:000000f00706_NS 00 +8243 clk cpu0 R X9 0000000000000000 +8244 clk cpu0 IT (8208) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8244 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8244 clk cpu0 R X8 0000000003700600 +8245 clk cpu0 IT (8209) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8245 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000006 +8245 clk cpu0 R X8 0000000023000006 +8246 clk cpu0 IT (8210) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8246 clk cpu0 MW1 23000006:000016240006_NS 00 +8247 clk cpu0 IT (8211) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8247 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8247 clk cpu0 R X8 0000000003700600 +8248 clk cpu0 IT (8212) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8248 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000006 +8248 clk cpu0 R X10 0000000023000006 +8249 clk cpu0 IT (8213) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8249 clk cpu0 R X11 0000000000000001 +8250 clk cpu0 IT (8214) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8250 clk cpu0 R X10 0000000023000007 +8251 clk cpu0 IT (8215) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8251 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000007 +8252 clk cpu0 IT (8216) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8252 clk cpu0 MR1 037005ce:000000f005ce_NS 04 +8252 clk cpu0 R X8 0000000000000004 +8253 clk cpu0 IT (8217) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8253 clk cpu0 R X8 0000000000000005 +8254 clk cpu0 IT (8218) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8254 clk cpu0 MW1 037005ce:000000f005ce_NS 05 +8255 clk cpu0 IT (8219) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8256 clk cpu0 IT (8220) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8256 clk cpu0 MR1 037005ce:000000f005ce_NS 05 +8256 clk cpu0 R X8 0000000000000005 +8257 clk cpu0 IT (8221) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8257 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8257 clk cpu0 R X9 000000000000000E +8258 clk cpu0 IT (8222) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8258 clk cpu0 R cpsr 820003c5 +8259 clk cpu0 IT (8223) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8259 clk cpu0 R X8 0000000000000001 +8260 clk cpu0 IT (8224) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8261 clk cpu0 IT (8225) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8261 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8261 clk cpu0 R X8 0000000003700702 +8262 clk cpu0 IT (8226) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8262 clk cpu0 MR1 037005ce:000000f005ce_NS 05 +8262 clk cpu0 R X9 0000000000000005 +8263 clk cpu0 IT (8227) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8263 clk cpu0 R X10 0000000000000005 +8264 clk cpu0 IT (8228) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8264 clk cpu0 R X10 0000000000000005 +8265 clk cpu0 IT (8229) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8265 clk cpu0 R X8 0000000003700707 +8266 clk cpu0 IT (8230) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8266 clk cpu0 MR1 03700707:000000f00707_NS 00 +8266 clk cpu0 R X9 0000000000000000 +8267 clk cpu0 IT (8231) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8267 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8267 clk cpu0 R X8 0000000003700600 +8268 clk cpu0 IT (8232) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8268 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000007 +8268 clk cpu0 R X8 0000000023000007 +8269 clk cpu0 IT (8233) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8269 clk cpu0 MW1 23000007:000016240007_NS 00 +8270 clk cpu0 IT (8234) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8270 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8270 clk cpu0 R X8 0000000003700600 +8271 clk cpu0 IT (8235) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8271 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000007 +8271 clk cpu0 R X10 0000000023000007 +8272 clk cpu0 IT (8236) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8272 clk cpu0 R X11 0000000000000001 +8273 clk cpu0 IT (8237) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8273 clk cpu0 R X10 0000000023000008 +8274 clk cpu0 IT (8238) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8274 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000008 +8275 clk cpu0 IT (8239) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8275 clk cpu0 MR1 037005ce:000000f005ce_NS 05 +8275 clk cpu0 R X8 0000000000000005 +8276 clk cpu0 IT (8240) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8276 clk cpu0 R X8 0000000000000006 +8277 clk cpu0 IT (8241) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8277 clk cpu0 MW1 037005ce:000000f005ce_NS 06 +8278 clk cpu0 IT (8242) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8279 clk cpu0 IT (8243) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8279 clk cpu0 MR1 037005ce:000000f005ce_NS 06 +8279 clk cpu0 R X8 0000000000000006 +8280 clk cpu0 IT (8244) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8280 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8280 clk cpu0 R X9 000000000000000E +8281 clk cpu0 IT (8245) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8281 clk cpu0 R cpsr 820003c5 +8282 clk cpu0 IT (8246) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8282 clk cpu0 R X8 0000000000000001 +8283 clk cpu0 IT (8247) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8284 clk cpu0 IT (8248) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8284 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8284 clk cpu0 R X8 0000000003700702 +8285 clk cpu0 IT (8249) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8285 clk cpu0 MR1 037005ce:000000f005ce_NS 06 +8285 clk cpu0 R X9 0000000000000006 +8286 clk cpu0 IT (8250) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8286 clk cpu0 R X10 0000000000000006 +8287 clk cpu0 IT (8251) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8287 clk cpu0 R X10 0000000000000006 +8288 clk cpu0 IT (8252) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8288 clk cpu0 R X8 0000000003700708 +8289 clk cpu0 IT (8253) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8289 clk cpu0 MR1 03700708:000000f00708_NS 00 +8289 clk cpu0 R X9 0000000000000000 +8290 clk cpu0 IT (8254) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8290 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8290 clk cpu0 R X8 0000000003700600 +8291 clk cpu0 IT (8255) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8291 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000008 +8291 clk cpu0 R X8 0000000023000008 +8292 clk cpu0 IT (8256) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8292 clk cpu0 MW1 23000008:000016240008_NS 00 +8293 clk cpu0 IT (8257) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8293 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8293 clk cpu0 R X8 0000000003700600 +8294 clk cpu0 IT (8258) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8294 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000008 +8294 clk cpu0 R X10 0000000023000008 +8295 clk cpu0 IT (8259) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8295 clk cpu0 R X11 0000000000000001 +8296 clk cpu0 IT (8260) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8296 clk cpu0 R X10 0000000023000009 +8297 clk cpu0 IT (8261) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8297 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000009 +8298 clk cpu0 IT (8262) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8298 clk cpu0 MR1 037005ce:000000f005ce_NS 06 +8298 clk cpu0 R X8 0000000000000006 +8299 clk cpu0 IT (8263) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8299 clk cpu0 R X8 0000000000000007 +8300 clk cpu0 IT (8264) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8300 clk cpu0 MW1 037005ce:000000f005ce_NS 07 +8301 clk cpu0 IT (8265) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8302 clk cpu0 IT (8266) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8302 clk cpu0 MR1 037005ce:000000f005ce_NS 07 +8302 clk cpu0 R X8 0000000000000007 +8303 clk cpu0 IT (8267) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8303 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8303 clk cpu0 R X9 000000000000000E +8304 clk cpu0 IT (8268) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8304 clk cpu0 R cpsr 820003c5 +8305 clk cpu0 IT (8269) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8305 clk cpu0 R X8 0000000000000001 +8306 clk cpu0 IT (8270) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8307 clk cpu0 IT (8271) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8307 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8307 clk cpu0 R X8 0000000003700702 +8308 clk cpu0 IT (8272) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8308 clk cpu0 MR1 037005ce:000000f005ce_NS 07 +8308 clk cpu0 R X9 0000000000000007 +8309 clk cpu0 IT (8273) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8309 clk cpu0 R X10 0000000000000007 +8310 clk cpu0 IT (8274) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8310 clk cpu0 R X10 0000000000000007 +8311 clk cpu0 IT (8275) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8311 clk cpu0 R X8 0000000003700709 +8312 clk cpu0 IT (8276) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8312 clk cpu0 MR1 03700709:000000f00709_NS 00 +8312 clk cpu0 R X9 0000000000000000 +8313 clk cpu0 IT (8277) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8313 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8313 clk cpu0 R X8 0000000003700600 +8314 clk cpu0 IT (8278) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8314 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000009 +8314 clk cpu0 R X8 0000000023000009 +8315 clk cpu0 IT (8279) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8315 clk cpu0 MW1 23000009:000016240009_NS 00 +8316 clk cpu0 IT (8280) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8316 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8316 clk cpu0 R X8 0000000003700600 +8317 clk cpu0 IT (8281) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8317 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000009 +8317 clk cpu0 R X10 0000000023000009 +8318 clk cpu0 IT (8282) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8318 clk cpu0 R X11 0000000000000001 +8319 clk cpu0 IT (8283) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8319 clk cpu0 R X10 000000002300000A +8320 clk cpu0 IT (8284) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8320 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300000a +8321 clk cpu0 IT (8285) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8321 clk cpu0 MR1 037005ce:000000f005ce_NS 07 +8321 clk cpu0 R X8 0000000000000007 +8322 clk cpu0 IT (8286) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8322 clk cpu0 R X8 0000000000000008 +8323 clk cpu0 IT (8287) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8323 clk cpu0 MW1 037005ce:000000f005ce_NS 08 +8324 clk cpu0 IT (8288) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8325 clk cpu0 IT (8289) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8325 clk cpu0 MR1 037005ce:000000f005ce_NS 08 +8325 clk cpu0 R X8 0000000000000008 +8326 clk cpu0 IT (8290) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8326 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8326 clk cpu0 R X9 000000000000000E +8327 clk cpu0 IT (8291) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8327 clk cpu0 R cpsr 820003c5 +8328 clk cpu0 IT (8292) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8328 clk cpu0 R X8 0000000000000001 +8329 clk cpu0 IT (8293) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8330 clk cpu0 IT (8294) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8330 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8330 clk cpu0 R X8 0000000003700702 +8331 clk cpu0 IT (8295) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8331 clk cpu0 MR1 037005ce:000000f005ce_NS 08 +8331 clk cpu0 R X9 0000000000000008 +8332 clk cpu0 IT (8296) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8332 clk cpu0 R X10 0000000000000008 +8333 clk cpu0 IT (8297) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8333 clk cpu0 R X10 0000000000000008 +8334 clk cpu0 IT (8298) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8334 clk cpu0 R X8 000000000370070A +8335 clk cpu0 IT (8299) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8335 clk cpu0 MR1 0370070a:000000f0070a_NS 00 +8335 clk cpu0 R X9 0000000000000000 +8336 clk cpu0 IT (8300) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8336 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8336 clk cpu0 R X8 0000000003700600 +8337 clk cpu0 IT (8301) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8337 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000a +8337 clk cpu0 R X8 000000002300000A +8338 clk cpu0 IT (8302) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8338 clk cpu0 MW1 2300000a:00001624000a_NS 00 +8339 clk cpu0 IT (8303) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8339 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8339 clk cpu0 R X8 0000000003700600 +8340 clk cpu0 IT (8304) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8340 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000a +8340 clk cpu0 R X10 000000002300000A +8341 clk cpu0 IT (8305) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8341 clk cpu0 R X11 0000000000000001 +8342 clk cpu0 IT (8306) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8342 clk cpu0 R X10 000000002300000B +8343 clk cpu0 IT (8307) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8343 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300000b +8344 clk cpu0 IT (8308) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8344 clk cpu0 MR1 037005ce:000000f005ce_NS 08 +8344 clk cpu0 R X8 0000000000000008 +8345 clk cpu0 IT (8309) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8345 clk cpu0 R X8 0000000000000009 +8346 clk cpu0 IT (8310) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8346 clk cpu0 MW1 037005ce:000000f005ce_NS 09 +8347 clk cpu0 IT (8311) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8348 clk cpu0 IT (8312) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8348 clk cpu0 MR1 037005ce:000000f005ce_NS 09 +8348 clk cpu0 R X8 0000000000000009 +8349 clk cpu0 IT (8313) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8349 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8349 clk cpu0 R X9 000000000000000E +8350 clk cpu0 IT (8314) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8350 clk cpu0 R cpsr 820003c5 +8351 clk cpu0 IT (8315) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8351 clk cpu0 R X8 0000000000000001 +8352 clk cpu0 IT (8316) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8353 clk cpu0 IT (8317) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8353 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8353 clk cpu0 R X8 0000000003700702 +8354 clk cpu0 IT (8318) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8354 clk cpu0 MR1 037005ce:000000f005ce_NS 09 +8354 clk cpu0 R X9 0000000000000009 +8355 clk cpu0 IT (8319) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8355 clk cpu0 R X10 0000000000000009 +8356 clk cpu0 IT (8320) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8356 clk cpu0 R X10 0000000000000009 +8357 clk cpu0 IT (8321) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8357 clk cpu0 R X8 000000000370070B +8358 clk cpu0 IT (8322) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8358 clk cpu0 MR1 0370070b:000000f0070b_NS 00 +8358 clk cpu0 R X9 0000000000000000 +8359 clk cpu0 IT (8323) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8359 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8359 clk cpu0 R X8 0000000003700600 +8360 clk cpu0 IT (8324) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8360 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000b +8360 clk cpu0 R X8 000000002300000B +8361 clk cpu0 IT (8325) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8361 clk cpu0 MW1 2300000b:00001624000b_NS 00 +8362 clk cpu0 IT (8326) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8362 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8362 clk cpu0 R X8 0000000003700600 +8363 clk cpu0 IT (8327) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8363 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000b +8363 clk cpu0 R X10 000000002300000B +8364 clk cpu0 IT (8328) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8364 clk cpu0 R X11 0000000000000001 +8365 clk cpu0 IT (8329) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8365 clk cpu0 R X10 000000002300000C +8366 clk cpu0 IT (8330) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8366 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300000c +8367 clk cpu0 IT (8331) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8367 clk cpu0 MR1 037005ce:000000f005ce_NS 09 +8367 clk cpu0 R X8 0000000000000009 +8368 clk cpu0 IT (8332) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8368 clk cpu0 R X8 000000000000000A +8369 clk cpu0 IT (8333) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8369 clk cpu0 MW1 037005ce:000000f005ce_NS 0a +8370 clk cpu0 IT (8334) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8371 clk cpu0 IT (8335) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8371 clk cpu0 MR1 037005ce:000000f005ce_NS 0a +8371 clk cpu0 R X8 000000000000000A +8372 clk cpu0 IT (8336) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8372 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8372 clk cpu0 R X9 000000000000000E +8373 clk cpu0 IT (8337) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8373 clk cpu0 R cpsr 820003c5 +8374 clk cpu0 IT (8338) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8374 clk cpu0 R X8 0000000000000001 +8375 clk cpu0 IT (8339) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8376 clk cpu0 IT (8340) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8376 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8376 clk cpu0 R X8 0000000003700702 +8377 clk cpu0 IT (8341) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8377 clk cpu0 MR1 037005ce:000000f005ce_NS 0a +8377 clk cpu0 R X9 000000000000000A +8378 clk cpu0 IT (8342) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8378 clk cpu0 R X10 000000000000000A +8379 clk cpu0 IT (8343) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8379 clk cpu0 R X10 000000000000000A +8380 clk cpu0 IT (8344) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8380 clk cpu0 R X8 000000000370070C +8381 clk cpu0 IT (8345) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8381 clk cpu0 MR1 0370070c:000000f0070c_NS 00 +8381 clk cpu0 R X9 0000000000000000 +8382 clk cpu0 IT (8346) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8382 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8382 clk cpu0 R X8 0000000003700600 +8383 clk cpu0 IT (8347) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8383 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000c +8383 clk cpu0 R X8 000000002300000C +8384 clk cpu0 IT (8348) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8384 clk cpu0 MW1 2300000c:00001624000c_NS 00 +8385 clk cpu0 IT (8349) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8385 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8385 clk cpu0 R X8 0000000003700600 +8386 clk cpu0 IT (8350) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8386 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000c +8386 clk cpu0 R X10 000000002300000C +8387 clk cpu0 IT (8351) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8387 clk cpu0 R X11 0000000000000001 +8388 clk cpu0 IT (8352) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8388 clk cpu0 R X10 000000002300000D +8389 clk cpu0 IT (8353) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8389 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300000d +8390 clk cpu0 IT (8354) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8390 clk cpu0 MR1 037005ce:000000f005ce_NS 0a +8390 clk cpu0 R X8 000000000000000A +8391 clk cpu0 IT (8355) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8391 clk cpu0 R X8 000000000000000B +8392 clk cpu0 IT (8356) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8392 clk cpu0 MW1 037005ce:000000f005ce_NS 0b +8393 clk cpu0 IT (8357) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8394 clk cpu0 IT (8358) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8394 clk cpu0 MR1 037005ce:000000f005ce_NS 0b +8394 clk cpu0 R X8 000000000000000B +8395 clk cpu0 IT (8359) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8395 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8395 clk cpu0 R X9 000000000000000E +8396 clk cpu0 IT (8360) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8396 clk cpu0 R cpsr 820003c5 +8397 clk cpu0 IT (8361) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8397 clk cpu0 R X8 0000000000000001 +8398 clk cpu0 IT (8362) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8399 clk cpu0 IT (8363) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8399 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8399 clk cpu0 R X8 0000000003700702 +8400 clk cpu0 IT (8364) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8400 clk cpu0 MR1 037005ce:000000f005ce_NS 0b +8400 clk cpu0 R X9 000000000000000B +8401 clk cpu0 IT (8365) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8401 clk cpu0 R X10 000000000000000B +8402 clk cpu0 IT (8366) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8402 clk cpu0 R X10 000000000000000B +8403 clk cpu0 IT (8367) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8403 clk cpu0 R X8 000000000370070D +8404 clk cpu0 IT (8368) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8404 clk cpu0 MR1 0370070d:000000f0070d_NS 00 +8404 clk cpu0 R X9 0000000000000000 +8405 clk cpu0 IT (8369) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8405 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8405 clk cpu0 R X8 0000000003700600 +8406 clk cpu0 IT (8370) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8406 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000d +8406 clk cpu0 R X8 000000002300000D +8407 clk cpu0 IT (8371) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8407 clk cpu0 MW1 2300000d:00001624000d_NS 00 +8408 clk cpu0 IT (8372) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8408 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8408 clk cpu0 R X8 0000000003700600 +8409 clk cpu0 IT (8373) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8409 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000d +8409 clk cpu0 R X10 000000002300000D +8410 clk cpu0 IT (8374) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8410 clk cpu0 R X11 0000000000000001 +8411 clk cpu0 IT (8375) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8411 clk cpu0 R X10 000000002300000E +8412 clk cpu0 IT (8376) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8412 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300000e +8413 clk cpu0 IT (8377) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8413 clk cpu0 MR1 037005ce:000000f005ce_NS 0b +8413 clk cpu0 R X8 000000000000000B +8414 clk cpu0 IT (8378) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8414 clk cpu0 R X8 000000000000000C +8415 clk cpu0 IT (8379) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8415 clk cpu0 MW1 037005ce:000000f005ce_NS 0c +8416 clk cpu0 IT (8380) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8417 clk cpu0 IT (8381) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8417 clk cpu0 MR1 037005ce:000000f005ce_NS 0c +8417 clk cpu0 R X8 000000000000000C +8418 clk cpu0 IT (8382) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8418 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8418 clk cpu0 R X9 000000000000000E +8419 clk cpu0 IT (8383) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8419 clk cpu0 R cpsr 820003c5 +8420 clk cpu0 IT (8384) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8420 clk cpu0 R X8 0000000000000001 +8421 clk cpu0 IT (8385) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8422 clk cpu0 IT (8386) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8422 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8422 clk cpu0 R X8 0000000003700702 +8423 clk cpu0 IT (8387) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8423 clk cpu0 MR1 037005ce:000000f005ce_NS 0c +8423 clk cpu0 R X9 000000000000000C +8424 clk cpu0 IT (8388) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8424 clk cpu0 R X10 000000000000000C +8425 clk cpu0 IT (8389) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8425 clk cpu0 R X10 000000000000000C +8426 clk cpu0 IT (8390) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8426 clk cpu0 R X8 000000000370070E +8427 clk cpu0 IT (8391) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8427 clk cpu0 MR1 0370070e:000000f0070e_NS 00 +8427 clk cpu0 R X9 0000000000000000 +8428 clk cpu0 IT (8392) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8428 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8428 clk cpu0 R X8 0000000003700600 +8429 clk cpu0 IT (8393) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8429 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000e +8429 clk cpu0 R X8 000000002300000E +8430 clk cpu0 IT (8394) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8430 clk cpu0 MW1 2300000e:00001624000e_NS 00 +8431 clk cpu0 IT (8395) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8431 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8431 clk cpu0 R X8 0000000003700600 +8432 clk cpu0 IT (8396) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8432 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000e +8432 clk cpu0 R X10 000000002300000E +8433 clk cpu0 IT (8397) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8433 clk cpu0 R X11 0000000000000001 +8434 clk cpu0 IT (8398) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8434 clk cpu0 R X10 000000002300000F +8435 clk cpu0 IT (8399) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8435 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300000f +8436 clk cpu0 IT (8400) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8436 clk cpu0 MR1 037005ce:000000f005ce_NS 0c +8436 clk cpu0 R X8 000000000000000C +8437 clk cpu0 IT (8401) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8437 clk cpu0 R X8 000000000000000D +8438 clk cpu0 IT (8402) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8438 clk cpu0 MW1 037005ce:000000f005ce_NS 0d +8439 clk cpu0 IT (8403) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8440 clk cpu0 IT (8404) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8440 clk cpu0 MR1 037005ce:000000f005ce_NS 0d +8440 clk cpu0 R X8 000000000000000D +8441 clk cpu0 IT (8405) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8441 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8441 clk cpu0 R X9 000000000000000E +8442 clk cpu0 IT (8406) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8442 clk cpu0 R cpsr 820003c5 +8443 clk cpu0 IT (8407) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8443 clk cpu0 R X8 0000000000000001 +8444 clk cpu0 IT (8408) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8445 clk cpu0 IT (8409) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +8445 clk cpu0 MR8 037005d0:000000f005d0_NS 00000000_03700702 +8445 clk cpu0 R X8 0000000003700702 +8446 clk cpu0 IT (8410) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +8446 clk cpu0 MR1 037005ce:000000f005ce_NS 0d +8446 clk cpu0 R X9 000000000000000D +8447 clk cpu0 IT (8411) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +8447 clk cpu0 R X10 000000000000000D +8448 clk cpu0 IT (8412) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +8448 clk cpu0 R X10 000000000000000D +8449 clk cpu0 IT (8413) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8449 clk cpu0 R X8 000000000370070F +8450 clk cpu0 IT (8414) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +8450 clk cpu0 MR1 0370070f:000000f0070f_NS 00 +8450 clk cpu0 R X9 0000000000000000 +8451 clk cpu0 IT (8415) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8451 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8451 clk cpu0 R X8 0000000003700600 +8452 clk cpu0 IT (8416) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +8452 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000f +8452 clk cpu0 R X8 000000002300000F +8453 clk cpu0 IT (8417) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +8453 clk cpu0 MW1 2300000f:00001624000f_NS 00 +8454 clk cpu0 IT (8418) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +8454 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_03700600 +8454 clk cpu0 R X8 0000000003700600 +8455 clk cpu0 IT (8419) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +8455 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300000f +8455 clk cpu0 R X10 000000002300000F +8456 clk cpu0 IT (8420) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +8456 clk cpu0 R X11 0000000000000001 +8457 clk cpu0 IT (8421) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +8457 clk cpu0 R X10 0000000023000010 +8458 clk cpu0 IT (8422) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +8458 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000010 +8459 clk cpu0 IT (8423) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8459 clk cpu0 MR1 037005ce:000000f005ce_NS 0d +8459 clk cpu0 R X8 000000000000000D +8460 clk cpu0 IT (8424) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +8460 clk cpu0 R X8 000000000000000E +8461 clk cpu0 IT (8425) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +8461 clk cpu0 MW1 037005ce:000000f005ce_NS 0e +8462 clk cpu0 IT (8426) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +8463 clk cpu0 IT (8427) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +8463 clk cpu0 MR1 037005ce:000000f005ce_NS 0e +8463 clk cpu0 R X8 000000000000000E +8464 clk cpu0 IT (8428) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +8464 clk cpu0 MR1 037005cf:000000f005cf_NS 0e +8464 clk cpu0 R X9 000000000000000E +8465 clk cpu0 IT (8429) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +8465 clk cpu0 R cpsr 620003c5 +8466 clk cpu0 IT (8430) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +8466 clk cpu0 R X8 0000000000000000 +8467 clk cpu0 IS (8431) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +8468 clk cpu0 IT (8432) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +8469 clk cpu0 IT (8433) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +8469 clk cpu0 R SP_EL1 00000000037005E0 +8470 clk cpu0 IT (8434) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +8471 clk cpu0 IT (8435) 00011384:000010011384_NS f94013e0 O EL1h_n : LDR x0,[sp,#0x20] +8471 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000010 +8471 clk cpu0 R X0 0000000023000010 +8472 clk cpu0 IT (8436) 00011388:000010011388_NS f9401bfe O EL1h_n : LDR x30,[sp,#0x30] +8472 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00010a30 +8472 clk cpu0 R X30 0000000000010A30 +8473 clk cpu0 IT (8437) 0001138c:00001001138c_NS 910103ff O EL1h_n : ADD sp,sp,#0x40 +8473 clk cpu0 R SP_EL1 0000000003700620 +8474 clk cpu0 IT (8438) 00011390:000010011390_NS d65f03c0 O EL1h_n : RET +8475 clk cpu0 IT (8439) 00010a30:000010010a30_NS f94043e9 O EL1h_n : LDR x9,[sp,#0x80] +8475 clk cpu0 MR8 037006a0:000000f006a0_NS 00000000_03008530 +8475 clk cpu0 R X9 0000000003008530 +8476 clk cpu0 IT (8440) 00010a34:000010010a34_NS f9000120 O EL1h_n : STR x0,[x9,#0] +8476 clk cpu0 MW8 03008530:000000808530_NS 00000000_23000010 +8477 clk cpu0 IT (8441) 00010a38:000010010a38_NS b940cfe8 O EL1h_n : LDR w8,[sp,#0xcc] +8477 clk cpu0 MR4 037006ec:000000f006ec_NS 00000000 +8477 clk cpu0 R X8 0000000000000000 +8478 clk cpu0 IT (8442) 00010a3c:000010010a3c_NS f9405fea O EL1h_n : LDR x10,[sp,#0xb8] +8478 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +8478 clk cpu0 R X10 0000000003700790 +8478 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0053 ALLOC 0x000010010a40_NS +8478 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0291 ALLOC 0x000010010a40_NS +8479 clk cpu0 IT (8443) 00010a40:000010010a40_NS f940014b O EL1h_n : LDR x11,[x10,#0] +8479 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +8479 clk cpu0 R X11 0000000000000001 +8480 clk cpu0 IT (8444) 00010a44:000010010a44_NS f100017f O EL1h_n : CMP x11,#0 +8480 clk cpu0 R cpsr 220003c5 +8481 clk cpu0 IT (8445) 00010a48:000010010a48_NS 1a9f17ec O EL1h_n : CSET w12,EQ +8481 clk cpu0 R X12 0000000000000000 +8482 clk cpu0 IT (8446) 00010a4c:000010010a4c_NS b9405fed O EL1h_n : LDR w13,[sp,#0x5c] +8482 clk cpu0 MR4 0370067c:000000f0067c_NS 00000001 +8482 clk cpu0 R X13 0000000000000001 +8483 clk cpu0 IT (8447) 00010a50:000010010a50_NS 0a0d018c O EL1h_n : AND w12,w12,w13 +8483 clk cpu0 R X12 0000000000000000 +8484 clk cpu0 IT (8448) 00010a54:000010010a54_NS 0a0c0108 O EL1h_n : AND w8,w8,w12 +8484 clk cpu0 R X8 0000000000000000 +8485 clk cpu0 IS (8449) 00010a58:000010010a58_NS 35000048 O EL1h_n : CBNZ w8,0x10a60 +8486 clk cpu0 IT (8450) 00010a5c:000010010a5c_NS 14000004 O EL1h_n : B 0x10a6c +8487 clk cpu0 IT (8451) 00010a6c:000010010a6c_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +8487 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +8487 clk cpu0 R X8 0000000003700790 +8488 clk cpu0 IT (8452) 00010a70:000010010a70_NS f9400109 O EL1h_n : LDR x9,[x8,#0] +8488 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +8488 clk cpu0 R X9 0000000000000001 +8489 clk cpu0 IT (8453) 00010a74:000010010a74_NS f9002be9 O EL1h_n : STR x9,[sp,#0x50] +8489 clk cpu0 MW8 03700670:000000f00670_NS 00000000_00000001 +8490 clk cpu0 IT (8454) 00010a78:000010010a78_NS f9402be8 O EL1h_n : LDR x8,[sp,#0x50] +8490 clk cpu0 MR8 03700670:000000f00670_NS 00000000_00000001 +8490 clk cpu0 R X8 0000000000000001 +8491 clk cpu0 IT (8455) 00010a7c:000010010a7c_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +8491 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +8491 clk cpu0 R X9 0000000003700790 +8491 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0055 ALLOC 0x000010010a80_NS +8491 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 02a1 ALLOC 0x000010010a80_NS +8492 clk cpu0 IT (8456) 00010a80:000010010a80_NS f9000128 O EL1h_n : STR x8,[x9,#0] +8492 clk cpu0 MW8 03700790:000000f00790_NS 00000000_00000001 +8493 clk cpu0 IT (8457) 00010a84:000010010a84_NS f9406be8 O EL1h_n : LDR x8,[sp,#0xd0] +8493 clk cpu0 MR8 037006f0:000000f006f0_NS 00000000_23002000 +8493 clk cpu0 R X8 0000000023002000 +8494 clk cpu0 IT (8458) 00010a88:000010010a88_NS 9281ffea O EL1h_n : MOV x10,#0xfffffffffffff000 +8494 clk cpu0 R X10 FFFFFFFFFFFFF000 +8495 clk cpu0 IT (8459) 00010a8c:000010010a8c_NS 8a0a0100 O EL1h_n : AND x0,x8,x10 +8495 clk cpu0 R X0 0000000023002000 +8496 clk cpu0 IT (8460) 00010a90:000010010a90_NS f9400521 O EL1h_n : LDR x1,[x9,#8] +8496 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +8496 clk cpu0 R X1 0000000000000000 +8497 clk cpu0 IT (8461) 00010a94:000010010a94_NS f9400122 O EL1h_n : LDR x2,[x9,#0] +8497 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +8497 clk cpu0 R X2 0000000000000001 +8498 clk cpu0 IT (8462) 00010a98:000010010a98_NS f90027ea O EL1h_n : STR x10,[sp,#0x48] +8498 clk cpu0 MW8 03700668:000000f00668_NS ffffffff_fffff000 +8499 clk cpu0 IT (8463) 00010a9c:000010010a9c_NS 9402506f O EL1h_n : BL 0xa4c58 +8499 clk cpu0 R X30 0000000000010AA0 +8499 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0062 INVAL 0x000010090c40 +8499 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0062 ALLOC 0x0000100a4c40_NS +8499 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1310 ALLOC 0x0000100a4c40_NS +8500 clk cpu0 IT (8464) 000a4c58:0000100a4c58_NS f100043f O EL1h_n : CMP x1,#1 +8500 clk cpu0 R cpsr 820003c5 +8501 clk cpu0 IT (8465) 000a4c5c:0000100a4c5c_NS 5400014b O EL1h_n : B.LT 0xa4c84 +8501 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0065 INVAL 0x000010020c80_NS +8501 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0065 ALLOC 0x0000100a4c80_NS +8501 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1321 ALLOC 0x0000100a4c80_NS +8502 clk cpu0 IT (8466) 000a4c84:0000100a4c84_NS aa0003e1 O EL1h_n : MOV x1,x0 +8502 clk cpu0 R X1 0000000023002000 +8503 clk cpu0 IT (8467) 000a4c88:0000100a4c88_NS d28000e0 O EL1h_n : MOV x0,#7 +8503 clk cpu0 R X0 0000000000000007 +8504 clk cpu0 IT (8468) 000a4c8c:0000100a4c8c_NS 32110000 O EL1h_n : ORR w0,w0,#0x8000 +8504 clk cpu0 R X0 0000000000008007 +8505 clk cpu0 IT (8469) 000a4c90:0000100a4c90_NS f2a005a0 O EL1h_n : MOVK x0,#0x2d,LSL #16 +8505 clk cpu0 R X0 00000000002D8007 +8506 clk cpu0 IT (8470) 000a4c94:0000100a4c94_NS d40000e1 O EL1h_n : SVC #7 +8506 clk cpu0 E 000a4c94:0000100a4c94_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +8506 clk cpu0 R cpsr 820003c5 +8506 clk cpu0 R PMBIDR_EL1 00000030 +8506 clk cpu0 R ESR_EL1 56000007 +8506 clk cpu0 R SPSR_EL1 820003c5 +8506 clk cpu0 R TRBIDR_EL1 000000000000002b +8506 clk cpu0 R ELR_EL1 00000000000a4c98 +8507 clk cpu0 IT (8471) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +8508 clk cpu0 IT (8472) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +8508 clk cpu0 R SP_EL1 0000000003700520 +8509 clk cpu0 IT (8473) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +8509 clk cpu0 MW8 03700520:000000f00520_NS 00000000_002d8007 +8509 clk cpu0 MW8 03700528:000000f00528_NS 00000000_23002000 +8510 clk cpu0 IT (8474) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +8510 clk cpu0 R X0 0000000056000007 +8511 clk cpu0 IT (8475) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +8511 clk cpu0 R X1 0000000000000015 +8512 clk cpu0 IT (8476) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +8512 clk cpu0 R cpsr 620003c5 +8513 clk cpu0 IT (8477) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +8514 clk cpu0 IT (8478) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +8514 clk cpu0 R X1 0000000000000007 +8515 clk cpu0 IT (8479) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +8515 clk cpu0 R cpsr 220003c5 +8516 clk cpu0 IS (8480) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +8517 clk cpu0 IT (8481) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +8517 clk cpu0 R cpsr 820003c5 +8518 clk cpu0 IS (8482) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +8519 clk cpu0 IT (8483) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +8519 clk cpu0 R cpsr 820003c5 +8520 clk cpu0 IS (8484) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +8521 clk cpu0 IT (8485) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +8521 clk cpu0 R cpsr 620003c5 +8522 clk cpu0 IT (8486) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +8523 clk cpu0 IT (8487) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +8523 clk cpu0 MR8 03700520:000000f00520_NS 00000000_002d8007 +8523 clk cpu0 MR8 03700528:000000f00528_NS 00000000_23002000 +8523 clk cpu0 R X0 00000000002D8007 +8523 clk cpu0 R X1 0000000023002000 +8524 clk cpu0 IT (8488) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +8524 clk cpu0 R SP_EL1 0000000003700620 +8525 clk cpu0 IT (8489) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +8525 clk cpu0 R cpsr 220003c5 +8526 clk cpu0 IT (8490) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +8527 clk cpu0 IT (8491) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +8527 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +8527 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000fffe0 +8527 clk cpu0 R SP_EL1 0000000003700610 +8528 clk cpu0 IT (8492) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8528 clk cpu0 MW8 03700600:000000f00600_NS 00000000_002d8007 +8528 clk cpu0 MW8 03700608:000000f00608_NS 00000000_23002000 +8528 clk cpu0 R SP_EL1 0000000003700600 +8529 clk cpu0 IT (8493) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +8529 clk cpu0 R X5 0000000000000000 +8530 clk cpu0 IT (8494) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +8530 clk cpu0 R X1 0000000000000000 +8531 clk cpu0 IT (8495) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +8531 clk cpu0 R cpsr 820003c5 +8532 clk cpu0 IT (8496) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8532 clk cpu0 MR8 03700600:000000f00600_NS 00000000_002d8007 +8532 clk cpu0 MR8 03700608:000000f00608_NS 00000000_23002000 +8532 clk cpu0 R SP_EL1 0000000003700610 +8532 clk cpu0 R X0 00000000002D8007 +8532 clk cpu0 R X1 0000000023002000 +8533 clk cpu0 IT (8497) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +8534 clk cpu0 IT (8498) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +8534 clk cpu0 MW8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8534 clk cpu0 MW8 03700608:000000f00608_NS 0001ffff_fe000000 +8534 clk cpu0 R SP_EL1 0000000003700600 +8535 clk cpu0 IT (8499) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +8535 clk cpu0 R X6 0000000000000001 +8536 clk cpu0 IT (8500) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +8536 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +8536 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000001 +8536 clk cpu0 R SP_EL1 00000000037005F0 +8537 clk cpu0 IT (8501) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8537 clk cpu0 MW8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8537 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00010aa0 +8537 clk cpu0 R SP_EL1 00000000037005E0 +8538 clk cpu0 IT (8502) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +8538 clk cpu0 R X3 0000000000000000 +8539 clk cpu0 IT (8503) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +8539 clk cpu0 R cpsr 820003c5 +8540 clk cpu0 IS (8504) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +8541 clk cpu0 IT (8505) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +8541 clk cpu0 R X3 0000000000000000 +8542 clk cpu0 IT (8506) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +8542 clk cpu0 R cpsr 820003c5 +8543 clk cpu0 IS (8507) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +8544 clk cpu0 IT (8508) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +8544 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +8544 clk cpu0 R X2 0000000000035A00 +8544 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0021 CLEAN 0x00001084c400_NS +8544 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0021 INVAL 0x00001084c400_NS +8544 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0021 ALLOC 0x000010040400_NS +8544 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1101 ALLOC 0x00001084c400_NS +8544 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0105 ALLOC 0x000010040400_NS +8545 clk cpu0 IT (8509) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +8546 clk cpu0 IT (8510) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +8546 clk cpu0 R X3 000000000000005B +8547 clk cpu0 IT (8511) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +8547 clk cpu0 R X3 000000000000005B +8548 clk cpu0 IT (8512) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +8548 clk cpu0 R X3 00000000000002D8 +8549 clk cpu0 IT (8513) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +8549 clk cpu0 R X2 0000000000035CD8 +8550 clk cpu0 IT (8514) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +8550 clk cpu0 MR8 00035cd8:000010035cd8_NS 00000000_00036e30 +8550 clk cpu0 R X4 0000000000036E30 +8550 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00e6 ALLOC 0x000010035cc0_NS +8550 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1730 ALLOC 0x000010035cc0_NS +8551 clk cpu0 IT (8515) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +8551 clk cpu0 R cpsr 82000bc5 +8551 clk cpu0 R X30 0000000000035990 +8551 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0171 ALLOC 0x000010036e00_NS +8551 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1b80 ALLOC 0x000010036e00_NS +8552 clk cpu0 IT (8516) 00036e30:000010036e30_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8552 clk cpu0 MW8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8552 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00035990 +8552 clk cpu0 R cpsr 820003c5 +8552 clk cpu0 R SP_EL1 00000000037005D0 +8553 clk cpu0 IT (8517) 00036e34:000010036e34_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8553 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_002d8007 +8553 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_23002000 +8553 clk cpu0 R SP_EL1 00000000037005C0 +8554 clk cpu0 IT (8518) 00036e38:000010036e38_NS d503201f O EL1h_n : NOP +8555 clk cpu0 IT (8519) 00036e3c:000010036e3c_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8555 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_002d8007 +8555 clk cpu0 MR8 037005c8:000000f005c8_NS 00000000_23002000 +8555 clk cpu0 R SP_EL1 00000000037005D0 +8555 clk cpu0 R X0 00000000002D8007 +8555 clk cpu0 R X1 0000000023002000 +8555 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0173 INVAL 0x00001003ae40_NS +8555 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0173 ALLOC 0x000010036e40_NS +8555 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1b90 ALLOC 0x000010036e40_NS +8556 clk cpu0 IT (8520) 00036e40:000010036e40_NS d5189b41 O EL1h_n : MSR s3_0_c9_c11_2,x1 +8556 clk cpu0 R TRBBASER_EL1 00000000:23002000 +8557 clk cpu0 IT (8521) 00036e44:000010036e44_NS d5033fdf O EL1h_n : ISB +8557 clk cpu0 R PMBIDR_EL1 00000030 +8557 clk cpu0 R TRBBASER_EL1 0000000023002000 +8557 clk cpu0 R TRBIDR_EL1 000000000000002b +8558 clk cpu0 IT (8522) 00036e48:000010036e48_NS d503201f O EL1h_n : NOP +8559 clk cpu0 IT (8523) 00036e4c:000010036e4c_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8559 clk cpu0 MR8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8559 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00035990 +8559 clk cpu0 R SP_EL1 00000000037005E0 +8559 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8559 clk cpu0 R X30 0000000000035990 +8560 clk cpu0 IT (8524) 00036e50:000010036e50_NS d65f03c0 O EL1h_n : RET +8561 clk cpu0 IT (8525) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8561 clk cpu0 MR8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8561 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00010aa0 +8561 clk cpu0 R SP_EL1 00000000037005F0 +8561 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8561 clk cpu0 R X30 0000000000010AA0 +8562 clk cpu0 IT (8526) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +8562 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +8562 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000001 +8562 clk cpu0 R SP_EL1 0000000003700600 +8562 clk cpu0 R X2 0000000000000001 +8562 clk cpu0 R X3 0000000000000001 +8563 clk cpu0 IT (8527) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +8563 clk cpu0 MR8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8563 clk cpu0 MR8 03700608:000000f00608_NS 0001ffff_fe000000 +8563 clk cpu0 R SP_EL1 0000000003700610 +8563 clk cpu0 R X6 E7FFE7FFE7FFE7FF +8563 clk cpu0 R X7 0001FFFFFE000000 +8564 clk cpu0 IT (8528) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +8564 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +8564 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000fffe0 +8564 clk cpu0 R SP_EL1 0000000003700620 +8564 clk cpu0 R X4 0000000000000000 +8564 clk cpu0 R X5 00000000000FFFE0 +8565 clk cpu0 IT (8529) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +8565 clk cpu0 R cpsr 820003c5 +8565 clk cpu0 R PMBIDR_EL1 00000030 +8565 clk cpu0 R TRBIDR_EL1 000000000000002b +8566 clk cpu0 IT (8530) 000a4c98:0000100a4c98_NS d65f03c0 O EL1h_n : RET +8567 clk cpu0 IT (8531) 00010aa0:000010010aa0_NS f9406be8 O EL1h_n : LDR x8,[sp,#0xd0] +8567 clk cpu0 MR8 037006f0:000000f006f0_NS 00000000_23002000 +8567 clk cpu0 R X8 0000000023002000 +8568 clk cpu0 IT (8532) 00010aa4:000010010aa4_NS f94027e9 O EL1h_n : LDR x9,[sp,#0x48] +8568 clk cpu0 MR8 03700668:000000f00668_NS ffffffff_fffff000 +8568 clk cpu0 R X9 FFFFFFFFFFFFF000 +8569 clk cpu0 IT (8533) 00010aa8:000010010aa8_NS 8a090100 O EL1h_n : AND x0,x8,x9 +8569 clk cpu0 R X0 0000000023002000 +8570 clk cpu0 IT (8534) 00010aac:000010010aac_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +8570 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +8570 clk cpu0 R X8 0000000003700790 +8571 clk cpu0 IT (8535) 00010ab0:000010010ab0_NS f9400501 O EL1h_n : LDR x1,[x8,#8] +8571 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +8571 clk cpu0 R X1 0000000000000000 +8572 clk cpu0 IT (8536) 00010ab4:000010010ab4_NS f9400102 O EL1h_n : LDR x2,[x8,#0] +8572 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +8572 clk cpu0 R X2 0000000000000001 +8573 clk cpu0 IT (8537) 00010ab8:000010010ab8_NS 9402504e O EL1h_n : BL 0xa4bf0 +8573 clk cpu0 R X30 0000000000010ABC +8573 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005f ALLOC 0x0000100a4bc0_NS +8573 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 12f0 ALLOC 0x0000100a4bc0_NS +8574 clk cpu0 IT (8538) 000a4bf0:0000100a4bf0_NS f100043f O EL1h_n : CMP x1,#1 +8574 clk cpu0 R cpsr 820003c5 +8575 clk cpu0 IT (8539) 000a4bf4:0000100a4bf4_NS 5400014b O EL1h_n : B.LT 0xa4c1c +8575 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0061 INVAL 0x000010018c00_NS +8575 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0061 ALLOC 0x0000100a4c00_NS +8575 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1300 ALLOC 0x0000100a4c00_NS +8576 clk cpu0 IT (8540) 000a4c1c:0000100a4c1c_NS aa0003e1 O EL1h_n : MOV x1,x0 +8576 clk cpu0 R X1 0000000023002000 +8577 clk cpu0 IT (8541) 000a4c20:0000100a4c20_NS d28000e0 O EL1h_n : MOV x0,#7 +8577 clk cpu0 R X0 0000000000000007 +8578 clk cpu0 IT (8542) 000a4c24:0000100a4c24_NS 32110000 O EL1h_n : ORR w0,w0,#0x8000 +8578 clk cpu0 R X0 0000000000008007 +8579 clk cpu0 IT (8543) 000a4c28:0000100a4c28_NS f2a00580 O EL1h_n : MOVK x0,#0x2c,LSL #16 +8579 clk cpu0 R X0 00000000002C8007 +8580 clk cpu0 IT (8544) 000a4c2c:0000100a4c2c_NS d40000e1 O EL1h_n : SVC #7 +8580 clk cpu0 E 000a4c2c:0000100a4c2c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +8580 clk cpu0 R cpsr 820003c5 +8580 clk cpu0 R PMBIDR_EL1 00000030 +8580 clk cpu0 R ESR_EL1 56000007 +8580 clk cpu0 R SPSR_EL1 820003c5 +8580 clk cpu0 R TRBIDR_EL1 000000000000002b +8580 clk cpu0 R ELR_EL1 00000000000a4c30 +8581 clk cpu0 IT (8545) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +8582 clk cpu0 IT (8546) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +8582 clk cpu0 R SP_EL1 0000000003700520 +8583 clk cpu0 IT (8547) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +8583 clk cpu0 MW8 03700520:000000f00520_NS 00000000_002c8007 +8583 clk cpu0 MW8 03700528:000000f00528_NS 00000000_23002000 +8584 clk cpu0 IT (8548) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +8584 clk cpu0 R X0 0000000056000007 +8585 clk cpu0 IT (8549) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +8585 clk cpu0 R X1 0000000000000015 +8586 clk cpu0 IT (8550) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +8586 clk cpu0 R cpsr 620003c5 +8587 clk cpu0 IT (8551) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +8588 clk cpu0 IT (8552) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +8588 clk cpu0 R X1 0000000000000007 +8589 clk cpu0 IT (8553) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +8589 clk cpu0 R cpsr 220003c5 +8590 clk cpu0 IS (8554) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +8591 clk cpu0 IT (8555) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +8591 clk cpu0 R cpsr 820003c5 +8592 clk cpu0 IS (8556) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +8593 clk cpu0 IT (8557) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +8593 clk cpu0 R cpsr 820003c5 +8594 clk cpu0 IS (8558) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +8595 clk cpu0 IT (8559) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +8595 clk cpu0 R cpsr 620003c5 +8596 clk cpu0 IT (8560) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +8597 clk cpu0 IT (8561) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +8597 clk cpu0 MR8 03700520:000000f00520_NS 00000000_002c8007 +8597 clk cpu0 MR8 03700528:000000f00528_NS 00000000_23002000 +8597 clk cpu0 R X0 00000000002C8007 +8597 clk cpu0 R X1 0000000023002000 +8598 clk cpu0 IT (8562) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +8598 clk cpu0 R SP_EL1 0000000003700620 +8599 clk cpu0 IT (8563) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +8599 clk cpu0 R cpsr 220003c5 +8600 clk cpu0 IT (8564) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +8601 clk cpu0 IT (8565) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +8601 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +8601 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000fffe0 +8601 clk cpu0 R SP_EL1 0000000003700610 +8602 clk cpu0 IT (8566) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8602 clk cpu0 MW8 03700600:000000f00600_NS 00000000_002c8007 +8602 clk cpu0 MW8 03700608:000000f00608_NS 00000000_23002000 +8602 clk cpu0 R SP_EL1 0000000003700600 +8603 clk cpu0 IT (8567) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +8603 clk cpu0 R X5 0000000000000000 +8604 clk cpu0 IT (8568) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +8604 clk cpu0 R X1 0000000000000000 +8605 clk cpu0 IT (8569) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +8605 clk cpu0 R cpsr 820003c5 +8606 clk cpu0 IT (8570) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8606 clk cpu0 MR8 03700600:000000f00600_NS 00000000_002c8007 +8606 clk cpu0 MR8 03700608:000000f00608_NS 00000000_23002000 +8606 clk cpu0 R SP_EL1 0000000003700610 +8606 clk cpu0 R X0 00000000002C8007 +8606 clk cpu0 R X1 0000000023002000 +8607 clk cpu0 IT (8571) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +8608 clk cpu0 IT (8572) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +8608 clk cpu0 MW8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8608 clk cpu0 MW8 03700608:000000f00608_NS 0001ffff_fe000000 +8608 clk cpu0 R SP_EL1 0000000003700600 +8609 clk cpu0 IT (8573) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +8609 clk cpu0 R X6 0000000000000001 +8610 clk cpu0 IT (8574) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +8610 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +8610 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000001 +8610 clk cpu0 R SP_EL1 00000000037005F0 +8611 clk cpu0 IT (8575) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8611 clk cpu0 MW8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8611 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00010abc +8611 clk cpu0 R SP_EL1 00000000037005E0 +8612 clk cpu0 IT (8576) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +8612 clk cpu0 R X3 0000000000000000 +8613 clk cpu0 IT (8577) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +8613 clk cpu0 R cpsr 820003c5 +8614 clk cpu0 IS (8578) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +8615 clk cpu0 IT (8579) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +8615 clk cpu0 R X3 0000000000000000 +8616 clk cpu0 IT (8580) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +8616 clk cpu0 R cpsr 820003c5 +8617 clk cpu0 IS (8581) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +8618 clk cpu0 IT (8582) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +8618 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +8618 clk cpu0 R X2 0000000000035A00 +8619 clk cpu0 IT (8583) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +8620 clk cpu0 IT (8584) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +8620 clk cpu0 R X3 0000000000000059 +8621 clk cpu0 IT (8585) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +8621 clk cpu0 R X3 0000000000000059 +8622 clk cpu0 IT (8586) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +8622 clk cpu0 R X3 00000000000002C8 +8623 clk cpu0 IT (8587) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +8623 clk cpu0 R X2 0000000000035CC8 +8624 clk cpu0 IT (8588) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +8624 clk cpu0 MR8 00035cc8:000010035cc8_NS 00000000_00036df8 +8624 clk cpu0 R X4 0000000000036DF8 +8625 clk cpu0 IT (8589) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +8625 clk cpu0 R cpsr 82000bc5 +8625 clk cpu0 R X30 0000000000035990 +8625 clk cpu0 CACHE cpu.cpu0.l1icache LINE 016e ALLOC 0x000010036dc0_NS +8625 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1b70 ALLOC 0x000010036dc0_NS +8626 clk cpu0 IT (8590) 00036df8:000010036df8_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8626 clk cpu0 MW8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8626 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00035990 +8626 clk cpu0 R cpsr 820003c5 +8626 clk cpu0 R SP_EL1 00000000037005D0 +8627 clk cpu0 IT (8591) 00036dfc:000010036dfc_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8627 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_002c8007 +8627 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_23002000 +8627 clk cpu0 R SP_EL1 00000000037005C0 +8628 clk cpu0 IT (8592) 00036e00:000010036e00_NS d503201f O EL1h_n : NOP +8629 clk cpu0 IT (8593) 00036e04:000010036e04_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8629 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_002c8007 +8629 clk cpu0 MR8 037005c8:000000f005c8_NS 00000000_23002000 +8629 clk cpu0 R SP_EL1 00000000037005D0 +8629 clk cpu0 R X0 00000000002C8007 +8629 clk cpu0 R X1 0000000023002000 +8630 clk cpu0 IT (8594) 00036e08:000010036e08_NS d5189b21 O EL1h_n : MSR s3_0_c9_c11_1,x1 +8630 clk cpu0 R TRBPTR_EL1 00000000:23002000 +8631 clk cpu0 IT (8595) 00036e0c:000010036e0c_NS d5033fdf O EL1h_n : ISB +8631 clk cpu0 R PMBIDR_EL1 00000030 +8631 clk cpu0 R TRBPTR_EL1 0000000023002000 +8631 clk cpu0 R TRBIDR_EL1 000000000000002b +8632 clk cpu0 IT (8596) 00036e10:000010036e10_NS d503201f O EL1h_n : NOP +8633 clk cpu0 IT (8597) 00036e14:000010036e14_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8633 clk cpu0 MR8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8633 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00035990 +8633 clk cpu0 R SP_EL1 00000000037005E0 +8633 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8633 clk cpu0 R X30 0000000000035990 +8634 clk cpu0 IT (8598) 00036e18:000010036e18_NS d65f03c0 O EL1h_n : RET +8635 clk cpu0 IT (8599) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8635 clk cpu0 MR8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8635 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00010abc +8635 clk cpu0 R SP_EL1 00000000037005F0 +8635 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8635 clk cpu0 R X30 0000000000010ABC +8636 clk cpu0 IT (8600) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +8636 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +8636 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000001 +8636 clk cpu0 R SP_EL1 0000000003700600 +8636 clk cpu0 R X2 0000000000000001 +8636 clk cpu0 R X3 0000000000000001 +8637 clk cpu0 IT (8601) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +8637 clk cpu0 MR8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8637 clk cpu0 MR8 03700608:000000f00608_NS 0001ffff_fe000000 +8637 clk cpu0 R SP_EL1 0000000003700610 +8637 clk cpu0 R X6 E7FFE7FFE7FFE7FF +8637 clk cpu0 R X7 0001FFFFFE000000 +8638 clk cpu0 IT (8602) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +8638 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +8638 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000fffe0 +8638 clk cpu0 R SP_EL1 0000000003700620 +8638 clk cpu0 R X4 0000000000000000 +8638 clk cpu0 R X5 00000000000FFFE0 +8639 clk cpu0 IT (8603) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +8639 clk cpu0 R cpsr 820003c5 +8639 clk cpu0 R PMBIDR_EL1 00000030 +8639 clk cpu0 R TRBIDR_EL1 000000000000002b +8640 clk cpu0 IT (8604) 000a4c30:0000100a4c30_NS d65f03c0 O EL1h_n : RET +8641 clk cpu0 IT (8605) 00010abc:000010010abc_NS f9406be8 O EL1h_n : LDR x8,[sp,#0xd0] +8641 clk cpu0 MR8 037006f0:000000f006f0_NS 00000000_23002000 +8641 clk cpu0 R X8 0000000023002000 +8641 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0057 ALLOC 0x000010010ac0_NS +8641 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 02b2 ALLOC 0x000010010ac0_NS +8642 clk cpu0 IT (8606) 00010ac0:000010010ac0_NS f94027e9 O EL1h_n : LDR x9,[sp,#0x48] +8642 clk cpu0 MR8 03700668:000000f00668_NS ffffffff_fffff000 +8642 clk cpu0 R X9 FFFFFFFFFFFFF000 +8643 clk cpu0 IT (8607) 00010ac4:000010010ac4_NS 8a090108 O EL1h_n : AND x8,x8,x9 +8643 clk cpu0 R X8 0000000023002000 +8644 clk cpu0 IT (8608) 00010ac8:000010010ac8_NS d280032a O EL1h_n : MOV x10,#0x19 +8644 clk cpu0 R X10 0000000000000019 +8645 clk cpu0 IT (8609) 00010acc:000010010acc_NS f2a0200a O EL1h_n : MOVK x10,#0x100,LSL #16 +8645 clk cpu0 R X10 0000000001000019 +8646 clk cpu0 IT (8610) 00010ad0:000010010ad0_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +8646 clk cpu0 R X8 0000000024002019 +8647 clk cpu0 IT (8611) 00010ad4:000010010ad4_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +8647 clk cpu0 MW4 037007b8:000000f007b8_NS 24002019 +8648 clk cpu0 IT (8612) 00010ad8:000010010ad8_NS b9819be0 O EL1h_n : LDRSW x0,[sp,#0x198] +8648 clk cpu0 MR4 037007b8:000000f007b8_NS 24002019 +8648 clk cpu0 R X0 0000000024002019 +8649 clk cpu0 IT (8613) 00010adc:000010010adc_NS f9405fea O EL1h_n : LDR x10,[sp,#0xb8] +8649 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +8649 clk cpu0 R X10 0000000003700790 +8650 clk cpu0 IT (8614) 00010ae0:000010010ae0_NS f9400541 O EL1h_n : LDR x1,[x10,#8] +8650 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +8650 clk cpu0 R X1 0000000000000000 +8651 clk cpu0 IT (8615) 00010ae4:000010010ae4_NS f9400142 O EL1h_n : LDR x2,[x10,#0] +8651 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +8651 clk cpu0 R X2 0000000000000001 +8652 clk cpu0 IT (8616) 00010ae8:000010010ae8_NS 94025028 O EL1h_n : BL 0xa4b88 +8652 clk cpu0 R X30 0000000000010AEC +8652 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005d ALLOC 0x0000100a4b80_NS +8652 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 12e0 ALLOC 0x0000100a4b80_NS +8653 clk cpu0 IT (8617) 000a4b88:0000100a4b88_NS f100043f O EL1h_n : CMP x1,#1 +8653 clk cpu0 R cpsr 820003c5 +8654 clk cpu0 IT (8618) 000a4b8c:0000100a4b8c_NS 5400014b O EL1h_n : B.LT 0xa4bb4 +8655 clk cpu0 IT (8619) 000a4bb4:0000100a4bb4_NS aa0003e1 O EL1h_n : MOV x1,x0 +8655 clk cpu0 R X1 0000000024002019 +8656 clk cpu0 IT (8620) 000a4bb8:0000100a4bb8_NS d28000e0 O EL1h_n : MOV x0,#7 +8656 clk cpu0 R X0 0000000000000007 +8657 clk cpu0 IT (8621) 000a4bbc:0000100a4bbc_NS 32110000 O EL1h_n : ORR w0,w0,#0x8000 +8657 clk cpu0 R X0 0000000000008007 +8658 clk cpu0 IT (8622) 000a4bc0:0000100a4bc0_NS f2a00560 O EL1h_n : MOVK x0,#0x2b,LSL #16 +8658 clk cpu0 R X0 00000000002B8007 +8659 clk cpu0 IT (8623) 000a4bc4:0000100a4bc4_NS d40000e1 O EL1h_n : SVC #7 +8659 clk cpu0 E 000a4bc4:0000100a4bc4_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +8659 clk cpu0 R cpsr 820003c5 +8659 clk cpu0 R PMBIDR_EL1 00000030 +8659 clk cpu0 R ESR_EL1 56000007 +8659 clk cpu0 R SPSR_EL1 820003c5 +8659 clk cpu0 R TRBIDR_EL1 000000000000002b +8659 clk cpu0 R ELR_EL1 00000000000a4bc8 +8660 clk cpu0 IT (8624) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +8661 clk cpu0 IT (8625) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +8661 clk cpu0 R SP_EL1 0000000003700520 +8662 clk cpu0 IT (8626) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +8662 clk cpu0 MW8 03700520:000000f00520_NS 00000000_002b8007 +8662 clk cpu0 MW8 03700528:000000f00528_NS 00000000_24002019 +8663 clk cpu0 IT (8627) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +8663 clk cpu0 R X0 0000000056000007 +8664 clk cpu0 IT (8628) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +8664 clk cpu0 R X1 0000000000000015 +8665 clk cpu0 IT (8629) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +8665 clk cpu0 R cpsr 620003c5 +8666 clk cpu0 IT (8630) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +8667 clk cpu0 IT (8631) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +8667 clk cpu0 R X1 0000000000000007 +8668 clk cpu0 IT (8632) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +8668 clk cpu0 R cpsr 220003c5 +8669 clk cpu0 IS (8633) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +8670 clk cpu0 IT (8634) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +8670 clk cpu0 R cpsr 820003c5 +8671 clk cpu0 IS (8635) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +8672 clk cpu0 IT (8636) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +8672 clk cpu0 R cpsr 820003c5 +8673 clk cpu0 IS (8637) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +8674 clk cpu0 IT (8638) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +8674 clk cpu0 R cpsr 620003c5 +8675 clk cpu0 IT (8639) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +8676 clk cpu0 IT (8640) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +8676 clk cpu0 MR8 03700520:000000f00520_NS 00000000_002b8007 +8676 clk cpu0 MR8 03700528:000000f00528_NS 00000000_24002019 +8676 clk cpu0 R X0 00000000002B8007 +8676 clk cpu0 R X1 0000000024002019 +8677 clk cpu0 IT (8641) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +8677 clk cpu0 R SP_EL1 0000000003700620 +8678 clk cpu0 IT (8642) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +8678 clk cpu0 R cpsr 220003c5 +8679 clk cpu0 IT (8643) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +8680 clk cpu0 IT (8644) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +8680 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +8680 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000fffe0 +8680 clk cpu0 R SP_EL1 0000000003700610 +8681 clk cpu0 IT (8645) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8681 clk cpu0 MW8 03700600:000000f00600_NS 00000000_002b8007 +8681 clk cpu0 MW8 03700608:000000f00608_NS 00000000_24002019 +8681 clk cpu0 R SP_EL1 0000000003700600 +8682 clk cpu0 IT (8646) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +8682 clk cpu0 R X5 0000000000000000 +8683 clk cpu0 IT (8647) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +8683 clk cpu0 R X1 0000000000000000 +8684 clk cpu0 IT (8648) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +8684 clk cpu0 R cpsr 820003c5 +8685 clk cpu0 IT (8649) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8685 clk cpu0 MR8 03700600:000000f00600_NS 00000000_002b8007 +8685 clk cpu0 MR8 03700608:000000f00608_NS 00000000_24002019 +8685 clk cpu0 R SP_EL1 0000000003700610 +8685 clk cpu0 R X0 00000000002B8007 +8685 clk cpu0 R X1 0000000024002019 +8686 clk cpu0 IT (8650) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +8687 clk cpu0 IT (8651) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +8687 clk cpu0 MW8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8687 clk cpu0 MW8 03700608:000000f00608_NS 0001ffff_fe000000 +8687 clk cpu0 R SP_EL1 0000000003700600 +8688 clk cpu0 IT (8652) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +8688 clk cpu0 R X6 0000000000000001 +8689 clk cpu0 IT (8653) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +8689 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +8689 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000001 +8689 clk cpu0 R SP_EL1 00000000037005F0 +8690 clk cpu0 IT (8654) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8690 clk cpu0 MW8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8690 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00010aec +8690 clk cpu0 R SP_EL1 00000000037005E0 +8691 clk cpu0 IT (8655) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +8691 clk cpu0 R X3 0000000000000000 +8692 clk cpu0 IT (8656) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +8692 clk cpu0 R cpsr 820003c5 +8693 clk cpu0 IS (8657) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +8694 clk cpu0 IT (8658) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +8694 clk cpu0 R X3 0000000000000000 +8695 clk cpu0 IT (8659) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +8695 clk cpu0 R cpsr 820003c5 +8696 clk cpu0 IS (8660) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +8697 clk cpu0 IT (8661) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +8697 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +8697 clk cpu0 R X2 0000000000035A00 +8698 clk cpu0 IT (8662) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +8699 clk cpu0 IT (8663) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +8699 clk cpu0 R X3 0000000000000057 +8700 clk cpu0 IT (8664) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +8700 clk cpu0 R X3 0000000000000057 +8701 clk cpu0 IT (8665) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +8701 clk cpu0 R X3 00000000000002B8 +8702 clk cpu0 IT (8666) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +8702 clk cpu0 R X2 0000000000035CB8 +8703 clk cpu0 IT (8667) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +8703 clk cpu0 MR8 00035cb8:000010035cb8_NS 00000000_00036dc0 +8703 clk cpu0 R X4 0000000000036DC0 +8703 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00e4 ALLOC 0x000010035c80_NS +8703 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1720 ALLOC 0x000010035c80_NS +8704 clk cpu0 IT (8668) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +8704 clk cpu0 R cpsr 82000bc5 +8704 clk cpu0 R X30 0000000000035990 +8705 clk cpu0 IT (8669) 00036dc0:000010036dc0_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8705 clk cpu0 MW8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8705 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00035990 +8705 clk cpu0 R cpsr 820003c5 +8705 clk cpu0 R SP_EL1 00000000037005D0 +8706 clk cpu0 IT (8670) 00036dc4:000010036dc4_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8706 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_002b8007 +8706 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_24002019 +8706 clk cpu0 R SP_EL1 00000000037005C0 +8707 clk cpu0 IT (8671) 00036dc8:000010036dc8_NS d503201f O EL1h_n : NOP +8708 clk cpu0 IT (8672) 00036dcc:000010036dcc_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8708 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_002b8007 +8708 clk cpu0 MR8 037005c8:000000f005c8_NS 00000000_24002019 +8708 clk cpu0 R SP_EL1 00000000037005D0 +8708 clk cpu0 R X0 00000000002B8007 +8708 clk cpu0 R X1 0000000024002019 +8709 clk cpu0 IT (8673) 00036dd0:000010036dd0_NS d5189b01 O EL1h_n : MSR s3_0_c9_c11_0,x1 +8709 clk cpu0 R TRBLIMITR_EL1 00000000:24002019 +8710 clk cpu0 IT (8674) 00036dd4:000010036dd4_NS d5033fdf O EL1h_n : ISB +8710 clk cpu0 R PMBIDR_EL1 00000030 +8710 clk cpu0 R TRBLIMITR_EL1 0000000024002019 +8710 clk cpu0 R TRBIDR_EL1 000000000000002b +8711 clk cpu0 IT (8675) 00036dd8:000010036dd8_NS d503201f O EL1h_n : NOP +8712 clk cpu0 IT (8676) 00036ddc:000010036ddc_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8712 clk cpu0 MR8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8712 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00035990 +8712 clk cpu0 R SP_EL1 00000000037005E0 +8712 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8712 clk cpu0 R X30 0000000000035990 +8713 clk cpu0 IT (8677) 00036de0:000010036de0_NS d65f03c0 O EL1h_n : RET +8714 clk cpu0 IT (8678) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8714 clk cpu0 MR8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8714 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00010aec +8714 clk cpu0 R SP_EL1 00000000037005F0 +8714 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8714 clk cpu0 R X30 0000000000010AEC +8715 clk cpu0 IT (8679) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +8715 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +8715 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000001 +8715 clk cpu0 R SP_EL1 0000000003700600 +8715 clk cpu0 R X2 0000000000000001 +8715 clk cpu0 R X3 0000000000000001 +8716 clk cpu0 IT (8680) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +8716 clk cpu0 MR8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8716 clk cpu0 MR8 03700608:000000f00608_NS 0001ffff_fe000000 +8716 clk cpu0 R SP_EL1 0000000003700610 +8716 clk cpu0 R X6 E7FFE7FFE7FFE7FF +8716 clk cpu0 R X7 0001FFFFFE000000 +8717 clk cpu0 IT (8681) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +8717 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +8717 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000fffe0 +8717 clk cpu0 R SP_EL1 0000000003700620 +8717 clk cpu0 R X4 0000000000000000 +8717 clk cpu0 R X5 00000000000FFFE0 +8718 clk cpu0 IT (8682) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +8718 clk cpu0 R cpsr 820003c5 +8718 clk cpu0 R PMBIDR_EL1 00000030 +8718 clk cpu0 R TRBIDR_EL1 000000000000002b +8719 clk cpu0 IT (8683) 000a4bc8:0000100a4bc8_NS d65f03c0 O EL1h_n : RET +8720 clk cpu0 IT (8684) 00010aec:000010010aec_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +8720 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +8720 clk cpu0 R X9 0000000003700790 +8721 clk cpu0 IT (8685) 00010af0:000010010af0_NS f9400521 O EL1h_n : LDR x1,[x9,#8] +8721 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +8721 clk cpu0 R X1 0000000000000000 +8722 clk cpu0 IT (8686) 00010af4:000010010af4_NS f9400122 O EL1h_n : LDR x2,[x9,#0] +8722 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +8722 clk cpu0 R X2 0000000000000001 +8723 clk cpu0 IT (8687) 00010af8:000010010af8_NS d2807fe0 O EL1h_n : MOV x0,#0x3ff +8723 clk cpu0 R X0 00000000000003FF +8724 clk cpu0 IT (8688) 00010afc:000010010afc_NS 9402508b O EL1h_n : BL 0xa4d28 +8724 clk cpu0 R X30 0000000000010B00 +8724 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0069 ALLOC 0x0000100a4d00_NS +8724 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1340 ALLOC 0x0000100a4d00_NS +8725 clk cpu0 IT (8689) 000a4d28:0000100a4d28_NS f100043f O EL1h_n : CMP x1,#1 +8725 clk cpu0 R cpsr 820003c5 +8726 clk cpu0 IT (8690) 000a4d2c:0000100a4d2c_NS 5400014b O EL1h_n : B.LT 0xa4d54 +8726 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006b ALLOC 0x0000100a4d40_NS +8726 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1350 ALLOC 0x0000100a4d40_NS +8727 clk cpu0 IT (8691) 000a4d54:0000100a4d54_NS aa0003e1 O EL1h_n : MOV x1,x0 +8727 clk cpu0 R X1 00000000000003FF +8728 clk cpu0 IT (8692) 000a4d58:0000100a4d58_NS d28000e0 O EL1h_n : MOV x0,#7 +8728 clk cpu0 R X0 0000000000000007 +8729 clk cpu0 IT (8693) 000a4d5c:0000100a4d5c_NS 32110000 O EL1h_n : ORR w0,w0,#0x8000 +8729 clk cpu0 R X0 0000000000008007 +8730 clk cpu0 IT (8694) 000a4d60:0000100a4d60_NS f2a005e0 O EL1h_n : MOVK x0,#0x2f,LSL #16 +8730 clk cpu0 R X0 00000000002F8007 +8731 clk cpu0 IT (8695) 000a4d64:0000100a4d64_NS d40000e1 O EL1h_n : SVC #7 +8731 clk cpu0 E 000a4d64:0000100a4d64_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +8731 clk cpu0 R cpsr 820003c5 +8731 clk cpu0 R PMBIDR_EL1 00000030 +8731 clk cpu0 R ESR_EL1 56000007 +8731 clk cpu0 R SPSR_EL1 820003c5 +8731 clk cpu0 R TRBIDR_EL1 000000000000002b +8731 clk cpu0 R ELR_EL1 00000000000a4d68 +8732 clk cpu0 IT (8696) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +8733 clk cpu0 IT (8697) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +8733 clk cpu0 R SP_EL1 0000000003700520 +8734 clk cpu0 IT (8698) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +8734 clk cpu0 MW8 03700520:000000f00520_NS 00000000_002f8007 +8734 clk cpu0 MW8 03700528:000000f00528_NS 00000000_000003ff +8735 clk cpu0 IT (8699) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +8735 clk cpu0 R X0 0000000056000007 +8736 clk cpu0 IT (8700) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +8736 clk cpu0 R X1 0000000000000015 +8737 clk cpu0 IT (8701) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +8737 clk cpu0 R cpsr 620003c5 +8738 clk cpu0 IT (8702) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +8739 clk cpu0 IT (8703) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +8739 clk cpu0 R X1 0000000000000007 +8740 clk cpu0 IT (8704) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +8740 clk cpu0 R cpsr 220003c5 +8741 clk cpu0 IS (8705) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +8742 clk cpu0 IT (8706) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +8742 clk cpu0 R cpsr 820003c5 +8743 clk cpu0 IS (8707) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +8744 clk cpu0 IT (8708) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +8744 clk cpu0 R cpsr 820003c5 +8745 clk cpu0 IS (8709) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +8746 clk cpu0 IT (8710) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +8746 clk cpu0 R cpsr 620003c5 +8747 clk cpu0 IT (8711) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +8748 clk cpu0 IT (8712) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +8748 clk cpu0 MR8 03700520:000000f00520_NS 00000000_002f8007 +8748 clk cpu0 MR8 03700528:000000f00528_NS 00000000_000003ff +8748 clk cpu0 R X0 00000000002F8007 +8748 clk cpu0 R X1 00000000000003FF +8749 clk cpu0 IT (8713) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +8749 clk cpu0 R SP_EL1 0000000003700620 +8750 clk cpu0 IT (8714) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +8750 clk cpu0 R cpsr 220003c5 +8751 clk cpu0 IT (8715) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +8752 clk cpu0 IT (8716) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +8752 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +8752 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000fffe0 +8752 clk cpu0 R SP_EL1 0000000003700610 +8753 clk cpu0 IT (8717) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8753 clk cpu0 MW8 03700600:000000f00600_NS 00000000_002f8007 +8753 clk cpu0 MW8 03700608:000000f00608_NS 00000000_000003ff +8753 clk cpu0 R SP_EL1 0000000003700600 +8754 clk cpu0 IT (8718) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +8754 clk cpu0 R X5 0000000000000000 +8755 clk cpu0 IT (8719) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +8755 clk cpu0 R X1 0000000000000000 +8756 clk cpu0 IT (8720) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +8756 clk cpu0 R cpsr 820003c5 +8757 clk cpu0 IT (8721) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8757 clk cpu0 MR8 03700600:000000f00600_NS 00000000_002f8007 +8757 clk cpu0 MR8 03700608:000000f00608_NS 00000000_000003ff +8757 clk cpu0 R SP_EL1 0000000003700610 +8757 clk cpu0 R X0 00000000002F8007 +8757 clk cpu0 R X1 00000000000003FF +8758 clk cpu0 IT (8722) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +8759 clk cpu0 IT (8723) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +8759 clk cpu0 MW8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8759 clk cpu0 MW8 03700608:000000f00608_NS 0001ffff_fe000000 +8759 clk cpu0 R SP_EL1 0000000003700600 +8760 clk cpu0 IT (8724) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +8760 clk cpu0 R X6 0000000000000001 +8761 clk cpu0 IT (8725) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +8761 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +8761 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000001 +8761 clk cpu0 R SP_EL1 00000000037005F0 +8762 clk cpu0 IT (8726) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8762 clk cpu0 MW8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8762 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00010b00 +8762 clk cpu0 R SP_EL1 00000000037005E0 +8763 clk cpu0 IT (8727) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +8763 clk cpu0 R X3 0000000000000000 +8764 clk cpu0 IT (8728) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +8764 clk cpu0 R cpsr 820003c5 +8765 clk cpu0 IS (8729) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +8766 clk cpu0 IT (8730) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +8766 clk cpu0 R X3 0000000000000000 +8767 clk cpu0 IT (8731) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +8767 clk cpu0 R cpsr 820003c5 +8768 clk cpu0 IS (8732) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +8769 clk cpu0 IT (8733) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +8769 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +8769 clk cpu0 R X2 0000000000035A00 +8770 clk cpu0 IT (8734) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +8771 clk cpu0 IT (8735) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +8771 clk cpu0 R X3 000000000000005F +8772 clk cpu0 IT (8736) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +8772 clk cpu0 R X3 000000000000005F +8773 clk cpu0 IT (8737) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +8773 clk cpu0 R X3 00000000000002F8 +8774 clk cpu0 IT (8738) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +8774 clk cpu0 R X2 0000000000035CF8 +8775 clk cpu0 IT (8739) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +8775 clk cpu0 MR8 00035cf8:000010035cf8_NS 00000000_00036ea0 +8775 clk cpu0 R X4 0000000000036EA0 +8776 clk cpu0 IT (8740) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +8776 clk cpu0 R cpsr 82000bc5 +8776 clk cpu0 R X30 0000000000035990 +8776 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0175 INVAL 0x00001003ae80_NS +8776 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0175 ALLOC 0x000010036e80_NS +8776 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1ba0 ALLOC 0x000010036e80_NS +8777 clk cpu0 IT (8741) 00036ea0:000010036ea0_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8777 clk cpu0 MW8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8777 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00035990 +8777 clk cpu0 R cpsr 820003c5 +8777 clk cpu0 R SP_EL1 00000000037005D0 +8778 clk cpu0 IT (8742) 00036ea4:000010036ea4_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8778 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_002f8007 +8778 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_000003ff +8778 clk cpu0 R SP_EL1 00000000037005C0 +8779 clk cpu0 IT (8743) 00036ea8:000010036ea8_NS d503201f O EL1h_n : NOP +8780 clk cpu0 IT (8744) 00036eac:000010036eac_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8780 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_002f8007 +8780 clk cpu0 MR8 037005c8:000000f005c8_NS 00000000_000003ff +8780 clk cpu0 R SP_EL1 00000000037005D0 +8780 clk cpu0 R X0 00000000002F8007 +8780 clk cpu0 R X1 00000000000003FF +8781 clk cpu0 IT (8745) 00036eb0:000010036eb0_NS d5189b81 O EL1h_n : MSR s3_0_c9_c11_4,x1 +8781 clk cpu0 R TRBBMAR_EL1 00000000:000003ff +8782 clk cpu0 IT (8746) 00036eb4:000010036eb4_NS d5033fdf O EL1h_n : ISB +8782 clk cpu0 R PMBIDR_EL1 00000030 +8782 clk cpu0 R TRBMAR_EL1 00000000000003ff +8782 clk cpu0 R TRBIDR_EL1 000000000000002b +8783 clk cpu0 IT (8747) 00036eb8:000010036eb8_NS d503201f O EL1h_n : NOP +8784 clk cpu0 IT (8748) 00036ebc:000010036ebc_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8784 clk cpu0 MR8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8784 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00035990 +8784 clk cpu0 R SP_EL1 00000000037005E0 +8784 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8784 clk cpu0 R X30 0000000000035990 +8784 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0177 ALLOC 0x000010036ec0_NS +8784 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1bb1 ALLOC 0x000010036ec0_NS +8785 clk cpu0 IT (8749) 00036ec0:000010036ec0_NS d65f03c0 O EL1h_n : RET +8786 clk cpu0 IT (8750) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8786 clk cpu0 MR8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8786 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00010b00 +8786 clk cpu0 R SP_EL1 00000000037005F0 +8786 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8786 clk cpu0 R X30 0000000000010B00 +8787 clk cpu0 IT (8751) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +8787 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +8787 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000001 +8787 clk cpu0 R SP_EL1 0000000003700600 +8787 clk cpu0 R X2 0000000000000001 +8787 clk cpu0 R X3 0000000000000001 +8788 clk cpu0 IT (8752) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +8788 clk cpu0 MR8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8788 clk cpu0 MR8 03700608:000000f00608_NS 0001ffff_fe000000 +8788 clk cpu0 R SP_EL1 0000000003700610 +8788 clk cpu0 R X6 E7FFE7FFE7FFE7FF +8788 clk cpu0 R X7 0001FFFFFE000000 +8789 clk cpu0 IT (8753) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +8789 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +8789 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000fffe0 +8789 clk cpu0 R SP_EL1 0000000003700620 +8789 clk cpu0 R X4 0000000000000000 +8789 clk cpu0 R X5 00000000000FFFE0 +8790 clk cpu0 IT (8754) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +8790 clk cpu0 R cpsr 820003c5 +8790 clk cpu0 R PMBIDR_EL1 00000030 +8790 clk cpu0 R TRBIDR_EL1 000000000000002b +8791 clk cpu0 IT (8755) 000a4d68:0000100a4d68_NS d65f03c0 O EL1h_n : RET +8791 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0058 ALLOC 0x000010010b00_NS +8791 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 02c0 ALLOC 0x000010010b00_NS +8792 clk cpu0 IT (8756) 00010b00:000010010b00_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +8792 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +8792 clk cpu0 R X9 0000000003700790 +8793 clk cpu0 IT (8757) 00010b04:000010010b04_NS f9400521 O EL1h_n : LDR x1,[x9,#8] +8793 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +8793 clk cpu0 R X1 0000000000000000 +8794 clk cpu0 IT (8758) 00010b08:000010010b08_NS f9400122 O EL1h_n : LDR x2,[x9,#0] +8794 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +8794 clk cpu0 R X2 0000000000000001 +8795 clk cpu0 IT (8759) 00010b0c:000010010b0c_NS d2800000 O EL1h_n : MOV x0,#0 +8795 clk cpu0 R X0 0000000000000000 +8796 clk cpu0 IT (8760) 00010b10:000010010b10_NS 940250a0 O EL1h_n : BL 0xa4d90 +8796 clk cpu0 R X30 0000000000010B14 +8796 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006d ALLOC 0x0000100a4d80_NS +8796 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1360 ALLOC 0x0000100a4d80_NS +8797 clk cpu0 IT (8761) 000a4d90:0000100a4d90_NS f100043f O EL1h_n : CMP x1,#1 +8797 clk cpu0 R cpsr 820003c5 +8798 clk cpu0 IT (8762) 000a4d94:0000100a4d94_NS 5400014b O EL1h_n : B.LT 0xa4dbc +8799 clk cpu0 IT (8763) 000a4dbc:0000100a4dbc_NS aa0003e1 O EL1h_n : MOV x1,x0 +8799 clk cpu0 R X1 0000000000000000 +8799 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006f INVAL 0x00001001cdc0_NS +8799 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006f ALLOC 0x0000100a4dc0_NS +8799 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1371 ALLOC 0x0000100a4dc0_NS +8800 clk cpu0 IT (8764) 000a4dc0:0000100a4dc0_NS d28000e0 O EL1h_n : MOV x0,#7 +8800 clk cpu0 R X0 0000000000000007 +8801 clk cpu0 IT (8765) 000a4dc4:0000100a4dc4_NS 32110000 O EL1h_n : ORR w0,w0,#0x8000 +8801 clk cpu0 R X0 0000000000008007 +8802 clk cpu0 IT (8766) 000a4dc8:0000100a4dc8_NS f2a00600 O EL1h_n : MOVK x0,#0x30,LSL #16 +8802 clk cpu0 R X0 0000000000308007 +8803 clk cpu0 IT (8767) 000a4dcc:0000100a4dcc_NS d40000e1 O EL1h_n : SVC #7 +8803 clk cpu0 E 000a4dcc:0000100a4dcc_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +8803 clk cpu0 R cpsr 820003c5 +8803 clk cpu0 R PMBIDR_EL1 00000030 +8803 clk cpu0 R ESR_EL1 56000007 +8803 clk cpu0 R SPSR_EL1 820003c5 +8803 clk cpu0 R TRBIDR_EL1 000000000000002b +8803 clk cpu0 R ELR_EL1 00000000000a4dd0 +8804 clk cpu0 IT (8768) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +8805 clk cpu0 IT (8769) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +8805 clk cpu0 R SP_EL1 0000000003700520 +8806 clk cpu0 IT (8770) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +8806 clk cpu0 MW8 03700520:000000f00520_NS 00000000_00308007 +8806 clk cpu0 MW8 03700528:000000f00528_NS 00000000_00000000 +8807 clk cpu0 IT (8771) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +8807 clk cpu0 R X0 0000000056000007 +8808 clk cpu0 IT (8772) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +8808 clk cpu0 R X1 0000000000000015 +8809 clk cpu0 IT (8773) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +8809 clk cpu0 R cpsr 620003c5 +8810 clk cpu0 IT (8774) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +8811 clk cpu0 IT (8775) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +8811 clk cpu0 R X1 0000000000000007 +8812 clk cpu0 IT (8776) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +8812 clk cpu0 R cpsr 220003c5 +8813 clk cpu0 IS (8777) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +8814 clk cpu0 IT (8778) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +8814 clk cpu0 R cpsr 820003c5 +8815 clk cpu0 IS (8779) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +8816 clk cpu0 IT (8780) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +8816 clk cpu0 R cpsr 820003c5 +8817 clk cpu0 IS (8781) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +8818 clk cpu0 IT (8782) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +8818 clk cpu0 R cpsr 620003c5 +8819 clk cpu0 IT (8783) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +8820 clk cpu0 IT (8784) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +8820 clk cpu0 MR8 03700520:000000f00520_NS 00000000_00308007 +8820 clk cpu0 MR8 03700528:000000f00528_NS 00000000_00000000 +8820 clk cpu0 R X0 0000000000308007 +8820 clk cpu0 R X1 0000000000000000 +8821 clk cpu0 IT (8785) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +8821 clk cpu0 R SP_EL1 0000000003700620 +8822 clk cpu0 IT (8786) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +8822 clk cpu0 R cpsr 820003c5 +8823 clk cpu0 IT (8787) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +8824 clk cpu0 IT (8788) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +8824 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +8824 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000fffe0 +8824 clk cpu0 R SP_EL1 0000000003700610 +8825 clk cpu0 IT (8789) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8825 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00308007 +8825 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00000000 +8825 clk cpu0 R SP_EL1 0000000003700600 +8826 clk cpu0 IT (8790) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +8826 clk cpu0 R X5 0000000000000000 +8827 clk cpu0 IT (8791) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +8827 clk cpu0 R X1 0000000000000000 +8828 clk cpu0 IT (8792) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +8828 clk cpu0 R cpsr 820003c5 +8829 clk cpu0 IT (8793) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8829 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00308007 +8829 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00000000 +8829 clk cpu0 R SP_EL1 0000000003700610 +8829 clk cpu0 R X0 0000000000308007 +8829 clk cpu0 R X1 0000000000000000 +8830 clk cpu0 IT (8794) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +8831 clk cpu0 IT (8795) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +8831 clk cpu0 MW8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8831 clk cpu0 MW8 03700608:000000f00608_NS 0001ffff_fe000000 +8831 clk cpu0 R SP_EL1 0000000003700600 +8832 clk cpu0 IT (8796) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +8832 clk cpu0 R X6 0000000000000001 +8833 clk cpu0 IT (8797) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +8833 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +8833 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000001 +8833 clk cpu0 R SP_EL1 00000000037005F0 +8834 clk cpu0 IT (8798) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8834 clk cpu0 MW8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8834 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00010b14 +8834 clk cpu0 R SP_EL1 00000000037005E0 +8835 clk cpu0 IT (8799) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +8835 clk cpu0 R X3 0000000000000000 +8836 clk cpu0 IT (8800) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +8836 clk cpu0 R cpsr 820003c5 +8837 clk cpu0 IS (8801) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +8838 clk cpu0 IT (8802) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +8838 clk cpu0 R X3 0000000000000000 +8839 clk cpu0 IT (8803) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +8839 clk cpu0 R cpsr 820003c5 +8840 clk cpu0 IS (8804) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +8841 clk cpu0 IT (8805) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +8841 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +8841 clk cpu0 R X2 0000000000035A00 +8842 clk cpu0 IT (8806) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +8843 clk cpu0 IT (8807) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +8843 clk cpu0 R X3 0000000000000061 +8844 clk cpu0 IT (8808) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +8844 clk cpu0 R X3 0000000000000061 +8845 clk cpu0 IT (8809) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +8845 clk cpu0 R X3 0000000000000308 +8846 clk cpu0 IT (8810) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +8846 clk cpu0 R X2 0000000000035D08 +8847 clk cpu0 IT (8811) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +8847 clk cpu0 MR8 00035d08:000010035d08_NS 00000000_00036ed8 +8847 clk cpu0 R X4 0000000000036ED8 +8847 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00e8 ALLOC 0x000010035d00_NS +8847 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1740 ALLOC 0x000010035d00_NS +8848 clk cpu0 IT (8812) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +8848 clk cpu0 R cpsr 82000bc5 +8848 clk cpu0 R X30 0000000000035990 +8849 clk cpu0 IT (8813) 00036ed8:000010036ed8_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8849 clk cpu0 MW8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8849 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00035990 +8849 clk cpu0 R cpsr 820003c5 +8849 clk cpu0 R SP_EL1 00000000037005D0 +8850 clk cpu0 IT (8814) 00036edc:000010036edc_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +8850 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_00308007 +8850 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_00000000 +8850 clk cpu0 R SP_EL1 00000000037005C0 +8851 clk cpu0 IT (8815) 00036ee0:000010036ee0_NS d503201f O EL1h_n : NOP +8852 clk cpu0 IT (8816) 00036ee4:000010036ee4_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +8852 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_00308007 +8852 clk cpu0 MR8 037005c8:000000f005c8_NS 00000000_00000000 +8852 clk cpu0 R SP_EL1 00000000037005D0 +8852 clk cpu0 R X0 0000000000308007 +8852 clk cpu0 R X1 0000000000000000 +8853 clk cpu0 IT (8817) 00036ee8:000010036ee8_NS d5189bc1 O EL1h_n : MSR s3_0_c9_c11_6,x1 +8853 clk cpu0 R TRBTRG_EL1 00000000:00000000 +8854 clk cpu0 IT (8818) 00036eec:000010036eec_NS d5033fdf O EL1h_n : ISB +8854 clk cpu0 R PMBIDR_EL1 00000030 +8854 clk cpu0 R TRBTRG_EL1 0000000000000000 +8854 clk cpu0 R TRBIDR_EL1 000000000000002b +8855 clk cpu0 IT (8819) 00036ef0:000010036ef0_NS d503201f O EL1h_n : NOP +8856 clk cpu0 IT (8820) 00036ef4:000010036ef4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8856 clk cpu0 MR8 037005d0:000000f005d0_NS 7fff7fff_7fff7fff +8856 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00035990 +8856 clk cpu0 R SP_EL1 00000000037005E0 +8856 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8856 clk cpu0 R X30 0000000000035990 +8857 clk cpu0 IT (8821) 00036ef8:000010036ef8_NS d65f03c0 O EL1h_n : RET +8858 clk cpu0 IT (8822) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8858 clk cpu0 MR8 037005e0:000000f005e0_NS 7fff7fff_7fff7fff +8858 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00010b14 +8858 clk cpu0 R SP_EL1 00000000037005F0 +8858 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8858 clk cpu0 R X30 0000000000010B14 +8859 clk cpu0 IT (8823) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +8859 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +8859 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000001 +8859 clk cpu0 R SP_EL1 0000000003700600 +8859 clk cpu0 R X2 0000000000000001 +8859 clk cpu0 R X3 0000000000000001 +8860 clk cpu0 IT (8824) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +8860 clk cpu0 MR8 03700600:000000f00600_NS e7ffe7ff_e7ffe7ff +8860 clk cpu0 MR8 03700608:000000f00608_NS 0001ffff_fe000000 +8860 clk cpu0 R SP_EL1 0000000003700610 +8860 clk cpu0 R X6 E7FFE7FFE7FFE7FF +8860 clk cpu0 R X7 0001FFFFFE000000 +8861 clk cpu0 IT (8825) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +8861 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +8861 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000fffe0 +8861 clk cpu0 R SP_EL1 0000000003700620 +8861 clk cpu0 R X4 0000000000000000 +8861 clk cpu0 R X5 00000000000FFFE0 +8862 clk cpu0 IT (8826) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +8862 clk cpu0 R cpsr 820003c5 +8862 clk cpu0 R PMBIDR_EL1 00000030 +8862 clk cpu0 R TRBIDR_EL1 000000000000002b +8863 clk cpu0 IT (8827) 000a4dd0:0000100a4dd0_NS d65f03c0 O EL1h_n : RET +8864 clk cpu0 IT (8828) 00010b14:000010010b14_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +8864 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +8865 clk cpu0 IT (8829) 00010b18:000010010b18_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +8865 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +8865 clk cpu0 R X2 0000000000000000 +8866 clk cpu0 IT (8830) 00010b1c:000010010b1c_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +8866 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +8866 clk cpu0 R X4 0000000000000000 +8867 clk cpu0 IT (8831) 00010b20:000010010b20_NS 52800088 O EL1h_n : MOV w8,#4 +8867 clk cpu0 R X8 0000000000000004 +8868 clk cpu0 IT (8832) 00010b24:000010010b24_NS 2a0803e0 O EL1h_n : MOV w0,w8 +8868 clk cpu0 R X0 0000000000000004 +8869 clk cpu0 IT (8833) 00010b28:000010010b28_NS 5280002b O EL1h_n : MOV w11,#1 +8869 clk cpu0 R X11 0000000000000001 +8870 clk cpu0 IT (8834) 00010b2c:000010010b2c_NS 2a0b03e1 O EL1h_n : MOV w1,w11 +8870 clk cpu0 R X1 0000000000000001 +8871 clk cpu0 IT (8835) 00010b30:000010010b30_NS 5280006c O EL1h_n : MOV w12,#3 +8871 clk cpu0 R X12 0000000000000003 +8872 clk cpu0 IT (8836) 00010b34:000010010b34_NS 2a0c03e3 O EL1h_n : MOV w3,w12 +8872 clk cpu0 R X3 0000000000000003 +8873 clk cpu0 IT (8837) 00010b38:000010010b38_NS b90047e8 O EL1h_n : STR w8,[sp,#0x44] +8873 clk cpu0 MW4 03700664:000000f00664_NS 00000004 +8874 clk cpu0 IT (8838) 00010b3c:000010010b3c_NS b90043eb O EL1h_n : STR w11,[sp,#0x40] +8874 clk cpu0 MW4 03700660:000000f00660_NS 00000001 +8874 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005b ALLOC 0x000010010b40_NS +8874 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 02d1 ALLOC 0x000010010b40_NS +8875 clk cpu0 IT (8839) 00010b40:000010010b40_NS b9003fec O EL1h_n : STR w12,[sp,#0x3c] +8875 clk cpu0 MW4 0370065c:000000f0065c_NS 00000003 +8876 clk cpu0 IT (8840) 00010b44:000010010b44_NS 940233eb O EL1h_n : BL 0x9daf0 +8876 clk cpu0 R X30 0000000000010B48 +8877 clk cpu0 IT (8841) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +8877 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +8877 clk cpu0 R SP_EL1 00000000037005F0 +8878 clk cpu0 IT (8842) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +8878 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +8878 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +8879 clk cpu0 IT (8843) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +8879 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +8879 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010b48 +8880 clk cpu0 IT (8844) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +8880 clk cpu0 R X19 0000000000000000 +8881 clk cpu0 IT (8845) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +8881 clk cpu0 R cpsr 220003c5 +8882 clk cpu0 IT (8846) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +8882 clk cpu0 R X20 0000000000000004 +8883 clk cpu0 IS (8847) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +8884 clk cpu0 IT (8848) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +8884 clk cpu0 R cpsr 620003c5 +8885 clk cpu0 IT (8849) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +8886 clk cpu0 IT (8850) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +8886 clk cpu0 R X1 0000000000000004 +8887 clk cpu0 IT (8851) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +8887 clk cpu0 R X2 0000000000000000 +8888 clk cpu0 IT (8852) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +8888 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +8888 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010b48 +8888 clk cpu0 R X19 1818181818181818 +8888 clk cpu0 R X30 0000000000010B48 +8889 clk cpu0 IT (8853) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +8889 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +8889 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +8889 clk cpu0 R X20 001FFFFFFFFFFFFE +8889 clk cpu0 R X21 0000000000F00000 +8890 clk cpu0 IT (8854) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +8890 clk cpu0 R X0 0000000000000002 +8891 clk cpu0 IT (8855) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +8891 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +8891 clk cpu0 R SP_EL1 0000000003700620 +8891 clk cpu0 R X22 FFFFFFFFFFFE0003 +8892 clk cpu0 IT (8856) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +8893 clk cpu0 IT (8857) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8893 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +8893 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010b48 +8893 clk cpu0 R SP_EL1 0000000003700610 +8894 clk cpu0 IT (8858) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +8894 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +8894 clk cpu0 R cpsr 620003c5 +8894 clk cpu0 R PMBIDR_EL1 00000030 +8894 clk cpu0 R ESR_EL1 5600000a +8894 clk cpu0 R SPSR_EL1 620003c5 +8894 clk cpu0 R TRBIDR_EL1 000000000000002b +8894 clk cpu0 R ELR_EL1 000000000009ef60 +8895 clk cpu0 IT (8859) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +8896 clk cpu0 IT (8860) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +8896 clk cpu0 R SP_EL1 0000000003700510 +8897 clk cpu0 IT (8861) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +8897 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +8897 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000004 +8898 clk cpu0 IT (8862) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +8898 clk cpu0 R X0 000000005600000A +8899 clk cpu0 IT (8863) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +8899 clk cpu0 R X1 0000000000000015 +8900 clk cpu0 IT (8864) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +8900 clk cpu0 R cpsr 620003c5 +8901 clk cpu0 IT (8865) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +8902 clk cpu0 IT (8866) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +8902 clk cpu0 R X1 000000000000000A +8903 clk cpu0 IT (8867) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +8903 clk cpu0 R cpsr 220003c5 +8904 clk cpu0 IS (8868) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +8905 clk cpu0 IT (8869) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +8905 clk cpu0 R cpsr 620003c5 +8906 clk cpu0 IS (8870) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +8907 clk cpu0 IT (8871) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +8907 clk cpu0 R cpsr 220003c5 +8908 clk cpu0 IS (8872) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +8909 clk cpu0 IT (8873) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +8909 clk cpu0 R cpsr 220003c5 +8910 clk cpu0 IS (8874) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +8911 clk cpu0 IT (8875) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +8911 clk cpu0 R cpsr 220003c5 +8912 clk cpu0 IS (8876) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +8913 clk cpu0 IT (8877) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +8913 clk cpu0 R cpsr 220003c5 +8914 clk cpu0 IS (8878) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +8915 clk cpu0 IT (8879) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +8915 clk cpu0 R cpsr 220003c5 +8916 clk cpu0 IS (8880) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +8917 clk cpu0 IT (8881) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +8917 clk cpu0 R cpsr 220003c5 +8918 clk cpu0 IS (8882) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +8919 clk cpu0 IT (8883) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +8919 clk cpu0 R cpsr 620003c5 +8920 clk cpu0 IT (8884) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +8921 clk cpu0 IT (8885) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +8921 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +8921 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000004 +8921 clk cpu0 R X0 0000000000000002 +8921 clk cpu0 R X1 0000000000000004 +8922 clk cpu0 IT (8886) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +8922 clk cpu0 R SP_EL1 0000000003700610 +8923 clk cpu0 IT (8887) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +8923 clk cpu0 R X0 0000000000000004 +8924 clk cpu0 IT (8888) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +8924 clk cpu0 R X1 0000000000000000 +8925 clk cpu0 IT (8889) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8925 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +8925 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010b48 +8925 clk cpu0 R SP_EL1 0000000003700600 +8926 clk cpu0 IT (8890) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +8926 clk cpu0 R X30 00000000000381D4 +8927 clk cpu0 IT (8891) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +8927 clk cpu0 R X9 0000000003006000 +8928 clk cpu0 IT (8892) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +8928 clk cpu0 R X8 0000000000000001 +8929 clk cpu0 IT (8893) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +8929 clk cpu0 R X9 00000000030062A0 +8930 clk cpu0 IT (8894) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +8930 clk cpu0 MR8 030062a8:0000008062a8_NS 00000000_000a10c0 +8930 clk cpu0 R X2 00000000000A10C0 +8930 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0114 ALLOC 0x000000806280_NS +8930 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 18a0 ALLOC 0x000000806280_NS +8931 clk cpu0 IT (8895) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +8931 clk cpu0 R X0 0000000000000000 +8932 clk cpu0 IT (8896) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +8932 clk cpu0 R cpsr 620007c5 +8932 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0086 ALLOC 0x0000100a10c0_NS +8932 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0430 ALLOC 0x0000100a10c0_NS +8933 clk cpu0 IT (8897) 000a10c0:0000100a10c0_NS d5110100 O EL1h_n : MSR TRCPRGCTLR,x0 +8933 clk cpu0 R cpsr 620003c5 +8933 clk cpu0 R TRCPRGCTLR 00000000:00000000 +8934 clk cpu0 IT (8898) 000a10c4:0000100a10c4_NS d5033fdf O EL1h_n : ISB +8934 clk cpu0 R PMBIDR_EL1 00000030 +8934 clk cpu0 R TRBIDR_EL1 000000000000002b +8935 clk cpu0 IT (8899) 000a10c8:0000100a10c8_NS d65f03c0 O EL1h_n : RET +8936 clk cpu0 IT (8900) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8936 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +8936 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010b48 +8936 clk cpu0 R SP_EL1 0000000003700610 +8936 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8936 clk cpu0 R X30 0000000000010B48 +8937 clk cpu0 IT (8901) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +8937 clk cpu0 R cpsr 620003c5 +8937 clk cpu0 R PMBIDR_EL1 00000030 +8937 clk cpu0 R TRBIDR_EL1 000000000000002b +8938 clk cpu0 IT (8902) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8938 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +8938 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010b48 +8938 clk cpu0 R SP_EL1 0000000003700620 +8938 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8938 clk cpu0 R X30 0000000000010B48 +8939 clk cpu0 IT (8903) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +8940 clk cpu0 IT (8904) 00010b48:000010010b48_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +8940 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +8940 clk cpu0 R X3 0000000000000000 +8941 clk cpu0 IT (8905) 00010b4c:000010010b4c_NS b94047e0 O EL1h_n : LDR w0,[sp,#0x44] +8941 clk cpu0 MR4 03700664:000000f00664_NS 00000004 +8941 clk cpu0 R X0 0000000000000004 +8942 clk cpu0 IT (8906) 00010b50:000010010b50_NS b94043e1 O EL1h_n : LDR w1,[sp,#0x40] +8942 clk cpu0 MR4 03700660:000000f00660_NS 00000001 +8942 clk cpu0 R X1 0000000000000001 +8943 clk cpu0 IT (8907) 00010b54:000010010b54_NS b9403fe2 O EL1h_n : LDR w2,[sp,#0x3c] +8943 clk cpu0 MR4 0370065c:000000f0065c_NS 00000003 +8943 clk cpu0 R X2 0000000000000003 +8944 clk cpu0 IT (8908) 00010b58:000010010b58_NS 94022ae7 O EL1h_n : BL 0x9b6f4 +8944 clk cpu0 R X30 0000000000010B5C +8945 clk cpu0 IT (8909) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +8945 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +8945 clk cpu0 R SP_EL1 0000000003700600 +8946 clk cpu0 IT (8910) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +8946 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +8946 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010b5c +8947 clk cpu0 IT (8911) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +8947 clk cpu0 R cpsr 220003c5 +8948 clk cpu0 IT (8912) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +8948 clk cpu0 R X19 0000000000000004 +8949 clk cpu0 IS (8913) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +8950 clk cpu0 IT (8914) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +8950 clk cpu0 R cpsr 620003c5 +8951 clk cpu0 IT (8915) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +8952 clk cpu0 IT (8916) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +8952 clk cpu0 R X1 0000000000000004 +8953 clk cpu0 IT (8917) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +8953 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +8953 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010b5c +8953 clk cpu0 R X19 1818181818181818 +8953 clk cpu0 R X30 0000000000010B5C +8954 clk cpu0 IT (8918) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +8954 clk cpu0 R X0 0000000000000001 +8955 clk cpu0 IT (8919) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +8955 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +8955 clk cpu0 R SP_EL1 0000000003700620 +8955 clk cpu0 R X20 001FFFFFFFFFFFFE +8956 clk cpu0 IT (8920) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +8957 clk cpu0 IT (8921) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8957 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +8957 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010b5c +8957 clk cpu0 R SP_EL1 0000000003700610 +8958 clk cpu0 IT (8922) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +8958 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +8958 clk cpu0 R cpsr 620003c5 +8958 clk cpu0 R PMBIDR_EL1 00000030 +8958 clk cpu0 R ESR_EL1 56000005 +8958 clk cpu0 R SPSR_EL1 620003c5 +8958 clk cpu0 R TRBIDR_EL1 000000000000002b +8958 clk cpu0 R ELR_EL1 000000000009ef50 +8959 clk cpu0 IT (8923) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +8960 clk cpu0 IT (8924) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +8960 clk cpu0 R SP_EL1 0000000003700510 +8961 clk cpu0 IT (8925) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +8961 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +8961 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000004 +8962 clk cpu0 IT (8926) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +8962 clk cpu0 R X0 0000000056000005 +8963 clk cpu0 IT (8927) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +8963 clk cpu0 R X1 0000000000000015 +8964 clk cpu0 IT (8928) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +8964 clk cpu0 R cpsr 620003c5 +8965 clk cpu0 IT (8929) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +8966 clk cpu0 IT (8930) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +8966 clk cpu0 R X1 0000000000000005 +8967 clk cpu0 IT (8931) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +8967 clk cpu0 R cpsr 620003c5 +8968 clk cpu0 IS (8932) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +8969 clk cpu0 IT (8933) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +8969 clk cpu0 R cpsr 820003c5 +8970 clk cpu0 IS (8934) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +8971 clk cpu0 IT (8935) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +8971 clk cpu0 R cpsr 820003c5 +8972 clk cpu0 IS (8936) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +8973 clk cpu0 IT (8937) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +8973 clk cpu0 R cpsr 820003c5 +8974 clk cpu0 IS (8938) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +8975 clk cpu0 IT (8939) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +8975 clk cpu0 R cpsr 820003c5 +8976 clk cpu0 IS (8940) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +8977 clk cpu0 IT (8941) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +8977 clk cpu0 R cpsr 820003c5 +8978 clk cpu0 IS (8942) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +8979 clk cpu0 IT (8943) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +8979 clk cpu0 R cpsr 820003c5 +8980 clk cpu0 IS (8944) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +8981 clk cpu0 IT (8945) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +8981 clk cpu0 R cpsr 620003c5 +8982 clk cpu0 IT (8946) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +8983 clk cpu0 IT (8947) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +8983 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +8983 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000004 +8983 clk cpu0 R X0 0000000000000001 +8983 clk cpu0 R X1 0000000000000004 +8984 clk cpu0 IT (8948) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +8984 clk cpu0 R SP_EL1 0000000003700610 +8985 clk cpu0 IT (8949) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +8985 clk cpu0 R X0 0000000000000004 +8986 clk cpu0 IT (8950) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +8986 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +8986 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010b5c +8986 clk cpu0 R SP_EL1 0000000003700600 +8987 clk cpu0 IT (8951) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +8987 clk cpu0 R X30 00000000000381B4 +8988 clk cpu0 IT (8952) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +8988 clk cpu0 R X9 0000000003003000 +8989 clk cpu0 IT (8953) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +8989 clk cpu0 R X8 0000000000000001 +8990 clk cpu0 IT (8954) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +8990 clk cpu0 R X9 00000000030039C8 +8991 clk cpu0 IT (8955) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +8991 clk cpu0 MR8 030039d0:0000008039d0_NS 00000000_0009f3c0 +8991 clk cpu0 R X0 000000000009F3C0 +8991 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 01ce ALLOC 0x0000008039c0_NS +8991 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0e70 ALLOC 0x0000008039c0_NS +8992 clk cpu0 IT (8956) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +8992 clk cpu0 R cpsr 620007c5 +8992 clk cpu0 CACHE cpu.cpu0.l1icache LINE 019f ALLOC 0x00001009f3c0_NS +8992 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1cf0 ALLOC 0x00001009f3c0_NS +8993 clk cpu0 IT (8957) 0009f3c0:00001009f3c0_NS d5310100 O EL1h_n : MRS x0,TRCPRGCTLR +8993 clk cpu0 R cpsr 620003c5 +8993 clk cpu0 R X0 0000000000000000 +8994 clk cpu0 IT (8958) 0009f3c4:00001009f3c4_NS d65f03c0 O EL1h_n : RET +8995 clk cpu0 IT (8959) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8995 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +8995 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010b5c +8995 clk cpu0 R SP_EL1 0000000003700610 +8995 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8995 clk cpu0 R X30 0000000000010B5C +8996 clk cpu0 IT (8960) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +8996 clk cpu0 R cpsr 620003c5 +8996 clk cpu0 R PMBIDR_EL1 00000030 +8996 clk cpu0 R TRBIDR_EL1 000000000000002b +8997 clk cpu0 IT (8961) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +8997 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +8997 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010b5c +8997 clk cpu0 R SP_EL1 0000000003700620 +8997 clk cpu0 R X29 7FFF7FFF7FFF7FFF +8997 clk cpu0 R X30 0000000000010B5C +8998 clk cpu0 IT (8962) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +8999 clk cpu0 IT (8963) 00010b5c:000010010b5c_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +8999 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9000 clk cpu0 IT (8964) 00010b60:000010010b60_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9000 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +9000 clk cpu0 R X8 0000000000000000 +9001 clk cpu0 IT (8965) 00010b64:000010010b64_NS b94043eb O EL1h_n : LDR w11,[sp,#0x40] +9001 clk cpu0 MR4 03700660:000000f00660_NS 00000001 +9001 clk cpu0 R X11 0000000000000001 +9002 clk cpu0 IT (8966) 00010b68:000010010b68_NS 0a0b0108 O EL1h_n : AND w8,w8,w11 +9002 clk cpu0 R X8 0000000000000000 +9003 clk cpu0 IT (8967) 00010b6c:000010010b6c_NS 34000048 O EL1h_n : CBZ w8,0x10b74 +9004 clk cpu0 IT (8968) 00010b74:000010010b74_NS 52800028 O EL1h_n : MOV w8,#1 +9004 clk cpu0 R X8 0000000000000001 +9005 clk cpu0 IT (8969) 00010b78:000010010b78_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9005 clk cpu0 MW4 037007b8:000000f007b8_NS 00000001 +9006 clk cpu0 IT (8970) 00010b7c:000010010b7c_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9006 clk cpu0 MR4 037007b8:000000f007b8_NS 00000001 +9006 clk cpu0 R X2 0000000000000001 +9006 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005d INVAL 0x0000100a4b80_NS +9006 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005d ALLOC 0x000010010b80_NS +9006 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 02e1 ALLOC 0x000010010b80_NS +9007 clk cpu0 IT (8971) 00010b80:000010010b80_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9007 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9007 clk cpu0 R X4 0000000000000000 +9008 clk cpu0 IT (8972) 00010b84:000010010b84_NS 52800200 O EL1h_n : MOV w0,#0x10 +9008 clk cpu0 R X0 0000000000000010 +9009 clk cpu0 IT (8973) 00010b88:000010010b88_NS 2a0803e1 O EL1h_n : MOV w1,w8 +9009 clk cpu0 R X1 0000000000000001 +9010 clk cpu0 IT (8974) 00010b8c:000010010b8c_NS 52800069 O EL1h_n : MOV w9,#3 +9010 clk cpu0 R X9 0000000000000003 +9011 clk cpu0 IT (8975) 00010b90:000010010b90_NS 2a0903e3 O EL1h_n : MOV w3,w9 +9011 clk cpu0 R X3 0000000000000003 +9012 clk cpu0 IT (8976) 00010b94:000010010b94_NS b9003be8 O EL1h_n : STR w8,[sp,#0x38] +9012 clk cpu0 MW4 03700658:000000f00658_NS 00000001 +9013 clk cpu0 IT (8977) 00010b98:000010010b98_NS b90037e9 O EL1h_n : STR w9,[sp,#0x34] +9013 clk cpu0 MW4 03700654:000000f00654_NS 00000003 +9014 clk cpu0 IT (8978) 00010b9c:000010010b9c_NS 940233d5 O EL1h_n : BL 0x9daf0 +9014 clk cpu0 R X30 0000000000010BA0 +9015 clk cpu0 IT (8979) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9015 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9015 clk cpu0 R SP_EL1 00000000037005F0 +9016 clk cpu0 IT (8980) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9016 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9016 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9017 clk cpu0 IT (8981) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9017 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9017 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010ba0 +9018 clk cpu0 IT (8982) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9018 clk cpu0 R X19 0000000000000001 +9019 clk cpu0 IT (8983) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9019 clk cpu0 R cpsr 220003c5 +9020 clk cpu0 IT (8984) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9020 clk cpu0 R X20 0000000000000010 +9021 clk cpu0 IS (8985) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9022 clk cpu0 IT (8986) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9022 clk cpu0 R cpsr 620003c5 +9023 clk cpu0 IT (8987) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9024 clk cpu0 IT (8988) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9024 clk cpu0 R X1 0000000000000010 +9025 clk cpu0 IT (8989) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9025 clk cpu0 R X2 0000000000000001 +9026 clk cpu0 IT (8990) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9026 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9026 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010ba0 +9026 clk cpu0 R X19 1818181818181818 +9026 clk cpu0 R X30 0000000000010BA0 +9027 clk cpu0 IT (8991) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9027 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9027 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9027 clk cpu0 R X20 001FFFFFFFFFFFFE +9027 clk cpu0 R X21 0000000000F00000 +9028 clk cpu0 IT (8992) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9028 clk cpu0 R X0 0000000000000002 +9029 clk cpu0 IT (8993) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9029 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9029 clk cpu0 R SP_EL1 0000000003700620 +9029 clk cpu0 R X22 FFFFFFFFFFFE0003 +9030 clk cpu0 IT (8994) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9031 clk cpu0 IT (8995) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9031 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9031 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010ba0 +9031 clk cpu0 R SP_EL1 0000000003700610 +9032 clk cpu0 IT (8996) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9032 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9032 clk cpu0 R cpsr 620003c5 +9032 clk cpu0 R PMBIDR_EL1 00000030 +9032 clk cpu0 R ESR_EL1 5600000a +9032 clk cpu0 R SPSR_EL1 620003c5 +9032 clk cpu0 R TRBIDR_EL1 000000000000002b +9032 clk cpu0 R ELR_EL1 000000000009ef60 +9033 clk cpu0 IT (8997) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9034 clk cpu0 IT (8998) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9034 clk cpu0 R SP_EL1 0000000003700510 +9035 clk cpu0 IT (8999) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9035 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9035 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000010 +9036 clk cpu0 IT (9000) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9036 clk cpu0 R X0 000000005600000A +9037 clk cpu0 IT (9001) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9037 clk cpu0 R X1 0000000000000015 +9038 clk cpu0 IT (9002) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9038 clk cpu0 R cpsr 620003c5 +9039 clk cpu0 IT (9003) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9040 clk cpu0 IT (9004) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9040 clk cpu0 R X1 000000000000000A +9041 clk cpu0 IT (9005) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9041 clk cpu0 R cpsr 220003c5 +9042 clk cpu0 IS (9006) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9043 clk cpu0 IT (9007) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9043 clk cpu0 R cpsr 620003c5 +9044 clk cpu0 IS (9008) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9045 clk cpu0 IT (9009) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9045 clk cpu0 R cpsr 220003c5 +9046 clk cpu0 IS (9010) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9047 clk cpu0 IT (9011) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9047 clk cpu0 R cpsr 220003c5 +9048 clk cpu0 IS (9012) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9049 clk cpu0 IT (9013) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9049 clk cpu0 R cpsr 220003c5 +9050 clk cpu0 IS (9014) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9051 clk cpu0 IT (9015) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9051 clk cpu0 R cpsr 220003c5 +9052 clk cpu0 IS (9016) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9053 clk cpu0 IT (9017) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9053 clk cpu0 R cpsr 220003c5 +9054 clk cpu0 IS (9018) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9055 clk cpu0 IT (9019) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9055 clk cpu0 R cpsr 220003c5 +9056 clk cpu0 IS (9020) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9057 clk cpu0 IT (9021) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9057 clk cpu0 R cpsr 620003c5 +9058 clk cpu0 IT (9022) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9059 clk cpu0 IT (9023) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9059 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9059 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000010 +9059 clk cpu0 R X0 0000000000000002 +9059 clk cpu0 R X1 0000000000000010 +9060 clk cpu0 IT (9024) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9060 clk cpu0 R SP_EL1 0000000003700610 +9061 clk cpu0 IT (9025) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9061 clk cpu0 R X0 0000000000000010 +9062 clk cpu0 IT (9026) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9062 clk cpu0 R X1 0000000000000001 +9063 clk cpu0 IT (9027) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9063 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9063 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010ba0 +9063 clk cpu0 R SP_EL1 0000000003700600 +9064 clk cpu0 IT (9028) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9064 clk cpu0 R X30 00000000000381D4 +9065 clk cpu0 IT (9029) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9065 clk cpu0 R X9 0000000003006000 +9066 clk cpu0 IT (9030) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9066 clk cpu0 R X8 0000000000000004 +9067 clk cpu0 IT (9031) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9067 clk cpu0 R X9 00000000030062A0 +9068 clk cpu0 IT (9032) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9068 clk cpu0 MR8 030062c0:0000008062c0_NS 00000000_000a10dc +9068 clk cpu0 R X2 00000000000A10DC +9069 clk cpu0 IT (9033) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9069 clk cpu0 R X0 0000000000000001 +9070 clk cpu0 IT (9034) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9070 clk cpu0 R cpsr 620007c5 +9071 clk cpu0 IT (9035) 000a10dc:0000100a10dc_NS d5110400 O EL1h_n : MSR TRCCONFIGR,x0 +9071 clk cpu0 R cpsr 620003c5 +9071 clk cpu0 R TRCCONFIGR 00000000:00000001 +9072 clk cpu0 IT (9036) 000a10e0:0000100a10e0_NS d65f03c0 O EL1h_n : RET +9073 clk cpu0 IT (9037) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9073 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9073 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010ba0 +9073 clk cpu0 R SP_EL1 0000000003700610 +9073 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9073 clk cpu0 R X30 0000000000010BA0 +9074 clk cpu0 IT (9038) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9074 clk cpu0 R cpsr 620003c5 +9074 clk cpu0 R PMBIDR_EL1 00000030 +9074 clk cpu0 R TRBIDR_EL1 000000000000002b +9075 clk cpu0 IT (9039) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9075 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9075 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010ba0 +9075 clk cpu0 R SP_EL1 0000000003700620 +9075 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9075 clk cpu0 R X30 0000000000010BA0 +9076 clk cpu0 IT (9040) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9077 clk cpu0 IT (9041) 00010ba0:000010010ba0_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +9077 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9077 clk cpu0 R X3 0000000000000000 +9078 clk cpu0 IT (9042) 00010ba4:000010010ba4_NS 52803c00 O EL1h_n : MOV w0,#0x1e0 +9078 clk cpu0 R X0 00000000000001E0 +9079 clk cpu0 IT (9043) 00010ba8:000010010ba8_NS b9403be1 O EL1h_n : LDR w1,[sp,#0x38] +9079 clk cpu0 MR4 03700658:000000f00658_NS 00000001 +9079 clk cpu0 R X1 0000000000000001 +9080 clk cpu0 IT (9044) 00010bac:000010010bac_NS b94037e2 O EL1h_n : LDR w2,[sp,#0x34] +9080 clk cpu0 MR4 03700654:000000f00654_NS 00000003 +9080 clk cpu0 R X2 0000000000000003 +9081 clk cpu0 IT (9045) 00010bb0:000010010bb0_NS 94022ad1 O EL1h_n : BL 0x9b6f4 +9081 clk cpu0 R X30 0000000000010BB4 +9082 clk cpu0 IT (9046) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +9082 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +9082 clk cpu0 R SP_EL1 0000000003700600 +9083 clk cpu0 IT (9047) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +9083 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9083 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010bb4 +9084 clk cpu0 IT (9048) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +9084 clk cpu0 R cpsr 220003c5 +9085 clk cpu0 IT (9049) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +9085 clk cpu0 R X19 00000000000001E0 +9086 clk cpu0 IS (9050) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +9087 clk cpu0 IT (9051) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +9087 clk cpu0 R cpsr 620003c5 +9088 clk cpu0 IT (9052) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +9089 clk cpu0 IT (9053) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +9089 clk cpu0 R X1 00000000000001E0 +9090 clk cpu0 IT (9054) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +9090 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9090 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010bb4 +9090 clk cpu0 R X19 1818181818181818 +9090 clk cpu0 R X30 0000000000010BB4 +9091 clk cpu0 IT (9055) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +9091 clk cpu0 R X0 0000000000000001 +9092 clk cpu0 IT (9056) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +9092 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +9092 clk cpu0 R SP_EL1 0000000003700620 +9092 clk cpu0 R X20 001FFFFFFFFFFFFE +9093 clk cpu0 IT (9057) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +9094 clk cpu0 IT (9058) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9094 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9094 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010bb4 +9094 clk cpu0 R SP_EL1 0000000003700610 +9095 clk cpu0 IT (9059) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +9095 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9095 clk cpu0 R cpsr 620003c5 +9095 clk cpu0 R PMBIDR_EL1 00000030 +9095 clk cpu0 R ESR_EL1 56000005 +9095 clk cpu0 R SPSR_EL1 620003c5 +9095 clk cpu0 R TRBIDR_EL1 000000000000002b +9095 clk cpu0 R ELR_EL1 000000000009ef50 +9096 clk cpu0 IT (9060) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9097 clk cpu0 IT (9061) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9097 clk cpu0 R SP_EL1 0000000003700510 +9098 clk cpu0 IT (9062) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9098 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +9098 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001e0 +9099 clk cpu0 IT (9063) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9099 clk cpu0 R X0 0000000056000005 +9100 clk cpu0 IT (9064) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9100 clk cpu0 R X1 0000000000000015 +9101 clk cpu0 IT (9065) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9101 clk cpu0 R cpsr 620003c5 +9102 clk cpu0 IT (9066) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9103 clk cpu0 IT (9067) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9103 clk cpu0 R X1 0000000000000005 +9104 clk cpu0 IT (9068) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9104 clk cpu0 R cpsr 620003c5 +9105 clk cpu0 IS (9069) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9106 clk cpu0 IT (9070) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9106 clk cpu0 R cpsr 820003c5 +9107 clk cpu0 IS (9071) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9108 clk cpu0 IT (9072) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9108 clk cpu0 R cpsr 820003c5 +9109 clk cpu0 IS (9073) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9110 clk cpu0 IT (9074) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9110 clk cpu0 R cpsr 820003c5 +9111 clk cpu0 IS (9075) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9112 clk cpu0 IT (9076) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9112 clk cpu0 R cpsr 820003c5 +9113 clk cpu0 IS (9077) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9114 clk cpu0 IT (9078) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9114 clk cpu0 R cpsr 820003c5 +9115 clk cpu0 IS (9079) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9116 clk cpu0 IT (9080) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9116 clk cpu0 R cpsr 820003c5 +9117 clk cpu0 IS (9081) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9118 clk cpu0 IT (9082) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9118 clk cpu0 R cpsr 620003c5 +9119 clk cpu0 IT (9083) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9120 clk cpu0 IT (9084) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9120 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +9120 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001e0 +9120 clk cpu0 R X0 0000000000000001 +9120 clk cpu0 R X1 00000000000001E0 +9121 clk cpu0 IT (9085) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9121 clk cpu0 R SP_EL1 0000000003700610 +9122 clk cpu0 IT (9086) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +9122 clk cpu0 R X0 00000000000001E0 +9123 clk cpu0 IT (9087) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9123 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9123 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010bb4 +9123 clk cpu0 R SP_EL1 0000000003700600 +9124 clk cpu0 IT (9088) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +9124 clk cpu0 R X30 00000000000381B4 +9125 clk cpu0 IT (9089) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +9125 clk cpu0 R X9 0000000003003000 +9126 clk cpu0 IT (9090) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9126 clk cpu0 R X8 0000000000000078 +9127 clk cpu0 IT (9091) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +9127 clk cpu0 R X9 00000000030039C8 +9128 clk cpu0 IT (9092) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +9128 clk cpu0 MR8 03003d88:000000803d88_NS 00000000_0009f778 +9128 clk cpu0 R X0 000000000009F778 +9129 clk cpu0 IT (9093) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +9129 clk cpu0 R cpsr 620007c5 +9129 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01ba INVAL 0x000010093740_NS +9129 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01ba ALLOC 0x00001009f740_NS +9129 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1dd0 ALLOC 0x00001009f740_NS +9130 clk cpu0 IT (9094) 0009f778:00001009f778_NS d53108e0 O EL1h_n : MRS x0,TRCIDR0 +9130 clk cpu0 R cpsr 620003c5 +9130 clk cpu0 R X0 0000000008000AA1 +9131 clk cpu0 IT (9095) 0009f77c:00001009f77c_NS d65f03c0 O EL1h_n : RET +9132 clk cpu0 IT (9096) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9132 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9132 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010bb4 +9132 clk cpu0 R SP_EL1 0000000003700610 +9132 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9132 clk cpu0 R X30 0000000000010BB4 +9133 clk cpu0 IT (9097) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +9133 clk cpu0 R cpsr 620003c5 +9133 clk cpu0 R PMBIDR_EL1 00000030 +9133 clk cpu0 R TRBIDR_EL1 000000000000002b +9134 clk cpu0 IT (9098) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9134 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9134 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010bb4 +9134 clk cpu0 R SP_EL1 0000000003700620 +9134 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9134 clk cpu0 R X30 0000000000010BB4 +9135 clk cpu0 IT (9099) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +9136 clk cpu0 IT (9100) 00010bb4:000010010bb4_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +9136 clk cpu0 MW4 037007b8:000000f007b8_NS 08000aa1 +9137 clk cpu0 IT (9101) 00010bb8:000010010bb8_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9137 clk cpu0 MR4 037007b8:000000f007b8_NS 08000aa1 +9137 clk cpu0 R X8 0000000008000AA1 +9138 clk cpu0 IT (9102) 00010bbc:000010010bbc_NS 52801009 O EL1h_n : MOV w9,#0x80 +9138 clk cpu0 R X9 0000000000000080 +9138 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005f INVAL 0x0000100a4bc0_NS +9138 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005f ALLOC 0x000010010bc0_NS +9138 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 02f2 ALLOC 0x000010010bc0_NS +9139 clk cpu0 IT (9103) 00010bc0:000010010bc0_NS 0a090108 O EL1h_n : AND w8,w8,w9 +9139 clk cpu0 R X8 0000000000000080 +9140 clk cpu0 IT (9104) 00010bc4:000010010bc4_NS 528000e9 O EL1h_n : MOV w9,#7 +9140 clk cpu0 R X9 0000000000000007 +9141 clk cpu0 IT (9105) 00010bc8:000010010bc8_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +9141 clk cpu0 R X8 0000000000000001 +9142 clk cpu0 IT (9106) 00010bcc:000010010bcc_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9142 clk cpu0 MW4 037007b8:000000f007b8_NS 00000001 +9143 clk cpu0 IT (9107) 00010bd0:000010010bd0_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9143 clk cpu0 MR4 037007b8:000000f007b8_NS 00000001 +9143 clk cpu0 R X8 0000000000000001 +9144 clk cpu0 IT (9108) 00010bd4:000010010bd4_NS 7100051f O EL1h_n : CMP w8,#1 +9144 clk cpu0 R cpsr 620003c5 +9145 clk cpu0 IT (9109) 00010bd8:000010010bd8_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +9145 clk cpu0 R X8 0000000000000001 +9146 clk cpu0 IT (9110) 00010bdc:000010010bdc_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10be4 +9147 clk cpu0 IT (9111) 00010be4:000010010be4_NS 528002c8 O EL1h_n : MOV w8,#0x16 +9147 clk cpu0 R X8 0000000000000016 +9148 clk cpu0 IT (9112) 00010be8:000010010be8_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9148 clk cpu0 MW4 037007b8:000000f007b8_NS 00000016 +9149 clk cpu0 IT (9113) 00010bec:000010010bec_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9149 clk cpu0 MR4 037007b8:000000f007b8_NS 00000016 +9149 clk cpu0 R X2 0000000000000016 +9150 clk cpu0 IT (9114) 00010bf0:000010010bf0_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9150 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9150 clk cpu0 R X4 0000000000000000 +9151 clk cpu0 IT (9115) 00010bf4:000010010bf4_NS 52800700 O EL1h_n : MOV w0,#0x38 +9151 clk cpu0 R X0 0000000000000038 +9152 clk cpu0 IT (9116) 00010bf8:000010010bf8_NS 52800021 O EL1h_n : MOV w1,#1 +9152 clk cpu0 R X1 0000000000000001 +9153 clk cpu0 IT (9117) 00010bfc:000010010bfc_NS 52800063 O EL1h_n : MOV w3,#3 +9153 clk cpu0 R X3 0000000000000003 +9153 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0060 INVAL 0x000010090c00 +9153 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0060 ALLOC 0x000010010c00_NS +9153 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0303 ALLOC 0x000010010c00_NS +9154 clk cpu0 IT (9118) 00010c00:000010010c00_NS 940233bc O EL1h_n : BL 0x9daf0 +9154 clk cpu0 R X30 0000000000010C04 +9155 clk cpu0 IT (9119) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9155 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9155 clk cpu0 R SP_EL1 00000000037005F0 +9156 clk cpu0 IT (9120) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9156 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9156 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9157 clk cpu0 IT (9121) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9157 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9157 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c04 +9158 clk cpu0 IT (9122) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9158 clk cpu0 R X19 0000000000000016 +9159 clk cpu0 IT (9123) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9159 clk cpu0 R cpsr 220003c5 +9160 clk cpu0 IT (9124) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9160 clk cpu0 R X20 0000000000000038 +9161 clk cpu0 IS (9125) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9162 clk cpu0 IT (9126) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9162 clk cpu0 R cpsr 620003c5 +9163 clk cpu0 IT (9127) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9164 clk cpu0 IT (9128) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9164 clk cpu0 R X1 0000000000000038 +9165 clk cpu0 IT (9129) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9165 clk cpu0 R X2 0000000000000016 +9166 clk cpu0 IT (9130) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9166 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9166 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c04 +9166 clk cpu0 R X19 1818181818181818 +9166 clk cpu0 R X30 0000000000010C04 +9167 clk cpu0 IT (9131) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9167 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9167 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9167 clk cpu0 R X20 001FFFFFFFFFFFFE +9167 clk cpu0 R X21 0000000000F00000 +9168 clk cpu0 IT (9132) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9168 clk cpu0 R X0 0000000000000002 +9169 clk cpu0 IT (9133) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9169 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9169 clk cpu0 R SP_EL1 0000000003700620 +9169 clk cpu0 R X22 FFFFFFFFFFFE0003 +9170 clk cpu0 IT (9134) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9171 clk cpu0 IT (9135) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9171 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9171 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c04 +9171 clk cpu0 R SP_EL1 0000000003700610 +9172 clk cpu0 IT (9136) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9172 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9172 clk cpu0 R cpsr 620003c5 +9172 clk cpu0 R PMBIDR_EL1 00000030 +9172 clk cpu0 R ESR_EL1 5600000a +9172 clk cpu0 R SPSR_EL1 620003c5 +9172 clk cpu0 R TRBIDR_EL1 000000000000002b +9172 clk cpu0 R ELR_EL1 000000000009ef60 +9173 clk cpu0 IT (9137) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9174 clk cpu0 IT (9138) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9174 clk cpu0 R SP_EL1 0000000003700510 +9175 clk cpu0 IT (9139) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9175 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9175 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000038 +9176 clk cpu0 IT (9140) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9176 clk cpu0 R X0 000000005600000A +9177 clk cpu0 IT (9141) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9177 clk cpu0 R X1 0000000000000015 +9178 clk cpu0 IT (9142) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9178 clk cpu0 R cpsr 620003c5 +9179 clk cpu0 IT (9143) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9180 clk cpu0 IT (9144) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9180 clk cpu0 R X1 000000000000000A +9181 clk cpu0 IT (9145) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9181 clk cpu0 R cpsr 220003c5 +9182 clk cpu0 IS (9146) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9183 clk cpu0 IT (9147) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9183 clk cpu0 R cpsr 620003c5 +9184 clk cpu0 IS (9148) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9185 clk cpu0 IT (9149) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9185 clk cpu0 R cpsr 220003c5 +9186 clk cpu0 IS (9150) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9187 clk cpu0 IT (9151) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9187 clk cpu0 R cpsr 220003c5 +9188 clk cpu0 IS (9152) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9189 clk cpu0 IT (9153) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9189 clk cpu0 R cpsr 220003c5 +9190 clk cpu0 IS (9154) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9191 clk cpu0 IT (9155) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9191 clk cpu0 R cpsr 220003c5 +9192 clk cpu0 IS (9156) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9193 clk cpu0 IT (9157) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9193 clk cpu0 R cpsr 220003c5 +9194 clk cpu0 IS (9158) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9195 clk cpu0 IT (9159) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9195 clk cpu0 R cpsr 220003c5 +9196 clk cpu0 IS (9160) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9197 clk cpu0 IT (9161) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9197 clk cpu0 R cpsr 620003c5 +9198 clk cpu0 IT (9162) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9199 clk cpu0 IT (9163) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9199 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9199 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000038 +9199 clk cpu0 R X0 0000000000000002 +9199 clk cpu0 R X1 0000000000000038 +9200 clk cpu0 IT (9164) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9200 clk cpu0 R SP_EL1 0000000003700610 +9201 clk cpu0 IT (9165) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9201 clk cpu0 R X0 0000000000000038 +9202 clk cpu0 IT (9166) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9202 clk cpu0 R X1 0000000000000016 +9203 clk cpu0 IT (9167) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9203 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9203 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010c04 +9203 clk cpu0 R SP_EL1 0000000003700600 +9204 clk cpu0 IT (9168) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9204 clk cpu0 R X30 00000000000381D4 +9205 clk cpu0 IT (9169) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9205 clk cpu0 R X9 0000000003006000 +9206 clk cpu0 IT (9170) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9206 clk cpu0 R X8 000000000000000E +9207 clk cpu0 IT (9171) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9207 clk cpu0 R X9 00000000030062A0 +9208 clk cpu0 IT (9172) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9208 clk cpu0 MR8 03006310:000000806310_NS 00000000_000a112c +9208 clk cpu0 R X2 00000000000A112C +9208 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0118 ALLOC 0x000000806300_NS +9208 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 18c0 ALLOC 0x000000806300_NS +9209 clk cpu0 IT (9173) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9209 clk cpu0 R X0 0000000000000016 +9210 clk cpu0 IT (9174) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9210 clk cpu0 R cpsr 620007c5 +9211 clk cpu0 IT (9175) 000a112c:0000100a112c_NS d5110e00 O EL1h_n : MSR TRCCCCTLR,x0 +9211 clk cpu0 R cpsr 620003c5 +9211 clk cpu0 R TRCCCCTLR 00000000:00000016 +9212 clk cpu0 IT (9176) 000a1130:0000100a1130_NS d65f03c0 O EL1h_n : RET +9213 clk cpu0 IT (9177) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9213 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9213 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010c04 +9213 clk cpu0 R SP_EL1 0000000003700610 +9213 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9213 clk cpu0 R X30 0000000000010C04 +9214 clk cpu0 IT (9178) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9214 clk cpu0 R cpsr 620003c5 +9214 clk cpu0 R PMBIDR_EL1 00000030 +9214 clk cpu0 R TRBIDR_EL1 000000000000002b +9215 clk cpu0 IT (9179) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9215 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9215 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c04 +9215 clk cpu0 R SP_EL1 0000000003700620 +9215 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9215 clk cpu0 R X30 0000000000010C04 +9216 clk cpu0 IT (9180) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9217 clk cpu0 IT (9181) 00010c04:000010010c04_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +9217 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9217 clk cpu0 R X3 0000000000000000 +9218 clk cpu0 IT (9182) 00010c08:000010010c08_NS 52803c00 O EL1h_n : MOV w0,#0x1e0 +9218 clk cpu0 R X0 00000000000001E0 +9219 clk cpu0 IT (9183) 00010c0c:000010010c0c_NS 52800021 O EL1h_n : MOV w1,#1 +9219 clk cpu0 R X1 0000000000000001 +9220 clk cpu0 IT (9184) 00010c10:000010010c10_NS 52800062 O EL1h_n : MOV w2,#3 +9220 clk cpu0 R X2 0000000000000003 +9221 clk cpu0 IT (9185) 00010c14:000010010c14_NS 94022ab8 O EL1h_n : BL 0x9b6f4 +9221 clk cpu0 R X30 0000000000010C18 +9222 clk cpu0 IT (9186) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +9222 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +9222 clk cpu0 R SP_EL1 0000000003700600 +9223 clk cpu0 IT (9187) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +9223 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9223 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c18 +9224 clk cpu0 IT (9188) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +9224 clk cpu0 R cpsr 220003c5 +9225 clk cpu0 IT (9189) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +9225 clk cpu0 R X19 00000000000001E0 +9226 clk cpu0 IS (9190) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +9227 clk cpu0 IT (9191) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +9227 clk cpu0 R cpsr 620003c5 +9228 clk cpu0 IT (9192) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +9229 clk cpu0 IT (9193) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +9229 clk cpu0 R X1 00000000000001E0 +9230 clk cpu0 IT (9194) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +9230 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9230 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c18 +9230 clk cpu0 R X19 1818181818181818 +9230 clk cpu0 R X30 0000000000010C18 +9231 clk cpu0 IT (9195) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +9231 clk cpu0 R X0 0000000000000001 +9232 clk cpu0 IT (9196) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +9232 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +9232 clk cpu0 R SP_EL1 0000000003700620 +9232 clk cpu0 R X20 001FFFFFFFFFFFFE +9233 clk cpu0 IT (9197) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +9234 clk cpu0 IT (9198) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9234 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9234 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c18 +9234 clk cpu0 R SP_EL1 0000000003700610 +9235 clk cpu0 IT (9199) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +9235 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9235 clk cpu0 R cpsr 620003c5 +9235 clk cpu0 R PMBIDR_EL1 00000030 +9235 clk cpu0 R ESR_EL1 56000005 +9235 clk cpu0 R SPSR_EL1 620003c5 +9235 clk cpu0 R TRBIDR_EL1 000000000000002b +9235 clk cpu0 R ELR_EL1 000000000009ef50 +9236 clk cpu0 IT (9200) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9237 clk cpu0 IT (9201) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9237 clk cpu0 R SP_EL1 0000000003700510 +9238 clk cpu0 IT (9202) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9238 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +9238 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001e0 +9239 clk cpu0 IT (9203) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9239 clk cpu0 R X0 0000000056000005 +9240 clk cpu0 IT (9204) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9240 clk cpu0 R X1 0000000000000015 +9241 clk cpu0 IT (9205) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9241 clk cpu0 R cpsr 620003c5 +9242 clk cpu0 IT (9206) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9243 clk cpu0 IT (9207) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9243 clk cpu0 R X1 0000000000000005 +9244 clk cpu0 IT (9208) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9244 clk cpu0 R cpsr 620003c5 +9245 clk cpu0 IS (9209) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9246 clk cpu0 IT (9210) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9246 clk cpu0 R cpsr 820003c5 +9247 clk cpu0 IS (9211) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9248 clk cpu0 IT (9212) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9248 clk cpu0 R cpsr 820003c5 +9249 clk cpu0 IS (9213) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9250 clk cpu0 IT (9214) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9250 clk cpu0 R cpsr 820003c5 +9251 clk cpu0 IS (9215) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9252 clk cpu0 IT (9216) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9252 clk cpu0 R cpsr 820003c5 +9253 clk cpu0 IS (9217) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9254 clk cpu0 IT (9218) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9254 clk cpu0 R cpsr 820003c5 +9255 clk cpu0 IS (9219) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9256 clk cpu0 IT (9220) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9256 clk cpu0 R cpsr 820003c5 +9257 clk cpu0 IS (9221) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9258 clk cpu0 IT (9222) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9258 clk cpu0 R cpsr 620003c5 +9259 clk cpu0 IT (9223) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9260 clk cpu0 IT (9224) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9260 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +9260 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001e0 +9260 clk cpu0 R X0 0000000000000001 +9260 clk cpu0 R X1 00000000000001E0 +9261 clk cpu0 IT (9225) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9261 clk cpu0 R SP_EL1 0000000003700610 +9262 clk cpu0 IT (9226) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +9262 clk cpu0 R X0 00000000000001E0 +9263 clk cpu0 IT (9227) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9263 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9263 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010c18 +9263 clk cpu0 R SP_EL1 0000000003700600 +9264 clk cpu0 IT (9228) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +9264 clk cpu0 R X30 00000000000381B4 +9265 clk cpu0 IT (9229) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +9265 clk cpu0 R X9 0000000003003000 +9266 clk cpu0 IT (9230) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9266 clk cpu0 R X8 0000000000000078 +9267 clk cpu0 IT (9231) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +9267 clk cpu0 R X9 00000000030039C8 +9268 clk cpu0 IT (9232) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +9268 clk cpu0 MR8 03003d88:000000803d88_NS 00000000_0009f778 +9268 clk cpu0 R X0 000000000009F778 +9269 clk cpu0 IT (9233) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +9269 clk cpu0 R cpsr 620007c5 +9270 clk cpu0 IT (9234) 0009f778:00001009f778_NS d53108e0 O EL1h_n : MRS x0,TRCIDR0 +9270 clk cpu0 R cpsr 620003c5 +9270 clk cpu0 R X0 0000000008000AA1 +9271 clk cpu0 IT (9235) 0009f77c:00001009f77c_NS d65f03c0 O EL1h_n : RET +9272 clk cpu0 IT (9236) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9272 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9272 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010c18 +9272 clk cpu0 R SP_EL1 0000000003700610 +9272 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9272 clk cpu0 R X30 0000000000010C18 +9273 clk cpu0 IT (9237) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +9273 clk cpu0 R cpsr 620003c5 +9273 clk cpu0 R PMBIDR_EL1 00000030 +9273 clk cpu0 R TRBIDR_EL1 000000000000002b +9274 clk cpu0 IT (9238) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9274 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9274 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c18 +9274 clk cpu0 R SP_EL1 0000000003700620 +9274 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9274 clk cpu0 R X30 0000000000010C18 +9275 clk cpu0 IT (9239) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +9276 clk cpu0 IT (9240) 00010c18:000010010c18_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +9276 clk cpu0 MW4 037007b8:000000f007b8_NS 08000aa1 +9277 clk cpu0 IT (9241) 00010c1c:000010010c1c_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9277 clk cpu0 MR4 037007b8:000000f007b8_NS 08000aa1 +9277 clk cpu0 R X8 0000000008000AA1 +9278 clk cpu0 IT (9242) 00010c20:000010010c20_NS 52800409 O EL1h_n : MOV w9,#0x20 +9278 clk cpu0 R X9 0000000000000020 +9279 clk cpu0 IT (9243) 00010c24:000010010c24_NS 0a090108 O EL1h_n : AND w8,w8,w9 +9279 clk cpu0 R X8 0000000000000020 +9280 clk cpu0 IT (9244) 00010c28:000010010c28_NS 528000a9 O EL1h_n : MOV w9,#5 +9280 clk cpu0 R X9 0000000000000005 +9281 clk cpu0 IT (9245) 00010c2c:000010010c2c_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +9281 clk cpu0 R X8 0000000000000001 +9282 clk cpu0 IT (9246) 00010c30:000010010c30_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9282 clk cpu0 MW4 037007b8:000000f007b8_NS 00000001 +9283 clk cpu0 IT (9247) 00010c34:000010010c34_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9283 clk cpu0 MR4 037007b8:000000f007b8_NS 00000001 +9283 clk cpu0 R X8 0000000000000001 +9284 clk cpu0 IT (9248) 00010c38:000010010c38_NS 7100051f O EL1h_n : CMP w8,#1 +9284 clk cpu0 R cpsr 620003c5 +9285 clk cpu0 IT (9249) 00010c3c:000010010c3c_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +9285 clk cpu0 R X8 0000000000000001 +9285 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0063 INVAL 0x000010020c40_NS +9285 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0063 ALLOC 0x000010010c40_NS +9285 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0312 ALLOC 0x000010010c40_NS +9286 clk cpu0 IT (9250) 00010c40:000010010c40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10c48 +9287 clk cpu0 IT (9251) 00010c48:000010010c48_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +9287 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9288 clk cpu0 IT (9252) 00010c4c:000010010c4c_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9288 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +9288 clk cpu0 R X2 0000000000000000 +9289 clk cpu0 IT (9253) 00010c50:000010010c50_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9289 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9289 clk cpu0 R X4 0000000000000000 +9290 clk cpu0 IT (9254) 00010c54:000010010c54_NS 52800780 O EL1h_n : MOV w0,#0x3c +9290 clk cpu0 R X0 000000000000003C +9291 clk cpu0 IT (9255) 00010c58:000010010c58_NS 52800021 O EL1h_n : MOV w1,#1 +9291 clk cpu0 R X1 0000000000000001 +9292 clk cpu0 IT (9256) 00010c5c:000010010c5c_NS 52800063 O EL1h_n : MOV w3,#3 +9292 clk cpu0 R X3 0000000000000003 +9293 clk cpu0 IT (9257) 00010c60:000010010c60_NS 940233a4 O EL1h_n : BL 0x9daf0 +9293 clk cpu0 R X30 0000000000010C64 +9294 clk cpu0 IT (9258) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9294 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9294 clk cpu0 R SP_EL1 00000000037005F0 +9295 clk cpu0 IT (9259) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9295 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9295 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9296 clk cpu0 IT (9260) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9296 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9296 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c64 +9297 clk cpu0 IT (9261) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9297 clk cpu0 R X19 0000000000000000 +9298 clk cpu0 IT (9262) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9298 clk cpu0 R cpsr 220003c5 +9299 clk cpu0 IT (9263) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9299 clk cpu0 R X20 000000000000003C +9300 clk cpu0 IS (9264) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9301 clk cpu0 IT (9265) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9301 clk cpu0 R cpsr 620003c5 +9302 clk cpu0 IT (9266) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9303 clk cpu0 IT (9267) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9303 clk cpu0 R X1 000000000000003C +9304 clk cpu0 IT (9268) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9304 clk cpu0 R X2 0000000000000000 +9305 clk cpu0 IT (9269) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9305 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9305 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c64 +9305 clk cpu0 R X19 1818181818181818 +9305 clk cpu0 R X30 0000000000010C64 +9306 clk cpu0 IT (9270) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9306 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9306 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9306 clk cpu0 R X20 001FFFFFFFFFFFFE +9306 clk cpu0 R X21 0000000000F00000 +9307 clk cpu0 IT (9271) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9307 clk cpu0 R X0 0000000000000002 +9308 clk cpu0 IT (9272) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9308 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9308 clk cpu0 R SP_EL1 0000000003700620 +9308 clk cpu0 R X22 FFFFFFFFFFFE0003 +9309 clk cpu0 IT (9273) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9310 clk cpu0 IT (9274) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9310 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9310 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c64 +9310 clk cpu0 R SP_EL1 0000000003700610 +9311 clk cpu0 IT (9275) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9311 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9311 clk cpu0 R cpsr 620003c5 +9311 clk cpu0 R PMBIDR_EL1 00000030 +9311 clk cpu0 R ESR_EL1 5600000a +9311 clk cpu0 R SPSR_EL1 620003c5 +9311 clk cpu0 R TRBIDR_EL1 000000000000002b +9311 clk cpu0 R ELR_EL1 000000000009ef60 +9312 clk cpu0 IT (9276) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9313 clk cpu0 IT (9277) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9313 clk cpu0 R SP_EL1 0000000003700510 +9314 clk cpu0 IT (9278) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9314 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9314 clk cpu0 MW8 03700518:000000f00518_NS 00000000_0000003c +9315 clk cpu0 IT (9279) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9315 clk cpu0 R X0 000000005600000A +9316 clk cpu0 IT (9280) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9316 clk cpu0 R X1 0000000000000015 +9317 clk cpu0 IT (9281) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9317 clk cpu0 R cpsr 620003c5 +9318 clk cpu0 IT (9282) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9319 clk cpu0 IT (9283) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9319 clk cpu0 R X1 000000000000000A +9320 clk cpu0 IT (9284) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9320 clk cpu0 R cpsr 220003c5 +9321 clk cpu0 IS (9285) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9322 clk cpu0 IT (9286) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9322 clk cpu0 R cpsr 620003c5 +9323 clk cpu0 IS (9287) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9324 clk cpu0 IT (9288) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9324 clk cpu0 R cpsr 220003c5 +9325 clk cpu0 IS (9289) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9326 clk cpu0 IT (9290) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9326 clk cpu0 R cpsr 220003c5 +9327 clk cpu0 IS (9291) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9328 clk cpu0 IT (9292) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9328 clk cpu0 R cpsr 220003c5 +9329 clk cpu0 IS (9293) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9330 clk cpu0 IT (9294) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9330 clk cpu0 R cpsr 220003c5 +9331 clk cpu0 IS (9295) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9332 clk cpu0 IT (9296) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9332 clk cpu0 R cpsr 220003c5 +9333 clk cpu0 IS (9297) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9334 clk cpu0 IT (9298) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9334 clk cpu0 R cpsr 220003c5 +9335 clk cpu0 IS (9299) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9336 clk cpu0 IT (9300) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9336 clk cpu0 R cpsr 620003c5 +9337 clk cpu0 IT (9301) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9338 clk cpu0 IT (9302) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9338 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9338 clk cpu0 MR8 03700518:000000f00518_NS 00000000_0000003c +9338 clk cpu0 R X0 0000000000000002 +9338 clk cpu0 R X1 000000000000003C +9339 clk cpu0 IT (9303) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9339 clk cpu0 R SP_EL1 0000000003700610 +9340 clk cpu0 IT (9304) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9340 clk cpu0 R X0 000000000000003C +9341 clk cpu0 IT (9305) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9341 clk cpu0 R X1 0000000000000000 +9342 clk cpu0 IT (9306) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9342 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9342 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010c64 +9342 clk cpu0 R SP_EL1 0000000003700600 +9343 clk cpu0 IT (9307) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9343 clk cpu0 R X30 00000000000381D4 +9344 clk cpu0 IT (9308) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9344 clk cpu0 R X9 0000000003006000 +9345 clk cpu0 IT (9309) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9345 clk cpu0 R X8 000000000000000F +9346 clk cpu0 IT (9310) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9346 clk cpu0 R X9 00000000030062A0 +9347 clk cpu0 IT (9311) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9347 clk cpu0 MR8 03006318:000000806318_NS 00000000_000a1134 +9347 clk cpu0 R X2 00000000000A1134 +9348 clk cpu0 IT (9312) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9348 clk cpu0 R X0 0000000000000000 +9349 clk cpu0 IT (9313) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9349 clk cpu0 R cpsr 620007c5 +9350 clk cpu0 IT (9314) 000a1134:0000100a1134_NS d5110f00 O EL1h_n : MSR TRCBBCTLR,x0 +9350 clk cpu0 R cpsr 620003c5 +9350 clk cpu0 R TRCBBCTLR 00000000:00000000 +9351 clk cpu0 IT (9315) 000a1138:0000100a1138_NS d65f03c0 O EL1h_n : RET +9352 clk cpu0 IT (9316) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9352 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9352 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010c64 +9352 clk cpu0 R SP_EL1 0000000003700610 +9352 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9352 clk cpu0 R X30 0000000000010C64 +9353 clk cpu0 IT (9317) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9353 clk cpu0 R cpsr 620003c5 +9353 clk cpu0 R PMBIDR_EL1 00000030 +9353 clk cpu0 R TRBIDR_EL1 000000000000002b +9354 clk cpu0 IT (9318) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9354 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9354 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c64 +9354 clk cpu0 R SP_EL1 0000000003700620 +9354 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9354 clk cpu0 R X30 0000000000010C64 +9355 clk cpu0 IT (9319) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9356 clk cpu0 IT (9320) 00010c64:000010010c64_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +9356 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9357 clk cpu0 IT (9321) 00010c68:000010010c68_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +9357 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9357 clk cpu0 R X3 0000000000000000 +9358 clk cpu0 IT (9322) 00010c6c:000010010c6c_NS 52803c80 O EL1h_n : MOV w0,#0x1e4 +9358 clk cpu0 R X0 00000000000001E4 +9359 clk cpu0 IT (9323) 00010c70:000010010c70_NS 52800028 O EL1h_n : MOV w8,#1 +9359 clk cpu0 R X8 0000000000000001 +9360 clk cpu0 IT (9324) 00010c74:000010010c74_NS 2a0803e1 O EL1h_n : MOV w1,w8 +9360 clk cpu0 R X1 0000000000000001 +9361 clk cpu0 IT (9325) 00010c78:000010010c78_NS 52800069 O EL1h_n : MOV w9,#3 +9361 clk cpu0 R X9 0000000000000003 +9362 clk cpu0 IT (9326) 00010c7c:000010010c7c_NS 2a0903e2 O EL1h_n : MOV w2,w9 +9362 clk cpu0 R X2 0000000000000003 +9362 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0064 INVAL 0x000010090c80 +9362 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0064 ALLOC 0x000010010c80_NS +9362 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0322 ALLOC 0x000010010c80_NS +9363 clk cpu0 IT (9327) 00010c80:000010010c80_NS b90033e8 O EL1h_n : STR w8,[sp,#0x30] +9363 clk cpu0 MW4 03700650:000000f00650_NS 00000001 +9364 clk cpu0 IT (9328) 00010c84:000010010c84_NS b9002fe9 O EL1h_n : STR w9,[sp,#0x2c] +9364 clk cpu0 MW4 0370064c:000000f0064c_NS 00000003 +9365 clk cpu0 IT (9329) 00010c88:000010010c88_NS 94022a9b O EL1h_n : BL 0x9b6f4 +9365 clk cpu0 R X30 0000000000010C8C +9366 clk cpu0 IT (9330) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +9366 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +9366 clk cpu0 R SP_EL1 0000000003700600 +9367 clk cpu0 IT (9331) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +9367 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9367 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c8c +9368 clk cpu0 IT (9332) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +9368 clk cpu0 R cpsr 220003c5 +9369 clk cpu0 IT (9333) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +9369 clk cpu0 R X19 00000000000001E4 +9370 clk cpu0 IS (9334) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +9371 clk cpu0 IT (9335) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +9371 clk cpu0 R cpsr 620003c5 +9372 clk cpu0 IT (9336) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +9373 clk cpu0 IT (9337) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +9373 clk cpu0 R X1 00000000000001E4 +9374 clk cpu0 IT (9338) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +9374 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9374 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c8c +9374 clk cpu0 R X19 1818181818181818 +9374 clk cpu0 R X30 0000000000010C8C +9375 clk cpu0 IT (9339) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +9375 clk cpu0 R X0 0000000000000001 +9376 clk cpu0 IT (9340) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +9376 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +9376 clk cpu0 R SP_EL1 0000000003700620 +9376 clk cpu0 R X20 001FFFFFFFFFFFFE +9377 clk cpu0 IT (9341) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +9378 clk cpu0 IT (9342) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9378 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9378 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010c8c +9378 clk cpu0 R SP_EL1 0000000003700610 +9379 clk cpu0 IT (9343) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +9379 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9379 clk cpu0 R cpsr 620003c5 +9379 clk cpu0 R PMBIDR_EL1 00000030 +9379 clk cpu0 R ESR_EL1 56000005 +9379 clk cpu0 R SPSR_EL1 620003c5 +9379 clk cpu0 R TRBIDR_EL1 000000000000002b +9379 clk cpu0 R ELR_EL1 000000000009ef50 +9380 clk cpu0 IT (9344) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9381 clk cpu0 IT (9345) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9381 clk cpu0 R SP_EL1 0000000003700510 +9382 clk cpu0 IT (9346) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9382 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +9382 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001e4 +9383 clk cpu0 IT (9347) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9383 clk cpu0 R X0 0000000056000005 +9384 clk cpu0 IT (9348) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9384 clk cpu0 R X1 0000000000000015 +9385 clk cpu0 IT (9349) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9385 clk cpu0 R cpsr 620003c5 +9386 clk cpu0 IT (9350) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9387 clk cpu0 IT (9351) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9387 clk cpu0 R X1 0000000000000005 +9388 clk cpu0 IT (9352) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9388 clk cpu0 R cpsr 620003c5 +9389 clk cpu0 IS (9353) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9390 clk cpu0 IT (9354) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9390 clk cpu0 R cpsr 820003c5 +9391 clk cpu0 IS (9355) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9392 clk cpu0 IT (9356) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9392 clk cpu0 R cpsr 820003c5 +9393 clk cpu0 IS (9357) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9394 clk cpu0 IT (9358) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9394 clk cpu0 R cpsr 820003c5 +9395 clk cpu0 IS (9359) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9396 clk cpu0 IT (9360) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9396 clk cpu0 R cpsr 820003c5 +9397 clk cpu0 IS (9361) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9398 clk cpu0 IT (9362) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9398 clk cpu0 R cpsr 820003c5 +9399 clk cpu0 IS (9363) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9400 clk cpu0 IT (9364) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9400 clk cpu0 R cpsr 820003c5 +9401 clk cpu0 IS (9365) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9402 clk cpu0 IT (9366) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9402 clk cpu0 R cpsr 620003c5 +9403 clk cpu0 IT (9367) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9404 clk cpu0 IT (9368) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9404 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +9404 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001e4 +9404 clk cpu0 R X0 0000000000000001 +9404 clk cpu0 R X1 00000000000001E4 +9405 clk cpu0 IT (9369) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9405 clk cpu0 R SP_EL1 0000000003700610 +9406 clk cpu0 IT (9370) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +9406 clk cpu0 R X0 00000000000001E4 +9407 clk cpu0 IT (9371) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9407 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9407 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010c8c +9407 clk cpu0 R SP_EL1 0000000003700600 +9408 clk cpu0 IT (9372) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +9408 clk cpu0 R X30 00000000000381B4 +9409 clk cpu0 IT (9373) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +9409 clk cpu0 R X9 0000000003003000 +9410 clk cpu0 IT (9374) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9410 clk cpu0 R X8 0000000000000079 +9411 clk cpu0 IT (9375) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +9411 clk cpu0 R X9 00000000030039C8 +9412 clk cpu0 IT (9376) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +9412 clk cpu0 MR8 03003d90:000000803d90_NS 00000000_0009f780 +9412 clk cpu0 R X0 000000000009F780 +9413 clk cpu0 IT (9377) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +9413 clk cpu0 R cpsr 620007c5 +9414 clk cpu0 IT (9378) 0009f780:00001009f780_NS d53109e0 O EL1h_n : MRS x0,TRCIDR1 +9414 clk cpu0 R cpsr 620003c5 +9414 clk cpu0 R X0 000000004100FFF0 +9415 clk cpu0 IT (9379) 0009f784:00001009f784_NS d65f03c0 O EL1h_n : RET +9416 clk cpu0 IT (9380) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9416 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9416 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010c8c +9416 clk cpu0 R SP_EL1 0000000003700610 +9416 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9416 clk cpu0 R X30 0000000000010C8C +9417 clk cpu0 IT (9381) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +9417 clk cpu0 R cpsr 620003c5 +9417 clk cpu0 R PMBIDR_EL1 00000030 +9417 clk cpu0 R TRBIDR_EL1 000000000000002b +9418 clk cpu0 IT (9382) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9418 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9418 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010c8c +9418 clk cpu0 R SP_EL1 0000000003700620 +9418 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9418 clk cpu0 R X30 0000000000010C8C +9419 clk cpu0 IT (9383) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +9420 clk cpu0 IT (9384) 00010c8c:000010010c8c_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +9420 clk cpu0 MW4 037007b8:000000f007b8_NS 4100fff0 +9421 clk cpu0 IT (9385) 00010c90:000010010c90_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9421 clk cpu0 MR4 037007b8:000000f007b8_NS 4100fff0 +9421 clk cpu0 R X8 000000004100FFF0 +9422 clk cpu0 IT (9386) 00010c94:000010010c94_NS 52801e09 O EL1h_n : MOV w9,#0xf0 +9422 clk cpu0 R X9 00000000000000F0 +9423 clk cpu0 IT (9387) 00010c98:000010010c98_NS 0a090108 O EL1h_n : AND w8,w8,w9 +9423 clk cpu0 R X8 00000000000000F0 +9424 clk cpu0 IT (9388) 00010c9c:000010010c9c_NS 52800089 O EL1h_n : MOV w9,#4 +9424 clk cpu0 R X9 0000000000000004 +9425 clk cpu0 IT (9389) 00010ca0:000010010ca0_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +9425 clk cpu0 R X8 000000000000000F +9426 clk cpu0 IT (9390) 00010ca4:000010010ca4_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9426 clk cpu0 MW4 037007b8:000000f007b8_NS 0000000f +9427 clk cpu0 IT (9391) 00010ca8:000010010ca8_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +9427 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9427 clk cpu0 R X3 0000000000000000 +9428 clk cpu0 IT (9392) 00010cac:000010010cac_NS 52803e00 O EL1h_n : MOV w0,#0x1f0 +9428 clk cpu0 R X0 00000000000001F0 +9429 clk cpu0 IT (9393) 00010cb0:000010010cb0_NS b94033e1 O EL1h_n : LDR w1,[sp,#0x30] +9429 clk cpu0 MR4 03700650:000000f00650_NS 00000001 +9429 clk cpu0 R X1 0000000000000001 +9430 clk cpu0 IT (9394) 00010cb4:000010010cb4_NS b9402fe2 O EL1h_n : LDR w2,[sp,#0x2c] +9430 clk cpu0 MR4 0370064c:000000f0064c_NS 00000003 +9430 clk cpu0 R X2 0000000000000003 +9431 clk cpu0 IT (9395) 00010cb8:000010010cb8_NS 94022a8f O EL1h_n : BL 0x9b6f4 +9431 clk cpu0 R X30 0000000000010CBC +9432 clk cpu0 IT (9396) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +9432 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +9432 clk cpu0 R SP_EL1 0000000003700600 +9433 clk cpu0 IT (9397) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +9433 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9433 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010cbc +9434 clk cpu0 IT (9398) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +9434 clk cpu0 R cpsr 220003c5 +9435 clk cpu0 IT (9399) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +9435 clk cpu0 R X19 00000000000001F0 +9436 clk cpu0 IS (9400) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +9437 clk cpu0 IT (9401) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +9437 clk cpu0 R cpsr 620003c5 +9438 clk cpu0 IT (9402) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +9439 clk cpu0 IT (9403) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +9439 clk cpu0 R X1 00000000000001F0 +9440 clk cpu0 IT (9404) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +9440 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9440 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010cbc +9440 clk cpu0 R X19 1818181818181818 +9440 clk cpu0 R X30 0000000000010CBC +9441 clk cpu0 IT (9405) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +9441 clk cpu0 R X0 0000000000000001 +9442 clk cpu0 IT (9406) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +9442 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +9442 clk cpu0 R SP_EL1 0000000003700620 +9442 clk cpu0 R X20 001FFFFFFFFFFFFE +9443 clk cpu0 IT (9407) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +9444 clk cpu0 IT (9408) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9444 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9444 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010cbc +9444 clk cpu0 R SP_EL1 0000000003700610 +9445 clk cpu0 IT (9409) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +9445 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9445 clk cpu0 R cpsr 620003c5 +9445 clk cpu0 R PMBIDR_EL1 00000030 +9445 clk cpu0 R ESR_EL1 56000005 +9445 clk cpu0 R SPSR_EL1 620003c5 +9445 clk cpu0 R TRBIDR_EL1 000000000000002b +9445 clk cpu0 R ELR_EL1 000000000009ef50 +9446 clk cpu0 IT (9410) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9447 clk cpu0 IT (9411) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9447 clk cpu0 R SP_EL1 0000000003700510 +9448 clk cpu0 IT (9412) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9448 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +9448 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001f0 +9449 clk cpu0 IT (9413) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9449 clk cpu0 R X0 0000000056000005 +9450 clk cpu0 IT (9414) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9450 clk cpu0 R X1 0000000000000015 +9451 clk cpu0 IT (9415) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9451 clk cpu0 R cpsr 620003c5 +9452 clk cpu0 IT (9416) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9453 clk cpu0 IT (9417) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9453 clk cpu0 R X1 0000000000000005 +9454 clk cpu0 IT (9418) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9454 clk cpu0 R cpsr 620003c5 +9455 clk cpu0 IS (9419) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9456 clk cpu0 IT (9420) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9456 clk cpu0 R cpsr 820003c5 +9457 clk cpu0 IS (9421) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9458 clk cpu0 IT (9422) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9458 clk cpu0 R cpsr 820003c5 +9459 clk cpu0 IS (9423) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9460 clk cpu0 IT (9424) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9460 clk cpu0 R cpsr 820003c5 +9461 clk cpu0 IS (9425) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9462 clk cpu0 IT (9426) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9462 clk cpu0 R cpsr 820003c5 +9463 clk cpu0 IS (9427) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9464 clk cpu0 IT (9428) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9464 clk cpu0 R cpsr 820003c5 +9465 clk cpu0 IS (9429) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9466 clk cpu0 IT (9430) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9466 clk cpu0 R cpsr 820003c5 +9467 clk cpu0 IS (9431) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9468 clk cpu0 IT (9432) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9468 clk cpu0 R cpsr 620003c5 +9469 clk cpu0 IT (9433) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9470 clk cpu0 IT (9434) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9470 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +9470 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001f0 +9470 clk cpu0 R X0 0000000000000001 +9470 clk cpu0 R X1 00000000000001F0 +9471 clk cpu0 IT (9435) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9471 clk cpu0 R SP_EL1 0000000003700610 +9472 clk cpu0 IT (9436) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +9472 clk cpu0 R X0 00000000000001F0 +9473 clk cpu0 IT (9437) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9473 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9473 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010cbc +9473 clk cpu0 R SP_EL1 0000000003700600 +9474 clk cpu0 IT (9438) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +9474 clk cpu0 R X30 00000000000381B4 +9475 clk cpu0 IT (9439) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +9475 clk cpu0 R X9 0000000003003000 +9476 clk cpu0 IT (9440) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9476 clk cpu0 R X8 000000000000007C +9477 clk cpu0 IT (9441) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +9477 clk cpu0 R X9 00000000030039C8 +9478 clk cpu0 IT (9442) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +9478 clk cpu0 MR8 03003da8:000000803da8_NS 00000000_0009f798 +9478 clk cpu0 R X0 000000000009F798 +9479 clk cpu0 IT (9443) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +9479 clk cpu0 R cpsr 620007c5 +9480 clk cpu0 IT (9444) 0009f798:00001009f798_NS d5310ce0 O EL1h_n : MRS x0,TRCIDR4 +9480 clk cpu0 R cpsr 620003c5 +9480 clk cpu0 R X0 0000000011180004 +9481 clk cpu0 IT (9445) 0009f79c:00001009f79c_NS d65f03c0 O EL1h_n : RET +9482 clk cpu0 IT (9446) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9482 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9482 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010cbc +9482 clk cpu0 R SP_EL1 0000000003700610 +9482 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9482 clk cpu0 R X30 0000000000010CBC +9483 clk cpu0 IT (9447) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +9483 clk cpu0 R cpsr 620003c5 +9483 clk cpu0 R PMBIDR_EL1 00000030 +9483 clk cpu0 R TRBIDR_EL1 000000000000002b +9484 clk cpu0 IT (9448) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9484 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9484 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010cbc +9484 clk cpu0 R SP_EL1 0000000003700620 +9484 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9484 clk cpu0 R X30 0000000000010CBC +9485 clk cpu0 IT (9449) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +9486 clk cpu0 IT (9450) 00010cbc:000010010cbc_NS b90197e0 O EL1h_n : STR w0,[sp,#0x194] +9486 clk cpu0 MW4 037007b4:000000f007b4_NS 11180004 +9486 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0067 INVAL 0x000010090cc0_NS +9486 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0067 ALLOC 0x000010010cc0_NS +9486 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0333 ALLOC 0x000010010cc0_NS +9487 clk cpu0 IT (9451) 00010cc0:000010010cc0_NS b94197e8 O EL1h_n : LDR w8,[sp,#0x194] +9487 clk cpu0 MR4 037007b4:000000f007b4_NS 11180004 +9487 clk cpu0 R X8 0000000011180004 +9488 clk cpu0 IT (9452) 00010cc4:000010010cc4_NS 52a001e9 O EL1h_n : MOV w9,#0xf0000 +9488 clk cpu0 R X9 00000000000F0000 +9489 clk cpu0 IT (9453) 00010cc8:000010010cc8_NS 0a090108 O EL1h_n : AND w8,w8,w9 +9489 clk cpu0 R X8 0000000000080000 +9490 clk cpu0 IT (9454) 00010ccc:000010010ccc_NS 52800209 O EL1h_n : MOV w9,#0x10 +9490 clk cpu0 R X9 0000000000000010 +9491 clk cpu0 IT (9455) 00010cd0:000010010cd0_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +9491 clk cpu0 R X8 0000000000000008 +9492 clk cpu0 IT (9456) 00010cd4:000010010cd4_NS b90197e8 O EL1h_n : STR w8,[sp,#0x194] +9492 clk cpu0 MW4 037007b4:000000f007b4_NS 00000008 +9493 clk cpu0 IT (9457) 00010cd8:000010010cd8_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9493 clk cpu0 MR4 037007b8:000000f007b8_NS 0000000f +9493 clk cpu0 R X8 000000000000000F +9494 clk cpu0 IT (9458) 00010cdc:000010010cdc_NS 71000d1f O EL1h_n : CMP w8,#3 +9494 clk cpu0 R cpsr 220003c5 +9495 clk cpu0 IT (9459) 00010ce0:000010010ce0_NS 1a9fb7e8 O EL1h_n : CSET w8,GE +9495 clk cpu0 R X8 0000000000000001 +9496 clk cpu0 IT (9460) 00010ce4:000010010ce4_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10cec +9497 clk cpu0 IT (9461) 00010cec:000010010cec_NS b94197e8 O EL1h_n : LDR w8,[sp,#0x194] +9497 clk cpu0 MR4 037007b4:000000f007b4_NS 00000008 +9497 clk cpu0 R X8 0000000000000008 +9498 clk cpu0 IS (9462) 00010cf0:000010010cf0_NS 34000108 O EL1h_n : CBZ w8,0x10d10 +9499 clk cpu0 IT (9463) 00010cf4:000010010cf4_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +9499 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9500 clk cpu0 IT (9464) 00010cf8:000010010cf8_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9500 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +9500 clk cpu0 R X2 0000000000000000 +9501 clk cpu0 IT (9465) 00010cfc:000010010cfc_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9501 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9501 clk cpu0 R X4 0000000000000000 +9501 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0068 INVAL 0x000010090d00_NS +9501 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0068 ALLOC 0x000010010d00_NS +9501 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0342 ALLOC 0x000010010d00_NS +9502 clk cpu0 IT (9466) 00010d00:000010010d00_NS 52800400 O EL1h_n : MOV w0,#0x20 +9502 clk cpu0 R X0 0000000000000020 +9503 clk cpu0 IT (9467) 00010d04:000010010d04_NS 52800021 O EL1h_n : MOV w1,#1 +9503 clk cpu0 R X1 0000000000000001 +9504 clk cpu0 IT (9468) 00010d08:000010010d08_NS 52800063 O EL1h_n : MOV w3,#3 +9504 clk cpu0 R X3 0000000000000003 +9505 clk cpu0 IT (9469) 00010d0c:000010010d0c_NS 94023379 O EL1h_n : BL 0x9daf0 +9505 clk cpu0 R X30 0000000000010D10 +9506 clk cpu0 IT (9470) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9506 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9506 clk cpu0 R SP_EL1 00000000037005F0 +9507 clk cpu0 IT (9471) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9507 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9507 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9508 clk cpu0 IT (9472) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9508 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9508 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d10 +9509 clk cpu0 IT (9473) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9509 clk cpu0 R X19 0000000000000000 +9510 clk cpu0 IT (9474) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9510 clk cpu0 R cpsr 220003c5 +9511 clk cpu0 IT (9475) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9511 clk cpu0 R X20 0000000000000020 +9512 clk cpu0 IS (9476) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9513 clk cpu0 IT (9477) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9513 clk cpu0 R cpsr 620003c5 +9514 clk cpu0 IT (9478) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9515 clk cpu0 IT (9479) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9515 clk cpu0 R X1 0000000000000020 +9516 clk cpu0 IT (9480) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9516 clk cpu0 R X2 0000000000000000 +9517 clk cpu0 IT (9481) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9517 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9517 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d10 +9517 clk cpu0 R X19 1818181818181818 +9517 clk cpu0 R X30 0000000000010D10 +9518 clk cpu0 IT (9482) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9518 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9518 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9518 clk cpu0 R X20 001FFFFFFFFFFFFE +9518 clk cpu0 R X21 0000000000F00000 +9519 clk cpu0 IT (9483) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9519 clk cpu0 R X0 0000000000000002 +9520 clk cpu0 IT (9484) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9520 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9520 clk cpu0 R SP_EL1 0000000003700620 +9520 clk cpu0 R X22 FFFFFFFFFFFE0003 +9521 clk cpu0 IT (9485) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9522 clk cpu0 IT (9486) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9522 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9522 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d10 +9522 clk cpu0 R SP_EL1 0000000003700610 +9523 clk cpu0 IT (9487) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9523 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9523 clk cpu0 R cpsr 620003c5 +9523 clk cpu0 R PMBIDR_EL1 00000030 +9523 clk cpu0 R ESR_EL1 5600000a +9523 clk cpu0 R SPSR_EL1 620003c5 +9523 clk cpu0 R TRBIDR_EL1 000000000000002b +9523 clk cpu0 R ELR_EL1 000000000009ef60 +9524 clk cpu0 IT (9488) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9525 clk cpu0 IT (9489) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9525 clk cpu0 R SP_EL1 0000000003700510 +9526 clk cpu0 IT (9490) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9526 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9526 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000020 +9527 clk cpu0 IT (9491) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9527 clk cpu0 R X0 000000005600000A +9528 clk cpu0 IT (9492) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9528 clk cpu0 R X1 0000000000000015 +9529 clk cpu0 IT (9493) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9529 clk cpu0 R cpsr 620003c5 +9530 clk cpu0 IT (9494) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9531 clk cpu0 IT (9495) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9531 clk cpu0 R X1 000000000000000A +9532 clk cpu0 IT (9496) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9532 clk cpu0 R cpsr 220003c5 +9533 clk cpu0 IS (9497) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9534 clk cpu0 IT (9498) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9534 clk cpu0 R cpsr 620003c5 +9535 clk cpu0 IS (9499) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9536 clk cpu0 IT (9500) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9536 clk cpu0 R cpsr 220003c5 +9537 clk cpu0 IS (9501) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9538 clk cpu0 IT (9502) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9538 clk cpu0 R cpsr 220003c5 +9539 clk cpu0 IS (9503) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9540 clk cpu0 IT (9504) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9540 clk cpu0 R cpsr 220003c5 +9541 clk cpu0 IS (9505) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9542 clk cpu0 IT (9506) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9542 clk cpu0 R cpsr 220003c5 +9543 clk cpu0 IS (9507) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9544 clk cpu0 IT (9508) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9544 clk cpu0 R cpsr 220003c5 +9545 clk cpu0 IS (9509) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9546 clk cpu0 IT (9510) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9546 clk cpu0 R cpsr 220003c5 +9547 clk cpu0 IS (9511) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9548 clk cpu0 IT (9512) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9548 clk cpu0 R cpsr 620003c5 +9549 clk cpu0 IT (9513) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9550 clk cpu0 IT (9514) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9550 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9550 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000020 +9550 clk cpu0 R X0 0000000000000002 +9550 clk cpu0 R X1 0000000000000020 +9551 clk cpu0 IT (9515) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9551 clk cpu0 R SP_EL1 0000000003700610 +9552 clk cpu0 IT (9516) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9552 clk cpu0 R X0 0000000000000020 +9553 clk cpu0 IT (9517) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9553 clk cpu0 R X1 0000000000000000 +9554 clk cpu0 IT (9518) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9554 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9554 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010d10 +9554 clk cpu0 R SP_EL1 0000000003700600 +9555 clk cpu0 IT (9519) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9555 clk cpu0 R X30 00000000000381D4 +9556 clk cpu0 IT (9520) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9556 clk cpu0 R X9 0000000003006000 +9557 clk cpu0 IT (9521) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9557 clk cpu0 R X8 0000000000000008 +9558 clk cpu0 IT (9522) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9558 clk cpu0 R X9 00000000030062A0 +9559 clk cpu0 IT (9523) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9559 clk cpu0 MR8 030062e0:0000008062e0_NS 00000000_000a10fc +9559 clk cpu0 R X2 00000000000A10FC +9560 clk cpu0 IT (9524) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9560 clk cpu0 R X0 0000000000000000 +9561 clk cpu0 IT (9525) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9561 clk cpu0 R cpsr 620007c5 +9562 clk cpu0 IT (9526) 000a10fc:0000100a10fc_NS d5110800 O EL1h_n : MSR TRCEVENTCTL0R,x0 +9562 clk cpu0 R cpsr 620003c5 +9562 clk cpu0 R TRCEVENTCTL0R 00000000:00000000 +9563 clk cpu0 IT (9527) 000a1100:0000100a1100_NS d65f03c0 O EL1h_n : RET +9564 clk cpu0 IT (9528) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9564 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9564 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010d10 +9564 clk cpu0 R SP_EL1 0000000003700610 +9564 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9564 clk cpu0 R X30 0000000000010D10 +9565 clk cpu0 IT (9529) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9565 clk cpu0 R cpsr 620003c5 +9565 clk cpu0 R PMBIDR_EL1 00000030 +9565 clk cpu0 R TRBIDR_EL1 000000000000002b +9566 clk cpu0 IT (9530) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9566 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9566 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d10 +9566 clk cpu0 R SP_EL1 0000000003700620 +9566 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9566 clk cpu0 R X30 0000000000010D10 +9567 clk cpu0 IT (9531) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9568 clk cpu0 IT (9532) 00010d10:000010010d10_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +9568 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9569 clk cpu0 IT (9533) 00010d14:000010010d14_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9569 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +9569 clk cpu0 R X2 0000000000000000 +9570 clk cpu0 IT (9534) 00010d18:000010010d18_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9570 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9570 clk cpu0 R X4 0000000000000000 +9571 clk cpu0 IT (9535) 00010d1c:000010010d1c_NS 52800480 O EL1h_n : MOV w0,#0x24 +9571 clk cpu0 R X0 0000000000000024 +9572 clk cpu0 IT (9536) 00010d20:000010010d20_NS 52800028 O EL1h_n : MOV w8,#1 +9572 clk cpu0 R X8 0000000000000001 +9573 clk cpu0 IT (9537) 00010d24:000010010d24_NS 2a0803e1 O EL1h_n : MOV w1,w8 +9573 clk cpu0 R X1 0000000000000001 +9574 clk cpu0 IT (9538) 00010d28:000010010d28_NS 52800069 O EL1h_n : MOV w9,#3 +9574 clk cpu0 R X9 0000000000000003 +9575 clk cpu0 IT (9539) 00010d2c:000010010d2c_NS 2a0903e3 O EL1h_n : MOV w3,w9 +9575 clk cpu0 R X3 0000000000000003 +9576 clk cpu0 IT (9540) 00010d30:000010010d30_NS b9002be8 O EL1h_n : STR w8,[sp,#0x28] +9576 clk cpu0 MW4 03700648:000000f00648_NS 00000001 +9577 clk cpu0 IT (9541) 00010d34:000010010d34_NS b90027e9 O EL1h_n : STR w9,[sp,#0x24] +9577 clk cpu0 MW4 03700644:000000f00644_NS 00000003 +9578 clk cpu0 IT (9542) 00010d38:000010010d38_NS 9402336e O EL1h_n : BL 0x9daf0 +9578 clk cpu0 R X30 0000000000010D3C +9579 clk cpu0 IT (9543) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9579 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9579 clk cpu0 R SP_EL1 00000000037005F0 +9580 clk cpu0 IT (9544) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9580 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9580 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9581 clk cpu0 IT (9545) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9581 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9581 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d3c +9582 clk cpu0 IT (9546) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9582 clk cpu0 R X19 0000000000000000 +9583 clk cpu0 IT (9547) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9583 clk cpu0 R cpsr 220003c5 +9584 clk cpu0 IT (9548) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9584 clk cpu0 R X20 0000000000000024 +9585 clk cpu0 IS (9549) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9586 clk cpu0 IT (9550) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9586 clk cpu0 R cpsr 620003c5 +9587 clk cpu0 IT (9551) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9588 clk cpu0 IT (9552) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9588 clk cpu0 R X1 0000000000000024 +9589 clk cpu0 IT (9553) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9589 clk cpu0 R X2 0000000000000000 +9590 clk cpu0 IT (9554) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9590 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9590 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d3c +9590 clk cpu0 R X19 1818181818181818 +9590 clk cpu0 R X30 0000000000010D3C +9591 clk cpu0 IT (9555) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9591 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9591 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9591 clk cpu0 R X20 001FFFFFFFFFFFFE +9591 clk cpu0 R X21 0000000000F00000 +9592 clk cpu0 IT (9556) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9592 clk cpu0 R X0 0000000000000002 +9593 clk cpu0 IT (9557) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9593 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9593 clk cpu0 R SP_EL1 0000000003700620 +9593 clk cpu0 R X22 FFFFFFFFFFFE0003 +9594 clk cpu0 IT (9558) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9595 clk cpu0 IT (9559) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9595 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9595 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d3c +9595 clk cpu0 R SP_EL1 0000000003700610 +9596 clk cpu0 IT (9560) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9596 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9596 clk cpu0 R cpsr 620003c5 +9596 clk cpu0 R PMBIDR_EL1 00000030 +9596 clk cpu0 R ESR_EL1 5600000a +9596 clk cpu0 R SPSR_EL1 620003c5 +9596 clk cpu0 R TRBIDR_EL1 000000000000002b +9596 clk cpu0 R ELR_EL1 000000000009ef60 +9597 clk cpu0 IT (9561) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9598 clk cpu0 IT (9562) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9598 clk cpu0 R SP_EL1 0000000003700510 +9599 clk cpu0 IT (9563) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9599 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9599 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000024 +9600 clk cpu0 IT (9564) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9600 clk cpu0 R X0 000000005600000A +9601 clk cpu0 IT (9565) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9601 clk cpu0 R X1 0000000000000015 +9602 clk cpu0 IT (9566) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9602 clk cpu0 R cpsr 620003c5 +9603 clk cpu0 IT (9567) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9604 clk cpu0 IT (9568) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9604 clk cpu0 R X1 000000000000000A +9605 clk cpu0 IT (9569) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9605 clk cpu0 R cpsr 220003c5 +9606 clk cpu0 IS (9570) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9607 clk cpu0 IT (9571) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9607 clk cpu0 R cpsr 620003c5 +9608 clk cpu0 IS (9572) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9609 clk cpu0 IT (9573) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9609 clk cpu0 R cpsr 220003c5 +9610 clk cpu0 IS (9574) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9611 clk cpu0 IT (9575) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9611 clk cpu0 R cpsr 220003c5 +9612 clk cpu0 IS (9576) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9613 clk cpu0 IT (9577) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9613 clk cpu0 R cpsr 220003c5 +9614 clk cpu0 IS (9578) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9615 clk cpu0 IT (9579) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9615 clk cpu0 R cpsr 220003c5 +9616 clk cpu0 IS (9580) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9617 clk cpu0 IT (9581) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9617 clk cpu0 R cpsr 220003c5 +9618 clk cpu0 IS (9582) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9619 clk cpu0 IT (9583) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9619 clk cpu0 R cpsr 220003c5 +9620 clk cpu0 IS (9584) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9621 clk cpu0 IT (9585) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9621 clk cpu0 R cpsr 620003c5 +9622 clk cpu0 IT (9586) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9623 clk cpu0 IT (9587) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9623 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9623 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000024 +9623 clk cpu0 R X0 0000000000000002 +9623 clk cpu0 R X1 0000000000000024 +9624 clk cpu0 IT (9588) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9624 clk cpu0 R SP_EL1 0000000003700610 +9625 clk cpu0 IT (9589) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9625 clk cpu0 R X0 0000000000000024 +9626 clk cpu0 IT (9590) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9626 clk cpu0 R X1 0000000000000000 +9627 clk cpu0 IT (9591) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9627 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9627 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010d3c +9627 clk cpu0 R SP_EL1 0000000003700600 +9628 clk cpu0 IT (9592) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9628 clk cpu0 R X30 00000000000381D4 +9629 clk cpu0 IT (9593) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9629 clk cpu0 R X9 0000000003006000 +9630 clk cpu0 IT (9594) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9630 clk cpu0 R X8 0000000000000009 +9631 clk cpu0 IT (9595) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9631 clk cpu0 R X9 00000000030062A0 +9632 clk cpu0 IT (9596) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9632 clk cpu0 MR8 030062e8:0000008062e8_NS 00000000_000a1104 +9632 clk cpu0 R X2 00000000000A1104 +9633 clk cpu0 IT (9597) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9633 clk cpu0 R X0 0000000000000000 +9634 clk cpu0 IT (9598) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9634 clk cpu0 R cpsr 620007c5 +9635 clk cpu0 IT (9599) 000a1104:0000100a1104_NS d5110900 O EL1h_n : MSR TRCEVENTCTL1R,x0 +9635 clk cpu0 R cpsr 620003c5 +9635 clk cpu0 R TRCEVENTCTL1R 00000000:00000000 +9636 clk cpu0 IT (9600) 000a1108:0000100a1108_NS d65f03c0 O EL1h_n : RET +9637 clk cpu0 IT (9601) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9637 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9637 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010d3c +9637 clk cpu0 R SP_EL1 0000000003700610 +9637 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9637 clk cpu0 R X30 0000000000010D3C +9638 clk cpu0 IT (9602) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9638 clk cpu0 R cpsr 620003c5 +9638 clk cpu0 R PMBIDR_EL1 00000030 +9638 clk cpu0 R TRBIDR_EL1 000000000000002b +9639 clk cpu0 IT (9603) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9639 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9639 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d3c +9639 clk cpu0 R SP_EL1 0000000003700620 +9639 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9639 clk cpu0 R X30 0000000000010D3C +9640 clk cpu0 IT (9604) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9641 clk cpu0 IT (9605) 00010d3c:000010010d3c_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +9641 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9641 clk cpu0 R X3 0000000000000000 +9641 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006b INVAL 0x0000100a4d40_NS +9641 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006b ALLOC 0x000010010d40_NS +9641 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0351 ALLOC 0x000010010d40_NS +9642 clk cpu0 IT (9606) 00010d40:000010010d40_NS 52803d80 O EL1h_n : MOV w0,#0x1ec +9642 clk cpu0 R X0 00000000000001EC +9643 clk cpu0 IT (9607) 00010d44:000010010d44_NS b9402be1 O EL1h_n : LDR w1,[sp,#0x28] +9643 clk cpu0 MR4 03700648:000000f00648_NS 00000001 +9643 clk cpu0 R X1 0000000000000001 +9644 clk cpu0 IT (9608) 00010d48:000010010d48_NS b94027e2 O EL1h_n : LDR w2,[sp,#0x24] +9644 clk cpu0 MR4 03700644:000000f00644_NS 00000003 +9644 clk cpu0 R X2 0000000000000003 +9645 clk cpu0 IT (9609) 00010d4c:000010010d4c_NS 94022a6a O EL1h_n : BL 0x9b6f4 +9645 clk cpu0 R X30 0000000000010D50 +9646 clk cpu0 IT (9610) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +9646 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +9646 clk cpu0 R SP_EL1 0000000003700600 +9647 clk cpu0 IT (9611) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +9647 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9647 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d50 +9648 clk cpu0 IT (9612) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +9648 clk cpu0 R cpsr 220003c5 +9649 clk cpu0 IT (9613) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +9649 clk cpu0 R X19 00000000000001EC +9650 clk cpu0 IS (9614) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +9651 clk cpu0 IT (9615) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +9651 clk cpu0 R cpsr 620003c5 +9652 clk cpu0 IT (9616) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +9653 clk cpu0 IT (9617) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +9653 clk cpu0 R X1 00000000000001EC +9654 clk cpu0 IT (9618) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +9654 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9654 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d50 +9654 clk cpu0 R X19 1818181818181818 +9654 clk cpu0 R X30 0000000000010D50 +9655 clk cpu0 IT (9619) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +9655 clk cpu0 R X0 0000000000000001 +9656 clk cpu0 IT (9620) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +9656 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +9656 clk cpu0 R SP_EL1 0000000003700620 +9656 clk cpu0 R X20 001FFFFFFFFFFFFE +9657 clk cpu0 IT (9621) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +9658 clk cpu0 IT (9622) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9658 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9658 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d50 +9658 clk cpu0 R SP_EL1 0000000003700610 +9659 clk cpu0 IT (9623) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +9659 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9659 clk cpu0 R cpsr 620003c5 +9659 clk cpu0 R PMBIDR_EL1 00000030 +9659 clk cpu0 R ESR_EL1 56000005 +9659 clk cpu0 R SPSR_EL1 620003c5 +9659 clk cpu0 R TRBIDR_EL1 000000000000002b +9659 clk cpu0 R ELR_EL1 000000000009ef50 +9660 clk cpu0 IT (9624) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9661 clk cpu0 IT (9625) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9661 clk cpu0 R SP_EL1 0000000003700510 +9662 clk cpu0 IT (9626) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9662 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +9662 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001ec +9663 clk cpu0 IT (9627) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9663 clk cpu0 R X0 0000000056000005 +9664 clk cpu0 IT (9628) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9664 clk cpu0 R X1 0000000000000015 +9665 clk cpu0 IT (9629) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9665 clk cpu0 R cpsr 620003c5 +9666 clk cpu0 IT (9630) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9667 clk cpu0 IT (9631) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9667 clk cpu0 R X1 0000000000000005 +9668 clk cpu0 IT (9632) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9668 clk cpu0 R cpsr 620003c5 +9669 clk cpu0 IS (9633) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9670 clk cpu0 IT (9634) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9670 clk cpu0 R cpsr 820003c5 +9671 clk cpu0 IS (9635) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9672 clk cpu0 IT (9636) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9672 clk cpu0 R cpsr 820003c5 +9673 clk cpu0 IS (9637) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9674 clk cpu0 IT (9638) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9674 clk cpu0 R cpsr 820003c5 +9675 clk cpu0 IS (9639) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9676 clk cpu0 IT (9640) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9676 clk cpu0 R cpsr 820003c5 +9677 clk cpu0 IS (9641) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9678 clk cpu0 IT (9642) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9678 clk cpu0 R cpsr 820003c5 +9679 clk cpu0 IS (9643) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9680 clk cpu0 IT (9644) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9680 clk cpu0 R cpsr 820003c5 +9681 clk cpu0 IS (9645) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9682 clk cpu0 IT (9646) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9682 clk cpu0 R cpsr 620003c5 +9683 clk cpu0 IT (9647) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9684 clk cpu0 IT (9648) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9684 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +9684 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001ec +9684 clk cpu0 R X0 0000000000000001 +9684 clk cpu0 R X1 00000000000001EC +9685 clk cpu0 IT (9649) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9685 clk cpu0 R SP_EL1 0000000003700610 +9686 clk cpu0 IT (9650) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +9686 clk cpu0 R X0 00000000000001EC +9687 clk cpu0 IT (9651) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9687 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9687 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010d50 +9687 clk cpu0 R SP_EL1 0000000003700600 +9688 clk cpu0 IT (9652) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +9688 clk cpu0 R X30 00000000000381B4 +9689 clk cpu0 IT (9653) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +9689 clk cpu0 R X9 0000000003003000 +9690 clk cpu0 IT (9654) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9690 clk cpu0 R X8 000000000000007B +9691 clk cpu0 IT (9655) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +9691 clk cpu0 R X9 00000000030039C8 +9692 clk cpu0 IT (9656) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +9692 clk cpu0 MR8 03003da0:000000803da0_NS 00000000_0009f790 +9692 clk cpu0 R X0 000000000009F790 +9693 clk cpu0 IT (9657) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +9693 clk cpu0 R cpsr 620007c5 +9694 clk cpu0 IT (9658) 0009f790:00001009f790_NS d5310be0 O EL1h_n : MRS x0,TRCIDR3 +9694 clk cpu0 R cpsr 620003c5 +9694 clk cpu0 R X0 000000000D7F0004 +9695 clk cpu0 IT (9659) 0009f794:00001009f794_NS d65f03c0 O EL1h_n : RET +9696 clk cpu0 IT (9660) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9696 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9696 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010d50 +9696 clk cpu0 R SP_EL1 0000000003700610 +9696 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9696 clk cpu0 R X30 0000000000010D50 +9697 clk cpu0 IT (9661) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +9697 clk cpu0 R cpsr 620003c5 +9697 clk cpu0 R PMBIDR_EL1 00000030 +9697 clk cpu0 R TRBIDR_EL1 000000000000002b +9698 clk cpu0 IT (9662) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9698 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9698 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d50 +9698 clk cpu0 R SP_EL1 0000000003700620 +9698 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9698 clk cpu0 R X30 0000000000010D50 +9699 clk cpu0 IT (9663) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +9700 clk cpu0 IT (9664) 00010d50:000010010d50_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +9700 clk cpu0 MW4 037007b8:000000f007b8_NS 0d7f0004 +9701 clk cpu0 IT (9665) 00010d54:000010010d54_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9701 clk cpu0 MR4 037007b8:000000f007b8_NS 0d7f0004 +9701 clk cpu0 R X8 000000000D7F0004 +9702 clk cpu0 IT (9666) 00010d58:000010010d58_NS 52a08009 O EL1h_n : MOV w9,#0x4000000 +9702 clk cpu0 R X9 0000000004000000 +9703 clk cpu0 IT (9667) 00010d5c:000010010d5c_NS 0a090108 O EL1h_n : AND w8,w8,w9 +9703 clk cpu0 R X8 0000000004000000 +9704 clk cpu0 IT (9668) 00010d60:000010010d60_NS 52800349 O EL1h_n : MOV w9,#0x1a +9704 clk cpu0 R X9 000000000000001A +9705 clk cpu0 IT (9669) 00010d64:000010010d64_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +9705 clk cpu0 R X8 0000000000000001 +9706 clk cpu0 IT (9670) 00010d68:000010010d68_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9706 clk cpu0 MW4 037007b8:000000f007b8_NS 00000001 +9707 clk cpu0 IT (9671) 00010d6c:000010010d6c_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9707 clk cpu0 MR4 037007b8:000000f007b8_NS 00000001 +9707 clk cpu0 R X8 0000000000000001 +9708 clk cpu0 IT (9672) 00010d70:000010010d70_NS 7100051f O EL1h_n : CMP w8,#1 +9708 clk cpu0 R cpsr 620003c5 +9709 clk cpu0 IT (9673) 00010d74:000010010d74_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +9709 clk cpu0 R X8 0000000000000001 +9710 clk cpu0 IT (9674) 00010d78:000010010d78_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10d80 +9710 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006c INVAL 0x000010090d80_NS +9710 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006c ALLOC 0x000010010d80_NS +9710 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0361 ALLOC 0x000010010d80_NS +9711 clk cpu0 IT (9675) 00010d80:000010010d80_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +9711 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9712 clk cpu0 IT (9676) 00010d84:000010010d84_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9712 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +9712 clk cpu0 R X2 0000000000000000 +9713 clk cpu0 IT (9677) 00010d88:000010010d88_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9713 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9713 clk cpu0 R X4 0000000000000000 +9714 clk cpu0 IT (9678) 00010d8c:000010010d8c_NS 52800580 O EL1h_n : MOV w0,#0x2c +9714 clk cpu0 R X0 000000000000002C +9715 clk cpu0 IT (9679) 00010d90:000010010d90_NS 52800021 O EL1h_n : MOV w1,#1 +9715 clk cpu0 R X1 0000000000000001 +9716 clk cpu0 IT (9680) 00010d94:000010010d94_NS 52800063 O EL1h_n : MOV w3,#3 +9716 clk cpu0 R X3 0000000000000003 +9717 clk cpu0 IT (9681) 00010d98:000010010d98_NS 94023356 O EL1h_n : BL 0x9daf0 +9717 clk cpu0 R X30 0000000000010D9C +9718 clk cpu0 IT (9682) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9718 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9718 clk cpu0 R SP_EL1 00000000037005F0 +9719 clk cpu0 IT (9683) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9719 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9719 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9720 clk cpu0 IT (9684) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9720 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9720 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d9c +9721 clk cpu0 IT (9685) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9721 clk cpu0 R X19 0000000000000000 +9722 clk cpu0 IT (9686) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9722 clk cpu0 R cpsr 220003c5 +9723 clk cpu0 IT (9687) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9723 clk cpu0 R X20 000000000000002C +9724 clk cpu0 IS (9688) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9725 clk cpu0 IT (9689) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9725 clk cpu0 R cpsr 620003c5 +9726 clk cpu0 IT (9690) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9727 clk cpu0 IT (9691) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9727 clk cpu0 R X1 000000000000002C +9728 clk cpu0 IT (9692) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9728 clk cpu0 R X2 0000000000000000 +9729 clk cpu0 IT (9693) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9729 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9729 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d9c +9729 clk cpu0 R X19 1818181818181818 +9729 clk cpu0 R X30 0000000000010D9C +9730 clk cpu0 IT (9694) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9730 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9730 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9730 clk cpu0 R X20 001FFFFFFFFFFFFE +9730 clk cpu0 R X21 0000000000F00000 +9731 clk cpu0 IT (9695) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9731 clk cpu0 R X0 0000000000000002 +9732 clk cpu0 IT (9696) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9732 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9732 clk cpu0 R SP_EL1 0000000003700620 +9732 clk cpu0 R X22 FFFFFFFFFFFE0003 +9733 clk cpu0 IT (9697) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9734 clk cpu0 IT (9698) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9734 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9734 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010d9c +9734 clk cpu0 R SP_EL1 0000000003700610 +9735 clk cpu0 IT (9699) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9735 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9735 clk cpu0 R cpsr 620003c5 +9735 clk cpu0 R PMBIDR_EL1 00000030 +9735 clk cpu0 R ESR_EL1 5600000a +9735 clk cpu0 R SPSR_EL1 620003c5 +9735 clk cpu0 R TRBIDR_EL1 000000000000002b +9735 clk cpu0 R ELR_EL1 000000000009ef60 +9736 clk cpu0 IT (9700) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9737 clk cpu0 IT (9701) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9737 clk cpu0 R SP_EL1 0000000003700510 +9738 clk cpu0 IT (9702) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9738 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9738 clk cpu0 MW8 03700518:000000f00518_NS 00000000_0000002c +9739 clk cpu0 IT (9703) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9739 clk cpu0 R X0 000000005600000A +9740 clk cpu0 IT (9704) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9740 clk cpu0 R X1 0000000000000015 +9741 clk cpu0 IT (9705) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9741 clk cpu0 R cpsr 620003c5 +9742 clk cpu0 IT (9706) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9743 clk cpu0 IT (9707) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9743 clk cpu0 R X1 000000000000000A +9744 clk cpu0 IT (9708) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9744 clk cpu0 R cpsr 220003c5 +9745 clk cpu0 IS (9709) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9746 clk cpu0 IT (9710) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9746 clk cpu0 R cpsr 620003c5 +9747 clk cpu0 IS (9711) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9748 clk cpu0 IT (9712) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9748 clk cpu0 R cpsr 220003c5 +9749 clk cpu0 IS (9713) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9750 clk cpu0 IT (9714) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9750 clk cpu0 R cpsr 220003c5 +9751 clk cpu0 IS (9715) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9752 clk cpu0 IT (9716) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9752 clk cpu0 R cpsr 220003c5 +9753 clk cpu0 IS (9717) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9754 clk cpu0 IT (9718) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9754 clk cpu0 R cpsr 220003c5 +9755 clk cpu0 IS (9719) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9756 clk cpu0 IT (9720) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9756 clk cpu0 R cpsr 220003c5 +9757 clk cpu0 IS (9721) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9758 clk cpu0 IT (9722) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9758 clk cpu0 R cpsr 220003c5 +9759 clk cpu0 IS (9723) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9760 clk cpu0 IT (9724) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9760 clk cpu0 R cpsr 620003c5 +9761 clk cpu0 IT (9725) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9762 clk cpu0 IT (9726) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9762 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9762 clk cpu0 MR8 03700518:000000f00518_NS 00000000_0000002c +9762 clk cpu0 R X0 0000000000000002 +9762 clk cpu0 R X1 000000000000002C +9763 clk cpu0 IT (9727) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9763 clk cpu0 R SP_EL1 0000000003700610 +9764 clk cpu0 IT (9728) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9764 clk cpu0 R X0 000000000000002C +9765 clk cpu0 IT (9729) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9765 clk cpu0 R X1 0000000000000000 +9766 clk cpu0 IT (9730) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9766 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9766 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010d9c +9766 clk cpu0 R SP_EL1 0000000003700600 +9767 clk cpu0 IT (9731) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9767 clk cpu0 R X30 00000000000381D4 +9768 clk cpu0 IT (9732) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9768 clk cpu0 R X9 0000000003006000 +9769 clk cpu0 IT (9733) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9769 clk cpu0 R X8 000000000000000B +9770 clk cpu0 IT (9734) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9770 clk cpu0 R X9 00000000030062A0 +9771 clk cpu0 IT (9735) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9771 clk cpu0 MR8 030062f8:0000008062f8_NS 00000000_000a1114 +9771 clk cpu0 R X2 00000000000A1114 +9772 clk cpu0 IT (9736) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9772 clk cpu0 R X0 0000000000000000 +9773 clk cpu0 IT (9737) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9773 clk cpu0 R cpsr 620007c5 +9774 clk cpu0 IT (9738) 000a1114:0000100a1114_NS d5110b00 O EL1h_n : MSR TRCSTALLCTLR,x0 +9774 clk cpu0 R cpsr 620003c5 +9774 clk cpu0 R TRCSTALLCTLR 00000000:00000000 +9775 clk cpu0 IT (9739) 000a1118:0000100a1118_NS d65f03c0 O EL1h_n : RET +9776 clk cpu0 IT (9740) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9776 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9776 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010d9c +9776 clk cpu0 R SP_EL1 0000000003700610 +9776 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9776 clk cpu0 R X30 0000000000010D9C +9777 clk cpu0 IT (9741) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9777 clk cpu0 R cpsr 620003c5 +9777 clk cpu0 R PMBIDR_EL1 00000030 +9777 clk cpu0 R TRBIDR_EL1 000000000000002b +9778 clk cpu0 IT (9742) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9778 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9778 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010d9c +9778 clk cpu0 R SP_EL1 0000000003700620 +9778 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9778 clk cpu0 R X30 0000000000010D9C +9779 clk cpu0 IT (9743) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9780 clk cpu0 IT (9744) 00010d9c:000010010d9c_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +9780 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9780 clk cpu0 R X3 0000000000000000 +9781 clk cpu0 IT (9745) 00010da0:000010010da0_NS 52803c00 O EL1h_n : MOV w0,#0x1e0 +9781 clk cpu0 R X0 00000000000001E0 +9782 clk cpu0 IT (9746) 00010da4:000010010da4_NS 52800021 O EL1h_n : MOV w1,#1 +9782 clk cpu0 R X1 0000000000000001 +9783 clk cpu0 IT (9747) 00010da8:000010010da8_NS 52800062 O EL1h_n : MOV w2,#3 +9783 clk cpu0 R X2 0000000000000003 +9784 clk cpu0 IT (9748) 00010dac:000010010dac_NS 94022a52 O EL1h_n : BL 0x9b6f4 +9784 clk cpu0 R X30 0000000000010DB0 +9785 clk cpu0 IT (9749) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +9785 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +9785 clk cpu0 R SP_EL1 0000000003700600 +9786 clk cpu0 IT (9750) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +9786 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9786 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010db0 +9787 clk cpu0 IT (9751) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +9787 clk cpu0 R cpsr 220003c5 +9788 clk cpu0 IT (9752) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +9788 clk cpu0 R X19 00000000000001E0 +9789 clk cpu0 IS (9753) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +9790 clk cpu0 IT (9754) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +9790 clk cpu0 R cpsr 620003c5 +9791 clk cpu0 IT (9755) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +9792 clk cpu0 IT (9756) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +9792 clk cpu0 R X1 00000000000001E0 +9793 clk cpu0 IT (9757) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +9793 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9793 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010db0 +9793 clk cpu0 R X19 1818181818181818 +9793 clk cpu0 R X30 0000000000010DB0 +9794 clk cpu0 IT (9758) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +9794 clk cpu0 R X0 0000000000000001 +9795 clk cpu0 IT (9759) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +9795 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +9795 clk cpu0 R SP_EL1 0000000003700620 +9795 clk cpu0 R X20 001FFFFFFFFFFFFE +9796 clk cpu0 IT (9760) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +9797 clk cpu0 IT (9761) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9797 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9797 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010db0 +9797 clk cpu0 R SP_EL1 0000000003700610 +9798 clk cpu0 IT (9762) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +9798 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9798 clk cpu0 R cpsr 620003c5 +9798 clk cpu0 R PMBIDR_EL1 00000030 +9798 clk cpu0 R ESR_EL1 56000005 +9798 clk cpu0 R SPSR_EL1 620003c5 +9798 clk cpu0 R TRBIDR_EL1 000000000000002b +9798 clk cpu0 R ELR_EL1 000000000009ef50 +9799 clk cpu0 IT (9763) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9800 clk cpu0 IT (9764) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9800 clk cpu0 R SP_EL1 0000000003700510 +9801 clk cpu0 IT (9765) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9801 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +9801 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001e0 +9802 clk cpu0 IT (9766) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9802 clk cpu0 R X0 0000000056000005 +9803 clk cpu0 IT (9767) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9803 clk cpu0 R X1 0000000000000015 +9804 clk cpu0 IT (9768) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9804 clk cpu0 R cpsr 620003c5 +9805 clk cpu0 IT (9769) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9806 clk cpu0 IT (9770) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9806 clk cpu0 R X1 0000000000000005 +9807 clk cpu0 IT (9771) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9807 clk cpu0 R cpsr 620003c5 +9808 clk cpu0 IS (9772) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9809 clk cpu0 IT (9773) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9809 clk cpu0 R cpsr 820003c5 +9810 clk cpu0 IS (9774) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9811 clk cpu0 IT (9775) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9811 clk cpu0 R cpsr 820003c5 +9812 clk cpu0 IS (9776) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9813 clk cpu0 IT (9777) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9813 clk cpu0 R cpsr 820003c5 +9814 clk cpu0 IS (9778) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9815 clk cpu0 IT (9779) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9815 clk cpu0 R cpsr 820003c5 +9816 clk cpu0 IS (9780) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9817 clk cpu0 IT (9781) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9817 clk cpu0 R cpsr 820003c5 +9818 clk cpu0 IS (9782) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9819 clk cpu0 IT (9783) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9819 clk cpu0 R cpsr 820003c5 +9820 clk cpu0 IS (9784) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9821 clk cpu0 IT (9785) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9821 clk cpu0 R cpsr 620003c5 +9822 clk cpu0 IT (9786) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9823 clk cpu0 IT (9787) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9823 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +9823 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001e0 +9823 clk cpu0 R X0 0000000000000001 +9823 clk cpu0 R X1 00000000000001E0 +9824 clk cpu0 IT (9788) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9824 clk cpu0 R SP_EL1 0000000003700610 +9825 clk cpu0 IT (9789) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +9825 clk cpu0 R X0 00000000000001E0 +9826 clk cpu0 IT (9790) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9826 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9826 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010db0 +9826 clk cpu0 R SP_EL1 0000000003700600 +9827 clk cpu0 IT (9791) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +9827 clk cpu0 R X30 00000000000381B4 +9828 clk cpu0 IT (9792) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +9828 clk cpu0 R X9 0000000003003000 +9829 clk cpu0 IT (9793) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9829 clk cpu0 R X8 0000000000000078 +9830 clk cpu0 IT (9794) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +9830 clk cpu0 R X9 00000000030039C8 +9831 clk cpu0 IT (9795) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +9831 clk cpu0 MR8 03003d88:000000803d88_NS 00000000_0009f778 +9831 clk cpu0 R X0 000000000009F778 +9832 clk cpu0 IT (9796) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +9832 clk cpu0 R cpsr 620007c5 +9833 clk cpu0 IT (9797) 0009f778:00001009f778_NS d53108e0 O EL1h_n : MRS x0,TRCIDR0 +9833 clk cpu0 R cpsr 620003c5 +9833 clk cpu0 R X0 0000000008000AA1 +9834 clk cpu0 IT (9798) 0009f77c:00001009f77c_NS d65f03c0 O EL1h_n : RET +9835 clk cpu0 IT (9799) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9835 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9835 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010db0 +9835 clk cpu0 R SP_EL1 0000000003700610 +9835 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9835 clk cpu0 R X30 0000000000010DB0 +9836 clk cpu0 IT (9800) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +9836 clk cpu0 R cpsr 620003c5 +9836 clk cpu0 R PMBIDR_EL1 00000030 +9836 clk cpu0 R TRBIDR_EL1 000000000000002b +9837 clk cpu0 IT (9801) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9837 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9837 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010db0 +9837 clk cpu0 R SP_EL1 0000000003700620 +9837 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9837 clk cpu0 R X30 0000000000010DB0 +9838 clk cpu0 IT (9802) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +9839 clk cpu0 IT (9803) 00010db0:000010010db0_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +9839 clk cpu0 MW4 037007b8:000000f007b8_NS 08000aa1 +9840 clk cpu0 IT (9804) 00010db4:000010010db4_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9840 clk cpu0 MR4 037007b8:000000f007b8_NS 08000aa1 +9840 clk cpu0 R X8 0000000008000AA1 +9841 clk cpu0 IT (9805) 00010db8:000010010db8_NS 52a1e009 O EL1h_n : MOV w9,#0xf000000 +9841 clk cpu0 R X9 000000000F000000 +9842 clk cpu0 IT (9806) 00010dbc:000010010dbc_NS 0a090108 O EL1h_n : AND w8,w8,w9 +9842 clk cpu0 R X8 0000000008000000 +9842 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006f INVAL 0x0000100a4dc0_NS +9842 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006f ALLOC 0x000010010dc0_NS +9842 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0371 ALLOC 0x000010010dc0_NS +9843 clk cpu0 IT (9807) 00010dc0:000010010dc0_NS 52800309 O EL1h_n : MOV w9,#0x18 +9843 clk cpu0 R X9 0000000000000018 +9844 clk cpu0 IT (9808) 00010dc4:000010010dc4_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +9844 clk cpu0 R X8 0000000000000008 +9845 clk cpu0 IT (9809) 00010dc8:000010010dc8_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9845 clk cpu0 MW4 037007b8:000000f007b8_NS 00000008 +9846 clk cpu0 IT (9810) 00010dcc:000010010dcc_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +9846 clk cpu0 MR4 037007b8:000000f007b8_NS 00000008 +9846 clk cpu0 R X8 0000000000000008 +9847 clk cpu0 IT (9811) 00010dd0:000010010dd0_NS 35000048 O EL1h_n : CBNZ w8,0x10dd8 +9848 clk cpu0 IT (9812) 00010dd8:000010010dd8_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +9848 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9849 clk cpu0 IT (9813) 00010ddc:000010010ddc_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9849 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +9849 clk cpu0 R X2 0000000000000000 +9850 clk cpu0 IT (9814) 00010de0:000010010de0_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9850 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9850 clk cpu0 R X4 0000000000000000 +9851 clk cpu0 IT (9815) 00010de4:000010010de4_NS 52800600 O EL1h_n : MOV w0,#0x30 +9851 clk cpu0 R X0 0000000000000030 +9852 clk cpu0 IT (9816) 00010de8:000010010de8_NS 52800021 O EL1h_n : MOV w1,#1 +9852 clk cpu0 R X1 0000000000000001 +9853 clk cpu0 IT (9817) 00010dec:000010010dec_NS 52800063 O EL1h_n : MOV w3,#3 +9853 clk cpu0 R X3 0000000000000003 +9854 clk cpu0 IT (9818) 00010df0:000010010df0_NS 94023340 O EL1h_n : BL 0x9daf0 +9854 clk cpu0 R X30 0000000000010DF4 +9855 clk cpu0 IT (9819) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9855 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9855 clk cpu0 R SP_EL1 00000000037005F0 +9856 clk cpu0 IT (9820) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9856 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9856 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9857 clk cpu0 IT (9821) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9857 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9857 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010df4 +9858 clk cpu0 IT (9822) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9858 clk cpu0 R X19 0000000000000000 +9859 clk cpu0 IT (9823) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9859 clk cpu0 R cpsr 220003c5 +9860 clk cpu0 IT (9824) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9860 clk cpu0 R X20 0000000000000030 +9861 clk cpu0 IS (9825) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9862 clk cpu0 IT (9826) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9862 clk cpu0 R cpsr 620003c5 +9863 clk cpu0 IT (9827) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9864 clk cpu0 IT (9828) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9864 clk cpu0 R X1 0000000000000030 +9865 clk cpu0 IT (9829) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9865 clk cpu0 R X2 0000000000000000 +9866 clk cpu0 IT (9830) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9866 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9866 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010df4 +9866 clk cpu0 R X19 1818181818181818 +9866 clk cpu0 R X30 0000000000010DF4 +9867 clk cpu0 IT (9831) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9867 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9867 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9867 clk cpu0 R X20 001FFFFFFFFFFFFE +9867 clk cpu0 R X21 0000000000F00000 +9868 clk cpu0 IT (9832) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9868 clk cpu0 R X0 0000000000000002 +9869 clk cpu0 IT (9833) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9869 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9869 clk cpu0 R SP_EL1 0000000003700620 +9869 clk cpu0 R X22 FFFFFFFFFFFE0003 +9870 clk cpu0 IT (9834) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9871 clk cpu0 IT (9835) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9871 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9871 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010df4 +9871 clk cpu0 R SP_EL1 0000000003700610 +9872 clk cpu0 IT (9836) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9872 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9872 clk cpu0 R cpsr 620003c5 +9872 clk cpu0 R PMBIDR_EL1 00000030 +9872 clk cpu0 R ESR_EL1 5600000a +9872 clk cpu0 R SPSR_EL1 620003c5 +9872 clk cpu0 R TRBIDR_EL1 000000000000002b +9872 clk cpu0 R ELR_EL1 000000000009ef60 +9873 clk cpu0 IT (9837) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9874 clk cpu0 IT (9838) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9874 clk cpu0 R SP_EL1 0000000003700510 +9875 clk cpu0 IT (9839) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9875 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9875 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000030 +9876 clk cpu0 IT (9840) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9876 clk cpu0 R X0 000000005600000A +9877 clk cpu0 IT (9841) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9877 clk cpu0 R X1 0000000000000015 +9878 clk cpu0 IT (9842) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9878 clk cpu0 R cpsr 620003c5 +9879 clk cpu0 IT (9843) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9880 clk cpu0 IT (9844) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9880 clk cpu0 R X1 000000000000000A +9881 clk cpu0 IT (9845) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9881 clk cpu0 R cpsr 220003c5 +9882 clk cpu0 IS (9846) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9883 clk cpu0 IT (9847) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9883 clk cpu0 R cpsr 620003c5 +9884 clk cpu0 IS (9848) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9885 clk cpu0 IT (9849) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9885 clk cpu0 R cpsr 220003c5 +9886 clk cpu0 IS (9850) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9887 clk cpu0 IT (9851) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9887 clk cpu0 R cpsr 220003c5 +9888 clk cpu0 IS (9852) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9889 clk cpu0 IT (9853) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9889 clk cpu0 R cpsr 220003c5 +9890 clk cpu0 IS (9854) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9891 clk cpu0 IT (9855) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9891 clk cpu0 R cpsr 220003c5 +9892 clk cpu0 IS (9856) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9893 clk cpu0 IT (9857) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9893 clk cpu0 R cpsr 220003c5 +9894 clk cpu0 IS (9858) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9895 clk cpu0 IT (9859) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9895 clk cpu0 R cpsr 220003c5 +9896 clk cpu0 IS (9860) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9897 clk cpu0 IT (9861) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9897 clk cpu0 R cpsr 620003c5 +9898 clk cpu0 IT (9862) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9899 clk cpu0 IT (9863) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9899 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9899 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000030 +9899 clk cpu0 R X0 0000000000000002 +9899 clk cpu0 R X1 0000000000000030 +9900 clk cpu0 IT (9864) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9900 clk cpu0 R SP_EL1 0000000003700610 +9901 clk cpu0 IT (9865) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9901 clk cpu0 R X0 0000000000000030 +9902 clk cpu0 IT (9866) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9902 clk cpu0 R X1 0000000000000000 +9903 clk cpu0 IT (9867) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9903 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9903 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010df4 +9903 clk cpu0 R SP_EL1 0000000003700600 +9904 clk cpu0 IT (9868) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9904 clk cpu0 R X30 00000000000381D4 +9905 clk cpu0 IT (9869) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9905 clk cpu0 R X9 0000000003006000 +9906 clk cpu0 IT (9870) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9906 clk cpu0 R X8 000000000000000C +9907 clk cpu0 IT (9871) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9907 clk cpu0 R X9 00000000030062A0 +9908 clk cpu0 IT (9872) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9908 clk cpu0 MR8 03006300:000000806300_NS 00000000_000a111c +9908 clk cpu0 R X2 00000000000A111C +9909 clk cpu0 IT (9873) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9909 clk cpu0 R X0 0000000000000000 +9910 clk cpu0 IT (9874) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9910 clk cpu0 R cpsr 620007c5 +9911 clk cpu0 IT (9875) 000a111c:0000100a111c_NS d5110c00 O EL1h_n : MSR TRCTSCTLR,x0 +9911 clk cpu0 R cpsr 620003c5 +9911 clk cpu0 R TRCTSCTLR 00000000:00000000 +9912 clk cpu0 IT (9876) 000a1120:0000100a1120_NS d65f03c0 O EL1h_n : RET +9913 clk cpu0 IT (9877) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9913 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9913 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010df4 +9913 clk cpu0 R SP_EL1 0000000003700610 +9913 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9913 clk cpu0 R X30 0000000000010DF4 +9914 clk cpu0 IT (9878) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9914 clk cpu0 R cpsr 620003c5 +9914 clk cpu0 R PMBIDR_EL1 00000030 +9914 clk cpu0 R TRBIDR_EL1 000000000000002b +9915 clk cpu0 IT (9879) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9915 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9915 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010df4 +9915 clk cpu0 R SP_EL1 0000000003700620 +9915 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9915 clk cpu0 R X30 0000000000010DF4 +9916 clk cpu0 IT (9880) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9917 clk cpu0 IT (9881) 00010df4:000010010df4_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +9917 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +9918 clk cpu0 IT (9882) 00010df8:000010010df8_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9918 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +9918 clk cpu0 R X2 0000000000000000 +9919 clk cpu0 IT (9883) 00010dfc:000010010dfc_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9919 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9919 clk cpu0 R X4 0000000000000000 +9919 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0070 INVAL 0x000010090e00_NS +9919 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0070 ALLOC 0x000010010e00_NS +9919 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0381 ALLOC 0x000010010e00_NS +9920 clk cpu0 IT (9884) 00010e00:000010010e00_NS 52800680 O EL1h_n : MOV w0,#0x34 +9920 clk cpu0 R X0 0000000000000034 +9921 clk cpu0 IT (9885) 00010e04:000010010e04_NS 52800028 O EL1h_n : MOV w8,#1 +9921 clk cpu0 R X8 0000000000000001 +9922 clk cpu0 IT (9886) 00010e08:000010010e08_NS 2a0803e1 O EL1h_n : MOV w1,w8 +9922 clk cpu0 R X1 0000000000000001 +9923 clk cpu0 IT (9887) 00010e0c:000010010e0c_NS 52800069 O EL1h_n : MOV w9,#3 +9923 clk cpu0 R X9 0000000000000003 +9924 clk cpu0 IT (9888) 00010e10:000010010e10_NS 2a0903e3 O EL1h_n : MOV w3,w9 +9924 clk cpu0 R X3 0000000000000003 +9925 clk cpu0 IT (9889) 00010e14:000010010e14_NS b90023e8 O EL1h_n : STR w8,[sp,#0x20] +9925 clk cpu0 MW4 03700640:000000f00640_NS 00000001 +9926 clk cpu0 IT (9890) 00010e18:000010010e18_NS b9001fe9 O EL1h_n : STR w9,[sp,#0x1c] +9926 clk cpu0 MW4 0370063c:000000f0063c_NS 00000003 +9927 clk cpu0 IT (9891) 00010e1c:000010010e1c_NS 94023335 O EL1h_n : BL 0x9daf0 +9927 clk cpu0 R X30 0000000000010E20 +9928 clk cpu0 IT (9892) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +9928 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9928 clk cpu0 R SP_EL1 00000000037005F0 +9929 clk cpu0 IT (9893) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +9929 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +9929 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +9930 clk cpu0 IT (9894) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +9930 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +9930 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e20 +9931 clk cpu0 IT (9895) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +9931 clk cpu0 R X19 0000000000000000 +9932 clk cpu0 IT (9896) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +9932 clk cpu0 R cpsr 220003c5 +9933 clk cpu0 IT (9897) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +9933 clk cpu0 R X20 0000000000000034 +9934 clk cpu0 IS (9898) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +9935 clk cpu0 IT (9899) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +9935 clk cpu0 R cpsr 620003c5 +9936 clk cpu0 IT (9900) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +9937 clk cpu0 IT (9901) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +9937 clk cpu0 R X1 0000000000000034 +9938 clk cpu0 IT (9902) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +9938 clk cpu0 R X2 0000000000000000 +9939 clk cpu0 IT (9903) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +9939 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +9939 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e20 +9939 clk cpu0 R X19 1818181818181818 +9939 clk cpu0 R X30 0000000000010E20 +9940 clk cpu0 IT (9904) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +9940 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +9940 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +9940 clk cpu0 R X20 001FFFFFFFFFFFFE +9940 clk cpu0 R X21 0000000000F00000 +9941 clk cpu0 IT (9905) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +9941 clk cpu0 R X0 0000000000000002 +9942 clk cpu0 IT (9906) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +9942 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +9942 clk cpu0 R SP_EL1 0000000003700620 +9942 clk cpu0 R X22 FFFFFFFFFFFE0003 +9943 clk cpu0 IT (9907) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +9944 clk cpu0 IT (9908) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9944 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9944 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e20 +9944 clk cpu0 R SP_EL1 0000000003700610 +9945 clk cpu0 IT (9909) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +9945 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +9945 clk cpu0 R cpsr 620003c5 +9945 clk cpu0 R PMBIDR_EL1 00000030 +9945 clk cpu0 R ESR_EL1 5600000a +9945 clk cpu0 R SPSR_EL1 620003c5 +9945 clk cpu0 R TRBIDR_EL1 000000000000002b +9945 clk cpu0 R ELR_EL1 000000000009ef60 +9946 clk cpu0 IT (9910) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +9947 clk cpu0 IT (9911) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +9947 clk cpu0 R SP_EL1 0000000003700510 +9948 clk cpu0 IT (9912) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +9948 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +9948 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000034 +9949 clk cpu0 IT (9913) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +9949 clk cpu0 R X0 000000005600000A +9950 clk cpu0 IT (9914) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +9950 clk cpu0 R X1 0000000000000015 +9951 clk cpu0 IT (9915) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +9951 clk cpu0 R cpsr 620003c5 +9952 clk cpu0 IT (9916) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +9953 clk cpu0 IT (9917) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +9953 clk cpu0 R X1 000000000000000A +9954 clk cpu0 IT (9918) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +9954 clk cpu0 R cpsr 220003c5 +9955 clk cpu0 IS (9919) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +9956 clk cpu0 IT (9920) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +9956 clk cpu0 R cpsr 620003c5 +9957 clk cpu0 IS (9921) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +9958 clk cpu0 IT (9922) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +9958 clk cpu0 R cpsr 220003c5 +9959 clk cpu0 IS (9923) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +9960 clk cpu0 IT (9924) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +9960 clk cpu0 R cpsr 220003c5 +9961 clk cpu0 IS (9925) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +9962 clk cpu0 IT (9926) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +9962 clk cpu0 R cpsr 220003c5 +9963 clk cpu0 IS (9927) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +9964 clk cpu0 IT (9928) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +9964 clk cpu0 R cpsr 220003c5 +9965 clk cpu0 IS (9929) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +9966 clk cpu0 IT (9930) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +9966 clk cpu0 R cpsr 220003c5 +9967 clk cpu0 IS (9931) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +9968 clk cpu0 IT (9932) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +9968 clk cpu0 R cpsr 220003c5 +9969 clk cpu0 IS (9933) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +9970 clk cpu0 IT (9934) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +9970 clk cpu0 R cpsr 620003c5 +9971 clk cpu0 IT (9935) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +9972 clk cpu0 IT (9936) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +9972 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +9972 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000034 +9972 clk cpu0 R X0 0000000000000002 +9972 clk cpu0 R X1 0000000000000034 +9973 clk cpu0 IT (9937) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +9973 clk cpu0 R SP_EL1 0000000003700610 +9974 clk cpu0 IT (9938) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +9974 clk cpu0 R X0 0000000000000034 +9975 clk cpu0 IT (9939) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +9975 clk cpu0 R X1 0000000000000000 +9976 clk cpu0 IT (9940) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +9976 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9976 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010e20 +9976 clk cpu0 R SP_EL1 0000000003700600 +9977 clk cpu0 IT (9941) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +9977 clk cpu0 R X30 00000000000381D4 +9978 clk cpu0 IT (9942) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +9978 clk cpu0 R X9 0000000003006000 +9979 clk cpu0 IT (9943) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +9979 clk cpu0 R X8 000000000000000D +9980 clk cpu0 IT (9944) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +9980 clk cpu0 R X9 00000000030062A0 +9981 clk cpu0 IT (9945) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +9981 clk cpu0 MR8 03006308:000000806308_NS 00000000_000a1124 +9981 clk cpu0 R X2 00000000000A1124 +9982 clk cpu0 IT (9946) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +9982 clk cpu0 R X0 0000000000000000 +9983 clk cpu0 IT (9947) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +9983 clk cpu0 R cpsr 620007c5 +9984 clk cpu0 IT (9948) 000a1124:0000100a1124_NS d5110d00 O EL1h_n : MSR TRCSYNCPR,x0 +9984 clk cpu0 R cpsr 620003c5 +9984 clk cpu0 R TRCSYNCPR 00000000:00000000 +9985 clk cpu0 IT (9949) 000a1128:0000100a1128_NS d65f03c0 O EL1h_n : RET +9986 clk cpu0 IT (9950) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9986 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +9986 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010e20 +9986 clk cpu0 R SP_EL1 0000000003700610 +9986 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9986 clk cpu0 R X30 0000000000010E20 +9987 clk cpu0 IT (9951) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +9987 clk cpu0 R cpsr 620003c5 +9987 clk cpu0 R PMBIDR_EL1 00000030 +9987 clk cpu0 R TRBIDR_EL1 000000000000002b +9988 clk cpu0 IT (9952) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +9988 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +9988 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e20 +9988 clk cpu0 R SP_EL1 0000000003700620 +9988 clk cpu0 R X29 7FFF7FFF7FFF7FFF +9988 clk cpu0 R X30 0000000000010E20 +9989 clk cpu0 IT (9953) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +9990 clk cpu0 IT (9954) 00010e20:000010010e20_NS b9418be8 O EL1h_n : LDR w8,[sp,#0x188] +9990 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9990 clk cpu0 R X8 0000000000000000 +9991 clk cpu0 IT (9955) 00010e24:000010010e24_NS 11000508 O EL1h_n : ADD w8,w8,#1 +9991 clk cpu0 R X8 0000000000000001 +9992 clk cpu0 IT (9956) 00010e28:000010010e28_NS b94023e9 O EL1h_n : LDR w9,[sp,#0x20] +9992 clk cpu0 MR4 03700640:000000f00640_NS 00000001 +9992 clk cpu0 R X9 0000000000000001 +9993 clk cpu0 IT (9957) 00010e2c:000010010e2c_NS 1ac92108 O EL1h_n : LSL w8,w8,w9 +9993 clk cpu0 R X8 0000000000000002 +9994 clk cpu0 IT (9958) 00010e30:000010010e30_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +9994 clk cpu0 MW4 037007b8:000000f007b8_NS 00000002 +9995 clk cpu0 IT (9959) 00010e34:000010010e34_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +9995 clk cpu0 MR4 037007b8:000000f007b8_NS 00000002 +9995 clk cpu0 R X2 0000000000000002 +9996 clk cpu0 IT (9960) 00010e38:000010010e38_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +9996 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +9996 clk cpu0 R X4 0000000000000000 +9997 clk cpu0 IT (9961) 00010e3c:000010010e3c_NS 52800800 O EL1h_n : MOV w0,#0x40 +9997 clk cpu0 R X0 0000000000000040 +9997 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0073 ALLOC 0x000010010e40_NS +9997 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0391 ALLOC 0x000010010e40_NS +9998 clk cpu0 IT (9962) 00010e40:000010010e40_NS 2a0903e1 O EL1h_n : MOV w1,w9 +9998 clk cpu0 R X1 0000000000000001 +9999 clk cpu0 IT (9963) 00010e44:000010010e44_NS b9401fe3 O EL1h_n : LDR w3,[sp,#0x1c] +9999 clk cpu0 MR4 0370063c:000000f0063c_NS 00000003 +9999 clk cpu0 R X3 0000000000000003 +10000 clk cpu0 IT (9964) 00010e48:000010010e48_NS 9402332a O EL1h_n : BL 0x9daf0 +10000 clk cpu0 R X30 0000000000010E4C +10001 clk cpu0 IT (9965) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +10001 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10001 clk cpu0 R SP_EL1 00000000037005F0 +10002 clk cpu0 IT (9966) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +10002 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +10002 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +10003 clk cpu0 IT (9967) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +10003 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +10003 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e4c +10004 clk cpu0 IT (9968) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +10004 clk cpu0 R X19 0000000000000002 +10005 clk cpu0 IT (9969) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +10005 clk cpu0 R cpsr 220003c5 +10006 clk cpu0 IT (9970) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +10006 clk cpu0 R X20 0000000000000040 +10007 clk cpu0 IS (9971) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +10008 clk cpu0 IT (9972) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +10008 clk cpu0 R cpsr 620003c5 +10009 clk cpu0 IT (9973) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +10010 clk cpu0 IT (9974) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +10010 clk cpu0 R X1 0000000000000040 +10011 clk cpu0 IT (9975) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +10011 clk cpu0 R X2 0000000000000002 +10012 clk cpu0 IT (9976) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +10012 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +10012 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e4c +10012 clk cpu0 R X19 1818181818181818 +10012 clk cpu0 R X30 0000000000010E4C +10013 clk cpu0 IT (9977) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +10013 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +10013 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +10013 clk cpu0 R X20 001FFFFFFFFFFFFE +10013 clk cpu0 R X21 0000000000F00000 +10014 clk cpu0 IT (9978) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +10014 clk cpu0 R X0 0000000000000002 +10015 clk cpu0 IT (9979) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +10015 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10015 clk cpu0 R SP_EL1 0000000003700620 +10015 clk cpu0 R X22 FFFFFFFFFFFE0003 +10016 clk cpu0 IT (9980) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +10017 clk cpu0 IT (9981) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10017 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10017 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e4c +10017 clk cpu0 R SP_EL1 0000000003700610 +10018 clk cpu0 IT (9982) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +10018 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +10018 clk cpu0 R cpsr 620003c5 +10018 clk cpu0 R PMBIDR_EL1 00000030 +10018 clk cpu0 R ESR_EL1 5600000a +10018 clk cpu0 R SPSR_EL1 620003c5 +10018 clk cpu0 R TRBIDR_EL1 000000000000002b +10018 clk cpu0 R ELR_EL1 000000000009ef60 +10019 clk cpu0 IT (9983) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +10020 clk cpu0 IT (9984) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +10020 clk cpu0 R SP_EL1 0000000003700510 +10021 clk cpu0 IT (9985) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +10021 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +10021 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000040 +10022 clk cpu0 IT (9986) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +10022 clk cpu0 R X0 000000005600000A +10023 clk cpu0 IT (9987) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +10023 clk cpu0 R X1 0000000000000015 +10024 clk cpu0 IT (9988) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +10024 clk cpu0 R cpsr 620003c5 +10025 clk cpu0 IT (9989) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +10026 clk cpu0 IT (9990) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +10026 clk cpu0 R X1 000000000000000A +10027 clk cpu0 IT (9991) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +10027 clk cpu0 R cpsr 220003c5 +10028 clk cpu0 IS (9992) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +10029 clk cpu0 IT (9993) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +10029 clk cpu0 R cpsr 620003c5 +10030 clk cpu0 IS (9994) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +10031 clk cpu0 IT (9995) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +10031 clk cpu0 R cpsr 220003c5 +10032 clk cpu0 IS (9996) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +10033 clk cpu0 IT (9997) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +10033 clk cpu0 R cpsr 220003c5 +10034 clk cpu0 IS (9998) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +10035 clk cpu0 IT (9999) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +10035 clk cpu0 R cpsr 220003c5 +10036 clk cpu0 IS (10000) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +10037 clk cpu0 IT (10001) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +10037 clk cpu0 R cpsr 220003c5 +10038 clk cpu0 IS (10002) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +10039 clk cpu0 IT (10003) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +10039 clk cpu0 R cpsr 220003c5 +10040 clk cpu0 IS (10004) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +10041 clk cpu0 IT (10005) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +10041 clk cpu0 R cpsr 220003c5 +10042 clk cpu0 IS (10006) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +10043 clk cpu0 IT (10007) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +10043 clk cpu0 R cpsr 620003c5 +10044 clk cpu0 IT (10008) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +10045 clk cpu0 IT (10009) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +10045 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +10045 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000040 +10045 clk cpu0 R X0 0000000000000002 +10045 clk cpu0 R X1 0000000000000040 +10046 clk cpu0 IT (10010) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +10046 clk cpu0 R SP_EL1 0000000003700610 +10047 clk cpu0 IT (10011) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +10047 clk cpu0 R X0 0000000000000040 +10048 clk cpu0 IT (10012) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +10048 clk cpu0 R X1 0000000000000002 +10049 clk cpu0 IT (10013) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10049 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10049 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010e4c +10049 clk cpu0 R SP_EL1 0000000003700600 +10050 clk cpu0 IT (10014) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +10050 clk cpu0 R X30 00000000000381D4 +10051 clk cpu0 IT (10015) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +10051 clk cpu0 R X9 0000000003006000 +10052 clk cpu0 IT (10016) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +10052 clk cpu0 R X8 0000000000000010 +10053 clk cpu0 IT (10017) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +10053 clk cpu0 R X9 00000000030062A0 +10054 clk cpu0 IT (10018) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +10054 clk cpu0 MR8 03006320:000000806320_NS 00000000_000a113c +10054 clk cpu0 R X2 00000000000A113C +10055 clk cpu0 IT (10019) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +10055 clk cpu0 R X0 0000000000000002 +10056 clk cpu0 IT (10020) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +10056 clk cpu0 R cpsr 620007c5 +10057 clk cpu0 IT (10021) 000a113c:0000100a113c_NS d5110020 O EL1h_n : MSR TRCTRACEIDR,x0 +10057 clk cpu0 R cpsr 620003c5 +10057 clk cpu0 R TRCTRACEIDR 00000000:00000002 +10057 clk cpu0 CACHE cpu.cpu0.l1icache LINE 008a ALLOC 0x0000100a1140_NS +10057 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0450 ALLOC 0x0000100a1140_NS +10058 clk cpu0 IT (10022) 000a1140:0000100a1140_NS d65f03c0 O EL1h_n : RET +10059 clk cpu0 IT (10023) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10059 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10059 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010e4c +10059 clk cpu0 R SP_EL1 0000000003700610 +10059 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10059 clk cpu0 R X30 0000000000010E4C +10060 clk cpu0 IT (10024) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +10060 clk cpu0 R cpsr 620003c5 +10060 clk cpu0 R PMBIDR_EL1 00000030 +10060 clk cpu0 R TRBIDR_EL1 000000000000002b +10061 clk cpu0 IT (10025) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10061 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10061 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e4c +10061 clk cpu0 R SP_EL1 0000000003700620 +10061 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10061 clk cpu0 R X30 0000000000010E4C +10062 clk cpu0 IT (10026) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +10063 clk cpu0 IT (10027) 00010e4c:000010010e4c_NS 52804028 O EL1h_n : MOV w8,#0x201 +10063 clk cpu0 R X8 0000000000000201 +10064 clk cpu0 IT (10028) 00010e50:000010010e50_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +10064 clk cpu0 MW4 037007b8:000000f007b8_NS 00000201 +10065 clk cpu0 IT (10029) 00010e54:000010010e54_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +10065 clk cpu0 MR4 037007b8:000000f007b8_NS 00000201 +10065 clk cpu0 R X2 0000000000000201 +10066 clk cpu0 IT (10030) 00010e58:000010010e58_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +10066 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +10066 clk cpu0 R X4 0000000000000000 +10067 clk cpu0 IT (10031) 00010e5c:000010010e5c_NS 52801000 O EL1h_n : MOV w0,#0x80 +10067 clk cpu0 R X0 0000000000000080 +10068 clk cpu0 IT (10032) 00010e60:000010010e60_NS b94023e1 O EL1h_n : LDR w1,[sp,#0x20] +10068 clk cpu0 MR4 03700640:000000f00640_NS 00000001 +10068 clk cpu0 R X1 0000000000000001 +10069 clk cpu0 IT (10033) 00010e64:000010010e64_NS b9401fe3 O EL1h_n : LDR w3,[sp,#0x1c] +10069 clk cpu0 MR4 0370063c:000000f0063c_NS 00000003 +10069 clk cpu0 R X3 0000000000000003 +10070 clk cpu0 IT (10034) 00010e68:000010010e68_NS 94023322 O EL1h_n : BL 0x9daf0 +10070 clk cpu0 R X30 0000000000010E6C +10071 clk cpu0 IT (10035) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +10071 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10071 clk cpu0 R SP_EL1 00000000037005F0 +10072 clk cpu0 IT (10036) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +10072 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +10072 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +10073 clk cpu0 IT (10037) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +10073 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +10073 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e6c +10074 clk cpu0 IT (10038) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +10074 clk cpu0 R X19 0000000000000201 +10075 clk cpu0 IT (10039) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +10075 clk cpu0 R cpsr 220003c5 +10076 clk cpu0 IT (10040) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +10076 clk cpu0 R X20 0000000000000080 +10077 clk cpu0 IS (10041) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +10078 clk cpu0 IT (10042) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +10078 clk cpu0 R cpsr 620003c5 +10079 clk cpu0 IT (10043) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +10080 clk cpu0 IT (10044) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +10080 clk cpu0 R X1 0000000000000080 +10081 clk cpu0 IT (10045) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +10081 clk cpu0 R X2 0000000000000201 +10082 clk cpu0 IT (10046) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +10082 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +10082 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e6c +10082 clk cpu0 R X19 1818181818181818 +10082 clk cpu0 R X30 0000000000010E6C +10083 clk cpu0 IT (10047) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +10083 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +10083 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +10083 clk cpu0 R X20 001FFFFFFFFFFFFE +10083 clk cpu0 R X21 0000000000F00000 +10084 clk cpu0 IT (10048) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +10084 clk cpu0 R X0 0000000000000002 +10085 clk cpu0 IT (10049) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +10085 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10085 clk cpu0 R SP_EL1 0000000003700620 +10085 clk cpu0 R X22 FFFFFFFFFFFE0003 +10086 clk cpu0 IT (10050) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +10087 clk cpu0 IT (10051) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10087 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10087 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e6c +10087 clk cpu0 R SP_EL1 0000000003700610 +10088 clk cpu0 IT (10052) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +10088 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +10088 clk cpu0 R cpsr 620003c5 +10088 clk cpu0 R PMBIDR_EL1 00000030 +10088 clk cpu0 R ESR_EL1 5600000a +10088 clk cpu0 R SPSR_EL1 620003c5 +10088 clk cpu0 R TRBIDR_EL1 000000000000002b +10088 clk cpu0 R ELR_EL1 000000000009ef60 +10089 clk cpu0 IT (10053) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +10090 clk cpu0 IT (10054) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +10090 clk cpu0 R SP_EL1 0000000003700510 +10091 clk cpu0 IT (10055) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +10091 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +10091 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000080 +10092 clk cpu0 IT (10056) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +10092 clk cpu0 R X0 000000005600000A +10093 clk cpu0 IT (10057) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +10093 clk cpu0 R X1 0000000000000015 +10094 clk cpu0 IT (10058) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +10094 clk cpu0 R cpsr 620003c5 +10095 clk cpu0 IT (10059) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +10096 clk cpu0 IT (10060) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +10096 clk cpu0 R X1 000000000000000A +10097 clk cpu0 IT (10061) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +10097 clk cpu0 R cpsr 220003c5 +10098 clk cpu0 IS (10062) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +10099 clk cpu0 IT (10063) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +10099 clk cpu0 R cpsr 620003c5 +10100 clk cpu0 IS (10064) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +10101 clk cpu0 IT (10065) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +10101 clk cpu0 R cpsr 220003c5 +10102 clk cpu0 IS (10066) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +10103 clk cpu0 IT (10067) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +10103 clk cpu0 R cpsr 220003c5 +10104 clk cpu0 IS (10068) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +10105 clk cpu0 IT (10069) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +10105 clk cpu0 R cpsr 220003c5 +10106 clk cpu0 IS (10070) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +10107 clk cpu0 IT (10071) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +10107 clk cpu0 R cpsr 220003c5 +10108 clk cpu0 IS (10072) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +10109 clk cpu0 IT (10073) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +10109 clk cpu0 R cpsr 220003c5 +10110 clk cpu0 IS (10074) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +10111 clk cpu0 IT (10075) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +10111 clk cpu0 R cpsr 220003c5 +10112 clk cpu0 IS (10076) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +10113 clk cpu0 IT (10077) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +10113 clk cpu0 R cpsr 620003c5 +10114 clk cpu0 IT (10078) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +10115 clk cpu0 IT (10079) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +10115 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +10115 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000080 +10115 clk cpu0 R X0 0000000000000002 +10115 clk cpu0 R X1 0000000000000080 +10116 clk cpu0 IT (10080) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +10116 clk cpu0 R SP_EL1 0000000003700610 +10117 clk cpu0 IT (10081) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +10117 clk cpu0 R X0 0000000000000080 +10118 clk cpu0 IT (10082) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +10118 clk cpu0 R X1 0000000000000201 +10119 clk cpu0 IT (10083) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10119 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10119 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010e6c +10119 clk cpu0 R SP_EL1 0000000003700600 +10120 clk cpu0 IT (10084) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +10120 clk cpu0 R X30 00000000000381D4 +10121 clk cpu0 IT (10085) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +10121 clk cpu0 R X9 0000000003006000 +10122 clk cpu0 IT (10086) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +10122 clk cpu0 R X8 0000000000000020 +10123 clk cpu0 IT (10087) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +10123 clk cpu0 R X9 00000000030062A0 +10124 clk cpu0 IT (10088) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +10124 clk cpu0 MR8 030063a0:0000008063a0_NS 00000000_000a11bc +10124 clk cpu0 R X2 00000000000A11BC +10124 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 011c ALLOC 0x000000806380_NS +10124 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 18e0 ALLOC 0x000000806380_NS +10125 clk cpu0 IT (10089) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +10125 clk cpu0 R X0 0000000000000201 +10126 clk cpu0 IT (10090) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +10126 clk cpu0 R cpsr 620007c5 +10126 clk cpu0 CACHE cpu.cpu0.l1icache LINE 008c ALLOC 0x0000100a1180_NS +10126 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0460 ALLOC 0x0000100a1180_NS +10127 clk cpu0 IT (10091) 000a11bc:0000100a11bc_NS d5110040 O EL1h_n : MSR TRCVICTLR,x0 +10127 clk cpu0 R cpsr 620003c5 +10127 clk cpu0 R TRCVICTLR 00000000:00000201 +10127 clk cpu0 CACHE cpu.cpu0.l1icache LINE 008f ALLOC 0x0000100a11c0_NS +10127 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0471 ALLOC 0x0000100a11c0_NS +10128 clk cpu0 IT (10092) 000a11c0:0000100a11c0_NS d65f03c0 O EL1h_n : RET +10129 clk cpu0 IT (10093) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10129 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10129 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010e6c +10129 clk cpu0 R SP_EL1 0000000003700610 +10129 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10129 clk cpu0 R X30 0000000000010E6C +10130 clk cpu0 IT (10094) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +10130 clk cpu0 R cpsr 620003c5 +10130 clk cpu0 R PMBIDR_EL1 00000030 +10130 clk cpu0 R TRBIDR_EL1 000000000000002b +10131 clk cpu0 IT (10095) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10131 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10131 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e6c +10131 clk cpu0 R SP_EL1 0000000003700620 +10131 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10131 clk cpu0 R X30 0000000000010E6C +10132 clk cpu0 IT (10096) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +10133 clk cpu0 IT (10097) 00010e6c:000010010e6c_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +10133 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +10133 clk cpu0 R X3 0000000000000000 +10134 clk cpu0 IT (10098) 00010e70:000010010e70_NS 52803e00 O EL1h_n : MOV w0,#0x1f0 +10134 clk cpu0 R X0 00000000000001F0 +10135 clk cpu0 IT (10099) 00010e74:000010010e74_NS b94023e1 O EL1h_n : LDR w1,[sp,#0x20] +10135 clk cpu0 MR4 03700640:000000f00640_NS 00000001 +10135 clk cpu0 R X1 0000000000000001 +10136 clk cpu0 IT (10100) 00010e78:000010010e78_NS b9401fe2 O EL1h_n : LDR w2,[sp,#0x1c] +10136 clk cpu0 MR4 0370063c:000000f0063c_NS 00000003 +10136 clk cpu0 R X2 0000000000000003 +10137 clk cpu0 IT (10101) 00010e7c:000010010e7c_NS 94022a1e O EL1h_n : BL 0x9b6f4 +10137 clk cpu0 R X30 0000000000010E80 +10138 clk cpu0 IT (10102) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +10138 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +10138 clk cpu0 R SP_EL1 0000000003700600 +10139 clk cpu0 IT (10103) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +10139 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +10139 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e80 +10140 clk cpu0 IT (10104) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +10140 clk cpu0 R cpsr 220003c5 +10141 clk cpu0 IT (10105) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +10141 clk cpu0 R X19 00000000000001F0 +10142 clk cpu0 IS (10106) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +10143 clk cpu0 IT (10107) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +10143 clk cpu0 R cpsr 620003c5 +10144 clk cpu0 IT (10108) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +10145 clk cpu0 IT (10109) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +10145 clk cpu0 R X1 00000000000001F0 +10146 clk cpu0 IT (10110) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +10146 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +10146 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e80 +10146 clk cpu0 R X19 1818181818181818 +10146 clk cpu0 R X30 0000000000010E80 +10147 clk cpu0 IT (10111) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +10147 clk cpu0 R X0 0000000000000001 +10148 clk cpu0 IT (10112) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +10148 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +10148 clk cpu0 R SP_EL1 0000000003700620 +10148 clk cpu0 R X20 001FFFFFFFFFFFFE +10149 clk cpu0 IT (10113) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +10150 clk cpu0 IT (10114) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10150 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10150 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010e80 +10150 clk cpu0 R SP_EL1 0000000003700610 +10151 clk cpu0 IT (10115) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +10151 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +10151 clk cpu0 R cpsr 620003c5 +10151 clk cpu0 R PMBIDR_EL1 00000030 +10151 clk cpu0 R ESR_EL1 56000005 +10151 clk cpu0 R SPSR_EL1 620003c5 +10151 clk cpu0 R TRBIDR_EL1 000000000000002b +10151 clk cpu0 R ELR_EL1 000000000009ef50 +10152 clk cpu0 IT (10116) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +10153 clk cpu0 IT (10117) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +10153 clk cpu0 R SP_EL1 0000000003700510 +10154 clk cpu0 IT (10118) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +10154 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +10154 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001f0 +10155 clk cpu0 IT (10119) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +10155 clk cpu0 R X0 0000000056000005 +10156 clk cpu0 IT (10120) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +10156 clk cpu0 R X1 0000000000000015 +10157 clk cpu0 IT (10121) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +10157 clk cpu0 R cpsr 620003c5 +10158 clk cpu0 IT (10122) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +10159 clk cpu0 IT (10123) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +10159 clk cpu0 R X1 0000000000000005 +10160 clk cpu0 IT (10124) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +10160 clk cpu0 R cpsr 620003c5 +10161 clk cpu0 IS (10125) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +10162 clk cpu0 IT (10126) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +10162 clk cpu0 R cpsr 820003c5 +10163 clk cpu0 IS (10127) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +10164 clk cpu0 IT (10128) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +10164 clk cpu0 R cpsr 820003c5 +10165 clk cpu0 IS (10129) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +10166 clk cpu0 IT (10130) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +10166 clk cpu0 R cpsr 820003c5 +10167 clk cpu0 IS (10131) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +10168 clk cpu0 IT (10132) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +10168 clk cpu0 R cpsr 820003c5 +10169 clk cpu0 IS (10133) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +10170 clk cpu0 IT (10134) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +10170 clk cpu0 R cpsr 820003c5 +10171 clk cpu0 IS (10135) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +10172 clk cpu0 IT (10136) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +10172 clk cpu0 R cpsr 820003c5 +10173 clk cpu0 IS (10137) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +10174 clk cpu0 IT (10138) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +10174 clk cpu0 R cpsr 620003c5 +10175 clk cpu0 IT (10139) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +10176 clk cpu0 IT (10140) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +10176 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +10176 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001f0 +10176 clk cpu0 R X0 0000000000000001 +10176 clk cpu0 R X1 00000000000001F0 +10177 clk cpu0 IT (10141) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +10177 clk cpu0 R SP_EL1 0000000003700610 +10178 clk cpu0 IT (10142) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +10178 clk cpu0 R X0 00000000000001F0 +10179 clk cpu0 IT (10143) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10179 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10179 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010e80 +10179 clk cpu0 R SP_EL1 0000000003700600 +10180 clk cpu0 IT (10144) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +10180 clk cpu0 R X30 00000000000381B4 +10181 clk cpu0 IT (10145) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +10181 clk cpu0 R X9 0000000003003000 +10182 clk cpu0 IT (10146) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +10182 clk cpu0 R X8 000000000000007C +10183 clk cpu0 IT (10147) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +10183 clk cpu0 R X9 00000000030039C8 +10184 clk cpu0 IT (10148) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +10184 clk cpu0 MR8 03003da8:000000803da8_NS 00000000_0009f798 +10184 clk cpu0 R X0 000000000009F798 +10185 clk cpu0 IT (10149) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +10185 clk cpu0 R cpsr 620007c5 +10186 clk cpu0 IT (10150) 0009f798:00001009f798_NS d5310ce0 O EL1h_n : MRS x0,TRCIDR4 +10186 clk cpu0 R cpsr 620003c5 +10186 clk cpu0 R X0 0000000011180004 +10187 clk cpu0 IT (10151) 0009f79c:00001009f79c_NS d65f03c0 O EL1h_n : RET +10188 clk cpu0 IT (10152) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10188 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10188 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010e80 +10188 clk cpu0 R SP_EL1 0000000003700610 +10188 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10188 clk cpu0 R X30 0000000000010E80 +10189 clk cpu0 IT (10153) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +10189 clk cpu0 R cpsr 620003c5 +10189 clk cpu0 R PMBIDR_EL1 00000030 +10189 clk cpu0 R TRBIDR_EL1 000000000000002b +10190 clk cpu0 IT (10154) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10190 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10190 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010e80 +10190 clk cpu0 R SP_EL1 0000000003700620 +10190 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10190 clk cpu0 R X30 0000000000010E80 +10191 clk cpu0 IT (10155) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +10191 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0075 ALLOC 0x000010010e80_NS +10191 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 03a0 ALLOC 0x000010010e80_NS +10192 clk cpu0 IT (10156) 00010e80:000010010e80_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +10192 clk cpu0 MW4 037007b8:000000f007b8_NS 11180004 +10193 clk cpu0 IT (10157) 00010e84:000010010e84_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +10193 clk cpu0 MR4 037007b8:000000f007b8_NS 11180004 +10193 clk cpu0 R X8 0000000011180004 +10194 clk cpu0 IT (10158) 00010e88:000010010e88_NS 528001e9 O EL1h_n : MOV w9,#0xf +10194 clk cpu0 R X9 000000000000000F +10195 clk cpu0 IT (10159) 00010e8c:000010010e8c_NS 0a090108 O EL1h_n : AND w8,w8,w9 +10195 clk cpu0 R X8 0000000000000004 +10196 clk cpu0 IT (10160) 00010e90:000010010e90_NS 7100011f O EL1h_n : CMP w8,#0 +10196 clk cpu0 R cpsr 220003c5 +10197 clk cpu0 IT (10161) 00010e94:000010010e94_NS 1a9f07e8 O EL1h_n : CSET w8,NE +10197 clk cpu0 R X8 0000000000000001 +10198 clk cpu0 IT (10162) 00010e98:000010010e98_NS 52800029 O EL1h_n : MOV w9,#1 +10198 clk cpu0 R X9 0000000000000001 +10199 clk cpu0 IT (10163) 00010e9c:000010010e9c_NS 0a090108 O EL1h_n : AND w8,w8,w9 +10199 clk cpu0 R X8 0000000000000001 +10200 clk cpu0 IT (10164) 00010ea0:000010010ea0_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +10200 clk cpu0 MW4 037007b8:000000f007b8_NS 00000001 +10201 clk cpu0 IT (10165) 00010ea4:000010010ea4_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +10201 clk cpu0 MR4 037007b8:000000f007b8_NS 00000001 +10201 clk cpu0 R X8 0000000000000001 +10202 clk cpu0 IT (10166) 00010ea8:000010010ea8_NS 35000048 O EL1h_n : CBNZ w8,0x10eb0 +10203 clk cpu0 IT (10167) 00010eb0:000010010eb0_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +10203 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +10204 clk cpu0 IT (10168) 00010eb4:000010010eb4_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +10204 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +10204 clk cpu0 R X2 0000000000000000 +10205 clk cpu0 IT (10169) 00010eb8:000010010eb8_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +10205 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +10205 clk cpu0 R X4 0000000000000000 +10206 clk cpu0 IT (10170) 00010ebc:000010010ebc_NS 52801080 O EL1h_n : MOV w0,#0x84 +10206 clk cpu0 R X0 0000000000000084 +10206 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0077 ALLOC 0x000010010ec0_NS +10206 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 03b0 ALLOC 0x000010010ec0_NS +10207 clk cpu0 IT (10171) 00010ec0:000010010ec0_NS 52800028 O EL1h_n : MOV w8,#1 +10207 clk cpu0 R X8 0000000000000001 +10208 clk cpu0 IT (10172) 00010ec4:000010010ec4_NS 2a0803e1 O EL1h_n : MOV w1,w8 +10208 clk cpu0 R X1 0000000000000001 +10209 clk cpu0 IT (10173) 00010ec8:000010010ec8_NS 52800069 O EL1h_n : MOV w9,#3 +10209 clk cpu0 R X9 0000000000000003 +10210 clk cpu0 IT (10174) 00010ecc:000010010ecc_NS 2a0903e3 O EL1h_n : MOV w3,w9 +10210 clk cpu0 R X3 0000000000000003 +10211 clk cpu0 IT (10175) 00010ed0:000010010ed0_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +10211 clk cpu0 MW4 03700638:000000f00638_NS 00000001 +10212 clk cpu0 IT (10176) 00010ed4:000010010ed4_NS b90017e9 O EL1h_n : STR w9,[sp,#0x14] +10212 clk cpu0 MW4 03700634:000000f00634_NS 00000003 +10213 clk cpu0 IT (10177) 00010ed8:000010010ed8_NS 94023306 O EL1h_n : BL 0x9daf0 +10213 clk cpu0 R X30 0000000000010EDC +10214 clk cpu0 IT (10178) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +10214 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10214 clk cpu0 R SP_EL1 00000000037005F0 +10215 clk cpu0 IT (10179) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +10215 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +10215 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +10216 clk cpu0 IT (10180) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +10216 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +10216 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010edc +10217 clk cpu0 IT (10181) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +10217 clk cpu0 R X19 0000000000000000 +10218 clk cpu0 IT (10182) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +10218 clk cpu0 R cpsr 220003c5 +10219 clk cpu0 IT (10183) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +10219 clk cpu0 R X20 0000000000000084 +10220 clk cpu0 IS (10184) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +10221 clk cpu0 IT (10185) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +10221 clk cpu0 R cpsr 620003c5 +10222 clk cpu0 IT (10186) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +10223 clk cpu0 IT (10187) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +10223 clk cpu0 R X1 0000000000000084 +10224 clk cpu0 IT (10188) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +10224 clk cpu0 R X2 0000000000000000 +10225 clk cpu0 IT (10189) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +10225 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +10225 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010edc +10225 clk cpu0 R X19 1818181818181818 +10225 clk cpu0 R X30 0000000000010EDC +10226 clk cpu0 IT (10190) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +10226 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +10226 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +10226 clk cpu0 R X20 001FFFFFFFFFFFFE +10226 clk cpu0 R X21 0000000000F00000 +10227 clk cpu0 IT (10191) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +10227 clk cpu0 R X0 0000000000000002 +10228 clk cpu0 IT (10192) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +10228 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10228 clk cpu0 R SP_EL1 0000000003700620 +10228 clk cpu0 R X22 FFFFFFFFFFFE0003 +10229 clk cpu0 IT (10193) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +10230 clk cpu0 IT (10194) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10230 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10230 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010edc +10230 clk cpu0 R SP_EL1 0000000003700610 +10231 clk cpu0 IT (10195) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +10231 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +10231 clk cpu0 R cpsr 620003c5 +10231 clk cpu0 R PMBIDR_EL1 00000030 +10231 clk cpu0 R ESR_EL1 5600000a +10231 clk cpu0 R SPSR_EL1 620003c5 +10231 clk cpu0 R TRBIDR_EL1 000000000000002b +10231 clk cpu0 R ELR_EL1 000000000009ef60 +10232 clk cpu0 IT (10196) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +10233 clk cpu0 IT (10197) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +10233 clk cpu0 R SP_EL1 0000000003700510 +10234 clk cpu0 IT (10198) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +10234 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +10234 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000084 +10235 clk cpu0 IT (10199) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +10235 clk cpu0 R X0 000000005600000A +10236 clk cpu0 IT (10200) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +10236 clk cpu0 R X1 0000000000000015 +10237 clk cpu0 IT (10201) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +10237 clk cpu0 R cpsr 620003c5 +10238 clk cpu0 IT (10202) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +10239 clk cpu0 IT (10203) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +10239 clk cpu0 R X1 000000000000000A +10240 clk cpu0 IT (10204) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +10240 clk cpu0 R cpsr 220003c5 +10241 clk cpu0 IS (10205) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +10242 clk cpu0 IT (10206) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +10242 clk cpu0 R cpsr 620003c5 +10243 clk cpu0 IS (10207) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +10244 clk cpu0 IT (10208) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +10244 clk cpu0 R cpsr 220003c5 +10245 clk cpu0 IS (10209) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +10246 clk cpu0 IT (10210) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +10246 clk cpu0 R cpsr 220003c5 +10247 clk cpu0 IS (10211) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +10248 clk cpu0 IT (10212) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +10248 clk cpu0 R cpsr 220003c5 +10249 clk cpu0 IS (10213) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +10250 clk cpu0 IT (10214) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +10250 clk cpu0 R cpsr 220003c5 +10251 clk cpu0 IS (10215) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +10252 clk cpu0 IT (10216) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +10252 clk cpu0 R cpsr 220003c5 +10253 clk cpu0 IS (10217) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +10254 clk cpu0 IT (10218) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +10254 clk cpu0 R cpsr 220003c5 +10255 clk cpu0 IS (10219) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +10256 clk cpu0 IT (10220) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +10256 clk cpu0 R cpsr 620003c5 +10257 clk cpu0 IT (10221) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +10258 clk cpu0 IT (10222) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +10258 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +10258 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000084 +10258 clk cpu0 R X0 0000000000000002 +10258 clk cpu0 R X1 0000000000000084 +10259 clk cpu0 IT (10223) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +10259 clk cpu0 R SP_EL1 0000000003700610 +10260 clk cpu0 IT (10224) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +10260 clk cpu0 R X0 0000000000000084 +10261 clk cpu0 IT (10225) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +10261 clk cpu0 R X1 0000000000000000 +10262 clk cpu0 IT (10226) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10262 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10262 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010edc +10262 clk cpu0 R SP_EL1 0000000003700600 +10263 clk cpu0 IT (10227) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +10263 clk cpu0 R X30 00000000000381D4 +10264 clk cpu0 IT (10228) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +10264 clk cpu0 R X9 0000000003006000 +10265 clk cpu0 IT (10229) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +10265 clk cpu0 R X8 0000000000000021 +10266 clk cpu0 IT (10230) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +10266 clk cpu0 R X9 00000000030062A0 +10267 clk cpu0 IT (10231) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +10267 clk cpu0 MR8 030063a8:0000008063a8_NS 00000000_000a11cc +10267 clk cpu0 R X2 00000000000A11CC +10268 clk cpu0 IT (10232) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +10268 clk cpu0 R X0 0000000000000000 +10269 clk cpu0 IT (10233) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +10269 clk cpu0 R cpsr 620007c5 +10270 clk cpu0 IT (10234) 000a11cc:0000100a11cc_NS d5110140 O EL1h_n : MSR TRCVIIECTLR,x0 +10270 clk cpu0 R cpsr 620003c5 +10270 clk cpu0 R TRCVIIECTLR 00000000:00000000 +10271 clk cpu0 IT (10235) 000a11d0:0000100a11d0_NS d65f03c0 O EL1h_n : RET +10272 clk cpu0 IT (10236) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10272 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10272 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010edc +10272 clk cpu0 R SP_EL1 0000000003700610 +10272 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10272 clk cpu0 R X30 0000000000010EDC +10273 clk cpu0 IT (10237) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +10273 clk cpu0 R cpsr 620003c5 +10273 clk cpu0 R PMBIDR_EL1 00000030 +10273 clk cpu0 R TRBIDR_EL1 000000000000002b +10274 clk cpu0 IT (10238) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10274 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10274 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010edc +10274 clk cpu0 R SP_EL1 0000000003700620 +10274 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10274 clk cpu0 R X30 0000000000010EDC +10275 clk cpu0 IT (10239) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +10276 clk cpu0 IT (10240) 00010edc:000010010edc_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +10276 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +10277 clk cpu0 IT (10241) 00010ee0:000010010ee0_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +10277 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +10277 clk cpu0 R X2 0000000000000000 +10278 clk cpu0 IT (10242) 00010ee4:000010010ee4_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +10278 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +10278 clk cpu0 R X4 0000000000000000 +10279 clk cpu0 IT (10243) 00010ee8:000010010ee8_NS 52801100 O EL1h_n : MOV w0,#0x88 +10279 clk cpu0 R X0 0000000000000088 +10280 clk cpu0 IT (10244) 00010eec:000010010eec_NS b9401be1 O EL1h_n : LDR w1,[sp,#0x18] +10280 clk cpu0 MR4 03700638:000000f00638_NS 00000001 +10280 clk cpu0 R X1 0000000000000001 +10281 clk cpu0 IT (10245) 00010ef0:000010010ef0_NS b94017e3 O EL1h_n : LDR w3,[sp,#0x14] +10281 clk cpu0 MR4 03700634:000000f00634_NS 00000003 +10281 clk cpu0 R X3 0000000000000003 +10282 clk cpu0 IT (10246) 00010ef4:000010010ef4_NS 940232ff O EL1h_n : BL 0x9daf0 +10282 clk cpu0 R X30 0000000000010EF8 +10283 clk cpu0 IT (10247) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +10283 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10283 clk cpu0 R SP_EL1 00000000037005F0 +10284 clk cpu0 IT (10248) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +10284 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +10284 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +10285 clk cpu0 IT (10249) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +10285 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +10285 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010ef8 +10286 clk cpu0 IT (10250) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +10286 clk cpu0 R X19 0000000000000000 +10287 clk cpu0 IT (10251) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +10287 clk cpu0 R cpsr 220003c5 +10288 clk cpu0 IT (10252) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +10288 clk cpu0 R X20 0000000000000088 +10289 clk cpu0 IS (10253) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +10290 clk cpu0 IT (10254) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +10290 clk cpu0 R cpsr 620003c5 +10291 clk cpu0 IT (10255) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +10292 clk cpu0 IT (10256) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +10292 clk cpu0 R X1 0000000000000088 +10293 clk cpu0 IT (10257) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +10293 clk cpu0 R X2 0000000000000000 +10294 clk cpu0 IT (10258) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +10294 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +10294 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010ef8 +10294 clk cpu0 R X19 1818181818181818 +10294 clk cpu0 R X30 0000000000010EF8 +10295 clk cpu0 IT (10259) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +10295 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +10295 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +10295 clk cpu0 R X20 001FFFFFFFFFFFFE +10295 clk cpu0 R X21 0000000000F00000 +10296 clk cpu0 IT (10260) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +10296 clk cpu0 R X0 0000000000000002 +10297 clk cpu0 IT (10261) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +10297 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10297 clk cpu0 R SP_EL1 0000000003700620 +10297 clk cpu0 R X22 FFFFFFFFFFFE0003 +10298 clk cpu0 IT (10262) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +10299 clk cpu0 IT (10263) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10299 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10299 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010ef8 +10299 clk cpu0 R SP_EL1 0000000003700610 +10300 clk cpu0 IT (10264) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +10300 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +10300 clk cpu0 R cpsr 620003c5 +10300 clk cpu0 R PMBIDR_EL1 00000030 +10300 clk cpu0 R ESR_EL1 5600000a +10300 clk cpu0 R SPSR_EL1 620003c5 +10300 clk cpu0 R TRBIDR_EL1 000000000000002b +10300 clk cpu0 R ELR_EL1 000000000009ef60 +10301 clk cpu0 IT (10265) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +10302 clk cpu0 IT (10266) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +10302 clk cpu0 R SP_EL1 0000000003700510 +10303 clk cpu0 IT (10267) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +10303 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +10303 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000088 +10304 clk cpu0 IT (10268) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +10304 clk cpu0 R X0 000000005600000A +10305 clk cpu0 IT (10269) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +10305 clk cpu0 R X1 0000000000000015 +10306 clk cpu0 IT (10270) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +10306 clk cpu0 R cpsr 620003c5 +10307 clk cpu0 IT (10271) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +10308 clk cpu0 IT (10272) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +10308 clk cpu0 R X1 000000000000000A +10309 clk cpu0 IT (10273) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +10309 clk cpu0 R cpsr 220003c5 +10310 clk cpu0 IS (10274) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +10311 clk cpu0 IT (10275) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +10311 clk cpu0 R cpsr 620003c5 +10312 clk cpu0 IS (10276) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +10313 clk cpu0 IT (10277) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +10313 clk cpu0 R cpsr 220003c5 +10314 clk cpu0 IS (10278) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +10315 clk cpu0 IT (10279) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +10315 clk cpu0 R cpsr 220003c5 +10316 clk cpu0 IS (10280) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +10317 clk cpu0 IT (10281) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +10317 clk cpu0 R cpsr 220003c5 +10318 clk cpu0 IS (10282) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +10319 clk cpu0 IT (10283) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +10319 clk cpu0 R cpsr 220003c5 +10320 clk cpu0 IS (10284) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +10321 clk cpu0 IT (10285) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +10321 clk cpu0 R cpsr 220003c5 +10322 clk cpu0 IS (10286) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +10323 clk cpu0 IT (10287) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +10323 clk cpu0 R cpsr 220003c5 +10324 clk cpu0 IS (10288) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +10325 clk cpu0 IT (10289) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +10325 clk cpu0 R cpsr 620003c5 +10326 clk cpu0 IT (10290) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +10327 clk cpu0 IT (10291) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +10327 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +10327 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000088 +10327 clk cpu0 R X0 0000000000000002 +10327 clk cpu0 R X1 0000000000000088 +10328 clk cpu0 IT (10292) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +10328 clk cpu0 R SP_EL1 0000000003700610 +10329 clk cpu0 IT (10293) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +10329 clk cpu0 R X0 0000000000000088 +10330 clk cpu0 IT (10294) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +10330 clk cpu0 R X1 0000000000000000 +10331 clk cpu0 IT (10295) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10331 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10331 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010ef8 +10331 clk cpu0 R SP_EL1 0000000003700600 +10332 clk cpu0 IT (10296) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +10332 clk cpu0 R X30 00000000000381D4 +10333 clk cpu0 IT (10297) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +10333 clk cpu0 R X9 0000000003006000 +10334 clk cpu0 IT (10298) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +10334 clk cpu0 R X8 0000000000000022 +10335 clk cpu0 IT (10299) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +10335 clk cpu0 R X9 00000000030062A0 +10336 clk cpu0 IT (10300) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +10336 clk cpu0 MR8 030063b0:0000008063b0_NS 00000000_000a11c4 +10336 clk cpu0 R X2 00000000000A11C4 +10337 clk cpu0 IT (10301) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +10337 clk cpu0 R X0 0000000000000000 +10338 clk cpu0 IT (10302) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +10338 clk cpu0 R cpsr 620007c5 +10339 clk cpu0 IT (10303) 000a11c4:0000100a11c4_NS d5110240 O EL1h_n : MSR TRCVISSCTLR,x0 +10339 clk cpu0 R cpsr 620003c5 +10339 clk cpu0 R TRCVISSCTLR 00000000:00000000 +10340 clk cpu0 IT (10304) 000a11c8:0000100a11c8_NS d65f03c0 O EL1h_n : RET +10341 clk cpu0 IT (10305) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10341 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10341 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010ef8 +10341 clk cpu0 R SP_EL1 0000000003700610 +10341 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10341 clk cpu0 R X30 0000000000010EF8 +10342 clk cpu0 IT (10306) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +10342 clk cpu0 R cpsr 620003c5 +10342 clk cpu0 R PMBIDR_EL1 00000030 +10342 clk cpu0 R TRBIDR_EL1 000000000000002b +10343 clk cpu0 IT (10307) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10343 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10343 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010ef8 +10343 clk cpu0 R SP_EL1 0000000003700620 +10343 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10343 clk cpu0 R X30 0000000000010EF8 +10344 clk cpu0 IT (10308) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +10345 clk cpu0 IT (10309) 00010ef8:000010010ef8_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +10345 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +10345 clk cpu0 R X3 0000000000000000 +10346 clk cpu0 IT (10310) 00010efc:000010010efc_NS 52803e00 O EL1h_n : MOV w0,#0x1f0 +10346 clk cpu0 R X0 00000000000001F0 +10346 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0078 ALLOC 0x000010010f00_NS +10346 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 03c0 ALLOC 0x000010010f00_NS +10347 clk cpu0 IT (10311) 00010f00:000010010f00_NS 52800021 O EL1h_n : MOV w1,#1 +10347 clk cpu0 R X1 0000000000000001 +10348 clk cpu0 IT (10312) 00010f04:000010010f04_NS 52800062 O EL1h_n : MOV w2,#3 +10348 clk cpu0 R X2 0000000000000003 +10349 clk cpu0 IT (10313) 00010f08:000010010f08_NS 940229fb O EL1h_n : BL 0x9b6f4 +10349 clk cpu0 R X30 0000000000010F0C +10350 clk cpu0 IT (10314) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +10350 clk cpu0 MW8 03700600:000000f00600_NS 001fffff_fffffffe +10350 clk cpu0 R SP_EL1 0000000003700600 +10351 clk cpu0 IT (10315) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +10351 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +10351 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010f0c +10352 clk cpu0 IT (10316) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +10352 clk cpu0 R cpsr 220003c5 +10353 clk cpu0 IT (10317) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +10353 clk cpu0 R X19 00000000000001F0 +10354 clk cpu0 IS (10318) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +10355 clk cpu0 IT (10319) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +10355 clk cpu0 R cpsr 620003c5 +10356 clk cpu0 IT (10320) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +10357 clk cpu0 IT (10321) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +10357 clk cpu0 R X1 00000000000001F0 +10358 clk cpu0 IT (10322) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +10358 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +10358 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010f0c +10358 clk cpu0 R X19 1818181818181818 +10358 clk cpu0 R X30 0000000000010F0C +10359 clk cpu0 IT (10323) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +10359 clk cpu0 R X0 0000000000000001 +10360 clk cpu0 IT (10324) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +10360 clk cpu0 MR8 03700600:000000f00600_NS 001fffff_fffffffe +10360 clk cpu0 R SP_EL1 0000000003700620 +10360 clk cpu0 R X20 001FFFFFFFFFFFFE +10361 clk cpu0 IT (10325) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +10362 clk cpu0 IT (10326) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10362 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10362 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010f0c +10362 clk cpu0 R SP_EL1 0000000003700610 +10363 clk cpu0 IT (10327) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +10363 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +10363 clk cpu0 R cpsr 620003c5 +10363 clk cpu0 R PMBIDR_EL1 00000030 +10363 clk cpu0 R ESR_EL1 56000005 +10363 clk cpu0 R SPSR_EL1 620003c5 +10363 clk cpu0 R TRBIDR_EL1 000000000000002b +10363 clk cpu0 R ELR_EL1 000000000009ef50 +10364 clk cpu0 IT (10328) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +10365 clk cpu0 IT (10329) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +10365 clk cpu0 R SP_EL1 0000000003700510 +10366 clk cpu0 IT (10330) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +10366 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +10366 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001f0 +10367 clk cpu0 IT (10331) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +10367 clk cpu0 R X0 0000000056000005 +10368 clk cpu0 IT (10332) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +10368 clk cpu0 R X1 0000000000000015 +10369 clk cpu0 IT (10333) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +10369 clk cpu0 R cpsr 620003c5 +10370 clk cpu0 IT (10334) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +10371 clk cpu0 IT (10335) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +10371 clk cpu0 R X1 0000000000000005 +10372 clk cpu0 IT (10336) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +10372 clk cpu0 R cpsr 620003c5 +10373 clk cpu0 IS (10337) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +10374 clk cpu0 IT (10338) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +10374 clk cpu0 R cpsr 820003c5 +10375 clk cpu0 IS (10339) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +10376 clk cpu0 IT (10340) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +10376 clk cpu0 R cpsr 820003c5 +10377 clk cpu0 IS (10341) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +10378 clk cpu0 IT (10342) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +10378 clk cpu0 R cpsr 820003c5 +10379 clk cpu0 IS (10343) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +10380 clk cpu0 IT (10344) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +10380 clk cpu0 R cpsr 820003c5 +10381 clk cpu0 IS (10345) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +10382 clk cpu0 IT (10346) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +10382 clk cpu0 R cpsr 820003c5 +10383 clk cpu0 IS (10347) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +10384 clk cpu0 IT (10348) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +10384 clk cpu0 R cpsr 820003c5 +10385 clk cpu0 IS (10349) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +10386 clk cpu0 IT (10350) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +10386 clk cpu0 R cpsr 620003c5 +10387 clk cpu0 IT (10351) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +10388 clk cpu0 IT (10352) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +10388 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +10388 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001f0 +10388 clk cpu0 R X0 0000000000000001 +10388 clk cpu0 R X1 00000000000001F0 +10389 clk cpu0 IT (10353) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +10389 clk cpu0 R SP_EL1 0000000003700610 +10390 clk cpu0 IT (10354) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +10390 clk cpu0 R X0 00000000000001F0 +10391 clk cpu0 IT (10355) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10391 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10391 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010f0c +10391 clk cpu0 R SP_EL1 0000000003700600 +10392 clk cpu0 IT (10356) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +10392 clk cpu0 R X30 00000000000381B4 +10393 clk cpu0 IT (10357) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +10393 clk cpu0 R X9 0000000003003000 +10394 clk cpu0 IT (10358) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +10394 clk cpu0 R X8 000000000000007C +10395 clk cpu0 IT (10359) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +10395 clk cpu0 R X9 00000000030039C8 +10396 clk cpu0 IT (10360) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +10396 clk cpu0 MR8 03003da8:000000803da8_NS 00000000_0009f798 +10396 clk cpu0 R X0 000000000009F798 +10397 clk cpu0 IT (10361) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +10397 clk cpu0 R cpsr 620007c5 +10398 clk cpu0 IT (10362) 0009f798:00001009f798_NS d5310ce0 O EL1h_n : MRS x0,TRCIDR4 +10398 clk cpu0 R cpsr 620003c5 +10398 clk cpu0 R X0 0000000011180004 +10399 clk cpu0 IT (10363) 0009f79c:00001009f79c_NS d65f03c0 O EL1h_n : RET +10400 clk cpu0 IT (10364) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10400 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10400 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010f0c +10400 clk cpu0 R SP_EL1 0000000003700610 +10400 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10400 clk cpu0 R X30 0000000000010F0C +10401 clk cpu0 IT (10365) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +10401 clk cpu0 R cpsr 620003c5 +10401 clk cpu0 R PMBIDR_EL1 00000030 +10401 clk cpu0 R TRBIDR_EL1 000000000000002b +10402 clk cpu0 IT (10366) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10402 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10402 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010f0c +10402 clk cpu0 R SP_EL1 0000000003700620 +10402 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10402 clk cpu0 R X30 0000000000010F0C +10403 clk cpu0 IT (10367) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +10404 clk cpu0 IT (10368) 00010f0c:000010010f0c_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +10404 clk cpu0 MW4 037007b8:000000f007b8_NS 11180004 +10405 clk cpu0 IT (10369) 00010f10:000010010f10_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +10405 clk cpu0 MR4 037007b8:000000f007b8_NS 11180004 +10405 clk cpu0 R X8 0000000011180004 +10406 clk cpu0 IT (10370) 00010f14:000010010f14_NS 529e0009 O EL1h_n : MOV w9,#0xf000 +10406 clk cpu0 R X9 000000000000F000 +10407 clk cpu0 IT (10371) 00010f18:000010010f18_NS 0a090108 O EL1h_n : AND w8,w8,w9 +10407 clk cpu0 R X8 0000000000000000 +10408 clk cpu0 IT (10372) 00010f1c:000010010f1c_NS 52800189 O EL1h_n : MOV w9,#0xc +10408 clk cpu0 R X9 000000000000000C +10409 clk cpu0 IT (10373) 00010f20:000010010f20_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +10409 clk cpu0 R X8 0000000000000000 +10410 clk cpu0 IT (10374) 00010f24:000010010f24_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +10410 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +10411 clk cpu0 IT (10375) 00010f28:000010010f28_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +10411 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +10411 clk cpu0 R X8 0000000000000000 +10412 clk cpu0 IS (10376) 00010f2c:000010010f2c_NS 35000048 O EL1h_n : CBNZ w8,0x10f34 +10413 clk cpu0 IT (10377) 00010f30:000010010f30_NS 14000008 O EL1h_n : B 0x10f50 +10413 clk cpu0 CACHE cpu.cpu0.l1icache LINE 007b ALLOC 0x000010010f40_NS +10413 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 03d1 ALLOC 0x000010010f40_NS +10414 clk cpu0 IT (10378) 00010f50:000010010f50_NS 52800028 O EL1h_n : MOV w8,#1 +10414 clk cpu0 R X8 0000000000000001 +10415 clk cpu0 IT (10379) 00010f54:000010010f54_NS b9019be8 O EL1h_n : STR w8,[sp,#0x198] +10415 clk cpu0 MW4 037007b8:000000f007b8_NS 00000001 +10416 clk cpu0 IT (10380) 00010f58:000010010f58_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +10416 clk cpu0 MR4 037007b8:000000f007b8_NS 00000001 +10416 clk cpu0 R X2 0000000000000001 +10417 clk cpu0 IT (10381) 00010f5c:000010010f5c_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +10417 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +10417 clk cpu0 R X4 0000000000000000 +10418 clk cpu0 IT (10382) 00010f60:000010010f60_NS 52800080 O EL1h_n : MOV w0,#4 +10418 clk cpu0 R X0 0000000000000004 +10419 clk cpu0 IT (10383) 00010f64:000010010f64_NS 2a0803e1 O EL1h_n : MOV w1,w8 +10419 clk cpu0 R X1 0000000000000001 +10420 clk cpu0 IT (10384) 00010f68:000010010f68_NS 52800063 O EL1h_n : MOV w3,#3 +10420 clk cpu0 R X3 0000000000000003 +10421 clk cpu0 IT (10385) 00010f6c:000010010f6c_NS 940232e1 O EL1h_n : BL 0x9daf0 +10421 clk cpu0 R X30 0000000000010F70 +10422 clk cpu0 IT (10386) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +10422 clk cpu0 MW8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10422 clk cpu0 R SP_EL1 00000000037005F0 +10423 clk cpu0 IT (10387) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +10423 clk cpu0 MW8 03700600:000000f00600_NS 00000000_00f00000 +10423 clk cpu0 MW8 03700608:000000f00608_NS 001fffff_fffffffe +10424 clk cpu0 IT (10388) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +10424 clk cpu0 MW8 03700610:000000f00610_NS 18181818_18181818 +10424 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010f70 +10425 clk cpu0 IT (10389) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +10425 clk cpu0 R X19 0000000000000001 +10426 clk cpu0 IT (10390) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +10426 clk cpu0 R cpsr 220003c5 +10427 clk cpu0 IT (10391) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +10427 clk cpu0 R X20 0000000000000004 +10428 clk cpu0 IS (10392) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +10429 clk cpu0 IT (10393) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +10429 clk cpu0 R cpsr 620003c5 +10430 clk cpu0 IT (10394) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +10431 clk cpu0 IT (10395) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +10431 clk cpu0 R X1 0000000000000004 +10432 clk cpu0 IT (10396) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +10432 clk cpu0 R X2 0000000000000001 +10433 clk cpu0 IT (10397) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +10433 clk cpu0 MR8 03700610:000000f00610_NS 18181818_18181818 +10433 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010f70 +10433 clk cpu0 R X19 1818181818181818 +10433 clk cpu0 R X30 0000000000010F70 +10434 clk cpu0 IT (10398) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +10434 clk cpu0 MR8 03700600:000000f00600_NS 00000000_00f00000 +10434 clk cpu0 MR8 03700608:000000f00608_NS 001fffff_fffffffe +10434 clk cpu0 R X20 001FFFFFFFFFFFFE +10434 clk cpu0 R X21 0000000000F00000 +10435 clk cpu0 IT (10399) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +10435 clk cpu0 R X0 0000000000000002 +10436 clk cpu0 IT (10400) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +10436 clk cpu0 MR8 037005f0:000000f005f0_NS ffffffff_fffe0003 +10436 clk cpu0 R SP_EL1 0000000003700620 +10436 clk cpu0 R X22 FFFFFFFFFFFE0003 +10437 clk cpu0 IT (10401) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +10438 clk cpu0 IT (10402) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10438 clk cpu0 MW8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10438 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010f70 +10438 clk cpu0 R SP_EL1 0000000003700610 +10439 clk cpu0 IT (10403) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +10439 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +10439 clk cpu0 R cpsr 620003c5 +10439 clk cpu0 R PMBIDR_EL1 00000030 +10439 clk cpu0 R ESR_EL1 5600000a +10439 clk cpu0 R SPSR_EL1 620003c5 +10439 clk cpu0 R TRBIDR_EL1 000000000000002b +10439 clk cpu0 R ELR_EL1 000000000009ef60 +10440 clk cpu0 IT (10404) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +10441 clk cpu0 IT (10405) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +10441 clk cpu0 R SP_EL1 0000000003700510 +10442 clk cpu0 IT (10406) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +10442 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +10442 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000004 +10443 clk cpu0 IT (10407) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +10443 clk cpu0 R X0 000000005600000A +10444 clk cpu0 IT (10408) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +10444 clk cpu0 R X1 0000000000000015 +10445 clk cpu0 IT (10409) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +10445 clk cpu0 R cpsr 620003c5 +10446 clk cpu0 IT (10410) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +10447 clk cpu0 IT (10411) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +10447 clk cpu0 R X1 000000000000000A +10448 clk cpu0 IT (10412) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +10448 clk cpu0 R cpsr 220003c5 +10449 clk cpu0 IS (10413) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +10450 clk cpu0 IT (10414) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +10450 clk cpu0 R cpsr 620003c5 +10451 clk cpu0 IS (10415) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +10452 clk cpu0 IT (10416) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +10452 clk cpu0 R cpsr 220003c5 +10453 clk cpu0 IS (10417) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +10454 clk cpu0 IT (10418) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +10454 clk cpu0 R cpsr 220003c5 +10455 clk cpu0 IS (10419) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +10456 clk cpu0 IT (10420) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +10456 clk cpu0 R cpsr 220003c5 +10457 clk cpu0 IS (10421) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +10458 clk cpu0 IT (10422) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +10458 clk cpu0 R cpsr 220003c5 +10459 clk cpu0 IS (10423) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +10460 clk cpu0 IT (10424) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +10460 clk cpu0 R cpsr 220003c5 +10461 clk cpu0 IS (10425) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +10462 clk cpu0 IT (10426) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +10462 clk cpu0 R cpsr 220003c5 +10463 clk cpu0 IS (10427) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +10464 clk cpu0 IT (10428) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +10464 clk cpu0 R cpsr 620003c5 +10465 clk cpu0 IT (10429) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +10466 clk cpu0 IT (10430) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +10466 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +10466 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000004 +10466 clk cpu0 R X0 0000000000000002 +10466 clk cpu0 R X1 0000000000000004 +10467 clk cpu0 IT (10431) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +10467 clk cpu0 R SP_EL1 0000000003700610 +10468 clk cpu0 IT (10432) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +10468 clk cpu0 R X0 0000000000000004 +10469 clk cpu0 IT (10433) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +10469 clk cpu0 R X1 0000000000000001 +10470 clk cpu0 IT (10434) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +10470 clk cpu0 MW8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10470 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00010f70 +10470 clk cpu0 R SP_EL1 0000000003700600 +10471 clk cpu0 IT (10435) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +10471 clk cpu0 R X30 00000000000381D4 +10472 clk cpu0 IT (10436) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +10472 clk cpu0 R X9 0000000003006000 +10473 clk cpu0 IT (10437) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +10473 clk cpu0 R X8 0000000000000001 +10474 clk cpu0 IT (10438) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +10474 clk cpu0 R X9 00000000030062A0 +10475 clk cpu0 IT (10439) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +10475 clk cpu0 MR8 030062a8:0000008062a8_NS 00000000_000a10c0 +10475 clk cpu0 R X2 00000000000A10C0 +10476 clk cpu0 IT (10440) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +10476 clk cpu0 R X0 0000000000000001 +10477 clk cpu0 IT (10441) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +10477 clk cpu0 R cpsr 620007c5 +10478 clk cpu0 IT (10442) 000a10c0:0000100a10c0_NS d5110100 O EL1h_n : MSR TRCPRGCTLR,x0 +10478 clk cpu0 R cpsr 620003c5 +10478 clk cpu0 R TRCPRGCTLR 00000000:00000001 +10479 clk cpu0 IT (10443) 000a10c4:0000100a10c4_NS d5033fdf O EL1h_n : ISB +10479 clk cpu0 R PMBIDR_EL1 00000030 +10479 clk cpu0 R TRBIDR_EL1 000000000000002b +10480 clk cpu0 IT (10444) 000a10c8:0000100a10c8_NS d65f03c0 O EL1h_n : RET +10481 clk cpu0 IT (10445) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10481 clk cpu0 MR8 03700600:000000f00600_NS 7fff7fff_7fff7fff +10481 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00010f70 +10481 clk cpu0 R SP_EL1 0000000003700610 +10481 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10481 clk cpu0 R X30 0000000000010F70 +10482 clk cpu0 IT (10446) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +10482 clk cpu0 R cpsr 620003c5 +10482 clk cpu0 R PMBIDR_EL1 00000030 +10482 clk cpu0 R TRBIDR_EL1 000000000000002b +10483 clk cpu0 IT (10447) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10483 clk cpu0 MR8 03700610:000000f00610_NS 7fff7fff_7fff7fff +10483 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010f70 +10483 clk cpu0 R SP_EL1 0000000003700620 +10483 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10483 clk cpu0 R X30 0000000000010F70 +10484 clk cpu0 IT (10448) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +10485 clk cpu0 IT (10449) 00010f70:000010010f70_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +10485 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +10485 clk cpu0 R X8 0000000000000001 +10486 clk cpu0 IT (10450) 00010f74:000010010f74_NS 7100051f O EL1h_n : CMP w8,#1 +10486 clk cpu0 R cpsr 620003c5 +10487 clk cpu0 IT (10451) 00010f78:000010010f78_NS 1a9fd7e8 O EL1h_n : CSET w8,GT +10487 clk cpu0 R X8 0000000000000000 +10488 clk cpu0 IS (10452) 00010f7c:000010010f7c_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10f84 +10488 clk cpu0 CACHE cpu.cpu0.l1icache LINE 007d ALLOC 0x000010010f80_NS +10488 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 03e0 ALLOC 0x000010010f80_NS +10489 clk cpu0 IT (10453) 00010f80:000010010f80_NS 1400000a O EL1h_n : B 0x10fa8 +10490 clk cpu0 IT (10454) 00010fa8:000010010fa8_NS 1400007b O EL1h_n : B 0x11194 +10490 clk cpu0 CACHE cpu.cpu0.l1icache LINE 008d ALLOC 0x000010011180_NS +10490 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0461 ALLOC 0x000010011180_NS +10491 clk cpu0 IT (10455) 00011194:000010011194_NS 914403ff O EL1h_n : ADD sp,sp,#0x100,LSL #12 +10491 clk cpu0 R SP_EL1 0000000003800620 +10492 clk cpu0 IT (10456) 00011198:000010011198_NS 910683ff O EL1h_n : ADD sp,sp,#0x1a0 +10492 clk cpu0 R SP_EL1 00000000038007C0 +10493 clk cpu0 IT (10457) 0001119c:00001001119c_NS a8c17bfc O EL1h_n : LDP x28,x30,[sp],#0x10 +10493 clk cpu0 MR8 038007c0:0000108007c0_NS ff7fff7f_ff7fff7f +10493 clk cpu0 MR8 038007c8:0000108007c8_NS 00000000_0003d808 +10493 clk cpu0 R SP_EL1 00000000038007D0 +10493 clk cpu0 R X28 FF7FFF7FFF7FFF7F +10493 clk cpu0 R X30 000000000003D808 +10494 clk cpu0 IT (10458) 000111a0:0000100111a0_NS d65f03c0 O EL1h_n : RET +10494 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 INVAL 0x000010015800 +10494 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x00001003d800_NS +10495 clk cpu0 IT (10459) 0003d808:00001003d808_NS a8c13bed O EL1h_n : LDP x13,x14,[sp],#0x10 +10495 clk cpu0 MR8 038007d0:0000108007d0_NS 00000000_0a2e7473 +10495 clk cpu0 MR8 038007d8:0000108007d8_NS 00000000_2e747300 +10495 clk cpu0 R SP_EL1 00000000038007E0 +10495 clk cpu0 R X13 000000000A2E7473 +10495 clk cpu0 R X14 000000002E747300 +10496 clk cpu0 IT (10460) 0003d80c:00001003d80c_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +10496 clk cpu0 MR8 038007e0:0000108007e0_NS 7fff7fff_7fff7fff +10496 clk cpu0 MR8 038007e8:0000108007e8_NS 00000000_01000094 +10496 clk cpu0 R SP_EL1 00000000038007F0 +10496 clk cpu0 R X29 7FFF7FFF7FFF7FFF +10496 clk cpu0 R X30 0000000001000094 +10497 clk cpu0 IT (10461) 0003d810:00001003d810_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +10497 clk cpu0 MR8 038007f0:0000108007f0_NS 00000000_000a723c +10497 clk cpu0 MR8 038007f8:0000108007f8_NS 00000000_600003c0 +10497 clk cpu0 R SP_EL1 0000000003800800 +10497 clk cpu0 R X2 00000000000A723C +10497 clk cpu0 R X3 00000000600003C0 +10498 clk cpu0 IT (10462) 0003d814:00001003d814_NS d5184022 O EL1h_n : MSR ELR_EL1,x2 +10498 clk cpu0 R ELR_EL1 00000000:000a723c +10499 clk cpu0 IT (10463) 0003d818:00001003d818_NS d5184003 O EL1h_n : MSR SPSR_el1,x3 +10499 clk cpu0 R SPSR_EL1 00000000:600003c0 +10500 clk cpu0 IT (10464) 0003d81c:00001003d81c_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +10500 clk cpu0 MR8 03800800:000010800800_NS 00000000_00000000 +10500 clk cpu0 MR8 03800808:000010800808_NS 00000000_00300000 +10500 clk cpu0 R SP_EL1 0000000003800810 +10500 clk cpu0 R X2 0000000000000000 +10500 clk cpu0 R X3 0000000000300000 +10501 clk cpu0 IT (10465) 0003d820:00001003d820_NS d69f03e0 O EL1h_n : ERET +10501 clk cpu0 E 00000000 EL0t 00000019 CoreEvent_ModeChange +10501 clk cpu0 R cpsr 600003c0 +10501 clk cpu0 R PMBIDR_EL1 00000020 +10501 clk cpu0 R TRBIDR_EL1 000000000000002b +10501 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +10501 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +10502 clk cpu0 IT (10466) 000a723c:0000100a723c_NS d65f03c0 O EL0t_n : RET +10503 clk cpu0 IT (10467) 01000094 10000075 O EL0t_n : ADR x21,0x10000a0 +10503 clk cpu0 R X21 00000000010000A0 +10504 clk cpu0 IT (10468) 01000098 f94002b5 O EL0t_n : LDR x21,[x21,#0] +10504 clk cpu0 MR8 010000a0:0000010000a0_NS 00000000_02f00008 +10504 clk cpu0 R X21 0000000002F00008 +10505 clk cpu0 IT (10469) 0100009c 14000004 O EL0t_n : B 0x10000ac +10506 clk cpu0 IT (10470) 010000ac d2800020 O EL0t_n : MOV x0,#1 +10506 clk cpu0 R X0 0000000000000001 +10507 clk cpu0 IT (10471) 010000b0 97c26bf8 O EL0t_n : BL 0x9b090 +10507 clk cpu0 R X30 00000000010000B4 +10507 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0184 INVAL 0x0000100a7080_NS +10507 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0184 ALLOC 0x00001009b080_NS +10507 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c22 ALLOC 0x00001009b080_NS +10508 clk cpu0 IT (10472) 0009b090:00001009b090_NS a9bd5bf7 O EL0t_n : STP x23,x22,[sp,#-0x30]! +10508 clk cpu0 MW8 030458e0:0000008458e0_NS fffe0000_00003fff +10508 clk cpu0 MW8 030458e8:0000008458e8_NS ffffffff_fffe0003 +10508 clk cpu0 R SP_EL0 00000000030458E0 +10509 clk cpu0 IT (10473) 0009b094:00001009b094_NS a90153f5 O EL0t_n : STP x21,x20,[sp,#0x10] +10509 clk cpu0 MW8 030458f0:0000008458f0_NS 00000000_02f00008 +10509 clk cpu0 MW8 030458f8:0000008458f8_NS 001fffff_fffffffe +10510 clk cpu0 IT (10474) 0009b098:00001009b098_NS a9027bf3 O EL0t_n : STP x19,x30,[sp,#0x20] +10510 clk cpu0 MW8 03045900:000000845900_NS 18181818_18181818 +10510 clk cpu0 MW8 03045908:000000845908_NS 00000000_010000b4 +10511 clk cpu0 IT (10475) 0009b09c:00001009b09c_NS 2a0003f4 O EL0t_n : MOV w20,w0 +10511 clk cpu0 R X20 0000000000000001 +10512 clk cpu0 IT (10476) 0009b0a0:00001009b0a0_NS 94003070 O EL0t_n : BL 0xa7260 +10512 clk cpu0 R X30 000000000009B0A4 +10513 clk cpu0 IT (10477) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +10513 clk cpu0 R X0 0000000000000000 +10514 clk cpu0 IT (10478) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +10514 clk cpu0 R cpsr 600007c0 +10515 clk cpu0 IT (10479) 0009b0a4:00001009b0a4_NS 2a0003f5 O EL0t_n : MOV w21,w0 +10515 clk cpu0 R cpsr 600003c0 +10515 clk cpu0 R X21 0000000000000000 +10516 clk cpu0 IT (10480) 0009b0a8:00001009b0a8_NS 94003066 O EL0t_n : BL 0xa7240 +10516 clk cpu0 R X30 000000000009B0AC +10517 clk cpu0 IT (10481) 000a7240:0000100a7240_NS d53b4200 O EL0t_n : MRS x0,NZCV +10517 clk cpu0 R X0 0000000060000000 +10518 clk cpu0 IT (10482) 000a7244:0000100a7244_NS d65f03c0 O EL0t_n : RET +10519 clk cpu0 IT (10483) 0009b0ac:00001009b0ac_NS f0030b96 O EL0t_n : ADRP x22,0x620e0ac +10519 clk cpu0 R X22 000000000620E000 +10520 clk cpu0 IT (10484) 0009b0b0:00001009b0b0_NS 910002d6 O EL0t_n : ADD x22,x22,#0 +10520 clk cpu0 R X22 000000000620E000 +10521 clk cpu0 IT (10485) 0009b0b4:00001009b0b4_NS 52800308 O EL0t_n : MOV w8,#0x18 +10521 clk cpu0 R X8 0000000000000018 +10522 clk cpu0 IT (10486) 0009b0b8:00001009b0b8_NS 9ba85aa8 O EL0t_n : UMADDL x8,w21,w8,x22 +10522 clk cpu0 R X8 000000000620E000 +10523 clk cpu0 IT (10487) 0009b0bc:00001009b0bc_NS 91402108 O EL0t_n : ADD x8,x8,#8,LSL #12 +10523 clk cpu0 R X8 0000000006216000 +10523 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0187 ALLOC 0x00001009b0c0_NS +10523 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c33 ALLOC 0x00001009b0c0_NS +10524 clk cpu0 IT (10488) 0009b0c0:00001009b0c0_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +10524 clk cpu0 MR4 06216000:000015216000_NS 00000000 +10524 clk cpu0 R X9 0000000000000000 +10524 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 INVAL 0x0000502a2000_NS +10524 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 ALLOC 0x000015216000_NS +10525 clk cpu0 IT (10489) 0009b0c4:00001009b0c4_NS 2a0003f3 O EL0t_n : MOV w19,w0 +10525 clk cpu0 R X19 0000000060000000 +10526 clk cpu0 IT (10490) 0009b0c8:00001009b0c8_NS 11000529 O EL0t_n : ADD w9,w9,#1 +10526 clk cpu0 R X9 0000000000000001 +10527 clk cpu0 IT (10491) 0009b0cc:00001009b0cc_NS 6b14013f O EL0t_n : CMP w9,w20 +10527 clk cpu0 R cpsr 600003c0 +10528 clk cpu0 IS (10492) 0009b0d0:00001009b0d0_NS 54000101 O EL0t_n : B.NE 0x9b0f0 +10529 clk cpu0 IT (10493) 0009b0d4:00001009b0d4_NS 2a1503f5 O EL0t_n : MOV w21,w21 +10529 clk cpu0 R X21 0000000000000000 +10530 clk cpu0 IT (10494) 0009b0d8:00001009b0d8_NS 5280030a O EL0t_n : MOV w10,#0x18 +10530 clk cpu0 R X10 0000000000000018 +10531 clk cpu0 IT (10495) 0009b0dc:00001009b0dc_NS 9b0a5aaa O EL0t_n : MADD x10,x21,x10,x22 +10531 clk cpu0 R X10 000000000620E000 +10532 clk cpu0 IT (10496) 0009b0e0:00001009b0e0_NS 5290018b O EL0t_n : MOV w11,#0x800c +10532 clk cpu0 R X11 000000000000800C +10533 clk cpu0 IT (10497) 0009b0e4:00001009b0e4_NS 8b0b0157 O EL0t_n : ADD x23,x10,x11 +10533 clk cpu0 R X23 000000000621600C +10534 clk cpu0 IT (10498) 0009b0e8:00001009b0e8_NS b94002ea O EL0t_n : LDR w10,[x23,#0] +10534 clk cpu0 MR4 0621600c:00001521600c_NS 00000000 +10534 clk cpu0 R X10 0000000000000000 +10535 clk cpu0 IT (10499) 0009b0ec:00001009b0ec_NS 3400036a O EL0t_n : CBZ w10,0x9b158 +10535 clk cpu0 CACHE cpu.cpu0.l1icache LINE 018b ALLOC 0x00001009b140_NS +10535 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c50 ALLOC 0x00001009b140_NS +10536 clk cpu0 IT (10500) 0009b158:00001009b158_NS f0030bca O EL0t_n : ADRP x10,0x6216158 +10536 clk cpu0 R X10 0000000006216000 +10537 clk cpu0 IT (10501) 0009b15c:00001009b15c_NS b940f94a O EL0t_n : LDR w10,[x10,#0xf8] +10537 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +10537 clk cpu0 R X10 0000000000000003 +10538 clk cpu0 IT (10502) 0009b160:00001009b160_NS b9000109 O EL0t_n : STR w9,[x8,#0] +10538 clk cpu0 MW4 06216000:000015216000_NS 00000001 +10538 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 DIRTY 0x000015216000_NS +10538 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1800 CLEAN 0x000015216000_NS +10538 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1800 INVAL 0x000015216000_NS +10539 clk cpu0 IS (10503) 0009b164:00001009b164_NS 340000ea O EL0t_n : CBZ w10,0x9b180 +10540 clk cpu0 IT (10504) 0009b168:00001009b168_NS d0fffd81 O EL0t_n : ADRP x1,0x4d168 +10540 clk cpu0 R X1 000000000004D000 +10541 clk cpu0 IT (10505) 0009b16c:00001009b16c_NS 91001c21 O EL0t_n : ADD x1,x1,#7 +10541 clk cpu0 R X1 000000000004D007 +10542 clk cpu0 IT (10506) 0009b170:00001009b170_NS 52800020 O EL0t_n : MOV w0,#1 +10542 clk cpu0 R X0 0000000000000001 +10543 clk cpu0 IT (10507) 0009b174:00001009b174_NS 2a1503e2 O EL0t_n : MOV w2,w21 +10543 clk cpu0 R X2 0000000000000000 +10544 clk cpu0 IT (10508) 0009b178:00001009b178_NS 2a1403e3 O EL0t_n : MOV w3,w20 +10544 clk cpu0 R X3 0000000000000001 +10545 clk cpu0 IT (10509) 0009b17c:00001009b17c_NS 940004d4 O EL0t_n : BL 0x9c4cc +10545 clk cpu0 R X30 000000000009B180 +10546 clk cpu0 IT (10510) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +10546 clk cpu0 R SP_EL0 0000000003045850 +10547 clk cpu0 IT (10511) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +10547 clk cpu0 R X8 0000000006216000 +10548 clk cpu0 IT (10512) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +10548 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +10548 clk cpu0 R X8 0000000000000003 +10549 clk cpu0 IT (10513) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +10549 clk cpu0 MW8 030458c0:0000008458c0_NS 00000000_00000000 +10549 clk cpu0 MW8 030458c8:0000008458c8_NS 00000000_00000001 +10550 clk cpu0 IT (10514) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +10550 clk cpu0 MW8 030458d0:0000008458d0_NS 00000000_60000000 +10550 clk cpu0 MW8 030458d8:0000008458d8_NS 00000000_0009b180 +10551 clk cpu0 IT (10515) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +10551 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +10551 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000001 +10552 clk cpu0 IT (10516) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +10552 clk cpu0 R cpsr 200003c0 +10553 clk cpu0 IT (10517) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +10553 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +10553 clk cpu0 MW8 03045868:000000845868_NS 00000000_000fffe0 +10554 clk cpu0 IT (10518) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +10554 clk cpu0 MW8 03045870:000000845870_NS e7ffe7ff_e7ffe7ff +10554 clk cpu0 MW8 03045878:000000845878_NS 0001ffff_fe000000 +10555 clk cpu0 IT (10519) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +10555 clk cpu0 MW8 030458b0:0000008458b0_NS 00000000_00000000 +10555 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_00000000 +10556 clk cpu0 IT (10520) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +10556 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_00000000 +10556 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_00000000 +10557 clk cpu0 IS (10521) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +10558 clk cpu0 IT (10522) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +10558 clk cpu0 R X20 0000000003008000 +10559 clk cpu0 IT (10523) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +10559 clk cpu0 R X20 0000000003008528 +10560 clk cpu0 IT (10524) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +10560 clk cpu0 R X0 0000000003008528 +10561 clk cpu0 IT (10525) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +10561 clk cpu0 R X19 000000000004D007 +10562 clk cpu0 IT (10526) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +10562 clk cpu0 R X30 000000000009C510 +10563 clk cpu0 IT (10527) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +10563 clk cpu0 R X8 0000000006216000 +10564 clk cpu0 IT (10528) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +10564 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +10564 clk cpu0 R X8 0000000000000001 +10565 clk cpu0 IT (10529) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +10565 clk cpu0 R cpsr 800003c0 +10566 clk cpu0 IT (10530) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +10567 clk cpu0 IT (10531) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +10568 clk cpu0 IT (10532) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +10568 clk cpu0 R X9 0000000003045850 +10569 clk cpu0 IT (10533) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +10569 clk cpu0 R X8 00000000FFFFFFD0 +10570 clk cpu0 IT (10534) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +10570 clk cpu0 R X10 00000000030458E0 +10571 clk cpu0 IT (10535) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +10571 clk cpu0 R X9 0000000003045880 +10572 clk cpu0 IT (10536) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +10572 clk cpu0 R X0 0000000000000000 +10573 clk cpu0 IT (10537) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +10573 clk cpu0 R X1 0000000000000000 +10574 clk cpu0 IT (10538) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +10574 clk cpu0 R X2 0000000000000000 +10575 clk cpu0 IT (10539) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +10575 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_ffffffd0 +10576 clk cpu0 IT (10540) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +10576 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_030458e0 +10576 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_03045880 +10577 clk cpu0 IT (10541) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +10578 clk cpu0 IT (10542) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +10578 clk cpu0 MR8 030458a8:0000008458a8_NS 00000000_03045880 +10578 clk cpu0 MR8 030458b0:0000008458b0_NS 00000000_00000000 +10578 clk cpu0 R X8 0000000000000000 +10578 clk cpu0 R X10 0000000003045880 +10579 clk cpu0 IT (10543) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +10579 clk cpu0 MR8 030458a0:0000008458a0_NS 00000000_030458e0 +10579 clk cpu0 R X9 00000000030458E0 +10580 clk cpu0 IT (10544) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +10580 clk cpu0 MR8 030458b8:0000008458b8_NS 00000000_ffffffd0 +10580 clk cpu0 R X11 00000000FFFFFFD0 +10581 clk cpu0 IT (10545) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +10581 clk cpu0 R X21 0000000000000000 +10582 clk cpu0 IT (10546) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +10582 clk cpu0 R X1 0000000003045880 +10583 clk cpu0 IT (10547) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +10583 clk cpu0 R X0 000000000004D007 +10584 clk cpu0 IT (10548) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +10584 clk cpu0 MW8 03045888:000000845888_NS 00000000_03045880 +10584 clk cpu0 MW8 03045890:000000845890_NS 00000000_00000000 +10585 clk cpu0 IT (10549) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +10585 clk cpu0 MW8 03045880:000000845880_NS 00000000_030458e0 +10586 clk cpu0 IT (10550) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +10586 clk cpu0 MW8 03045898:000000845898_NS 00000000_ffffffd0 +10587 clk cpu0 IT (10551) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +10587 clk cpu0 R X30 000000000009C560 +10588 clk cpu0 IT (10552) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +10588 clk cpu0 R SP_EL0 00000000030457B0 +10589 clk cpu0 IT (10553) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +10589 clk cpu0 MW8 03045840:000000845840_NS 00000000_0004d007 +10589 clk cpu0 MW8 03045848:000000845848_NS 00000000_0009c560 +10590 clk cpu0 IT (10554) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +10590 clk cpu0 R X19 0000000003045880 +10591 clk cpu0 IT (10555) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +10591 clk cpu0 R X1 000000000004C000 +10592 clk cpu0 IT (10556) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +10592 clk cpu0 MW8 03045830:000000845830_NS 00000000_00000000 +10592 clk cpu0 MW8 03045838:000000845838_NS 00000000_03008528 +10593 clk cpu0 IT (10557) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +10593 clk cpu0 R X20 000000000004D007 +10594 clk cpu0 IT (10558) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +10594 clk cpu0 R X1 000000000004C00B +10595 clk cpu0 IT (10559) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +10595 clk cpu0 R X0 00000000030457B4 +10596 clk cpu0 IT (10560) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +10596 clk cpu0 R X2 000000000000003B +10597 clk cpu0 IT (10561) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +10597 clk cpu0 MW8 030457f0:0000008457f0_NS ff7fff7f_ff7fff7f +10598 clk cpu0 IT (10562) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +10598 clk cpu0 MW8 03045800:000000845800_NS 00010001_00010001 +10598 clk cpu0 MW8 03045808:000000845808_NS ffe000ff_ffe000ff +10599 clk cpu0 IT (10563) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +10599 clk cpu0 MW8 03045810:000000845810_NS 00000000_0000003c +10599 clk cpu0 MW8 03045818:000000845818_NS 00000000_00007c00 +10600 clk cpu0 IT (10564) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +10600 clk cpu0 MW8 03045820:000000845820_NS 00000000_0621600c +10600 clk cpu0 MW8 03045828:000000845828_NS 00000000_0620e000 +10601 clk cpu0 IT (10565) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +10601 clk cpu0 R X30 0000000000092B80 +10602 clk cpu0 IT (10566) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +10602 clk cpu0 MW8 030457a0:0000008457a0_NS 00000000_03045880 +10602 clk cpu0 MW8 030457a8:0000008457a8_NS 00000000_00092b80 +10602 clk cpu0 R SP_EL0 00000000030457A0 +10603 clk cpu0 IT (10567) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +10603 clk cpu0 R X19 00000000030457B4 +10604 clk cpu0 IT (10568) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +10604 clk cpu0 R X30 00000000000104DC +10605 clk cpu0 IT (10569) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +10605 clk cpu0 R cpsr 200003c0 +10606 clk cpu0 IS (10570) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +10607 clk cpu0 IT (10571) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +10607 clk cpu0 R cpsr 400003c0 +10608 clk cpu0 IT (10572) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +10609 clk cpu0 IT (10573) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +10609 clk cpu0 R cpsr 000003c0 +10609 clk cpu0 R X10 0000000000000003 +10610 clk cpu0 IS (10574) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +10611 clk cpu0 IT (10575) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +10611 clk cpu0 R X9 0000000000000020 +10612 clk cpu0 IT (10576) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +10612 clk cpu0 R X8 000000000004C008 +10613 clk cpu0 IT (10577) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +10613 clk cpu0 R cpsr 200003c0 +10614 clk cpu0 IT (10578) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +10614 clk cpu0 R X9 0000000000000008 +10615 clk cpu0 IS (10579) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +10616 clk cpu0 IT (10580) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +10616 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +10616 clk cpu0 R X12 000000000A00000A +10616 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 CLEAN 0x000016240000_NS +10616 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000016240000_NS +10616 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x00001004c000_NS +10616 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000a INVAL 0x0000704e0000_NS +10616 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000a ALLOC 0x000016240000_NS +10617 clk cpu0 IT (10581) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +10617 clk cpu0 R X10 0000000000000018 +10618 clk cpu0 IT (10582) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +10618 clk cpu0 R X11 000000000000003B +10619 clk cpu0 IT (10583) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10619 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +10619 clk cpu0 R X8 000000000004C00C +10619 clk cpu0 R X13 000000006F727245 +10620 clk cpu0 IT (10584) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10620 clk cpu0 R X12 000000000000000A +10621 clk cpu0 IT (10585) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10621 clk cpu0 R X11 0000000000000037 +10622 clk cpu0 IT (10586) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10622 clk cpu0 R cpsr 200003c0 +10623 clk cpu0 IT (10587) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10623 clk cpu0 R X14 0000000072724500 +10624 clk cpu0 IT (10588) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10624 clk cpu0 R X12 000000007272450A +10625 clk cpu0 IT (10589) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10625 clk cpu0 MW4 030457b4:0000008457b4_NS 7272450a +10625 clk cpu0 R X0 00000000030457B8 +10626 clk cpu0 IT (10590) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10626 clk cpu0 R X12 000000006F727245 +10627 clk cpu0 IT (10591) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10628 clk cpu0 IT (10592) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10628 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +10628 clk cpu0 R X8 000000000004C010 +10628 clk cpu0 R X13 0000000049203A72 +10629 clk cpu0 IT (10593) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10629 clk cpu0 R X12 000000000000006F +10630 clk cpu0 IT (10594) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10630 clk cpu0 R X11 0000000000000033 +10631 clk cpu0 IT (10595) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10631 clk cpu0 R cpsr 200003c0 +10632 clk cpu0 IT (10596) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10632 clk cpu0 R X14 00000000203A7200 +10633 clk cpu0 IT (10597) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10633 clk cpu0 R X12 00000000203A726F +10634 clk cpu0 IT (10598) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10634 clk cpu0 MW4 030457b8:0000008457b8_NS 203a726f +10634 clk cpu0 R X0 00000000030457BC +10635 clk cpu0 IT (10599) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10635 clk cpu0 R X12 0000000049203A72 +10636 clk cpu0 IT (10600) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10637 clk cpu0 IT (10601) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10637 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +10637 clk cpu0 R X8 000000000004C014 +10637 clk cpu0 R X13 0000000067656C6C +10638 clk cpu0 IT (10602) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10638 clk cpu0 R X12 0000000000000049 +10639 clk cpu0 IT (10603) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10639 clk cpu0 R X11 000000000000002F +10640 clk cpu0 IT (10604) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10640 clk cpu0 R cpsr 200003c0 +10641 clk cpu0 IT (10605) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10641 clk cpu0 R X14 00000000656C6C00 +10642 clk cpu0 IT (10606) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10642 clk cpu0 R X12 00000000656C6C49 +10643 clk cpu0 IT (10607) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10643 clk cpu0 MW4 030457bc:0000008457bc_NS 656c6c49 +10643 clk cpu0 R X0 00000000030457C0 +10644 clk cpu0 IT (10608) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10644 clk cpu0 R X12 0000000067656C6C +10645 clk cpu0 IT (10609) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10646 clk cpu0 IT (10610) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10646 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +10646 clk cpu0 R X8 000000000004C018 +10646 clk cpu0 R X13 0000000066206C61 +10647 clk cpu0 IT (10611) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10647 clk cpu0 R X12 0000000000000067 +10648 clk cpu0 IT (10612) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10648 clk cpu0 R X11 000000000000002B +10649 clk cpu0 IT (10613) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10649 clk cpu0 R cpsr 200003c0 +10650 clk cpu0 IT (10614) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10650 clk cpu0 R X14 00000000206C6100 +10651 clk cpu0 IT (10615) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10651 clk cpu0 R X12 00000000206C6167 +10652 clk cpu0 IT (10616) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10652 clk cpu0 MW4 030457c0:0000008457c0_NS 206c6167 +10652 clk cpu0 R X0 00000000030457C4 +10653 clk cpu0 IT (10617) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10653 clk cpu0 R X12 0000000066206C61 +10654 clk cpu0 IT (10618) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10655 clk cpu0 IT (10619) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10655 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +10655 clk cpu0 R X8 000000000004C01C +10655 clk cpu0 R X13 00000000616D726F +10656 clk cpu0 IT (10620) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10656 clk cpu0 R X12 0000000000000066 +10657 clk cpu0 IT (10621) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10657 clk cpu0 R X11 0000000000000027 +10658 clk cpu0 IT (10622) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10658 clk cpu0 R cpsr 200003c0 +10659 clk cpu0 IT (10623) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10659 clk cpu0 R X14 000000006D726F00 +10660 clk cpu0 IT (10624) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10660 clk cpu0 R X12 000000006D726F66 +10661 clk cpu0 IT (10625) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10661 clk cpu0 MW4 030457c4:0000008457c4_NS 6d726f66 +10661 clk cpu0 R X0 00000000030457C8 +10662 clk cpu0 IT (10626) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10662 clk cpu0 R X12 00000000616D726F +10663 clk cpu0 IT (10627) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10664 clk cpu0 IT (10628) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10664 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +10664 clk cpu0 R X8 000000000004C020 +10664 clk cpu0 R X13 0000000070732074 +10665 clk cpu0 IT (10629) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10665 clk cpu0 R X12 0000000000000061 +10666 clk cpu0 IT (10630) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10666 clk cpu0 R X11 0000000000000023 +10667 clk cpu0 IT (10631) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10667 clk cpu0 R cpsr 200003c0 +10668 clk cpu0 IT (10632) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10668 clk cpu0 R X14 0000000073207400 +10669 clk cpu0 IT (10633) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10669 clk cpu0 R X12 0000000073207461 +10670 clk cpu0 IT (10634) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10670 clk cpu0 MW4 030457c8:0000008457c8_NS 73207461 +10670 clk cpu0 R X0 00000000030457CC +10671 clk cpu0 IT (10635) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10671 clk cpu0 R X12 0000000070732074 +10672 clk cpu0 IT (10636) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10673 clk cpu0 IT (10637) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10673 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +10673 clk cpu0 R X8 000000000004C024 +10673 clk cpu0 R X13 0000000066696365 +10674 clk cpu0 IT (10638) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10674 clk cpu0 R X12 0000000000000070 +10675 clk cpu0 IT (10639) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10675 clk cpu0 R X11 000000000000001F +10676 clk cpu0 IT (10640) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10676 clk cpu0 R cpsr 200003c0 +10677 clk cpu0 IT (10641) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10677 clk cpu0 R X14 0000000069636500 +10678 clk cpu0 IT (10642) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10678 clk cpu0 R X12 0000000069636570 +10679 clk cpu0 IT (10643) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10679 clk cpu0 MW4 030457cc:0000008457cc_NS 69636570 +10679 clk cpu0 R X0 00000000030457D0 +10680 clk cpu0 IT (10644) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10680 clk cpu0 R X12 0000000066696365 +10681 clk cpu0 IT (10645) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10682 clk cpu0 IT (10646) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10682 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +10682 clk cpu0 R X8 000000000004C028 +10682 clk cpu0 R X13 0000000020726569 +10683 clk cpu0 IT (10647) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10683 clk cpu0 R X12 0000000000000066 +10684 clk cpu0 IT (10648) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10684 clk cpu0 R X11 000000000000001B +10685 clk cpu0 IT (10649) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10685 clk cpu0 R cpsr 200003c0 +10686 clk cpu0 IT (10650) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10686 clk cpu0 R X14 0000000072656900 +10687 clk cpu0 IT (10651) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10687 clk cpu0 R X12 0000000072656966 +10688 clk cpu0 IT (10652) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10688 clk cpu0 MW4 030457d0:0000008457d0_NS 72656966 +10688 clk cpu0 R X0 00000000030457D4 +10689 clk cpu0 IT (10653) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10689 clk cpu0 R X12 0000000020726569 +10690 clk cpu0 IT (10654) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10691 clk cpu0 IT (10655) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10691 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +10691 clk cpu0 R X8 000000000004C02C +10691 clk cpu0 R X13 0000000064657375 +10692 clk cpu0 IT (10656) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10692 clk cpu0 R X12 0000000000000020 +10693 clk cpu0 IT (10657) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10693 clk cpu0 R X11 0000000000000017 +10694 clk cpu0 IT (10658) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10694 clk cpu0 R cpsr 200003c0 +10695 clk cpu0 IT (10659) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10695 clk cpu0 R X14 0000000065737500 +10696 clk cpu0 IT (10660) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10696 clk cpu0 R X12 0000000065737520 +10697 clk cpu0 IT (10661) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10697 clk cpu0 MW4 030457d4:0000008457d4_NS 65737520 +10697 clk cpu0 R X0 00000000030457D8 +10698 clk cpu0 IT (10662) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10698 clk cpu0 R X12 0000000064657375 +10699 clk cpu0 IT (10663) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10700 clk cpu0 IT (10664) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10700 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +10700 clk cpu0 R X8 000000000004C030 +10700 clk cpu0 R X13 000000005F27203A +10701 clk cpu0 IT (10665) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10701 clk cpu0 R X12 0000000000000064 +10702 clk cpu0 IT (10666) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10702 clk cpu0 R X11 0000000000000013 +10703 clk cpu0 IT (10667) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10703 clk cpu0 R cpsr 200003c0 +10704 clk cpu0 IT (10668) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10704 clk cpu0 R X14 0000000027203A00 +10705 clk cpu0 IT (10669) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10705 clk cpu0 R X12 0000000027203A64 +10706 clk cpu0 IT (10670) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10706 clk cpu0 MW4 030457d8:0000008457d8_NS 27203a64 +10706 clk cpu0 R X0 00000000030457DC +10707 clk cpu0 IT (10671) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10707 clk cpu0 R X12 000000005F27203A +10708 clk cpu0 IT (10672) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10709 clk cpu0 IT (10673) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10709 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +10709 clk cpu0 R X8 000000000004C034 +10709 clk cpu0 R X13 0000000045202E27 +10710 clk cpu0 IT (10674) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10710 clk cpu0 R X12 000000000000005F +10711 clk cpu0 IT (10675) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10711 clk cpu0 R X11 000000000000000F +10712 clk cpu0 IT (10676) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10712 clk cpu0 R cpsr 200003c0 +10713 clk cpu0 IT (10677) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10713 clk cpu0 R X14 00000000202E2700 +10714 clk cpu0 IT (10678) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10714 clk cpu0 R X12 00000000202E275F +10715 clk cpu0 IT (10679) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10715 clk cpu0 MW4 030457dc:0000008457dc_NS 202e275f +10715 clk cpu0 R X0 00000000030457E0 +10716 clk cpu0 IT (10680) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10716 clk cpu0 R X12 0000000045202E27 +10717 clk cpu0 IT (10681) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10718 clk cpu0 IT (10682) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10718 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +10718 clk cpu0 R X8 000000000004C038 +10718 clk cpu0 R X13 000000006E69646E +10719 clk cpu0 IT (10683) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10719 clk cpu0 R X12 0000000000000045 +10720 clk cpu0 IT (10684) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10720 clk cpu0 R X11 000000000000000B +10721 clk cpu0 IT (10685) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10721 clk cpu0 R cpsr 200003c0 +10722 clk cpu0 IT (10686) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10722 clk cpu0 R X14 0000000069646E00 +10723 clk cpu0 IT (10687) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10723 clk cpu0 R X12 0000000069646E45 +10724 clk cpu0 IT (10688) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10724 clk cpu0 MW4 030457e0:0000008457e0_NS 69646e45 +10724 clk cpu0 R X0 00000000030457E4 +10725 clk cpu0 IT (10689) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10725 clk cpu0 R X12 000000006E69646E +10726 clk cpu0 IT (10690) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10727 clk cpu0 IT (10691) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10727 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +10727 clk cpu0 R X8 000000000004C03C +10727 clk cpu0 R X13 0000000065542067 +10728 clk cpu0 IT (10692) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10728 clk cpu0 R X12 000000000000006E +10729 clk cpu0 IT (10693) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10729 clk cpu0 R X11 0000000000000007 +10730 clk cpu0 IT (10694) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10730 clk cpu0 R cpsr 200003c0 +10731 clk cpu0 IT (10695) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10731 clk cpu0 R X14 0000000054206700 +10732 clk cpu0 IT (10696) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10732 clk cpu0 R X12 000000005420676E +10733 clk cpu0 IT (10697) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10733 clk cpu0 MW4 030457e4:0000008457e4_NS 5420676e +10733 clk cpu0 R X0 00000000030457E8 +10734 clk cpu0 IT (10698) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10734 clk cpu0 R X12 0000000065542067 +10735 clk cpu0 IT (10699) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10736 clk cpu0 IT (10700) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +10736 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +10736 clk cpu0 R X8 000000000004C040 +10736 clk cpu0 R X13 000000000A2E7473 +10737 clk cpu0 IT (10701) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +10737 clk cpu0 R X12 0000000000000065 +10738 clk cpu0 IT (10702) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +10738 clk cpu0 R X11 0000000000000003 +10739 clk cpu0 IT (10703) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +10739 clk cpu0 R cpsr 600003c0 +10740 clk cpu0 IT (10704) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +10740 clk cpu0 R X14 000000002E747300 +10741 clk cpu0 IT (10705) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +10741 clk cpu0 R X12 000000002E747365 +10742 clk cpu0 IT (10706) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +10742 clk cpu0 MW4 030457e8:0000008457e8_NS 2e747365 +10742 clk cpu0 R X0 00000000030457EC +10743 clk cpu0 IT (10707) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +10743 clk cpu0 R X12 000000000A2E7473 +10744 clk cpu0 IS (10708) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +10745 clk cpu0 IT (10709) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +10745 clk cpu0 R X2 0000000000000003 +10746 clk cpu0 IT (10710) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +10746 clk cpu0 R X9 0000000000000001 +10747 clk cpu0 IT (10711) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +10747 clk cpu0 R X8 000000000004C03F +10748 clk cpu0 IT (10712) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +10748 clk cpu0 R X1 000000000004C043 +10749 clk cpu0 IT (10713) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +10749 clk cpu0 R cpsr 200003c0 +10750 clk cpu0 IS (10714) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +10751 clk cpu0 IT (10715) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +10751 clk cpu0 MR1 0004c043:00001004c043_NS 0a +10751 clk cpu0 R X8 000000000000000A +10752 clk cpu0 IT (10716) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +10752 clk cpu0 MW1 030457ec:0000008457ec_NS 0a +10753 clk cpu0 IS (10717) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +10754 clk cpu0 IT (10718) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +10754 clk cpu0 MR1 0004c044:00001004c044_NS 00 +10754 clk cpu0 R X8 0000000000000000 +10755 clk cpu0 IT (10719) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +10755 clk cpu0 R cpsr 600003c0 +10756 clk cpu0 IT (10720) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +10756 clk cpu0 MW1 030457ed:0000008457ed_NS 00 +10757 clk cpu0 IS (10721) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +10758 clk cpu0 IT (10722) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +10758 clk cpu0 MR1 0004c045:00001004c045_NS 00 +10758 clk cpu0 R X8 0000000000000000 +10759 clk cpu0 IT (10723) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +10759 clk cpu0 MW1 030457ee:0000008457ee_NS 00 +10760 clk cpu0 IT (10724) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +10761 clk cpu0 IT (10725) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +10761 clk cpu0 R X0 00000000030457B4 +10762 clk cpu0 IT (10726) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +10762 clk cpu0 MR8 030457a0:0000008457a0_NS 00000000_03045880 +10762 clk cpu0 MR8 030457a8:0000008457a8_NS 00000000_00092b80 +10762 clk cpu0 R SP_EL0 00000000030457B0 +10762 clk cpu0 R X19 0000000003045880 +10762 clk cpu0 R X30 0000000000092B80 +10763 clk cpu0 IT (10727) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +10764 clk cpu0 IT (10728) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +10764 clk cpu0 R X22 000000000004C000 +10765 clk cpu0 IT (10729) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +10765 clk cpu0 R X23 000000000004C000 +10766 clk cpu0 IT (10730) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +10766 clk cpu0 R X26 0000000000000000 +10767 clk cpu0 IT (10731) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +10767 clk cpu0 R X21 0000000003029000 +10768 clk cpu0 IT (10732) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +10768 clk cpu0 R X22 000000000004C108 +10769 clk cpu0 IT (10733) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +10769 clk cpu0 R X23 000000000004C129 +10770 clk cpu0 IT (10734) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +10770 clk cpu0 R X24 0000000003041000 +10771 clk cpu0 IT (10735) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +10771 clk cpu0 R X25 0000000006216000 +10772 clk cpu0 IT (10736) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +10773 clk cpu0 IT (10737) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +10773 clk cpu0 MR1 0004d007:00001004d007_NS 3e +10773 clk cpu0 R X8 000000000000003E +10773 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0080 ALLOC 0x00001004d000_NS +10773 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1400 ALLOC 0x00001004d000_NS +10774 clk cpu0 IT (10738) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +10774 clk cpu0 R cpsr 200003c0 +10775 clk cpu0 IS (10739) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +10776 clk cpu0 IS (10740) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +10777 clk cpu0 IT (10741) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +10777 clk cpu0 R cpsr 000003c0 +10778 clk cpu0 IT (10742) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +10779 clk cpu0 IT (10743) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10779 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10779 clk cpu0 R X9 0000000013000000 +10780 clk cpu0 IT (10744) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +10780 clk cpu0 R X27 000000000004D007 +10781 clk cpu0 IT (10745) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +10781 clk cpu0 R X20 000000000004D008 +10782 clk cpu0 IT (10746) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +10782 clk cpu0 MW1 13000000:000013000000_NS 3e +10783 clk cpu0 IT (10747) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +10783 clk cpu0 MR1 0004d008:00001004d008_NS 3e +10783 clk cpu0 R X8 000000000000003E +10784 clk cpu0 IT (10748) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +10784 clk cpu0 R cpsr 200003c0 +10785 clk cpu0 IS (10749) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +10786 clk cpu0 IS (10750) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +10787 clk cpu0 IT (10751) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +10787 clk cpu0 R cpsr 400003c0 +10788 clk cpu0 IS (10752) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +10789 clk cpu0 IT (10753) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +10789 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +10789 clk cpu0 R X8 0000000000000000 +10790 clk cpu0 IT (10754) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +10790 clk cpu0 MR8 0004d008:00001004d008_NS 203a7825_5550433e +10790 clk cpu0 R X0 203A78255550433E +10791 clk cpu0 IT (10755) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +10791 clk cpu0 R cpsr 800003c0 +10792 clk cpu0 IT (10756) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +10793 clk cpu0 IT (10757) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +10793 clk cpu0 R X27 0000000000000000 +10794 clk cpu0 IT (10758) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +10794 clk cpu0 R X28 000000000004D008 +10795 clk cpu0 IT (10759) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +10795 clk cpu0 R X8 00000000FFFFFFF8 +10796 clk cpu0 IT (10760) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10796 clk cpu0 R cpsr 000003c0 +10796 clk cpu0 R X9 000000000000003E +10797 clk cpu0 IS (10761) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10798 clk cpu0 IT (10762) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10798 clk cpu0 R cpsr 200003c0 +10799 clk cpu0 IS (10763) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10800 clk cpu0 IT (10764) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10800 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10800 clk cpu0 R X9 0000000013000000 +10801 clk cpu0 IT (10765) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10801 clk cpu0 R cpsr 800003c0 +10801 clk cpu0 R X8 00000000FFFFFFF9 +10802 clk cpu0 IT (10766) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10802 clk cpu0 MW1 13000000:000013000000_NS 3e +10803 clk cpu0 IT (10767) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10803 clk cpu0 R X0 00203A7825555043 +10804 clk cpu0 IT (10768) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10805 clk cpu0 IT (10769) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10805 clk cpu0 R cpsr 000003c0 +10805 clk cpu0 R X9 0000000000000043 +10806 clk cpu0 IS (10770) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10807 clk cpu0 IT (10771) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10807 clk cpu0 R cpsr 200003c0 +10808 clk cpu0 IS (10772) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10809 clk cpu0 IT (10773) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10809 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10809 clk cpu0 R X9 0000000013000000 +10810 clk cpu0 IT (10774) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10810 clk cpu0 R cpsr 800003c0 +10810 clk cpu0 R X8 00000000FFFFFFFA +10811 clk cpu0 IT (10775) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10811 clk cpu0 MW1 13000000:000013000000_NS 43 +10812 clk cpu0 IT (10776) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10812 clk cpu0 R X0 0000203A78255550 +10813 clk cpu0 IT (10777) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10814 clk cpu0 IT (10778) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10814 clk cpu0 R cpsr 000003c0 +10814 clk cpu0 R X9 0000000000000050 +10815 clk cpu0 IS (10779) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10816 clk cpu0 IT (10780) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10816 clk cpu0 R cpsr 200003c0 +10817 clk cpu0 IS (10781) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10818 clk cpu0 IT (10782) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10818 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10818 clk cpu0 R X9 0000000013000000 +10819 clk cpu0 IT (10783) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10819 clk cpu0 R cpsr 800003c0 +10819 clk cpu0 R X8 00000000FFFFFFFB +10820 clk cpu0 IT (10784) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10820 clk cpu0 MW1 13000000:000013000000_NS 50 +10821 clk cpu0 IT (10785) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10821 clk cpu0 R X0 000000203A782555 +10822 clk cpu0 IT (10786) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10823 clk cpu0 IT (10787) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10823 clk cpu0 R cpsr 000003c0 +10823 clk cpu0 R X9 0000000000000055 +10824 clk cpu0 IS (10788) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10825 clk cpu0 IT (10789) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10825 clk cpu0 R cpsr 200003c0 +10826 clk cpu0 IS (10790) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10827 clk cpu0 IT (10791) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10827 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10827 clk cpu0 R X9 0000000013000000 +10828 clk cpu0 IT (10792) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10828 clk cpu0 R cpsr 800003c0 +10828 clk cpu0 R X8 00000000FFFFFFFC +10829 clk cpu0 IT (10793) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10829 clk cpu0 MW1 13000000:000013000000_NS 55 +10830 clk cpu0 IT (10794) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10830 clk cpu0 R X0 00000000203A7825 +10831 clk cpu0 IT (10795) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10832 clk cpu0 IT (10796) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10832 clk cpu0 R cpsr 000003c0 +10832 clk cpu0 R X9 0000000000000025 +10833 clk cpu0 IS (10797) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10834 clk cpu0 IT (10798) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10834 clk cpu0 R cpsr 600003c0 +10835 clk cpu0 IT (10799) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10836 clk cpu0 IT (10800) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +10836 clk cpu0 R X8 00000000FFFFFFFC +10837 clk cpu0 IT (10801) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +10837 clk cpu0 R X9 0000000000000003 +10838 clk cpu0 IT (10802) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +10838 clk cpu0 R X9 000000000004D00B +10839 clk cpu0 IT (10803) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +10839 clk cpu0 R cpsr 200003c0 +10840 clk cpu0 IT (10804) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +10840 clk cpu0 R X27 000000000004D00B +10841 clk cpu0 IT (10805) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +10841 clk cpu0 R X20 000000000004D00C +10842 clk cpu0 IT (10806) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +10843 clk cpu0 IT (10807) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +10843 clk cpu0 MR1 0004d00c:00001004d00c_NS 25 +10843 clk cpu0 R X8 0000000000000025 +10844 clk cpu0 IT (10808) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +10844 clk cpu0 R cpsr 600003c0 +10845 clk cpu0 IT (10809) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +10846 clk cpu0 IT (10810) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +10846 clk cpu0 MW4 03029734:000000829734_NS 00000000 +10847 clk cpu0 IT (10811) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +10847 clk cpu0 R X27 000000000004D00C +10848 clk cpu0 IT (10812) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +10848 clk cpu0 MR1 0004d00d:00001004d00d_NS 78 +10848 clk cpu0 R X27 000000000004D00D +10848 clk cpu0 R X28 0000000000000078 +10849 clk cpu0 IT (10813) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +10849 clk cpu0 R cpsr 200003c0 +10850 clk cpu0 IS (10814) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +10851 clk cpu0 IT (10815) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +10852 clk cpu0 IT (10816) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +10852 clk cpu0 R X8 0000000000000020 +10853 clk cpu0 IT (10817) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +10853 clk cpu0 R cpsr 600003c0 +10854 clk cpu0 IS (10818) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +10855 clk cpu0 IT (10819) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +10855 clk cpu0 R X9 0000000000092CE0 +10856 clk cpu0 IT (10820) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +10856 clk cpu0 MR1 0004c128:00001004c128_NS 00 +10856 clk cpu0 R X10 0000000000000000 +10857 clk cpu0 IT (10821) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +10857 clk cpu0 R X9 0000000000092CE0 +10858 clk cpu0 IT (10822) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +10858 clk cpu0 R cpsr 600007c0 +10859 clk cpu0 IT (10823) 00092ce0:000010092ce0_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +10859 clk cpu0 MR4 03045898:000000845898_NS ffffffd0 +10859 clk cpu0 R cpsr 600003c0 +10859 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +10860 clk cpu0 IS (10824) 00092ce4:000010092ce4_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92cf8 +10861 clk cpu0 IT (10825) 00092ce8:000010092ce8_NS 11002109 O EL0t_n : ADD w9,w8,#8 +10861 clk cpu0 R X9 00000000FFFFFFD8 +10862 clk cpu0 IT (10826) 00092cec:000010092cec_NS 7100013f O EL0t_n : CMP w9,#0 +10862 clk cpu0 R cpsr a00003c0 +10863 clk cpu0 IT (10827) 00092cf0:000010092cf0_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +10863 clk cpu0 MW4 03045898:000000845898_NS ffffffd8 +10864 clk cpu0 IT (10828) 00092cf4:000010092cf4_NS 54000cad O EL0t_n : B.LE 0x92e88 +10865 clk cpu0 IT (10829) 00092e88:000010092e88_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +10865 clk cpu0 MR8 03045888:000000845888_NS 00000000_03045880 +10865 clk cpu0 R X9 0000000003045880 +10866 clk cpu0 IT (10830) 00092e8c:000010092e8c_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +10866 clk cpu0 R X8 0000000003045850 +10867 clk cpu0 IT (10831) 00092e90:000010092e90_NS 17ffff9d O EL0t_n : B 0x92d04 +10868 clk cpu0 IT (10832) 00092d04:000010092d04_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +10868 clk cpu0 MR8 03045850:000000845850_NS 00000000_00000000 +10868 clk cpu0 R X0 0000000000000000 +10869 clk cpu0 IT (10833) 00092d08:000010092d08_NS 52800201 O EL0t_n : MOV w1,#0x10 +10869 clk cpu0 R X1 0000000000000010 +10870 clk cpu0 IT (10834) 00092d0c:000010092d0c_NS 94000a58 O EL0t_n : BL 0x9566c +10870 clk cpu0 R X30 0000000000092D10 +10871 clk cpu0 IT (10835) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +10871 clk cpu0 R SP_EL0 0000000003045790 +10872 clk cpu0 IT (10836) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +10872 clk cpu0 R X8 3030303030303030 +10873 clk cpu0 IT (10837) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +10873 clk cpu0 MW8 03045798:000000845798_NS 30303030_30303030 +10873 clk cpu0 MW8 030457a0:0000008457a0_NS 30303030_30303030 +10874 clk cpu0 IT (10838) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +10874 clk cpu0 MW4 030457a8:0000008457a8_NS 30303030 +10875 clk cpu0 IT (10839) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +10876 clk cpu0 IT (10840) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +10876 clk cpu0 R X11 0000000000000000 +10877 clk cpu0 IT (10841) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +10877 clk cpu0 R X8 0000000003029000 +10878 clk cpu0 IT (10842) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +10878 clk cpu0 MR4 03029734:000000829734_NS 00000000 +10878 clk cpu0 R X8 0000000000000000 +10879 clk cpu0 IT (10843) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +10879 clk cpu0 R cpsr 600003c0 +10880 clk cpu0 IT (10844) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +10880 clk cpu0 R X8 0000000000000000 +10881 clk cpu0 IT (10845) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +10881 clk cpu0 R cpsr 800003c0 +10882 clk cpu0 IT (10846) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +10883 clk cpu0 IT (10847) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +10883 clk cpu0 R X9 0000000003045798 +10884 clk cpu0 IT (10848) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +10884 clk cpu0 R X10 0000000006216000 +10885 clk cpu0 IT (10849) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +10885 clk cpu0 MR1 03045798:000000845798_NS 30 +10885 clk cpu0 R X8 0000000000000030 +10886 clk cpu0 IT (10850) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +10886 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10886 clk cpu0 R X9 0000000013000000 +10887 clk cpu0 IT (10851) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +10887 clk cpu0 MW1 13000000:000013000000_NS 30 +10888 clk cpu0 IT (10852) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +10888 clk cpu0 R SP_EL0 00000000030457B0 +10889 clk cpu0 IT (10853) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +10890 clk cpu0 IT (10854) 00092d10:000010092d10_NS 91000774 O EL0t_n : ADD x20,x27,#1 +10890 clk cpu0 R X20 000000000004D00E +10891 clk cpu0 IT (10855) 00092d14:000010092d14_NS 17ffffa8 O EL0t_n : B 0x92bb4 +10892 clk cpu0 IT (10856) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +10892 clk cpu0 MR1 0004d00e:00001004d00e_NS 3a +10892 clk cpu0 R X8 000000000000003A +10893 clk cpu0 IT (10857) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +10893 clk cpu0 R cpsr 200003c0 +10894 clk cpu0 IS (10858) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +10895 clk cpu0 IS (10859) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +10896 clk cpu0 IT (10860) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +10896 clk cpu0 R cpsr 000003c0 +10897 clk cpu0 IT (10861) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +10898 clk cpu0 IT (10862) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10898 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10898 clk cpu0 R X9 0000000013000000 +10899 clk cpu0 IT (10863) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +10899 clk cpu0 R X27 000000000004D00E +10900 clk cpu0 IT (10864) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +10900 clk cpu0 R X20 000000000004D00F +10901 clk cpu0 IT (10865) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +10901 clk cpu0 MW1 13000000:000013000000_NS 3a +10902 clk cpu0 IT (10866) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +10902 clk cpu0 MR1 0004d00f:00001004d00f_NS 20 +10902 clk cpu0 R X8 0000000000000020 +10903 clk cpu0 IT (10867) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +10903 clk cpu0 R cpsr 800003c0 +10904 clk cpu0 IS (10868) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +10905 clk cpu0 IS (10869) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +10906 clk cpu0 IT (10870) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +10906 clk cpu0 R cpsr 000003c0 +10907 clk cpu0 IT (10871) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +10908 clk cpu0 IT (10872) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10908 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10908 clk cpu0 R X9 0000000013000000 +10909 clk cpu0 IT (10873) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +10909 clk cpu0 R X27 000000000004D00F +10910 clk cpu0 IT (10874) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +10910 clk cpu0 R X20 000000000004D010 +10911 clk cpu0 IT (10875) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +10911 clk cpu0 MW1 13000000:000013000000_NS 20 +10912 clk cpu0 IT (10876) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +10912 clk cpu0 MR1 0004d010:00001004d010_NS 50 +10912 clk cpu0 R X8 0000000000000050 +10913 clk cpu0 IT (10877) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +10913 clk cpu0 R cpsr 200003c0 +10914 clk cpu0 IS (10878) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +10915 clk cpu0 IS (10879) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +10916 clk cpu0 IT (10880) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +10916 clk cpu0 R cpsr 400003c0 +10917 clk cpu0 IS (10881) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +10918 clk cpu0 IT (10882) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +10918 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +10918 clk cpu0 R X8 0000000000000000 +10919 clk cpu0 IT (10883) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +10919 clk cpu0 MR8 0004d010:00001004d010_NS 2064255f_54524150 +10919 clk cpu0 R X0 2064255F54524150 +10920 clk cpu0 IT (10884) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +10920 clk cpu0 R cpsr 800003c0 +10921 clk cpu0 IT (10885) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +10922 clk cpu0 IT (10886) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +10922 clk cpu0 R X27 0000000000000000 +10923 clk cpu0 IT (10887) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +10923 clk cpu0 R X28 000000000004D010 +10924 clk cpu0 IT (10888) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +10924 clk cpu0 R X8 00000000FFFFFFF8 +10925 clk cpu0 IT (10889) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10925 clk cpu0 R cpsr 000003c0 +10925 clk cpu0 R X9 0000000000000050 +10926 clk cpu0 IS (10890) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10927 clk cpu0 IT (10891) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10927 clk cpu0 R cpsr 200003c0 +10928 clk cpu0 IS (10892) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10929 clk cpu0 IT (10893) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10929 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10929 clk cpu0 R X9 0000000013000000 +10930 clk cpu0 IT (10894) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10930 clk cpu0 R cpsr 800003c0 +10930 clk cpu0 R X8 00000000FFFFFFF9 +10931 clk cpu0 IT (10895) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10931 clk cpu0 MW1 13000000:000013000000_NS 50 +10932 clk cpu0 IT (10896) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10932 clk cpu0 R X0 002064255F545241 +10933 clk cpu0 IT (10897) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10934 clk cpu0 IT (10898) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10934 clk cpu0 R cpsr 000003c0 +10934 clk cpu0 R X9 0000000000000041 +10935 clk cpu0 IS (10899) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10936 clk cpu0 IT (10900) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10936 clk cpu0 R cpsr 200003c0 +10937 clk cpu0 IS (10901) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10938 clk cpu0 IT (10902) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10938 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10938 clk cpu0 R X9 0000000013000000 +10939 clk cpu0 IT (10903) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10939 clk cpu0 R cpsr 800003c0 +10939 clk cpu0 R X8 00000000FFFFFFFA +10940 clk cpu0 IT (10904) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10940 clk cpu0 MW1 13000000:000013000000_NS 41 +10941 clk cpu0 IT (10905) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10941 clk cpu0 R X0 00002064255F5452 +10942 clk cpu0 IT (10906) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10943 clk cpu0 IT (10907) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10943 clk cpu0 R cpsr 000003c0 +10943 clk cpu0 R X9 0000000000000052 +10944 clk cpu0 IS (10908) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10945 clk cpu0 IT (10909) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10945 clk cpu0 R cpsr 200003c0 +10946 clk cpu0 IS (10910) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10947 clk cpu0 IT (10911) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10947 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10947 clk cpu0 R X9 0000000013000000 +10948 clk cpu0 IT (10912) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10948 clk cpu0 R cpsr 800003c0 +10948 clk cpu0 R X8 00000000FFFFFFFB +10949 clk cpu0 IT (10913) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10949 clk cpu0 MW1 13000000:000013000000_NS 52 +10950 clk cpu0 IT (10914) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10950 clk cpu0 R X0 0000002064255F54 +10951 clk cpu0 IT (10915) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10952 clk cpu0 IT (10916) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10952 clk cpu0 R cpsr 000003c0 +10952 clk cpu0 R X9 0000000000000054 +10953 clk cpu0 IS (10917) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10954 clk cpu0 IT (10918) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10954 clk cpu0 R cpsr 200003c0 +10955 clk cpu0 IS (10919) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10956 clk cpu0 IT (10920) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10956 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10956 clk cpu0 R X9 0000000013000000 +10957 clk cpu0 IT (10921) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10957 clk cpu0 R cpsr 800003c0 +10957 clk cpu0 R X8 00000000FFFFFFFC +10958 clk cpu0 IT (10922) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10958 clk cpu0 MW1 13000000:000013000000_NS 54 +10959 clk cpu0 IT (10923) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10959 clk cpu0 R X0 000000002064255F +10960 clk cpu0 IT (10924) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10961 clk cpu0 IT (10925) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10961 clk cpu0 R cpsr 000003c0 +10961 clk cpu0 R X9 000000000000005F +10962 clk cpu0 IS (10926) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10963 clk cpu0 IT (10927) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10963 clk cpu0 R cpsr 200003c0 +10964 clk cpu0 IS (10928) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10965 clk cpu0 IT (10929) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +10965 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +10965 clk cpu0 R X9 0000000013000000 +10966 clk cpu0 IT (10930) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +10966 clk cpu0 R cpsr 800003c0 +10966 clk cpu0 R X8 00000000FFFFFFFD +10967 clk cpu0 IT (10931) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +10967 clk cpu0 MW1 13000000:000013000000_NS 5f +10968 clk cpu0 IT (10932) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +10968 clk cpu0 R X0 0000000000206425 +10969 clk cpu0 IT (10933) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +10970 clk cpu0 IT (10934) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +10970 clk cpu0 R cpsr 000003c0 +10970 clk cpu0 R X9 0000000000000025 +10971 clk cpu0 IS (10935) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +10972 clk cpu0 IT (10936) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +10972 clk cpu0 R cpsr 600003c0 +10973 clk cpu0 IT (10937) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +10974 clk cpu0 IT (10938) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +10974 clk cpu0 R X8 00000000FFFFFFFD +10975 clk cpu0 IT (10939) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +10975 clk cpu0 R X9 0000000000000004 +10976 clk cpu0 IT (10940) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +10976 clk cpu0 R X9 000000000004D014 +10977 clk cpu0 IT (10941) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +10977 clk cpu0 R cpsr 200003c0 +10978 clk cpu0 IT (10942) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +10978 clk cpu0 R X27 000000000004D014 +10979 clk cpu0 IT (10943) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +10979 clk cpu0 R X20 000000000004D015 +10980 clk cpu0 IT (10944) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +10981 clk cpu0 IT (10945) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +10981 clk cpu0 MR1 0004d015:00001004d015_NS 25 +10981 clk cpu0 R X8 0000000000000025 +10982 clk cpu0 IT (10946) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +10982 clk cpu0 R cpsr 600003c0 +10983 clk cpu0 IT (10947) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +10984 clk cpu0 IT (10948) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +10984 clk cpu0 MW4 03029734:000000829734_NS 00000000 +10985 clk cpu0 IT (10949) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +10985 clk cpu0 R X27 000000000004D015 +10986 clk cpu0 IT (10950) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +10986 clk cpu0 MR1 0004d016:00001004d016_NS 64 +10986 clk cpu0 R X27 000000000004D016 +10986 clk cpu0 R X28 0000000000000064 +10987 clk cpu0 IT (10951) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +10987 clk cpu0 R cpsr 200003c0 +10988 clk cpu0 IS (10952) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +10989 clk cpu0 IT (10953) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +10990 clk cpu0 IT (10954) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +10990 clk cpu0 R X8 000000000000000C +10991 clk cpu0 IT (10955) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +10991 clk cpu0 R cpsr 800003c0 +10992 clk cpu0 IS (10956) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +10993 clk cpu0 IT (10957) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +10993 clk cpu0 R X9 0000000000092CE0 +10994 clk cpu0 IT (10958) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +10994 clk cpu0 MR1 0004c114:00001004c114_NS 0e +10994 clk cpu0 R X10 000000000000000E +10995 clk cpu0 IT (10959) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +10995 clk cpu0 R X9 0000000000092D18 +10996 clk cpu0 IT (10960) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +10996 clk cpu0 R cpsr 800007c0 +10997 clk cpu0 IT (10961) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +10997 clk cpu0 MR4 03045898:000000845898_NS ffffffd8 +10997 clk cpu0 R cpsr 800003c0 +10997 clk cpu0 R X8 FFFFFFFFFFFFFFD8 +10998 clk cpu0 IS (10962) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +10999 clk cpu0 IT (10963) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +10999 clk cpu0 R X9 00000000FFFFFFE0 +11000 clk cpu0 IT (10964) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +11000 clk cpu0 R cpsr a00003c0 +11001 clk cpu0 IT (10965) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +11001 clk cpu0 MW4 03045898:000000845898_NS ffffffe0 +11002 clk cpu0 IT (10966) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +11003 clk cpu0 IT (10967) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +11003 clk cpu0 MR8 03045888:000000845888_NS 00000000_03045880 +11003 clk cpu0 R X9 0000000003045880 +11004 clk cpu0 IT (10968) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +11004 clk cpu0 R X8 0000000003045858 +11005 clk cpu0 IT (10969) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +11006 clk cpu0 IT (10970) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +11006 clk cpu0 MR8 03045858:000000845858_NS 00000000_00000001 +11006 clk cpu0 R X0 0000000000000001 +11006 clk cpu0 CACHE cpu.cpu0.l1icache LINE 016a ALLOC 0x000010092d40_NS +11006 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0b50 ALLOC 0x000010092d40_NS +11007 clk cpu0 IT (10971) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +11007 clk cpu0 R X1 000000000000000A +11008 clk cpu0 IT (10972) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +11008 clk cpu0 R X30 0000000000092D48 +11009 clk cpu0 IT (10973) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +11009 clk cpu0 R SP_EL0 0000000003045790 +11010 clk cpu0 IT (10974) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +11010 clk cpu0 R X8 3030303030303030 +11011 clk cpu0 IT (10975) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +11011 clk cpu0 MW8 03045798:000000845798_NS 30303030_30303030 +11011 clk cpu0 MW8 030457a0:0000008457a0_NS 30303030_30303030 +11012 clk cpu0 IT (10976) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +11012 clk cpu0 MW4 030457a8:0000008457a8_NS 30303030 +11013 clk cpu0 IS (10977) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +11014 clk cpu0 IT (10978) 00095680:000010095680_NS aa1f03eb O EL0t_n : MOV x11,xzr +11014 clk cpu0 R X11 0000000000000000 +11015 clk cpu0 IT (10979) 00095684:000010095684_NS 2a0103e8 O EL0t_n : MOV w8,w1 +11015 clk cpu0 R X8 000000000000000A +11016 clk cpu0 IT (10980) 00095688:000010095688_NS 1103dc29 O EL0t_n : ADD w9,w1,#0xf7 +11016 clk cpu0 R X9 0000000000000101 +11017 clk cpu0 IT (10981) 0009568c:00001009568c_NS 910023ea O EL0t_n : ADD x10,sp,#8 +11017 clk cpu0 R X10 0000000003045798 +11018 clk cpu0 IT (10982) 00095690:000010095690_NS 9ac8080c O EL0t_n : UDIV x12,x0,x8 +11018 clk cpu0 R X12 0000000000000000 +11019 clk cpu0 IT (10983) 00095694:000010095694_NS 1b08818d O EL0t_n : MSUB w13,w12,w8,w0 +11019 clk cpu0 R X13 0000000000000001 +11020 clk cpu0 IT (10984) 00095698:000010095698_NS 710025bf O EL0t_n : CMP w13,#9 +11020 clk cpu0 R cpsr 800003c0 +11021 clk cpu0 IT (10985) 0009569c:00001009569c_NS 1a9f812e O EL0t_n : CSEL w14,w9,wzr,HI +11021 clk cpu0 R X14 0000000000000000 +11022 clk cpu0 IT (10986) 000956a0:0000100956a0_NS 0b0d01cd O EL0t_n : ADD w13,w14,w13 +11022 clk cpu0 R X13 0000000000000001 +11023 clk cpu0 IT (10987) 000956a4:0000100956a4_NS 1100c1ad O EL0t_n : ADD w13,w13,#0x30 +11023 clk cpu0 R X13 0000000000000031 +11024 clk cpu0 IT (10988) 000956a8:0000100956a8_NS eb08001f O EL0t_n : CMP x0,x8 +11024 clk cpu0 R cpsr 800003c0 +11025 clk cpu0 IT (10989) 000956ac:0000100956ac_NS 382b694d O EL0t_n : STRB w13,[x10,x11] +11025 clk cpu0 MW1 03045798:000000845798_NS 31 +11026 clk cpu0 IT (10990) 000956b0:0000100956b0_NS 9100056b O EL0t_n : ADD x11,x11,#1 +11026 clk cpu0 R X11 0000000000000001 +11027 clk cpu0 IT (10991) 000956b4:0000100956b4_NS aa0c03e0 O EL0t_n : MOV x0,x12 +11027 clk cpu0 R X0 0000000000000000 +11028 clk cpu0 IS (10992) 000956b8:0000100956b8_NS 54fffec2 O EL0t_n : B.CS 0x95690 +11029 clk cpu0 IT (10993) 000956bc:0000100956bc_NS 14000002 O EL0t_n : B 0x956c4 +11030 clk cpu0 IT (10994) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +11030 clk cpu0 R X8 0000000003029000 +11031 clk cpu0 IT (10995) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +11031 clk cpu0 MR4 03029734:000000829734_NS 00000000 +11031 clk cpu0 R X8 0000000000000000 +11032 clk cpu0 IT (10996) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +11032 clk cpu0 R cpsr 800003c0 +11033 clk cpu0 IT (10997) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +11033 clk cpu0 R X8 0000000000000001 +11034 clk cpu0 IT (10998) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +11034 clk cpu0 R cpsr 600003c0 +11035 clk cpu0 IS (10999) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +11036 clk cpu0 IT (11000) 000956dc:0000100956dc_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +11036 clk cpu0 R X9 0000000003045798 +11037 clk cpu0 IT (11001) 000956e0:0000100956e0_NS 93407d08 O EL0t_n : SXTW x8,w8 +11037 clk cpu0 R X8 0000000000000001 +11038 clk cpu0 IT (11002) 000956e4:0000100956e4_NS d1000529 O EL0t_n : SUB x9,x9,#1 +11038 clk cpu0 R X9 0000000003045797 +11039 clk cpu0 IT (11003) 000956e8:0000100956e8_NS b0030c0a O EL0t_n : ADRP x10,0x62166e8 +11039 clk cpu0 R X10 0000000006216000 +11040 clk cpu0 IT (11004) 000956ec:0000100956ec_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +11040 clk cpu0 MR1 03045798:000000845798_NS 31 +11040 clk cpu0 R X11 0000000000000031 +11041 clk cpu0 IT (11005) 000956f0:0000100956f0_NS f940714c O EL0t_n : LDR x12,[x10,#0xe0] +11041 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11041 clk cpu0 R X12 0000000013000000 +11042 clk cpu0 IT (11006) 000956f4:0000100956f4_NS d1000508 O EL0t_n : SUB x8,x8,#1 +11042 clk cpu0 R X8 0000000000000000 +11043 clk cpu0 IT (11007) 000956f8:0000100956f8_NS f100011f O EL0t_n : CMP x8,#0 +11043 clk cpu0 R cpsr 600003c0 +11044 clk cpu0 IT (11008) 000956fc:0000100956fc_NS 3900018b O EL0t_n : STRB w11,[x12,#0] +11044 clk cpu0 MW1 13000000:000013000000_NS 31 +11045 clk cpu0 IS (11009) 00095700:000010095700_NS 54ffff6c O EL0t_n : B.GT 0x956ec +11046 clk cpu0 IT (11010) 00095704:000010095704_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +11046 clk cpu0 R SP_EL0 00000000030457B0 +11047 clk cpu0 IT (11011) 00095708:000010095708_NS d65f03c0 O EL0t_n : RET +11048 clk cpu0 IT (11012) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +11048 clk cpu0 R X20 000000000004D017 +11049 clk cpu0 IT (11013) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +11050 clk cpu0 IT (11014) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11050 clk cpu0 MR1 0004d017:00001004d017_NS 20 +11050 clk cpu0 R X8 0000000000000020 +11051 clk cpu0 IT (11015) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11051 clk cpu0 R cpsr 800003c0 +11052 clk cpu0 IS (11016) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11053 clk cpu0 IS (11017) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11054 clk cpu0 IT (11018) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +11054 clk cpu0 R cpsr 000003c0 +11055 clk cpu0 IT (11019) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +11056 clk cpu0 IT (11020) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11056 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11056 clk cpu0 R X9 0000000013000000 +11057 clk cpu0 IT (11021) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +11057 clk cpu0 R X27 000000000004D017 +11058 clk cpu0 IT (11022) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +11058 clk cpu0 R X20 000000000004D018 +11059 clk cpu0 IT (11023) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +11059 clk cpu0 MW1 13000000:000013000000_NS 20 +11060 clk cpu0 IT (11024) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11060 clk cpu0 MR1 0004d018:00001004d018_NS 53 +11060 clk cpu0 R X8 0000000000000053 +11061 clk cpu0 IT (11025) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11061 clk cpu0 R cpsr 200003c0 +11062 clk cpu0 IS (11026) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11063 clk cpu0 IS (11027) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11064 clk cpu0 IT (11028) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +11064 clk cpu0 R cpsr 400003c0 +11065 clk cpu0 IS (11029) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +11066 clk cpu0 IT (11030) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +11066 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +11066 clk cpu0 R X8 0000000000000000 +11067 clk cpu0 IT (11031) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +11067 clk cpu0 MR8 0004d018:00001004d018_NS 4d000a54_52415453 +11067 clk cpu0 R X0 4D000A5452415453 +11068 clk cpu0 IT (11032) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +11068 clk cpu0 R cpsr 800003c0 +11069 clk cpu0 IT (11033) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +11070 clk cpu0 IT (11034) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +11070 clk cpu0 R X27 0000000000000000 +11071 clk cpu0 IT (11035) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +11071 clk cpu0 R X28 000000000004D018 +11072 clk cpu0 IT (11036) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +11072 clk cpu0 R X8 00000000FFFFFFF8 +11073 clk cpu0 IT (11037) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11073 clk cpu0 R cpsr 000003c0 +11073 clk cpu0 R X9 0000000000000053 +11074 clk cpu0 IS (11038) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11075 clk cpu0 IT (11039) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11075 clk cpu0 R cpsr 200003c0 +11076 clk cpu0 IS (11040) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11077 clk cpu0 IT (11041) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11077 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11077 clk cpu0 R X9 0000000013000000 +11078 clk cpu0 IT (11042) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11078 clk cpu0 R cpsr 800003c0 +11078 clk cpu0 R X8 00000000FFFFFFF9 +11079 clk cpu0 IT (11043) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11079 clk cpu0 MW1 13000000:000013000000_NS 53 +11080 clk cpu0 IT (11044) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11080 clk cpu0 R X0 004D000A54524154 +11081 clk cpu0 IT (11045) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11082 clk cpu0 IT (11046) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11082 clk cpu0 R cpsr 000003c0 +11082 clk cpu0 R X9 0000000000000054 +11083 clk cpu0 IS (11047) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11084 clk cpu0 IT (11048) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11084 clk cpu0 R cpsr 200003c0 +11085 clk cpu0 IS (11049) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11086 clk cpu0 IT (11050) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11086 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11086 clk cpu0 R X9 0000000013000000 +11087 clk cpu0 IT (11051) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11087 clk cpu0 R cpsr 800003c0 +11087 clk cpu0 R X8 00000000FFFFFFFA +11088 clk cpu0 IT (11052) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11088 clk cpu0 MW1 13000000:000013000000_NS 54 +11089 clk cpu0 IT (11053) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11089 clk cpu0 R X0 00004D000A545241 +11090 clk cpu0 IT (11054) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11091 clk cpu0 IT (11055) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11091 clk cpu0 R cpsr 000003c0 +11091 clk cpu0 R X9 0000000000000041 +11092 clk cpu0 IS (11056) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11093 clk cpu0 IT (11057) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11093 clk cpu0 R cpsr 200003c0 +11094 clk cpu0 IS (11058) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11095 clk cpu0 IT (11059) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11095 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11095 clk cpu0 R X9 0000000013000000 +11096 clk cpu0 IT (11060) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11096 clk cpu0 R cpsr 800003c0 +11096 clk cpu0 R X8 00000000FFFFFFFB +11097 clk cpu0 IT (11061) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11097 clk cpu0 MW1 13000000:000013000000_NS 41 +11098 clk cpu0 IT (11062) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11098 clk cpu0 R X0 0000004D000A5452 +11099 clk cpu0 IT (11063) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11100 clk cpu0 IT (11064) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11100 clk cpu0 R cpsr 000003c0 +11100 clk cpu0 R X9 0000000000000052 +11101 clk cpu0 IS (11065) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11102 clk cpu0 IT (11066) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11102 clk cpu0 R cpsr 200003c0 +11103 clk cpu0 IS (11067) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11104 clk cpu0 IT (11068) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11104 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11104 clk cpu0 R X9 0000000013000000 +11105 clk cpu0 IT (11069) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11105 clk cpu0 R cpsr 800003c0 +11105 clk cpu0 R X8 00000000FFFFFFFC +11106 clk cpu0 IT (11070) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11106 clk cpu0 MW1 13000000:000013000000_NS 52 +11107 clk cpu0 IT (11071) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11107 clk cpu0 R X0 000000004D000A54 +11108 clk cpu0 IT (11072) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11109 clk cpu0 IT (11073) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11109 clk cpu0 R cpsr 000003c0 +11109 clk cpu0 R X9 0000000000000054 +11110 clk cpu0 IS (11074) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11111 clk cpu0 IT (11075) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11111 clk cpu0 R cpsr 200003c0 +11112 clk cpu0 IS (11076) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11113 clk cpu0 IT (11077) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11113 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11113 clk cpu0 R X9 0000000013000000 +11114 clk cpu0 IT (11078) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11114 clk cpu0 R cpsr 800003c0 +11114 clk cpu0 R X8 00000000FFFFFFFD +11115 clk cpu0 IT (11079) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11115 clk cpu0 MW1 13000000:000013000000_NS 54 +11116 clk cpu0 IT (11080) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11116 clk cpu0 R X0 00000000004D000A +11117 clk cpu0 IT (11081) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11118 clk cpu0 IT (11082) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11118 clk cpu0 R cpsr 000003c0 +11118 clk cpu0 R X9 000000000000000A +11119 clk cpu0 IS (11083) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11120 clk cpu0 IT (11084) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11120 clk cpu0 R cpsr 800003c0 +11121 clk cpu0 IS (11085) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11122 clk cpu0 IT (11086) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11122 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11122 clk cpu0 R X9 0000000013000000 +11123 clk cpu0 IT (11087) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11123 clk cpu0 R cpsr 800003c0 +11123 clk cpu0 R X8 00000000FFFFFFFE +TUBE CPU0: >>CPU0: PART_1 START +11124 clk cpu0 IT (11088) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11124 clk cpu0 MW1 13000000:000013000000_NS 0a +11125 clk cpu0 IT (11089) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11125 clk cpu0 R X0 0000000000004D00 +11126 clk cpu0 IT (11090) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11127 clk cpu0 IT (11091) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11127 clk cpu0 R cpsr 400003c0 +11127 clk cpu0 R X9 0000000000000000 +11128 clk cpu0 IT (11092) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11129 clk cpu0 IT (11093) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +11129 clk cpu0 R X8 00000000FFFFFFFE +11130 clk cpu0 IT (11094) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +11130 clk cpu0 R X9 0000000000000005 +11131 clk cpu0 IT (11095) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +11131 clk cpu0 R X9 000000000004D01D +11132 clk cpu0 IT (11096) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +11132 clk cpu0 R cpsr 200003c0 +11133 clk cpu0 IT (11097) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +11133 clk cpu0 R X27 000000000004D01D +11134 clk cpu0 IT (11098) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +11134 clk cpu0 R X20 000000000004D01E +11135 clk cpu0 IT (11099) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +11136 clk cpu0 IT (11100) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11136 clk cpu0 MR1 0004d01e:00001004d01e_NS 00 +11136 clk cpu0 R X8 0000000000000000 +11137 clk cpu0 IT (11101) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11137 clk cpu0 R cpsr 800003c0 +11138 clk cpu0 IS (11102) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11139 clk cpu0 IT (11103) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11140 clk cpu0 IT (11104) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +11141 clk cpu0 IT (11105) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +11141 clk cpu0 MR8 03045840:000000845840_NS 00000000_0004d007 +11141 clk cpu0 MR8 03045848:000000845848_NS 00000000_0009c560 +11141 clk cpu0 R X19 000000000004D007 +11141 clk cpu0 R X30 000000000009C560 +11142 clk cpu0 IT (11106) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +11142 clk cpu0 MR8 03045830:000000845830_NS 00000000_00000000 +11142 clk cpu0 MR8 03045838:000000845838_NS 00000000_03008528 +11142 clk cpu0 R X20 0000000003008528 +11142 clk cpu0 R X21 0000000000000000 +11143 clk cpu0 IT (11107) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +11143 clk cpu0 MR8 03045820:000000845820_NS 00000000_0621600c +11143 clk cpu0 MR8 03045828:000000845828_NS 00000000_0620e000 +11143 clk cpu0 R X22 000000000620E000 +11143 clk cpu0 R X23 000000000621600C +11144 clk cpu0 IT (11108) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +11144 clk cpu0 MR8 03045810:000000845810_NS 00000000_0000003c +11144 clk cpu0 MR8 03045818:000000845818_NS 00000000_00007c00 +11144 clk cpu0 R X24 0000000000007C00 +11144 clk cpu0 R X25 000000000000003C +11145 clk cpu0 IT (11109) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +11145 clk cpu0 MR8 03045800:000000845800_NS 00010001_00010001 +11145 clk cpu0 MR8 03045808:000000845808_NS ffe000ff_ffe000ff +11145 clk cpu0 R X26 FFE000FFFFE000FF +11145 clk cpu0 R X27 0001000100010001 +11146 clk cpu0 IT (11110) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +11146 clk cpu0 MR8 030457f0:0000008457f0_NS ff7fff7f_ff7fff7f +11146 clk cpu0 R X28 FF7FFF7FFF7FFF7F +11147 clk cpu0 IT (11111) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +11147 clk cpu0 R SP_EL0 0000000003045850 +11148 clk cpu0 IT (11112) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +11149 clk cpu0 IT (11113) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +11149 clk cpu0 R X0 0000000000000001 +11150 clk cpu0 IT (11114) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +11150 clk cpu0 R X1 0000000000000000 +11151 clk cpu0 IT (11115) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +11151 clk cpu0 R X2 0000000000000000 +11152 clk cpu0 IT (11116) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +11153 clk cpu0 IT (11117) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +11154 clk cpu0 IT (11118) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +11154 clk cpu0 R X0 0000000003008528 +11155 clk cpu0 IT (11119) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +11155 clk cpu0 R X30 000000000009C57C +11156 clk cpu0 IT (11120) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +11157 clk cpu0 IT (11121) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +11157 clk cpu0 R X8 0000000006216000 +11158 clk cpu0 IT (11122) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +11158 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +11158 clk cpu0 R X8 0000000000000001 +11159 clk cpu0 IT (11123) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +11159 clk cpu0 R cpsr 800003c0 +11160 clk cpu0 IT (11124) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +11161 clk cpu0 IT (11125) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +11162 clk cpu0 IT (11126) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +11162 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_60000000 +11162 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_0009b180 +11162 clk cpu0 R X19 0000000060000000 +11162 clk cpu0 R X30 000000000009B180 +11163 clk cpu0 IT (11127) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +11163 clk cpu0 MR8 030458c0:0000008458c0_NS 00000000_00000000 +11163 clk cpu0 MR8 030458c8:0000008458c8_NS 00000000_00000001 +11163 clk cpu0 R X20 0000000000000001 +11163 clk cpu0 R X21 0000000000000000 +11164 clk cpu0 IT (11128) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +11164 clk cpu0 R SP_EL0 00000000030458E0 +11165 clk cpu0 IT (11129) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +11165 clk cpu0 CACHE cpu.cpu0.l1icache LINE 018c INVAL 0x0000100a7180 +11165 clk cpu0 CACHE cpu.cpu0.l1icache LINE 018c ALLOC 0x00001009b180_NS +11165 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c60 ALLOC 0x00001009b180_NS +11166 clk cpu0 IT (11130) 0009b180:00001009b180_NS 52800028 O EL0t_n : MOV w8,#1 +11166 clk cpu0 R X8 0000000000000001 +11167 clk cpu0 IT (11131) 0009b184:00001009b184_NS 52800309 O EL0t_n : MOV w9,#0x18 +11167 clk cpu0 R X9 0000000000000018 +11168 clk cpu0 IT (11132) 0009b188:00001009b188_NS 5290010a O EL0t_n : MOV w10,#0x8008 +11168 clk cpu0 R X10 0000000000008008 +11169 clk cpu0 IT (11133) 0009b18c:00001009b18c_NS 5280006b O EL0t_n : MOV w11,#3 +11169 clk cpu0 R X11 0000000000000003 +11170 clk cpu0 IT (11134) 0009b190:00001009b190_NS 5290008c O EL0t_n : MOV w12,#0x8004 +11170 clk cpu0 R X12 0000000000008004 +11171 clk cpu0 IT (11135) 0009b194:00001009b194_NS b90002e8 O EL0t_n : STR w8,[x23,#0] +11171 clk cpu0 MW4 0621600c:00001521600c_NS 00000001 +11172 clk cpu0 IT (11136) 0009b198:00001009b198_NS 9b095aa8 O EL0t_n : MADD x8,x21,x9,x22 +11172 clk cpu0 R X8 000000000620E000 +11173 clk cpu0 IT (11137) 0009b19c:00001009b19c_NS b82a690b O EL0t_n : STR w11,[x8,x10] +11173 clk cpu0 MW4 06216008:000015216008_NS 00000003 +11174 clk cpu0 IT (11138) 0009b1a0:00001009b1a0_NS b82c691f O EL0t_n : STR wzr,[x8,x12] +11174 clk cpu0 MW4 06216004:000015216004_NS 00000000 +11175 clk cpu0 IT (11139) 0009b1a4:00001009b1a4_NS 17ffffe0 O EL0t_n : B 0x9b124 +11175 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0188 ALLOC 0x00001009b100_NS +11175 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c40 ALLOC 0x00001009b100_NS +11176 clk cpu0 IT (11140) 0009b124:00001009b124_NS 90017b49 O EL0t_n : ADRP x9,0x3003124 +11176 clk cpu0 R X9 0000000003003000 +11177 clk cpu0 IT (11141) 0009b128:00001009b128_NS aa1f03e8 O EL0t_n : MOV x8,xzr +11177 clk cpu0 R X8 0000000000000000 +11178 clk cpu0 IT (11142) 0009b12c:00001009b12c_NS 91264129 O EL0t_n : ADD x9,x9,#0x990 +11178 clk cpu0 R X9 0000000003003990 +11179 clk cpu0 IT (11143) 0009b130:00001009b130_NS 528000ea O EL0t_n : MOV w10,#7 +11179 clk cpu0 R X10 0000000000000007 +11180 clk cpu0 IT (11144) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +11180 clk cpu0 MW4 03003990:000000803990_NS 00000007 +11180 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 01cd ALLOC 0x000000803980_NS +11180 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 01cd DIRTY 0x000000803980_NS +11180 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000803980_NS +11180 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000803980_NS +11181 clk cpu0 IT (11145) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +11181 clk cpu0 R X8 0000000000000004 +11182 clk cpu0 IT (11146) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +11182 clk cpu0 R cpsr 800003c0 +11183 clk cpu0 IT (11147) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +11184 clk cpu0 IT (11148) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +11184 clk cpu0 MW4 03003994:000000803994_NS 00000007 +11185 clk cpu0 IT (11149) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +11185 clk cpu0 R X8 0000000000000008 +11186 clk cpu0 IT (11150) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +11186 clk cpu0 R cpsr 800003c0 +11187 clk cpu0 IT (11151) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +11188 clk cpu0 IT (11152) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +11188 clk cpu0 MW4 03003998:000000803998_NS 00000007 +11189 clk cpu0 IT (11153) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +11189 clk cpu0 R X8 000000000000000C +11190 clk cpu0 IT (11154) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +11190 clk cpu0 R cpsr 800003c0 +11191 clk cpu0 IT (11155) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +11192 clk cpu0 IT (11156) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +11192 clk cpu0 MW4 0300399c:00000080399c_NS 00000007 +11193 clk cpu0 IT (11157) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +11193 clk cpu0 R X8 0000000000000010 +11194 clk cpu0 IT (11158) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +11194 clk cpu0 R cpsr 600003c0 +11195 clk cpu0 IS (11159) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +11196 clk cpu0 IT (11160) 0009b144:00001009b144_NS 2a1303e0 O EL0t_n : MOV w0,w19 +11196 clk cpu0 R X0 0000000060000000 +11197 clk cpu0 IT (11161) 0009b148:00001009b148_NS a9427bf3 O EL0t_n : LDP x19,x30,[sp,#0x20] +11197 clk cpu0 MR8 03045900:000000845900_NS 18181818_18181818 +11197 clk cpu0 MR8 03045908:000000845908_NS 00000000_010000b4 +11197 clk cpu0 R X19 1818181818181818 +11197 clk cpu0 R X30 00000000010000B4 +11198 clk cpu0 IT (11162) 0009b14c:00001009b14c_NS a94153f5 O EL0t_n : LDP x21,x20,[sp,#0x10] +11198 clk cpu0 MR8 030458f0:0000008458f0_NS 00000000_02f00008 +11198 clk cpu0 MR8 030458f8:0000008458f8_NS 001fffff_fffffffe +11198 clk cpu0 R X20 001FFFFFFFFFFFFE +11198 clk cpu0 R X21 0000000002F00008 +11199 clk cpu0 IT (11163) 0009b150:00001009b150_NS a8c35bf7 O EL0t_n : LDP x23,x22,[sp],#0x30 +11199 clk cpu0 MR8 030458e0:0000008458e0_NS fffe0000_00003fff +11199 clk cpu0 MR8 030458e8:0000008458e8_NS ffffffff_fffe0003 +11199 clk cpu0 R SP_EL0 0000000003045910 +11199 clk cpu0 R X22 FFFFFFFFFFFE0003 +11199 clk cpu0 R X23 FFFE000000003FFF +11200 clk cpu0 IT (11164) 0009b154:00001009b154_NS 1400303d O EL0t_n : B 0xa7248 +11201 clk cpu0 IT (11165) 000a7248:0000100a7248_NS d51b4200 O EL0t_n : MSR NZCV,x0 +11201 clk cpu0 R cpsr 600003c0 +11201 clk cpu0 R NZCV 00000000:60000000 +11202 clk cpu0 IT (11166) 000a724c:0000100a724c_NS d65f03c0 O EL0t_n : RET +11203 clk cpu0 IT (11167) 010000b4 10ffff75 O EL0t_n : ADR x21,0x10000a0 +11203 clk cpu0 R X21 00000000010000A0 +11204 clk cpu0 IT (11168) 010000b8 f94002b5 O EL0t_n : LDR x21,[x21,#0] +11204 clk cpu0 MR8 010000a0:0000010000a0_NS 00000000_02f00008 +11204 clk cpu0 R X21 0000000002F00008 +11205 clk cpu0 IT (11169) 010000bc d280000d O EL0t_n : MOV x13,#0 +11205 clk cpu0 R X13 0000000000000000 +11205 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0006 INVAL 0x00001009c0c0 +11205 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0006 ALLOC 0x0000010000c0_NS +11205 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0032 ALLOC 0x0000010000c0_NS +11206 clk cpu0 IT (11170) 010000c0 f2a0000d O EL0t_n : MOVK x13,#0,LSL #16 +11206 clk cpu0 R X13 0000000000000000 +11207 clk cpu0 IT (11171) 010000c4 f2c0000d O EL0t_n : MOVK x13,#0,LSL #32 +11207 clk cpu0 R X13 0000000000000000 +11208 clk cpu0 IT (11172) 010000c8 f2e0000d O EL0t_n : MOVK x13,#0,LSL #48 +11208 clk cpu0 R X13 0000000000000000 +11209 clk cpu0 IT (11173) 010000cc 8b0d02b5 O EL0t_n : ADD x21,x21,x13 +11209 clk cpu0 R X21 0000000002F00008 +11210 clk cpu0 IT (11174) 010000d0 d2800156 O EL0t_n : MOV x22,#0xa +11210 clk cpu0 R X22 000000000000000A +11211 clk cpu0 IT (11175) 010000d4 d3648ed6 O EL0t_n : LSL x22,x22,#28 +11211 clk cpu0 R X22 00000000A0000000 +11212 clk cpu0 IT (11176) 010000d8 d51b4216 O EL0t_n : MSR NZCV,x22 +11212 clk cpu0 R cpsr a00003c0 +11212 clk cpu0 R NZCV 00000000:a0000000 +11213 clk cpu0 IT (11177) 010000dc b20dabe0 O EL0t_n : ORR x0,xzr,#0x3ff83ff83ff83ff8 +11213 clk cpu0 R X0 3FF83FF83FF83FF8 +11214 clk cpu0 IT (11178) 010000e0 b202ebe1 O EL0t_n : ORR x1,xzr,#0xdddddddddddddddd +11214 clk cpu0 R X1 DDDDDDDDDDDDDDDD +11215 clk cpu0 IT (11179) 010000e4 b201e7e2 O EL0t_n : ORR x2,xzr,#0x9999999999999999 +11215 clk cpu0 R X2 9999999999999999 +11216 clk cpu0 IT (11180) 010000e8 b20913e3 O EL0t_n : ORR x3,xzr,#0xf8000000f800000 +11216 clk cpu0 R X3 0F8000000F800000 +11217 clk cpu0 IT (11181) 010000ec b26847e4 O EL0t_n : ORR x4,xzr,#0x3ffff000000 +11217 clk cpu0 R X4 000003FFFF000000 +11218 clk cpu0 IT (11182) 010000f0 b20797e5 O EL0t_n : ORR x5,xzr,#0x7e007e007e007e00 +11218 clk cpu0 R X5 7E007E007E007E00 +11219 clk cpu0 IT (11183) 010000f4 b262ebe6 O EL0t_n : ORR x6,xzr,#0xffffffffc1ffffff +11219 clk cpu0 R X6 FFFFFFFFC1FFFFFF +11220 clk cpu0 IT (11184) 010000f8 b206a7e7 O EL0t_n : ORR x7,xzr,#0xfc0ffc0ffc0ffc0f +11220 clk cpu0 R X7 FC0FFC0FFC0FFC0F +11221 clk cpu0 IT (11185) 010000fc b202dbe8 O EL0t_n : ORR x8,xzr,#0xdfdfdfdfdfdfdfdf +11221 clk cpu0 R X8 DFDFDFDFDFDFDFDF +11221 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0009 INVAL 0x000010038100_NS +11221 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0009 ALLOC 0x000001000100_NS +11221 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0045 ALLOC 0x000001000100_NS +11222 clk cpu0 IT (11186) 01000100 b253b7e9 O EL0t_n : ORR x9,xzr,#0xffffe00007ffffff +11222 clk cpu0 R X9 FFFFE00007FFFFFF +11223 clk cpu0 IT (11187) 01000104 b20257ea O EL0t_n : ORR x10,xzr,#0xc00fffffc00fffff +11223 clk cpu0 R X10 C00FFFFFC00FFFFF +11224 clk cpu0 IT (11188) 01000108 b202d7eb O EL0t_n : ORR x11,xzr,#0xcfcfcfcfcfcfcfcf +11224 clk cpu0 R X11 CFCFCFCFCFCFCFCF +11225 clk cpu0 IT (11189) 0100010c b202d3ec O EL0t_n : ORR x12,xzr,#0xc7c7c7c7c7c7c7c7 +11225 clk cpu0 R X12 C7C7C7C7C7C7C7C7 +11226 clk cpu0 IT (11190) 01000110 b2152fed O EL0t_n : ORR x13,xzr,#0x7ff800007ff800 +11226 clk cpu0 R X13 007FF800007FF800 +11227 clk cpu0 IT (11191) 01000114 b24ce3ee O EL0t_n : ORR x14,xzr,#0xfff01fffffffffff +11227 clk cpu0 R X14 FFF01FFFFFFFFFFF +11228 clk cpu0 IT (11192) 01000118 b27b37ef O EL0t_n : ORR x15,xzr,#0x7ffe0 +11228 clk cpu0 R X15 000000000007FFE0 +11229 clk cpu0 IT (11193) 0100011c b27dbbf0 O EL0t_n : ORR x16,xzr,#0x3fffffffffff8 +11229 clk cpu0 R X16 0003FFFFFFFFFFF8 +11230 clk cpu0 IT (11194) 01000120 b20a1bf1 O EL0t_n : ORR x17,xzr,#0x1fc000001fc00000 +11230 clk cpu0 R X17 1FC000001FC00000 +11231 clk cpu0 IT (11195) 01000124 b2566ff2 O EL0t_n : ORR x18,xzr,#0xfffffc000000003f +11231 clk cpu0 R X18 FFFFFC000000003F +11232 clk cpu0 IT (11196) 01000128 b276abf3 O EL0t_n : ORR x19,xzr,#0x1ffffffffffc00 +11232 clk cpu0 R X19 001FFFFFFFFFFC00 +11233 clk cpu0 IT (11197) 0100012c b20e2ff4 O EL0t_n : ORR x20,xzr,#0x3ffc00003ffc0000 +11233 clk cpu0 R X20 3FFC00003FFC0000 +11234 clk cpu0 IT (11198) 01000130 b26787fd O EL0t_n : ORR x29,xzr,#0x7fffffffe000000 +11234 clk cpu0 R X29 07FFFFFFFE000000 +11235 clk cpu0 IT (11199) 01000134 b20baffe O EL0t_n : ORR x30,xzr,#0xffe1ffe1ffe1ffe1 +11235 clk cpu0 R X30 FFE1FFE1FFE1FFE1 +11236 clk cpu0 IT (11200) 01000138 910003e7 O EL0t_n : MOV x7,sp +11236 clk cpu0 R X7 0000000003045910 +11237 clk cpu0 IT (11201) 0100013c 9100001f O EL0t_n : ADD sp,x0,#0 +11237 clk cpu0 R SP_EL0 3FF83FF83FF83FF8 +11237 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000b ALLOC 0x000001000140_NS +11237 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0054 ALLOC 0x000001000140_NS +11238 clk cpu0 IT (11202) 01000140 330b5daa O EL0t_n : BFI w10,w13,#21,#24 +11238 clk cpu0 R X10 00000000C00FEFFF +11239 clk cpu0 IT (11203) 01000144 d2800002 O EL0t_n : MOV x2,#0 +11239 clk cpu0 R X2 0000000000000000 +11240 clk cpu0 IT (11204) 01000148 f84086a4 O EL0t_n : LDR x4,[x21],#8 +11240 clk cpu0 TTW DTLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +11240 clk cpu0 TTW DTLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +11240 clk cpu0 TTW DTLB LPAE 1:2 000070450008 0000000070470003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070470000 +11240 clk cpu0 TTW DTLB LPAE 1:3 000070471e00 0000000011f00463 : BLOCK ATTRIDX=0 NS=1 AP=1 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000011f00000 +11240 clk cpu0 MR8 02f00008:000011f00008_NS 00000000_a0000000 +11240 clk cpu0 R X4 00000000A0000000 +11240 clk cpu0 R X21 0000000002F00010 +11240 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x02f00000_NS EL1_n vmid=0:0x0011f00000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +11240 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x02f00000_NS EL1_n vmid=0:0x0011f00000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070440000_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070250000_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x00001004c000_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070440000_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070250000_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070450000_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00f1 ALLOC 0x000070471e00_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000070450000_NS +11240 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000011f00000_NS +11240 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0780 ALLOC 0x000070471e00_NS +11240 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0003 INVAL 0x00002c190000 +11240 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0003 ALLOC 0x000011f00000_NS +11241 clk cpu0 IT (11205) 0100014c d53b421d O EL0t_n : MRS x29,NZCV +11241 clk cpu0 R X29 00000000A0000000 +11242 clk cpu0 IT (11206) 01000150 eb0403bf O EL0t_n : CMP x29,x4 +11242 clk cpu0 R cpsr 600003c0 +11243 clk cpu0 IT (11207) 01000154 9a9f07f7 O EL0t_n : CSET x23,NE +11243 clk cpu0 R X23 0000000000000000 +11244 clk cpu0 IT (11208) 01000158 aa170042 O EL0t_n : ORR x2,x2,x23 +11244 clk cpu0 R X2 0000000000000000 +11245 clk cpu0 IT (11209) 0100015c f84086a8 O EL0t_n : LDR x8,[x21],#8 +11245 clk cpu0 MR8 02f00010:000011f00010_NS 00000000_c00fefff +11245 clk cpu0 R X8 00000000C00FEFFF +11245 clk cpu0 R X21 0000000002F00018 +11246 clk cpu0 IT (11210) 01000160 eb0a011f O EL0t_n : CMP x8,x10 +11246 clk cpu0 R cpsr 600003c0 +11247 clk cpu0 IT (11211) 01000164 9a9f07ed O EL0t_n : CSET x13,NE +11247 clk cpu0 R X13 0000000000000000 +11248 clk cpu0 IT (11212) 01000168 aa0d0442 O EL0t_n : ORR x2,x2,x13,LSL #1 +11248 clk cpu0 R X2 0000000000000000 +11249 clk cpu0 IT (11213) 0100016c aa0203e0 O EL0t_n : MOV x0,x2 +11249 clk cpu0 R X0 0000000000000000 +11250 clk cpu0 IT (11214) 01000170 914000ff O EL0t_n : ADD sp,x7,#0,LSL #12 +11250 clk cpu0 R SP_EL0 0000000003045910 +11251 clk cpu0 IT (11215) 01000174 d2800001 O EL0t_n : MOV x1,#0 +11251 clk cpu0 R X1 0000000000000000 +11252 clk cpu0 IT (11216) 01000178 97c26c0c O EL0t_n : BL 0x9b1a8 +11252 clk cpu0 R X30 000000000100017C +11253 clk cpu0 IT (11217) 0009b1a8:00001009b1a8_NS a9bd5bf7 O EL0t_n : STP x23,x22,[sp,#-0x30]! +11253 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_00000000 +11253 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_a0000000 +11253 clk cpu0 R SP_EL0 00000000030458E0 +11254 clk cpu0 IT (11218) 0009b1ac:00001009b1ac_NS a90153f5 O EL0t_n : STP x21,x20,[sp,#0x10] +11254 clk cpu0 MW8 030458f0:0000008458f0_NS 00000000_02f00018 +11254 clk cpu0 MW8 030458f8:0000008458f8_NS 3ffc0000_3ffc0000 +11255 clk cpu0 IT (11219) 0009b1b0:00001009b1b0_NS a9027bf3 O EL0t_n : STP x19,x30,[sp,#0x20] +11255 clk cpu0 MW8 03045900:000000845900_NS 001fffff_fffffc00 +11255 clk cpu0 MW8 03045908:000000845908_NS 00000000_0100017c +11256 clk cpu0 IT (11220) 0009b1b4:00001009b1b4_NS aa0103f5 O EL0t_n : MOV x21,x1 +11256 clk cpu0 R X21 0000000000000000 +11257 clk cpu0 IT (11221) 0009b1b8:00001009b1b8_NS aa0003f4 O EL0t_n : MOV x20,x0 +11257 clk cpu0 R X20 0000000000000000 +11258 clk cpu0 IT (11222) 0009b1bc:00001009b1bc_NS 94003021 O EL0t_n : BL 0xa7240 +11258 clk cpu0 R X30 000000000009B1C0 +11259 clk cpu0 IT (11223) 000a7240:0000100a7240_NS d53b4200 O EL0t_n : MRS x0,NZCV +11259 clk cpu0 R X0 0000000060000000 +11260 clk cpu0 IT (11224) 000a7244:0000100a7244_NS d65f03c0 O EL0t_n : RET +11260 clk cpu0 CACHE cpu.cpu0.l1icache LINE 018e ALLOC 0x00001009b1c0_NS +11260 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c70 ALLOC 0x00001009b1c0_NS +11261 clk cpu0 IT (11225) 0009b1c0:00001009b1c0_NS 2a0003f3 O EL0t_n : MOV w19,w0 +11261 clk cpu0 R X19 0000000060000000 +11262 clk cpu0 IT (11226) 0009b1c4:00001009b1c4_NS 94003027 O EL0t_n : BL 0xa7260 +11262 clk cpu0 R X30 000000000009B1C8 +11263 clk cpu0 IT (11227) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +11263 clk cpu0 R X0 0000000000000000 +11264 clk cpu0 IT (11228) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +11264 clk cpu0 R cpsr 600007c0 +11265 clk cpu0 IT (11229) 0009b1c8:00001009b1c8_NS f0030b96 O EL0t_n : ADRP x22,0x620e1c8 +11265 clk cpu0 R cpsr 600003c0 +11265 clk cpu0 R X22 000000000620E000 +11266 clk cpu0 IT (11230) 0009b1cc:00001009b1cc_NS 910002d6 O EL0t_n : ADD x22,x22,#0 +11266 clk cpu0 R X22 000000000620E000 +11267 clk cpu0 IT (11231) 0009b1d0:00001009b1d0_NS 52800308 O EL0t_n : MOV w8,#0x18 +11267 clk cpu0 R X8 0000000000000018 +11268 clk cpu0 IT (11232) 0009b1d4:00001009b1d4_NS 9ba85808 O EL0t_n : UMADDL x8,w0,w8,x22 +11268 clk cpu0 R X8 000000000620E000 +11269 clk cpu0 IT (11233) 0009b1d8:00001009b1d8_NS 52900089 O EL0t_n : MOV w9,#0x8004 +11269 clk cpu0 R X9 0000000000008004 +11270 clk cpu0 IT (11234) 0009b1dc:00001009b1dc_NS b869690a O EL0t_n : LDR w10,[x8,x9] +11270 clk cpu0 MR4 06216004:000015216004_NS 00000000 +11270 clk cpu0 R X10 0000000000000000 +11271 clk cpu0 IT (11235) 0009b1e0:00001009b1e0_NS 2a0003f7 O EL0t_n : MOV w23,w0 +11271 clk cpu0 R X23 0000000000000000 +11272 clk cpu0 IT (11236) 0009b1e4:00001009b1e4_NS 11000542 O EL0t_n : ADD w2,w10,#1 +11272 clk cpu0 R X2 0000000000000001 +11273 clk cpu0 IT (11237) 0009b1e8:00001009b1e8_NS b8296902 O EL0t_n : STR w2,[x8,x9] +11273 clk cpu0 MW4 06216004:000015216004_NS 00000001 +11274 clk cpu0 IT (11238) 0009b1ec:00001009b1ec_NS b4000134 O EL0t_n : CBZ x20,0x9b210 +11274 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0190 INVAL 0x00001009f200 +11274 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0190 ALLOC 0x00001009b200_NS +11274 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c80 ALLOC 0x00001009b200_NS +11275 clk cpu0 IT (11239) 0009b210:00001009b210_NS 52800308 O EL0t_n : MOV w8,#0x18 +11275 clk cpu0 R X8 0000000000000018 +11276 clk cpu0 IT (11240) 0009b214:00001009b214_NS 9b085ae8 O EL0t_n : MADD x8,x23,x8,x22 +11276 clk cpu0 R X8 000000000620E000 +11277 clk cpu0 IT (11241) 0009b218:00001009b218_NS 52900109 O EL0t_n : MOV w9,#0x8008 +11277 clk cpu0 R X9 0000000000008008 +11278 clk cpu0 IT (11242) 0009b21c:00001009b21c_NS 8b090108 O EL0t_n : ADD x8,x8,x9 +11278 clk cpu0 R X8 0000000006216008 +11279 clk cpu0 IT (11243) 0009b220:00001009b220_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +11279 clk cpu0 MR4 06216008:000015216008_NS 00000003 +11279 clk cpu0 R X9 0000000000000003 +11280 clk cpu0 IS (11244) 0009b224:00001009b224_NS 34000249 O EL0t_n : CBZ w9,0x9b26c +11281 clk cpu0 IT (11245) 0009b228:00001009b228_NS 52800089 O EL0t_n : MOV w9,#4 +11281 clk cpu0 R X9 0000000000000004 +11282 clk cpu0 IT (11246) 0009b22c:00001009b22c_NS b9000109 O EL0t_n : STR w9,[x8,#0] +11282 clk cpu0 MW4 06216008:000015216008_NS 00000004 +11283 clk cpu0 IT (11247) 0009b230:00001009b230_NS 1400000f O EL0t_n : B 0x9b26c +11283 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0193 INVAL 0x00001009f240_NS +11283 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0193 ALLOC 0x00001009b240_NS +11283 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c90 ALLOC 0x00001009b240_NS +11284 clk cpu0 IT (11248) 0009b26c:00001009b26c_NS 2a1303e0 O EL0t_n : MOV w0,w19 +11284 clk cpu0 R X0 0000000060000000 +11285 clk cpu0 IT (11249) 0009b270:00001009b270_NS a9427bf3 O EL0t_n : LDP x19,x30,[sp,#0x20] +11285 clk cpu0 MR8 03045900:000000845900_NS 001fffff_fffffc00 +11285 clk cpu0 MR8 03045908:000000845908_NS 00000000_0100017c +11285 clk cpu0 R X19 001FFFFFFFFFFC00 +11285 clk cpu0 R X30 000000000100017C +11286 clk cpu0 IT (11250) 0009b274:00001009b274_NS a94153f5 O EL0t_n : LDP x21,x20,[sp,#0x10] +11286 clk cpu0 MR8 030458f0:0000008458f0_NS 00000000_02f00018 +11286 clk cpu0 MR8 030458f8:0000008458f8_NS 3ffc0000_3ffc0000 +11286 clk cpu0 R X20 3FFC00003FFC0000 +11286 clk cpu0 R X21 0000000002F00018 +11287 clk cpu0 IT (11251) 0009b278:00001009b278_NS a8c35bf7 O EL0t_n : LDP x23,x22,[sp],#0x30 +11287 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_00000000 +11287 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_a0000000 +11287 clk cpu0 R SP_EL0 0000000003045910 +11287 clk cpu0 R X22 00000000A0000000 +11287 clk cpu0 R X23 0000000000000000 +11288 clk cpu0 IT (11252) 0009b27c:00001009b27c_NS 14002ff3 O EL0t_n : B 0xa7248 +11289 clk cpu0 IT (11253) 000a7248:0000100a7248_NS d51b4200 O EL0t_n : MSR NZCV,x0 +11289 clk cpu0 R cpsr 600003c0 +11289 clk cpu0 R NZCV 00000000:60000000 +11290 clk cpu0 IT (11254) 000a724c:0000100a724c_NS d65f03c0 O EL0t_n : RET +11291 clk cpu0 IT (11255) 0100017c d2800020 O EL0t_n : MOV x0,#1 +11291 clk cpu0 R X0 0000000000000001 +11291 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000c INVAL 0x000010094180 +11291 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000c ALLOC 0x000001000180_NS +11291 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0062 ALLOC 0x000001000180_NS +11292 clk cpu0 IT (11256) 01000180 97c26af0 O EL0t_n : BL 0x9ad40 +11292 clk cpu0 R X30 0000000001000184 +11292 clk cpu0 CACHE cpu.cpu0.l1icache LINE 016b ALLOC 0x00001009ad40_NS +11292 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0b51 ALLOC 0x00001009ad40_NS +11293 clk cpu0 IT (11257) 0009ad40:00001009ad40_NS a9bb6bfb O EL0t_n : STP x27,x26,[sp,#-0x50]! +11293 clk cpu0 MW8 030458c0:0000008458c0_NS 00010001_00010001 +11293 clk cpu0 MW8 030458c8:0000008458c8_NS ffe000ff_ffe000ff +11293 clk cpu0 R SP_EL0 00000000030458C0 +11294 clk cpu0 IT (11258) 0009ad44:00001009ad44_NS a90163f9 O EL0t_n : STP x25,x24,[sp,#0x10] +11294 clk cpu0 MW8 030458d0:0000008458d0_NS 00000000_0000003c +11294 clk cpu0 MW8 030458d8:0000008458d8_NS 00000000_00007c00 +11295 clk cpu0 IT (11259) 0009ad48:00001009ad48_NS a9025bf7 O EL0t_n : STP x23,x22,[sp,#0x20] +11295 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_00000000 +11295 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_a0000000 +11296 clk cpu0 IT (11260) 0009ad4c:00001009ad4c_NS a90353f5 O EL0t_n : STP x21,x20,[sp,#0x30] +11296 clk cpu0 MW8 030458f0:0000008458f0_NS 00000000_02f00018 +11296 clk cpu0 MW8 030458f8:0000008458f8_NS 3ffc0000_3ffc0000 +11297 clk cpu0 IT (11261) 0009ad50:00001009ad50_NS a9047bf3 O EL0t_n : STP x19,x30,[sp,#0x40] +11297 clk cpu0 MW8 03045900:000000845900_NS 001fffff_fffffc00 +11297 clk cpu0 MW8 03045908:000000845908_NS 00000000_01000184 +11298 clk cpu0 IT (11262) 0009ad54:00001009ad54_NS 2a0003f5 O EL0t_n : MOV w21,w0 +11298 clk cpu0 R X21 0000000000000001 +11299 clk cpu0 IT (11263) 0009ad58:00001009ad58_NS 9400313a O EL0t_n : BL 0xa7240 +11299 clk cpu0 R X30 000000000009AD5C +11300 clk cpu0 IT (11264) 000a7240:0000100a7240_NS d53b4200 O EL0t_n : MRS x0,NZCV +11300 clk cpu0 R X0 0000000060000000 +11301 clk cpu0 IT (11265) 000a7244:0000100a7244_NS d65f03c0 O EL0t_n : RET +11302 clk cpu0 IT (11266) 0009ad5c:00001009ad5c_NS 2a0003f3 O EL0t_n : MOV w19,w0 +11302 clk cpu0 R X19 0000000060000000 +11303 clk cpu0 IT (11267) 0009ad60:00001009ad60_NS 94003140 O EL0t_n : BL 0xa7260 +11303 clk cpu0 R X30 000000000009AD64 +11304 clk cpu0 IT (11268) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +11304 clk cpu0 R X0 0000000000000000 +11305 clk cpu0 IT (11269) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +11305 clk cpu0 R cpsr 600007c0 +11306 clk cpu0 IT (11270) 0009ad64:00001009ad64_NS 90030bb8 O EL0t_n : ADRP x24,0x620ed64 +11306 clk cpu0 R cpsr 600003c0 +11306 clk cpu0 R X24 000000000620E000 +11307 clk cpu0 IT (11271) 0009ad68:00001009ad68_NS 91000318 O EL0t_n : ADD x24,x24,#0 +11307 clk cpu0 R X24 000000000620E000 +11308 clk cpu0 IT (11272) 0009ad6c:00001009ad6c_NS 52800308 O EL0t_n : MOV w8,#0x18 +11308 clk cpu0 R X8 0000000000000018 +11309 clk cpu0 IT (11273) 0009ad70:00001009ad70_NS 9ba86008 O EL0t_n : UMADDL x8,w0,w8,x24 +11309 clk cpu0 R X8 000000000620E000 +11310 clk cpu0 IT (11274) 0009ad74:00001009ad74_NS 52900009 O EL0t_n : MOV w9,#0x8000 +11310 clk cpu0 R X9 0000000000008000 +11311 clk cpu0 IT (11275) 0009ad78:00001009ad78_NS b8696908 O EL0t_n : LDR w8,[x8,x9] +11311 clk cpu0 MR4 06216000:000015216000_NS 00000001 +11311 clk cpu0 R X8 0000000000000001 +11312 clk cpu0 IT (11276) 0009ad7c:00001009ad7c_NS 6b15011f O EL0t_n : CMP w8,w21 +11312 clk cpu0 R cpsr 600003c0 +11312 clk cpu0 CACHE cpu.cpu0.l1icache LINE 016c ALLOC 0x00001009ad80_NS +11312 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0b60 ALLOC 0x00001009ad80_NS +11313 clk cpu0 IS (11277) 0009ad80:00001009ad80_NS 540003e1 O EL0t_n : B.NE 0x9adfc +11314 clk cpu0 IT (11278) 0009ad84:00001009ad84_NS 2a0003f4 O EL0t_n : MOV w20,w0 +11314 clk cpu0 R X20 0000000000000000 +11315 clk cpu0 IT (11279) 0009ad88:00001009ad88_NS 52800308 O EL0t_n : MOV w8,#0x18 +11315 clk cpu0 R X8 0000000000000018 +11316 clk cpu0 IT (11280) 0009ad8c:00001009ad8c_NS 9b086288 O EL0t_n : MADD x8,x20,x8,x24 +11316 clk cpu0 R X8 000000000620E000 +11317 clk cpu0 IT (11281) 0009ad90:00001009ad90_NS 52900189 O EL0t_n : MOV w9,#0x800c +11317 clk cpu0 R X9 000000000000800C +11318 clk cpu0 IT (11282) 0009ad94:00001009ad94_NS 8b090108 O EL0t_n : ADD x8,x8,x9 +11318 clk cpu0 R X8 000000000621600C +11319 clk cpu0 IT (11283) 0009ad98:00001009ad98_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +11319 clk cpu0 MR4 0621600c:00001521600c_NS 00000001 +11319 clk cpu0 R X9 0000000000000001 +11320 clk cpu0 IT (11284) 0009ad9c:00001009ad9c_NS 7100053f O EL0t_n : CMP w9,#1 +11320 clk cpu0 R cpsr 600003c0 +11321 clk cpu0 IS (11285) 0009ada0:00001009ada0_NS 540002e1 O EL0t_n : B.NE 0x9adfc +11322 clk cpu0 IT (11286) 0009ada4:00001009ada4_NS b900011f O EL0t_n : STR wzr,[x8,#0] +11322 clk cpu0 MW4 0621600c:00001521600c_NS 00000000 +11323 clk cpu0 IT (11287) 0009ada8:00001009ada8_NS 52800308 O EL0t_n : MOV w8,#0x18 +11323 clk cpu0 R X8 0000000000000018 +11324 clk cpu0 IT (11288) 0009adac:00001009adac_NS 52900109 O EL0t_n : MOV w9,#0x8008 +11324 clk cpu0 R X9 0000000000008008 +11325 clk cpu0 IT (11289) 0009adb0:00001009adb0_NS 9b086288 O EL0t_n : MADD x8,x20,x8,x24 +11325 clk cpu0 R X8 000000000620E000 +11326 clk cpu0 IT (11290) 0009adb4:00001009adb4_NS b8696908 O EL0t_n : LDR w8,[x8,x9] +11326 clk cpu0 MR4 06216008:000015216008_NS 00000004 +11326 clk cpu0 R X8 0000000000000004 +11327 clk cpu0 IT (11291) 0009adb8:00001009adb8_NS 2a1f03f9 O EL0t_n : MOV w25,wzr +11327 clk cpu0 R X25 0000000000000000 +11328 clk cpu0 IT (11292) 0009adbc:00001009adbc_NS 90030bf7 O EL0t_n : ADRP x23,0x6216dbc +11328 clk cpu0 R X23 0000000006216000 +11328 clk cpu0 CACHE cpu.cpu0.l1icache LINE 016f ALLOC 0x00001009adc0_NS +11328 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0b70 ALLOC 0x00001009adc0_NS +11329 clk cpu0 IT (11293) 0009adc0:00001009adc0_NS f0017c76 O EL0t_n : ADRP x22,0x3029dc0 +11329 clk cpu0 R X22 0000000003029000 +11330 clk cpu0 IT (11294) 0009adc4:00001009adc4_NS 7100111f O EL0t_n : CMP w8,#4 +11330 clk cpu0 R cpsr 600003c0 +11331 clk cpu0 IS (11295) 0009adc8:00001009adc8_NS 54000988 O EL0t_n : B.HI 0x9aef8 +11332 clk cpu0 IT (11296) 0009adcc:00001009adcc_NS f0fffd89 O EL0t_n : ADRP x9,0x4ddcc +11332 clk cpu0 R X9 000000000004D000 +11333 clk cpu0 IT (11297) 0009add0:00001009add0_NS 913c0529 O EL0t_n : ADD x9,x9,#0xf01 +11333 clk cpu0 R X9 000000000004DF01 +11334 clk cpu0 IT (11298) 0009add4:00001009add4_NS 100000ca O EL0t_n : ADR x10,0x9adec +11334 clk cpu0 R X10 000000000009ADEC +11335 clk cpu0 IT (11299) 0009add8:00001009add8_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +11335 clk cpu0 MR1 0004df05:00001004df05_NS 3a +11335 clk cpu0 R X11 000000000000003A +11335 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00f9 ALLOC 0x00001004df00_NS +11335 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 17c0 ALLOC 0x00001004df00_NS +11336 clk cpu0 IT (11300) 0009addc:00001009addc_NS 8b0b094a O EL0t_n : ADD x10,x10,x11,LSL #2 +11336 clk cpu0 R X10 000000000009AED4 +11337 clk cpu0 IT (11301) 0009ade0:00001009ade0_NS 2a1903fa O EL0t_n : MOV w26,w25 +11337 clk cpu0 R X26 0000000000000000 +11338 clk cpu0 IT (11302) 0009ade4:00001009ade4_NS 2a1903fb O EL0t_n : MOV w27,w25 +11338 clk cpu0 R X27 0000000000000000 +11339 clk cpu0 IT (11303) 0009ade8:00001009ade8_NS d61f0140 O EL0t_n : BR x10 +11339 clk cpu0 R cpsr 600007c0 +11339 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0176 INVAL 0x0000100a6ec0_NS +11339 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0176 ALLOC 0x00001009aec0_NS +11339 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0bb0 ALLOC 0x00001009aec0_NS +11340 clk cpu0 IT (11304) 0009aed4:00001009aed4_NS b940fae8 O EL0t_n : LDR w8,[x23,#0xf8] +11340 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +11340 clk cpu0 R cpsr 600003c0 +11340 clk cpu0 R X8 0000000000000003 +11341 clk cpu0 IS (11305) 0009aed8:00001009aed8_NS 340001a8 O EL0t_n : CBZ w8,0x9af0c +11342 clk cpu0 IT (11306) 0009aedc:00001009aedc_NS d0fffd81 O EL0t_n : ADRP x1,0x4cedc +11342 clk cpu0 R X1 000000000004C000 +11343 clk cpu0 IT (11307) 0009aee0:00001009aee0_NS 913fbc21 O EL0t_n : ADD x1,x1,#0xfef +11343 clk cpu0 R X1 000000000004CFEF +11344 clk cpu0 IT (11308) 0009aee4:00001009aee4_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +11344 clk cpu0 R X0 0000000000000000 +11345 clk cpu0 IT (11309) 0009aee8:00001009aee8_NS 2a1403e2 O EL0t_n : MOV w2,w20 +11345 clk cpu0 R X2 0000000000000000 +11346 clk cpu0 IT (11310) 0009aeec:00001009aeec_NS 2a1503e3 O EL0t_n : MOV w3,w21 +11346 clk cpu0 R X3 0000000000000001 +11347 clk cpu0 IT (11311) 0009aef0:00001009aef0_NS 94000577 O EL0t_n : BL 0x9c4cc +11347 clk cpu0 R X30 000000000009AEF4 +11348 clk cpu0 IT (11312) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +11348 clk cpu0 R SP_EL0 0000000003045830 +11349 clk cpu0 IT (11313) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +11349 clk cpu0 R X8 0000000006216000 +11350 clk cpu0 IT (11314) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +11350 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +11350 clk cpu0 R X8 0000000000000003 +11351 clk cpu0 IT (11315) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +11351 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_00000001 +11351 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_00000000 +11352 clk cpu0 IT (11316) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +11352 clk cpu0 MW8 030458b0:0000008458b0_NS 00000000_60000000 +11352 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_0009aef4 +11353 clk cpu0 IT (11317) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +11353 clk cpu0 MW8 03045830:000000845830_NS 00000000_00000000 +11353 clk cpu0 MW8 03045838:000000845838_NS 00000000_00000001 +11354 clk cpu0 IT (11318) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +11354 clk cpu0 R cpsr 200003c0 +11355 clk cpu0 IT (11319) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +11355 clk cpu0 MW8 03045840:000000845840_NS 00000000_a0000000 +11355 clk cpu0 MW8 03045848:000000845848_NS 7e007e00_7e007e00 +11356 clk cpu0 IT (11320) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +11356 clk cpu0 MW8 03045850:000000845850_NS ffffffff_c1ffffff +11356 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045910 +11357 clk cpu0 IT (11321) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +11357 clk cpu0 MW8 03045890:000000845890_NS 00000000_00000000 +11357 clk cpu0 MW8 03045898:000000845898_NS 00000000_00000000 +11358 clk cpu0 IT (11322) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +11358 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000000 +11358 clk cpu0 MW8 03045888:000000845888_NS 00000000_00000000 +11359 clk cpu0 IS (11323) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +11360 clk cpu0 IT (11324) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +11360 clk cpu0 R X20 0000000003008000 +11361 clk cpu0 IT (11325) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +11361 clk cpu0 R X20 0000000003008528 +11362 clk cpu0 IT (11326) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +11362 clk cpu0 R X0 0000000003008528 +11363 clk cpu0 IT (11327) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +11363 clk cpu0 R X19 000000000004CFEF +11364 clk cpu0 IT (11328) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +11364 clk cpu0 R X30 000000000009C510 +11365 clk cpu0 IT (11329) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +11365 clk cpu0 R X8 0000000006216000 +11366 clk cpu0 IT (11330) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +11366 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +11366 clk cpu0 R X8 0000000000000001 +11367 clk cpu0 IT (11331) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +11367 clk cpu0 R cpsr 800003c0 +11368 clk cpu0 IT (11332) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +11369 clk cpu0 IT (11333) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +11370 clk cpu0 IT (11334) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +11370 clk cpu0 R X9 0000000003045830 +11371 clk cpu0 IT (11335) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +11371 clk cpu0 R X8 00000000FFFFFFD0 +11372 clk cpu0 IT (11336) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +11372 clk cpu0 R X10 00000000030458C0 +11373 clk cpu0 IT (11337) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +11373 clk cpu0 R X9 0000000003045860 +11374 clk cpu0 IT (11338) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +11374 clk cpu0 R X0 0000000000000000 +11375 clk cpu0 IT (11339) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +11375 clk cpu0 R X1 0000000000000000 +11376 clk cpu0 IT (11340) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +11376 clk cpu0 R X2 0000000000000000 +11377 clk cpu0 IT (11341) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +11377 clk cpu0 MW8 03045898:000000845898_NS 00000000_ffffffd0 +11378 clk cpu0 IT (11342) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +11378 clk cpu0 MW8 03045880:000000845880_NS 00000000_030458c0 +11378 clk cpu0 MW8 03045888:000000845888_NS 00000000_03045860 +11379 clk cpu0 IT (11343) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +11380 clk cpu0 IT (11344) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +11380 clk cpu0 MR8 03045888:000000845888_NS 00000000_03045860 +11380 clk cpu0 MR8 03045890:000000845890_NS 00000000_00000000 +11380 clk cpu0 R X8 0000000000000000 +11380 clk cpu0 R X10 0000000003045860 +11381 clk cpu0 IT (11345) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +11381 clk cpu0 MR8 03045880:000000845880_NS 00000000_030458c0 +11381 clk cpu0 R X9 00000000030458C0 +11382 clk cpu0 IT (11346) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +11382 clk cpu0 MR8 03045898:000000845898_NS 00000000_ffffffd0 +11382 clk cpu0 R X11 00000000FFFFFFD0 +11383 clk cpu0 IT (11347) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +11383 clk cpu0 R X21 0000000000000000 +11384 clk cpu0 IT (11348) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +11384 clk cpu0 R X1 0000000003045860 +11385 clk cpu0 IT (11349) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +11385 clk cpu0 R X0 000000000004CFEF +11386 clk cpu0 IT (11350) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +11386 clk cpu0 MW8 03045868:000000845868_NS 00000000_03045860 +11386 clk cpu0 MW8 03045870:000000845870_NS 00000000_00000000 +11387 clk cpu0 IT (11351) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +11387 clk cpu0 MW8 03045860:000000845860_NS 00000000_030458c0 +11388 clk cpu0 IT (11352) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +11388 clk cpu0 MW8 03045878:000000845878_NS 00000000_ffffffd0 +11389 clk cpu0 IT (11353) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +11389 clk cpu0 R X30 000000000009C560 +11390 clk cpu0 IT (11354) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +11390 clk cpu0 R SP_EL0 0000000003045790 +11391 clk cpu0 IT (11355) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +11391 clk cpu0 MW8 03045820:000000845820_NS 00000000_0004cfef +11391 clk cpu0 MW8 03045828:000000845828_NS 00000000_0009c560 +11392 clk cpu0 IT (11356) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +11392 clk cpu0 R X19 0000000003045860 +11393 clk cpu0 IT (11357) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +11393 clk cpu0 R X1 000000000004C000 +11394 clk cpu0 IT (11358) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +11394 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +11394 clk cpu0 MW8 03045818:000000845818_NS 00000000_03008528 +11395 clk cpu0 IT (11359) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +11395 clk cpu0 R X20 000000000004CFEF +11396 clk cpu0 IT (11360) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +11396 clk cpu0 R X1 000000000004C00B +11397 clk cpu0 IT (11361) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +11397 clk cpu0 R X0 0000000003045794 +11398 clk cpu0 IT (11362) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +11398 clk cpu0 R X2 000000000000003B +11399 clk cpu0 IT (11363) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +11399 clk cpu0 MW8 030457d0:0000008457d0_NS ff7fff7f_ff7fff7f +11400 clk cpu0 IT (11364) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +11400 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +11400 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_00000000 +11401 clk cpu0 IT (11365) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +11401 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_00000000 +11401 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0620e000 +11402 clk cpu0 IT (11366) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +11402 clk cpu0 MW8 03045800:000000845800_NS 00000000_06216000 +11402 clk cpu0 MW8 03045808:000000845808_NS 00000000_03029000 +11403 clk cpu0 IT (11367) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +11403 clk cpu0 R X30 0000000000092B80 +11404 clk cpu0 IT (11368) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +11404 clk cpu0 MW8 03045780:000000845780_NS 00000000_03045860 +11404 clk cpu0 MW8 03045788:000000845788_NS 00000000_00092b80 +11404 clk cpu0 R SP_EL0 0000000003045780 +11405 clk cpu0 IT (11369) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +11405 clk cpu0 R X19 0000000003045794 +11406 clk cpu0 IT (11370) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +11406 clk cpu0 R X30 00000000000104DC +11407 clk cpu0 IT (11371) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +11407 clk cpu0 R cpsr 200003c0 +11408 clk cpu0 IS (11372) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +11409 clk cpu0 IT (11373) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +11409 clk cpu0 R cpsr 400003c0 +11410 clk cpu0 IT (11374) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +11411 clk cpu0 IT (11375) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +11411 clk cpu0 R cpsr 000003c0 +11411 clk cpu0 R X10 0000000000000003 +11412 clk cpu0 IS (11376) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +11413 clk cpu0 IT (11377) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +11413 clk cpu0 R X9 0000000000000020 +11414 clk cpu0 IT (11378) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +11414 clk cpu0 R X8 000000000004C008 +11415 clk cpu0 IT (11379) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +11415 clk cpu0 R cpsr 200003c0 +11416 clk cpu0 IT (11380) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +11416 clk cpu0 R X9 0000000000000008 +11417 clk cpu0 IS (11381) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +11418 clk cpu0 IT (11382) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +11418 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +11418 clk cpu0 R X12 000000000A00000A +11418 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x000011f00000_NS +11418 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x00001004c000_NS +11419 clk cpu0 IT (11383) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +11419 clk cpu0 R X10 0000000000000018 +11420 clk cpu0 IT (11384) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +11420 clk cpu0 R X11 000000000000003B +11421 clk cpu0 IT (11385) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11421 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +11421 clk cpu0 R X8 000000000004C00C +11421 clk cpu0 R X13 000000006F727245 +11422 clk cpu0 IT (11386) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11422 clk cpu0 R X12 000000000000000A +11423 clk cpu0 IT (11387) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11423 clk cpu0 R X11 0000000000000037 +11424 clk cpu0 IT (11388) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11424 clk cpu0 R cpsr 200003c0 +11425 clk cpu0 IT (11389) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11425 clk cpu0 R X14 0000000072724500 +11426 clk cpu0 IT (11390) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11426 clk cpu0 R X12 000000007272450A +11427 clk cpu0 IT (11391) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11427 clk cpu0 MW4 03045794:000000845794_NS 7272450a +11427 clk cpu0 R X0 0000000003045798 +11428 clk cpu0 IT (11392) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11428 clk cpu0 R X12 000000006F727245 +11429 clk cpu0 IT (11393) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11430 clk cpu0 IT (11394) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11430 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +11430 clk cpu0 R X8 000000000004C010 +11430 clk cpu0 R X13 0000000049203A72 +11431 clk cpu0 IT (11395) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11431 clk cpu0 R X12 000000000000006F +11432 clk cpu0 IT (11396) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11432 clk cpu0 R X11 0000000000000033 +11433 clk cpu0 IT (11397) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11433 clk cpu0 R cpsr 200003c0 +11434 clk cpu0 IT (11398) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11434 clk cpu0 R X14 00000000203A7200 +11435 clk cpu0 IT (11399) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11435 clk cpu0 R X12 00000000203A726F +11436 clk cpu0 IT (11400) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11436 clk cpu0 MW4 03045798:000000845798_NS 203a726f +11436 clk cpu0 R X0 000000000304579C +11437 clk cpu0 IT (11401) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11437 clk cpu0 R X12 0000000049203A72 +11438 clk cpu0 IT (11402) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11439 clk cpu0 IT (11403) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11439 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +11439 clk cpu0 R X8 000000000004C014 +11439 clk cpu0 R X13 0000000067656C6C +11440 clk cpu0 IT (11404) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11440 clk cpu0 R X12 0000000000000049 +11441 clk cpu0 IT (11405) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11441 clk cpu0 R X11 000000000000002F +11442 clk cpu0 IT (11406) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11442 clk cpu0 R cpsr 200003c0 +11443 clk cpu0 IT (11407) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11443 clk cpu0 R X14 00000000656C6C00 +11444 clk cpu0 IT (11408) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11444 clk cpu0 R X12 00000000656C6C49 +11445 clk cpu0 IT (11409) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11445 clk cpu0 MW4 0304579c:00000084579c_NS 656c6c49 +11445 clk cpu0 R X0 00000000030457A0 +11446 clk cpu0 IT (11410) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11446 clk cpu0 R X12 0000000067656C6C +11447 clk cpu0 IT (11411) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11448 clk cpu0 IT (11412) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11448 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +11448 clk cpu0 R X8 000000000004C018 +11448 clk cpu0 R X13 0000000066206C61 +11449 clk cpu0 IT (11413) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11449 clk cpu0 R X12 0000000000000067 +11450 clk cpu0 IT (11414) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11450 clk cpu0 R X11 000000000000002B +11451 clk cpu0 IT (11415) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11451 clk cpu0 R cpsr 200003c0 +11452 clk cpu0 IT (11416) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11452 clk cpu0 R X14 00000000206C6100 +11453 clk cpu0 IT (11417) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11453 clk cpu0 R X12 00000000206C6167 +11454 clk cpu0 IT (11418) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11454 clk cpu0 MW4 030457a0:0000008457a0_NS 206c6167 +11454 clk cpu0 R X0 00000000030457A4 +11455 clk cpu0 IT (11419) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11455 clk cpu0 R X12 0000000066206C61 +11456 clk cpu0 IT (11420) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11457 clk cpu0 IT (11421) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11457 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +11457 clk cpu0 R X8 000000000004C01C +11457 clk cpu0 R X13 00000000616D726F +11458 clk cpu0 IT (11422) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11458 clk cpu0 R X12 0000000000000066 +11459 clk cpu0 IT (11423) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11459 clk cpu0 R X11 0000000000000027 +11460 clk cpu0 IT (11424) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11460 clk cpu0 R cpsr 200003c0 +11461 clk cpu0 IT (11425) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11461 clk cpu0 R X14 000000006D726F00 +11462 clk cpu0 IT (11426) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11462 clk cpu0 R X12 000000006D726F66 +11463 clk cpu0 IT (11427) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11463 clk cpu0 MW4 030457a4:0000008457a4_NS 6d726f66 +11463 clk cpu0 R X0 00000000030457A8 +11464 clk cpu0 IT (11428) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11464 clk cpu0 R X12 00000000616D726F +11465 clk cpu0 IT (11429) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11466 clk cpu0 IT (11430) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11466 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +11466 clk cpu0 R X8 000000000004C020 +11466 clk cpu0 R X13 0000000070732074 +11467 clk cpu0 IT (11431) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11467 clk cpu0 R X12 0000000000000061 +11468 clk cpu0 IT (11432) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11468 clk cpu0 R X11 0000000000000023 +11469 clk cpu0 IT (11433) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11469 clk cpu0 R cpsr 200003c0 +11470 clk cpu0 IT (11434) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11470 clk cpu0 R X14 0000000073207400 +11471 clk cpu0 IT (11435) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11471 clk cpu0 R X12 0000000073207461 +11472 clk cpu0 IT (11436) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11472 clk cpu0 MW4 030457a8:0000008457a8_NS 73207461 +11472 clk cpu0 R X0 00000000030457AC +11473 clk cpu0 IT (11437) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11473 clk cpu0 R X12 0000000070732074 +11474 clk cpu0 IT (11438) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11475 clk cpu0 IT (11439) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11475 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +11475 clk cpu0 R X8 000000000004C024 +11475 clk cpu0 R X13 0000000066696365 +11476 clk cpu0 IT (11440) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11476 clk cpu0 R X12 0000000000000070 +11477 clk cpu0 IT (11441) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11477 clk cpu0 R X11 000000000000001F +11478 clk cpu0 IT (11442) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11478 clk cpu0 R cpsr 200003c0 +11479 clk cpu0 IT (11443) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11479 clk cpu0 R X14 0000000069636500 +11480 clk cpu0 IT (11444) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11480 clk cpu0 R X12 0000000069636570 +11481 clk cpu0 IT (11445) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11481 clk cpu0 MW4 030457ac:0000008457ac_NS 69636570 +11481 clk cpu0 R X0 00000000030457B0 +11482 clk cpu0 IT (11446) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11482 clk cpu0 R X12 0000000066696365 +11483 clk cpu0 IT (11447) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11484 clk cpu0 IT (11448) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11484 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +11484 clk cpu0 R X8 000000000004C028 +11484 clk cpu0 R X13 0000000020726569 +11485 clk cpu0 IT (11449) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11485 clk cpu0 R X12 0000000000000066 +11486 clk cpu0 IT (11450) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11486 clk cpu0 R X11 000000000000001B +11487 clk cpu0 IT (11451) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11487 clk cpu0 R cpsr 200003c0 +11488 clk cpu0 IT (11452) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11488 clk cpu0 R X14 0000000072656900 +11489 clk cpu0 IT (11453) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11489 clk cpu0 R X12 0000000072656966 +11490 clk cpu0 IT (11454) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11490 clk cpu0 MW4 030457b0:0000008457b0_NS 72656966 +11490 clk cpu0 R X0 00000000030457B4 +11491 clk cpu0 IT (11455) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11491 clk cpu0 R X12 0000000020726569 +11492 clk cpu0 IT (11456) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11493 clk cpu0 IT (11457) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11493 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +11493 clk cpu0 R X8 000000000004C02C +11493 clk cpu0 R X13 0000000064657375 +11494 clk cpu0 IT (11458) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11494 clk cpu0 R X12 0000000000000020 +11495 clk cpu0 IT (11459) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11495 clk cpu0 R X11 0000000000000017 +11496 clk cpu0 IT (11460) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11496 clk cpu0 R cpsr 200003c0 +11497 clk cpu0 IT (11461) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11497 clk cpu0 R X14 0000000065737500 +11498 clk cpu0 IT (11462) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11498 clk cpu0 R X12 0000000065737520 +11499 clk cpu0 IT (11463) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11499 clk cpu0 MW4 030457b4:0000008457b4_NS 65737520 +11499 clk cpu0 R X0 00000000030457B8 +11500 clk cpu0 IT (11464) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11500 clk cpu0 R X12 0000000064657375 +11501 clk cpu0 IT (11465) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11502 clk cpu0 IT (11466) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11502 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +11502 clk cpu0 R X8 000000000004C030 +11502 clk cpu0 R X13 000000005F27203A +11503 clk cpu0 IT (11467) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11503 clk cpu0 R X12 0000000000000064 +11504 clk cpu0 IT (11468) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11504 clk cpu0 R X11 0000000000000013 +11505 clk cpu0 IT (11469) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11505 clk cpu0 R cpsr 200003c0 +11506 clk cpu0 IT (11470) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11506 clk cpu0 R X14 0000000027203A00 +11507 clk cpu0 IT (11471) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11507 clk cpu0 R X12 0000000027203A64 +11508 clk cpu0 IT (11472) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11508 clk cpu0 MW4 030457b8:0000008457b8_NS 27203a64 +11508 clk cpu0 R X0 00000000030457BC +11509 clk cpu0 IT (11473) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11509 clk cpu0 R X12 000000005F27203A +11510 clk cpu0 IT (11474) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11511 clk cpu0 IT (11475) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11511 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +11511 clk cpu0 R X8 000000000004C034 +11511 clk cpu0 R X13 0000000045202E27 +11512 clk cpu0 IT (11476) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11512 clk cpu0 R X12 000000000000005F +11513 clk cpu0 IT (11477) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11513 clk cpu0 R X11 000000000000000F +11514 clk cpu0 IT (11478) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11514 clk cpu0 R cpsr 200003c0 +11515 clk cpu0 IT (11479) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11515 clk cpu0 R X14 00000000202E2700 +11516 clk cpu0 IT (11480) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11516 clk cpu0 R X12 00000000202E275F +11517 clk cpu0 IT (11481) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11517 clk cpu0 MW4 030457bc:0000008457bc_NS 202e275f +11517 clk cpu0 R X0 00000000030457C0 +11518 clk cpu0 IT (11482) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11518 clk cpu0 R X12 0000000045202E27 +11519 clk cpu0 IT (11483) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11520 clk cpu0 IT (11484) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11520 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +11520 clk cpu0 R X8 000000000004C038 +11520 clk cpu0 R X13 000000006E69646E +11521 clk cpu0 IT (11485) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11521 clk cpu0 R X12 0000000000000045 +11522 clk cpu0 IT (11486) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11522 clk cpu0 R X11 000000000000000B +11523 clk cpu0 IT (11487) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11523 clk cpu0 R cpsr 200003c0 +11524 clk cpu0 IT (11488) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11524 clk cpu0 R X14 0000000069646E00 +11525 clk cpu0 IT (11489) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11525 clk cpu0 R X12 0000000069646E45 +11526 clk cpu0 IT (11490) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11526 clk cpu0 MW4 030457c0:0000008457c0_NS 69646e45 +11526 clk cpu0 R X0 00000000030457C4 +11527 clk cpu0 IT (11491) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11527 clk cpu0 R X12 000000006E69646E +11528 clk cpu0 IT (11492) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11529 clk cpu0 IT (11493) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11529 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +11529 clk cpu0 R X8 000000000004C03C +11529 clk cpu0 R X13 0000000065542067 +11530 clk cpu0 IT (11494) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11530 clk cpu0 R X12 000000000000006E +11531 clk cpu0 IT (11495) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11531 clk cpu0 R X11 0000000000000007 +11532 clk cpu0 IT (11496) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11532 clk cpu0 R cpsr 200003c0 +11533 clk cpu0 IT (11497) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11533 clk cpu0 R X14 0000000054206700 +11534 clk cpu0 IT (11498) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11534 clk cpu0 R X12 000000005420676E +11535 clk cpu0 IT (11499) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11535 clk cpu0 MW4 030457c4:0000008457c4_NS 5420676e +11535 clk cpu0 R X0 00000000030457C8 +11536 clk cpu0 IT (11500) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11536 clk cpu0 R X12 0000000065542067 +11537 clk cpu0 IT (11501) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11538 clk cpu0 IT (11502) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +11538 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +11538 clk cpu0 R X8 000000000004C040 +11538 clk cpu0 R X13 000000000A2E7473 +11539 clk cpu0 IT (11503) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +11539 clk cpu0 R X12 0000000000000065 +11540 clk cpu0 IT (11504) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +11540 clk cpu0 R X11 0000000000000003 +11541 clk cpu0 IT (11505) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +11541 clk cpu0 R cpsr 600003c0 +11542 clk cpu0 IT (11506) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +11542 clk cpu0 R X14 000000002E747300 +11543 clk cpu0 IT (11507) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +11543 clk cpu0 R X12 000000002E747365 +11544 clk cpu0 IT (11508) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +11544 clk cpu0 MW4 030457c8:0000008457c8_NS 2e747365 +11544 clk cpu0 R X0 00000000030457CC +11545 clk cpu0 IT (11509) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +11545 clk cpu0 R X12 000000000A2E7473 +11546 clk cpu0 IS (11510) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +11547 clk cpu0 IT (11511) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +11547 clk cpu0 R X2 0000000000000003 +11548 clk cpu0 IT (11512) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +11548 clk cpu0 R X9 0000000000000001 +11549 clk cpu0 IT (11513) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +11549 clk cpu0 R X8 000000000004C03F +11550 clk cpu0 IT (11514) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +11550 clk cpu0 R X1 000000000004C043 +11551 clk cpu0 IT (11515) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +11551 clk cpu0 R cpsr 200003c0 +11552 clk cpu0 IS (11516) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +11553 clk cpu0 IT (11517) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +11553 clk cpu0 MR1 0004c043:00001004c043_NS 0a +11553 clk cpu0 R X8 000000000000000A +11554 clk cpu0 IT (11518) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +11554 clk cpu0 MW1 030457cc:0000008457cc_NS 0a +11555 clk cpu0 IS (11519) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +11556 clk cpu0 IT (11520) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +11556 clk cpu0 MR1 0004c044:00001004c044_NS 00 +11556 clk cpu0 R X8 0000000000000000 +11557 clk cpu0 IT (11521) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +11557 clk cpu0 R cpsr 600003c0 +11558 clk cpu0 IT (11522) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +11558 clk cpu0 MW1 030457cd:0000008457cd_NS 00 +11559 clk cpu0 IS (11523) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +11560 clk cpu0 IT (11524) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +11560 clk cpu0 MR1 0004c045:00001004c045_NS 00 +11560 clk cpu0 R X8 0000000000000000 +11561 clk cpu0 IT (11525) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +11561 clk cpu0 MW1 030457ce:0000008457ce_NS 00 +11562 clk cpu0 IT (11526) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +11563 clk cpu0 IT (11527) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +11563 clk cpu0 R X0 0000000003045794 +11564 clk cpu0 IT (11528) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +11564 clk cpu0 MR8 03045780:000000845780_NS 00000000_03045860 +11564 clk cpu0 MR8 03045788:000000845788_NS 00000000_00092b80 +11564 clk cpu0 R SP_EL0 0000000003045790 +11564 clk cpu0 R X19 0000000003045860 +11564 clk cpu0 R X30 0000000000092B80 +11565 clk cpu0 IT (11529) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +11566 clk cpu0 IT (11530) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +11566 clk cpu0 R X22 000000000004C000 +11567 clk cpu0 IT (11531) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +11567 clk cpu0 R X23 000000000004C000 +11568 clk cpu0 IT (11532) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +11568 clk cpu0 R X26 0000000000000000 +11569 clk cpu0 IT (11533) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +11569 clk cpu0 R X21 0000000003029000 +11570 clk cpu0 IT (11534) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +11570 clk cpu0 R X22 000000000004C108 +11571 clk cpu0 IT (11535) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +11571 clk cpu0 R X23 000000000004C129 +11572 clk cpu0 IT (11536) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +11572 clk cpu0 R X24 0000000003041000 +11573 clk cpu0 IT (11537) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +11573 clk cpu0 R X25 0000000006216000 +11574 clk cpu0 IT (11538) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +11575 clk cpu0 IT (11539) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11575 clk cpu0 MR1 0004cfef:00001004cfef_NS 0a +11575 clk cpu0 R X8 000000000000000A +11575 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 007e ALLOC 0x00001004cfc0_NS +11575 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13f1 ALLOC 0x00001004cfc0_NS +11576 clk cpu0 IT (11540) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11576 clk cpu0 R cpsr 800003c0 +11577 clk cpu0 IS (11541) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11578 clk cpu0 IS (11542) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11579 clk cpu0 IT (11543) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +11579 clk cpu0 R cpsr 000003c0 +11580 clk cpu0 IT (11544) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +11581 clk cpu0 IT (11545) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11581 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11581 clk cpu0 R X9 0000000013000000 +11582 clk cpu0 IT (11546) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +11582 clk cpu0 R X27 000000000004CFEF +11583 clk cpu0 IT (11547) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +11583 clk cpu0 R X20 000000000004CFF0 +TUBE CPU0: +11584 clk cpu0 IT (11548) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +11584 clk cpu0 MW1 13000000:000013000000_NS 0a +11585 clk cpu0 IT (11549) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11585 clk cpu0 MR1 0004cff0:00001004cff0_NS 3e +11585 clk cpu0 R X8 000000000000003E +11586 clk cpu0 IT (11550) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11586 clk cpu0 R cpsr 200003c0 +11587 clk cpu0 IS (11551) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11588 clk cpu0 IS (11552) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11589 clk cpu0 IT (11553) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +11589 clk cpu0 R cpsr 400003c0 +11590 clk cpu0 IS (11554) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +11591 clk cpu0 IT (11555) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +11591 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +11591 clk cpu0 R X8 0000000000000000 +11592 clk cpu0 IT (11556) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +11592 clk cpu0 MR8 0004cff0:00001004cff0_NS 3a782555_50433e3e +11592 clk cpu0 R X0 3A78255550433E3E +11593 clk cpu0 IT (11557) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +11593 clk cpu0 R cpsr 800003c0 +11594 clk cpu0 IT (11558) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +11595 clk cpu0 IT (11559) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +11595 clk cpu0 R X27 0000000000000000 +11596 clk cpu0 IT (11560) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +11596 clk cpu0 R X28 000000000004CFF0 +11597 clk cpu0 IT (11561) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +11597 clk cpu0 R X8 00000000FFFFFFF8 +11598 clk cpu0 IT (11562) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11598 clk cpu0 R cpsr 000003c0 +11598 clk cpu0 R X9 000000000000003E +11599 clk cpu0 IS (11563) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11600 clk cpu0 IT (11564) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11600 clk cpu0 R cpsr 200003c0 +11601 clk cpu0 IS (11565) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11602 clk cpu0 IT (11566) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11602 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11602 clk cpu0 R X9 0000000013000000 +11603 clk cpu0 IT (11567) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11603 clk cpu0 R cpsr 800003c0 +11603 clk cpu0 R X8 00000000FFFFFFF9 +11604 clk cpu0 IT (11568) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11604 clk cpu0 MW1 13000000:000013000000_NS 3e +11605 clk cpu0 IT (11569) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11605 clk cpu0 R X0 003A78255550433E +11606 clk cpu0 IT (11570) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11607 clk cpu0 IT (11571) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11607 clk cpu0 R cpsr 000003c0 +11607 clk cpu0 R X9 000000000000003E +11608 clk cpu0 IS (11572) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11609 clk cpu0 IT (11573) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11609 clk cpu0 R cpsr 200003c0 +11610 clk cpu0 IS (11574) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11611 clk cpu0 IT (11575) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11611 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11611 clk cpu0 R X9 0000000013000000 +11612 clk cpu0 IT (11576) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11612 clk cpu0 R cpsr 800003c0 +11612 clk cpu0 R X8 00000000FFFFFFFA +11613 clk cpu0 IT (11577) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11613 clk cpu0 MW1 13000000:000013000000_NS 3e +11614 clk cpu0 IT (11578) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11614 clk cpu0 R X0 00003A7825555043 +11615 clk cpu0 IT (11579) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11616 clk cpu0 IT (11580) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11616 clk cpu0 R cpsr 000003c0 +11616 clk cpu0 R X9 0000000000000043 +11617 clk cpu0 IS (11581) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11618 clk cpu0 IT (11582) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11618 clk cpu0 R cpsr 200003c0 +11619 clk cpu0 IS (11583) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11620 clk cpu0 IT (11584) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11620 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11620 clk cpu0 R X9 0000000013000000 +11621 clk cpu0 IT (11585) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11621 clk cpu0 R cpsr 800003c0 +11621 clk cpu0 R X8 00000000FFFFFFFB +11622 clk cpu0 IT (11586) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11622 clk cpu0 MW1 13000000:000013000000_NS 43 +11623 clk cpu0 IT (11587) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11623 clk cpu0 R X0 0000003A78255550 +11624 clk cpu0 IT (11588) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11625 clk cpu0 IT (11589) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11625 clk cpu0 R cpsr 000003c0 +11625 clk cpu0 R X9 0000000000000050 +11626 clk cpu0 IS (11590) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11627 clk cpu0 IT (11591) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11627 clk cpu0 R cpsr 200003c0 +11628 clk cpu0 IS (11592) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11629 clk cpu0 IT (11593) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11629 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11629 clk cpu0 R X9 0000000013000000 +11630 clk cpu0 IT (11594) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11630 clk cpu0 R cpsr 800003c0 +11630 clk cpu0 R X8 00000000FFFFFFFC +11631 clk cpu0 IT (11595) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11631 clk cpu0 MW1 13000000:000013000000_NS 50 +11632 clk cpu0 IT (11596) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11632 clk cpu0 R X0 000000003A782555 +11633 clk cpu0 IT (11597) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11634 clk cpu0 IT (11598) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11634 clk cpu0 R cpsr 000003c0 +11634 clk cpu0 R X9 0000000000000055 +11635 clk cpu0 IS (11599) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11636 clk cpu0 IT (11600) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11636 clk cpu0 R cpsr 200003c0 +11637 clk cpu0 IS (11601) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11638 clk cpu0 IT (11602) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11638 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11638 clk cpu0 R X9 0000000013000000 +11639 clk cpu0 IT (11603) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11639 clk cpu0 R cpsr 800003c0 +11639 clk cpu0 R X8 00000000FFFFFFFD +11640 clk cpu0 IT (11604) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11640 clk cpu0 MW1 13000000:000013000000_NS 55 +11641 clk cpu0 IT (11605) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11641 clk cpu0 R X0 00000000003A7825 +11642 clk cpu0 IT (11606) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11643 clk cpu0 IT (11607) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11643 clk cpu0 R cpsr 000003c0 +11643 clk cpu0 R X9 0000000000000025 +11644 clk cpu0 IS (11608) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11645 clk cpu0 IT (11609) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11645 clk cpu0 R cpsr 600003c0 +11646 clk cpu0 IT (11610) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11647 clk cpu0 IT (11611) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +11647 clk cpu0 R X8 00000000FFFFFFFD +11648 clk cpu0 IT (11612) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +11648 clk cpu0 R X9 0000000000000004 +11649 clk cpu0 IT (11613) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +11649 clk cpu0 R X9 000000000004CFF4 +11650 clk cpu0 IT (11614) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +11650 clk cpu0 R cpsr 200003c0 +11651 clk cpu0 IT (11615) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +11651 clk cpu0 R X27 000000000004CFF4 +11652 clk cpu0 IT (11616) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +11652 clk cpu0 R X20 000000000004CFF5 +11653 clk cpu0 IT (11617) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +11654 clk cpu0 IT (11618) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11654 clk cpu0 MR1 0004cff5:00001004cff5_NS 25 +11654 clk cpu0 R X8 0000000000000025 +11655 clk cpu0 IT (11619) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11655 clk cpu0 R cpsr 600003c0 +11656 clk cpu0 IT (11620) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11657 clk cpu0 IT (11621) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +11657 clk cpu0 MW4 03029734:000000829734_NS 00000000 +11658 clk cpu0 IT (11622) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +11658 clk cpu0 R X27 000000000004CFF5 +11659 clk cpu0 IT (11623) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +11659 clk cpu0 MR1 0004cff6:00001004cff6_NS 78 +11659 clk cpu0 R X27 000000000004CFF6 +11659 clk cpu0 R X28 0000000000000078 +11660 clk cpu0 IT (11624) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +11660 clk cpu0 R cpsr 200003c0 +11661 clk cpu0 IS (11625) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +11662 clk cpu0 IT (11626) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +11663 clk cpu0 IT (11627) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +11663 clk cpu0 R X8 0000000000000020 +11664 clk cpu0 IT (11628) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +11664 clk cpu0 R cpsr 600003c0 +11665 clk cpu0 IS (11629) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +11666 clk cpu0 IT (11630) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +11666 clk cpu0 R X9 0000000000092CE0 +11667 clk cpu0 IT (11631) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +11667 clk cpu0 MR1 0004c128:00001004c128_NS 00 +11667 clk cpu0 R X10 0000000000000000 +11668 clk cpu0 IT (11632) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +11668 clk cpu0 R X9 0000000000092CE0 +11669 clk cpu0 IT (11633) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +11669 clk cpu0 R cpsr 600007c0 +11670 clk cpu0 IT (11634) 00092ce0:000010092ce0_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +11670 clk cpu0 MR4 03045878:000000845878_NS ffffffd0 +11670 clk cpu0 R cpsr 600003c0 +11670 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +11671 clk cpu0 IS (11635) 00092ce4:000010092ce4_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92cf8 +11672 clk cpu0 IT (11636) 00092ce8:000010092ce8_NS 11002109 O EL0t_n : ADD w9,w8,#8 +11672 clk cpu0 R X9 00000000FFFFFFD8 +11673 clk cpu0 IT (11637) 00092cec:000010092cec_NS 7100013f O EL0t_n : CMP w9,#0 +11673 clk cpu0 R cpsr a00003c0 +11674 clk cpu0 IT (11638) 00092cf0:000010092cf0_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +11674 clk cpu0 MW4 03045878:000000845878_NS ffffffd8 +11675 clk cpu0 IT (11639) 00092cf4:000010092cf4_NS 54000cad O EL0t_n : B.LE 0x92e88 +11676 clk cpu0 IT (11640) 00092e88:000010092e88_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +11676 clk cpu0 MR8 03045868:000000845868_NS 00000000_03045860 +11676 clk cpu0 R X9 0000000003045860 +11677 clk cpu0 IT (11641) 00092e8c:000010092e8c_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +11677 clk cpu0 R X8 0000000003045830 +11678 clk cpu0 IT (11642) 00092e90:000010092e90_NS 17ffff9d O EL0t_n : B 0x92d04 +11679 clk cpu0 IT (11643) 00092d04:000010092d04_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +11679 clk cpu0 MR8 03045830:000000845830_NS 00000000_00000000 +11679 clk cpu0 R X0 0000000000000000 +11680 clk cpu0 IT (11644) 00092d08:000010092d08_NS 52800201 O EL0t_n : MOV w1,#0x10 +11680 clk cpu0 R X1 0000000000000010 +11681 clk cpu0 IT (11645) 00092d0c:000010092d0c_NS 94000a58 O EL0t_n : BL 0x9566c +11681 clk cpu0 R X30 0000000000092D10 +11682 clk cpu0 IT (11646) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +11682 clk cpu0 R SP_EL0 0000000003045770 +11683 clk cpu0 IT (11647) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +11683 clk cpu0 R X8 3030303030303030 +11684 clk cpu0 IT (11648) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +11684 clk cpu0 MW8 03045778:000000845778_NS 30303030_30303030 +11684 clk cpu0 MW8 03045780:000000845780_NS 30303030_30303030 +11684 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00ba ALLOC 0x000000845740_NS +11684 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00ba DIRTY 0x000000845740_NS +11684 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000845740_NS +11684 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000845740_NS +11685 clk cpu0 IT (11649) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +11685 clk cpu0 MW4 03045788:000000845788_NS 30303030 +11686 clk cpu0 IT (11650) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +11687 clk cpu0 IT (11651) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +11687 clk cpu0 R X11 0000000000000000 +11688 clk cpu0 IT (11652) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +11688 clk cpu0 R X8 0000000003029000 +11689 clk cpu0 IT (11653) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +11689 clk cpu0 MR4 03029734:000000829734_NS 00000000 +11689 clk cpu0 R X8 0000000000000000 +11690 clk cpu0 IT (11654) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +11690 clk cpu0 R cpsr 600003c0 +11691 clk cpu0 IT (11655) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +11691 clk cpu0 R X8 0000000000000000 +11692 clk cpu0 IT (11656) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +11692 clk cpu0 R cpsr 800003c0 +11693 clk cpu0 IT (11657) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +11694 clk cpu0 IT (11658) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +11694 clk cpu0 R X9 0000000003045778 +11695 clk cpu0 IT (11659) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +11695 clk cpu0 R X10 0000000006216000 +11696 clk cpu0 IT (11660) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +11696 clk cpu0 MR1 03045778:000000845778_NS 30 +11696 clk cpu0 R X8 0000000000000030 +11697 clk cpu0 IT (11661) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +11697 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11697 clk cpu0 R X9 0000000013000000 +11698 clk cpu0 IT (11662) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +11698 clk cpu0 MW1 13000000:000013000000_NS 30 +11699 clk cpu0 IT (11663) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +11699 clk cpu0 R SP_EL0 0000000003045790 +11700 clk cpu0 IT (11664) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +11701 clk cpu0 IT (11665) 00092d10:000010092d10_NS 91000774 O EL0t_n : ADD x20,x27,#1 +11701 clk cpu0 R X20 000000000004CFF7 +11702 clk cpu0 IT (11666) 00092d14:000010092d14_NS 17ffffa8 O EL0t_n : B 0x92bb4 +11703 clk cpu0 IT (11667) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11703 clk cpu0 MR1 0004cff7:00001004cff7_NS 3a +11703 clk cpu0 R X8 000000000000003A +11704 clk cpu0 IT (11668) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11704 clk cpu0 R cpsr 200003c0 +11705 clk cpu0 IS (11669) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11706 clk cpu0 IS (11670) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11707 clk cpu0 IT (11671) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +11707 clk cpu0 R cpsr 000003c0 +11708 clk cpu0 IT (11672) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +11709 clk cpu0 IT (11673) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11709 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11709 clk cpu0 R X9 0000000013000000 +11710 clk cpu0 IT (11674) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +11710 clk cpu0 R X27 000000000004CFF7 +11711 clk cpu0 IT (11675) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +11711 clk cpu0 R X20 000000000004CFF8 +11712 clk cpu0 IT (11676) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +11712 clk cpu0 MW1 13000000:000013000000_NS 3a +11713 clk cpu0 IT (11677) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11713 clk cpu0 MR1 0004cff8:00001004cff8_NS 20 +11713 clk cpu0 R X8 0000000000000020 +11714 clk cpu0 IT (11678) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11714 clk cpu0 R cpsr 800003c0 +11715 clk cpu0 IS (11679) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11716 clk cpu0 IS (11680) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11717 clk cpu0 IT (11681) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +11717 clk cpu0 R cpsr 400003c0 +11718 clk cpu0 IS (11682) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +11719 clk cpu0 IT (11683) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +11719 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +11719 clk cpu0 R X8 0000000000000000 +11720 clk cpu0 IT (11684) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +11720 clk cpu0 MR8 0004cff8:00001004cff8_NS 64255f54_52415020 +11720 clk cpu0 R X0 64255F5452415020 +11721 clk cpu0 IT (11685) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +11721 clk cpu0 R cpsr 800003c0 +11722 clk cpu0 IT (11686) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +11723 clk cpu0 IT (11687) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +11723 clk cpu0 R X27 0000000000000000 +11724 clk cpu0 IT (11688) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +11724 clk cpu0 R X28 000000000004CFF8 +11725 clk cpu0 IT (11689) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +11725 clk cpu0 R X8 00000000FFFFFFF8 +11726 clk cpu0 IT (11690) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11726 clk cpu0 R cpsr 000003c0 +11726 clk cpu0 R X9 0000000000000020 +11727 clk cpu0 IS (11691) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11728 clk cpu0 IT (11692) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11728 clk cpu0 R cpsr 800003c0 +11729 clk cpu0 IS (11693) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11730 clk cpu0 IT (11694) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11730 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11730 clk cpu0 R X9 0000000013000000 +11731 clk cpu0 IT (11695) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11731 clk cpu0 R cpsr 800003c0 +11731 clk cpu0 R X8 00000000FFFFFFF9 +11732 clk cpu0 IT (11696) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11732 clk cpu0 MW1 13000000:000013000000_NS 20 +11733 clk cpu0 IT (11697) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11733 clk cpu0 R X0 0064255F54524150 +11734 clk cpu0 IT (11698) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11735 clk cpu0 IT (11699) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11735 clk cpu0 R cpsr 000003c0 +11735 clk cpu0 R X9 0000000000000050 +11736 clk cpu0 IS (11700) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11737 clk cpu0 IT (11701) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11737 clk cpu0 R cpsr 200003c0 +11738 clk cpu0 IS (11702) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11739 clk cpu0 IT (11703) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11739 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11739 clk cpu0 R X9 0000000013000000 +11740 clk cpu0 IT (11704) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11740 clk cpu0 R cpsr 800003c0 +11740 clk cpu0 R X8 00000000FFFFFFFA +11741 clk cpu0 IT (11705) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11741 clk cpu0 MW1 13000000:000013000000_NS 50 +11742 clk cpu0 IT (11706) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11742 clk cpu0 R X0 000064255F545241 +11743 clk cpu0 IT (11707) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11744 clk cpu0 IT (11708) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11744 clk cpu0 R cpsr 000003c0 +11744 clk cpu0 R X9 0000000000000041 +11745 clk cpu0 IS (11709) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11746 clk cpu0 IT (11710) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11746 clk cpu0 R cpsr 200003c0 +11747 clk cpu0 IS (11711) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11748 clk cpu0 IT (11712) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11748 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11748 clk cpu0 R X9 0000000013000000 +11749 clk cpu0 IT (11713) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11749 clk cpu0 R cpsr 800003c0 +11749 clk cpu0 R X8 00000000FFFFFFFB +11750 clk cpu0 IT (11714) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11750 clk cpu0 MW1 13000000:000013000000_NS 41 +11751 clk cpu0 IT (11715) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11751 clk cpu0 R X0 00000064255F5452 +11752 clk cpu0 IT (11716) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11753 clk cpu0 IT (11717) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11753 clk cpu0 R cpsr 000003c0 +11753 clk cpu0 R X9 0000000000000052 +11754 clk cpu0 IS (11718) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11755 clk cpu0 IT (11719) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11755 clk cpu0 R cpsr 200003c0 +11756 clk cpu0 IS (11720) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11757 clk cpu0 IT (11721) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11757 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11757 clk cpu0 R X9 0000000013000000 +11758 clk cpu0 IT (11722) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11758 clk cpu0 R cpsr 800003c0 +11758 clk cpu0 R X8 00000000FFFFFFFC +11759 clk cpu0 IT (11723) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11759 clk cpu0 MW1 13000000:000013000000_NS 52 +11760 clk cpu0 IT (11724) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11760 clk cpu0 R X0 0000000064255F54 +11761 clk cpu0 IT (11725) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11762 clk cpu0 IT (11726) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11762 clk cpu0 R cpsr 000003c0 +11762 clk cpu0 R X9 0000000000000054 +11763 clk cpu0 IS (11727) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11764 clk cpu0 IT (11728) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11764 clk cpu0 R cpsr 200003c0 +11765 clk cpu0 IS (11729) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11766 clk cpu0 IT (11730) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11766 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11766 clk cpu0 R X9 0000000013000000 +11767 clk cpu0 IT (11731) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11767 clk cpu0 R cpsr 800003c0 +11767 clk cpu0 R X8 00000000FFFFFFFD +11768 clk cpu0 IT (11732) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11768 clk cpu0 MW1 13000000:000013000000_NS 54 +11769 clk cpu0 IT (11733) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11769 clk cpu0 R X0 000000000064255F +11770 clk cpu0 IT (11734) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11771 clk cpu0 IT (11735) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11771 clk cpu0 R cpsr 000003c0 +11771 clk cpu0 R X9 000000000000005F +11772 clk cpu0 IS (11736) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11773 clk cpu0 IT (11737) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11773 clk cpu0 R cpsr 200003c0 +11774 clk cpu0 IS (11738) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11775 clk cpu0 IT (11739) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11775 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11775 clk cpu0 R X9 0000000013000000 +11776 clk cpu0 IT (11740) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11776 clk cpu0 R cpsr 800003c0 +11776 clk cpu0 R X8 00000000FFFFFFFE +11777 clk cpu0 IT (11741) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11777 clk cpu0 MW1 13000000:000013000000_NS 5f +11778 clk cpu0 IT (11742) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11778 clk cpu0 R X0 0000000000006425 +11779 clk cpu0 IT (11743) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11780 clk cpu0 IT (11744) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11780 clk cpu0 R cpsr 000003c0 +11780 clk cpu0 R X9 0000000000000025 +11781 clk cpu0 IS (11745) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11782 clk cpu0 IT (11746) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11782 clk cpu0 R cpsr 600003c0 +11783 clk cpu0 IT (11747) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11784 clk cpu0 IT (11748) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +11784 clk cpu0 R X8 00000000FFFFFFFE +11785 clk cpu0 IT (11749) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +11785 clk cpu0 R X9 0000000000000005 +11786 clk cpu0 IT (11750) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +11786 clk cpu0 R X9 000000000004CFFD +11787 clk cpu0 IT (11751) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +11787 clk cpu0 R cpsr 200003c0 +11788 clk cpu0 IT (11752) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +11788 clk cpu0 R X27 000000000004CFFD +11789 clk cpu0 IT (11753) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +11789 clk cpu0 R X20 000000000004CFFE +11790 clk cpu0 IT (11754) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +11791 clk cpu0 IT (11755) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11791 clk cpu0 MR1 0004cffe:00001004cffe_NS 25 +11791 clk cpu0 R X8 0000000000000025 +11792 clk cpu0 IT (11756) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11792 clk cpu0 R cpsr 600003c0 +11793 clk cpu0 IT (11757) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11794 clk cpu0 IT (11758) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +11794 clk cpu0 MW4 03029734:000000829734_NS 00000000 +11795 clk cpu0 IT (11759) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +11795 clk cpu0 R X27 000000000004CFFE +11796 clk cpu0 IT (11760) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +11796 clk cpu0 MR1 0004cfff:00001004cfff_NS 64 +11796 clk cpu0 R X27 000000000004CFFF +11796 clk cpu0 R X28 0000000000000064 +11797 clk cpu0 IT (11761) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +11797 clk cpu0 R cpsr 200003c0 +11798 clk cpu0 IS (11762) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +11799 clk cpu0 IT (11763) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +11800 clk cpu0 IT (11764) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +11800 clk cpu0 R X8 000000000000000C +11801 clk cpu0 IT (11765) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +11801 clk cpu0 R cpsr 800003c0 +11802 clk cpu0 IS (11766) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +11803 clk cpu0 IT (11767) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +11803 clk cpu0 R X9 0000000000092CE0 +11804 clk cpu0 IT (11768) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +11804 clk cpu0 MR1 0004c114:00001004c114_NS 0e +11804 clk cpu0 R X10 000000000000000E +11805 clk cpu0 IT (11769) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +11805 clk cpu0 R X9 0000000000092D18 +11806 clk cpu0 IT (11770) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +11806 clk cpu0 R cpsr 800007c0 +11807 clk cpu0 IT (11771) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +11807 clk cpu0 MR4 03045878:000000845878_NS ffffffd8 +11807 clk cpu0 R cpsr 800003c0 +11807 clk cpu0 R X8 FFFFFFFFFFFFFFD8 +11808 clk cpu0 IS (11772) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +11809 clk cpu0 IT (11773) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +11809 clk cpu0 R X9 00000000FFFFFFE0 +11810 clk cpu0 IT (11774) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +11810 clk cpu0 R cpsr a00003c0 +11811 clk cpu0 IT (11775) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +11811 clk cpu0 MW4 03045878:000000845878_NS ffffffe0 +11812 clk cpu0 IT (11776) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +11813 clk cpu0 IT (11777) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +11813 clk cpu0 MR8 03045868:000000845868_NS 00000000_03045860 +11813 clk cpu0 R X9 0000000003045860 +11814 clk cpu0 IT (11778) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +11814 clk cpu0 R X8 0000000003045838 +11815 clk cpu0 IT (11779) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +11816 clk cpu0 IT (11780) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +11816 clk cpu0 MR8 03045838:000000845838_NS 00000000_00000001 +11816 clk cpu0 R X0 0000000000000001 +11817 clk cpu0 IT (11781) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +11817 clk cpu0 R X1 000000000000000A +11818 clk cpu0 IT (11782) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +11818 clk cpu0 R X30 0000000000092D48 +11819 clk cpu0 IT (11783) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +11819 clk cpu0 R SP_EL0 0000000003045770 +11820 clk cpu0 IT (11784) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +11820 clk cpu0 R X8 3030303030303030 +11821 clk cpu0 IT (11785) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +11821 clk cpu0 MW8 03045778:000000845778_NS 30303030_30303030 +11821 clk cpu0 MW8 03045780:000000845780_NS 30303030_30303030 +11822 clk cpu0 IT (11786) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +11822 clk cpu0 MW4 03045788:000000845788_NS 30303030 +11823 clk cpu0 IS (11787) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +11824 clk cpu0 IT (11788) 00095680:000010095680_NS aa1f03eb O EL0t_n : MOV x11,xzr +11824 clk cpu0 R X11 0000000000000000 +11825 clk cpu0 IT (11789) 00095684:000010095684_NS 2a0103e8 O EL0t_n : MOV w8,w1 +11825 clk cpu0 R X8 000000000000000A +11826 clk cpu0 IT (11790) 00095688:000010095688_NS 1103dc29 O EL0t_n : ADD w9,w1,#0xf7 +11826 clk cpu0 R X9 0000000000000101 +11827 clk cpu0 IT (11791) 0009568c:00001009568c_NS 910023ea O EL0t_n : ADD x10,sp,#8 +11827 clk cpu0 R X10 0000000003045778 +11828 clk cpu0 IT (11792) 00095690:000010095690_NS 9ac8080c O EL0t_n : UDIV x12,x0,x8 +11828 clk cpu0 R X12 0000000000000000 +11829 clk cpu0 IT (11793) 00095694:000010095694_NS 1b08818d O EL0t_n : MSUB w13,w12,w8,w0 +11829 clk cpu0 R X13 0000000000000001 +11830 clk cpu0 IT (11794) 00095698:000010095698_NS 710025bf O EL0t_n : CMP w13,#9 +11830 clk cpu0 R cpsr 800003c0 +11831 clk cpu0 IT (11795) 0009569c:00001009569c_NS 1a9f812e O EL0t_n : CSEL w14,w9,wzr,HI +11831 clk cpu0 R X14 0000000000000000 +11832 clk cpu0 IT (11796) 000956a0:0000100956a0_NS 0b0d01cd O EL0t_n : ADD w13,w14,w13 +11832 clk cpu0 R X13 0000000000000001 +11833 clk cpu0 IT (11797) 000956a4:0000100956a4_NS 1100c1ad O EL0t_n : ADD w13,w13,#0x30 +11833 clk cpu0 R X13 0000000000000031 +11834 clk cpu0 IT (11798) 000956a8:0000100956a8_NS eb08001f O EL0t_n : CMP x0,x8 +11834 clk cpu0 R cpsr 800003c0 +11835 clk cpu0 IT (11799) 000956ac:0000100956ac_NS 382b694d O EL0t_n : STRB w13,[x10,x11] +11835 clk cpu0 MW1 03045778:000000845778_NS 31 +11836 clk cpu0 IT (11800) 000956b0:0000100956b0_NS 9100056b O EL0t_n : ADD x11,x11,#1 +11836 clk cpu0 R X11 0000000000000001 +11837 clk cpu0 IT (11801) 000956b4:0000100956b4_NS aa0c03e0 O EL0t_n : MOV x0,x12 +11837 clk cpu0 R X0 0000000000000000 +11838 clk cpu0 IS (11802) 000956b8:0000100956b8_NS 54fffec2 O EL0t_n : B.CS 0x95690 +11839 clk cpu0 IT (11803) 000956bc:0000100956bc_NS 14000002 O EL0t_n : B 0x956c4 +11840 clk cpu0 IT (11804) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +11840 clk cpu0 R X8 0000000003029000 +11841 clk cpu0 IT (11805) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +11841 clk cpu0 MR4 03029734:000000829734_NS 00000000 +11841 clk cpu0 R X8 0000000000000000 +11842 clk cpu0 IT (11806) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +11842 clk cpu0 R cpsr 800003c0 +11843 clk cpu0 IT (11807) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +11843 clk cpu0 R X8 0000000000000001 +11844 clk cpu0 IT (11808) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +11844 clk cpu0 R cpsr 600003c0 +11845 clk cpu0 IS (11809) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +11846 clk cpu0 IT (11810) 000956dc:0000100956dc_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +11846 clk cpu0 R X9 0000000003045778 +11847 clk cpu0 IT (11811) 000956e0:0000100956e0_NS 93407d08 O EL0t_n : SXTW x8,w8 +11847 clk cpu0 R X8 0000000000000001 +11848 clk cpu0 IT (11812) 000956e4:0000100956e4_NS d1000529 O EL0t_n : SUB x9,x9,#1 +11848 clk cpu0 R X9 0000000003045777 +11849 clk cpu0 IT (11813) 000956e8:0000100956e8_NS b0030c0a O EL0t_n : ADRP x10,0x62166e8 +11849 clk cpu0 R X10 0000000006216000 +11850 clk cpu0 IT (11814) 000956ec:0000100956ec_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +11850 clk cpu0 MR1 03045778:000000845778_NS 31 +11850 clk cpu0 R X11 0000000000000031 +11851 clk cpu0 IT (11815) 000956f0:0000100956f0_NS f940714c O EL0t_n : LDR x12,[x10,#0xe0] +11851 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11851 clk cpu0 R X12 0000000013000000 +11852 clk cpu0 IT (11816) 000956f4:0000100956f4_NS d1000508 O EL0t_n : SUB x8,x8,#1 +11852 clk cpu0 R X8 0000000000000000 +11853 clk cpu0 IT (11817) 000956f8:0000100956f8_NS f100011f O EL0t_n : CMP x8,#0 +11853 clk cpu0 R cpsr 600003c0 +11854 clk cpu0 IT (11818) 000956fc:0000100956fc_NS 3900018b O EL0t_n : STRB w11,[x12,#0] +11854 clk cpu0 MW1 13000000:000013000000_NS 31 +11855 clk cpu0 IS (11819) 00095700:000010095700_NS 54ffff6c O EL0t_n : B.GT 0x956ec +11856 clk cpu0 IT (11820) 00095704:000010095704_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +11856 clk cpu0 R SP_EL0 0000000003045790 +11857 clk cpu0 IT (11821) 00095708:000010095708_NS d65f03c0 O EL0t_n : RET +11858 clk cpu0 IT (11822) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +11858 clk cpu0 R X20 000000000004D000 +11859 clk cpu0 IT (11823) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +11860 clk cpu0 IT (11824) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11860 clk cpu0 MR1 0004d000:00001004d000_NS 20 +11860 clk cpu0 R X8 0000000000000020 +11861 clk cpu0 IT (11825) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11861 clk cpu0 R cpsr 800003c0 +11862 clk cpu0 IS (11826) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11863 clk cpu0 IS (11827) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11864 clk cpu0 IT (11828) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +11864 clk cpu0 R cpsr 400003c0 +11865 clk cpu0 IS (11829) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +11866 clk cpu0 IT (11830) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +11866 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +11866 clk cpu0 R X8 0000000000000000 +11867 clk cpu0 IT (11831) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +11867 clk cpu0 MR8 0004d000:00001004d000_NS 3e000a53_53415020 +11867 clk cpu0 R X0 3E000A5353415020 +11868 clk cpu0 IT (11832) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +11868 clk cpu0 R cpsr 800003c0 +11869 clk cpu0 IT (11833) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +11870 clk cpu0 IT (11834) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +11870 clk cpu0 R X27 0000000000000000 +11871 clk cpu0 IT (11835) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +11871 clk cpu0 R X28 000000000004D000 +11872 clk cpu0 IT (11836) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +11872 clk cpu0 R X8 00000000FFFFFFF8 +11873 clk cpu0 IT (11837) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11873 clk cpu0 R cpsr 000003c0 +11873 clk cpu0 R X9 0000000000000020 +11874 clk cpu0 IS (11838) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11875 clk cpu0 IT (11839) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11875 clk cpu0 R cpsr 800003c0 +11876 clk cpu0 IS (11840) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11877 clk cpu0 IT (11841) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11877 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11877 clk cpu0 R X9 0000000013000000 +11878 clk cpu0 IT (11842) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11878 clk cpu0 R cpsr 800003c0 +11878 clk cpu0 R X8 00000000FFFFFFF9 +11879 clk cpu0 IT (11843) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11879 clk cpu0 MW1 13000000:000013000000_NS 20 +11880 clk cpu0 IT (11844) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11880 clk cpu0 R X0 003E000A53534150 +11881 clk cpu0 IT (11845) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11882 clk cpu0 IT (11846) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11882 clk cpu0 R cpsr 000003c0 +11882 clk cpu0 R X9 0000000000000050 +11883 clk cpu0 IS (11847) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11884 clk cpu0 IT (11848) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11884 clk cpu0 R cpsr 200003c0 +11885 clk cpu0 IS (11849) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11886 clk cpu0 IT (11850) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11886 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11886 clk cpu0 R X9 0000000013000000 +11887 clk cpu0 IT (11851) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11887 clk cpu0 R cpsr 800003c0 +11887 clk cpu0 R X8 00000000FFFFFFFA +11888 clk cpu0 IT (11852) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11888 clk cpu0 MW1 13000000:000013000000_NS 50 +11889 clk cpu0 IT (11853) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11889 clk cpu0 R X0 00003E000A535341 +11890 clk cpu0 IT (11854) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11891 clk cpu0 IT (11855) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11891 clk cpu0 R cpsr 000003c0 +11891 clk cpu0 R X9 0000000000000041 +11892 clk cpu0 IS (11856) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11893 clk cpu0 IT (11857) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11893 clk cpu0 R cpsr 200003c0 +11894 clk cpu0 IS (11858) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11895 clk cpu0 IT (11859) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11895 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11895 clk cpu0 R X9 0000000013000000 +11896 clk cpu0 IT (11860) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11896 clk cpu0 R cpsr 800003c0 +11896 clk cpu0 R X8 00000000FFFFFFFB +11897 clk cpu0 IT (11861) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11897 clk cpu0 MW1 13000000:000013000000_NS 41 +11898 clk cpu0 IT (11862) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11898 clk cpu0 R X0 0000003E000A5353 +11899 clk cpu0 IT (11863) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11900 clk cpu0 IT (11864) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11900 clk cpu0 R cpsr 000003c0 +11900 clk cpu0 R X9 0000000000000053 +11901 clk cpu0 IS (11865) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11902 clk cpu0 IT (11866) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11902 clk cpu0 R cpsr 200003c0 +11903 clk cpu0 IS (11867) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11904 clk cpu0 IT (11868) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11904 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11904 clk cpu0 R X9 0000000013000000 +11905 clk cpu0 IT (11869) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11905 clk cpu0 R cpsr 800003c0 +11905 clk cpu0 R X8 00000000FFFFFFFC +11906 clk cpu0 IT (11870) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11906 clk cpu0 MW1 13000000:000013000000_NS 53 +11907 clk cpu0 IT (11871) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11907 clk cpu0 R X0 000000003E000A53 +11908 clk cpu0 IT (11872) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11909 clk cpu0 IT (11873) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11909 clk cpu0 R cpsr 000003c0 +11909 clk cpu0 R X9 0000000000000053 +11910 clk cpu0 IS (11874) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11911 clk cpu0 IT (11875) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11911 clk cpu0 R cpsr 200003c0 +11912 clk cpu0 IS (11876) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11913 clk cpu0 IT (11877) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11913 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11913 clk cpu0 R X9 0000000013000000 +11914 clk cpu0 IT (11878) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11914 clk cpu0 R cpsr 800003c0 +11914 clk cpu0 R X8 00000000FFFFFFFD +11915 clk cpu0 IT (11879) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11915 clk cpu0 MW1 13000000:000013000000_NS 53 +11916 clk cpu0 IT (11880) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11916 clk cpu0 R X0 00000000003E000A +11917 clk cpu0 IT (11881) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11918 clk cpu0 IT (11882) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11918 clk cpu0 R cpsr 000003c0 +11918 clk cpu0 R X9 000000000000000A +11919 clk cpu0 IS (11883) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11920 clk cpu0 IT (11884) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +11920 clk cpu0 R cpsr 800003c0 +11921 clk cpu0 IS (11885) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +11922 clk cpu0 IT (11886) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +11922 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +11922 clk cpu0 R X9 0000000013000000 +11923 clk cpu0 IT (11887) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +11923 clk cpu0 R cpsr 800003c0 +11923 clk cpu0 R X8 00000000FFFFFFFE +TUBE CPU0: >>CPU0: PART_1 PASS +11924 clk cpu0 IT (11888) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +11924 clk cpu0 MW1 13000000:000013000000_NS 0a +11925 clk cpu0 IT (11889) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +11925 clk cpu0 R X0 0000000000003E00 +11926 clk cpu0 IT (11890) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +11927 clk cpu0 IT (11891) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +11927 clk cpu0 R cpsr 400003c0 +11927 clk cpu0 R X9 0000000000000000 +11928 clk cpu0 IT (11892) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +11929 clk cpu0 IT (11893) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +11929 clk cpu0 R X8 00000000FFFFFFFE +11930 clk cpu0 IT (11894) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +11930 clk cpu0 R X9 0000000000000005 +11931 clk cpu0 IT (11895) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +11931 clk cpu0 R X9 000000000004D005 +11932 clk cpu0 IT (11896) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +11932 clk cpu0 R cpsr 200003c0 +11933 clk cpu0 IT (11897) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +11933 clk cpu0 R X27 000000000004D005 +11934 clk cpu0 IT (11898) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +11934 clk cpu0 R X20 000000000004D006 +11935 clk cpu0 IT (11899) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +11936 clk cpu0 IT (11900) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +11936 clk cpu0 MR1 0004d006:00001004d006_NS 00 +11936 clk cpu0 R X8 0000000000000000 +11937 clk cpu0 IT (11901) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +11937 clk cpu0 R cpsr 800003c0 +11938 clk cpu0 IS (11902) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +11939 clk cpu0 IT (11903) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +11940 clk cpu0 IT (11904) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +11941 clk cpu0 IT (11905) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +11941 clk cpu0 MR8 03045820:000000845820_NS 00000000_0004cfef +11941 clk cpu0 MR8 03045828:000000845828_NS 00000000_0009c560 +11941 clk cpu0 R X19 000000000004CFEF +11941 clk cpu0 R X30 000000000009C560 +11942 clk cpu0 IT (11906) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +11942 clk cpu0 MR8 03045810:000000845810_NS 00000000_00000000 +11942 clk cpu0 MR8 03045818:000000845818_NS 00000000_03008528 +11942 clk cpu0 R X20 0000000003008528 +11942 clk cpu0 R X21 0000000000000000 +11943 clk cpu0 IT (11907) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +11943 clk cpu0 MR8 03045800:000000845800_NS 00000000_06216000 +11943 clk cpu0 MR8 03045808:000000845808_NS 00000000_03029000 +11943 clk cpu0 R X22 0000000003029000 +11943 clk cpu0 R X23 0000000006216000 +11944 clk cpu0 IT (11908) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +11944 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_00000000 +11944 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0620e000 +11944 clk cpu0 R X24 000000000620E000 +11944 clk cpu0 R X25 0000000000000000 +11945 clk cpu0 IT (11909) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +11945 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +11945 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_00000000 +11945 clk cpu0 R X26 0000000000000000 +11945 clk cpu0 R X27 0000000000000000 +11946 clk cpu0 IT (11910) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +11946 clk cpu0 MR8 030457d0:0000008457d0_NS ff7fff7f_ff7fff7f +11946 clk cpu0 R X28 FF7FFF7FFF7FFF7F +11947 clk cpu0 IT (11911) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +11947 clk cpu0 R SP_EL0 0000000003045830 +11948 clk cpu0 IT (11912) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +11949 clk cpu0 IT (11913) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +11949 clk cpu0 R X0 0000000000000001 +11950 clk cpu0 IT (11914) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +11950 clk cpu0 R X1 0000000000000000 +11951 clk cpu0 IT (11915) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +11951 clk cpu0 R X2 0000000000000000 +11952 clk cpu0 IT (11916) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +11953 clk cpu0 IT (11917) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +11954 clk cpu0 IT (11918) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +11954 clk cpu0 R X0 0000000003008528 +11955 clk cpu0 IT (11919) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +11955 clk cpu0 R X30 000000000009C57C +11956 clk cpu0 IT (11920) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +11957 clk cpu0 IT (11921) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +11957 clk cpu0 R X8 0000000006216000 +11958 clk cpu0 IT (11922) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +11958 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +11958 clk cpu0 R X8 0000000000000001 +11959 clk cpu0 IT (11923) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +11959 clk cpu0 R cpsr 800003c0 +11960 clk cpu0 IT (11924) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +11961 clk cpu0 IT (11925) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +11962 clk cpu0 IT (11926) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +11962 clk cpu0 MR8 030458b0:0000008458b0_NS 00000000_60000000 +11962 clk cpu0 MR8 030458b8:0000008458b8_NS 00000000_0009aef4 +11962 clk cpu0 R X19 0000000060000000 +11962 clk cpu0 R X30 000000000009AEF4 +11963 clk cpu0 IT (11927) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +11963 clk cpu0 MR8 030458a0:0000008458a0_NS 00000000_00000001 +11963 clk cpu0 MR8 030458a8:0000008458a8_NS 00000000_00000000 +11963 clk cpu0 R X20 0000000000000000 +11963 clk cpu0 R X21 0000000000000001 +11964 clk cpu0 IT (11928) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +11964 clk cpu0 R SP_EL0 00000000030458C0 +11965 clk cpu0 IT (11929) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +11966 clk cpu0 IT (11930) 0009aef4:00001009aef4_NS 14000007 O EL0t_n : B 0x9af10 +11966 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0179 ALLOC 0x00001009af00_NS +11966 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0bc0 ALLOC 0x00001009af00_NS +11967 clk cpu0 IT (11931) 0009af10:00001009af10_NS 52800188 O EL0t_n : MOV w8,#0xc +11967 clk cpu0 R X8 000000000000000C +11968 clk cpu0 IT (11932) 0009af14:00001009af14_NS 52900609 O EL0t_n : MOV w9,#0x8030 +11968 clk cpu0 R X9 0000000000008030 +11969 clk cpu0 IT (11933) 0009af18:00001009af18_NS 9b086288 O EL0t_n : MADD x8,x20,x8,x24 +11969 clk cpu0 R X8 000000000620E000 +11970 clk cpu0 IT (11934) 0009af1c:00001009af1c_NS 2a1f03f9 O EL0t_n : MOV w25,wzr +11970 clk cpu0 R X25 0000000000000000 +11971 clk cpu0 IT (11935) 0009af20:00001009af20_NS 2a1f03fa O EL0t_n : MOV w26,wzr +11971 clk cpu0 R X26 0000000000000000 +11972 clk cpu0 IT (11936) 0009af24:00001009af24_NS 8b090108 O EL0t_n : ADD x8,x8,x9 +11972 clk cpu0 R X8 0000000006216030 +11973 clk cpu0 IT (11937) 0009af28:00001009af28_NS 5280003b O EL0t_n : MOV w27,#1 +11973 clk cpu0 R X27 0000000000000001 +11974 clk cpu0 IT (11938) 0009af2c:00001009af2c_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +11974 clk cpu0 MR4 06216030:000015216030_NS 00000000 +11974 clk cpu0 R X9 0000000000000000 +11975 clk cpu0 IT (11939) 0009af30:00001009af30_NS 11000529 O EL0t_n : ADD w9,w9,#1 +11975 clk cpu0 R X9 0000000000000001 +11976 clk cpu0 IT (11940) 0009af34:00001009af34_NS b9000109 O EL0t_n : STR w9,[x8,#0] +11976 clk cpu0 MW4 06216030:000015216030_NS 00000001 +11977 clk cpu0 IT (11941) 0009af38:00001009af38_NS b940fae8 O EL0t_n : LDR w8,[x23,#0xf8] +11977 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +11977 clk cpu0 R X8 0000000000000003 +11978 clk cpu0 IT (11942) 0009af3c:00001009af3c_NS 35000328 O EL0t_n : CBNZ w8,0x9afa0 +11978 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017c INVAL 0x000010092f80 +11978 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017c ALLOC 0x00001009af80_NS +11978 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0be2 ALLOC 0x00001009af80_NS +11979 clk cpu0 IT (11943) 0009afa0:00001009afa0_NS 90030bf4 O EL0t_n : ADRP x20,0x6216fa0 +11979 clk cpu0 R X20 0000000006216000 +11980 clk cpu0 IT (11944) 0009afa4:00001009afa4_NS 91012294 O EL0t_n : ADD x20,x20,#0x48 +11980 clk cpu0 R X20 0000000006216048 +11981 clk cpu0 IT (11945) 0009afa8:00001009afa8_NS 91016a80 O EL0t_n : ADD x0,x20,#0x5a +11981 clk cpu0 R X0 00000000062160A2 +11982 clk cpu0 IT (11946) 0009afac:00001009afac_NS 97fff66c O EL0t_n : BL 0x9895c +11982 clk cpu0 R X30 000000000009AFB0 +11983 clk cpu0 IT (11947) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +11983 clk cpu0 R X8 0000000006216000 +11984 clk cpu0 IT (11948) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +11984 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +11984 clk cpu0 R X8 0000000000000001 +11985 clk cpu0 IT (11949) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +11985 clk cpu0 R cpsr 800003c0 +11986 clk cpu0 IT (11950) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +11987 clk cpu0 IT (11951) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +11988 clk cpu0 IT (11952) 0009afb0:00001009afb0_NS b9400288 O EL0t_n : LDR w8,[x20,#0] +11988 clk cpu0 MR4 06216048:000015216048_NS 00000003 +11988 clk cpu0 R X8 0000000000000003 +11989 clk cpu0 IS (11953) 0009afb4:00001009afb4_NS 34000348 O EL0t_n : CBZ w8,0x9b01c +11990 clk cpu0 IS (11954) 0009afb8:00001009afb8_NS 3400013b O EL0t_n : CBZ w27,0x9afdc +11991 clk cpu0 IT (11955) 0009afbc:00001009afbc_NS 7100051f O EL0t_n : CMP w8,#1 +11991 clk cpu0 R cpsr 200003c0 +11991 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017e ALLOC 0x00001009afc0_NS +11991 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0bf0 ALLOC 0x00001009afc0_NS +11992 clk cpu0 IS (11956) 0009afc0:00001009afc0_NS 54000200 O EL0t_n : B.EQ 0x9b000 +11993 clk cpu0 IT (11957) 0009afc4:00001009afc4_NS 71000d1f O EL0t_n : CMP w8,#3 +11993 clk cpu0 R cpsr 600003c0 +11994 clk cpu0 IS (11958) 0009afc8:00001009afc8_NS 540002a1 O EL0t_n : B.NE 0x9b01c +11995 clk cpu0 IT (11959) 0009afcc:00001009afcc_NS 90030be8 O EL0t_n : ADRP x8,0x6216fcc +11995 clk cpu0 R X8 0000000006216000 +11996 clk cpu0 IT (11960) 0009afd0:00001009afd0_NS 52800089 O EL0t_n : MOV w9,#4 +11996 clk cpu0 R X9 0000000000000004 +11997 clk cpu0 IT (11961) 0009afd4:00001009afd4_NS b9004909 O EL0t_n : STR w9,[x8,#0x48] +11997 clk cpu0 MW4 06216048:000015216048_NS 00000004 +11998 clk cpu0 IT (11962) 0009afd8:00001009afd8_NS 14000011 O EL0t_n : B 0x9b01c +11998 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0180 ALLOC 0x00001009b000_NS +11998 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c02 ALLOC 0x00001009b000_NS +11999 clk cpu0 IT (11963) 0009b01c:00001009b01c_NS f0030bc0 O EL0t_n : ADRP x0,0x621601c +11999 clk cpu0 R X0 0000000006216000 +12000 clk cpu0 IT (11964) 0009b020:00001009b020_NS 91028800 O EL0t_n : ADD x0,x0,#0xa2 +12000 clk cpu0 R X0 00000000062160A2 +12001 clk cpu0 IT (11965) 0009b024:00001009b024_NS 94000285 O EL0t_n : BL 0x9ba38 +12001 clk cpu0 R X30 000000000009B028 +12002 clk cpu0 IT (11966) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +12003 clk cpu0 IT (11967) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +12003 clk cpu0 R X8 0000000006216000 +12004 clk cpu0 IT (11968) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +12004 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +12004 clk cpu0 R X8 0000000000000001 +12005 clk cpu0 IT (11969) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +12005 clk cpu0 R cpsr 800003c0 +12006 clk cpu0 IT (11970) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +12007 clk cpu0 IT (11971) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +12008 clk cpu0 IT (11972) 0009b028:00001009b028_NS 2a1303e0 O EL0t_n : MOV w0,w19 +12008 clk cpu0 R X0 0000000060000000 +12009 clk cpu0 IT (11973) 0009b02c:00001009b02c_NS a9447bf3 O EL0t_n : LDP x19,x30,[sp,#0x40] +12009 clk cpu0 MR8 03045900:000000845900_NS 001fffff_fffffc00 +12009 clk cpu0 MR8 03045908:000000845908_NS 00000000_01000184 +12009 clk cpu0 R X19 001FFFFFFFFFFC00 +12009 clk cpu0 R X30 0000000001000184 +12010 clk cpu0 IT (11974) 0009b030:00001009b030_NS a94353f5 O EL0t_n : LDP x21,x20,[sp,#0x30] +12010 clk cpu0 MR8 030458f0:0000008458f0_NS 00000000_02f00018 +12010 clk cpu0 MR8 030458f8:0000008458f8_NS 3ffc0000_3ffc0000 +12010 clk cpu0 R X20 3FFC00003FFC0000 +12010 clk cpu0 R X21 0000000002F00018 +12011 clk cpu0 IT (11975) 0009b034:00001009b034_NS a9425bf7 O EL0t_n : LDP x23,x22,[sp,#0x20] +12011 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_00000000 +12011 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_a0000000 +12011 clk cpu0 R X22 00000000A0000000 +12011 clk cpu0 R X23 0000000000000000 +12012 clk cpu0 IT (11976) 0009b038:00001009b038_NS a94163f9 O EL0t_n : LDP x25,x24,[sp,#0x10] +12012 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_0000003c +12012 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_00007c00 +12012 clk cpu0 R X24 0000000000007C00 +12012 clk cpu0 R X25 000000000000003C +12013 clk cpu0 IT (11977) 0009b03c:00001009b03c_NS a8c56bfb O EL0t_n : LDP x27,x26,[sp],#0x50 +12013 clk cpu0 MR8 030458c0:0000008458c0_NS 00010001_00010001 +12013 clk cpu0 MR8 030458c8:0000008458c8_NS ffe000ff_ffe000ff +12013 clk cpu0 R SP_EL0 0000000003045910 +12013 clk cpu0 R X26 FFE000FFFFE000FF +12013 clk cpu0 R X27 0001000100010001 +12013 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0183 INVAL 0x0000100a7040_NS +12013 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0183 ALLOC 0x00001009b040_NS +12013 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0c13 ALLOC 0x00001009b040_NS +12014 clk cpu0 IT (11978) 0009b040:00001009b040_NS 14003082 O EL0t_n : B 0xa7248 +12015 clk cpu0 IT (11979) 000a7248:0000100a7248_NS d51b4200 O EL0t_n : MSR NZCV,x0 +12015 clk cpu0 R cpsr 600003c0 +12015 clk cpu0 R NZCV 00000000:60000000 +12016 clk cpu0 IT (11980) 000a724c:0000100a724c_NS d65f03c0 O EL0t_n : RET +12017 clk cpu0 IT (11981) 01000184 d2800040 O EL0t_n : MOV x0,#2 +12017 clk cpu0 R X0 0000000000000002 +12018 clk cpu0 IT (11982) 01000188 97c26bc2 O EL0t_n : BL 0x9b090 +12018 clk cpu0 R X30 000000000100018C +12019 clk cpu0 IT (11983) 0009b090:00001009b090_NS a9bd5bf7 O EL0t_n : STP x23,x22,[sp,#-0x30]! +12019 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_00000000 +12019 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_a0000000 +12019 clk cpu0 R SP_EL0 00000000030458E0 +12020 clk cpu0 IT (11984) 0009b094:00001009b094_NS a90153f5 O EL0t_n : STP x21,x20,[sp,#0x10] +12020 clk cpu0 MW8 030458f0:0000008458f0_NS 00000000_02f00018 +12020 clk cpu0 MW8 030458f8:0000008458f8_NS 3ffc0000_3ffc0000 +12021 clk cpu0 IT (11985) 0009b098:00001009b098_NS a9027bf3 O EL0t_n : STP x19,x30,[sp,#0x20] +12021 clk cpu0 MW8 03045900:000000845900_NS 001fffff_fffffc00 +12021 clk cpu0 MW8 03045908:000000845908_NS 00000000_0100018c +12022 clk cpu0 IT (11986) 0009b09c:00001009b09c_NS 2a0003f4 O EL0t_n : MOV w20,w0 +12022 clk cpu0 R X20 0000000000000002 +12023 clk cpu0 IT (11987) 0009b0a0:00001009b0a0_NS 94003070 O EL0t_n : BL 0xa7260 +12023 clk cpu0 R X30 000000000009B0A4 +12024 clk cpu0 IT (11988) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +12024 clk cpu0 R X0 0000000000000000 +12025 clk cpu0 IT (11989) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +12025 clk cpu0 R cpsr 600007c0 +12026 clk cpu0 IT (11990) 0009b0a4:00001009b0a4_NS 2a0003f5 O EL0t_n : MOV w21,w0 +12026 clk cpu0 R cpsr 600003c0 +12026 clk cpu0 R X21 0000000000000000 +12027 clk cpu0 IT (11991) 0009b0a8:00001009b0a8_NS 94003066 O EL0t_n : BL 0xa7240 +12027 clk cpu0 R X30 000000000009B0AC +12028 clk cpu0 IT (11992) 000a7240:0000100a7240_NS d53b4200 O EL0t_n : MRS x0,NZCV +12028 clk cpu0 R X0 0000000060000000 +12029 clk cpu0 IT (11993) 000a7244:0000100a7244_NS d65f03c0 O EL0t_n : RET +12030 clk cpu0 IT (11994) 0009b0ac:00001009b0ac_NS f0030b96 O EL0t_n : ADRP x22,0x620e0ac +12030 clk cpu0 R X22 000000000620E000 +12031 clk cpu0 IT (11995) 0009b0b0:00001009b0b0_NS 910002d6 O EL0t_n : ADD x22,x22,#0 +12031 clk cpu0 R X22 000000000620E000 +12032 clk cpu0 IT (11996) 0009b0b4:00001009b0b4_NS 52800308 O EL0t_n : MOV w8,#0x18 +12032 clk cpu0 R X8 0000000000000018 +12033 clk cpu0 IT (11997) 0009b0b8:00001009b0b8_NS 9ba85aa8 O EL0t_n : UMADDL x8,w21,w8,x22 +12033 clk cpu0 R X8 000000000620E000 +12034 clk cpu0 IT (11998) 0009b0bc:00001009b0bc_NS 91402108 O EL0t_n : ADD x8,x8,#8,LSL #12 +12034 clk cpu0 R X8 0000000006216000 +12035 clk cpu0 IT (11999) 0009b0c0:00001009b0c0_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +12035 clk cpu0 MR4 06216000:000015216000_NS 00000001 +12035 clk cpu0 R X9 0000000000000001 +12036 clk cpu0 IT (12000) 0009b0c4:00001009b0c4_NS 2a0003f3 O EL0t_n : MOV w19,w0 +12036 clk cpu0 R X19 0000000060000000 +12037 clk cpu0 IT (12001) 0009b0c8:00001009b0c8_NS 11000529 O EL0t_n : ADD w9,w9,#1 +12037 clk cpu0 R X9 0000000000000002 +12038 clk cpu0 IT (12002) 0009b0cc:00001009b0cc_NS 6b14013f O EL0t_n : CMP w9,w20 +12038 clk cpu0 R cpsr 600003c0 +12039 clk cpu0 IS (12003) 0009b0d0:00001009b0d0_NS 54000101 O EL0t_n : B.NE 0x9b0f0 +12040 clk cpu0 IT (12004) 0009b0d4:00001009b0d4_NS 2a1503f5 O EL0t_n : MOV w21,w21 +12040 clk cpu0 R X21 0000000000000000 +12041 clk cpu0 IT (12005) 0009b0d8:00001009b0d8_NS 5280030a O EL0t_n : MOV w10,#0x18 +12041 clk cpu0 R X10 0000000000000018 +12042 clk cpu0 IT (12006) 0009b0dc:00001009b0dc_NS 9b0a5aaa O EL0t_n : MADD x10,x21,x10,x22 +12042 clk cpu0 R X10 000000000620E000 +12043 clk cpu0 IT (12007) 0009b0e0:00001009b0e0_NS 5290018b O EL0t_n : MOV w11,#0x800c +12043 clk cpu0 R X11 000000000000800C +12044 clk cpu0 IT (12008) 0009b0e4:00001009b0e4_NS 8b0b0157 O EL0t_n : ADD x23,x10,x11 +12044 clk cpu0 R X23 000000000621600C +12045 clk cpu0 IT (12009) 0009b0e8:00001009b0e8_NS b94002ea O EL0t_n : LDR w10,[x23,#0] +12045 clk cpu0 MR4 0621600c:00001521600c_NS 00000000 +12045 clk cpu0 R X10 0000000000000000 +12046 clk cpu0 IT (12010) 0009b0ec:00001009b0ec_NS 3400036a O EL0t_n : CBZ w10,0x9b158 +12047 clk cpu0 IT (12011) 0009b158:00001009b158_NS f0030bca O EL0t_n : ADRP x10,0x6216158 +12047 clk cpu0 R X10 0000000006216000 +12048 clk cpu0 IT (12012) 0009b15c:00001009b15c_NS b940f94a O EL0t_n : LDR w10,[x10,#0xf8] +12048 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +12048 clk cpu0 R X10 0000000000000003 +12049 clk cpu0 IT (12013) 0009b160:00001009b160_NS b9000109 O EL0t_n : STR w9,[x8,#0] +12049 clk cpu0 MW4 06216000:000015216000_NS 00000002 +12050 clk cpu0 IS (12014) 0009b164:00001009b164_NS 340000ea O EL0t_n : CBZ w10,0x9b180 +12051 clk cpu0 IT (12015) 0009b168:00001009b168_NS d0fffd81 O EL0t_n : ADRP x1,0x4d168 +12051 clk cpu0 R X1 000000000004D000 +12052 clk cpu0 IT (12016) 0009b16c:00001009b16c_NS 91001c21 O EL0t_n : ADD x1,x1,#7 +12052 clk cpu0 R X1 000000000004D007 +12053 clk cpu0 IT (12017) 0009b170:00001009b170_NS 52800020 O EL0t_n : MOV w0,#1 +12053 clk cpu0 R X0 0000000000000001 +12054 clk cpu0 IT (12018) 0009b174:00001009b174_NS 2a1503e2 O EL0t_n : MOV w2,w21 +12054 clk cpu0 R X2 0000000000000000 +12055 clk cpu0 IT (12019) 0009b178:00001009b178_NS 2a1403e3 O EL0t_n : MOV w3,w20 +12055 clk cpu0 R X3 0000000000000002 +12056 clk cpu0 IT (12020) 0009b17c:00001009b17c_NS 940004d4 O EL0t_n : BL 0x9c4cc +12056 clk cpu0 R X30 000000000009B180 +12057 clk cpu0 IT (12021) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +12057 clk cpu0 R SP_EL0 0000000003045850 +12058 clk cpu0 IT (12022) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +12058 clk cpu0 R X8 0000000006216000 +12059 clk cpu0 IT (12023) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +12059 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +12059 clk cpu0 R X8 0000000000000003 +12060 clk cpu0 IT (12024) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +12060 clk cpu0 MW8 030458c0:0000008458c0_NS 00000000_00000000 +12060 clk cpu0 MW8 030458c8:0000008458c8_NS 00000000_00000002 +12061 clk cpu0 IT (12025) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +12061 clk cpu0 MW8 030458d0:0000008458d0_NS 00000000_60000000 +12061 clk cpu0 MW8 030458d8:0000008458d8_NS 00000000_0009b180 +12062 clk cpu0 IT (12026) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +12062 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +12062 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000002 +12063 clk cpu0 IT (12027) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +12063 clk cpu0 R cpsr 200003c0 +12064 clk cpu0 IT (12028) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +12064 clk cpu0 MW8 03045860:000000845860_NS 00000000_a0000000 +12064 clk cpu0 MW8 03045868:000000845868_NS 7e007e00_7e007e00 +12065 clk cpu0 IT (12029) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +12065 clk cpu0 MW8 03045870:000000845870_NS ffffffff_c1ffffff +12065 clk cpu0 MW8 03045878:000000845878_NS 00000000_03045910 +12066 clk cpu0 IT (12030) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +12066 clk cpu0 MW8 030458b0:0000008458b0_NS 00000000_00000000 +12066 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_00000000 +12067 clk cpu0 IT (12031) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +12067 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_00000000 +12067 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_00000000 +12068 clk cpu0 IS (12032) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +12069 clk cpu0 IT (12033) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +12069 clk cpu0 R X20 0000000003008000 +12070 clk cpu0 IT (12034) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +12070 clk cpu0 R X20 0000000003008528 +12071 clk cpu0 IT (12035) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +12071 clk cpu0 R X0 0000000003008528 +12072 clk cpu0 IT (12036) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +12072 clk cpu0 R X19 000000000004D007 +12073 clk cpu0 IT (12037) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +12073 clk cpu0 R X30 000000000009C510 +12074 clk cpu0 IT (12038) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +12074 clk cpu0 R X8 0000000006216000 +12075 clk cpu0 IT (12039) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +12075 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +12075 clk cpu0 R X8 0000000000000001 +12076 clk cpu0 IT (12040) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +12076 clk cpu0 R cpsr 800003c0 +12077 clk cpu0 IT (12041) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +12078 clk cpu0 IT (12042) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +12079 clk cpu0 IT (12043) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +12079 clk cpu0 R X9 0000000003045850 +12080 clk cpu0 IT (12044) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +12080 clk cpu0 R X8 00000000FFFFFFD0 +12081 clk cpu0 IT (12045) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +12081 clk cpu0 R X10 00000000030458E0 +12082 clk cpu0 IT (12046) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +12082 clk cpu0 R X9 0000000003045880 +12083 clk cpu0 IT (12047) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +12083 clk cpu0 R X0 0000000000000000 +12084 clk cpu0 IT (12048) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +12084 clk cpu0 R X1 0000000000000000 +12085 clk cpu0 IT (12049) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +12085 clk cpu0 R X2 0000000000000000 +12086 clk cpu0 IT (12050) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +12086 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_ffffffd0 +12087 clk cpu0 IT (12051) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +12087 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_030458e0 +12087 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_03045880 +12088 clk cpu0 IT (12052) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +12089 clk cpu0 IT (12053) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +12089 clk cpu0 MR8 030458a8:0000008458a8_NS 00000000_03045880 +12089 clk cpu0 MR8 030458b0:0000008458b0_NS 00000000_00000000 +12089 clk cpu0 R X8 0000000000000000 +12089 clk cpu0 R X10 0000000003045880 +12090 clk cpu0 IT (12054) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +12090 clk cpu0 MR8 030458a0:0000008458a0_NS 00000000_030458e0 +12090 clk cpu0 R X9 00000000030458E0 +12091 clk cpu0 IT (12055) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +12091 clk cpu0 MR8 030458b8:0000008458b8_NS 00000000_ffffffd0 +12091 clk cpu0 R X11 00000000FFFFFFD0 +12092 clk cpu0 IT (12056) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +12092 clk cpu0 R X21 0000000000000000 +12093 clk cpu0 IT (12057) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +12093 clk cpu0 R X1 0000000003045880 +12094 clk cpu0 IT (12058) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +12094 clk cpu0 R X0 000000000004D007 +12095 clk cpu0 IT (12059) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +12095 clk cpu0 MW8 03045888:000000845888_NS 00000000_03045880 +12095 clk cpu0 MW8 03045890:000000845890_NS 00000000_00000000 +12096 clk cpu0 IT (12060) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +12096 clk cpu0 MW8 03045880:000000845880_NS 00000000_030458e0 +12097 clk cpu0 IT (12061) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +12097 clk cpu0 MW8 03045898:000000845898_NS 00000000_ffffffd0 +12098 clk cpu0 IT (12062) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +12098 clk cpu0 R X30 000000000009C560 +12099 clk cpu0 IT (12063) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +12099 clk cpu0 R SP_EL0 00000000030457B0 +12100 clk cpu0 IT (12064) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +12100 clk cpu0 MW8 03045840:000000845840_NS 00000000_0004d007 +12100 clk cpu0 MW8 03045848:000000845848_NS 00000000_0009c560 +12101 clk cpu0 IT (12065) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +12101 clk cpu0 R X19 0000000003045880 +12102 clk cpu0 IT (12066) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +12102 clk cpu0 R X1 000000000004C000 +12103 clk cpu0 IT (12067) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +12103 clk cpu0 MW8 03045830:000000845830_NS 00000000_00000000 +12103 clk cpu0 MW8 03045838:000000845838_NS 00000000_03008528 +12104 clk cpu0 IT (12068) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +12104 clk cpu0 R X20 000000000004D007 +12105 clk cpu0 IT (12069) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +12105 clk cpu0 R X1 000000000004C00B +12106 clk cpu0 IT (12070) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +12106 clk cpu0 R X0 00000000030457B4 +12107 clk cpu0 IT (12071) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +12107 clk cpu0 R X2 000000000000003B +12108 clk cpu0 IT (12072) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +12108 clk cpu0 MW8 030457f0:0000008457f0_NS ff7fff7f_ff7fff7f +12109 clk cpu0 IT (12073) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +12109 clk cpu0 MW8 03045800:000000845800_NS 00010001_00010001 +12109 clk cpu0 MW8 03045808:000000845808_NS ffe000ff_ffe000ff +12110 clk cpu0 IT (12074) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +12110 clk cpu0 MW8 03045810:000000845810_NS 00000000_0000003c +12110 clk cpu0 MW8 03045818:000000845818_NS 00000000_00007c00 +12111 clk cpu0 IT (12075) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +12111 clk cpu0 MW8 03045820:000000845820_NS 00000000_0621600c +12111 clk cpu0 MW8 03045828:000000845828_NS 00000000_0620e000 +12112 clk cpu0 IT (12076) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +12112 clk cpu0 R X30 0000000000092B80 +12113 clk cpu0 IT (12077) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +12113 clk cpu0 MW8 030457a0:0000008457a0_NS 00000000_03045880 +12113 clk cpu0 MW8 030457a8:0000008457a8_NS 00000000_00092b80 +12113 clk cpu0 R SP_EL0 00000000030457A0 +12114 clk cpu0 IT (12078) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +12114 clk cpu0 R X19 00000000030457B4 +12115 clk cpu0 IT (12079) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +12115 clk cpu0 R X30 00000000000104DC +12116 clk cpu0 IT (12080) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +12116 clk cpu0 R cpsr 200003c0 +12117 clk cpu0 IS (12081) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +12118 clk cpu0 IT (12082) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +12118 clk cpu0 R cpsr 400003c0 +12119 clk cpu0 IT (12083) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +12120 clk cpu0 IT (12084) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +12120 clk cpu0 R cpsr 000003c0 +12120 clk cpu0 R X10 0000000000000003 +12121 clk cpu0 IS (12085) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +12122 clk cpu0 IT (12086) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +12122 clk cpu0 R X9 0000000000000020 +12123 clk cpu0 IT (12087) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +12123 clk cpu0 R X8 000000000004C008 +12124 clk cpu0 IT (12088) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +12124 clk cpu0 R cpsr 200003c0 +12125 clk cpu0 IT (12089) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +12125 clk cpu0 R X9 0000000000000008 +12126 clk cpu0 IS (12090) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +12127 clk cpu0 IT (12091) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +12127 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +12127 clk cpu0 R X12 000000000A00000A +12128 clk cpu0 IT (12092) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +12128 clk cpu0 R X10 0000000000000018 +12129 clk cpu0 IT (12093) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +12129 clk cpu0 R X11 000000000000003B +12130 clk cpu0 IT (12094) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12130 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +12130 clk cpu0 R X8 000000000004C00C +12130 clk cpu0 R X13 000000006F727245 +12131 clk cpu0 IT (12095) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12131 clk cpu0 R X12 000000000000000A +12132 clk cpu0 IT (12096) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12132 clk cpu0 R X11 0000000000000037 +12133 clk cpu0 IT (12097) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12133 clk cpu0 R cpsr 200003c0 +12134 clk cpu0 IT (12098) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12134 clk cpu0 R X14 0000000072724500 +12135 clk cpu0 IT (12099) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12135 clk cpu0 R X12 000000007272450A +12136 clk cpu0 IT (12100) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12136 clk cpu0 MW4 030457b4:0000008457b4_NS 7272450a +12136 clk cpu0 R X0 00000000030457B8 +12137 clk cpu0 IT (12101) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12137 clk cpu0 R X12 000000006F727245 +12138 clk cpu0 IT (12102) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12139 clk cpu0 IT (12103) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12139 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +12139 clk cpu0 R X8 000000000004C010 +12139 clk cpu0 R X13 0000000049203A72 +12140 clk cpu0 IT (12104) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12140 clk cpu0 R X12 000000000000006F +12141 clk cpu0 IT (12105) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12141 clk cpu0 R X11 0000000000000033 +12142 clk cpu0 IT (12106) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12142 clk cpu0 R cpsr 200003c0 +12143 clk cpu0 IT (12107) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12143 clk cpu0 R X14 00000000203A7200 +12144 clk cpu0 IT (12108) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12144 clk cpu0 R X12 00000000203A726F +12145 clk cpu0 IT (12109) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12145 clk cpu0 MW4 030457b8:0000008457b8_NS 203a726f +12145 clk cpu0 R X0 00000000030457BC +12146 clk cpu0 IT (12110) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12146 clk cpu0 R X12 0000000049203A72 +12147 clk cpu0 IT (12111) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12148 clk cpu0 IT (12112) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12148 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +12148 clk cpu0 R X8 000000000004C014 +12148 clk cpu0 R X13 0000000067656C6C +12149 clk cpu0 IT (12113) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12149 clk cpu0 R X12 0000000000000049 +12150 clk cpu0 IT (12114) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12150 clk cpu0 R X11 000000000000002F +12151 clk cpu0 IT (12115) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12151 clk cpu0 R cpsr 200003c0 +12152 clk cpu0 IT (12116) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12152 clk cpu0 R X14 00000000656C6C00 +12153 clk cpu0 IT (12117) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12153 clk cpu0 R X12 00000000656C6C49 +12154 clk cpu0 IT (12118) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12154 clk cpu0 MW4 030457bc:0000008457bc_NS 656c6c49 +12154 clk cpu0 R X0 00000000030457C0 +12155 clk cpu0 IT (12119) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12155 clk cpu0 R X12 0000000067656C6C +12156 clk cpu0 IT (12120) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12157 clk cpu0 IT (12121) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12157 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +12157 clk cpu0 R X8 000000000004C018 +12157 clk cpu0 R X13 0000000066206C61 +12158 clk cpu0 IT (12122) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12158 clk cpu0 R X12 0000000000000067 +12159 clk cpu0 IT (12123) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12159 clk cpu0 R X11 000000000000002B +12160 clk cpu0 IT (12124) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12160 clk cpu0 R cpsr 200003c0 +12161 clk cpu0 IT (12125) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12161 clk cpu0 R X14 00000000206C6100 +12162 clk cpu0 IT (12126) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12162 clk cpu0 R X12 00000000206C6167 +12163 clk cpu0 IT (12127) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12163 clk cpu0 MW4 030457c0:0000008457c0_NS 206c6167 +12163 clk cpu0 R X0 00000000030457C4 +12164 clk cpu0 IT (12128) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12164 clk cpu0 R X12 0000000066206C61 +12165 clk cpu0 IT (12129) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12166 clk cpu0 IT (12130) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12166 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +12166 clk cpu0 R X8 000000000004C01C +12166 clk cpu0 R X13 00000000616D726F +12167 clk cpu0 IT (12131) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12167 clk cpu0 R X12 0000000000000066 +12168 clk cpu0 IT (12132) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12168 clk cpu0 R X11 0000000000000027 +12169 clk cpu0 IT (12133) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12169 clk cpu0 R cpsr 200003c0 +12170 clk cpu0 IT (12134) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12170 clk cpu0 R X14 000000006D726F00 +12171 clk cpu0 IT (12135) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12171 clk cpu0 R X12 000000006D726F66 +12172 clk cpu0 IT (12136) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12172 clk cpu0 MW4 030457c4:0000008457c4_NS 6d726f66 +12172 clk cpu0 R X0 00000000030457C8 +12173 clk cpu0 IT (12137) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12173 clk cpu0 R X12 00000000616D726F +12174 clk cpu0 IT (12138) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12175 clk cpu0 IT (12139) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12175 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +12175 clk cpu0 R X8 000000000004C020 +12175 clk cpu0 R X13 0000000070732074 +12176 clk cpu0 IT (12140) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12176 clk cpu0 R X12 0000000000000061 +12177 clk cpu0 IT (12141) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12177 clk cpu0 R X11 0000000000000023 +12178 clk cpu0 IT (12142) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12178 clk cpu0 R cpsr 200003c0 +12179 clk cpu0 IT (12143) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12179 clk cpu0 R X14 0000000073207400 +12180 clk cpu0 IT (12144) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12180 clk cpu0 R X12 0000000073207461 +12181 clk cpu0 IT (12145) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12181 clk cpu0 MW4 030457c8:0000008457c8_NS 73207461 +12181 clk cpu0 R X0 00000000030457CC +12182 clk cpu0 IT (12146) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12182 clk cpu0 R X12 0000000070732074 +12183 clk cpu0 IT (12147) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12184 clk cpu0 IT (12148) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12184 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +12184 clk cpu0 R X8 000000000004C024 +12184 clk cpu0 R X13 0000000066696365 +12185 clk cpu0 IT (12149) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12185 clk cpu0 R X12 0000000000000070 +12186 clk cpu0 IT (12150) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12186 clk cpu0 R X11 000000000000001F +12187 clk cpu0 IT (12151) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12187 clk cpu0 R cpsr 200003c0 +12188 clk cpu0 IT (12152) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12188 clk cpu0 R X14 0000000069636500 +12189 clk cpu0 IT (12153) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12189 clk cpu0 R X12 0000000069636570 +12190 clk cpu0 IT (12154) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12190 clk cpu0 MW4 030457cc:0000008457cc_NS 69636570 +12190 clk cpu0 R X0 00000000030457D0 +12191 clk cpu0 IT (12155) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12191 clk cpu0 R X12 0000000066696365 +12192 clk cpu0 IT (12156) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12193 clk cpu0 IT (12157) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12193 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +12193 clk cpu0 R X8 000000000004C028 +12193 clk cpu0 R X13 0000000020726569 +12194 clk cpu0 IT (12158) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12194 clk cpu0 R X12 0000000000000066 +12195 clk cpu0 IT (12159) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12195 clk cpu0 R X11 000000000000001B +12196 clk cpu0 IT (12160) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12196 clk cpu0 R cpsr 200003c0 +12197 clk cpu0 IT (12161) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12197 clk cpu0 R X14 0000000072656900 +12198 clk cpu0 IT (12162) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12198 clk cpu0 R X12 0000000072656966 +12199 clk cpu0 IT (12163) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12199 clk cpu0 MW4 030457d0:0000008457d0_NS 72656966 +12199 clk cpu0 R X0 00000000030457D4 +12200 clk cpu0 IT (12164) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12200 clk cpu0 R X12 0000000020726569 +12201 clk cpu0 IT (12165) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12202 clk cpu0 IT (12166) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12202 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +12202 clk cpu0 R X8 000000000004C02C +12202 clk cpu0 R X13 0000000064657375 +12203 clk cpu0 IT (12167) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12203 clk cpu0 R X12 0000000000000020 +12204 clk cpu0 IT (12168) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12204 clk cpu0 R X11 0000000000000017 +12205 clk cpu0 IT (12169) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12205 clk cpu0 R cpsr 200003c0 +12206 clk cpu0 IT (12170) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12206 clk cpu0 R X14 0000000065737500 +12207 clk cpu0 IT (12171) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12207 clk cpu0 R X12 0000000065737520 +12208 clk cpu0 IT (12172) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12208 clk cpu0 MW4 030457d4:0000008457d4_NS 65737520 +12208 clk cpu0 R X0 00000000030457D8 +12209 clk cpu0 IT (12173) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12209 clk cpu0 R X12 0000000064657375 +12210 clk cpu0 IT (12174) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12211 clk cpu0 IT (12175) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12211 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +12211 clk cpu0 R X8 000000000004C030 +12211 clk cpu0 R X13 000000005F27203A +12212 clk cpu0 IT (12176) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12212 clk cpu0 R X12 0000000000000064 +12213 clk cpu0 IT (12177) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12213 clk cpu0 R X11 0000000000000013 +12214 clk cpu0 IT (12178) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12214 clk cpu0 R cpsr 200003c0 +12215 clk cpu0 IT (12179) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12215 clk cpu0 R X14 0000000027203A00 +12216 clk cpu0 IT (12180) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12216 clk cpu0 R X12 0000000027203A64 +12217 clk cpu0 IT (12181) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12217 clk cpu0 MW4 030457d8:0000008457d8_NS 27203a64 +12217 clk cpu0 R X0 00000000030457DC +12218 clk cpu0 IT (12182) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12218 clk cpu0 R X12 000000005F27203A +12219 clk cpu0 IT (12183) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12220 clk cpu0 IT (12184) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12220 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +12220 clk cpu0 R X8 000000000004C034 +12220 clk cpu0 R X13 0000000045202E27 +12221 clk cpu0 IT (12185) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12221 clk cpu0 R X12 000000000000005F +12222 clk cpu0 IT (12186) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12222 clk cpu0 R X11 000000000000000F +12223 clk cpu0 IT (12187) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12223 clk cpu0 R cpsr 200003c0 +12224 clk cpu0 IT (12188) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12224 clk cpu0 R X14 00000000202E2700 +12225 clk cpu0 IT (12189) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12225 clk cpu0 R X12 00000000202E275F +12226 clk cpu0 IT (12190) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12226 clk cpu0 MW4 030457dc:0000008457dc_NS 202e275f +12226 clk cpu0 R X0 00000000030457E0 +12227 clk cpu0 IT (12191) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12227 clk cpu0 R X12 0000000045202E27 +12228 clk cpu0 IT (12192) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12229 clk cpu0 IT (12193) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12229 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +12229 clk cpu0 R X8 000000000004C038 +12229 clk cpu0 R X13 000000006E69646E +12230 clk cpu0 IT (12194) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12230 clk cpu0 R X12 0000000000000045 +12231 clk cpu0 IT (12195) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12231 clk cpu0 R X11 000000000000000B +12232 clk cpu0 IT (12196) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12232 clk cpu0 R cpsr 200003c0 +12233 clk cpu0 IT (12197) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12233 clk cpu0 R X14 0000000069646E00 +12234 clk cpu0 IT (12198) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12234 clk cpu0 R X12 0000000069646E45 +12235 clk cpu0 IT (12199) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12235 clk cpu0 MW4 030457e0:0000008457e0_NS 69646e45 +12235 clk cpu0 R X0 00000000030457E4 +12236 clk cpu0 IT (12200) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12236 clk cpu0 R X12 000000006E69646E +12237 clk cpu0 IT (12201) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12238 clk cpu0 IT (12202) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12238 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +12238 clk cpu0 R X8 000000000004C03C +12238 clk cpu0 R X13 0000000065542067 +12239 clk cpu0 IT (12203) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12239 clk cpu0 R X12 000000000000006E +12240 clk cpu0 IT (12204) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12240 clk cpu0 R X11 0000000000000007 +12241 clk cpu0 IT (12205) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12241 clk cpu0 R cpsr 200003c0 +12242 clk cpu0 IT (12206) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12242 clk cpu0 R X14 0000000054206700 +12243 clk cpu0 IT (12207) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12243 clk cpu0 R X12 000000005420676E +12244 clk cpu0 IT (12208) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12244 clk cpu0 MW4 030457e4:0000008457e4_NS 5420676e +12244 clk cpu0 R X0 00000000030457E8 +12245 clk cpu0 IT (12209) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12245 clk cpu0 R X12 0000000065542067 +12246 clk cpu0 IT (12210) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12247 clk cpu0 IT (12211) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12247 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +12247 clk cpu0 R X8 000000000004C040 +12247 clk cpu0 R X13 000000000A2E7473 +12248 clk cpu0 IT (12212) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12248 clk cpu0 R X12 0000000000000065 +12249 clk cpu0 IT (12213) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12249 clk cpu0 R X11 0000000000000003 +12250 clk cpu0 IT (12214) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12250 clk cpu0 R cpsr 600003c0 +12251 clk cpu0 IT (12215) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12251 clk cpu0 R X14 000000002E747300 +12252 clk cpu0 IT (12216) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12252 clk cpu0 R X12 000000002E747365 +12253 clk cpu0 IT (12217) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12253 clk cpu0 MW4 030457e8:0000008457e8_NS 2e747365 +12253 clk cpu0 R X0 00000000030457EC +12254 clk cpu0 IT (12218) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12254 clk cpu0 R X12 000000000A2E7473 +12255 clk cpu0 IS (12219) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12256 clk cpu0 IT (12220) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +12256 clk cpu0 R X2 0000000000000003 +12257 clk cpu0 IT (12221) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +12257 clk cpu0 R X9 0000000000000001 +12258 clk cpu0 IT (12222) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +12258 clk cpu0 R X8 000000000004C03F +12259 clk cpu0 IT (12223) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +12259 clk cpu0 R X1 000000000004C043 +12260 clk cpu0 IT (12224) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +12260 clk cpu0 R cpsr 200003c0 +12261 clk cpu0 IS (12225) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +12262 clk cpu0 IT (12226) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +12262 clk cpu0 MR1 0004c043:00001004c043_NS 0a +12262 clk cpu0 R X8 000000000000000A +12263 clk cpu0 IT (12227) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +12263 clk cpu0 MW1 030457ec:0000008457ec_NS 0a +12264 clk cpu0 IS (12228) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +12265 clk cpu0 IT (12229) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +12265 clk cpu0 MR1 0004c044:00001004c044_NS 00 +12265 clk cpu0 R X8 0000000000000000 +12266 clk cpu0 IT (12230) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +12266 clk cpu0 R cpsr 600003c0 +12267 clk cpu0 IT (12231) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +12267 clk cpu0 MW1 030457ed:0000008457ed_NS 00 +12268 clk cpu0 IS (12232) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +12269 clk cpu0 IT (12233) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +12269 clk cpu0 MR1 0004c045:00001004c045_NS 00 +12269 clk cpu0 R X8 0000000000000000 +12270 clk cpu0 IT (12234) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +12270 clk cpu0 MW1 030457ee:0000008457ee_NS 00 +12271 clk cpu0 IT (12235) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +12272 clk cpu0 IT (12236) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +12272 clk cpu0 R X0 00000000030457B4 +12273 clk cpu0 IT (12237) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +12273 clk cpu0 MR8 030457a0:0000008457a0_NS 00000000_03045880 +12273 clk cpu0 MR8 030457a8:0000008457a8_NS 00000000_00092b80 +12273 clk cpu0 R SP_EL0 00000000030457B0 +12273 clk cpu0 R X19 0000000003045880 +12273 clk cpu0 R X30 0000000000092B80 +12274 clk cpu0 IT (12238) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +12275 clk cpu0 IT (12239) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +12275 clk cpu0 R X22 000000000004C000 +12276 clk cpu0 IT (12240) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +12276 clk cpu0 R X23 000000000004C000 +12277 clk cpu0 IT (12241) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +12277 clk cpu0 R X26 0000000000000000 +12278 clk cpu0 IT (12242) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +12278 clk cpu0 R X21 0000000003029000 +12279 clk cpu0 IT (12243) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +12279 clk cpu0 R X22 000000000004C108 +12280 clk cpu0 IT (12244) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +12280 clk cpu0 R X23 000000000004C129 +12281 clk cpu0 IT (12245) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +12281 clk cpu0 R X24 0000000003041000 +12282 clk cpu0 IT (12246) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +12282 clk cpu0 R X25 0000000006216000 +12283 clk cpu0 IT (12247) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +12284 clk cpu0 IT (12248) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12284 clk cpu0 MR1 0004d007:00001004d007_NS 3e +12284 clk cpu0 R X8 000000000000003E +12285 clk cpu0 IT (12249) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12285 clk cpu0 R cpsr 200003c0 +12286 clk cpu0 IS (12250) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12287 clk cpu0 IS (12251) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12288 clk cpu0 IT (12252) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +12288 clk cpu0 R cpsr 000003c0 +12289 clk cpu0 IT (12253) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +12290 clk cpu0 IT (12254) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12290 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12290 clk cpu0 R X9 0000000013000000 +12291 clk cpu0 IT (12255) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +12291 clk cpu0 R X27 000000000004D007 +12292 clk cpu0 IT (12256) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +12292 clk cpu0 R X20 000000000004D008 +12293 clk cpu0 IT (12257) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +12293 clk cpu0 MW1 13000000:000013000000_NS 3e +12294 clk cpu0 IT (12258) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12294 clk cpu0 MR1 0004d008:00001004d008_NS 3e +12294 clk cpu0 R X8 000000000000003E +12295 clk cpu0 IT (12259) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12295 clk cpu0 R cpsr 200003c0 +12296 clk cpu0 IS (12260) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12297 clk cpu0 IS (12261) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12298 clk cpu0 IT (12262) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +12298 clk cpu0 R cpsr 400003c0 +12299 clk cpu0 IS (12263) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +12300 clk cpu0 IT (12264) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +12300 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +12300 clk cpu0 R X8 0000000000000000 +12301 clk cpu0 IT (12265) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +12301 clk cpu0 MR8 0004d008:00001004d008_NS 203a7825_5550433e +12301 clk cpu0 R X0 203A78255550433E +12302 clk cpu0 IT (12266) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +12302 clk cpu0 R cpsr 800003c0 +12303 clk cpu0 IT (12267) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +12304 clk cpu0 IT (12268) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +12304 clk cpu0 R X27 0000000000000000 +12305 clk cpu0 IT (12269) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +12305 clk cpu0 R X28 000000000004D008 +12306 clk cpu0 IT (12270) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +12306 clk cpu0 R X8 00000000FFFFFFF8 +12307 clk cpu0 IT (12271) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12307 clk cpu0 R cpsr 000003c0 +12307 clk cpu0 R X9 000000000000003E +12308 clk cpu0 IS (12272) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12309 clk cpu0 IT (12273) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12309 clk cpu0 R cpsr 200003c0 +12310 clk cpu0 IS (12274) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12311 clk cpu0 IT (12275) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12311 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12311 clk cpu0 R X9 0000000013000000 +12312 clk cpu0 IT (12276) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12312 clk cpu0 R cpsr 800003c0 +12312 clk cpu0 R X8 00000000FFFFFFF9 +12313 clk cpu0 IT (12277) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12313 clk cpu0 MW1 13000000:000013000000_NS 3e +12314 clk cpu0 IT (12278) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12314 clk cpu0 R X0 00203A7825555043 +12315 clk cpu0 IT (12279) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12316 clk cpu0 IT (12280) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12316 clk cpu0 R cpsr 000003c0 +12316 clk cpu0 R X9 0000000000000043 +12317 clk cpu0 IS (12281) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12318 clk cpu0 IT (12282) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12318 clk cpu0 R cpsr 200003c0 +12319 clk cpu0 IS (12283) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12320 clk cpu0 IT (12284) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12320 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12320 clk cpu0 R X9 0000000013000000 +12321 clk cpu0 IT (12285) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12321 clk cpu0 R cpsr 800003c0 +12321 clk cpu0 R X8 00000000FFFFFFFA +12322 clk cpu0 IT (12286) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12322 clk cpu0 MW1 13000000:000013000000_NS 43 +12323 clk cpu0 IT (12287) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12323 clk cpu0 R X0 0000203A78255550 +12324 clk cpu0 IT (12288) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12325 clk cpu0 IT (12289) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12325 clk cpu0 R cpsr 000003c0 +12325 clk cpu0 R X9 0000000000000050 +12326 clk cpu0 IS (12290) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12327 clk cpu0 IT (12291) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12327 clk cpu0 R cpsr 200003c0 +12328 clk cpu0 IS (12292) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12329 clk cpu0 IT (12293) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12329 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12329 clk cpu0 R X9 0000000013000000 +12330 clk cpu0 IT (12294) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12330 clk cpu0 R cpsr 800003c0 +12330 clk cpu0 R X8 00000000FFFFFFFB +12331 clk cpu0 IT (12295) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12331 clk cpu0 MW1 13000000:000013000000_NS 50 +12332 clk cpu0 IT (12296) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12332 clk cpu0 R X0 000000203A782555 +12333 clk cpu0 IT (12297) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12334 clk cpu0 IT (12298) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12334 clk cpu0 R cpsr 000003c0 +12334 clk cpu0 R X9 0000000000000055 +12335 clk cpu0 IS (12299) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12336 clk cpu0 IT (12300) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12336 clk cpu0 R cpsr 200003c0 +12337 clk cpu0 IS (12301) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12338 clk cpu0 IT (12302) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12338 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12338 clk cpu0 R X9 0000000013000000 +12339 clk cpu0 IT (12303) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12339 clk cpu0 R cpsr 800003c0 +12339 clk cpu0 R X8 00000000FFFFFFFC +12340 clk cpu0 IT (12304) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12340 clk cpu0 MW1 13000000:000013000000_NS 55 +12341 clk cpu0 IT (12305) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12341 clk cpu0 R X0 00000000203A7825 +12342 clk cpu0 IT (12306) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12343 clk cpu0 IT (12307) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12343 clk cpu0 R cpsr 000003c0 +12343 clk cpu0 R X9 0000000000000025 +12344 clk cpu0 IS (12308) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12345 clk cpu0 IT (12309) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12345 clk cpu0 R cpsr 600003c0 +12346 clk cpu0 IT (12310) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12347 clk cpu0 IT (12311) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +12347 clk cpu0 R X8 00000000FFFFFFFC +12348 clk cpu0 IT (12312) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +12348 clk cpu0 R X9 0000000000000003 +12349 clk cpu0 IT (12313) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +12349 clk cpu0 R X9 000000000004D00B +12350 clk cpu0 IT (12314) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +12350 clk cpu0 R cpsr 200003c0 +12351 clk cpu0 IT (12315) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +12351 clk cpu0 R X27 000000000004D00B +12352 clk cpu0 IT (12316) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +12352 clk cpu0 R X20 000000000004D00C +12353 clk cpu0 IT (12317) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +12354 clk cpu0 IT (12318) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12354 clk cpu0 MR1 0004d00c:00001004d00c_NS 25 +12354 clk cpu0 R X8 0000000000000025 +12355 clk cpu0 IT (12319) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12355 clk cpu0 R cpsr 600003c0 +12356 clk cpu0 IT (12320) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12357 clk cpu0 IT (12321) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +12357 clk cpu0 MW4 03029734:000000829734_NS 00000000 +12358 clk cpu0 IT (12322) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +12358 clk cpu0 R X27 000000000004D00C +12359 clk cpu0 IT (12323) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +12359 clk cpu0 MR1 0004d00d:00001004d00d_NS 78 +12359 clk cpu0 R X27 000000000004D00D +12359 clk cpu0 R X28 0000000000000078 +12360 clk cpu0 IT (12324) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +12360 clk cpu0 R cpsr 200003c0 +12361 clk cpu0 IS (12325) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +12362 clk cpu0 IT (12326) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +12363 clk cpu0 IT (12327) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +12363 clk cpu0 R X8 0000000000000020 +12364 clk cpu0 IT (12328) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +12364 clk cpu0 R cpsr 600003c0 +12365 clk cpu0 IS (12329) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +12366 clk cpu0 IT (12330) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +12366 clk cpu0 R X9 0000000000092CE0 +12367 clk cpu0 IT (12331) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +12367 clk cpu0 MR1 0004c128:00001004c128_NS 00 +12367 clk cpu0 R X10 0000000000000000 +12368 clk cpu0 IT (12332) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +12368 clk cpu0 R X9 0000000000092CE0 +12369 clk cpu0 IT (12333) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +12369 clk cpu0 R cpsr 600007c0 +12370 clk cpu0 IT (12334) 00092ce0:000010092ce0_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +12370 clk cpu0 MR4 03045898:000000845898_NS ffffffd0 +12370 clk cpu0 R cpsr 600003c0 +12370 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +12371 clk cpu0 IS (12335) 00092ce4:000010092ce4_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92cf8 +12372 clk cpu0 IT (12336) 00092ce8:000010092ce8_NS 11002109 O EL0t_n : ADD w9,w8,#8 +12372 clk cpu0 R X9 00000000FFFFFFD8 +12373 clk cpu0 IT (12337) 00092cec:000010092cec_NS 7100013f O EL0t_n : CMP w9,#0 +12373 clk cpu0 R cpsr a00003c0 +12374 clk cpu0 IT (12338) 00092cf0:000010092cf0_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +12374 clk cpu0 MW4 03045898:000000845898_NS ffffffd8 +12375 clk cpu0 IT (12339) 00092cf4:000010092cf4_NS 54000cad O EL0t_n : B.LE 0x92e88 +12376 clk cpu0 IT (12340) 00092e88:000010092e88_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +12376 clk cpu0 MR8 03045888:000000845888_NS 00000000_03045880 +12376 clk cpu0 R X9 0000000003045880 +12377 clk cpu0 IT (12341) 00092e8c:000010092e8c_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +12377 clk cpu0 R X8 0000000003045850 +12378 clk cpu0 IT (12342) 00092e90:000010092e90_NS 17ffff9d O EL0t_n : B 0x92d04 +12379 clk cpu0 IT (12343) 00092d04:000010092d04_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +12379 clk cpu0 MR8 03045850:000000845850_NS 00000000_00000000 +12379 clk cpu0 R X0 0000000000000000 +12380 clk cpu0 IT (12344) 00092d08:000010092d08_NS 52800201 O EL0t_n : MOV w1,#0x10 +12380 clk cpu0 R X1 0000000000000010 +12381 clk cpu0 IT (12345) 00092d0c:000010092d0c_NS 94000a58 O EL0t_n : BL 0x9566c +12381 clk cpu0 R X30 0000000000092D10 +12382 clk cpu0 IT (12346) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +12382 clk cpu0 R SP_EL0 0000000003045790 +12383 clk cpu0 IT (12347) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +12383 clk cpu0 R X8 3030303030303030 +12384 clk cpu0 IT (12348) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +12384 clk cpu0 MW8 03045798:000000845798_NS 30303030_30303030 +12384 clk cpu0 MW8 030457a0:0000008457a0_NS 30303030_30303030 +12385 clk cpu0 IT (12349) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +12385 clk cpu0 MW4 030457a8:0000008457a8_NS 30303030 +12386 clk cpu0 IT (12350) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +12387 clk cpu0 IT (12351) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +12387 clk cpu0 R X11 0000000000000000 +12388 clk cpu0 IT (12352) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +12388 clk cpu0 R X8 0000000003029000 +12389 clk cpu0 IT (12353) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +12389 clk cpu0 MR4 03029734:000000829734_NS 00000000 +12389 clk cpu0 R X8 0000000000000000 +12390 clk cpu0 IT (12354) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +12390 clk cpu0 R cpsr 600003c0 +12391 clk cpu0 IT (12355) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +12391 clk cpu0 R X8 0000000000000000 +12392 clk cpu0 IT (12356) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +12392 clk cpu0 R cpsr 800003c0 +12393 clk cpu0 IT (12357) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +12394 clk cpu0 IT (12358) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +12394 clk cpu0 R X9 0000000003045798 +12395 clk cpu0 IT (12359) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +12395 clk cpu0 R X10 0000000006216000 +12396 clk cpu0 IT (12360) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +12396 clk cpu0 MR1 03045798:000000845798_NS 30 +12396 clk cpu0 R X8 0000000000000030 +12397 clk cpu0 IT (12361) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +12397 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12397 clk cpu0 R X9 0000000013000000 +12398 clk cpu0 IT (12362) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +12398 clk cpu0 MW1 13000000:000013000000_NS 30 +12399 clk cpu0 IT (12363) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +12399 clk cpu0 R SP_EL0 00000000030457B0 +12400 clk cpu0 IT (12364) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +12401 clk cpu0 IT (12365) 00092d10:000010092d10_NS 91000774 O EL0t_n : ADD x20,x27,#1 +12401 clk cpu0 R X20 000000000004D00E +12402 clk cpu0 IT (12366) 00092d14:000010092d14_NS 17ffffa8 O EL0t_n : B 0x92bb4 +12403 clk cpu0 IT (12367) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12403 clk cpu0 MR1 0004d00e:00001004d00e_NS 3a +12403 clk cpu0 R X8 000000000000003A +12404 clk cpu0 IT (12368) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12404 clk cpu0 R cpsr 200003c0 +12405 clk cpu0 IS (12369) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12406 clk cpu0 IS (12370) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12407 clk cpu0 IT (12371) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +12407 clk cpu0 R cpsr 000003c0 +12408 clk cpu0 IT (12372) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +12409 clk cpu0 IT (12373) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12409 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12409 clk cpu0 R X9 0000000013000000 +12410 clk cpu0 IT (12374) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +12410 clk cpu0 R X27 000000000004D00E +12411 clk cpu0 IT (12375) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +12411 clk cpu0 R X20 000000000004D00F +12412 clk cpu0 IT (12376) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +12412 clk cpu0 MW1 13000000:000013000000_NS 3a +12413 clk cpu0 IT (12377) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12413 clk cpu0 MR1 0004d00f:00001004d00f_NS 20 +12413 clk cpu0 R X8 0000000000000020 +12414 clk cpu0 IT (12378) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12414 clk cpu0 R cpsr 800003c0 +12415 clk cpu0 IS (12379) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12416 clk cpu0 IS (12380) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12417 clk cpu0 IT (12381) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +12417 clk cpu0 R cpsr 000003c0 +12418 clk cpu0 IT (12382) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +12419 clk cpu0 IT (12383) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12419 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12419 clk cpu0 R X9 0000000013000000 +12420 clk cpu0 IT (12384) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +12420 clk cpu0 R X27 000000000004D00F +12421 clk cpu0 IT (12385) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +12421 clk cpu0 R X20 000000000004D010 +12422 clk cpu0 IT (12386) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +12422 clk cpu0 MW1 13000000:000013000000_NS 20 +12423 clk cpu0 IT (12387) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12423 clk cpu0 MR1 0004d010:00001004d010_NS 50 +12423 clk cpu0 R X8 0000000000000050 +12424 clk cpu0 IT (12388) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12424 clk cpu0 R cpsr 200003c0 +12425 clk cpu0 IS (12389) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12426 clk cpu0 IS (12390) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12427 clk cpu0 IT (12391) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +12427 clk cpu0 R cpsr 400003c0 +12428 clk cpu0 IS (12392) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +12429 clk cpu0 IT (12393) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +12429 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +12429 clk cpu0 R X8 0000000000000000 +12430 clk cpu0 IT (12394) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +12430 clk cpu0 MR8 0004d010:00001004d010_NS 2064255f_54524150 +12430 clk cpu0 R X0 2064255F54524150 +12431 clk cpu0 IT (12395) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +12431 clk cpu0 R cpsr 800003c0 +12432 clk cpu0 IT (12396) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +12433 clk cpu0 IT (12397) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +12433 clk cpu0 R X27 0000000000000000 +12434 clk cpu0 IT (12398) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +12434 clk cpu0 R X28 000000000004D010 +12435 clk cpu0 IT (12399) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +12435 clk cpu0 R X8 00000000FFFFFFF8 +12436 clk cpu0 IT (12400) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12436 clk cpu0 R cpsr 000003c0 +12436 clk cpu0 R X9 0000000000000050 +12437 clk cpu0 IS (12401) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12438 clk cpu0 IT (12402) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12438 clk cpu0 R cpsr 200003c0 +12439 clk cpu0 IS (12403) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12440 clk cpu0 IT (12404) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12440 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12440 clk cpu0 R X9 0000000013000000 +12441 clk cpu0 IT (12405) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12441 clk cpu0 R cpsr 800003c0 +12441 clk cpu0 R X8 00000000FFFFFFF9 +12442 clk cpu0 IT (12406) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12442 clk cpu0 MW1 13000000:000013000000_NS 50 +12443 clk cpu0 IT (12407) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12443 clk cpu0 R X0 002064255F545241 +12444 clk cpu0 IT (12408) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12445 clk cpu0 IT (12409) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12445 clk cpu0 R cpsr 000003c0 +12445 clk cpu0 R X9 0000000000000041 +12446 clk cpu0 IS (12410) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12447 clk cpu0 IT (12411) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12447 clk cpu0 R cpsr 200003c0 +12448 clk cpu0 IS (12412) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12449 clk cpu0 IT (12413) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12449 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12449 clk cpu0 R X9 0000000013000000 +12450 clk cpu0 IT (12414) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12450 clk cpu0 R cpsr 800003c0 +12450 clk cpu0 R X8 00000000FFFFFFFA +12451 clk cpu0 IT (12415) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12451 clk cpu0 MW1 13000000:000013000000_NS 41 +12452 clk cpu0 IT (12416) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12452 clk cpu0 R X0 00002064255F5452 +12453 clk cpu0 IT (12417) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12454 clk cpu0 IT (12418) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12454 clk cpu0 R cpsr 000003c0 +12454 clk cpu0 R X9 0000000000000052 +12455 clk cpu0 IS (12419) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12456 clk cpu0 IT (12420) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12456 clk cpu0 R cpsr 200003c0 +12457 clk cpu0 IS (12421) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12458 clk cpu0 IT (12422) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12458 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12458 clk cpu0 R X9 0000000013000000 +12459 clk cpu0 IT (12423) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12459 clk cpu0 R cpsr 800003c0 +12459 clk cpu0 R X8 00000000FFFFFFFB +12460 clk cpu0 IT (12424) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12460 clk cpu0 MW1 13000000:000013000000_NS 52 +12461 clk cpu0 IT (12425) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12461 clk cpu0 R X0 0000002064255F54 +12462 clk cpu0 IT (12426) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12463 clk cpu0 IT (12427) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12463 clk cpu0 R cpsr 000003c0 +12463 clk cpu0 R X9 0000000000000054 +12464 clk cpu0 IS (12428) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12465 clk cpu0 IT (12429) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12465 clk cpu0 R cpsr 200003c0 +12466 clk cpu0 IS (12430) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12467 clk cpu0 IT (12431) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12467 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12467 clk cpu0 R X9 0000000013000000 +12468 clk cpu0 IT (12432) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12468 clk cpu0 R cpsr 800003c0 +12468 clk cpu0 R X8 00000000FFFFFFFC +12469 clk cpu0 IT (12433) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12469 clk cpu0 MW1 13000000:000013000000_NS 54 +12470 clk cpu0 IT (12434) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12470 clk cpu0 R X0 000000002064255F +12471 clk cpu0 IT (12435) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12472 clk cpu0 IT (12436) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12472 clk cpu0 R cpsr 000003c0 +12472 clk cpu0 R X9 000000000000005F +12473 clk cpu0 IS (12437) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12474 clk cpu0 IT (12438) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12474 clk cpu0 R cpsr 200003c0 +12475 clk cpu0 IS (12439) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12476 clk cpu0 IT (12440) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12476 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12476 clk cpu0 R X9 0000000013000000 +12477 clk cpu0 IT (12441) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12477 clk cpu0 R cpsr 800003c0 +12477 clk cpu0 R X8 00000000FFFFFFFD +12478 clk cpu0 IT (12442) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12478 clk cpu0 MW1 13000000:000013000000_NS 5f +12479 clk cpu0 IT (12443) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12479 clk cpu0 R X0 0000000000206425 +12480 clk cpu0 IT (12444) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12481 clk cpu0 IT (12445) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12481 clk cpu0 R cpsr 000003c0 +12481 clk cpu0 R X9 0000000000000025 +12482 clk cpu0 IS (12446) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12483 clk cpu0 IT (12447) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12483 clk cpu0 R cpsr 600003c0 +12484 clk cpu0 IT (12448) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12485 clk cpu0 IT (12449) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +12485 clk cpu0 R X8 00000000FFFFFFFD +12486 clk cpu0 IT (12450) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +12486 clk cpu0 R X9 0000000000000004 +12487 clk cpu0 IT (12451) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +12487 clk cpu0 R X9 000000000004D014 +12488 clk cpu0 IT (12452) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +12488 clk cpu0 R cpsr 200003c0 +12489 clk cpu0 IT (12453) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +12489 clk cpu0 R X27 000000000004D014 +12490 clk cpu0 IT (12454) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +12490 clk cpu0 R X20 000000000004D015 +12491 clk cpu0 IT (12455) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +12492 clk cpu0 IT (12456) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12492 clk cpu0 MR1 0004d015:00001004d015_NS 25 +12492 clk cpu0 R X8 0000000000000025 +12493 clk cpu0 IT (12457) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12493 clk cpu0 R cpsr 600003c0 +12494 clk cpu0 IT (12458) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12495 clk cpu0 IT (12459) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +12495 clk cpu0 MW4 03029734:000000829734_NS 00000000 +12496 clk cpu0 IT (12460) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +12496 clk cpu0 R X27 000000000004D015 +12497 clk cpu0 IT (12461) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +12497 clk cpu0 MR1 0004d016:00001004d016_NS 64 +12497 clk cpu0 R X27 000000000004D016 +12497 clk cpu0 R X28 0000000000000064 +12498 clk cpu0 IT (12462) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +12498 clk cpu0 R cpsr 200003c0 +12499 clk cpu0 IS (12463) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +12500 clk cpu0 IT (12464) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +12501 clk cpu0 IT (12465) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +12501 clk cpu0 R X8 000000000000000C +12502 clk cpu0 IT (12466) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +12502 clk cpu0 R cpsr 800003c0 +12503 clk cpu0 IS (12467) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +12504 clk cpu0 IT (12468) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +12504 clk cpu0 R X9 0000000000092CE0 +12505 clk cpu0 IT (12469) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +12505 clk cpu0 MR1 0004c114:00001004c114_NS 0e +12505 clk cpu0 R X10 000000000000000E +12506 clk cpu0 IT (12470) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +12506 clk cpu0 R X9 0000000000092D18 +12507 clk cpu0 IT (12471) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +12507 clk cpu0 R cpsr 800007c0 +12508 clk cpu0 IT (12472) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +12508 clk cpu0 MR4 03045898:000000845898_NS ffffffd8 +12508 clk cpu0 R cpsr 800003c0 +12508 clk cpu0 R X8 FFFFFFFFFFFFFFD8 +12509 clk cpu0 IS (12473) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +12510 clk cpu0 IT (12474) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +12510 clk cpu0 R X9 00000000FFFFFFE0 +12511 clk cpu0 IT (12475) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +12511 clk cpu0 R cpsr a00003c0 +12512 clk cpu0 IT (12476) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +12512 clk cpu0 MW4 03045898:000000845898_NS ffffffe0 +12513 clk cpu0 IT (12477) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +12514 clk cpu0 IT (12478) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +12514 clk cpu0 MR8 03045888:000000845888_NS 00000000_03045880 +12514 clk cpu0 R X9 0000000003045880 +12515 clk cpu0 IT (12479) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +12515 clk cpu0 R X8 0000000003045858 +12516 clk cpu0 IT (12480) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +12517 clk cpu0 IT (12481) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +12517 clk cpu0 MR8 03045858:000000845858_NS 00000000_00000002 +12517 clk cpu0 R X0 0000000000000002 +12518 clk cpu0 IT (12482) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +12518 clk cpu0 R X1 000000000000000A +12519 clk cpu0 IT (12483) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +12519 clk cpu0 R X30 0000000000092D48 +12520 clk cpu0 IT (12484) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +12520 clk cpu0 R SP_EL0 0000000003045790 +12521 clk cpu0 IT (12485) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +12521 clk cpu0 R X8 3030303030303030 +12522 clk cpu0 IT (12486) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +12522 clk cpu0 MW8 03045798:000000845798_NS 30303030_30303030 +12522 clk cpu0 MW8 030457a0:0000008457a0_NS 30303030_30303030 +12523 clk cpu0 IT (12487) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +12523 clk cpu0 MW4 030457a8:0000008457a8_NS 30303030 +12524 clk cpu0 IS (12488) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +12525 clk cpu0 IT (12489) 00095680:000010095680_NS aa1f03eb O EL0t_n : MOV x11,xzr +12525 clk cpu0 R X11 0000000000000000 +12526 clk cpu0 IT (12490) 00095684:000010095684_NS 2a0103e8 O EL0t_n : MOV w8,w1 +12526 clk cpu0 R X8 000000000000000A +12527 clk cpu0 IT (12491) 00095688:000010095688_NS 1103dc29 O EL0t_n : ADD w9,w1,#0xf7 +12527 clk cpu0 R X9 0000000000000101 +12528 clk cpu0 IT (12492) 0009568c:00001009568c_NS 910023ea O EL0t_n : ADD x10,sp,#8 +12528 clk cpu0 R X10 0000000003045798 +12529 clk cpu0 IT (12493) 00095690:000010095690_NS 9ac8080c O EL0t_n : UDIV x12,x0,x8 +12529 clk cpu0 R X12 0000000000000000 +12530 clk cpu0 IT (12494) 00095694:000010095694_NS 1b08818d O EL0t_n : MSUB w13,w12,w8,w0 +12530 clk cpu0 R X13 0000000000000002 +12531 clk cpu0 IT (12495) 00095698:000010095698_NS 710025bf O EL0t_n : CMP w13,#9 +12531 clk cpu0 R cpsr 800003c0 +12532 clk cpu0 IT (12496) 0009569c:00001009569c_NS 1a9f812e O EL0t_n : CSEL w14,w9,wzr,HI +12532 clk cpu0 R X14 0000000000000000 +12533 clk cpu0 IT (12497) 000956a0:0000100956a0_NS 0b0d01cd O EL0t_n : ADD w13,w14,w13 +12533 clk cpu0 R X13 0000000000000002 +12534 clk cpu0 IT (12498) 000956a4:0000100956a4_NS 1100c1ad O EL0t_n : ADD w13,w13,#0x30 +12534 clk cpu0 R X13 0000000000000032 +12535 clk cpu0 IT (12499) 000956a8:0000100956a8_NS eb08001f O EL0t_n : CMP x0,x8 +12535 clk cpu0 R cpsr 800003c0 +12536 clk cpu0 IT (12500) 000956ac:0000100956ac_NS 382b694d O EL0t_n : STRB w13,[x10,x11] +12536 clk cpu0 MW1 03045798:000000845798_NS 32 +12537 clk cpu0 IT (12501) 000956b0:0000100956b0_NS 9100056b O EL0t_n : ADD x11,x11,#1 +12537 clk cpu0 R X11 0000000000000001 +12538 clk cpu0 IT (12502) 000956b4:0000100956b4_NS aa0c03e0 O EL0t_n : MOV x0,x12 +12538 clk cpu0 R X0 0000000000000000 +12539 clk cpu0 IS (12503) 000956b8:0000100956b8_NS 54fffec2 O EL0t_n : B.CS 0x95690 +12540 clk cpu0 IT (12504) 000956bc:0000100956bc_NS 14000002 O EL0t_n : B 0x956c4 +12541 clk cpu0 IT (12505) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +12541 clk cpu0 R X8 0000000003029000 +12542 clk cpu0 IT (12506) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +12542 clk cpu0 MR4 03029734:000000829734_NS 00000000 +12542 clk cpu0 R X8 0000000000000000 +12543 clk cpu0 IT (12507) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +12543 clk cpu0 R cpsr 800003c0 +12544 clk cpu0 IT (12508) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +12544 clk cpu0 R X8 0000000000000001 +12545 clk cpu0 IT (12509) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +12545 clk cpu0 R cpsr 600003c0 +12546 clk cpu0 IS (12510) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +12547 clk cpu0 IT (12511) 000956dc:0000100956dc_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +12547 clk cpu0 R X9 0000000003045798 +12548 clk cpu0 IT (12512) 000956e0:0000100956e0_NS 93407d08 O EL0t_n : SXTW x8,w8 +12548 clk cpu0 R X8 0000000000000001 +12549 clk cpu0 IT (12513) 000956e4:0000100956e4_NS d1000529 O EL0t_n : SUB x9,x9,#1 +12549 clk cpu0 R X9 0000000003045797 +12550 clk cpu0 IT (12514) 000956e8:0000100956e8_NS b0030c0a O EL0t_n : ADRP x10,0x62166e8 +12550 clk cpu0 R X10 0000000006216000 +12551 clk cpu0 IT (12515) 000956ec:0000100956ec_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +12551 clk cpu0 MR1 03045798:000000845798_NS 32 +12551 clk cpu0 R X11 0000000000000032 +12552 clk cpu0 IT (12516) 000956f0:0000100956f0_NS f940714c O EL0t_n : LDR x12,[x10,#0xe0] +12552 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12552 clk cpu0 R X12 0000000013000000 +12553 clk cpu0 IT (12517) 000956f4:0000100956f4_NS d1000508 O EL0t_n : SUB x8,x8,#1 +12553 clk cpu0 R X8 0000000000000000 +12554 clk cpu0 IT (12518) 000956f8:0000100956f8_NS f100011f O EL0t_n : CMP x8,#0 +12554 clk cpu0 R cpsr 600003c0 +12555 clk cpu0 IT (12519) 000956fc:0000100956fc_NS 3900018b O EL0t_n : STRB w11,[x12,#0] +12555 clk cpu0 MW1 13000000:000013000000_NS 32 +12556 clk cpu0 IS (12520) 00095700:000010095700_NS 54ffff6c O EL0t_n : B.GT 0x956ec +12557 clk cpu0 IT (12521) 00095704:000010095704_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +12557 clk cpu0 R SP_EL0 00000000030457B0 +12558 clk cpu0 IT (12522) 00095708:000010095708_NS d65f03c0 O EL0t_n : RET +12559 clk cpu0 IT (12523) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +12559 clk cpu0 R X20 000000000004D017 +12560 clk cpu0 IT (12524) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +12561 clk cpu0 IT (12525) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12561 clk cpu0 MR1 0004d017:00001004d017_NS 20 +12561 clk cpu0 R X8 0000000000000020 +12562 clk cpu0 IT (12526) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12562 clk cpu0 R cpsr 800003c0 +12563 clk cpu0 IS (12527) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12564 clk cpu0 IS (12528) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12565 clk cpu0 IT (12529) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +12565 clk cpu0 R cpsr 000003c0 +12566 clk cpu0 IT (12530) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +12567 clk cpu0 IT (12531) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12567 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12567 clk cpu0 R X9 0000000013000000 +12568 clk cpu0 IT (12532) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +12568 clk cpu0 R X27 000000000004D017 +12569 clk cpu0 IT (12533) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +12569 clk cpu0 R X20 000000000004D018 +12570 clk cpu0 IT (12534) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +12570 clk cpu0 MW1 13000000:000013000000_NS 20 +12571 clk cpu0 IT (12535) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12571 clk cpu0 MR1 0004d018:00001004d018_NS 53 +12571 clk cpu0 R X8 0000000000000053 +12572 clk cpu0 IT (12536) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12572 clk cpu0 R cpsr 200003c0 +12573 clk cpu0 IS (12537) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12574 clk cpu0 IS (12538) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12575 clk cpu0 IT (12539) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +12575 clk cpu0 R cpsr 400003c0 +12576 clk cpu0 IS (12540) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +12577 clk cpu0 IT (12541) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +12577 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +12577 clk cpu0 R X8 0000000000000000 +12578 clk cpu0 IT (12542) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +12578 clk cpu0 MR8 0004d018:00001004d018_NS 4d000a54_52415453 +12578 clk cpu0 R X0 4D000A5452415453 +12579 clk cpu0 IT (12543) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +12579 clk cpu0 R cpsr 800003c0 +12580 clk cpu0 IT (12544) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +12581 clk cpu0 IT (12545) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +12581 clk cpu0 R X27 0000000000000000 +12582 clk cpu0 IT (12546) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +12582 clk cpu0 R X28 000000000004D018 +12583 clk cpu0 IT (12547) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +12583 clk cpu0 R X8 00000000FFFFFFF8 +12584 clk cpu0 IT (12548) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12584 clk cpu0 R cpsr 000003c0 +12584 clk cpu0 R X9 0000000000000053 +12585 clk cpu0 IS (12549) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12586 clk cpu0 IT (12550) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12586 clk cpu0 R cpsr 200003c0 +12587 clk cpu0 IS (12551) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12588 clk cpu0 IT (12552) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12588 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12588 clk cpu0 R X9 0000000013000000 +12589 clk cpu0 IT (12553) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12589 clk cpu0 R cpsr 800003c0 +12589 clk cpu0 R X8 00000000FFFFFFF9 +12590 clk cpu0 IT (12554) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12590 clk cpu0 MW1 13000000:000013000000_NS 53 +12591 clk cpu0 IT (12555) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12591 clk cpu0 R X0 004D000A54524154 +12592 clk cpu0 IT (12556) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12593 clk cpu0 IT (12557) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12593 clk cpu0 R cpsr 000003c0 +12593 clk cpu0 R X9 0000000000000054 +12594 clk cpu0 IS (12558) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12595 clk cpu0 IT (12559) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12595 clk cpu0 R cpsr 200003c0 +12596 clk cpu0 IS (12560) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12597 clk cpu0 IT (12561) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12597 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12597 clk cpu0 R X9 0000000013000000 +12598 clk cpu0 IT (12562) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12598 clk cpu0 R cpsr 800003c0 +12598 clk cpu0 R X8 00000000FFFFFFFA +12599 clk cpu0 IT (12563) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12599 clk cpu0 MW1 13000000:000013000000_NS 54 +12600 clk cpu0 IT (12564) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12600 clk cpu0 R X0 00004D000A545241 +12601 clk cpu0 IT (12565) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12602 clk cpu0 IT (12566) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12602 clk cpu0 R cpsr 000003c0 +12602 clk cpu0 R X9 0000000000000041 +12603 clk cpu0 IS (12567) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12604 clk cpu0 IT (12568) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12604 clk cpu0 R cpsr 200003c0 +12605 clk cpu0 IS (12569) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12606 clk cpu0 IT (12570) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12606 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12606 clk cpu0 R X9 0000000013000000 +12607 clk cpu0 IT (12571) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12607 clk cpu0 R cpsr 800003c0 +12607 clk cpu0 R X8 00000000FFFFFFFB +12608 clk cpu0 IT (12572) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12608 clk cpu0 MW1 13000000:000013000000_NS 41 +12609 clk cpu0 IT (12573) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12609 clk cpu0 R X0 0000004D000A5452 +12610 clk cpu0 IT (12574) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12611 clk cpu0 IT (12575) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12611 clk cpu0 R cpsr 000003c0 +12611 clk cpu0 R X9 0000000000000052 +12612 clk cpu0 IS (12576) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12613 clk cpu0 IT (12577) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12613 clk cpu0 R cpsr 200003c0 +12614 clk cpu0 IS (12578) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12615 clk cpu0 IT (12579) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12615 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12615 clk cpu0 R X9 0000000013000000 +12616 clk cpu0 IT (12580) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12616 clk cpu0 R cpsr 800003c0 +12616 clk cpu0 R X8 00000000FFFFFFFC +12617 clk cpu0 IT (12581) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12617 clk cpu0 MW1 13000000:000013000000_NS 52 +12618 clk cpu0 IT (12582) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12618 clk cpu0 R X0 000000004D000A54 +12619 clk cpu0 IT (12583) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12620 clk cpu0 IT (12584) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12620 clk cpu0 R cpsr 000003c0 +12620 clk cpu0 R X9 0000000000000054 +12621 clk cpu0 IS (12585) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12622 clk cpu0 IT (12586) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12622 clk cpu0 R cpsr 200003c0 +12623 clk cpu0 IS (12587) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12624 clk cpu0 IT (12588) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12624 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12624 clk cpu0 R X9 0000000013000000 +12625 clk cpu0 IT (12589) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12625 clk cpu0 R cpsr 800003c0 +12625 clk cpu0 R X8 00000000FFFFFFFD +12626 clk cpu0 IT (12590) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12626 clk cpu0 MW1 13000000:000013000000_NS 54 +12627 clk cpu0 IT (12591) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12627 clk cpu0 R X0 00000000004D000A +12628 clk cpu0 IT (12592) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12629 clk cpu0 IT (12593) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12629 clk cpu0 R cpsr 000003c0 +12629 clk cpu0 R X9 000000000000000A +12630 clk cpu0 IS (12594) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12631 clk cpu0 IT (12595) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +12631 clk cpu0 R cpsr 800003c0 +12632 clk cpu0 IS (12596) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +12633 clk cpu0 IT (12597) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +12633 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +12633 clk cpu0 R X9 0000000013000000 +12634 clk cpu0 IT (12598) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +12634 clk cpu0 R cpsr 800003c0 +12634 clk cpu0 R X8 00000000FFFFFFFE +TUBE CPU0: >>CPU0: PART_2 START +12635 clk cpu0 IT (12599) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +12635 clk cpu0 MW1 13000000:000013000000_NS 0a +12636 clk cpu0 IT (12600) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +12636 clk cpu0 R X0 0000000000004D00 +12637 clk cpu0 IT (12601) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +12638 clk cpu0 IT (12602) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +12638 clk cpu0 R cpsr 400003c0 +12638 clk cpu0 R X9 0000000000000000 +12639 clk cpu0 IT (12603) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +12640 clk cpu0 IT (12604) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +12640 clk cpu0 R X8 00000000FFFFFFFE +12641 clk cpu0 IT (12605) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +12641 clk cpu0 R X9 0000000000000005 +12642 clk cpu0 IT (12606) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +12642 clk cpu0 R X9 000000000004D01D +12643 clk cpu0 IT (12607) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +12643 clk cpu0 R cpsr 200003c0 +12644 clk cpu0 IT (12608) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +12644 clk cpu0 R X27 000000000004D01D +12645 clk cpu0 IT (12609) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +12645 clk cpu0 R X20 000000000004D01E +12646 clk cpu0 IT (12610) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +12647 clk cpu0 IT (12611) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +12647 clk cpu0 MR1 0004d01e:00001004d01e_NS 00 +12647 clk cpu0 R X8 0000000000000000 +12648 clk cpu0 IT (12612) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +12648 clk cpu0 R cpsr 800003c0 +12649 clk cpu0 IS (12613) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +12650 clk cpu0 IT (12614) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +12651 clk cpu0 IT (12615) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +12652 clk cpu0 IT (12616) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +12652 clk cpu0 MR8 03045840:000000845840_NS 00000000_0004d007 +12652 clk cpu0 MR8 03045848:000000845848_NS 00000000_0009c560 +12652 clk cpu0 R X19 000000000004D007 +12652 clk cpu0 R X30 000000000009C560 +12653 clk cpu0 IT (12617) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +12653 clk cpu0 MR8 03045830:000000845830_NS 00000000_00000000 +12653 clk cpu0 MR8 03045838:000000845838_NS 00000000_03008528 +12653 clk cpu0 R X20 0000000003008528 +12653 clk cpu0 R X21 0000000000000000 +12654 clk cpu0 IT (12618) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +12654 clk cpu0 MR8 03045820:000000845820_NS 00000000_0621600c +12654 clk cpu0 MR8 03045828:000000845828_NS 00000000_0620e000 +12654 clk cpu0 R X22 000000000620E000 +12654 clk cpu0 R X23 000000000621600C +12655 clk cpu0 IT (12619) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +12655 clk cpu0 MR8 03045810:000000845810_NS 00000000_0000003c +12655 clk cpu0 MR8 03045818:000000845818_NS 00000000_00007c00 +12655 clk cpu0 R X24 0000000000007C00 +12655 clk cpu0 R X25 000000000000003C +12656 clk cpu0 IT (12620) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +12656 clk cpu0 MR8 03045800:000000845800_NS 00010001_00010001 +12656 clk cpu0 MR8 03045808:000000845808_NS ffe000ff_ffe000ff +12656 clk cpu0 R X26 FFE000FFFFE000FF +12656 clk cpu0 R X27 0001000100010001 +12657 clk cpu0 IT (12621) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +12657 clk cpu0 MR8 030457f0:0000008457f0_NS ff7fff7f_ff7fff7f +12657 clk cpu0 R X28 FF7FFF7FFF7FFF7F +12658 clk cpu0 IT (12622) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +12658 clk cpu0 R SP_EL0 0000000003045850 +12659 clk cpu0 IT (12623) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +12660 clk cpu0 IT (12624) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +12660 clk cpu0 R X0 0000000000000001 +12661 clk cpu0 IT (12625) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +12661 clk cpu0 R X1 0000000000000000 +12662 clk cpu0 IT (12626) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +12662 clk cpu0 R X2 0000000000000000 +12663 clk cpu0 IT (12627) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +12664 clk cpu0 IT (12628) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +12665 clk cpu0 IT (12629) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +12665 clk cpu0 R X0 0000000003008528 +12666 clk cpu0 IT (12630) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +12666 clk cpu0 R X30 000000000009C57C +12667 clk cpu0 IT (12631) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +12668 clk cpu0 IT (12632) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +12668 clk cpu0 R X8 0000000006216000 +12669 clk cpu0 IT (12633) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +12669 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +12669 clk cpu0 R X8 0000000000000001 +12670 clk cpu0 IT (12634) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +12670 clk cpu0 R cpsr 800003c0 +12671 clk cpu0 IT (12635) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +12672 clk cpu0 IT (12636) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +12673 clk cpu0 IT (12637) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +12673 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_60000000 +12673 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_0009b180 +12673 clk cpu0 R X19 0000000060000000 +12673 clk cpu0 R X30 000000000009B180 +12674 clk cpu0 IT (12638) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +12674 clk cpu0 MR8 030458c0:0000008458c0_NS 00000000_00000000 +12674 clk cpu0 MR8 030458c8:0000008458c8_NS 00000000_00000002 +12674 clk cpu0 R X20 0000000000000002 +12674 clk cpu0 R X21 0000000000000000 +12675 clk cpu0 IT (12639) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +12675 clk cpu0 R SP_EL0 00000000030458E0 +12676 clk cpu0 IT (12640) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +12677 clk cpu0 IT (12641) 0009b180:00001009b180_NS 52800028 O EL0t_n : MOV w8,#1 +12677 clk cpu0 R X8 0000000000000001 +12678 clk cpu0 IT (12642) 0009b184:00001009b184_NS 52800309 O EL0t_n : MOV w9,#0x18 +12678 clk cpu0 R X9 0000000000000018 +12679 clk cpu0 IT (12643) 0009b188:00001009b188_NS 5290010a O EL0t_n : MOV w10,#0x8008 +12679 clk cpu0 R X10 0000000000008008 +12680 clk cpu0 IT (12644) 0009b18c:00001009b18c_NS 5280006b O EL0t_n : MOV w11,#3 +12680 clk cpu0 R X11 0000000000000003 +12681 clk cpu0 IT (12645) 0009b190:00001009b190_NS 5290008c O EL0t_n : MOV w12,#0x8004 +12681 clk cpu0 R X12 0000000000008004 +12682 clk cpu0 IT (12646) 0009b194:00001009b194_NS b90002e8 O EL0t_n : STR w8,[x23,#0] +12682 clk cpu0 MW4 0621600c:00001521600c_NS 00000001 +12683 clk cpu0 IT (12647) 0009b198:00001009b198_NS 9b095aa8 O EL0t_n : MADD x8,x21,x9,x22 +12683 clk cpu0 R X8 000000000620E000 +12684 clk cpu0 IT (12648) 0009b19c:00001009b19c_NS b82a690b O EL0t_n : STR w11,[x8,x10] +12684 clk cpu0 MW4 06216008:000015216008_NS 00000003 +12685 clk cpu0 IT (12649) 0009b1a0:00001009b1a0_NS b82c691f O EL0t_n : STR wzr,[x8,x12] +12685 clk cpu0 MW4 06216004:000015216004_NS 00000000 +12686 clk cpu0 IT (12650) 0009b1a4:00001009b1a4_NS 17ffffe0 O EL0t_n : B 0x9b124 +12687 clk cpu0 IT (12651) 0009b124:00001009b124_NS 90017b49 O EL0t_n : ADRP x9,0x3003124 +12687 clk cpu0 R X9 0000000003003000 +12688 clk cpu0 IT (12652) 0009b128:00001009b128_NS aa1f03e8 O EL0t_n : MOV x8,xzr +12688 clk cpu0 R X8 0000000000000000 +12689 clk cpu0 IT (12653) 0009b12c:00001009b12c_NS 91264129 O EL0t_n : ADD x9,x9,#0x990 +12689 clk cpu0 R X9 0000000003003990 +12690 clk cpu0 IT (12654) 0009b130:00001009b130_NS 528000ea O EL0t_n : MOV w10,#7 +12690 clk cpu0 R X10 0000000000000007 +12691 clk cpu0 IT (12655) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +12691 clk cpu0 MW4 03003990:000000803990_NS 00000007 +12692 clk cpu0 IT (12656) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +12692 clk cpu0 R X8 0000000000000004 +12693 clk cpu0 IT (12657) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +12693 clk cpu0 R cpsr 800003c0 +12694 clk cpu0 IT (12658) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +12695 clk cpu0 IT (12659) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +12695 clk cpu0 MW4 03003994:000000803994_NS 00000007 +12696 clk cpu0 IT (12660) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +12696 clk cpu0 R X8 0000000000000008 +12697 clk cpu0 IT (12661) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +12697 clk cpu0 R cpsr 800003c0 +12698 clk cpu0 IT (12662) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +12699 clk cpu0 IT (12663) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +12699 clk cpu0 MW4 03003998:000000803998_NS 00000007 +12700 clk cpu0 IT (12664) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +12700 clk cpu0 R X8 000000000000000C +12701 clk cpu0 IT (12665) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +12701 clk cpu0 R cpsr 800003c0 +12702 clk cpu0 IT (12666) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +12703 clk cpu0 IT (12667) 0009b134:00001009b134_NS b828692a O EL0t_n : STR w10,[x9,x8] +12703 clk cpu0 MW4 0300399c:00000080399c_NS 00000007 +12704 clk cpu0 IT (12668) 0009b138:00001009b138_NS 91001108 O EL0t_n : ADD x8,x8,#4 +12704 clk cpu0 R X8 0000000000000010 +12705 clk cpu0 IT (12669) 0009b13c:00001009b13c_NS f100411f O EL0t_n : CMP x8,#0x10 +12705 clk cpu0 R cpsr 600003c0 +12706 clk cpu0 IS (12670) 0009b140:00001009b140_NS 54ffffa1 O EL0t_n : B.NE 0x9b134 +12707 clk cpu0 IT (12671) 0009b144:00001009b144_NS 2a1303e0 O EL0t_n : MOV w0,w19 +12707 clk cpu0 R X0 0000000060000000 +12708 clk cpu0 IT (12672) 0009b148:00001009b148_NS a9427bf3 O EL0t_n : LDP x19,x30,[sp,#0x20] +12708 clk cpu0 MR8 03045900:000000845900_NS 001fffff_fffffc00 +12708 clk cpu0 MR8 03045908:000000845908_NS 00000000_0100018c +12708 clk cpu0 R X19 001FFFFFFFFFFC00 +12708 clk cpu0 R X30 000000000100018C +12709 clk cpu0 IT (12673) 0009b14c:00001009b14c_NS a94153f5 O EL0t_n : LDP x21,x20,[sp,#0x10] +12709 clk cpu0 MR8 030458f0:0000008458f0_NS 00000000_02f00018 +12709 clk cpu0 MR8 030458f8:0000008458f8_NS 3ffc0000_3ffc0000 +12709 clk cpu0 R X20 3FFC00003FFC0000 +12709 clk cpu0 R X21 0000000002F00018 +12710 clk cpu0 IT (12674) 0009b150:00001009b150_NS a8c35bf7 O EL0t_n : LDP x23,x22,[sp],#0x30 +12710 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_00000000 +12710 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_a0000000 +12710 clk cpu0 R SP_EL0 0000000003045910 +12710 clk cpu0 R X22 00000000A0000000 +12710 clk cpu0 R X23 0000000000000000 +12711 clk cpu0 IT (12675) 0009b154:00001009b154_NS 1400303d O EL0t_n : B 0xa7248 +12712 clk cpu0 IT (12676) 000a7248:0000100a7248_NS d51b4200 O EL0t_n : MSR NZCV,x0 +12712 clk cpu0 R cpsr 600003c0 +12712 clk cpu0 R NZCV 00000000:60000000 +12713 clk cpu0 IT (12677) 000a724c:0000100a724c_NS d65f03c0 O EL0t_n : RET +12714 clk cpu0 IT (12678) 0100018c 10fff8b5 O EL0t_n : ADR x21,0x10000a0 +12714 clk cpu0 R X21 00000000010000A0 +12715 clk cpu0 IT (12679) 01000190 f94002b5 O EL0t_n : LDR x21,[x21,#0] +12715 clk cpu0 MR8 010000a0:0000010000a0_NS 00000000_02f00008 +12715 clk cpu0 R X21 0000000002F00008 +12716 clk cpu0 IT (12680) 01000194 d2800213 O EL0t_n : MOV x19,#0x10 +12716 clk cpu0 R X19 0000000000000010 +12717 clk cpu0 IT (12681) 01000198 f2a00013 O EL0t_n : MOVK x19,#0,LSL #16 +12717 clk cpu0 R X19 0000000000000010 +12718 clk cpu0 IT (12682) 0100019c f2c00013 O EL0t_n : MOVK x19,#0,LSL #32 +12718 clk cpu0 R X19 0000000000000010 +12719 clk cpu0 IT (12683) 010001a0 f2e00013 O EL0t_n : MOVK x19,#0,LSL #48 +12719 clk cpu0 R X19 0000000000000010 +12720 clk cpu0 IT (12684) 010001a4 8b1302b5 O EL0t_n : ADD x21,x21,x19 +12720 clk cpu0 R X21 0000000002F00018 +12721 clk cpu0 IT (12685) 010001a8 d2800136 O EL0t_n : MOV x22,#9 +12721 clk cpu0 R X22 0000000000000009 +12722 clk cpu0 IT (12686) 010001ac d3648ed6 O EL0t_n : LSL x22,x22,#28 +12722 clk cpu0 R X22 0000000090000000 +12723 clk cpu0 IT (12687) 010001b0 d51b4216 O EL0t_n : MSR NZCV,x22 +12723 clk cpu0 R cpsr 900003c0 +12723 clk cpu0 R NZCV 00000000:90000000 +12724 clk cpu0 IT (12688) 010001b4 b2134be0 O EL0t_n : ORR x0,xzr,#0xffffe000ffffe000 +12724 clk cpu0 R X0 FFFFE000FFFFE000 +12725 clk cpu0 IT (12689) 010001b8 b20da7e1 O EL0t_n : ORR x1,xzr,#0x1ff81ff81ff81ff8 +12725 clk cpu0 R X1 1FF81FF81FF81FF8 +12726 clk cpu0 IT (12690) 010001bc b2786fe2 O EL0t_n : ORR x2,xzr,#0xfffffff00 +12726 clk cpu0 R X2 0000000FFFFFFF00 +12726 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000e INVAL 0x0000100381c0_NS +12726 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000e ALLOC 0x0000010001c0_NS +12726 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0072 ALLOC 0x0000010001c0_NS +12727 clk cpu0 IT (12691) 010001c0 b2131fe3 O EL0t_n : ORR x3,xzr,#0x1fe000001fe000 +12727 clk cpu0 R X3 001FE000001FE000 +12728 clk cpu0 IT (12692) 010001c4 b202ebe4 O EL0t_n : ORR x4,xzr,#0xdddddddddddddddd +12728 clk cpu0 R X4 DDDDDDDDDDDDDDDD +12729 clk cpu0 IT (12693) 010001c8 b20593e5 O EL0t_n : ORR x5,xzr,#0xf800f800f800f800 +12729 clk cpu0 R X5 F800F800F800F800 +12730 clk cpu0 IT (12694) 010001cc b25e2fe6 O EL0t_n : ORR x6,xzr,#0x3ffc00000000 +12730 clk cpu0 R X6 00003FFC00000000 +12731 clk cpu0 IT (12695) 010001d0 b2112be7 O EL0t_n : ORR x7,xzr,#0x3ff800003ff8000 +12731 clk cpu0 R X7 03FF800003FF8000 +12732 clk cpu0 IT (12696) 010001d4 b20677e8 O EL0t_n : ORR x8,xzr,#0xfcfffffffcffffff +12732 clk cpu0 R X8 FCFFFFFFFCFFFFFF +12733 clk cpu0 IT (12697) 010001d8 b2611be9 O EL0t_n : ORR x9,xzr,#0x3f80000000 +12733 clk cpu0 R X9 0000003F80000000 +12734 clk cpu0 IT (12698) 010001dc b27bd3ea O EL0t_n : ORR x10,xzr,#0x3ffffffffffffe0 +12734 clk cpu0 R X10 03FFFFFFFFFFFFE0 +12735 clk cpu0 IT (12699) 010001e0 b27eebeb O EL0t_n : ORR x11,xzr,#0x1ffffffffffffffc +12735 clk cpu0 R X11 1FFFFFFFFFFFFFFC +12736 clk cpu0 IT (12700) 010001e4 b245cfec O EL0t_n : ORR x12,xzr,#0xf8007fffffffffff +12736 clk cpu0 R X12 F8007FFFFFFFFFFF +12737 clk cpu0 IT (12701) 010001e8 b20e83ed O EL0t_n : ORR x13,xzr,#0x4000400040004 +12737 clk cpu0 R X13 0004000400040004 +12738 clk cpu0 IT (12702) 010001ec b25073ee O EL0t_n : ORR x14,xzr,#0xffff000000001fff +12738 clk cpu0 R X14 FFFF000000001FFF +12739 clk cpu0 IT (12703) 010001f0 b21a3bef O EL0t_n : ORR x15,xzr,#0x1fffc0001fffc0 +12739 clk cpu0 R X15 001FFFC0001FFFC0 +12740 clk cpu0 IT (12704) 010001f4 b24e17f0 O EL0t_n : ORR x16,xzr,#0xfc000000000000 +12740 clk cpu0 R X16 00FC000000000000 +12741 clk cpu0 IT (12705) 010001f8 b26443f1 O EL0t_n : ORR x17,xzr,#0x1ffff0000000 +12741 clk cpu0 R X17 00001FFFF0000000 +12742 clk cpu0 IT (12706) 010001fc b24873f2 O EL0t_n : ORR x18,xzr,#0xff000000001fffff +12742 clk cpu0 R X18 FF000000001FFFFF +12742 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0011 INVAL 0x000000240200_NS +12742 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0011 ALLOC 0x000001000200_NS +12742 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0084 ALLOC 0x000001000200_NS +12743 clk cpu0 IT (12707) 01000200 b26d67f3 O EL0t_n : ORR x19,xzr,#0x1ffffff80000 +12743 clk cpu0 R X19 00001FFFFFF80000 +12744 clk cpu0 IT (12708) 01000204 b209abf4 O EL0t_n : ORR x20,xzr,#0xff83ff83ff83ff83 +12744 clk cpu0 R X20 FF83FF83FF83FF83 +12745 clk cpu0 IT (12709) 01000208 b267abfd O EL0t_n : ORR x29,xzr,#0xfffffffffe00000f +12745 clk cpu0 R X29 FFFFFFFFFE00000F +12746 clk cpu0 IT (12710) 0100020c b200ebfe O EL0t_n : ORR x30,xzr,#0x7777777777777777 +12746 clk cpu0 R X30 7777777777777777 +12747 clk cpu0 IT (12711) 01000210 914003e8 O EL0t_n : ADD x8,sp,#0,LSL #12 +12747 clk cpu0 R X8 0000000003045910 +12748 clk cpu0 IT (12712) 01000214 9100001f O EL0t_n : ADD sp,x0,#0 +12748 clk cpu0 R SP_EL0 FFFFE000FFFFE000 +12749 clk cpu0 IT (12713) 01000218 b3482724 O EL0t_n : BFI x4,x25,#56,#10 +12749 clk cpu0 R X4 DDDDDDDDDDDDDDDC +12750 clk cpu0 IT (12714) 0100021c d2800003 O EL0t_n : MOV x3,#0 +12750 clk cpu0 R X3 0000000000000000 +12751 clk cpu0 IT (12715) 01000220 f84086af O EL0t_n : LDR x15,[x21],#8 +12751 clk cpu0 MR8 02f00018:000011f00018_NS 00000000_90000000 +12751 clk cpu0 R X15 0000000090000000 +12751 clk cpu0 R X21 0000000002F00020 +12751 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070440000_NS +12751 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000011f00000_NS +12752 clk cpu0 IT (12716) 01000224 d53b4206 O EL0t_n : MRS x6,NZCV +12752 clk cpu0 R X6 0000000090000000 +12753 clk cpu0 IT (12717) 01000228 eb0f00df O EL0t_n : CMP x6,x15 +12753 clk cpu0 R cpsr 600003c0 +12754 clk cpu0 IT (12718) 0100022c 9a9f07ed O EL0t_n : CSET x13,NE +12754 clk cpu0 R X13 0000000000000000 +12755 clk cpu0 IT (12719) 01000230 aa0d0063 O EL0t_n : ORR x3,x3,x13 +12755 clk cpu0 R X3 0000000000000000 +12756 clk cpu0 IT (12720) 01000234 f84086aa O EL0t_n : LDR x10,[x21],#8 +12756 clk cpu0 MR8 02f00020:000011f00020_NS dddddddd_dddddddc +12756 clk cpu0 R X10 DDDDDDDDDDDDDDDC +12756 clk cpu0 R X21 0000000002F00028 +12757 clk cpu0 IT (12721) 01000238 eb04015f O EL0t_n : CMP x10,x4 +12757 clk cpu0 R cpsr 600003c0 +12758 clk cpu0 IT (12722) 0100023c 9a9f07ee O EL0t_n : CSET x14,NE +12758 clk cpu0 R X14 0000000000000000 +12758 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0012 INVAL 0x000000240240_NS +12758 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0012 ALLOC 0x000001000240_NS +12758 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0092 ALLOC 0x000001000240_NS +12759 clk cpu0 IT (12723) 01000240 aa0e0463 O EL0t_n : ORR x3,x3,x14,LSL #1 +12759 clk cpu0 R X3 0000000000000000 +12760 clk cpu0 IT (12724) 01000244 aa0303e0 O EL0t_n : MOV x0,x3 +12760 clk cpu0 R X0 0000000000000000 +12761 clk cpu0 IT (12725) 01000248 9100011f O EL0t_n : ADD sp,x8,#0 +12761 clk cpu0 R SP_EL0 0000000003045910 +12762 clk cpu0 IT (12726) 0100024c d2800001 O EL0t_n : MOV x1,#0 +12762 clk cpu0 R X1 0000000000000000 +12763 clk cpu0 IT (12727) 01000250 97c26bd6 O EL0t_n : BL 0x9b1a8 +12763 clk cpu0 R X30 0000000001000254 +12764 clk cpu0 IT (12728) 0009b1a8:00001009b1a8_NS a9bd5bf7 O EL0t_n : STP x23,x22,[sp,#-0x30]! +12764 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_00000000 +12764 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_90000000 +12764 clk cpu0 R SP_EL0 00000000030458E0 +12765 clk cpu0 IT (12729) 0009b1ac:00001009b1ac_NS a90153f5 O EL0t_n : STP x21,x20,[sp,#0x10] +12765 clk cpu0 MW8 030458f0:0000008458f0_NS 00000000_02f00028 +12765 clk cpu0 MW8 030458f8:0000008458f8_NS ff83ff83_ff83ff83 +12766 clk cpu0 IT (12730) 0009b1b0:00001009b1b0_NS a9027bf3 O EL0t_n : STP x19,x30,[sp,#0x20] +12766 clk cpu0 MW8 03045900:000000845900_NS 00001fff_fff80000 +12766 clk cpu0 MW8 03045908:000000845908_NS 00000000_01000254 +12767 clk cpu0 IT (12731) 0009b1b4:00001009b1b4_NS aa0103f5 O EL0t_n : MOV x21,x1 +12767 clk cpu0 R X21 0000000000000000 +12768 clk cpu0 IT (12732) 0009b1b8:00001009b1b8_NS aa0003f4 O EL0t_n : MOV x20,x0 +12768 clk cpu0 R X20 0000000000000000 +12769 clk cpu0 IT (12733) 0009b1bc:00001009b1bc_NS 94003021 O EL0t_n : BL 0xa7240 +12769 clk cpu0 R X30 000000000009B1C0 +12770 clk cpu0 IT (12734) 000a7240:0000100a7240_NS d53b4200 O EL0t_n : MRS x0,NZCV +12770 clk cpu0 R X0 0000000060000000 +12771 clk cpu0 IT (12735) 000a7244:0000100a7244_NS d65f03c0 O EL0t_n : RET +12772 clk cpu0 IT (12736) 0009b1c0:00001009b1c0_NS 2a0003f3 O EL0t_n : MOV w19,w0 +12772 clk cpu0 R X19 0000000060000000 +12773 clk cpu0 IT (12737) 0009b1c4:00001009b1c4_NS 94003027 O EL0t_n : BL 0xa7260 +12773 clk cpu0 R X30 000000000009B1C8 +12774 clk cpu0 IT (12738) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +12774 clk cpu0 R X0 0000000000000000 +12775 clk cpu0 IT (12739) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +12775 clk cpu0 R cpsr 600007c0 +12776 clk cpu0 IT (12740) 0009b1c8:00001009b1c8_NS f0030b96 O EL0t_n : ADRP x22,0x620e1c8 +12776 clk cpu0 R cpsr 600003c0 +12776 clk cpu0 R X22 000000000620E000 +12777 clk cpu0 IT (12741) 0009b1cc:00001009b1cc_NS 910002d6 O EL0t_n : ADD x22,x22,#0 +12777 clk cpu0 R X22 000000000620E000 +12778 clk cpu0 IT (12742) 0009b1d0:00001009b1d0_NS 52800308 O EL0t_n : MOV w8,#0x18 +12778 clk cpu0 R X8 0000000000000018 +12779 clk cpu0 IT (12743) 0009b1d4:00001009b1d4_NS 9ba85808 O EL0t_n : UMADDL x8,w0,w8,x22 +12779 clk cpu0 R X8 000000000620E000 +12780 clk cpu0 IT (12744) 0009b1d8:00001009b1d8_NS 52900089 O EL0t_n : MOV w9,#0x8004 +12780 clk cpu0 R X9 0000000000008004 +12781 clk cpu0 IT (12745) 0009b1dc:00001009b1dc_NS b869690a O EL0t_n : LDR w10,[x8,x9] +12781 clk cpu0 MR4 06216004:000015216004_NS 00000000 +12781 clk cpu0 R X10 0000000000000000 +12782 clk cpu0 IT (12746) 0009b1e0:00001009b1e0_NS 2a0003f7 O EL0t_n : MOV w23,w0 +12782 clk cpu0 R X23 0000000000000000 +12783 clk cpu0 IT (12747) 0009b1e4:00001009b1e4_NS 11000542 O EL0t_n : ADD w2,w10,#1 +12783 clk cpu0 R X2 0000000000000001 +12784 clk cpu0 IT (12748) 0009b1e8:00001009b1e8_NS b8296902 O EL0t_n : STR w2,[x8,x9] +12784 clk cpu0 MW4 06216004:000015216004_NS 00000001 +12785 clk cpu0 IT (12749) 0009b1ec:00001009b1ec_NS b4000134 O EL0t_n : CBZ x20,0x9b210 +12786 clk cpu0 IT (12750) 0009b210:00001009b210_NS 52800308 O EL0t_n : MOV w8,#0x18 +12786 clk cpu0 R X8 0000000000000018 +12787 clk cpu0 IT (12751) 0009b214:00001009b214_NS 9b085ae8 O EL0t_n : MADD x8,x23,x8,x22 +12787 clk cpu0 R X8 000000000620E000 +12788 clk cpu0 IT (12752) 0009b218:00001009b218_NS 52900109 O EL0t_n : MOV w9,#0x8008 +12788 clk cpu0 R X9 0000000000008008 +12789 clk cpu0 IT (12753) 0009b21c:00001009b21c_NS 8b090108 O EL0t_n : ADD x8,x8,x9 +12789 clk cpu0 R X8 0000000006216008 +12790 clk cpu0 IT (12754) 0009b220:00001009b220_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +12790 clk cpu0 MR4 06216008:000015216008_NS 00000003 +12790 clk cpu0 R X9 0000000000000003 +12791 clk cpu0 IS (12755) 0009b224:00001009b224_NS 34000249 O EL0t_n : CBZ w9,0x9b26c +12792 clk cpu0 IT (12756) 0009b228:00001009b228_NS 52800089 O EL0t_n : MOV w9,#4 +12792 clk cpu0 R X9 0000000000000004 +12793 clk cpu0 IT (12757) 0009b22c:00001009b22c_NS b9000109 O EL0t_n : STR w9,[x8,#0] +12793 clk cpu0 MW4 06216008:000015216008_NS 00000004 +12794 clk cpu0 IT (12758) 0009b230:00001009b230_NS 1400000f O EL0t_n : B 0x9b26c +12795 clk cpu0 IT (12759) 0009b26c:00001009b26c_NS 2a1303e0 O EL0t_n : MOV w0,w19 +12795 clk cpu0 R X0 0000000060000000 +12796 clk cpu0 IT (12760) 0009b270:00001009b270_NS a9427bf3 O EL0t_n : LDP x19,x30,[sp,#0x20] +12796 clk cpu0 MR8 03045900:000000845900_NS 00001fff_fff80000 +12796 clk cpu0 MR8 03045908:000000845908_NS 00000000_01000254 +12796 clk cpu0 R X19 00001FFFFFF80000 +12796 clk cpu0 R X30 0000000001000254 +12797 clk cpu0 IT (12761) 0009b274:00001009b274_NS a94153f5 O EL0t_n : LDP x21,x20,[sp,#0x10] +12797 clk cpu0 MR8 030458f0:0000008458f0_NS 00000000_02f00028 +12797 clk cpu0 MR8 030458f8:0000008458f8_NS ff83ff83_ff83ff83 +12797 clk cpu0 R X20 FF83FF83FF83FF83 +12797 clk cpu0 R X21 0000000002F00028 +12798 clk cpu0 IT (12762) 0009b278:00001009b278_NS a8c35bf7 O EL0t_n : LDP x23,x22,[sp],#0x30 +12798 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_00000000 +12798 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_90000000 +12798 clk cpu0 R SP_EL0 0000000003045910 +12798 clk cpu0 R X22 0000000090000000 +12798 clk cpu0 R X23 0000000000000000 +12799 clk cpu0 IT (12763) 0009b27c:00001009b27c_NS 14002ff3 O EL0t_n : B 0xa7248 +12800 clk cpu0 IT (12764) 000a7248:0000100a7248_NS d51b4200 O EL0t_n : MSR NZCV,x0 +12800 clk cpu0 R cpsr 600003c0 +12800 clk cpu0 R NZCV 00000000:60000000 +12801 clk cpu0 IT (12765) 000a724c:0000100a724c_NS d65f03c0 O EL0t_n : RET +12802 clk cpu0 IT (12766) 01000254 d2800040 O EL0t_n : MOV x0,#2 +12802 clk cpu0 R X0 0000000000000002 +12803 clk cpu0 IT (12767) 01000258 97c26aba O EL0t_n : BL 0x9ad40 +12803 clk cpu0 R X30 000000000100025C +12804 clk cpu0 IT (12768) 0009ad40:00001009ad40_NS a9bb6bfb O EL0t_n : STP x27,x26,[sp,#-0x50]! +12804 clk cpu0 MW8 030458c0:0000008458c0_NS 00010001_00010001 +12804 clk cpu0 MW8 030458c8:0000008458c8_NS ffe000ff_ffe000ff +12804 clk cpu0 R SP_EL0 00000000030458C0 +12805 clk cpu0 IT (12769) 0009ad44:00001009ad44_NS a90163f9 O EL0t_n : STP x25,x24,[sp,#0x10] +12805 clk cpu0 MW8 030458d0:0000008458d0_NS 00000000_0000003c +12805 clk cpu0 MW8 030458d8:0000008458d8_NS 00000000_00007c00 +12806 clk cpu0 IT (12770) 0009ad48:00001009ad48_NS a9025bf7 O EL0t_n : STP x23,x22,[sp,#0x20] +12806 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_00000000 +12806 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_90000000 +12807 clk cpu0 IT (12771) 0009ad4c:00001009ad4c_NS a90353f5 O EL0t_n : STP x21,x20,[sp,#0x30] +12807 clk cpu0 MW8 030458f0:0000008458f0_NS 00000000_02f00028 +12807 clk cpu0 MW8 030458f8:0000008458f8_NS ff83ff83_ff83ff83 +12808 clk cpu0 IT (12772) 0009ad50:00001009ad50_NS a9047bf3 O EL0t_n : STP x19,x30,[sp,#0x40] +12808 clk cpu0 MW8 03045900:000000845900_NS 00001fff_fff80000 +12808 clk cpu0 MW8 03045908:000000845908_NS 00000000_0100025c +12809 clk cpu0 IT (12773) 0009ad54:00001009ad54_NS 2a0003f5 O EL0t_n : MOV w21,w0 +12809 clk cpu0 R X21 0000000000000002 +12810 clk cpu0 IT (12774) 0009ad58:00001009ad58_NS 9400313a O EL0t_n : BL 0xa7240 +12810 clk cpu0 R X30 000000000009AD5C +12811 clk cpu0 IT (12775) 000a7240:0000100a7240_NS d53b4200 O EL0t_n : MRS x0,NZCV +12811 clk cpu0 R X0 0000000060000000 +12812 clk cpu0 IT (12776) 000a7244:0000100a7244_NS d65f03c0 O EL0t_n : RET +12813 clk cpu0 IT (12777) 0009ad5c:00001009ad5c_NS 2a0003f3 O EL0t_n : MOV w19,w0 +12813 clk cpu0 R X19 0000000060000000 +12814 clk cpu0 IT (12778) 0009ad60:00001009ad60_NS 94003140 O EL0t_n : BL 0xa7260 +12814 clk cpu0 R X30 000000000009AD64 +12815 clk cpu0 IT (12779) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +12815 clk cpu0 R X0 0000000000000000 +12816 clk cpu0 IT (12780) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +12816 clk cpu0 R cpsr 600007c0 +12817 clk cpu0 IT (12781) 0009ad64:00001009ad64_NS 90030bb8 O EL0t_n : ADRP x24,0x620ed64 +12817 clk cpu0 R cpsr 600003c0 +12817 clk cpu0 R X24 000000000620E000 +12818 clk cpu0 IT (12782) 0009ad68:00001009ad68_NS 91000318 O EL0t_n : ADD x24,x24,#0 +12818 clk cpu0 R X24 000000000620E000 +12819 clk cpu0 IT (12783) 0009ad6c:00001009ad6c_NS 52800308 O EL0t_n : MOV w8,#0x18 +12819 clk cpu0 R X8 0000000000000018 +12820 clk cpu0 IT (12784) 0009ad70:00001009ad70_NS 9ba86008 O EL0t_n : UMADDL x8,w0,w8,x24 +12820 clk cpu0 R X8 000000000620E000 +12821 clk cpu0 IT (12785) 0009ad74:00001009ad74_NS 52900009 O EL0t_n : MOV w9,#0x8000 +12821 clk cpu0 R X9 0000000000008000 +12822 clk cpu0 IT (12786) 0009ad78:00001009ad78_NS b8696908 O EL0t_n : LDR w8,[x8,x9] +12822 clk cpu0 MR4 06216000:000015216000_NS 00000002 +12822 clk cpu0 R X8 0000000000000002 +12823 clk cpu0 IT (12787) 0009ad7c:00001009ad7c_NS 6b15011f O EL0t_n : CMP w8,w21 +12823 clk cpu0 R cpsr 600003c0 +12824 clk cpu0 IS (12788) 0009ad80:00001009ad80_NS 540003e1 O EL0t_n : B.NE 0x9adfc +12825 clk cpu0 IT (12789) 0009ad84:00001009ad84_NS 2a0003f4 O EL0t_n : MOV w20,w0 +12825 clk cpu0 R X20 0000000000000000 +12826 clk cpu0 IT (12790) 0009ad88:00001009ad88_NS 52800308 O EL0t_n : MOV w8,#0x18 +12826 clk cpu0 R X8 0000000000000018 +12827 clk cpu0 IT (12791) 0009ad8c:00001009ad8c_NS 9b086288 O EL0t_n : MADD x8,x20,x8,x24 +12827 clk cpu0 R X8 000000000620E000 +12828 clk cpu0 IT (12792) 0009ad90:00001009ad90_NS 52900189 O EL0t_n : MOV w9,#0x800c +12828 clk cpu0 R X9 000000000000800C +12829 clk cpu0 IT (12793) 0009ad94:00001009ad94_NS 8b090108 O EL0t_n : ADD x8,x8,x9 +12829 clk cpu0 R X8 000000000621600C +12830 clk cpu0 IT (12794) 0009ad98:00001009ad98_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +12830 clk cpu0 MR4 0621600c:00001521600c_NS 00000001 +12830 clk cpu0 R X9 0000000000000001 +12831 clk cpu0 IT (12795) 0009ad9c:00001009ad9c_NS 7100053f O EL0t_n : CMP w9,#1 +12831 clk cpu0 R cpsr 600003c0 +12832 clk cpu0 IS (12796) 0009ada0:00001009ada0_NS 540002e1 O EL0t_n : B.NE 0x9adfc +12833 clk cpu0 IT (12797) 0009ada4:00001009ada4_NS b900011f O EL0t_n : STR wzr,[x8,#0] +12833 clk cpu0 MW4 0621600c:00001521600c_NS 00000000 +12834 clk cpu0 IT (12798) 0009ada8:00001009ada8_NS 52800308 O EL0t_n : MOV w8,#0x18 +12834 clk cpu0 R X8 0000000000000018 +12835 clk cpu0 IT (12799) 0009adac:00001009adac_NS 52900109 O EL0t_n : MOV w9,#0x8008 +12835 clk cpu0 R X9 0000000000008008 +12836 clk cpu0 IT (12800) 0009adb0:00001009adb0_NS 9b086288 O EL0t_n : MADD x8,x20,x8,x24 +12836 clk cpu0 R X8 000000000620E000 +12837 clk cpu0 IT (12801) 0009adb4:00001009adb4_NS b8696908 O EL0t_n : LDR w8,[x8,x9] +12837 clk cpu0 MR4 06216008:000015216008_NS 00000004 +12837 clk cpu0 R X8 0000000000000004 +12838 clk cpu0 IT (12802) 0009adb8:00001009adb8_NS 2a1f03f9 O EL0t_n : MOV w25,wzr +12838 clk cpu0 R X25 0000000000000000 +12839 clk cpu0 IT (12803) 0009adbc:00001009adbc_NS 90030bf7 O EL0t_n : ADRP x23,0x6216dbc +12839 clk cpu0 R X23 0000000006216000 +12840 clk cpu0 IT (12804) 0009adc0:00001009adc0_NS f0017c76 O EL0t_n : ADRP x22,0x3029dc0 +12840 clk cpu0 R X22 0000000003029000 +12841 clk cpu0 IT (12805) 0009adc4:00001009adc4_NS 7100111f O EL0t_n : CMP w8,#4 +12841 clk cpu0 R cpsr 600003c0 +12842 clk cpu0 IS (12806) 0009adc8:00001009adc8_NS 54000988 O EL0t_n : B.HI 0x9aef8 +12843 clk cpu0 IT (12807) 0009adcc:00001009adcc_NS f0fffd89 O EL0t_n : ADRP x9,0x4ddcc +12843 clk cpu0 R X9 000000000004D000 +12844 clk cpu0 IT (12808) 0009add0:00001009add0_NS 913c0529 O EL0t_n : ADD x9,x9,#0xf01 +12844 clk cpu0 R X9 000000000004DF01 +12845 clk cpu0 IT (12809) 0009add4:00001009add4_NS 100000ca O EL0t_n : ADR x10,0x9adec +12845 clk cpu0 R X10 000000000009ADEC +12846 clk cpu0 IT (12810) 0009add8:00001009add8_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +12846 clk cpu0 MR1 0004df05:00001004df05_NS 3a +12846 clk cpu0 R X11 000000000000003A +12847 clk cpu0 IT (12811) 0009addc:00001009addc_NS 8b0b094a O EL0t_n : ADD x10,x10,x11,LSL #2 +12847 clk cpu0 R X10 000000000009AED4 +12848 clk cpu0 IT (12812) 0009ade0:00001009ade0_NS 2a1903fa O EL0t_n : MOV w26,w25 +12848 clk cpu0 R X26 0000000000000000 +12849 clk cpu0 IT (12813) 0009ade4:00001009ade4_NS 2a1903fb O EL0t_n : MOV w27,w25 +12849 clk cpu0 R X27 0000000000000000 +12850 clk cpu0 IT (12814) 0009ade8:00001009ade8_NS d61f0140 O EL0t_n : BR x10 +12850 clk cpu0 R cpsr 600007c0 +12851 clk cpu0 IT (12815) 0009aed4:00001009aed4_NS b940fae8 O EL0t_n : LDR w8,[x23,#0xf8] +12851 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +12851 clk cpu0 R cpsr 600003c0 +12851 clk cpu0 R X8 0000000000000003 +12852 clk cpu0 IS (12816) 0009aed8:00001009aed8_NS 340001a8 O EL0t_n : CBZ w8,0x9af0c +12853 clk cpu0 IT (12817) 0009aedc:00001009aedc_NS d0fffd81 O EL0t_n : ADRP x1,0x4cedc +12853 clk cpu0 R X1 000000000004C000 +12854 clk cpu0 IT (12818) 0009aee0:00001009aee0_NS 913fbc21 O EL0t_n : ADD x1,x1,#0xfef +12854 clk cpu0 R X1 000000000004CFEF +12855 clk cpu0 IT (12819) 0009aee4:00001009aee4_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +12855 clk cpu0 R X0 0000000000000000 +12856 clk cpu0 IT (12820) 0009aee8:00001009aee8_NS 2a1403e2 O EL0t_n : MOV w2,w20 +12856 clk cpu0 R X2 0000000000000000 +12857 clk cpu0 IT (12821) 0009aeec:00001009aeec_NS 2a1503e3 O EL0t_n : MOV w3,w21 +12857 clk cpu0 R X3 0000000000000002 +12858 clk cpu0 IT (12822) 0009aef0:00001009aef0_NS 94000577 O EL0t_n : BL 0x9c4cc +12858 clk cpu0 R X30 000000000009AEF4 +12859 clk cpu0 IT (12823) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +12859 clk cpu0 R SP_EL0 0000000003045830 +12860 clk cpu0 IT (12824) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +12860 clk cpu0 R X8 0000000006216000 +12861 clk cpu0 IT (12825) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +12861 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +12861 clk cpu0 R X8 0000000000000003 +12862 clk cpu0 IT (12826) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +12862 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_00000002 +12862 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_00000000 +12863 clk cpu0 IT (12827) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +12863 clk cpu0 MW8 030458b0:0000008458b0_NS 00000000_60000000 +12863 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_0009aef4 +12864 clk cpu0 IT (12828) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +12864 clk cpu0 MW8 03045830:000000845830_NS 00000000_00000000 +12864 clk cpu0 MW8 03045838:000000845838_NS 00000000_00000002 +12865 clk cpu0 IT (12829) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +12865 clk cpu0 R cpsr 200003c0 +12866 clk cpu0 IT (12830) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +12866 clk cpu0 MW8 03045840:000000845840_NS dddddddd_dddddddc +12866 clk cpu0 MW8 03045848:000000845848_NS f800f800_f800f800 +12867 clk cpu0 IT (12831) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +12867 clk cpu0 MW8 03045850:000000845850_NS 00000000_90000000 +12867 clk cpu0 MW8 03045858:000000845858_NS 03ff8000_03ff8000 +12868 clk cpu0 IT (12832) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +12868 clk cpu0 MW8 03045890:000000845890_NS 00000000_00000000 +12868 clk cpu0 MW8 03045898:000000845898_NS 00000000_00000000 +12869 clk cpu0 IT (12833) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +12869 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000000 +12869 clk cpu0 MW8 03045888:000000845888_NS 00000000_00000000 +12870 clk cpu0 IS (12834) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +12871 clk cpu0 IT (12835) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +12871 clk cpu0 R X20 0000000003008000 +12872 clk cpu0 IT (12836) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +12872 clk cpu0 R X20 0000000003008528 +12873 clk cpu0 IT (12837) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +12873 clk cpu0 R X0 0000000003008528 +12874 clk cpu0 IT (12838) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +12874 clk cpu0 R X19 000000000004CFEF +12875 clk cpu0 IT (12839) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +12875 clk cpu0 R X30 000000000009C510 +12876 clk cpu0 IT (12840) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +12876 clk cpu0 R X8 0000000006216000 +12877 clk cpu0 IT (12841) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +12877 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +12877 clk cpu0 R X8 0000000000000001 +12878 clk cpu0 IT (12842) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +12878 clk cpu0 R cpsr 800003c0 +12879 clk cpu0 IT (12843) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +12880 clk cpu0 IT (12844) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +12881 clk cpu0 IT (12845) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +12881 clk cpu0 R X9 0000000003045830 +12882 clk cpu0 IT (12846) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +12882 clk cpu0 R X8 00000000FFFFFFD0 +12883 clk cpu0 IT (12847) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +12883 clk cpu0 R X10 00000000030458C0 +12884 clk cpu0 IT (12848) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +12884 clk cpu0 R X9 0000000003045860 +12885 clk cpu0 IT (12849) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +12885 clk cpu0 R X0 0000000000000000 +12886 clk cpu0 IT (12850) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +12886 clk cpu0 R X1 0000000000000000 +12887 clk cpu0 IT (12851) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +12887 clk cpu0 R X2 0000000000000000 +12888 clk cpu0 IT (12852) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +12888 clk cpu0 MW8 03045898:000000845898_NS 00000000_ffffffd0 +12889 clk cpu0 IT (12853) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +12889 clk cpu0 MW8 03045880:000000845880_NS 00000000_030458c0 +12889 clk cpu0 MW8 03045888:000000845888_NS 00000000_03045860 +12890 clk cpu0 IT (12854) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +12891 clk cpu0 IT (12855) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +12891 clk cpu0 MR8 03045888:000000845888_NS 00000000_03045860 +12891 clk cpu0 MR8 03045890:000000845890_NS 00000000_00000000 +12891 clk cpu0 R X8 0000000000000000 +12891 clk cpu0 R X10 0000000003045860 +12892 clk cpu0 IT (12856) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +12892 clk cpu0 MR8 03045880:000000845880_NS 00000000_030458c0 +12892 clk cpu0 R X9 00000000030458C0 +12893 clk cpu0 IT (12857) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +12893 clk cpu0 MR8 03045898:000000845898_NS 00000000_ffffffd0 +12893 clk cpu0 R X11 00000000FFFFFFD0 +12894 clk cpu0 IT (12858) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +12894 clk cpu0 R X21 0000000000000000 +12895 clk cpu0 IT (12859) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +12895 clk cpu0 R X1 0000000003045860 +12896 clk cpu0 IT (12860) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +12896 clk cpu0 R X0 000000000004CFEF +12897 clk cpu0 IT (12861) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +12897 clk cpu0 MW8 03045868:000000845868_NS 00000000_03045860 +12897 clk cpu0 MW8 03045870:000000845870_NS 00000000_00000000 +12898 clk cpu0 IT (12862) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +12898 clk cpu0 MW8 03045860:000000845860_NS 00000000_030458c0 +12899 clk cpu0 IT (12863) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +12899 clk cpu0 MW8 03045878:000000845878_NS 00000000_ffffffd0 +12900 clk cpu0 IT (12864) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +12900 clk cpu0 R X30 000000000009C560 +12901 clk cpu0 IT (12865) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +12901 clk cpu0 R SP_EL0 0000000003045790 +12902 clk cpu0 IT (12866) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +12902 clk cpu0 MW8 03045820:000000845820_NS 00000000_0004cfef +12902 clk cpu0 MW8 03045828:000000845828_NS 00000000_0009c560 +12903 clk cpu0 IT (12867) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +12903 clk cpu0 R X19 0000000003045860 +12904 clk cpu0 IT (12868) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +12904 clk cpu0 R X1 000000000004C000 +12905 clk cpu0 IT (12869) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +12905 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +12905 clk cpu0 MW8 03045818:000000845818_NS 00000000_03008528 +12906 clk cpu0 IT (12870) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +12906 clk cpu0 R X20 000000000004CFEF +12907 clk cpu0 IT (12871) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +12907 clk cpu0 R X1 000000000004C00B +12908 clk cpu0 IT (12872) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +12908 clk cpu0 R X0 0000000003045794 +12909 clk cpu0 IT (12873) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +12909 clk cpu0 R X2 000000000000003B +12910 clk cpu0 IT (12874) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +12910 clk cpu0 MW8 030457d0:0000008457d0_NS ff7fff7f_ff7fff7f +12911 clk cpu0 IT (12875) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +12911 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +12911 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_00000000 +12912 clk cpu0 IT (12876) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +12912 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_00000000 +12912 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0620e000 +12913 clk cpu0 IT (12877) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +12913 clk cpu0 MW8 03045800:000000845800_NS 00000000_06216000 +12913 clk cpu0 MW8 03045808:000000845808_NS 00000000_03029000 +12914 clk cpu0 IT (12878) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +12914 clk cpu0 R X30 0000000000092B80 +12915 clk cpu0 IT (12879) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +12915 clk cpu0 MW8 03045780:000000845780_NS 00000000_03045860 +12915 clk cpu0 MW8 03045788:000000845788_NS 00000000_00092b80 +12915 clk cpu0 R SP_EL0 0000000003045780 +12916 clk cpu0 IT (12880) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +12916 clk cpu0 R X19 0000000003045794 +12917 clk cpu0 IT (12881) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +12917 clk cpu0 R X30 00000000000104DC +12918 clk cpu0 IT (12882) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +12918 clk cpu0 R cpsr 200003c0 +12919 clk cpu0 IS (12883) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +12920 clk cpu0 IT (12884) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +12920 clk cpu0 R cpsr 400003c0 +12921 clk cpu0 IT (12885) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +12922 clk cpu0 IT (12886) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +12922 clk cpu0 R cpsr 000003c0 +12922 clk cpu0 R X10 0000000000000003 +12923 clk cpu0 IS (12887) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +12924 clk cpu0 IT (12888) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +12924 clk cpu0 R X9 0000000000000020 +12925 clk cpu0 IT (12889) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +12925 clk cpu0 R X8 000000000004C008 +12926 clk cpu0 IT (12890) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +12926 clk cpu0 R cpsr 200003c0 +12927 clk cpu0 IT (12891) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +12927 clk cpu0 R X9 0000000000000008 +12928 clk cpu0 IS (12892) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +12929 clk cpu0 IT (12893) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +12929 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +12929 clk cpu0 R X12 000000000A00000A +12930 clk cpu0 IT (12894) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +12930 clk cpu0 R X10 0000000000000018 +12931 clk cpu0 IT (12895) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +12931 clk cpu0 R X11 000000000000003B +12932 clk cpu0 IT (12896) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12932 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +12932 clk cpu0 R X8 000000000004C00C +12932 clk cpu0 R X13 000000006F727245 +12933 clk cpu0 IT (12897) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12933 clk cpu0 R X12 000000000000000A +12934 clk cpu0 IT (12898) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12934 clk cpu0 R X11 0000000000000037 +12935 clk cpu0 IT (12899) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12935 clk cpu0 R cpsr 200003c0 +12936 clk cpu0 IT (12900) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12936 clk cpu0 R X14 0000000072724500 +12937 clk cpu0 IT (12901) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12937 clk cpu0 R X12 000000007272450A +12938 clk cpu0 IT (12902) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12938 clk cpu0 MW4 03045794:000000845794_NS 7272450a +12938 clk cpu0 R X0 0000000003045798 +12939 clk cpu0 IT (12903) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12939 clk cpu0 R X12 000000006F727245 +12940 clk cpu0 IT (12904) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12941 clk cpu0 IT (12905) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12941 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +12941 clk cpu0 R X8 000000000004C010 +12941 clk cpu0 R X13 0000000049203A72 +12942 clk cpu0 IT (12906) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12942 clk cpu0 R X12 000000000000006F +12943 clk cpu0 IT (12907) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12943 clk cpu0 R X11 0000000000000033 +12944 clk cpu0 IT (12908) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12944 clk cpu0 R cpsr 200003c0 +12945 clk cpu0 IT (12909) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12945 clk cpu0 R X14 00000000203A7200 +12946 clk cpu0 IT (12910) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12946 clk cpu0 R X12 00000000203A726F +12947 clk cpu0 IT (12911) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12947 clk cpu0 MW4 03045798:000000845798_NS 203a726f +12947 clk cpu0 R X0 000000000304579C +12948 clk cpu0 IT (12912) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12948 clk cpu0 R X12 0000000049203A72 +12949 clk cpu0 IT (12913) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12950 clk cpu0 IT (12914) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12950 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +12950 clk cpu0 R X8 000000000004C014 +12950 clk cpu0 R X13 0000000067656C6C +12951 clk cpu0 IT (12915) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12951 clk cpu0 R X12 0000000000000049 +12952 clk cpu0 IT (12916) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12952 clk cpu0 R X11 000000000000002F +12953 clk cpu0 IT (12917) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12953 clk cpu0 R cpsr 200003c0 +12954 clk cpu0 IT (12918) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12954 clk cpu0 R X14 00000000656C6C00 +12955 clk cpu0 IT (12919) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12955 clk cpu0 R X12 00000000656C6C49 +12956 clk cpu0 IT (12920) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12956 clk cpu0 MW4 0304579c:00000084579c_NS 656c6c49 +12956 clk cpu0 R X0 00000000030457A0 +12957 clk cpu0 IT (12921) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12957 clk cpu0 R X12 0000000067656C6C +12958 clk cpu0 IT (12922) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12959 clk cpu0 IT (12923) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12959 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +12959 clk cpu0 R X8 000000000004C018 +12959 clk cpu0 R X13 0000000066206C61 +12960 clk cpu0 IT (12924) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12960 clk cpu0 R X12 0000000000000067 +12961 clk cpu0 IT (12925) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12961 clk cpu0 R X11 000000000000002B +12962 clk cpu0 IT (12926) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12962 clk cpu0 R cpsr 200003c0 +12963 clk cpu0 IT (12927) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12963 clk cpu0 R X14 00000000206C6100 +12964 clk cpu0 IT (12928) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12964 clk cpu0 R X12 00000000206C6167 +12965 clk cpu0 IT (12929) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12965 clk cpu0 MW4 030457a0:0000008457a0_NS 206c6167 +12965 clk cpu0 R X0 00000000030457A4 +12966 clk cpu0 IT (12930) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12966 clk cpu0 R X12 0000000066206C61 +12967 clk cpu0 IT (12931) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12968 clk cpu0 IT (12932) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12968 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +12968 clk cpu0 R X8 000000000004C01C +12968 clk cpu0 R X13 00000000616D726F +12969 clk cpu0 IT (12933) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12969 clk cpu0 R X12 0000000000000066 +12970 clk cpu0 IT (12934) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12970 clk cpu0 R X11 0000000000000027 +12971 clk cpu0 IT (12935) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12971 clk cpu0 R cpsr 200003c0 +12972 clk cpu0 IT (12936) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12972 clk cpu0 R X14 000000006D726F00 +12973 clk cpu0 IT (12937) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12973 clk cpu0 R X12 000000006D726F66 +12974 clk cpu0 IT (12938) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12974 clk cpu0 MW4 030457a4:0000008457a4_NS 6d726f66 +12974 clk cpu0 R X0 00000000030457A8 +12975 clk cpu0 IT (12939) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12975 clk cpu0 R X12 00000000616D726F +12976 clk cpu0 IT (12940) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12977 clk cpu0 IT (12941) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12977 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +12977 clk cpu0 R X8 000000000004C020 +12977 clk cpu0 R X13 0000000070732074 +12978 clk cpu0 IT (12942) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12978 clk cpu0 R X12 0000000000000061 +12979 clk cpu0 IT (12943) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12979 clk cpu0 R X11 0000000000000023 +12980 clk cpu0 IT (12944) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12980 clk cpu0 R cpsr 200003c0 +12981 clk cpu0 IT (12945) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12981 clk cpu0 R X14 0000000073207400 +12982 clk cpu0 IT (12946) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12982 clk cpu0 R X12 0000000073207461 +12983 clk cpu0 IT (12947) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12983 clk cpu0 MW4 030457a8:0000008457a8_NS 73207461 +12983 clk cpu0 R X0 00000000030457AC +12984 clk cpu0 IT (12948) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12984 clk cpu0 R X12 0000000070732074 +12985 clk cpu0 IT (12949) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12986 clk cpu0 IT (12950) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12986 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +12986 clk cpu0 R X8 000000000004C024 +12986 clk cpu0 R X13 0000000066696365 +12987 clk cpu0 IT (12951) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12987 clk cpu0 R X12 0000000000000070 +12988 clk cpu0 IT (12952) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12988 clk cpu0 R X11 000000000000001F +12989 clk cpu0 IT (12953) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12989 clk cpu0 R cpsr 200003c0 +12990 clk cpu0 IT (12954) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12990 clk cpu0 R X14 0000000069636500 +12991 clk cpu0 IT (12955) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +12991 clk cpu0 R X12 0000000069636570 +12992 clk cpu0 IT (12956) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +12992 clk cpu0 MW4 030457ac:0000008457ac_NS 69636570 +12992 clk cpu0 R X0 00000000030457B0 +12993 clk cpu0 IT (12957) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +12993 clk cpu0 R X12 0000000066696365 +12994 clk cpu0 IT (12958) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +12995 clk cpu0 IT (12959) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +12995 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +12995 clk cpu0 R X8 000000000004C028 +12995 clk cpu0 R X13 0000000020726569 +12996 clk cpu0 IT (12960) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +12996 clk cpu0 R X12 0000000000000066 +12997 clk cpu0 IT (12961) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +12997 clk cpu0 R X11 000000000000001B +12998 clk cpu0 IT (12962) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +12998 clk cpu0 R cpsr 200003c0 +12999 clk cpu0 IT (12963) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +12999 clk cpu0 R X14 0000000072656900 +13000 clk cpu0 IT (12964) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +13000 clk cpu0 R X12 0000000072656966 +13001 clk cpu0 IT (12965) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +13001 clk cpu0 MW4 030457b0:0000008457b0_NS 72656966 +13001 clk cpu0 R X0 00000000030457B4 +13002 clk cpu0 IT (12966) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +13002 clk cpu0 R X12 0000000020726569 +13003 clk cpu0 IT (12967) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +13004 clk cpu0 IT (12968) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +13004 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +13004 clk cpu0 R X8 000000000004C02C +13004 clk cpu0 R X13 0000000064657375 +13005 clk cpu0 IT (12969) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +13005 clk cpu0 R X12 0000000000000020 +13006 clk cpu0 IT (12970) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +13006 clk cpu0 R X11 0000000000000017 +13007 clk cpu0 IT (12971) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +13007 clk cpu0 R cpsr 200003c0 +13008 clk cpu0 IT (12972) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +13008 clk cpu0 R X14 0000000065737500 +13009 clk cpu0 IT (12973) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +13009 clk cpu0 R X12 0000000065737520 +13010 clk cpu0 IT (12974) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +13010 clk cpu0 MW4 030457b4:0000008457b4_NS 65737520 +13010 clk cpu0 R X0 00000000030457B8 +13011 clk cpu0 IT (12975) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +13011 clk cpu0 R X12 0000000064657375 +13012 clk cpu0 IT (12976) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +13013 clk cpu0 IT (12977) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +13013 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +13013 clk cpu0 R X8 000000000004C030 +13013 clk cpu0 R X13 000000005F27203A +13014 clk cpu0 IT (12978) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +13014 clk cpu0 R X12 0000000000000064 +13015 clk cpu0 IT (12979) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +13015 clk cpu0 R X11 0000000000000013 +13016 clk cpu0 IT (12980) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +13016 clk cpu0 R cpsr 200003c0 +13017 clk cpu0 IT (12981) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +13017 clk cpu0 R X14 0000000027203A00 +13018 clk cpu0 IT (12982) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +13018 clk cpu0 R X12 0000000027203A64 +13019 clk cpu0 IT (12983) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +13019 clk cpu0 MW4 030457b8:0000008457b8_NS 27203a64 +13019 clk cpu0 R X0 00000000030457BC +13020 clk cpu0 IT (12984) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +13020 clk cpu0 R X12 000000005F27203A +13021 clk cpu0 IT (12985) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +13022 clk cpu0 IT (12986) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +13022 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +13022 clk cpu0 R X8 000000000004C034 +13022 clk cpu0 R X13 0000000045202E27 +13023 clk cpu0 IT (12987) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +13023 clk cpu0 R X12 000000000000005F +13024 clk cpu0 IT (12988) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +13024 clk cpu0 R X11 000000000000000F +13025 clk cpu0 IT (12989) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +13025 clk cpu0 R cpsr 200003c0 +13026 clk cpu0 IT (12990) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +13026 clk cpu0 R X14 00000000202E2700 +13027 clk cpu0 IT (12991) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +13027 clk cpu0 R X12 00000000202E275F +13028 clk cpu0 IT (12992) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +13028 clk cpu0 MW4 030457bc:0000008457bc_NS 202e275f +13028 clk cpu0 R X0 00000000030457C0 +13029 clk cpu0 IT (12993) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +13029 clk cpu0 R X12 0000000045202E27 +13030 clk cpu0 IT (12994) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +13031 clk cpu0 IT (12995) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +13031 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +13031 clk cpu0 R X8 000000000004C038 +13031 clk cpu0 R X13 000000006E69646E +13032 clk cpu0 IT (12996) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +13032 clk cpu0 R X12 0000000000000045 +13033 clk cpu0 IT (12997) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +13033 clk cpu0 R X11 000000000000000B +13034 clk cpu0 IT (12998) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +13034 clk cpu0 R cpsr 200003c0 +13035 clk cpu0 IT (12999) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +13035 clk cpu0 R X14 0000000069646E00 +13036 clk cpu0 IT (13000) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +13036 clk cpu0 R X12 0000000069646E45 +13037 clk cpu0 IT (13001) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +13037 clk cpu0 MW4 030457c0:0000008457c0_NS 69646e45 +13037 clk cpu0 R X0 00000000030457C4 +13038 clk cpu0 IT (13002) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +13038 clk cpu0 R X12 000000006E69646E +13039 clk cpu0 IT (13003) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +13040 clk cpu0 IT (13004) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +13040 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +13040 clk cpu0 R X8 000000000004C03C +13040 clk cpu0 R X13 0000000065542067 +13041 clk cpu0 IT (13005) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +13041 clk cpu0 R X12 000000000000006E +13042 clk cpu0 IT (13006) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +13042 clk cpu0 R X11 0000000000000007 +13043 clk cpu0 IT (13007) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +13043 clk cpu0 R cpsr 200003c0 +13044 clk cpu0 IT (13008) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +13044 clk cpu0 R X14 0000000054206700 +13045 clk cpu0 IT (13009) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +13045 clk cpu0 R X12 000000005420676E +13046 clk cpu0 IT (13010) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +13046 clk cpu0 MW4 030457c4:0000008457c4_NS 5420676e +13046 clk cpu0 R X0 00000000030457C8 +13047 clk cpu0 IT (13011) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +13047 clk cpu0 R X12 0000000065542067 +13048 clk cpu0 IT (13012) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +13049 clk cpu0 IT (13013) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +13049 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +13049 clk cpu0 R X8 000000000004C040 +13049 clk cpu0 R X13 000000000A2E7473 +13050 clk cpu0 IT (13014) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +13050 clk cpu0 R X12 0000000000000065 +13051 clk cpu0 IT (13015) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +13051 clk cpu0 R X11 0000000000000003 +13052 clk cpu0 IT (13016) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +13052 clk cpu0 R cpsr 600003c0 +13053 clk cpu0 IT (13017) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +13053 clk cpu0 R X14 000000002E747300 +13054 clk cpu0 IT (13018) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +13054 clk cpu0 R X12 000000002E747365 +13055 clk cpu0 IT (13019) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +13055 clk cpu0 MW4 030457c8:0000008457c8_NS 2e747365 +13055 clk cpu0 R X0 00000000030457CC +13056 clk cpu0 IT (13020) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +13056 clk cpu0 R X12 000000000A2E7473 +13057 clk cpu0 IS (13021) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +13058 clk cpu0 IT (13022) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +13058 clk cpu0 R X2 0000000000000003 +13059 clk cpu0 IT (13023) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +13059 clk cpu0 R X9 0000000000000001 +13060 clk cpu0 IT (13024) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +13060 clk cpu0 R X8 000000000004C03F +13061 clk cpu0 IT (13025) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +13061 clk cpu0 R X1 000000000004C043 +13062 clk cpu0 IT (13026) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +13062 clk cpu0 R cpsr 200003c0 +13063 clk cpu0 IS (13027) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +13064 clk cpu0 IT (13028) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +13064 clk cpu0 MR1 0004c043:00001004c043_NS 0a +13064 clk cpu0 R X8 000000000000000A +13065 clk cpu0 IT (13029) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +13065 clk cpu0 MW1 030457cc:0000008457cc_NS 0a +13066 clk cpu0 IS (13030) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +13067 clk cpu0 IT (13031) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +13067 clk cpu0 MR1 0004c044:00001004c044_NS 00 +13067 clk cpu0 R X8 0000000000000000 +13068 clk cpu0 IT (13032) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +13068 clk cpu0 R cpsr 600003c0 +13069 clk cpu0 IT (13033) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +13069 clk cpu0 MW1 030457cd:0000008457cd_NS 00 +13070 clk cpu0 IS (13034) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +13071 clk cpu0 IT (13035) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +13071 clk cpu0 MR1 0004c045:00001004c045_NS 00 +13071 clk cpu0 R X8 0000000000000000 +13072 clk cpu0 IT (13036) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +13072 clk cpu0 MW1 030457ce:0000008457ce_NS 00 +13073 clk cpu0 IT (13037) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +13074 clk cpu0 IT (13038) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +13074 clk cpu0 R X0 0000000003045794 +13075 clk cpu0 IT (13039) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +13075 clk cpu0 MR8 03045780:000000845780_NS 00000000_03045860 +13075 clk cpu0 MR8 03045788:000000845788_NS 00000000_00092b80 +13075 clk cpu0 R SP_EL0 0000000003045790 +13075 clk cpu0 R X19 0000000003045860 +13075 clk cpu0 R X30 0000000000092B80 +13076 clk cpu0 IT (13040) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +13077 clk cpu0 IT (13041) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +13077 clk cpu0 R X22 000000000004C000 +13078 clk cpu0 IT (13042) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +13078 clk cpu0 R X23 000000000004C000 +13079 clk cpu0 IT (13043) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +13079 clk cpu0 R X26 0000000000000000 +13080 clk cpu0 IT (13044) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +13080 clk cpu0 R X21 0000000003029000 +13081 clk cpu0 IT (13045) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +13081 clk cpu0 R X22 000000000004C108 +13082 clk cpu0 IT (13046) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +13082 clk cpu0 R X23 000000000004C129 +13083 clk cpu0 IT (13047) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +13083 clk cpu0 R X24 0000000003041000 +13084 clk cpu0 IT (13048) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +13084 clk cpu0 R X25 0000000006216000 +13085 clk cpu0 IT (13049) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +13086 clk cpu0 IT (13050) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13086 clk cpu0 MR1 0004cfef:00001004cfef_NS 0a +13086 clk cpu0 R X8 000000000000000A +13087 clk cpu0 IT (13051) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13087 clk cpu0 R cpsr 800003c0 +13088 clk cpu0 IS (13052) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13089 clk cpu0 IS (13053) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +13090 clk cpu0 IT (13054) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +13090 clk cpu0 R cpsr 000003c0 +13091 clk cpu0 IT (13055) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +13092 clk cpu0 IT (13056) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13092 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13092 clk cpu0 R X9 0000000013000000 +13093 clk cpu0 IT (13057) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +13093 clk cpu0 R X27 000000000004CFEF +13094 clk cpu0 IT (13058) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +13094 clk cpu0 R X20 000000000004CFF0 +TUBE CPU0: +13095 clk cpu0 IT (13059) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +13095 clk cpu0 MW1 13000000:000013000000_NS 0a +13096 clk cpu0 IT (13060) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13096 clk cpu0 MR1 0004cff0:00001004cff0_NS 3e +13096 clk cpu0 R X8 000000000000003E +13097 clk cpu0 IT (13061) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13097 clk cpu0 R cpsr 200003c0 +13098 clk cpu0 IS (13062) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13099 clk cpu0 IS (13063) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +13100 clk cpu0 IT (13064) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +13100 clk cpu0 R cpsr 400003c0 +13101 clk cpu0 IS (13065) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +13102 clk cpu0 IT (13066) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +13102 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +13102 clk cpu0 R X8 0000000000000000 +13103 clk cpu0 IT (13067) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +13103 clk cpu0 MR8 0004cff0:00001004cff0_NS 3a782555_50433e3e +13103 clk cpu0 R X0 3A78255550433E3E +13104 clk cpu0 IT (13068) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +13104 clk cpu0 R cpsr 800003c0 +13105 clk cpu0 IT (13069) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +13106 clk cpu0 IT (13070) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +13106 clk cpu0 R X27 0000000000000000 +13107 clk cpu0 IT (13071) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +13107 clk cpu0 R X28 000000000004CFF0 +13108 clk cpu0 IT (13072) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +13108 clk cpu0 R X8 00000000FFFFFFF8 +13109 clk cpu0 IT (13073) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13109 clk cpu0 R cpsr 000003c0 +13109 clk cpu0 R X9 000000000000003E +13110 clk cpu0 IS (13074) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13111 clk cpu0 IT (13075) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13111 clk cpu0 R cpsr 200003c0 +13112 clk cpu0 IS (13076) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13113 clk cpu0 IT (13077) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13113 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13113 clk cpu0 R X9 0000000013000000 +13114 clk cpu0 IT (13078) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13114 clk cpu0 R cpsr 800003c0 +13114 clk cpu0 R X8 00000000FFFFFFF9 +13115 clk cpu0 IT (13079) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13115 clk cpu0 MW1 13000000:000013000000_NS 3e +13116 clk cpu0 IT (13080) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13116 clk cpu0 R X0 003A78255550433E +13117 clk cpu0 IT (13081) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13118 clk cpu0 IT (13082) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13118 clk cpu0 R cpsr 000003c0 +13118 clk cpu0 R X9 000000000000003E +13119 clk cpu0 IS (13083) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13120 clk cpu0 IT (13084) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13120 clk cpu0 R cpsr 200003c0 +13121 clk cpu0 IS (13085) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13122 clk cpu0 IT (13086) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13122 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13122 clk cpu0 R X9 0000000013000000 +13123 clk cpu0 IT (13087) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13123 clk cpu0 R cpsr 800003c0 +13123 clk cpu0 R X8 00000000FFFFFFFA +13124 clk cpu0 IT (13088) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13124 clk cpu0 MW1 13000000:000013000000_NS 3e +13125 clk cpu0 IT (13089) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13125 clk cpu0 R X0 00003A7825555043 +13126 clk cpu0 IT (13090) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13127 clk cpu0 IT (13091) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13127 clk cpu0 R cpsr 000003c0 +13127 clk cpu0 R X9 0000000000000043 +13128 clk cpu0 IS (13092) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13129 clk cpu0 IT (13093) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13129 clk cpu0 R cpsr 200003c0 +13130 clk cpu0 IS (13094) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13131 clk cpu0 IT (13095) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13131 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13131 clk cpu0 R X9 0000000013000000 +13132 clk cpu0 IT (13096) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13132 clk cpu0 R cpsr 800003c0 +13132 clk cpu0 R X8 00000000FFFFFFFB +13133 clk cpu0 IT (13097) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13133 clk cpu0 MW1 13000000:000013000000_NS 43 +13134 clk cpu0 IT (13098) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13134 clk cpu0 R X0 0000003A78255550 +13135 clk cpu0 IT (13099) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13136 clk cpu0 IT (13100) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13136 clk cpu0 R cpsr 000003c0 +13136 clk cpu0 R X9 0000000000000050 +13137 clk cpu0 IS (13101) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13138 clk cpu0 IT (13102) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13138 clk cpu0 R cpsr 200003c0 +13139 clk cpu0 IS (13103) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13140 clk cpu0 IT (13104) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13140 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13140 clk cpu0 R X9 0000000013000000 +13141 clk cpu0 IT (13105) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13141 clk cpu0 R cpsr 800003c0 +13141 clk cpu0 R X8 00000000FFFFFFFC +13142 clk cpu0 IT (13106) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13142 clk cpu0 MW1 13000000:000013000000_NS 50 +13143 clk cpu0 IT (13107) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13143 clk cpu0 R X0 000000003A782555 +13144 clk cpu0 IT (13108) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13145 clk cpu0 IT (13109) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13145 clk cpu0 R cpsr 000003c0 +13145 clk cpu0 R X9 0000000000000055 +13146 clk cpu0 IS (13110) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13147 clk cpu0 IT (13111) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13147 clk cpu0 R cpsr 200003c0 +13148 clk cpu0 IS (13112) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13149 clk cpu0 IT (13113) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13149 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13149 clk cpu0 R X9 0000000013000000 +13150 clk cpu0 IT (13114) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13150 clk cpu0 R cpsr 800003c0 +13150 clk cpu0 R X8 00000000FFFFFFFD +13151 clk cpu0 IT (13115) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13151 clk cpu0 MW1 13000000:000013000000_NS 55 +13152 clk cpu0 IT (13116) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13152 clk cpu0 R X0 00000000003A7825 +13153 clk cpu0 IT (13117) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13154 clk cpu0 IT (13118) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13154 clk cpu0 R cpsr 000003c0 +13154 clk cpu0 R X9 0000000000000025 +13155 clk cpu0 IS (13119) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13156 clk cpu0 IT (13120) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13156 clk cpu0 R cpsr 600003c0 +13157 clk cpu0 IT (13121) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13158 clk cpu0 IT (13122) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +13158 clk cpu0 R X8 00000000FFFFFFFD +13159 clk cpu0 IT (13123) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +13159 clk cpu0 R X9 0000000000000004 +13160 clk cpu0 IT (13124) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +13160 clk cpu0 R X9 000000000004CFF4 +13161 clk cpu0 IT (13125) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +13161 clk cpu0 R cpsr 200003c0 +13162 clk cpu0 IT (13126) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +13162 clk cpu0 R X27 000000000004CFF4 +13163 clk cpu0 IT (13127) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +13163 clk cpu0 R X20 000000000004CFF5 +13164 clk cpu0 IT (13128) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +13165 clk cpu0 IT (13129) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13165 clk cpu0 MR1 0004cff5:00001004cff5_NS 25 +13165 clk cpu0 R X8 0000000000000025 +13166 clk cpu0 IT (13130) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13166 clk cpu0 R cpsr 600003c0 +13167 clk cpu0 IT (13131) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13168 clk cpu0 IT (13132) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +13168 clk cpu0 MW4 03029734:000000829734_NS 00000000 +13169 clk cpu0 IT (13133) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +13169 clk cpu0 R X27 000000000004CFF5 +13170 clk cpu0 IT (13134) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +13170 clk cpu0 MR1 0004cff6:00001004cff6_NS 78 +13170 clk cpu0 R X27 000000000004CFF6 +13170 clk cpu0 R X28 0000000000000078 +13171 clk cpu0 IT (13135) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +13171 clk cpu0 R cpsr 200003c0 +13172 clk cpu0 IS (13136) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +13173 clk cpu0 IT (13137) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +13174 clk cpu0 IT (13138) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +13174 clk cpu0 R X8 0000000000000020 +13175 clk cpu0 IT (13139) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +13175 clk cpu0 R cpsr 600003c0 +13176 clk cpu0 IS (13140) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +13177 clk cpu0 IT (13141) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +13177 clk cpu0 R X9 0000000000092CE0 +13178 clk cpu0 IT (13142) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +13178 clk cpu0 MR1 0004c128:00001004c128_NS 00 +13178 clk cpu0 R X10 0000000000000000 +13179 clk cpu0 IT (13143) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +13179 clk cpu0 R X9 0000000000092CE0 +13180 clk cpu0 IT (13144) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +13180 clk cpu0 R cpsr 600007c0 +13181 clk cpu0 IT (13145) 00092ce0:000010092ce0_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +13181 clk cpu0 MR4 03045878:000000845878_NS ffffffd0 +13181 clk cpu0 R cpsr 600003c0 +13181 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +13182 clk cpu0 IS (13146) 00092ce4:000010092ce4_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92cf8 +13183 clk cpu0 IT (13147) 00092ce8:000010092ce8_NS 11002109 O EL0t_n : ADD w9,w8,#8 +13183 clk cpu0 R X9 00000000FFFFFFD8 +13184 clk cpu0 IT (13148) 00092cec:000010092cec_NS 7100013f O EL0t_n : CMP w9,#0 +13184 clk cpu0 R cpsr a00003c0 +13185 clk cpu0 IT (13149) 00092cf0:000010092cf0_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +13185 clk cpu0 MW4 03045878:000000845878_NS ffffffd8 +13186 clk cpu0 IT (13150) 00092cf4:000010092cf4_NS 54000cad O EL0t_n : B.LE 0x92e88 +13187 clk cpu0 IT (13151) 00092e88:000010092e88_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +13187 clk cpu0 MR8 03045868:000000845868_NS 00000000_03045860 +13187 clk cpu0 R X9 0000000003045860 +13188 clk cpu0 IT (13152) 00092e8c:000010092e8c_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +13188 clk cpu0 R X8 0000000003045830 +13189 clk cpu0 IT (13153) 00092e90:000010092e90_NS 17ffff9d O EL0t_n : B 0x92d04 +13190 clk cpu0 IT (13154) 00092d04:000010092d04_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +13190 clk cpu0 MR8 03045830:000000845830_NS 00000000_00000000 +13190 clk cpu0 R X0 0000000000000000 +13191 clk cpu0 IT (13155) 00092d08:000010092d08_NS 52800201 O EL0t_n : MOV w1,#0x10 +13191 clk cpu0 R X1 0000000000000010 +13192 clk cpu0 IT (13156) 00092d0c:000010092d0c_NS 94000a58 O EL0t_n : BL 0x9566c +13192 clk cpu0 R X30 0000000000092D10 +13193 clk cpu0 IT (13157) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +13193 clk cpu0 R SP_EL0 0000000003045770 +13194 clk cpu0 IT (13158) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +13194 clk cpu0 R X8 3030303030303030 +13195 clk cpu0 IT (13159) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +13195 clk cpu0 MW8 03045778:000000845778_NS 30303030_30303030 +13195 clk cpu0 MW8 03045780:000000845780_NS 30303030_30303030 +13196 clk cpu0 IT (13160) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +13196 clk cpu0 MW4 03045788:000000845788_NS 30303030 +13197 clk cpu0 IT (13161) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +13198 clk cpu0 IT (13162) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +13198 clk cpu0 R X11 0000000000000000 +13199 clk cpu0 IT (13163) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +13199 clk cpu0 R X8 0000000003029000 +13200 clk cpu0 IT (13164) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +13200 clk cpu0 MR4 03029734:000000829734_NS 00000000 +13200 clk cpu0 R X8 0000000000000000 +13201 clk cpu0 IT (13165) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +13201 clk cpu0 R cpsr 600003c0 +13202 clk cpu0 IT (13166) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +13202 clk cpu0 R X8 0000000000000000 +13203 clk cpu0 IT (13167) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +13203 clk cpu0 R cpsr 800003c0 +13204 clk cpu0 IT (13168) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +13205 clk cpu0 IT (13169) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +13205 clk cpu0 R X9 0000000003045778 +13206 clk cpu0 IT (13170) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +13206 clk cpu0 R X10 0000000006216000 +13207 clk cpu0 IT (13171) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +13207 clk cpu0 MR1 03045778:000000845778_NS 30 +13207 clk cpu0 R X8 0000000000000030 +13208 clk cpu0 IT (13172) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +13208 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13208 clk cpu0 R X9 0000000013000000 +13209 clk cpu0 IT (13173) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +13209 clk cpu0 MW1 13000000:000013000000_NS 30 +13210 clk cpu0 IT (13174) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +13210 clk cpu0 R SP_EL0 0000000003045790 +13211 clk cpu0 IT (13175) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +13212 clk cpu0 IT (13176) 00092d10:000010092d10_NS 91000774 O EL0t_n : ADD x20,x27,#1 +13212 clk cpu0 R X20 000000000004CFF7 +13213 clk cpu0 IT (13177) 00092d14:000010092d14_NS 17ffffa8 O EL0t_n : B 0x92bb4 +13214 clk cpu0 IT (13178) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13214 clk cpu0 MR1 0004cff7:00001004cff7_NS 3a +13214 clk cpu0 R X8 000000000000003A +13215 clk cpu0 IT (13179) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13215 clk cpu0 R cpsr 200003c0 +13216 clk cpu0 IS (13180) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13217 clk cpu0 IS (13181) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +13218 clk cpu0 IT (13182) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +13218 clk cpu0 R cpsr 000003c0 +13219 clk cpu0 IT (13183) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +13220 clk cpu0 IT (13184) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13220 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13220 clk cpu0 R X9 0000000013000000 +13221 clk cpu0 IT (13185) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +13221 clk cpu0 R X27 000000000004CFF7 +13222 clk cpu0 IT (13186) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +13222 clk cpu0 R X20 000000000004CFF8 +13223 clk cpu0 IT (13187) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +13223 clk cpu0 MW1 13000000:000013000000_NS 3a +13224 clk cpu0 IT (13188) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13224 clk cpu0 MR1 0004cff8:00001004cff8_NS 20 +13224 clk cpu0 R X8 0000000000000020 +13225 clk cpu0 IT (13189) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13225 clk cpu0 R cpsr 800003c0 +13226 clk cpu0 IS (13190) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13227 clk cpu0 IS (13191) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +13228 clk cpu0 IT (13192) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +13228 clk cpu0 R cpsr 400003c0 +13229 clk cpu0 IS (13193) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +13230 clk cpu0 IT (13194) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +13230 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +13230 clk cpu0 R X8 0000000000000000 +13231 clk cpu0 IT (13195) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +13231 clk cpu0 MR8 0004cff8:00001004cff8_NS 64255f54_52415020 +13231 clk cpu0 R X0 64255F5452415020 +13232 clk cpu0 IT (13196) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +13232 clk cpu0 R cpsr 800003c0 +13233 clk cpu0 IT (13197) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +13234 clk cpu0 IT (13198) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +13234 clk cpu0 R X27 0000000000000000 +13235 clk cpu0 IT (13199) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +13235 clk cpu0 R X28 000000000004CFF8 +13236 clk cpu0 IT (13200) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +13236 clk cpu0 R X8 00000000FFFFFFF8 +13237 clk cpu0 IT (13201) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13237 clk cpu0 R cpsr 000003c0 +13237 clk cpu0 R X9 0000000000000020 +13238 clk cpu0 IS (13202) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13239 clk cpu0 IT (13203) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13239 clk cpu0 R cpsr 800003c0 +13240 clk cpu0 IS (13204) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13241 clk cpu0 IT (13205) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13241 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13241 clk cpu0 R X9 0000000013000000 +13242 clk cpu0 IT (13206) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13242 clk cpu0 R cpsr 800003c0 +13242 clk cpu0 R X8 00000000FFFFFFF9 +13243 clk cpu0 IT (13207) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13243 clk cpu0 MW1 13000000:000013000000_NS 20 +13244 clk cpu0 IT (13208) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13244 clk cpu0 R X0 0064255F54524150 +13245 clk cpu0 IT (13209) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13246 clk cpu0 IT (13210) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13246 clk cpu0 R cpsr 000003c0 +13246 clk cpu0 R X9 0000000000000050 +13247 clk cpu0 IS (13211) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13248 clk cpu0 IT (13212) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13248 clk cpu0 R cpsr 200003c0 +13249 clk cpu0 IS (13213) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13250 clk cpu0 IT (13214) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13250 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13250 clk cpu0 R X9 0000000013000000 +13251 clk cpu0 IT (13215) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13251 clk cpu0 R cpsr 800003c0 +13251 clk cpu0 R X8 00000000FFFFFFFA +13252 clk cpu0 IT (13216) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13252 clk cpu0 MW1 13000000:000013000000_NS 50 +13253 clk cpu0 IT (13217) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13253 clk cpu0 R X0 000064255F545241 +13254 clk cpu0 IT (13218) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13255 clk cpu0 IT (13219) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13255 clk cpu0 R cpsr 000003c0 +13255 clk cpu0 R X9 0000000000000041 +13256 clk cpu0 IS (13220) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13257 clk cpu0 IT (13221) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13257 clk cpu0 R cpsr 200003c0 +13258 clk cpu0 IS (13222) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13259 clk cpu0 IT (13223) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13259 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13259 clk cpu0 R X9 0000000013000000 +13260 clk cpu0 IT (13224) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13260 clk cpu0 R cpsr 800003c0 +13260 clk cpu0 R X8 00000000FFFFFFFB +13261 clk cpu0 IT (13225) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13261 clk cpu0 MW1 13000000:000013000000_NS 41 +13262 clk cpu0 IT (13226) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13262 clk cpu0 R X0 00000064255F5452 +13263 clk cpu0 IT (13227) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13264 clk cpu0 IT (13228) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13264 clk cpu0 R cpsr 000003c0 +13264 clk cpu0 R X9 0000000000000052 +13265 clk cpu0 IS (13229) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13266 clk cpu0 IT (13230) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13266 clk cpu0 R cpsr 200003c0 +13267 clk cpu0 IS (13231) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13268 clk cpu0 IT (13232) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13268 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13268 clk cpu0 R X9 0000000013000000 +13269 clk cpu0 IT (13233) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13269 clk cpu0 R cpsr 800003c0 +13269 clk cpu0 R X8 00000000FFFFFFFC +13270 clk cpu0 IT (13234) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13270 clk cpu0 MW1 13000000:000013000000_NS 52 +13271 clk cpu0 IT (13235) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13271 clk cpu0 R X0 0000000064255F54 +13272 clk cpu0 IT (13236) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13273 clk cpu0 IT (13237) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13273 clk cpu0 R cpsr 000003c0 +13273 clk cpu0 R X9 0000000000000054 +13274 clk cpu0 IS (13238) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13275 clk cpu0 IT (13239) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13275 clk cpu0 R cpsr 200003c0 +13276 clk cpu0 IS (13240) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13277 clk cpu0 IT (13241) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13277 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13277 clk cpu0 R X9 0000000013000000 +13278 clk cpu0 IT (13242) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13278 clk cpu0 R cpsr 800003c0 +13278 clk cpu0 R X8 00000000FFFFFFFD +13279 clk cpu0 IT (13243) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13279 clk cpu0 MW1 13000000:000013000000_NS 54 +13280 clk cpu0 IT (13244) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13280 clk cpu0 R X0 000000000064255F +13281 clk cpu0 IT (13245) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13282 clk cpu0 IT (13246) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13282 clk cpu0 R cpsr 000003c0 +13282 clk cpu0 R X9 000000000000005F +13283 clk cpu0 IS (13247) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13284 clk cpu0 IT (13248) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13284 clk cpu0 R cpsr 200003c0 +13285 clk cpu0 IS (13249) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13286 clk cpu0 IT (13250) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13286 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13286 clk cpu0 R X9 0000000013000000 +13287 clk cpu0 IT (13251) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13287 clk cpu0 R cpsr 800003c0 +13287 clk cpu0 R X8 00000000FFFFFFFE +13288 clk cpu0 IT (13252) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13288 clk cpu0 MW1 13000000:000013000000_NS 5f +13289 clk cpu0 IT (13253) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13289 clk cpu0 R X0 0000000000006425 +13290 clk cpu0 IT (13254) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13291 clk cpu0 IT (13255) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13291 clk cpu0 R cpsr 000003c0 +13291 clk cpu0 R X9 0000000000000025 +13292 clk cpu0 IS (13256) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13293 clk cpu0 IT (13257) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13293 clk cpu0 R cpsr 600003c0 +13294 clk cpu0 IT (13258) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13295 clk cpu0 IT (13259) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +13295 clk cpu0 R X8 00000000FFFFFFFE +13296 clk cpu0 IT (13260) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +13296 clk cpu0 R X9 0000000000000005 +13297 clk cpu0 IT (13261) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +13297 clk cpu0 R X9 000000000004CFFD +13298 clk cpu0 IT (13262) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +13298 clk cpu0 R cpsr 200003c0 +13299 clk cpu0 IT (13263) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +13299 clk cpu0 R X27 000000000004CFFD +13300 clk cpu0 IT (13264) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +13300 clk cpu0 R X20 000000000004CFFE +13301 clk cpu0 IT (13265) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +13302 clk cpu0 IT (13266) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13302 clk cpu0 MR1 0004cffe:00001004cffe_NS 25 +13302 clk cpu0 R X8 0000000000000025 +13303 clk cpu0 IT (13267) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13303 clk cpu0 R cpsr 600003c0 +13304 clk cpu0 IT (13268) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13305 clk cpu0 IT (13269) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +13305 clk cpu0 MW4 03029734:000000829734_NS 00000000 +13306 clk cpu0 IT (13270) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +13306 clk cpu0 R X27 000000000004CFFE +13307 clk cpu0 IT (13271) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +13307 clk cpu0 MR1 0004cfff:00001004cfff_NS 64 +13307 clk cpu0 R X27 000000000004CFFF +13307 clk cpu0 R X28 0000000000000064 +13308 clk cpu0 IT (13272) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +13308 clk cpu0 R cpsr 200003c0 +13309 clk cpu0 IS (13273) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +13310 clk cpu0 IT (13274) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +13311 clk cpu0 IT (13275) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +13311 clk cpu0 R X8 000000000000000C +13312 clk cpu0 IT (13276) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +13312 clk cpu0 R cpsr 800003c0 +13313 clk cpu0 IS (13277) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +13314 clk cpu0 IT (13278) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +13314 clk cpu0 R X9 0000000000092CE0 +13315 clk cpu0 IT (13279) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +13315 clk cpu0 MR1 0004c114:00001004c114_NS 0e +13315 clk cpu0 R X10 000000000000000E +13316 clk cpu0 IT (13280) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +13316 clk cpu0 R X9 0000000000092D18 +13317 clk cpu0 IT (13281) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +13317 clk cpu0 R cpsr 800007c0 +13318 clk cpu0 IT (13282) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +13318 clk cpu0 MR4 03045878:000000845878_NS ffffffd8 +13318 clk cpu0 R cpsr 800003c0 +13318 clk cpu0 R X8 FFFFFFFFFFFFFFD8 +13319 clk cpu0 IS (13283) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +13320 clk cpu0 IT (13284) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +13320 clk cpu0 R X9 00000000FFFFFFE0 +13321 clk cpu0 IT (13285) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +13321 clk cpu0 R cpsr a00003c0 +13322 clk cpu0 IT (13286) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +13322 clk cpu0 MW4 03045878:000000845878_NS ffffffe0 +13323 clk cpu0 IT (13287) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +13324 clk cpu0 IT (13288) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +13324 clk cpu0 MR8 03045868:000000845868_NS 00000000_03045860 +13324 clk cpu0 R X9 0000000003045860 +13325 clk cpu0 IT (13289) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +13325 clk cpu0 R X8 0000000003045838 +13326 clk cpu0 IT (13290) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +13327 clk cpu0 IT (13291) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +13327 clk cpu0 MR8 03045838:000000845838_NS 00000000_00000002 +13327 clk cpu0 R X0 0000000000000002 +13328 clk cpu0 IT (13292) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +13328 clk cpu0 R X1 000000000000000A +13329 clk cpu0 IT (13293) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +13329 clk cpu0 R X30 0000000000092D48 +13330 clk cpu0 IT (13294) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +13330 clk cpu0 R SP_EL0 0000000003045770 +13331 clk cpu0 IT (13295) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +13331 clk cpu0 R X8 3030303030303030 +13332 clk cpu0 IT (13296) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +13332 clk cpu0 MW8 03045778:000000845778_NS 30303030_30303030 +13332 clk cpu0 MW8 03045780:000000845780_NS 30303030_30303030 +13333 clk cpu0 IT (13297) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +13333 clk cpu0 MW4 03045788:000000845788_NS 30303030 +13334 clk cpu0 IS (13298) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +13335 clk cpu0 IT (13299) 00095680:000010095680_NS aa1f03eb O EL0t_n : MOV x11,xzr +13335 clk cpu0 R X11 0000000000000000 +13336 clk cpu0 IT (13300) 00095684:000010095684_NS 2a0103e8 O EL0t_n : MOV w8,w1 +13336 clk cpu0 R X8 000000000000000A +13337 clk cpu0 IT (13301) 00095688:000010095688_NS 1103dc29 O EL0t_n : ADD w9,w1,#0xf7 +13337 clk cpu0 R X9 0000000000000101 +13338 clk cpu0 IT (13302) 0009568c:00001009568c_NS 910023ea O EL0t_n : ADD x10,sp,#8 +13338 clk cpu0 R X10 0000000003045778 +13339 clk cpu0 IT (13303) 00095690:000010095690_NS 9ac8080c O EL0t_n : UDIV x12,x0,x8 +13339 clk cpu0 R X12 0000000000000000 +13340 clk cpu0 IT (13304) 00095694:000010095694_NS 1b08818d O EL0t_n : MSUB w13,w12,w8,w0 +13340 clk cpu0 R X13 0000000000000002 +13341 clk cpu0 IT (13305) 00095698:000010095698_NS 710025bf O EL0t_n : CMP w13,#9 +13341 clk cpu0 R cpsr 800003c0 +13342 clk cpu0 IT (13306) 0009569c:00001009569c_NS 1a9f812e O EL0t_n : CSEL w14,w9,wzr,HI +13342 clk cpu0 R X14 0000000000000000 +13343 clk cpu0 IT (13307) 000956a0:0000100956a0_NS 0b0d01cd O EL0t_n : ADD w13,w14,w13 +13343 clk cpu0 R X13 0000000000000002 +13344 clk cpu0 IT (13308) 000956a4:0000100956a4_NS 1100c1ad O EL0t_n : ADD w13,w13,#0x30 +13344 clk cpu0 R X13 0000000000000032 +13345 clk cpu0 IT (13309) 000956a8:0000100956a8_NS eb08001f O EL0t_n : CMP x0,x8 +13345 clk cpu0 R cpsr 800003c0 +13346 clk cpu0 IT (13310) 000956ac:0000100956ac_NS 382b694d O EL0t_n : STRB w13,[x10,x11] +13346 clk cpu0 MW1 03045778:000000845778_NS 32 +13347 clk cpu0 IT (13311) 000956b0:0000100956b0_NS 9100056b O EL0t_n : ADD x11,x11,#1 +13347 clk cpu0 R X11 0000000000000001 +13348 clk cpu0 IT (13312) 000956b4:0000100956b4_NS aa0c03e0 O EL0t_n : MOV x0,x12 +13348 clk cpu0 R X0 0000000000000000 +13349 clk cpu0 IS (13313) 000956b8:0000100956b8_NS 54fffec2 O EL0t_n : B.CS 0x95690 +13350 clk cpu0 IT (13314) 000956bc:0000100956bc_NS 14000002 O EL0t_n : B 0x956c4 +13351 clk cpu0 IT (13315) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +13351 clk cpu0 R X8 0000000003029000 +13352 clk cpu0 IT (13316) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +13352 clk cpu0 MR4 03029734:000000829734_NS 00000000 +13352 clk cpu0 R X8 0000000000000000 +13353 clk cpu0 IT (13317) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +13353 clk cpu0 R cpsr 800003c0 +13354 clk cpu0 IT (13318) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +13354 clk cpu0 R X8 0000000000000001 +13355 clk cpu0 IT (13319) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +13355 clk cpu0 R cpsr 600003c0 +13356 clk cpu0 IS (13320) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +13357 clk cpu0 IT (13321) 000956dc:0000100956dc_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +13357 clk cpu0 R X9 0000000003045778 +13358 clk cpu0 IT (13322) 000956e0:0000100956e0_NS 93407d08 O EL0t_n : SXTW x8,w8 +13358 clk cpu0 R X8 0000000000000001 +13359 clk cpu0 IT (13323) 000956e4:0000100956e4_NS d1000529 O EL0t_n : SUB x9,x9,#1 +13359 clk cpu0 R X9 0000000003045777 +13360 clk cpu0 IT (13324) 000956e8:0000100956e8_NS b0030c0a O EL0t_n : ADRP x10,0x62166e8 +13360 clk cpu0 R X10 0000000006216000 +13361 clk cpu0 IT (13325) 000956ec:0000100956ec_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +13361 clk cpu0 MR1 03045778:000000845778_NS 32 +13361 clk cpu0 R X11 0000000000000032 +13362 clk cpu0 IT (13326) 000956f0:0000100956f0_NS f940714c O EL0t_n : LDR x12,[x10,#0xe0] +13362 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13362 clk cpu0 R X12 0000000013000000 +13363 clk cpu0 IT (13327) 000956f4:0000100956f4_NS d1000508 O EL0t_n : SUB x8,x8,#1 +13363 clk cpu0 R X8 0000000000000000 +13364 clk cpu0 IT (13328) 000956f8:0000100956f8_NS f100011f O EL0t_n : CMP x8,#0 +13364 clk cpu0 R cpsr 600003c0 +13365 clk cpu0 IT (13329) 000956fc:0000100956fc_NS 3900018b O EL0t_n : STRB w11,[x12,#0] +13365 clk cpu0 MW1 13000000:000013000000_NS 32 +13366 clk cpu0 IS (13330) 00095700:000010095700_NS 54ffff6c O EL0t_n : B.GT 0x956ec +13367 clk cpu0 IT (13331) 00095704:000010095704_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +13367 clk cpu0 R SP_EL0 0000000003045790 +13368 clk cpu0 IT (13332) 00095708:000010095708_NS d65f03c0 O EL0t_n : RET +13369 clk cpu0 IT (13333) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +13369 clk cpu0 R X20 000000000004D000 +13370 clk cpu0 IT (13334) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +13371 clk cpu0 IT (13335) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13371 clk cpu0 MR1 0004d000:00001004d000_NS 20 +13371 clk cpu0 R X8 0000000000000020 +13372 clk cpu0 IT (13336) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13372 clk cpu0 R cpsr 800003c0 +13373 clk cpu0 IS (13337) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13374 clk cpu0 IS (13338) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +13375 clk cpu0 IT (13339) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +13375 clk cpu0 R cpsr 400003c0 +13376 clk cpu0 IS (13340) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +13377 clk cpu0 IT (13341) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +13377 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +13377 clk cpu0 R X8 0000000000000000 +13378 clk cpu0 IT (13342) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +13378 clk cpu0 MR8 0004d000:00001004d000_NS 3e000a53_53415020 +13378 clk cpu0 R X0 3E000A5353415020 +13379 clk cpu0 IT (13343) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +13379 clk cpu0 R cpsr 800003c0 +13380 clk cpu0 IT (13344) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +13381 clk cpu0 IT (13345) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +13381 clk cpu0 R X27 0000000000000000 +13382 clk cpu0 IT (13346) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +13382 clk cpu0 R X28 000000000004D000 +13383 clk cpu0 IT (13347) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +13383 clk cpu0 R X8 00000000FFFFFFF8 +13384 clk cpu0 IT (13348) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13384 clk cpu0 R cpsr 000003c0 +13384 clk cpu0 R X9 0000000000000020 +13385 clk cpu0 IS (13349) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13386 clk cpu0 IT (13350) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13386 clk cpu0 R cpsr 800003c0 +13387 clk cpu0 IS (13351) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13388 clk cpu0 IT (13352) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13388 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13388 clk cpu0 R X9 0000000013000000 +13389 clk cpu0 IT (13353) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13389 clk cpu0 R cpsr 800003c0 +13389 clk cpu0 R X8 00000000FFFFFFF9 +13390 clk cpu0 IT (13354) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13390 clk cpu0 MW1 13000000:000013000000_NS 20 +13391 clk cpu0 IT (13355) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13391 clk cpu0 R X0 003E000A53534150 +13392 clk cpu0 IT (13356) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13393 clk cpu0 IT (13357) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13393 clk cpu0 R cpsr 000003c0 +13393 clk cpu0 R X9 0000000000000050 +13394 clk cpu0 IS (13358) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13395 clk cpu0 IT (13359) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13395 clk cpu0 R cpsr 200003c0 +13396 clk cpu0 IS (13360) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13397 clk cpu0 IT (13361) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13397 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13397 clk cpu0 R X9 0000000013000000 +13398 clk cpu0 IT (13362) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13398 clk cpu0 R cpsr 800003c0 +13398 clk cpu0 R X8 00000000FFFFFFFA +13399 clk cpu0 IT (13363) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13399 clk cpu0 MW1 13000000:000013000000_NS 50 +13400 clk cpu0 IT (13364) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13400 clk cpu0 R X0 00003E000A535341 +13401 clk cpu0 IT (13365) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13402 clk cpu0 IT (13366) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13402 clk cpu0 R cpsr 000003c0 +13402 clk cpu0 R X9 0000000000000041 +13403 clk cpu0 IS (13367) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13404 clk cpu0 IT (13368) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13404 clk cpu0 R cpsr 200003c0 +13405 clk cpu0 IS (13369) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13406 clk cpu0 IT (13370) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13406 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13406 clk cpu0 R X9 0000000013000000 +13407 clk cpu0 IT (13371) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13407 clk cpu0 R cpsr 800003c0 +13407 clk cpu0 R X8 00000000FFFFFFFB +13408 clk cpu0 IT (13372) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13408 clk cpu0 MW1 13000000:000013000000_NS 41 +13409 clk cpu0 IT (13373) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13409 clk cpu0 R X0 0000003E000A5353 +13410 clk cpu0 IT (13374) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13411 clk cpu0 IT (13375) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13411 clk cpu0 R cpsr 000003c0 +13411 clk cpu0 R X9 0000000000000053 +13412 clk cpu0 IS (13376) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13413 clk cpu0 IT (13377) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13413 clk cpu0 R cpsr 200003c0 +13414 clk cpu0 IS (13378) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13415 clk cpu0 IT (13379) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13415 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13415 clk cpu0 R X9 0000000013000000 +13416 clk cpu0 IT (13380) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13416 clk cpu0 R cpsr 800003c0 +13416 clk cpu0 R X8 00000000FFFFFFFC +13417 clk cpu0 IT (13381) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13417 clk cpu0 MW1 13000000:000013000000_NS 53 +13418 clk cpu0 IT (13382) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13418 clk cpu0 R X0 000000003E000A53 +13419 clk cpu0 IT (13383) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13420 clk cpu0 IT (13384) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13420 clk cpu0 R cpsr 000003c0 +13420 clk cpu0 R X9 0000000000000053 +13421 clk cpu0 IS (13385) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13422 clk cpu0 IT (13386) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13422 clk cpu0 R cpsr 200003c0 +13423 clk cpu0 IS (13387) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13424 clk cpu0 IT (13388) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13424 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13424 clk cpu0 R X9 0000000013000000 +13425 clk cpu0 IT (13389) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13425 clk cpu0 R cpsr 800003c0 +13425 clk cpu0 R X8 00000000FFFFFFFD +13426 clk cpu0 IT (13390) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13426 clk cpu0 MW1 13000000:000013000000_NS 53 +13427 clk cpu0 IT (13391) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13427 clk cpu0 R X0 00000000003E000A +13428 clk cpu0 IT (13392) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13429 clk cpu0 IT (13393) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13429 clk cpu0 R cpsr 000003c0 +13429 clk cpu0 R X9 000000000000000A +13430 clk cpu0 IS (13394) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13431 clk cpu0 IT (13395) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +13431 clk cpu0 R cpsr 800003c0 +13432 clk cpu0 IS (13396) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +13433 clk cpu0 IT (13397) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +13433 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +13433 clk cpu0 R X9 0000000013000000 +13434 clk cpu0 IT (13398) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +13434 clk cpu0 R cpsr 800003c0 +13434 clk cpu0 R X8 00000000FFFFFFFE +TUBE CPU0: >>CPU0: PART_2 PASS +13435 clk cpu0 IT (13399) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +13435 clk cpu0 MW1 13000000:000013000000_NS 0a +13436 clk cpu0 IT (13400) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +13436 clk cpu0 R X0 0000000000003E00 +13437 clk cpu0 IT (13401) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +13438 clk cpu0 IT (13402) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +13438 clk cpu0 R cpsr 400003c0 +13438 clk cpu0 R X9 0000000000000000 +13439 clk cpu0 IT (13403) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +13440 clk cpu0 IT (13404) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +13440 clk cpu0 R X8 00000000FFFFFFFE +13441 clk cpu0 IT (13405) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +13441 clk cpu0 R X9 0000000000000005 +13442 clk cpu0 IT (13406) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +13442 clk cpu0 R X9 000000000004D005 +13443 clk cpu0 IT (13407) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +13443 clk cpu0 R cpsr 200003c0 +13444 clk cpu0 IT (13408) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +13444 clk cpu0 R X27 000000000004D005 +13445 clk cpu0 IT (13409) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +13445 clk cpu0 R X20 000000000004D006 +13446 clk cpu0 IT (13410) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +13447 clk cpu0 IT (13411) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +13447 clk cpu0 MR1 0004d006:00001004d006_NS 00 +13447 clk cpu0 R X8 0000000000000000 +13448 clk cpu0 IT (13412) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +13448 clk cpu0 R cpsr 800003c0 +13449 clk cpu0 IS (13413) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +13450 clk cpu0 IT (13414) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +13451 clk cpu0 IT (13415) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +13452 clk cpu0 IT (13416) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +13452 clk cpu0 MR8 03045820:000000845820_NS 00000000_0004cfef +13452 clk cpu0 MR8 03045828:000000845828_NS 00000000_0009c560 +13452 clk cpu0 R X19 000000000004CFEF +13452 clk cpu0 R X30 000000000009C560 +13453 clk cpu0 IT (13417) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +13453 clk cpu0 MR8 03045810:000000845810_NS 00000000_00000000 +13453 clk cpu0 MR8 03045818:000000845818_NS 00000000_03008528 +13453 clk cpu0 R X20 0000000003008528 +13453 clk cpu0 R X21 0000000000000000 +13454 clk cpu0 IT (13418) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +13454 clk cpu0 MR8 03045800:000000845800_NS 00000000_06216000 +13454 clk cpu0 MR8 03045808:000000845808_NS 00000000_03029000 +13454 clk cpu0 R X22 0000000003029000 +13454 clk cpu0 R X23 0000000006216000 +13455 clk cpu0 IT (13419) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +13455 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_00000000 +13455 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0620e000 +13455 clk cpu0 R X24 000000000620E000 +13455 clk cpu0 R X25 0000000000000000 +13456 clk cpu0 IT (13420) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +13456 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +13456 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_00000000 +13456 clk cpu0 R X26 0000000000000000 +13456 clk cpu0 R X27 0000000000000000 +13457 clk cpu0 IT (13421) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +13457 clk cpu0 MR8 030457d0:0000008457d0_NS ff7fff7f_ff7fff7f +13457 clk cpu0 R X28 FF7FFF7FFF7FFF7F +13458 clk cpu0 IT (13422) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +13458 clk cpu0 R SP_EL0 0000000003045830 +13459 clk cpu0 IT (13423) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +13460 clk cpu0 IT (13424) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +13460 clk cpu0 R X0 0000000000000001 +13461 clk cpu0 IT (13425) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +13461 clk cpu0 R X1 0000000000000000 +13462 clk cpu0 IT (13426) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +13462 clk cpu0 R X2 0000000000000000 +13463 clk cpu0 IT (13427) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +13464 clk cpu0 IT (13428) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +13465 clk cpu0 IT (13429) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +13465 clk cpu0 R X0 0000000003008528 +13466 clk cpu0 IT (13430) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +13466 clk cpu0 R X30 000000000009C57C +13467 clk cpu0 IT (13431) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +13468 clk cpu0 IT (13432) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +13468 clk cpu0 R X8 0000000006216000 +13469 clk cpu0 IT (13433) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +13469 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13469 clk cpu0 R X8 0000000000000001 +13470 clk cpu0 IT (13434) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +13470 clk cpu0 R cpsr 800003c0 +13471 clk cpu0 IT (13435) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +13472 clk cpu0 IT (13436) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +13473 clk cpu0 IT (13437) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +13473 clk cpu0 MR8 030458b0:0000008458b0_NS 00000000_60000000 +13473 clk cpu0 MR8 030458b8:0000008458b8_NS 00000000_0009aef4 +13473 clk cpu0 R X19 0000000060000000 +13473 clk cpu0 R X30 000000000009AEF4 +13474 clk cpu0 IT (13438) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +13474 clk cpu0 MR8 030458a0:0000008458a0_NS 00000000_00000002 +13474 clk cpu0 MR8 030458a8:0000008458a8_NS 00000000_00000000 +13474 clk cpu0 R X20 0000000000000000 +13474 clk cpu0 R X21 0000000000000002 +13475 clk cpu0 IT (13439) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +13475 clk cpu0 R SP_EL0 00000000030458C0 +13476 clk cpu0 IT (13440) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +13477 clk cpu0 IT (13441) 0009aef4:00001009aef4_NS 14000007 O EL0t_n : B 0x9af10 +13478 clk cpu0 IT (13442) 0009af10:00001009af10_NS 52800188 O EL0t_n : MOV w8,#0xc +13478 clk cpu0 R X8 000000000000000C +13479 clk cpu0 IT (13443) 0009af14:00001009af14_NS 52900609 O EL0t_n : MOV w9,#0x8030 +13479 clk cpu0 R X9 0000000000008030 +13480 clk cpu0 IT (13444) 0009af18:00001009af18_NS 9b086288 O EL0t_n : MADD x8,x20,x8,x24 +13480 clk cpu0 R X8 000000000620E000 +13481 clk cpu0 IT (13445) 0009af1c:00001009af1c_NS 2a1f03f9 O EL0t_n : MOV w25,wzr +13481 clk cpu0 R X25 0000000000000000 +13482 clk cpu0 IT (13446) 0009af20:00001009af20_NS 2a1f03fa O EL0t_n : MOV w26,wzr +13482 clk cpu0 R X26 0000000000000000 +13483 clk cpu0 IT (13447) 0009af24:00001009af24_NS 8b090108 O EL0t_n : ADD x8,x8,x9 +13483 clk cpu0 R X8 0000000006216030 +13484 clk cpu0 IT (13448) 0009af28:00001009af28_NS 5280003b O EL0t_n : MOV w27,#1 +13484 clk cpu0 R X27 0000000000000001 +13485 clk cpu0 IT (13449) 0009af2c:00001009af2c_NS b9400109 O EL0t_n : LDR w9,[x8,#0] +13485 clk cpu0 MR4 06216030:000015216030_NS 00000001 +13485 clk cpu0 R X9 0000000000000001 +13486 clk cpu0 IT (13450) 0009af30:00001009af30_NS 11000529 O EL0t_n : ADD w9,w9,#1 +13486 clk cpu0 R X9 0000000000000002 +13487 clk cpu0 IT (13451) 0009af34:00001009af34_NS b9000109 O EL0t_n : STR w9,[x8,#0] +13487 clk cpu0 MW4 06216030:000015216030_NS 00000002 +13488 clk cpu0 IT (13452) 0009af38:00001009af38_NS b940fae8 O EL0t_n : LDR w8,[x23,#0xf8] +13488 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +13488 clk cpu0 R X8 0000000000000003 +13489 clk cpu0 IT (13453) 0009af3c:00001009af3c_NS 35000328 O EL0t_n : CBNZ w8,0x9afa0 +13490 clk cpu0 IT (13454) 0009afa0:00001009afa0_NS 90030bf4 O EL0t_n : ADRP x20,0x6216fa0 +13490 clk cpu0 R X20 0000000006216000 +13491 clk cpu0 IT (13455) 0009afa4:00001009afa4_NS 91012294 O EL0t_n : ADD x20,x20,#0x48 +13491 clk cpu0 R X20 0000000006216048 +13492 clk cpu0 IT (13456) 0009afa8:00001009afa8_NS 91016a80 O EL0t_n : ADD x0,x20,#0x5a +13492 clk cpu0 R X0 00000000062160A2 +13493 clk cpu0 IT (13457) 0009afac:00001009afac_NS 97fff66c O EL0t_n : BL 0x9895c +13493 clk cpu0 R X30 000000000009AFB0 +13494 clk cpu0 IT (13458) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +13494 clk cpu0 R X8 0000000006216000 +13495 clk cpu0 IT (13459) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +13495 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13495 clk cpu0 R X8 0000000000000001 +13496 clk cpu0 IT (13460) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +13496 clk cpu0 R cpsr 800003c0 +13497 clk cpu0 IT (13461) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +13498 clk cpu0 IT (13462) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +13499 clk cpu0 IT (13463) 0009afb0:00001009afb0_NS b9400288 O EL0t_n : LDR w8,[x20,#0] +13499 clk cpu0 MR4 06216048:000015216048_NS 00000004 +13499 clk cpu0 R X8 0000000000000004 +13500 clk cpu0 IS (13464) 0009afb4:00001009afb4_NS 34000348 O EL0t_n : CBZ w8,0x9b01c +13501 clk cpu0 IS (13465) 0009afb8:00001009afb8_NS 3400013b O EL0t_n : CBZ w27,0x9afdc +13502 clk cpu0 IT (13466) 0009afbc:00001009afbc_NS 7100051f O EL0t_n : CMP w8,#1 +13502 clk cpu0 R cpsr 200003c0 +13503 clk cpu0 IS (13467) 0009afc0:00001009afc0_NS 54000200 O EL0t_n : B.EQ 0x9b000 +13504 clk cpu0 IT (13468) 0009afc4:00001009afc4_NS 71000d1f O EL0t_n : CMP w8,#3 +13504 clk cpu0 R cpsr 200003c0 +13505 clk cpu0 IT (13469) 0009afc8:00001009afc8_NS 540002a1 O EL0t_n : B.NE 0x9b01c +13506 clk cpu0 IT (13470) 0009b01c:00001009b01c_NS f0030bc0 O EL0t_n : ADRP x0,0x621601c +13506 clk cpu0 R X0 0000000006216000 +13507 clk cpu0 IT (13471) 0009b020:00001009b020_NS 91028800 O EL0t_n : ADD x0,x0,#0xa2 +13507 clk cpu0 R X0 00000000062160A2 +13508 clk cpu0 IT (13472) 0009b024:00001009b024_NS 94000285 O EL0t_n : BL 0x9ba38 +13508 clk cpu0 R X30 000000000009B028 +13509 clk cpu0 IT (13473) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +13510 clk cpu0 IT (13474) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +13510 clk cpu0 R X8 0000000006216000 +13511 clk cpu0 IT (13475) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +13511 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13511 clk cpu0 R X8 0000000000000001 +13512 clk cpu0 IT (13476) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +13512 clk cpu0 R cpsr 800003c0 +13513 clk cpu0 IT (13477) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +13514 clk cpu0 IT (13478) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +13515 clk cpu0 IT (13479) 0009b028:00001009b028_NS 2a1303e0 O EL0t_n : MOV w0,w19 +13515 clk cpu0 R X0 0000000060000000 +13516 clk cpu0 IT (13480) 0009b02c:00001009b02c_NS a9447bf3 O EL0t_n : LDP x19,x30,[sp,#0x40] +13516 clk cpu0 MR8 03045900:000000845900_NS 00001fff_fff80000 +13516 clk cpu0 MR8 03045908:000000845908_NS 00000000_0100025c +13516 clk cpu0 R X19 00001FFFFFF80000 +13516 clk cpu0 R X30 000000000100025C +13517 clk cpu0 IT (13481) 0009b030:00001009b030_NS a94353f5 O EL0t_n : LDP x21,x20,[sp,#0x30] +13517 clk cpu0 MR8 030458f0:0000008458f0_NS 00000000_02f00028 +13517 clk cpu0 MR8 030458f8:0000008458f8_NS ff83ff83_ff83ff83 +13517 clk cpu0 R X20 FF83FF83FF83FF83 +13517 clk cpu0 R X21 0000000002F00028 +13518 clk cpu0 IT (13482) 0009b034:00001009b034_NS a9425bf7 O EL0t_n : LDP x23,x22,[sp,#0x20] +13518 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_00000000 +13518 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_90000000 +13518 clk cpu0 R X22 0000000090000000 +13518 clk cpu0 R X23 0000000000000000 +13519 clk cpu0 IT (13483) 0009b038:00001009b038_NS a94163f9 O EL0t_n : LDP x25,x24,[sp,#0x10] +13519 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_0000003c +13519 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_00007c00 +13519 clk cpu0 R X24 0000000000007C00 +13519 clk cpu0 R X25 000000000000003C +13520 clk cpu0 IT (13484) 0009b03c:00001009b03c_NS a8c56bfb O EL0t_n : LDP x27,x26,[sp],#0x50 +13520 clk cpu0 MR8 030458c0:0000008458c0_NS 00010001_00010001 +13520 clk cpu0 MR8 030458c8:0000008458c8_NS ffe000ff_ffe000ff +13520 clk cpu0 R SP_EL0 0000000003045910 +13520 clk cpu0 R X26 FFE000FFFFE000FF +13520 clk cpu0 R X27 0001000100010001 +13521 clk cpu0 IT (13485) 0009b040:00001009b040_NS 14003082 O EL0t_n : B 0xa7248 +13522 clk cpu0 IT (13486) 000a7248:0000100a7248_NS d51b4200 O EL0t_n : MSR NZCV,x0 +13522 clk cpu0 R cpsr 600003c0 +13522 clk cpu0 R NZCV 00000000:60000000 +13523 clk cpu0 IT (13487) 000a724c:0000100a724c_NS d65f03c0 O EL0t_n : RET +13524 clk cpu0 IT (13488) 0100025c 97c27553 O EL0t_n : BL 0x9d7a8 +13524 clk cpu0 R X30 0000000001000260 +13524 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bd ALLOC 0x00001009d780_NS +13524 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15e1 ALLOC 0x00001009d780_NS +13525 clk cpu0 IT (13489) 0009d7a8:00001009d7a8_NS f81e0ff4 O EL0t_n : STR x20,[sp,#-0x20]! +13525 clk cpu0 MW8 030458f0:0000008458f0_NS ff83ff83_ff83ff83 +13525 clk cpu0 R SP_EL0 00000000030458F0 +13526 clk cpu0 IT (13490) 0009d7ac:00001009d7ac_NS a9017bf3 O EL0t_n : STP x19,x30,[sp,#0x10] +13526 clk cpu0 MW8 03045900:000000845900_NS 00001fff_fff80000 +13526 clk cpu0 MW8 03045908:000000845908_NS 00000000_01000260 +13527 clk cpu0 IT (13491) 0009d7b0:00001009d7b0_NS 940026ac O EL0t_n : BL 0xa7260 +13527 clk cpu0 R X30 000000000009D7B4 +13528 clk cpu0 IT (13492) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +13528 clk cpu0 R X0 0000000000000000 +13529 clk cpu0 IT (13493) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +13529 clk cpu0 R cpsr 600007c0 +13530 clk cpu0 IT (13494) 0009d7b4:00001009d7b4_NS 2a0003f3 O EL0t_n : MOV w19,w0 +13530 clk cpu0 R cpsr 600003c0 +13530 clk cpu0 R X19 0000000000000000 +13531 clk cpu0 IT (13495) 0009d7b8:00001009d7b8_NS 52800022 O EL0t_n : MOV w2,#1 +13531 clk cpu0 R X2 0000000000000001 +13532 clk cpu0 IT (13496) 0009d7bc:00001009d7bc_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +13532 clk cpu0 R X0 0000000000000000 +13532 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00be INVAL 0x0000100957c0_NS +13532 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00be ALLOC 0x00001009d7c0_NS +13532 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 15f2 ALLOC 0x00001009d7c0_NS +13533 clk cpu0 IT (13497) 0009d7c0:00001009d7c0_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +13533 clk cpu0 R X1 0000000000000000 +13534 clk cpu0 IT (13498) 0009d7c4:00001009d7c4_NS d503201f O EL0t_n : NOP +13535 clk cpu0 IT (13499) 0009d7c8:00001009d7c8_NS b0030b88 O EL0t_n : ADRP x8,0x620e7c8 +13535 clk cpu0 R X8 000000000620E000 +13536 clk cpu0 IT (13500) 0009d7cc:00001009d7cc_NS 91000108 O EL0t_n : ADD x8,x8,#0 +13536 clk cpu0 R X8 000000000620E000 +13537 clk cpu0 IT (13501) 0009d7d0:00001009d7d0_NS 52800309 O EL0t_n : MOV w9,#0x18 +13537 clk cpu0 R X9 0000000000000018 +13538 clk cpu0 IT (13502) 0009d7d4:00001009d7d4_NS 9ba92268 O EL0t_n : UMADDL x8,w19,w9,x8 +13538 clk cpu0 R X8 000000000620E000 +13539 clk cpu0 IT (13503) 0009d7d8:00001009d7d8_NS 52900189 O EL0t_n : MOV w9,#0x800c +13539 clk cpu0 R X9 000000000000800C +13540 clk cpu0 IT (13504) 0009d7dc:00001009d7dc_NS b8696908 O EL0t_n : LDR w8,[x8,x9] +13540 clk cpu0 MR4 0621600c:00001521600c_NS 00000000 +13540 clk cpu0 R X8 0000000000000000 +13541 clk cpu0 IT (13505) 0009d7e0:00001009d7e0_NS 7100051f O EL0t_n : CMP w8,#1 +13541 clk cpu0 R cpsr 800003c0 +13542 clk cpu0 IT (13506) 0009d7e4:00001009d7e4_NS 54000261 O EL0t_n : B.NE 0x9d830 +13542 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 INVAL 0x00001003d800_NS +13542 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x00001009d800_NS +13542 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1604 ALLOC 0x00001009d800_NS +13543 clk cpu0 IT (13507) 0009d830:00001009d830_NS b0030bc8 O EL0t_n : ADRP x8,0x6216830 +13543 clk cpu0 R X8 0000000006216000 +13544 clk cpu0 IT (13508) 0009d834:00001009d834_NS 91013108 O EL0t_n : ADD x8,x8,#0x4c +13544 clk cpu0 R X8 000000000621604C +13545 clk cpu0 IT (13509) 0009d838:00001009d838_NS aa0803f3 O EL0t_n : MOV x19,x8 +13545 clk cpu0 R X19 000000000621604C +13546 clk cpu0 IT (13510) 0009d83c:00001009d83c_NS b8456661 O EL0t_n : LDR w1,[x19],#0x56 +13546 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13546 clk cpu0 R X1 0000000000000001 +13546 clk cpu0 R X19 00000000062160A2 +13546 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 INVAL 0x000010015840 +13546 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 ALLOC 0x00001009d840_NS +13547 clk cpu0 IT (13511) 0009d840:00001009d840_NS 91005500 O EL0t_n : ADD x0,x8,#0x15 +13547 clk cpu0 R X0 0000000006216061 +13548 clk cpu0 IT (13512) 0009d844:00001009d844_NS 97fffecc O EL0t_n : BL 0x9d374 +13548 clk cpu0 R X30 000000000009D848 +13548 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009b INVAL 0x000010011340_NS +13548 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009b ALLOC 0x00001009d340_NS +13549 clk cpu0 IT (13513) 0009d374:00001009d374_NS f81e0ff4 O EL0t_n : STR x20,[sp,#-0x20]! +13549 clk cpu0 MW8 030458d0:0000008458d0_NS ff83ff83_ff83ff83 +13549 clk cpu0 R SP_EL0 00000000030458D0 +13550 clk cpu0 IT (13514) 0009d378:00001009d378_NS a9017bf3 O EL0t_n : STP x19,x30,[sp,#0x10] +13550 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_062160a2 +13550 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_0009d848 +13551 clk cpu0 IT (13515) 0009d37c:00001009d37c_NS 2a0103f4 O EL0t_n : MOV w20,w1 +13551 clk cpu0 R X20 0000000000000001 +13552 clk cpu0 IT (13516) 0009d380:00001009d380_NS aa0003f3 O EL0t_n : MOV x19,x0 +13552 clk cpu0 R X19 0000000006216061 +13553 clk cpu0 IT (13517) 0009d384:00001009d384_NS 940027b7 O EL0t_n : BL 0xa7260 +13553 clk cpu0 R X30 000000000009D388 +13554 clk cpu0 IT (13518) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +13554 clk cpu0 R X0 0000000000000000 +13555 clk cpu0 IT (13519) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +13555 clk cpu0 R cpsr 800007c0 +13556 clk cpu0 IT (13520) 0009d388:00001009d388_NS b9000fe0 O EL0t_n : STR w0,[sp,#0xc] +13556 clk cpu0 MW4 030458dc:0000008458dc_NS 00000000 +13556 clk cpu0 R cpsr 800003c0 +13557 clk cpu0 IT (13521) 0009d38c:00001009d38c_NS b9400fe8 O EL0t_n : LDR w8,[sp,#0xc] +13557 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +13557 clk cpu0 R X8 0000000000000000 +13558 clk cpu0 IT (13522) 0009d390:00001009d390_NS 91000e69 O EL0t_n : ADD x9,x19,#3 +13558 clk cpu0 R X9 0000000006216064 +13559 clk cpu0 IT (13523) 0009d394:00001009d394_NS 38686928 O EL0t_n : LDRB w8,[x9,x8] +13559 clk cpu0 MR1 06216064:000015216064_NS ff +13559 clk cpu0 R X8 00000000000000FF +13560 clk cpu0 IT (13524) 0009d398:00001009d398_NS b9400fea O EL0t_n : LDR w10,[sp,#0xc] +13560 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +13560 clk cpu0 R X10 0000000000000000 +13561 clk cpu0 IT (13525) 0009d39c:00001009d39c_NS 2a2803e8 O EL0t_n : MVN w8,w8 +13561 clk cpu0 R X8 00000000FFFFFF00 +13562 clk cpu0 IT (13526) 0009d3a0:00001009d3a0_NS 382a6928 O EL0t_n : STRB w8,[x9,x10] +13562 clk cpu0 MW1 06216064:000015216064_NS 00 +13563 clk cpu0 IT (13527) 0009d3a4:00001009d3a4_NS d5033f9f O EL0t_n : DSB SY +13564 clk cpu0 IT (13528) 0009d3a8:00001009d3a8_NS aa1303e0 O EL0t_n : MOV x0,x19 +13564 clk cpu0 R X0 0000000006216061 +13565 clk cpu0 IT (13529) 0009d3ac:00001009d3ac_NS 97ffed6c O EL0t_n : BL 0x9895c +13565 clk cpu0 R X30 000000000009D3B0 +13566 clk cpu0 IT (13530) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +13566 clk cpu0 R X8 0000000006216000 +13567 clk cpu0 IT (13531) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +13567 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13567 clk cpu0 R X8 0000000000000001 +13568 clk cpu0 IT (13532) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +13568 clk cpu0 R cpsr 800003c0 +13569 clk cpu0 IT (13533) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +13570 clk cpu0 IT (13534) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +13571 clk cpu0 IT (13535) 0009d3b0:00001009d3b0_NS 39400668 O EL0t_n : LDRB w8,[x19,#1] +13571 clk cpu0 MR1 06216062:000015216062_NS 00 +13571 clk cpu0 R X8 0000000000000000 +13572 clk cpu0 IT (13536) 0009d3b4:00001009d3b4_NS 11000508 O EL0t_n : ADD w8,w8,#1 +13572 clk cpu0 R X8 0000000000000001 +13573 clk cpu0 IT (13537) 0009d3b8:00001009d3b8_NS 39000668 O EL0t_n : STRB w8,[x19,#1] +13573 clk cpu0 MW1 06216062:000015216062_NS 01 +13574 clk cpu0 IT (13538) 0009d3bc:00001009d3bc_NS 39400668 O EL0t_n : LDRB w8,[x19,#1] +13574 clk cpu0 MR1 06216062:000015216062_NS 01 +13574 clk cpu0 R X8 0000000000000001 +13574 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009e INVAL 0x00001009d3c0 +13574 clk cpu0 CACHE cpu.cpu0.l1icache LINE 009e ALLOC 0x00001009d3c0_NS +13575 clk cpu0 IT (13539) 0009d3c0:00001009d3c0_NS 6b14011f O EL0t_n : CMP w8,w20 +13575 clk cpu0 R cpsr 600003c0 +13576 clk cpu0 IS (13540) 0009d3c4:00001009d3c4_NS 540002c1 O EL0t_n : B.NE 0x9d41c +13577 clk cpu0 IT (13541) 0009d3c8:00001009d3c8_NS 3900067f O EL0t_n : STRB wzr,[x19,#1] +13577 clk cpu0 MW1 06216062:000015216062_NS 00 +13578 clk cpu0 IT (13542) 0009d3cc:00001009d3cc_NS b9000bff O EL0t_n : STR wzr,[sp,#8] +13578 clk cpu0 MW4 030458d8:0000008458d8_NS 00000000 +13579 clk cpu0 IT (13543) 0009d3d0:00001009d3d0_NS b0030bc8 O EL0t_n : ADRP x8,0x62163d0 +13579 clk cpu0 R X8 0000000006216000 +13580 clk cpu0 IT (13544) 0009d3d4:00001009d3d4_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +13580 clk cpu0 MR4 030458d8:0000008458d8_NS 00000000 +13580 clk cpu0 R X9 0000000000000000 +13581 clk cpu0 IT (13545) 0009d3d8:00001009d3d8_NS b9404d0a O EL0t_n : LDR w10,[x8,#0x4c] +13581 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13581 clk cpu0 R X10 0000000000000001 +13582 clk cpu0 IT (13546) 0009d3dc:00001009d3dc_NS 6b0a013f O EL0t_n : CMP w9,w10 +13582 clk cpu0 R cpsr 800003c0 +13583 clk cpu0 IS (13547) 0009d3e0:00001009d3e0_NS 54000142 O EL0t_n : B.CS 0x9d408 +13584 clk cpu0 IT (13548) 0009d3e4:00001009d3e4_NS b9400fe9 O EL0t_n : LDR w9,[sp,#0xc] +13584 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +13584 clk cpu0 R X9 0000000000000000 +13585 clk cpu0 IT (13549) 0009d3e8:00001009d3e8_NS 91000e6a O EL0t_n : ADD x10,x19,#3 +13585 clk cpu0 R X10 0000000006216064 +13586 clk cpu0 IT (13550) 0009d3ec:00001009d3ec_NS 38696949 O EL0t_n : LDRB w9,[x10,x9] +13586 clk cpu0 MR1 06216064:000015216064_NS 00 +13586 clk cpu0 R X9 0000000000000000 +13587 clk cpu0 IT (13551) 0009d3f0:00001009d3f0_NS b9400beb O EL0t_n : LDR w11,[sp,#8] +13587 clk cpu0 MR4 030458d8:0000008458d8_NS 00000000 +13587 clk cpu0 R X11 0000000000000000 +13588 clk cpu0 IT (13552) 0009d3f4:00001009d3f4_NS 382b6949 O EL0t_n : STRB w9,[x10,x11] +13588 clk cpu0 MW1 06216064:000015216064_NS 00 +13589 clk cpu0 IT (13553) 0009d3f8:00001009d3f8_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +13589 clk cpu0 MR4 030458d8:0000008458d8_NS 00000000 +13589 clk cpu0 R X9 0000000000000000 +13590 clk cpu0 IT (13554) 0009d3fc:00001009d3fc_NS 11000529 O EL0t_n : ADD w9,w9,#1 +13590 clk cpu0 R X9 0000000000000001 +13590 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 INVAL 0x000010035400_NS +13590 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 ALLOC 0x00001009d400_NS +13591 clk cpu0 IT (13555) 0009d400:00001009d400_NS b9000be9 O EL0t_n : STR w9,[sp,#8] +13591 clk cpu0 MW4 030458d8:0000008458d8_NS 00000001 +13592 clk cpu0 IT (13556) 0009d404:00001009d404_NS 17fffff4 O EL0t_n : B 0x9d3d4 +13593 clk cpu0 IT (13557) 0009d3d4:00001009d3d4_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +13593 clk cpu0 MR4 030458d8:0000008458d8_NS 00000001 +13593 clk cpu0 R X9 0000000000000001 +13594 clk cpu0 IT (13558) 0009d3d8:00001009d3d8_NS b9404d0a O EL0t_n : LDR w10,[x8,#0x4c] +13594 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13594 clk cpu0 R X10 0000000000000001 +13595 clk cpu0 IT (13559) 0009d3dc:00001009d3dc_NS 6b0a013f O EL0t_n : CMP w9,w10 +13595 clk cpu0 R cpsr 600003c0 +13596 clk cpu0 IT (13560) 0009d3e0:00001009d3e0_NS 54000142 O EL0t_n : B.CS 0x9d408 +13597 clk cpu0 IT (13561) 0009d408:00001009d408_NS d5033fbf O EL0t_n : DMB SY +13598 clk cpu0 IT (13562) 0009d40c:00001009d40c_NS b9400fe8 O EL0t_n : LDR w8,[sp,#0xc] +13598 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +13598 clk cpu0 R X8 0000000000000000 +13599 clk cpu0 IT (13563) 0009d410:00001009d410_NS 8b080268 O EL0t_n : ADD x8,x19,x8 +13599 clk cpu0 R X8 0000000006216061 +13600 clk cpu0 IT (13564) 0009d414:00001009d414_NS 39400d08 O EL0t_n : LDRB w8,[x8,#3] +13600 clk cpu0 MR1 06216064:000015216064_NS 00 +13600 clk cpu0 R X8 0000000000000000 +13601 clk cpu0 IT (13565) 0009d418:00001009d418_NS 39000a68 O EL0t_n : STRB w8,[x19,#2] +13601 clk cpu0 MW1 06216063:000015216063_NS 00 +13602 clk cpu0 IT (13566) 0009d41c:00001009d41c_NS d5033f9f O EL0t_n : DSB SY +13603 clk cpu0 IT (13567) 0009d420:00001009d420_NS aa1303e0 O EL0t_n : MOV x0,x19 +13603 clk cpu0 R X0 0000000006216061 +13604 clk cpu0 IT (13568) 0009d424:00001009d424_NS 97fff985 O EL0t_n : BL 0x9ba38 +13604 clk cpu0 R X30 000000000009D428 +13605 clk cpu0 IT (13569) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +13606 clk cpu0 IT (13570) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +13606 clk cpu0 R X8 0000000006216000 +13607 clk cpu0 IT (13571) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +13607 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13607 clk cpu0 R X8 0000000000000001 +13608 clk cpu0 IT (13572) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +13608 clk cpu0 R cpsr 800003c0 +13609 clk cpu0 IT (13573) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +13610 clk cpu0 IT (13574) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +13611 clk cpu0 IT (13575) 0009d428:00001009d428_NS 39400a68 O EL0t_n : LDRB w8,[x19,#2] +13611 clk cpu0 MR1 06216063:000015216063_NS 00 +13611 clk cpu0 R X8 0000000000000000 +13612 clk cpu0 IT (13576) 0009d42c:00001009d42c_NS b9400fe9 O EL0t_n : LDR w9,[sp,#0xc] +13612 clk cpu0 MR4 030458dc:0000008458dc_NS 00000000 +13612 clk cpu0 R X9 0000000000000000 +13613 clk cpu0 IT (13577) 0009d430:00001009d430_NS 8b090269 O EL0t_n : ADD x9,x19,x9 +13613 clk cpu0 R X9 0000000006216061 +13614 clk cpu0 IT (13578) 0009d434:00001009d434_NS 39400d29 O EL0t_n : LDRB w9,[x9,#3] +13614 clk cpu0 MR1 06216064:000015216064_NS 00 +13614 clk cpu0 R X9 0000000000000000 +13615 clk cpu0 IT (13579) 0009d438:00001009d438_NS 6b09011f O EL0t_n : CMP w8,w9 +13615 clk cpu0 R cpsr 600003c0 +13616 clk cpu0 IT (13580) 0009d43c:00001009d43c_NS 54000060 O EL0t_n : B.EQ 0x9d448 +13616 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a2 INVAL 0x00001009d440 +13616 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a2 ALLOC 0x00001009d440_NS +13617 clk cpu0 IT (13581) 0009d448:00001009d448_NS d5033fbf O EL0t_n : DMB SY +13618 clk cpu0 IT (13582) 0009d44c:00001009d44c_NS a9417bf3 O EL0t_n : LDP x19,x30,[sp,#0x10] +13618 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_062160a2 +13618 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_0009d848 +13618 clk cpu0 R X19 00000000062160A2 +13618 clk cpu0 R X30 000000000009D848 +13619 clk cpu0 IT (13583) 0009d450:00001009d450_NS f84207f4 O EL0t_n : LDR x20,[sp],#0x20 +13619 clk cpu0 MR8 030458d0:0000008458d0_NS ff83ff83_ff83ff83 +13619 clk cpu0 R SP_EL0 00000000030458F0 +13619 clk cpu0 R X20 FF83FF83FF83FF83 +13620 clk cpu0 IT (13584) 0009d454:00001009d454_NS d65f03c0 O EL0t_n : RET +13621 clk cpu0 IT (13585) 0009d848:00001009d848_NS 52800040 O EL0t_n : MOV w0,#2 +13621 clk cpu0 R X0 0000000000000002 +13622 clk cpu0 IT (13586) 0009d84c:00001009d84c_NS 9400267b O EL0t_n : BL 0xa7238 +13622 clk cpu0 R X30 000000000009D850 +13623 clk cpu0 IT (13587) 000a7238:0000100a7238_NS d4000121 O EL0t_n : SVC #9 +13623 clk cpu0 E 000a7238:0000100a7238_NS EL1h 00000019 CoreEvent_ModeChange +13623 clk cpu0 E 000a7238:0000100a7238_NS 00000088 CoreEvent_LOWER_64_SYNC +13623 clk cpu0 R cpsr 620003c5 +13623 clk cpu0 R PMBIDR_EL1 00000030 +13623 clk cpu0 R ESR_EL1 56000009 +13623 clk cpu0 R SPSR_EL1 600003c0 +13623 clk cpu0 R TRBIDR_EL1 000000000000002b +13623 clk cpu0 R ELR_EL1 00000000000a723c +13623 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +13623 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +13623 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 INVAL 0x00001009d400_NS +13623 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 ALLOC 0x000010035400_NS +13624 clk cpu0 IT (13588) 00035400:000010035400_NS 1400168d O EL1h_n : B 0x3ae34 +13625 clk cpu0 IT (13589) 0003ae34:00001003ae34_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +13625 clk cpu0 R SP_EL1 0000000003800710 +13626 clk cpu0 IT (13590) 0003ae38:00001003ae38_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +13626 clk cpu0 MW8 03800710:000010800710_NS 00000000_00000002 +13626 clk cpu0 MW8 03800718:000010800718_NS 00000000_00000001 +13626 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 CLEAN 0x000000f00700_NS +13626 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 INVAL 0x000000f00700_NS +13626 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 ALLOC 0x000010800700_NS +13626 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01c2 ALLOC 0x000000f00700_NS +13626 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01c1 CLEAN 0x000010800700_NS +13626 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01c1 INVAL 0x000010800700_NS +13627 clk cpu0 IT (13591) 0003ae3c:00001003ae3c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +13627 clk cpu0 R X0 0000000056000009 +13627 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0172 INVAL 0x000010092e40_NS +13627 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0172 ALLOC 0x00001003ae40_NS +13628 clk cpu0 IT (13592) 0003ae40:00001003ae40_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +13628 clk cpu0 R X1 0000000000000015 +13629 clk cpu0 IT (13593) 0003ae44:00001003ae44_NS 7100543f O EL1h_n : CMP w1,#0x15 +13629 clk cpu0 R cpsr 620003c5 +13630 clk cpu0 IT (13594) 0003ae48:00001003ae48_NS 54000060 O EL1h_n : B.EQ 0x3ae54 +13631 clk cpu0 IT (13595) 0003ae54:00001003ae54_NS 53003c01 O EL1h_n : UXTH w1,w0 +13631 clk cpu0 R X1 0000000000000009 +13632 clk cpu0 IT (13596) 0003ae58:00001003ae58_NS 7100143f O EL1h_n : CMP w1,#5 +13632 clk cpu0 R cpsr 220003c5 +13633 clk cpu0 IS (13597) 0003ae5c:00001003ae5c_NS 540155ab O EL1h_n : B.LT 0x3d910 +13634 clk cpu0 IT (13598) 0003ae60:00001003ae60_NS 7100283f O EL1h_n : CMP w1,#0xa +13634 clk cpu0 R cpsr 820003c5 +13635 clk cpu0 IS (13599) 0003ae64:00001003ae64_NS 5401556c O EL1h_n : B.GT 0x3d910 +13636 clk cpu0 IT (13600) 0003ae68:00001003ae68_NS 7100203f O EL1h_n : CMP w1,#8 +13636 clk cpu0 R cpsr 220003c5 +13637 clk cpu0 IS (13601) 0003ae6c:00001003ae6c_NS 540153e0 O EL1h_n : B.EQ 0x3d8e8 +13638 clk cpu0 IT (13602) 0003ae70:00001003ae70_NS 71001c3f O EL1h_n : CMP w1,#7 +13638 clk cpu0 R cpsr 220003c5 +13639 clk cpu0 IS (13603) 0003ae74:00001003ae74_NS 54000180 O EL1h_n : B.EQ 0x3aea4 +13640 clk cpu0 IT (13604) 0003ae78:00001003ae78_NS 7100183f O EL1h_n : CMP w1,#6 +13640 clk cpu0 R cpsr 220003c5 +13641 clk cpu0 IS (13605) 0003ae7c:00001003ae7c_NS 54014f00 O EL1h_n : B.EQ 0x3d85c +13641 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0175 INVAL 0x000010036e80_NS +13641 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0175 ALLOC 0x00001003ae80_NS +13642 clk cpu0 IT (13606) 0003ae80:00001003ae80_NS 7100243f O EL1h_n : CMP w1,#9 +13642 clk cpu0 R cpsr 620003c5 +13643 clk cpu0 IT (13607) 0003ae84:00001003ae84_NS 54014ac0 O EL1h_n : B.EQ 0x3d7dc +13644 clk cpu0 IT (13608) 0003d7dc:00001003d7dc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +13644 clk cpu0 MR8 03800710:000010800710_NS 00000000_00000002 +13644 clk cpu0 MR8 03800718:000010800718_NS 00000000_00000001 +13644 clk cpu0 R X0 0000000000000002 +13644 clk cpu0 R X1 0000000000000001 +13645 clk cpu0 IT (13609) 0003d7e0:00001003d7e0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +13645 clk cpu0 R SP_EL1 0000000003800810 +13646 clk cpu0 IT (13610) 0003d7e4:00001003d7e4_NS f100081f O EL1h_n : CMP x0,#2 +13646 clk cpu0 R cpsr 620003c5 +13647 clk cpu0 IS (13611) 0003d7e8:00001003d7e8_NS 540001ec O EL1h_n : B.GT 0x3d824 +13648 clk cpu0 IT (13612) 0003d7ec:00001003d7ec_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +13648 clk cpu0 MW8 03800800:000010800800_NS 00000000_00000001 +13648 clk cpu0 MW8 03800808:000010800808_NS 00000000_00000002 +13648 clk cpu0 R SP_EL1 0000000003800800 +13649 clk cpu0 IT (13613) 0003d7f0:00001003d7f0_NS d5384022 O EL1h_n : MRS x2,ELR_EL1 +13649 clk cpu0 R X2 00000000000A723C +13650 clk cpu0 IT (13614) 0003d7f4:00001003d7f4_NS d5384003 O EL1h_n : MRS x3,SPSR_el1 +13650 clk cpu0 R X3 00000000600003C0 +13651 clk cpu0 IT (13615) 0003d7f8:00001003d7f8_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +13651 clk cpu0 MW8 038007f0:0000108007f0_NS 00000000_000a723c +13651 clk cpu0 MW8 038007f8:0000108007f8_NS 00000000_600003c0 +13651 clk cpu0 R SP_EL1 00000000038007F0 +13652 clk cpu0 IT (13616) 0003d7fc:00001003d7fc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +13652 clk cpu0 MW8 038007e0:0000108007e0_NS ffffffff_fe00000f +13652 clk cpu0 MW8 038007e8:0000108007e8_NS 00000000_0009d850 +13652 clk cpu0 R SP_EL1 00000000038007E0 +13652 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 INVAL 0x000010035800_NS +13652 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 ALLOC 0x00001003d800_NS +13653 clk cpu0 IT (13617) 0003d800:00001003d800_NS a9bf3bed O EL1h_n : STP x13,x14,[sp,#-0x10]! +13653 clk cpu0 MW8 038007d0:0000108007d0_NS 00000000_00000032 +13653 clk cpu0 MW8 038007d8:0000108007d8_NS 00000000_00000000 +13653 clk cpu0 R SP_EL1 00000000038007D0 +13654 clk cpu0 IT (13618) 0003d804:00001003d804_NS 97ff4bd5 O EL1h_n : BL 0x10758 +13654 clk cpu0 R X30 000000000003D808 +13654 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003b INVAL 0x000010098740_NS +13654 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003b ALLOC 0x000010010740_NS +13655 clk cpu0 IT (13619) 00010758:000010010758_NS a9bf7bfc O EL1h_n : STP x28,x30,[sp,#-0x10]! +13655 clk cpu0 MW8 038007c0:0000108007c0_NS ff7fff7f_ff7fff7f +13655 clk cpu0 MW8 038007c8:0000108007c8_NS 00000000_0003d808 +13655 clk cpu0 R SP_EL1 00000000038007C0 +13656 clk cpu0 IT (13620) 0001075c:00001001075c_NS d14403ff O EL1h_n : SUB sp,sp,#0x100,LSL #12 +13656 clk cpu0 R SP_EL1 00000000037007C0 +13657 clk cpu0 IT (13621) 00010760:000010010760_NS d10683ff O EL1h_n : SUB sp,sp,#0x1a0 +13657 clk cpu0 R SP_EL1 0000000003700620 +13658 clk cpu0 IT (13622) 00010764:000010010764_NS 914403e8 O EL1h_n : ADD x8,sp,#0x100,LSL #12 +13658 clk cpu0 R X8 0000000003800620 +13659 clk cpu0 IT (13623) 00010768:000010010768_NS 91067108 O EL1h_n : ADD x8,x8,#0x19c +13659 clk cpu0 R X8 00000000038007BC +13660 clk cpu0 IT (13624) 0001076c:00001001076c_NS 9105c3e9 O EL1h_n : ADD x9,sp,#0x170 +13660 clk cpu0 R X9 0000000003700790 +13661 clk cpu0 IT (13625) 00010770:000010010770_NS b000000a O EL1h_n : ADRP x10,0x11770 +13661 clk cpu0 R X10 0000000000011000 +13662 clk cpu0 IT (13626) 00010774:000010010774_NS 9108d14a O EL1h_n : ADD x10,x10,#0x234 +13662 clk cpu0 R X10 0000000000011234 +13663 clk cpu0 IT (13627) 00010778:000010010778_NS 5280270b O EL1h_n : MOV w11,#0x138 +13663 clk cpu0 R X11 0000000000000138 +13664 clk cpu0 IT (13628) 0001077c:00001001077c_NS d280002c O EL1h_n : MOV x12,#1 +13664 clk cpu0 R X12 0000000000000001 +13665 clk cpu0 IT (13629) 00010780:000010010780_NS 5280000d O EL1h_n : MOV w13,#0 +13665 clk cpu0 R X13 0000000000000000 +13666 clk cpu0 IT (13630) 00010784:000010010784_NS 529e000e O EL1h_n : MOV w14,#0xf000 +13666 clk cpu0 R X14 000000000000F000 +13667 clk cpu0 IT (13631) 00010788:000010010788_NS 5280018f O EL1h_n : MOV w15,#0xc +13667 clk cpu0 R X15 000000000000000C +13668 clk cpu0 IT (13632) 0001078c:00001001078c_NS 5281e010 O EL1h_n : MOV w16,#0xf00 +13668 clk cpu0 R X16 0000000000000F00 +13669 clk cpu0 IT (13633) 00010790:000010010790_NS 52800111 O EL1h_n : MOV w17,#8 +13669 clk cpu0 R X17 0000000000000008 +13670 clk cpu0 IT (13634) 00010794:000010010794_NS 52800032 O EL1h_n : MOV w18,#1 +13670 clk cpu0 R X18 0000000000000001 +13671 clk cpu0 IT (13635) 00010798:000010010798_NS 90017fc1 O EL1h_n : ADRP x1,0x3008798 +13671 clk cpu0 R X1 0000000003008000 +13672 clk cpu0 IT (13636) 0001079c:00001001079c_NS 9114c021 O EL1h_n : ADD x1,x1,#0x530 +13672 clk cpu0 R X1 0000000003008530 +13673 clk cpu0 IT (13637) 000107a0:0000100107a0_NS d2800002 O EL1h_n : MOV x2,#0 +13673 clk cpu0 R X2 0000000000000000 +13674 clk cpu0 IT (13638) 000107a4:0000100107a4_NS b00180c3 O EL1h_n : ADRP x3,0x30297a4 +13674 clk cpu0 R X3 0000000003029000 +13675 clk cpu0 IT (13639) 000107a8:0000100107a8_NS 91144063 O EL1h_n : ADD x3,x3,#0x510 +13675 clk cpu0 R X3 0000000003029510 +13676 clk cpu0 IT (13640) 000107ac:0000100107ac_NS b00180c4 O EL1h_n : ADRP x4,0x30297ac +13676 clk cpu0 R X4 0000000003029000 +13677 clk cpu0 IT (13641) 000107b0:0000100107b0_NS 910fc084 O EL1h_n : ADD x4,x4,#0x3f0 +13677 clk cpu0 R X4 00000000030293F0 +13678 clk cpu0 IT (13642) 000107b4:0000100107b4_NS b9000100 O EL1h_n : STR w0,[x8,#0] +13678 clk cpu0 MW4 038007bc:0000108007bc_NS 00000002 +13678 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003d DIRTY 0x000010800780_NS +13678 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e2 CLEAN 0x000010800780_NS +13678 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01e2 INVAL 0x000010800780_NS +13679 clk cpu0 IT (13643) 000107b8:0000100107b8_NS f90063e8 O EL1h_n : STR x8,[sp,#0xc0] +13679 clk cpu0 MW8 037006e0:000000f006e0_NS 00000000_038007bc +13680 clk cpu0 IT (13644) 000107bc:0000100107bc_NS f9005fe9 O EL1h_n : STR x9,[sp,#0xb8] +13680 clk cpu0 MW8 037006d8:000000f006d8_NS 00000000_03700790 +13681 clk cpu0 IT (13645) 000107c0:0000100107c0_NS f9005bea O EL1h_n : STR x10,[sp,#0xb0] +13681 clk cpu0 MW8 037006d0:000000f006d0_NS 00000000_00011234 +13682 clk cpu0 IT (13646) 000107c4:0000100107c4_NS b900afeb O EL1h_n : STR w11,[sp,#0xac] +13682 clk cpu0 MW4 037006cc:000000f006cc_NS 00000138 +13683 clk cpu0 IT (13647) 000107c8:0000100107c8_NS f90053ec O EL1h_n : STR x12,[sp,#0xa0] +13683 clk cpu0 MW8 037006c0:000000f006c0_NS 00000000_00000001 +13684 clk cpu0 IT (13648) 000107cc:0000100107cc_NS b9009fed O EL1h_n : STR w13,[sp,#0x9c] +13684 clk cpu0 MW4 037006bc:000000f006bc_NS 00000000 +13685 clk cpu0 IT (13649) 000107d0:0000100107d0_NS b9009bee O EL1h_n : STR w14,[sp,#0x98] +13685 clk cpu0 MW4 037006b8:000000f006b8_NS 0000f000 +13686 clk cpu0 IT (13650) 000107d4:0000100107d4_NS b90097ef O EL1h_n : STR w15,[sp,#0x94] +13686 clk cpu0 MW4 037006b4:000000f006b4_NS 0000000c +13687 clk cpu0 IT (13651) 000107d8:0000100107d8_NS b90093f0 O EL1h_n : STR w16,[sp,#0x90] +13687 clk cpu0 MW4 037006b0:000000f006b0_NS 00000f00 +13688 clk cpu0 IT (13652) 000107dc:0000100107dc_NS b9008ff1 O EL1h_n : STR w17,[sp,#0x8c] +13688 clk cpu0 MW4 037006ac:000000f006ac_NS 00000008 +13689 clk cpu0 IT (13653) 000107e0:0000100107e0_NS b9008bf2 O EL1h_n : STR w18,[sp,#0x88] +13689 clk cpu0 MW4 037006a8:000000f006a8_NS 00000001 +13690 clk cpu0 IT (13654) 000107e4:0000100107e4_NS f90043e1 O EL1h_n : STR x1,[sp,#0x80] +13690 clk cpu0 MW8 037006a0:000000f006a0_NS 00000000_03008530 +13691 clk cpu0 IT (13655) 000107e8:0000100107e8_NS f9003fe2 O EL1h_n : STR x2,[sp,#0x78] +13691 clk cpu0 MW8 03700698:000000f00698_NS 00000000_00000000 +13692 clk cpu0 IT (13656) 000107ec:0000100107ec_NS f9003be3 O EL1h_n : STR x3,[sp,#0x70] +13692 clk cpu0 MW8 03700690:000000f00690_NS 00000000_03029510 +13693 clk cpu0 IT (13657) 000107f0:0000100107f0_NS f90037e4 O EL1h_n : STR x4,[sp,#0x68] +13693 clk cpu0 MW8 03700688:000000f00688_NS 00000000_030293f0 +13694 clk cpu0 IT (13658) 000107f4:0000100107f4_NS 94025a9b O EL1h_n : BL 0xa7260 +13694 clk cpu0 R X30 00000000000107F8 +13695 clk cpu0 IT (13659) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +13695 clk cpu0 R X0 0000000000000000 +13696 clk cpu0 IT (13660) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +13696 clk cpu0 R cpsr 620007c5 +13697 clk cpu0 IT (13661) 000107f8:0000100107f8_NS b9018be0 O EL1h_n : STR w0,[sp,#0x188] +13697 clk cpu0 MW4 037007a8:000000f007a8_NS 00000000 +13697 clk cpu0 R cpsr 620003c5 +13698 clk cpu0 IT (13662) 000107fc:0000100107fc_NS 94021f5c O EL1h_n : BL 0x9856c +13698 clk cpu0 R X30 0000000000010800 +13699 clk cpu0 IT (13663) 0009856c:00001009856c_NS d0030be8 O EL1h_n : ADRP x8,0x621656c +13699 clk cpu0 R X8 0000000006216000 +13700 clk cpu0 IT (13664) 00098570:000010098570_NS b9404d00 O EL1h_n : LDR w0,[x8,#0x4c] +13700 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13700 clk cpu0 R X0 0000000000000001 +13701 clk cpu0 IT (13665) 00098574:000010098574_NS d65f03c0 O EL1h_n : RET +13702 clk cpu0 IT (13666) 00010800:000010010800_NS b90187e0 O EL1h_n : STR w0,[sp,#0x184] +13702 clk cpu0 MW4 037007a4:000000f007a4_NS 00000001 +13703 clk cpu0 IT (13667) 00010804:000010010804_NS f9405be8 O EL1h_n : LDR x8,[sp,#0xb0] +13703 clk cpu0 MR8 037006d0:000000f006d0_NS 00000000_00011234 +13703 clk cpu0 R X8 0000000000011234 +13704 clk cpu0 IT (13668) 00010808:000010010808_NS d63f0100 O EL1h_n : BLR x8 +13704 clk cpu0 R cpsr 62000bc5 +13704 clk cpu0 R X30 000000000001080C +13705 clk cpu0 IT (13669) 00011234:000010011234_NS d2a2c480 O EL1h_n : MOV x0,#0x16240000 +13705 clk cpu0 R cpsr 620003c5 +13705 clk cpu0 R X0 0000000016240000 +13706 clk cpu0 IT (13670) 00011238:000010011238_NS d65f03c0 O EL1h_n : RET +13707 clk cpu0 IT (13671) 0001080c:00001001080c_NS f9006fe0 O EL1h_n : STR x0,[sp,#0xd8] +13707 clk cpu0 MW8 037006f8:000000f006f8_NS 00000000_16240000 +13708 clk cpu0 IT (13672) 00010810:000010010810_NS b9418beb O EL1h_n : LDR w11,[sp,#0x188] +13708 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +13708 clk cpu0 R X11 0000000000000000 +13709 clk cpu0 IT (13673) 00010814:000010010814_NS 2a0b03e0 O EL1h_n : MOV w0,w11 +13709 clk cpu0 R X0 0000000000000000 +13710 clk cpu0 IT (13674) 00010818:000010010818_NS 94000270 O EL1h_n : BL 0x111d8 +13710 clk cpu0 R X30 000000000001081C +13711 clk cpu0 IT (13675) 000111d8:0000100111d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +13711 clk cpu0 R SP_EL1 0000000003700600 +13712 clk cpu0 IT (13676) 000111dc:0000100111dc_NS f9000bfe O EL1h_n : STR x30,[sp,#0x10] +13712 clk cpu0 MW8 03700610:000000f00610_NS 00000000_0001081c +13713 clk cpu0 IT (13677) 000111e0:0000100111e0_NS 39003fe0 O EL1h_n : STRB w0,[sp,#0xf] +13713 clk cpu0 MW1 0370060f:000000f0060f_NS 00 +13714 clk cpu0 IT (13678) 000111e4:0000100111e4_NS 94000291 O EL1h_n : BL 0x11c28 +13714 clk cpu0 R X30 00000000000111E8 +13715 clk cpu0 IT (13679) 00011c28:000010011c28_NS d2a46008 O EL1h_n : MOV x8,#0x23000000 +13715 clk cpu0 R X8 0000000023000000 +13716 clk cpu0 IT (13680) 00011c2c:000010011c2c_NS 90018309 O EL1h_n : ADRP x9,0x3071c2c +13716 clk cpu0 R X9 0000000003071000 +13717 clk cpu0 IT (13681) 00011c30:000010011c30_NS 9124a129 O EL1h_n : ADD x9,x9,#0x928 +13717 clk cpu0 R X9 0000000003071928 +13718 clk cpu0 IT (13682) 00011c34:000010011c34_NS f9000128 O EL1h_n : STR x8,[x9,#0] +13718 clk cpu0 MW8 03071928:000000871928_NS 00000000_23000000 +13719 clk cpu0 IT (13683) 00011c38:000010011c38_NS f9400120 O EL1h_n : LDR x0,[x9,#0] +13719 clk cpu0 MR8 03071928:000000871928_NS 00000000_23000000 +13719 clk cpu0 R X0 0000000023000000 +13720 clk cpu0 IT (13684) 00011c3c:000010011c3c_NS d65f03c0 O EL1h_n : RET +13721 clk cpu0 IT (13685) 000111e8:0000100111e8_NS 91400800 O EL1h_n : ADD x0,x0,#2,LSL #12 +13721 clk cpu0 R X0 0000000023002000 +13722 clk cpu0 IT (13686) 000111ec:0000100111ec_NS f9400bfe O EL1h_n : LDR x30,[sp,#0x10] +13722 clk cpu0 MR8 03700610:000000f00610_NS 00000000_0001081c +13722 clk cpu0 R X30 000000000001081C +13723 clk cpu0 IT (13687) 000111f0:0000100111f0_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +13723 clk cpu0 R SP_EL1 0000000003700620 +13724 clk cpu0 IT (13688) 000111f4:0000100111f4_NS d65f03c0 O EL1h_n : RET +13725 clk cpu0 IT (13689) 0001081c:00001001081c_NS f9006be0 O EL1h_n : STR x0,[sp,#0xd0] +13725 clk cpu0 MW8 037006f0:000000f006f0_NS 00000000_23002000 +13726 clk cpu0 IT (13690) 00010820:000010010820_NS b940afe0 O EL1h_n : LDR w0,[sp,#0xac] +13726 clk cpu0 MR4 037006cc:000000f006cc_NS 00000138 +13726 clk cpu0 R X0 0000000000000138 +13727 clk cpu0 IT (13691) 00010824:000010010824_NS 94021f7d O EL1h_n : BL 0x98618 +13727 clk cpu0 R X30 0000000000010828 +13728 clk cpu0 IT (13692) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +13728 clk cpu0 MW8 03700600:000000f00600_NS ff83ff83_ff83ff83 +13728 clk cpu0 R SP_EL1 0000000003700600 +13729 clk cpu0 IT (13693) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +13729 clk cpu0 MW8 03700610:000000f00610_NS 00000000_062160a2 +13729 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010828 +13730 clk cpu0 IT (13694) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +13730 clk cpu0 R X19 0000000000000138 +13731 clk cpu0 IT (13695) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +13731 clk cpu0 R X30 0000000000098628 +13732 clk cpu0 IT (13696) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +13732 clk cpu0 R X0 0000000000000000 +13733 clk cpu0 IT (13697) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +13733 clk cpu0 R cpsr 620007c5 +13734 clk cpu0 IT (13698) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +13734 clk cpu0 R cpsr 820003c5 +13735 clk cpu0 IT (13699) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +13735 clk cpu0 R X20 0000000000000000 +13736 clk cpu0 IS (13700) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +13737 clk cpu0 IT (13701) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +13737 clk cpu0 R X8 0000000000000000 +13738 clk cpu0 IT (13702) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +13739 clk cpu0 IT (13703) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +13739 clk cpu0 R X8 0000000003000000 +13740 clk cpu0 IT (13704) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +13740 clk cpu0 R X8 0000000003000268 +13741 clk cpu0 IT (13705) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +13741 clk cpu0 R X9 0000000000000C50 +13742 clk cpu0 IT (13706) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +13742 clk cpu0 R X8 0000000003000268 +13743 clk cpu0 IT (13707) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +13743 clk cpu0 MR8 030003a0:0000008003a0_NS 00000000_00000038 +13743 clk cpu0 R X19 0000000000000038 +13744 clk cpu0 IT (13708) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +13744 clk cpu0 R X8 000000000000BAAD +13745 clk cpu0 IT (13709) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +13745 clk cpu0 R X8 00000000900DBAAD +13746 clk cpu0 IT (13710) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +13746 clk cpu0 R cpsr 820003c5 +13747 clk cpu0 IT (13711) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +13748 clk cpu0 IT (13712) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +13748 clk cpu0 R X0 0000000000000038 +13749 clk cpu0 IT (13713) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +13749 clk cpu0 MR8 03700610:000000f00610_NS 00000000_062160a2 +13749 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010828 +13749 clk cpu0 R X19 00000000062160A2 +13749 clk cpu0 R X30 0000000000010828 +13750 clk cpu0 IT (13714) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +13750 clk cpu0 MR8 03700600:000000f00600_NS ff83ff83_ff83ff83 +13750 clk cpu0 R SP_EL1 0000000003700620 +13750 clk cpu0 R X20 FF83FF83FF83FF83 +13751 clk cpu0 IT (13715) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +13752 clk cpu0 IT (13716) 00010828:000010010828_NS d352fc08 O EL1h_n : LSR x8,x0,#18 +13752 clk cpu0 R X8 0000000000000000 +13753 clk cpu0 IT (13717) 0001082c:00001001082c_NS f94053e9 O EL1h_n : LDR x9,[sp,#0xa0] +13753 clk cpu0 MR8 037006c0:000000f006c0_NS 00000000_00000001 +13753 clk cpu0 R X9 0000000000000001 +13754 clk cpu0 IT (13718) 00010830:000010010830_NS 8a090108 O EL1h_n : AND x8,x8,x9 +13754 clk cpu0 R X8 0000000000000000 +13755 clk cpu0 IT (13719) 00010834:000010010834_NS b900cfe8 O EL1h_n : STR w8,[sp,#0xcc] +13755 clk cpu0 MW4 037006ec:000000f006ec_NS 00000000 +13756 clk cpu0 IT (13720) 00010838:000010010838_NS b9409fe0 O EL1h_n : LDR w0,[sp,#0x9c] +13756 clk cpu0 MR4 037006bc:000000f006bc_NS 00000000 +13756 clk cpu0 R X0 0000000000000000 +13757 clk cpu0 IT (13721) 0001083c:00001001083c_NS b9409be1 O EL1h_n : LDR w1,[sp,#0x98] +13757 clk cpu0 MR4 037006b8:000000f006b8_NS 0000f000 +13757 clk cpu0 R X1 000000000000F000 +13758 clk cpu0 IT (13722) 00010840:000010010840_NS 94021fcb O EL1h_n : BL 0x9876c +13758 clk cpu0 R X30 0000000000010844 +13758 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003a INVAL 0x000010094740 +13758 clk cpu0 CACHE cpu.cpu0.l1icache LINE 003a ALLOC 0x000010098740_NS +13759 clk cpu0 IT (13723) 0009876c:00001009876c_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +13759 clk cpu0 MW8 03700610:000000f00610_NS 00000000_062160a2 +13759 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00010844 +13759 clk cpu0 R SP_EL1 0000000003700610 +13760 clk cpu0 IT (13724) 00098770:000010098770_NS 71403c3f O EL1h_n : CMP w1,#0xf,LSL #12 +13760 clk cpu0 R cpsr 620003c5 +13761 clk cpu0 IT (13725) 00098774:000010098774_NS 54000100 O EL1h_n : B.EQ 0x98794 +13762 clk cpu0 IT (13726) 00098794:000010098794_NS d0030be8 O EL1h_n : ADRP x8,0x6216794 +13762 clk cpu0 R X8 0000000006216000 +13763 clk cpu0 IT (13727) 00098798:000010098798_NS b9410913 O EL1h_n : LDR w19,[x8,#0x108] +13763 clk cpu0 MR4 06216108:000015216108_NS 00030001 +13763 clk cpu0 R X19 0000000000030001 +13764 clk cpu0 IT (13728) 0009879c:00001009879c_NS 14000005 O EL1h_n : B 0x987b0 +13765 clk cpu0 IT (13729) 000987b0:0000100987b0_NS 2a1303e0 O EL1h_n : MOV w0,w19 +13765 clk cpu0 R X0 0000000000030001 +13766 clk cpu0 IT (13730) 000987b4:0000100987b4_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +13766 clk cpu0 MR8 03700610:000000f00610_NS 00000000_062160a2 +13766 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00010844 +13766 clk cpu0 R SP_EL1 0000000003700620 +13766 clk cpu0 R X19 00000000062160A2 +13766 clk cpu0 R X30 0000000000010844 +13767 clk cpu0 IT (13731) 000987b8:0000100987b8_NS d65f03c0 O EL1h_n : RET +13768 clk cpu0 IT (13732) 00010844:000010010844_NS b9016fe0 O EL1h_n : STR w0,[sp,#0x16c] +13768 clk cpu0 MW4 0370078c:000000f0078c_NS 00030001 +13769 clk cpu0 IT (13733) 00010848:000010010848_NS b9416fe8 O EL1h_n : LDR w8,[sp,#0x16c] +13769 clk cpu0 MR4 0370078c:000000f0078c_NS 00030001 +13769 clk cpu0 R X8 0000000000030001 +13770 clk cpu0 IT (13734) 0001084c:00001001084c_NS b9409beb O EL1h_n : LDR w11,[sp,#0x98] +13770 clk cpu0 MR4 037006b8:000000f006b8_NS 0000f000 +13770 clk cpu0 R X11 000000000000F000 +13771 clk cpu0 IT (13735) 00010850:000010010850_NS 0a0b0108 O EL1h_n : AND w8,w8,w11 +13771 clk cpu0 R X8 0000000000000000 +13772 clk cpu0 IT (13736) 00010854:000010010854_NS b94097ed O EL1h_n : LDR w13,[sp,#0x94] +13772 clk cpu0 MR4 037006b4:000000f006b4_NS 0000000c +13772 clk cpu0 R X13 000000000000000C +13773 clk cpu0 IT (13737) 00010858:000010010858_NS 1acd2508 O EL1h_n : LSR w8,w8,w13 +13773 clk cpu0 R X8 0000000000000000 +13774 clk cpu0 IT (13738) 0001085c:00001001085c_NS 2a0803e9 O EL1h_n : MOV w9,w8 +13774 clk cpu0 R X9 0000000000000000 +13775 clk cpu0 IT (13739) 00010860:000010010860_NS d3407d29 O EL1h_n : UBFX x9,x9,#0,#32 +13775 clk cpu0 R X9 0000000000000000 +13776 clk cpu0 IT (13740) 00010864:000010010864_NS f9405fea O EL1h_n : LDR x10,[sp,#0xb8] +13776 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +13776 clk cpu0 R X10 0000000003700790 +13777 clk cpu0 IT (13741) 00010868:000010010868_NS f9000549 O EL1h_n : STR x9,[x10,#8] +13777 clk cpu0 MW8 03700798:000000f00798_NS 00000000_00000000 +13778 clk cpu0 IT (13742) 0001086c:00001001086c_NS b9416fe8 O EL1h_n : LDR w8,[sp,#0x16c] +13778 clk cpu0 MR4 0370078c:000000f0078c_NS 00030001 +13778 clk cpu0 R X8 0000000000030001 +13779 clk cpu0 IT (13743) 00010870:000010010870_NS b94093ee O EL1h_n : LDR w14,[sp,#0x90] +13779 clk cpu0 MR4 037006b0:000000f006b0_NS 00000f00 +13779 clk cpu0 R X14 0000000000000F00 +13780 clk cpu0 IT (13744) 00010874:000010010874_NS 0a0e0108 O EL1h_n : AND w8,w8,w14 +13780 clk cpu0 R X8 0000000000000000 +13781 clk cpu0 IT (13745) 00010878:000010010878_NS b9408fef O EL1h_n : LDR w15,[sp,#0x8c] +13781 clk cpu0 MR4 037006ac:000000f006ac_NS 00000008 +13781 clk cpu0 R X15 0000000000000008 +13782 clk cpu0 IT (13746) 0001087c:00001001087c_NS 1acf2508 O EL1h_n : LSR w8,w8,w15 +13782 clk cpu0 R X8 0000000000000000 +13783 clk cpu0 IT (13747) 00010880:000010010880_NS b9408bf0 O EL1h_n : LDR w16,[sp,#0x88] +13783 clk cpu0 MR4 037006a8:000000f006a8_NS 00000001 +13783 clk cpu0 R X16 0000000000000001 +13784 clk cpu0 IT (13748) 00010884:000010010884_NS 0a280208 O EL1h_n : BIC w8,w16,w8 +13784 clk cpu0 R X8 0000000000000001 +13785 clk cpu0 IT (13749) 00010888:000010010888_NS 2a0803e9 O EL1h_n : MOV w9,w8 +13785 clk cpu0 R X9 0000000000000001 +13786 clk cpu0 IT (13750) 0001088c:00001001088c_NS d3407d29 O EL1h_n : UBFX x9,x9,#0,#32 +13786 clk cpu0 R X9 0000000000000001 +13787 clk cpu0 IT (13751) 00010890:000010010890_NS f9000149 O EL1h_n : STR x9,[x10,#0] +13787 clk cpu0 MW8 03700790:000000f00790_NS 00000000_00000001 +13788 clk cpu0 IT (13752) 00010894:000010010894_NS 940002c0 O EL1h_n : BL 0x11394 +13788 clk cpu0 R X30 0000000000010898 +13789 clk cpu0 IT (13753) 00011394:000010011394_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +13789 clk cpu0 R SP_EL1 0000000003700590 +13790 clk cpu0 IT (13754) 00011398:000010011398_NS f90043fe O EL1h_n : STR x30,[sp,#0x80] +13790 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00010898 +13791 clk cpu0 IT (13755) 0001139c:00001001139c_NS d2800068 O EL1h_n : MOV x8,#3 +13791 clk cpu0 R X8 0000000000000003 +13792 clk cpu0 IT (13756) 000113a0:0000100113a0_NS 52811009 O EL1h_n : MOV w9,#0x880 +13792 clk cpu0 R X9 0000000000000880 +13793 clk cpu0 IT (13757) 000113a4:0000100113a4_NS d28001ea O EL1h_n : MOV x10,#0xf +13793 clk cpu0 R X10 000000000000000F +13794 clk cpu0 IT (13758) 000113a8:0000100113a8_NS 52802700 O EL1h_n : MOV w0,#0x138 +13794 clk cpu0 R X0 0000000000000138 +13795 clk cpu0 IT (13759) 000113ac:0000100113ac_NS d280002b O EL1h_n : MOV x11,#1 +13795 clk cpu0 R X11 0000000000000001 +13796 clk cpu0 IT (13760) 000113b0:0000100113b0_NS 5280000c O EL1h_n : MOV w12,#0 +13796 clk cpu0 R X12 0000000000000000 +13797 clk cpu0 IT (13761) 000113b4:0000100113b4_NS 529e000d O EL1h_n : MOV w13,#0xf000 +13797 clk cpu0 R X13 000000000000F000 +13798 clk cpu0 IT (13762) 000113b8:0000100113b8_NS 5280018e O EL1h_n : MOV w14,#0xc +13798 clk cpu0 R X14 000000000000000C +13799 clk cpu0 IT (13763) 000113bc:0000100113bc_NS 5280002f O EL1h_n : MOV w15,#1 +13799 clk cpu0 R X15 0000000000000001 +13800 clk cpu0 IT (13764) 000113c0:0000100113c0_NS f00001c1 O EL1h_n : ADRP x1,0x4c3c0 +13800 clk cpu0 R X1 000000000004C000 +13801 clk cpu0 IT (13765) 000113c4:0000100113c4_NS 91332421 O EL1h_n : ADD x1,x1,#0xcc9 +13801 clk cpu0 R X1 000000000004CCC9 +13802 clk cpu0 IT (13766) 000113c8:0000100113c8_NS 5281e010 O EL1h_n : MOV w16,#0xf00 +13802 clk cpu0 R X16 0000000000000F00 +13803 clk cpu0 IT (13767) 000113cc:0000100113cc_NS 52800111 O EL1h_n : MOV w17,#8 +13803 clk cpu0 R X17 0000000000000008 +13804 clk cpu0 IT (13768) 000113d0:0000100113d0_NS f9002be8 O EL1h_n : STR x8,[sp,#0x50] +13804 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000003 +13805 clk cpu0 IT (13769) 000113d4:0000100113d4_NS f90027e8 O EL1h_n : STR x8,[sp,#0x48] +13805 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00000003 +13806 clk cpu0 IT (13770) 000113d8:0000100113d8_NS b90043e0 O EL1h_n : STR w0,[sp,#0x40] +13806 clk cpu0 MW4 037005d0:000000f005d0_NS 00000138 +13807 clk cpu0 IT (13771) 000113dc:0000100113dc_NS 2a0903e0 O EL1h_n : MOV w0,w9 +13807 clk cpu0 R X0 0000000000000880 +13808 clk cpu0 IT (13772) 000113e0:0000100113e0_NS b9003fe9 O EL1h_n : STR w9,[sp,#0x3c] +13808 clk cpu0 MW4 037005cc:000000f005cc_NS 00000880 +13809 clk cpu0 IT (13773) 000113e4:0000100113e4_NS f9001bea O EL1h_n : STR x10,[sp,#0x30] +13809 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_0000000f +13810 clk cpu0 IT (13774) 000113e8:0000100113e8_NS f90017eb O EL1h_n : STR x11,[sp,#0x28] +13810 clk cpu0 MW8 037005b8:000000f005b8_NS 00000000_00000001 +13811 clk cpu0 IT (13775) 000113ec:0000100113ec_NS b90027ec O EL1h_n : STR w12,[sp,#0x24] +13811 clk cpu0 MW4 037005b4:000000f005b4_NS 00000000 +13812 clk cpu0 IT (13776) 000113f0:0000100113f0_NS b90023ed O EL1h_n : STR w13,[sp,#0x20] +13812 clk cpu0 MW4 037005b0:000000f005b0_NS 0000f000 +13813 clk cpu0 IT (13777) 000113f4:0000100113f4_NS b9001fee O EL1h_n : STR w14,[sp,#0x1c] +13813 clk cpu0 MW4 037005ac:000000f005ac_NS 0000000c +13814 clk cpu0 IT (13778) 000113f8:0000100113f8_NS b9001bef O EL1h_n : STR w15,[sp,#0x18] +13814 clk cpu0 MW4 037005a8:000000f005a8_NS 00000001 +13815 clk cpu0 IT (13779) 000113fc:0000100113fc_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +13815 clk cpu0 MW8 037005a0:000000f005a0_NS 00000000_0004ccc9 +13816 clk cpu0 IT (13780) 00011400:000010011400_NS b9000ff0 O EL1h_n : STR w16,[sp,#0xc] +13816 clk cpu0 MW4 0370059c:000000f0059c_NS 00000f00 +13817 clk cpu0 IT (13781) 00011404:000010011404_NS b9000bf1 O EL1h_n : STR w17,[sp,#8] +13817 clk cpu0 MW4 03700598:000000f00598_NS 00000008 +13818 clk cpu0 IT (13782) 00011408:000010011408_NS 94021c84 O EL1h_n : BL 0x98618 +13818 clk cpu0 R X30 000000000001140C +13819 clk cpu0 IT (13783) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +13819 clk cpu0 MW8 03700570:000000f00570_NS ff83ff83_ff83ff83 +13819 clk cpu0 R SP_EL1 0000000003700570 +13820 clk cpu0 IT (13784) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +13820 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +13820 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0001140c +13821 clk cpu0 IT (13785) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +13821 clk cpu0 R X19 0000000000000880 +13822 clk cpu0 IT (13786) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +13822 clk cpu0 R X30 0000000000098628 +13823 clk cpu0 IT (13787) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +13823 clk cpu0 R X0 0000000000000000 +13824 clk cpu0 IT (13788) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +13824 clk cpu0 R cpsr 620007c5 +13825 clk cpu0 IT (13789) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +13825 clk cpu0 R cpsr 820003c5 +13826 clk cpu0 IT (13790) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +13826 clk cpu0 R X20 0000000000000000 +13827 clk cpu0 IS (13791) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +13828 clk cpu0 IT (13792) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +13828 clk cpu0 R X8 0000000000000000 +13829 clk cpu0 IT (13793) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +13830 clk cpu0 IT (13794) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +13830 clk cpu0 R X8 0000000003000000 +13831 clk cpu0 IT (13795) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +13831 clk cpu0 R X8 0000000003000268 +13832 clk cpu0 IT (13796) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +13832 clk cpu0 R X9 0000000000000C50 +13833 clk cpu0 IT (13797) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +13833 clk cpu0 R X8 0000000003000268 +13834 clk cpu0 IT (13798) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +13834 clk cpu0 MR8 03000ae8:000000800ae8_NS 12012111_23111112 +13834 clk cpu0 R X19 1201211123111112 +13835 clk cpu0 IT (13799) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +13835 clk cpu0 R X8 000000000000BAAD +13836 clk cpu0 IT (13800) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +13836 clk cpu0 R X8 00000000900DBAAD +13837 clk cpu0 IT (13801) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +13837 clk cpu0 R cpsr 220003c5 +13838 clk cpu0 IT (13802) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +13839 clk cpu0 IT (13803) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +13839 clk cpu0 R X0 1201211123111112 +13840 clk cpu0 IT (13804) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +13840 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +13840 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0001140c +13840 clk cpu0 R X19 00000000062160A2 +13840 clk cpu0 R X30 000000000001140C +13841 clk cpu0 IT (13805) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +13841 clk cpu0 MR8 03700570:000000f00570_NS ff83ff83_ff83ff83 +13841 clk cpu0 R SP_EL1 0000000003700590 +13841 clk cpu0 R X20 FF83FF83FF83FF83 +13842 clk cpu0 IT (13806) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +13843 clk cpu0 IT (13807) 0001140c:00001001140c_NS d34cfc08 O EL1h_n : LSR x8,x0,#12 +13843 clk cpu0 R X8 0001201211123111 +13844 clk cpu0 IT (13808) 00011410:000010011410_NS f9401bea O EL1h_n : LDR x10,[sp,#0x30] +13844 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_0000000f +13844 clk cpu0 R X10 000000000000000F +13845 clk cpu0 IT (13809) 00011414:000010011414_NS 8a0a0108 O EL1h_n : AND x8,x8,x10 +13845 clk cpu0 R X8 0000000000000001 +13846 clk cpu0 IT (13810) 00011418:000010011418_NS b9007fe8 O EL1h_n : STR w8,[sp,#0x7c] +13846 clk cpu0 MW4 0370060c:000000f0060c_NS 00000001 +13847 clk cpu0 IT (13811) 0001141c:00001001141c_NS b9403fe0 O EL1h_n : LDR w0,[sp,#0x3c] +13847 clk cpu0 MR4 037005cc:000000f005cc_NS 00000880 +13847 clk cpu0 R X0 0000000000000880 +13848 clk cpu0 IT (13812) 00011420:000010011420_NS 94021c7e O EL1h_n : BL 0x98618 +13848 clk cpu0 R X30 0000000000011424 +13849 clk cpu0 IT (13813) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +13849 clk cpu0 MW8 03700570:000000f00570_NS ff83ff83_ff83ff83 +13849 clk cpu0 R SP_EL1 0000000003700570 +13850 clk cpu0 IT (13814) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +13850 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +13850 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011424 +13851 clk cpu0 IT (13815) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +13851 clk cpu0 R X19 0000000000000880 +13852 clk cpu0 IT (13816) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +13852 clk cpu0 R X30 0000000000098628 +13853 clk cpu0 IT (13817) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +13853 clk cpu0 R X0 0000000000000000 +13854 clk cpu0 IT (13818) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +13854 clk cpu0 R cpsr 220007c5 +13855 clk cpu0 IT (13819) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +13855 clk cpu0 R cpsr 820003c5 +13856 clk cpu0 IT (13820) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +13856 clk cpu0 R X20 0000000000000000 +13857 clk cpu0 IS (13821) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +13858 clk cpu0 IT (13822) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +13858 clk cpu0 R X8 0000000000000000 +13859 clk cpu0 IT (13823) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +13860 clk cpu0 IT (13824) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +13860 clk cpu0 R X8 0000000003000000 +13861 clk cpu0 IT (13825) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +13861 clk cpu0 R X8 0000000003000268 +13862 clk cpu0 IT (13826) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +13862 clk cpu0 R X9 0000000000000C50 +13863 clk cpu0 IT (13827) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +13863 clk cpu0 R X8 0000000003000268 +13864 clk cpu0 IT (13828) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +13864 clk cpu0 MR8 03000ae8:000000800ae8_NS 12012111_23111112 +13864 clk cpu0 R X19 1201211123111112 +13865 clk cpu0 IT (13829) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +13865 clk cpu0 R X8 000000000000BAAD +13866 clk cpu0 IT (13830) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +13866 clk cpu0 R X8 00000000900DBAAD +13867 clk cpu0 IT (13831) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +13867 clk cpu0 R cpsr 220003c5 +13868 clk cpu0 IT (13832) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +13869 clk cpu0 IT (13833) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +13869 clk cpu0 R X0 1201211123111112 +13870 clk cpu0 IT (13834) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +13870 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +13870 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011424 +13870 clk cpu0 R X19 00000000062160A2 +13870 clk cpu0 R X30 0000000000011424 +13871 clk cpu0 IT (13835) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +13871 clk cpu0 MR8 03700570:000000f00570_NS ff83ff83_ff83ff83 +13871 clk cpu0 R SP_EL1 0000000003700590 +13871 clk cpu0 R X20 FF83FF83FF83FF83 +13872 clk cpu0 IT (13836) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +13873 clk cpu0 IT (13837) 00011424:000010011424_NS d348fc0a O EL1h_n : LSR x10,x0,#8 +13873 clk cpu0 R X10 0012012111231111 +13874 clk cpu0 IT (13838) 00011428:000010011428_NS f9401beb O EL1h_n : LDR x11,[sp,#0x30] +13874 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_0000000f +13874 clk cpu0 R X11 000000000000000F +13875 clk cpu0 IT (13839) 0001142c:00001001142c_NS 8a0b014a O EL1h_n : AND x10,x10,x11 +13875 clk cpu0 R X10 0000000000000001 +13876 clk cpu0 IT (13840) 00011430:000010011430_NS b9007bea O EL1h_n : STR w10,[sp,#0x78] +13876 clk cpu0 MW4 03700608:000000f00608_NS 00000001 +13877 clk cpu0 IT (13841) 00011434:000010011434_NS b94043e0 O EL1h_n : LDR w0,[sp,#0x40] +13877 clk cpu0 MR4 037005d0:000000f005d0_NS 00000138 +13877 clk cpu0 R X0 0000000000000138 +13878 clk cpu0 IT (13842) 00011438:000010011438_NS 94021c78 O EL1h_n : BL 0x98618 +13878 clk cpu0 R X30 000000000001143C +13879 clk cpu0 IT (13843) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +13879 clk cpu0 MW8 03700570:000000f00570_NS ff83ff83_ff83ff83 +13879 clk cpu0 R SP_EL1 0000000003700570 +13880 clk cpu0 IT (13844) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +13880 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +13880 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0001143c +13881 clk cpu0 IT (13845) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +13881 clk cpu0 R X19 0000000000000138 +13882 clk cpu0 IT (13846) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +13882 clk cpu0 R X30 0000000000098628 +13883 clk cpu0 IT (13847) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +13883 clk cpu0 R X0 0000000000000000 +13884 clk cpu0 IT (13848) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +13884 clk cpu0 R cpsr 220007c5 +13885 clk cpu0 IT (13849) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +13885 clk cpu0 R cpsr 820003c5 +13886 clk cpu0 IT (13850) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +13886 clk cpu0 R X20 0000000000000000 +13887 clk cpu0 IS (13851) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +13888 clk cpu0 IT (13852) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +13888 clk cpu0 R X8 0000000000000000 +13889 clk cpu0 IT (13853) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +13890 clk cpu0 IT (13854) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +13890 clk cpu0 R X8 0000000003000000 +13891 clk cpu0 IT (13855) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +13891 clk cpu0 R X8 0000000003000268 +13892 clk cpu0 IT (13856) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +13892 clk cpu0 R X9 0000000000000C50 +13893 clk cpu0 IT (13857) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +13893 clk cpu0 R X8 0000000003000268 +13894 clk cpu0 IT (13858) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +13894 clk cpu0 MR8 030003a0:0000008003a0_NS 00000000_00000038 +13894 clk cpu0 R X19 0000000000000038 +13895 clk cpu0 IT (13859) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +13895 clk cpu0 R X8 000000000000BAAD +13896 clk cpu0 IT (13860) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +13896 clk cpu0 R X8 00000000900DBAAD +13897 clk cpu0 IT (13861) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +13897 clk cpu0 R cpsr 820003c5 +13898 clk cpu0 IT (13862) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +13899 clk cpu0 IT (13863) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +13899 clk cpu0 R X0 0000000000000038 +13900 clk cpu0 IT (13864) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +13900 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +13900 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0001143c +13900 clk cpu0 R X19 00000000062160A2 +13900 clk cpu0 R X30 000000000001143C +13901 clk cpu0 IT (13865) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +13901 clk cpu0 MR8 03700570:000000f00570_NS ff83ff83_ff83ff83 +13901 clk cpu0 R SP_EL1 0000000003700590 +13901 clk cpu0 R X20 FF83FF83FF83FF83 +13902 clk cpu0 IT (13866) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +13903 clk cpu0 IT (13867) 0001143c:00001001143c_NS d352fc0b O EL1h_n : LSR x11,x0,#18 +13903 clk cpu0 R X11 0000000000000000 +13904 clk cpu0 IT (13868) 00011440:000010011440_NS f94017f2 O EL1h_n : LDR x18,[sp,#0x28] +13904 clk cpu0 MR8 037005b8:000000f005b8_NS 00000000_00000001 +13904 clk cpu0 R X18 0000000000000001 +13905 clk cpu0 IT (13869) 00011444:000010011444_NS 8a12016b O EL1h_n : AND x11,x11,x18 +13905 clk cpu0 R X11 0000000000000000 +13906 clk cpu0 IT (13870) 00011448:000010011448_NS b90077eb O EL1h_n : STR w11,[sp,#0x74] +13906 clk cpu0 MW4 03700604:000000f00604_NS 00000000 +13907 clk cpu0 IT (13871) 0001144c:00001001144c_NS b94027e0 O EL1h_n : LDR w0,[sp,#0x24] +13907 clk cpu0 MR4 037005b4:000000f005b4_NS 00000000 +13907 clk cpu0 R X0 0000000000000000 +13908 clk cpu0 IT (13872) 00011450:000010011450_NS b94023e1 O EL1h_n : LDR w1,[sp,#0x20] +13908 clk cpu0 MR4 037005b0:000000f005b0_NS 0000f000 +13908 clk cpu0 R X1 000000000000F000 +13909 clk cpu0 IT (13873) 00011454:000010011454_NS 94021cc6 O EL1h_n : BL 0x9876c +13909 clk cpu0 R X30 0000000000011458 +13910 clk cpu0 IT (13874) 0009876c:00001009876c_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +13910 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +13910 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011458 +13910 clk cpu0 R SP_EL1 0000000003700580 +13911 clk cpu0 IT (13875) 00098770:000010098770_NS 71403c3f O EL1h_n : CMP w1,#0xf,LSL #12 +13911 clk cpu0 R cpsr 620003c5 +13912 clk cpu0 IT (13876) 00098774:000010098774_NS 54000100 O EL1h_n : B.EQ 0x98794 +13913 clk cpu0 IT (13877) 00098794:000010098794_NS d0030be8 O EL1h_n : ADRP x8,0x6216794 +13913 clk cpu0 R X8 0000000006216000 +13914 clk cpu0 IT (13878) 00098798:000010098798_NS b9410913 O EL1h_n : LDR w19,[x8,#0x108] +13914 clk cpu0 MR4 06216108:000015216108_NS 00030001 +13914 clk cpu0 R X19 0000000000030001 +13915 clk cpu0 IT (13879) 0009879c:00001009879c_NS 14000005 O EL1h_n : B 0x987b0 +13916 clk cpu0 IT (13880) 000987b0:0000100987b0_NS 2a1303e0 O EL1h_n : MOV w0,w19 +13916 clk cpu0 R X0 0000000000030001 +13917 clk cpu0 IT (13881) 000987b4:0000100987b4_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +13917 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +13917 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011458 +13917 clk cpu0 R SP_EL1 0000000003700590 +13917 clk cpu0 R X19 00000000062160A2 +13917 clk cpu0 R X30 0000000000011458 +13918 clk cpu0 IT (13882) 000987b8:0000100987b8_NS d65f03c0 O EL1h_n : RET +13919 clk cpu0 IT (13883) 00011458:000010011458_NS b90047e0 O EL1h_n : STR w0,[sp,#0x44] +13919 clk cpu0 MW4 037005d4:000000f005d4_NS 00030001 +13920 clk cpu0 IT (13884) 0001145c:00001001145c_NS b94047e8 O EL1h_n : LDR w8,[sp,#0x44] +13920 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +13920 clk cpu0 R X8 0000000000030001 +13921 clk cpu0 IT (13885) 00011460:000010011460_NS b94023e9 O EL1h_n : LDR w9,[sp,#0x20] +13921 clk cpu0 MR4 037005b0:000000f005b0_NS 0000f000 +13921 clk cpu0 R X9 000000000000F000 +13922 clk cpu0 IT (13886) 00011464:000010011464_NS 0a090108 O EL1h_n : AND w8,w8,w9 +13922 clk cpu0 R X8 0000000000000000 +13923 clk cpu0 IT (13887) 00011468:000010011468_NS b9401fea O EL1h_n : LDR w10,[sp,#0x1c] +13923 clk cpu0 MR4 037005ac:000000f005ac_NS 0000000c +13923 clk cpu0 R X10 000000000000000C +13924 clk cpu0 IT (13888) 0001146c:00001001146c_NS 1aca2508 O EL1h_n : LSR w8,w8,w10 +13924 clk cpu0 R X8 0000000000000000 +13925 clk cpu0 IT (13889) 00011470:000010011470_NS 2a0803f2 O EL1h_n : MOV w18,w8 +13925 clk cpu0 R X18 0000000000000000 +13926 clk cpu0 IT (13890) 00011474:000010011474_NS d3407e52 O EL1h_n : UBFX x18,x18,#0,#32 +13926 clk cpu0 R X18 0000000000000000 +13927 clk cpu0 IT (13891) 00011478:000010011478_NS f90037f2 O EL1h_n : STR x18,[sp,#0x68] +13927 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000000 +13928 clk cpu0 IT (13892) 0001147c:00001001147c_NS b94047e2 O EL1h_n : LDR w2,[sp,#0x44] +13928 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +13928 clk cpu0 R X2 0000000000030001 +13929 clk cpu0 IT (13893) 00011480:000010011480_NS f94037e3 O EL1h_n : LDR x3,[sp,#0x68] +13929 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +13929 clk cpu0 R X3 0000000000000000 +13930 clk cpu0 IT (13894) 00011484:000010011484_NS b9401be0 O EL1h_n : LDR w0,[sp,#0x18] +13930 clk cpu0 MR4 037005a8:000000f005a8_NS 00000001 +13930 clk cpu0 R X0 0000000000000001 +13931 clk cpu0 IT (13895) 00011488:000010011488_NS f9400be1 O EL1h_n : LDR x1,[sp,#0x10] +13931 clk cpu0 MR8 037005a0:000000f005a0_NS 00000000_0004ccc9 +13931 clk cpu0 R X1 000000000004CCC9 +13932 clk cpu0 IT (13896) 0001148c:00001001148c_NS 94022c10 O EL1h_n : BL 0x9c4cc +13932 clk cpu0 R X30 0000000000011490 +13933 clk cpu0 IT (13897) 0009c4cc:00001009c4cc_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +13933 clk cpu0 R SP_EL1 0000000003700500 +13934 clk cpu0 IT (13898) 0009c4d0:00001009c4d0_NS d0030bc8 O EL1h_n : ADRP x8,0x62164d0 +13934 clk cpu0 R X8 0000000006216000 +13935 clk cpu0 IT (13899) 0009c4d4:00001009c4d4_NS b940f908 O EL1h_n : LDR w8,[x8,#0xf8] +13935 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +13935 clk cpu0 R X8 0000000000000003 +13936 clk cpu0 IT (13900) 0009c4d8:00001009c4d8_NS a90753f5 O EL1h_n : STP x21,x20,[sp,#0x70] +13936 clk cpu0 MW8 03700570:000000f00570_NS 00000000_02f00028 +13936 clk cpu0 MW8 03700578:000000f00578_NS ff83ff83_ff83ff83 +13937 clk cpu0 IT (13901) 0009c4dc:00001009c4dc_NS a9087bf3 O EL1h_n : STP x19,x30,[sp,#0x80] +13937 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +13937 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011490 +13938 clk cpu0 IT (13902) 0009c4e0:00001009c4e0_NS a9000fe2 O EL1h_n : STP x2,x3,[sp,#0] +13938 clk cpu0 MW8 03700500:000000f00500_NS 00000000_00030001 +13938 clk cpu0 MW8 03700508:000000f00508_NS 00000000_00000000 +13939 clk cpu0 IT (13903) 0009c4e4:00001009c4e4_NS 6b00011f O EL1h_n : CMP w8,w0 +13939 clk cpu0 R cpsr 220003c5 +13940 clk cpu0 IT (13904) 0009c4e8:00001009c4e8_NS a90117e4 O EL1h_n : STP x4,x5,[sp,#0x10] +13940 clk cpu0 MW8 03700510:000000f00510_NS 00000000_030293f0 +13940 clk cpu0 MW8 03700518:000000f00518_NS f800f800_f800f800 +13941 clk cpu0 IT (13905) 0009c4ec:00001009c4ec_NS a9021fe6 O EL1h_n : STP x6,x7,[sp,#0x20] +13941 clk cpu0 MW8 03700520:000000f00520_NS 00000000_90000000 +13941 clk cpu0 MW8 03700528:000000f00528_NS 03ff8000_03ff8000 +13942 clk cpu0 IT (13906) 0009c4f0:00001009c4f0_NS a9067fff O EL1h_n : STP xzr,xzr,[sp,#0x60] +13942 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00000000 +13942 clk cpu0 MW8 03700568:000000f00568_NS 00000000_00000000 +13943 clk cpu0 IT (13907) 0009c4f4:00001009c4f4_NS a9057fff O EL1h_n : STP xzr,xzr,[sp,#0x50] +13943 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +13943 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000000 +13944 clk cpu0 IS (13908) 0009c4f8:00001009c4f8_NS 54000423 O EL1h_n : B.CC 0x9c57c +13945 clk cpu0 IT (13909) 0009c4fc:00001009c4fc_NS 90017b74 O EL1h_n : ADRP x20,0x30084fc +13945 clk cpu0 R X20 0000000003008000 +13946 clk cpu0 IT (13910) 0009c500:00001009c500_NS 9114a294 O EL1h_n : ADD x20,x20,#0x528 +13946 clk cpu0 R X20 0000000003008528 +13947 clk cpu0 IT (13911) 0009c504:00001009c504_NS aa1403e0 O EL1h_n : MOV x0,x20 +13947 clk cpu0 R X0 0000000003008528 +13948 clk cpu0 IT (13912) 0009c508:00001009c508_NS aa0103f3 O EL1h_n : MOV x19,x1 +13948 clk cpu0 R X19 000000000004CCC9 +13949 clk cpu0 IT (13913) 0009c50c:00001009c50c_NS 97fff114 O EL1h_n : BL 0x9895c +13949 clk cpu0 R X30 000000000009C510 +13950 clk cpu0 IT (13914) 0009895c:00001009895c_NS d0030be8 O EL1h_n : ADRP x8,0x621695c +13950 clk cpu0 R X8 0000000006216000 +13951 clk cpu0 IT (13915) 00098960:000010098960_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +13951 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +13951 clk cpu0 R X8 0000000000000001 +13952 clk cpu0 IT (13916) 00098964:000010098964_NS 7100091f O EL1h_n : CMP w8,#2 +13952 clk cpu0 R cpsr 820003c5 +13953 clk cpu0 IT (13917) 00098968:000010098968_NS 54000043 O EL1h_n : B.CC 0x98970 +13954 clk cpu0 IT (13918) 00098970:000010098970_NS d65f03c0 O EL1h_n : RET +13955 clk cpu0 IT (13919) 0009c510:00001009c510_NS 910003e9 O EL1h_n : MOV x9,sp +13955 clk cpu0 R X9 0000000003700500 +13956 clk cpu0 IT (13920) 0009c514:00001009c514_NS 128005e8 O EL1h_n : MOV w8,#0xffffffd0 +13956 clk cpu0 R X8 00000000FFFFFFD0 +13957 clk cpu0 IT (13921) 0009c518:00001009c518_NS 910243ea O EL1h_n : ADD x10,sp,#0x90 +13957 clk cpu0 R X10 0000000003700590 +13958 clk cpu0 IT (13922) 0009c51c:00001009c51c_NS 9100c129 O EL1h_n : ADD x9,x9,#0x30 +13958 clk cpu0 R X9 0000000003700530 +13959 clk cpu0 IT (13923) 0009c520:00001009c520_NS 2a1f03e0 O EL1h_n : MOV w0,wzr +13959 clk cpu0 R X0 0000000000000000 +13960 clk cpu0 IT (13924) 0009c524:00001009c524_NS 2a1f03e1 O EL1h_n : MOV w1,wzr +13960 clk cpu0 R X1 0000000000000000 +13961 clk cpu0 IT (13925) 0009c528:00001009c528_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +13961 clk cpu0 R X2 0000000000000000 +13962 clk cpu0 IT (13926) 0009c52c:00001009c52c_NS f90037e8 O EL1h_n : STR x8,[sp,#0x68] +13962 clk cpu0 MW8 03700568:000000f00568_NS 00000000_ffffffd0 +13963 clk cpu0 IT (13927) 0009c530:00001009c530_NS a90527ea O EL1h_n : STP x10,x9,[sp,#0x50] +13963 clk cpu0 MW8 03700550:000000f00550_NS 00000000_03700590 +13963 clk cpu0 MW8 03700558:000000f00558_NS 00000000_03700530 +13964 clk cpu0 IT (13928) 0009c534:00001009c534_NS d503201f O EL1h_n : NOP +13965 clk cpu0 IT (13929) 0009c538:00001009c538_NS a945a3ea O EL1h_n : LDP x10,x8,[sp,#0x58] +13965 clk cpu0 MR8 03700558:000000f00558_NS 00000000_03700530 +13965 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00000000 +13965 clk cpu0 R X8 0000000000000000 +13965 clk cpu0 R X10 0000000003700530 +13966 clk cpu0 IT (13930) 0009c53c:00001009c53c_NS f9402be9 O EL1h_n : LDR x9,[sp,#0x50] +13966 clk cpu0 MR8 03700550:000000f00550_NS 00000000_03700590 +13966 clk cpu0 R X9 0000000003700590 +13967 clk cpu0 IT (13931) 0009c540:00001009c540_NS f94037eb O EL1h_n : LDR x11,[sp,#0x68] +13967 clk cpu0 MR8 03700568:000000f00568_NS 00000000_ffffffd0 +13967 clk cpu0 R X11 00000000FFFFFFD0 +13968 clk cpu0 IT (13932) 0009c544:00001009c544_NS 2a0003f5 O EL1h_n : MOV w21,w0 +13968 clk cpu0 R X21 0000000000000000 +13969 clk cpu0 IT (13933) 0009c548:00001009c548_NS 9100c3e1 O EL1h_n : ADD x1,sp,#0x30 +13969 clk cpu0 R X1 0000000003700530 +13970 clk cpu0 IT (13934) 0009c54c:00001009c54c_NS aa1303e0 O EL1h_n : MOV x0,x19 +13970 clk cpu0 R X0 000000000004CCC9 +13971 clk cpu0 IT (13935) 0009c550:00001009c550_NS a903a3ea O EL1h_n : STP x10,x8,[sp,#0x38] +13971 clk cpu0 MW8 03700538:000000f00538_NS 00000000_03700530 +13971 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000000 +13972 clk cpu0 IT (13936) 0009c554:00001009c554_NS f9001be9 O EL1h_n : STR x9,[sp,#0x30] +13972 clk cpu0 MW8 03700530:000000f00530_NS 00000000_03700590 +13973 clk cpu0 IT (13937) 0009c558:00001009c558_NS f90027eb O EL1h_n : STR x11,[sp,#0x48] +13973 clk cpu0 MW8 03700548:000000f00548_NS 00000000_ffffffd0 +13974 clk cpu0 IT (13938) 0009c55c:00001009c55c_NS 97ffd97b O EL1h_n : BL 0x92b48 +13974 clk cpu0 R X30 000000000009C560 +13975 clk cpu0 IT (13939) 00092b48:000010092b48_NS d10283ff O EL1h_n : SUB sp,sp,#0xa0 +13975 clk cpu0 R SP_EL1 0000000003700460 +13976 clk cpu0 IT (13940) 00092b4c:000010092b4c_NS a9097bf3 O EL1h_n : STP x19,x30,[sp,#0x90] +13976 clk cpu0 MW8 037004f0:000000f004f0_NS 00000000_0004ccc9 +13976 clk cpu0 MW8 037004f8:000000f004f8_NS 00000000_0009c560 +13977 clk cpu0 IT (13941) 00092b50:000010092b50_NS aa0103f3 O EL1h_n : MOV x19,x1 +13977 clk cpu0 R X19 0000000003700530 +13978 clk cpu0 IT (13942) 00092b54:000010092b54_NS d0fffdc1 O EL1h_n : ADRP x1,0x4cb54 +13978 clk cpu0 R X1 000000000004C000 +13979 clk cpu0 IT (13943) 00092b58:000010092b58_NS a90853f5 O EL1h_n : STP x21,x20,[sp,#0x80] +13979 clk cpu0 MW8 037004e0:000000f004e0_NS 00000000_00000000 +13979 clk cpu0 MW8 037004e8:000000f004e8_NS 00000000_03008528 +13980 clk cpu0 IT (13944) 00092b5c:000010092b5c_NS aa0003f4 O EL1h_n : MOV x20,x0 +13980 clk cpu0 R X20 000000000004CCC9 +13981 clk cpu0 IT (13945) 00092b60:000010092b60_NS 91002c21 O EL1h_n : ADD x1,x1,#0xb +13981 clk cpu0 R X1 000000000004C00B +13982 clk cpu0 IT (13946) 00092b64:000010092b64_NS 910013e0 O EL1h_n : ADD x0,sp,#4 +13982 clk cpu0 R X0 0000000003700464 +13983 clk cpu0 IT (13947) 00092b68:000010092b68_NS 52800762 O EL1h_n : MOV w2,#0x3b +13983 clk cpu0 R X2 000000000000003B +13984 clk cpu0 IT (13948) 00092b6c:000010092b6c_NS f90023fc O EL1h_n : STR x28,[sp,#0x40] +13984 clk cpu0 MW8 037004a0:000000f004a0_NS ff7fff7f_ff7fff7f +13985 clk cpu0 IT (13949) 00092b70:000010092b70_NS a9056bfb O EL1h_n : STP x27,x26,[sp,#0x50] +13985 clk cpu0 MW8 037004b0:000000f004b0_NS 00010001_00010001 +13985 clk cpu0 MW8 037004b8:000000f004b8_NS ffe000ff_ffe000ff +13986 clk cpu0 IT (13950) 00092b74:000010092b74_NS a90663f9 O EL1h_n : STP x25,x24,[sp,#0x60] +13986 clk cpu0 MW8 037004c0:000000f004c0_NS 00000000_0000003c +13986 clk cpu0 MW8 037004c8:000000f004c8_NS 00000000_00007c00 +13987 clk cpu0 IT (13951) 00092b78:000010092b78_NS a9075bf7 O EL1h_n : STP x23,x22,[sp,#0x70] +13987 clk cpu0 MW8 037004d0:000000f004d0_NS 00000000_00000000 +13987 clk cpu0 MW8 037004d8:000000f004d8_NS 00000000_90000000 +13988 clk cpu0 IT (13952) 00092b7c:000010092b7c_NS 97fdf655 O EL1h_n : BL 0x104d0 +13988 clk cpu0 R X30 0000000000092B80 +13989 clk cpu0 IT (13953) 000104d0:0000100104d0_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +13989 clk cpu0 MW8 03700450:000000f00450_NS 00000000_03700530 +13989 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00092b80 +13989 clk cpu0 R SP_EL1 0000000003700450 +13990 clk cpu0 IT (13954) 000104d4:0000100104d4_NS aa0003f3 O EL1h_n : MOV x19,x0 +13990 clk cpu0 R X19 0000000003700464 +13991 clk cpu0 IT (13955) 000104d8:0000100104d8_NS 9400002b O EL1h_n : BL 0x10584 +13991 clk cpu0 R X30 00000000000104DC +13992 clk cpu0 IT (13956) 00010584:000010010584_NS f100105f O EL1h_n : CMP x2,#4 +13992 clk cpu0 R cpsr 220003c5 +13993 clk cpu0 IS (13957) 00010588:000010010588_NS 54000643 O EL1h_n : B.CC 0x10650 +13994 clk cpu0 IT (13958) 0001058c:00001001058c_NS f240041f O EL1h_n : TST x0,#3 +13994 clk cpu0 R cpsr 420003c5 +13995 clk cpu0 IT (13959) 00010590:000010010590_NS 54000320 O EL1h_n : B.EQ 0x105f4 +13996 clk cpu0 IT (13960) 000105f4:0000100105f4_NS 7200042a O EL1h_n : ANDS w10,w1,#3 +13996 clk cpu0 R cpsr 020003c5 +13996 clk cpu0 R X10 0000000000000003 +13997 clk cpu0 IS (13961) 000105f8:0000100105f8_NS 54000440 O EL1h_n : B.EQ 0x10680 +13998 clk cpu0 IT (13962) 000105fc:0000100105fc_NS 52800409 O EL1h_n : MOV w9,#0x20 +13998 clk cpu0 R X9 0000000000000020 +13999 clk cpu0 IT (13963) 00010600:000010010600_NS cb0a0028 O EL1h_n : SUB x8,x1,x10 +13999 clk cpu0 R X8 000000000004C008 +14000 clk cpu0 IT (13964) 00010604:000010010604_NS f100105f O EL1h_n : CMP x2,#4 +14000 clk cpu0 R cpsr 220003c5 +14001 clk cpu0 IT (13965) 00010608:000010010608_NS 4b0a0d29 O EL1h_n : SUB w9,w9,w10,LSL #3 +14001 clk cpu0 R X9 0000000000000008 +14002 clk cpu0 IS (13966) 0001060c:00001001060c_NS 540001c3 O EL1h_n : B.CC 0x10644 +14003 clk cpu0 IT (13967) 00010610:000010010610_NS b940010c O EL1h_n : LDR w12,[x8,#0] +14003 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +14003 clk cpu0 R X12 000000000A00000A +14004 clk cpu0 IT (13968) 00010614:000010010614_NS 531d714a O EL1h_n : UBFIZ w10,w10,#3,#29 +14004 clk cpu0 R X10 0000000000000018 +14005 clk cpu0 IT (13969) 00010618:000010010618_NS aa0203eb O EL1h_n : MOV x11,x2 +14005 clk cpu0 R X11 000000000000003B +14006 clk cpu0 IT (13970) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14006 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +14006 clk cpu0 R X8 000000000004C00C +14006 clk cpu0 R X13 000000006F727245 +14007 clk cpu0 IT (13971) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14007 clk cpu0 R X12 000000000000000A +14008 clk cpu0 IT (13972) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14008 clk cpu0 R X11 0000000000000037 +14009 clk cpu0 IT (13973) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14009 clk cpu0 R cpsr 220003c5 +14010 clk cpu0 IT (13974) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14010 clk cpu0 R X14 0000000072724500 +14011 clk cpu0 IT (13975) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14011 clk cpu0 R X12 000000007272450A +14012 clk cpu0 IT (13976) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14012 clk cpu0 MW4 03700464:000000f00464_NS 7272450a +14012 clk cpu0 R X0 0000000003700468 +14013 clk cpu0 IT (13977) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14013 clk cpu0 R X12 000000006F727245 +14014 clk cpu0 IT (13978) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14015 clk cpu0 IT (13979) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14015 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +14015 clk cpu0 R X8 000000000004C010 +14015 clk cpu0 R X13 0000000049203A72 +14016 clk cpu0 IT (13980) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14016 clk cpu0 R X12 000000000000006F +14017 clk cpu0 IT (13981) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14017 clk cpu0 R X11 0000000000000033 +14018 clk cpu0 IT (13982) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14018 clk cpu0 R cpsr 220003c5 +14019 clk cpu0 IT (13983) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14019 clk cpu0 R X14 00000000203A7200 +14020 clk cpu0 IT (13984) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14020 clk cpu0 R X12 00000000203A726F +14021 clk cpu0 IT (13985) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14021 clk cpu0 MW4 03700468:000000f00468_NS 203a726f +14021 clk cpu0 R X0 000000000370046C +14022 clk cpu0 IT (13986) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14022 clk cpu0 R X12 0000000049203A72 +14023 clk cpu0 IT (13987) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14024 clk cpu0 IT (13988) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14024 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +14024 clk cpu0 R X8 000000000004C014 +14024 clk cpu0 R X13 0000000067656C6C +14025 clk cpu0 IT (13989) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14025 clk cpu0 R X12 0000000000000049 +14026 clk cpu0 IT (13990) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14026 clk cpu0 R X11 000000000000002F +14027 clk cpu0 IT (13991) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14027 clk cpu0 R cpsr 220003c5 +14028 clk cpu0 IT (13992) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14028 clk cpu0 R X14 00000000656C6C00 +14029 clk cpu0 IT (13993) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14029 clk cpu0 R X12 00000000656C6C49 +14030 clk cpu0 IT (13994) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14030 clk cpu0 MW4 0370046c:000000f0046c_NS 656c6c49 +14030 clk cpu0 R X0 0000000003700470 +14031 clk cpu0 IT (13995) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14031 clk cpu0 R X12 0000000067656C6C +14032 clk cpu0 IT (13996) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14033 clk cpu0 IT (13997) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14033 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +14033 clk cpu0 R X8 000000000004C018 +14033 clk cpu0 R X13 0000000066206C61 +14034 clk cpu0 IT (13998) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14034 clk cpu0 R X12 0000000000000067 +14035 clk cpu0 IT (13999) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14035 clk cpu0 R X11 000000000000002B +14036 clk cpu0 IT (14000) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14036 clk cpu0 R cpsr 220003c5 +14037 clk cpu0 IT (14001) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14037 clk cpu0 R X14 00000000206C6100 +14038 clk cpu0 IT (14002) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14038 clk cpu0 R X12 00000000206C6167 +14039 clk cpu0 IT (14003) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14039 clk cpu0 MW4 03700470:000000f00470_NS 206c6167 +14039 clk cpu0 R X0 0000000003700474 +14040 clk cpu0 IT (14004) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14040 clk cpu0 R X12 0000000066206C61 +14041 clk cpu0 IT (14005) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14042 clk cpu0 IT (14006) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14042 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +14042 clk cpu0 R X8 000000000004C01C +14042 clk cpu0 R X13 00000000616D726F +14043 clk cpu0 IT (14007) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14043 clk cpu0 R X12 0000000000000066 +14044 clk cpu0 IT (14008) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14044 clk cpu0 R X11 0000000000000027 +14045 clk cpu0 IT (14009) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14045 clk cpu0 R cpsr 220003c5 +14046 clk cpu0 IT (14010) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14046 clk cpu0 R X14 000000006D726F00 +14047 clk cpu0 IT (14011) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14047 clk cpu0 R X12 000000006D726F66 +14048 clk cpu0 IT (14012) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14048 clk cpu0 MW4 03700474:000000f00474_NS 6d726f66 +14048 clk cpu0 R X0 0000000003700478 +14049 clk cpu0 IT (14013) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14049 clk cpu0 R X12 00000000616D726F +14050 clk cpu0 IT (14014) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14051 clk cpu0 IT (14015) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14051 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +14051 clk cpu0 R X8 000000000004C020 +14051 clk cpu0 R X13 0000000070732074 +14052 clk cpu0 IT (14016) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14052 clk cpu0 R X12 0000000000000061 +14053 clk cpu0 IT (14017) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14053 clk cpu0 R X11 0000000000000023 +14054 clk cpu0 IT (14018) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14054 clk cpu0 R cpsr 220003c5 +14055 clk cpu0 IT (14019) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14055 clk cpu0 R X14 0000000073207400 +14056 clk cpu0 IT (14020) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14056 clk cpu0 R X12 0000000073207461 +14057 clk cpu0 IT (14021) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14057 clk cpu0 MW4 03700478:000000f00478_NS 73207461 +14057 clk cpu0 R X0 000000000370047C +14058 clk cpu0 IT (14022) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14058 clk cpu0 R X12 0000000070732074 +14059 clk cpu0 IT (14023) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14060 clk cpu0 IT (14024) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14060 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +14060 clk cpu0 R X8 000000000004C024 +14060 clk cpu0 R X13 0000000066696365 +14061 clk cpu0 IT (14025) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14061 clk cpu0 R X12 0000000000000070 +14062 clk cpu0 IT (14026) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14062 clk cpu0 R X11 000000000000001F +14063 clk cpu0 IT (14027) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14063 clk cpu0 R cpsr 220003c5 +14064 clk cpu0 IT (14028) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14064 clk cpu0 R X14 0000000069636500 +14065 clk cpu0 IT (14029) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14065 clk cpu0 R X12 0000000069636570 +14066 clk cpu0 IT (14030) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14066 clk cpu0 MW4 0370047c:000000f0047c_NS 69636570 +14066 clk cpu0 R X0 0000000003700480 +14067 clk cpu0 IT (14031) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14067 clk cpu0 R X12 0000000066696365 +14068 clk cpu0 IT (14032) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14069 clk cpu0 IT (14033) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14069 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +14069 clk cpu0 R X8 000000000004C028 +14069 clk cpu0 R X13 0000000020726569 +14070 clk cpu0 IT (14034) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14070 clk cpu0 R X12 0000000000000066 +14071 clk cpu0 IT (14035) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14071 clk cpu0 R X11 000000000000001B +14072 clk cpu0 IT (14036) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14072 clk cpu0 R cpsr 220003c5 +14073 clk cpu0 IT (14037) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14073 clk cpu0 R X14 0000000072656900 +14074 clk cpu0 IT (14038) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14074 clk cpu0 R X12 0000000072656966 +14075 clk cpu0 IT (14039) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14075 clk cpu0 MW4 03700480:000000f00480_NS 72656966 +14075 clk cpu0 R X0 0000000003700484 +14076 clk cpu0 IT (14040) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14076 clk cpu0 R X12 0000000020726569 +14077 clk cpu0 IT (14041) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14078 clk cpu0 IT (14042) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14078 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +14078 clk cpu0 R X8 000000000004C02C +14078 clk cpu0 R X13 0000000064657375 +14079 clk cpu0 IT (14043) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14079 clk cpu0 R X12 0000000000000020 +14080 clk cpu0 IT (14044) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14080 clk cpu0 R X11 0000000000000017 +14081 clk cpu0 IT (14045) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14081 clk cpu0 R cpsr 220003c5 +14082 clk cpu0 IT (14046) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14082 clk cpu0 R X14 0000000065737500 +14083 clk cpu0 IT (14047) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14083 clk cpu0 R X12 0000000065737520 +14084 clk cpu0 IT (14048) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14084 clk cpu0 MW4 03700484:000000f00484_NS 65737520 +14084 clk cpu0 R X0 0000000003700488 +14085 clk cpu0 IT (14049) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14085 clk cpu0 R X12 0000000064657375 +14086 clk cpu0 IT (14050) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14087 clk cpu0 IT (14051) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14087 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +14087 clk cpu0 R X8 000000000004C030 +14087 clk cpu0 R X13 000000005F27203A +14088 clk cpu0 IT (14052) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14088 clk cpu0 R X12 0000000000000064 +14089 clk cpu0 IT (14053) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14089 clk cpu0 R X11 0000000000000013 +14090 clk cpu0 IT (14054) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14090 clk cpu0 R cpsr 220003c5 +14091 clk cpu0 IT (14055) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14091 clk cpu0 R X14 0000000027203A00 +14092 clk cpu0 IT (14056) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14092 clk cpu0 R X12 0000000027203A64 +14093 clk cpu0 IT (14057) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14093 clk cpu0 MW4 03700488:000000f00488_NS 27203a64 +14093 clk cpu0 R X0 000000000370048C +14094 clk cpu0 IT (14058) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14094 clk cpu0 R X12 000000005F27203A +14095 clk cpu0 IT (14059) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14096 clk cpu0 IT (14060) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14096 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +14096 clk cpu0 R X8 000000000004C034 +14096 clk cpu0 R X13 0000000045202E27 +14097 clk cpu0 IT (14061) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14097 clk cpu0 R X12 000000000000005F +14098 clk cpu0 IT (14062) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14098 clk cpu0 R X11 000000000000000F +14099 clk cpu0 IT (14063) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14099 clk cpu0 R cpsr 220003c5 +14100 clk cpu0 IT (14064) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14100 clk cpu0 R X14 00000000202E2700 +14101 clk cpu0 IT (14065) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14101 clk cpu0 R X12 00000000202E275F +14102 clk cpu0 IT (14066) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14102 clk cpu0 MW4 0370048c:000000f0048c_NS 202e275f +14102 clk cpu0 R X0 0000000003700490 +14103 clk cpu0 IT (14067) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14103 clk cpu0 R X12 0000000045202E27 +14104 clk cpu0 IT (14068) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14105 clk cpu0 IT (14069) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14105 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +14105 clk cpu0 R X8 000000000004C038 +14105 clk cpu0 R X13 000000006E69646E +14106 clk cpu0 IT (14070) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14106 clk cpu0 R X12 0000000000000045 +14107 clk cpu0 IT (14071) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14107 clk cpu0 R X11 000000000000000B +14108 clk cpu0 IT (14072) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14108 clk cpu0 R cpsr 220003c5 +14109 clk cpu0 IT (14073) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14109 clk cpu0 R X14 0000000069646E00 +14110 clk cpu0 IT (14074) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14110 clk cpu0 R X12 0000000069646E45 +14111 clk cpu0 IT (14075) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14111 clk cpu0 MW4 03700490:000000f00490_NS 69646e45 +14111 clk cpu0 R X0 0000000003700494 +14112 clk cpu0 IT (14076) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14112 clk cpu0 R X12 000000006E69646E +14113 clk cpu0 IT (14077) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14114 clk cpu0 IT (14078) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14114 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +14114 clk cpu0 R X8 000000000004C03C +14114 clk cpu0 R X13 0000000065542067 +14115 clk cpu0 IT (14079) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14115 clk cpu0 R X12 000000000000006E +14116 clk cpu0 IT (14080) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14116 clk cpu0 R X11 0000000000000007 +14117 clk cpu0 IT (14081) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14117 clk cpu0 R cpsr 220003c5 +14118 clk cpu0 IT (14082) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14118 clk cpu0 R X14 0000000054206700 +14119 clk cpu0 IT (14083) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14119 clk cpu0 R X12 000000005420676E +14120 clk cpu0 IT (14084) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14120 clk cpu0 MW4 03700494:000000f00494_NS 5420676e +14120 clk cpu0 R X0 0000000003700498 +14121 clk cpu0 IT (14085) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14121 clk cpu0 R X12 0000000065542067 +14122 clk cpu0 IT (14086) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14123 clk cpu0 IT (14087) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +14123 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +14123 clk cpu0 R X8 000000000004C040 +14123 clk cpu0 R X13 000000000A2E7473 +14124 clk cpu0 IT (14088) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +14124 clk cpu0 R X12 0000000000000065 +14125 clk cpu0 IT (14089) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +14125 clk cpu0 R X11 0000000000000003 +14126 clk cpu0 IT (14090) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +14126 clk cpu0 R cpsr 620003c5 +14127 clk cpu0 IT (14091) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +14127 clk cpu0 R X14 000000002E747300 +14128 clk cpu0 IT (14092) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +14128 clk cpu0 R X12 000000002E747365 +14129 clk cpu0 IT (14093) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +14129 clk cpu0 MW4 03700498:000000f00498_NS 2e747365 +14129 clk cpu0 R X0 000000000370049C +14130 clk cpu0 IT (14094) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +14130 clk cpu0 R X12 000000000A2E7473 +14131 clk cpu0 IS (14095) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +14132 clk cpu0 IT (14096) 00010640:000010010640_NS 92400442 O EL1h_n : AND x2,x2,#3 +14132 clk cpu0 R X2 0000000000000003 +14133 clk cpu0 IT (14097) 00010644:000010010644_NS 53037d29 O EL1h_n : LSR w9,w9,#3 +14133 clk cpu0 R X9 0000000000000001 +14134 clk cpu0 IT (14098) 00010648:000010010648_NS cb090108 O EL1h_n : SUB x8,x8,x9 +14134 clk cpu0 R X8 000000000004C03F +14135 clk cpu0 IT (14099) 0001064c:00001001064c_NS 91001101 O EL1h_n : ADD x1,x8,#4 +14135 clk cpu0 R X1 000000000004C043 +14136 clk cpu0 IT (14100) 00010650:000010010650_NS 7100045f O EL1h_n : CMP w2,#1 +14136 clk cpu0 R cpsr 220003c5 +14137 clk cpu0 IS (14101) 00010654:000010010654_NS 5400014b O EL1h_n : B.LT 0x1067c +14138 clk cpu0 IT (14102) 00010658:000010010658_NS 39400028 O EL1h_n : LDRB w8,[x1,#0] +14138 clk cpu0 MR1 0004c043:00001004c043_NS 0a +14138 clk cpu0 R X8 000000000000000A +14139 clk cpu0 IT (14103) 0001065c:00001001065c_NS 39000008 O EL1h_n : STRB w8,[x0,#0] +14139 clk cpu0 MW1 0370049c:000000f0049c_NS 0a +14140 clk cpu0 IS (14104) 00010660:000010010660_NS 540000e0 O EL1h_n : B.EQ 0x1067c +14141 clk cpu0 IT (14105) 00010664:000010010664_NS 39400428 O EL1h_n : LDRB w8,[x1,#1] +14141 clk cpu0 MR1 0004c044:00001004c044_NS 00 +14141 clk cpu0 R X8 0000000000000000 +14142 clk cpu0 IT (14106) 00010668:000010010668_NS 71000c5f O EL1h_n : CMP w2,#3 +14142 clk cpu0 R cpsr 620003c5 +14143 clk cpu0 IT (14107) 0001066c:00001001066c_NS 39000408 O EL1h_n : STRB w8,[x0,#1] +14143 clk cpu0 MW1 0370049d:000000f0049d_NS 00 +14144 clk cpu0 IS (14108) 00010670:000010010670_NS 5400006b O EL1h_n : B.LT 0x1067c +14145 clk cpu0 IT (14109) 00010674:000010010674_NS 39400828 O EL1h_n : LDRB w8,[x1,#2] +14145 clk cpu0 MR1 0004c045:00001004c045_NS 00 +14145 clk cpu0 R X8 0000000000000000 +14146 clk cpu0 IT (14110) 00010678:000010010678_NS 39000808 O EL1h_n : STRB w8,[x0,#2] +14146 clk cpu0 MW1 0370049e:000000f0049e_NS 00 +14147 clk cpu0 IT (14111) 0001067c:00001001067c_NS d65f03c0 O EL1h_n : RET +14148 clk cpu0 IT (14112) 000104dc:0000100104dc_NS aa1303e0 O EL1h_n : MOV x0,x19 +14148 clk cpu0 R X0 0000000003700464 +14149 clk cpu0 IT (14113) 000104e0:0000100104e0_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +14149 clk cpu0 MR8 03700450:000000f00450_NS 00000000_03700530 +14149 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00092b80 +14149 clk cpu0 R SP_EL1 0000000003700460 +14149 clk cpu0 R X19 0000000003700530 +14149 clk cpu0 R X30 0000000000092B80 +14150 clk cpu0 IT (14114) 000104e4:0000100104e4_NS d65f03c0 O EL1h_n : RET +14151 clk cpu0 IT (14115) 00092b80:000010092b80_NS d0fffdd6 O EL1h_n : ADRP x22,0x4cb80 +14151 clk cpu0 R X22 000000000004C000 +14152 clk cpu0 IT (14116) 00092b84:000010092b84_NS d0fffdd7 O EL1h_n : ADRP x23,0x4cb84 +14152 clk cpu0 R X23 000000000004C000 +14153 clk cpu0 IT (14117) 00092b88:000010092b88_NS 2a1f03fa O EL1h_n : MOV w26,wzr +14153 clk cpu0 R X26 0000000000000000 +14154 clk cpu0 IT (14118) 00092b8c:000010092b8c_NS f0017cb5 O EL1h_n : ADRP x21,0x3029b8c +14154 clk cpu0 R X21 0000000003029000 +14155 clk cpu0 IT (14119) 00092b90:000010092b90_NS 910422d6 O EL1h_n : ADD x22,x22,#0x108 +14155 clk cpu0 R X22 000000000004C108 +14156 clk cpu0 IT (14120) 00092b94:000010092b94_NS 9104a6f7 O EL1h_n : ADD x23,x23,#0x129 +14156 clk cpu0 R X23 000000000004C129 +14157 clk cpu0 IT (14121) 00092b98:000010092b98_NS f0017d78 O EL1h_n : ADRP x24,0x3041b98 +14157 clk cpu0 R X24 0000000003041000 +14158 clk cpu0 IT (14122) 00092b9c:000010092b9c_NS 90030c39 O EL1h_n : ADRP x25,0x6216b9c +14158 clk cpu0 R X25 0000000006216000 +14159 clk cpu0 IT (14123) 00092ba0:000010092ba0_NS 14000005 O EL1h_n : B 0x92bb4 +14160 clk cpu0 IT (14124) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14160 clk cpu0 MR1 0004ccc9:00001004ccc9_NS 20 +14160 clk cpu0 R X8 0000000000000020 +14161 clk cpu0 IT (14125) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14161 clk cpu0 R cpsr 820003c5 +14162 clk cpu0 IS (14126) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14163 clk cpu0 IS (14127) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14164 clk cpu0 IT (14128) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14164 clk cpu0 R cpsr 020003c5 +14165 clk cpu0 IT (14129) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14166 clk cpu0 IT (14130) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14166 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14166 clk cpu0 R X9 0000000013000000 +14167 clk cpu0 IT (14131) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14167 clk cpu0 R X27 000000000004CCC9 +14168 clk cpu0 IT (14132) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14168 clk cpu0 R X20 000000000004CCCA +14169 clk cpu0 IT (14133) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14169 clk cpu0 MW1 13000000:000013000000_NS 20 +14170 clk cpu0 IT (14134) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14170 clk cpu0 MR1 0004ccca:00001004ccca_NS 45 +14170 clk cpu0 R X8 0000000000000045 +14171 clk cpu0 IT (14135) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14171 clk cpu0 R cpsr 220003c5 +14172 clk cpu0 IS (14136) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14173 clk cpu0 IS (14137) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14174 clk cpu0 IT (14138) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14174 clk cpu0 R cpsr 020003c5 +14175 clk cpu0 IT (14139) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14176 clk cpu0 IT (14140) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14176 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14176 clk cpu0 R X9 0000000013000000 +14177 clk cpu0 IT (14141) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14177 clk cpu0 R X27 000000000004CCCA +14178 clk cpu0 IT (14142) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14178 clk cpu0 R X20 000000000004CCCB +14179 clk cpu0 IT (14143) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14179 clk cpu0 MW1 13000000:000013000000_NS 45 +14180 clk cpu0 IT (14144) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14180 clk cpu0 MR1 0004cccb:00001004cccb_NS 6e +14180 clk cpu0 R X8 000000000000006E +14181 clk cpu0 IT (14145) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14181 clk cpu0 R cpsr 220003c5 +14182 clk cpu0 IS (14146) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14183 clk cpu0 IS (14147) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14184 clk cpu0 IT (14148) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14184 clk cpu0 R cpsr 020003c5 +14185 clk cpu0 IT (14149) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14186 clk cpu0 IT (14150) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14186 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14186 clk cpu0 R X9 0000000013000000 +14187 clk cpu0 IT (14151) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14187 clk cpu0 R X27 000000000004CCCB +14188 clk cpu0 IT (14152) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14188 clk cpu0 R X20 000000000004CCCC +14189 clk cpu0 IT (14153) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14189 clk cpu0 MW1 13000000:000013000000_NS 6e +14190 clk cpu0 IT (14154) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14190 clk cpu0 MR1 0004cccc:00001004cccc_NS 61 +14190 clk cpu0 R X8 0000000000000061 +14191 clk cpu0 IT (14155) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14191 clk cpu0 R cpsr 220003c5 +14192 clk cpu0 IS (14156) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14193 clk cpu0 IS (14157) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14194 clk cpu0 IT (14158) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14194 clk cpu0 R cpsr 020003c5 +14195 clk cpu0 IT (14159) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14196 clk cpu0 IT (14160) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14196 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14196 clk cpu0 R X9 0000000013000000 +14197 clk cpu0 IT (14161) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14197 clk cpu0 R X27 000000000004CCCC +14198 clk cpu0 IT (14162) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14198 clk cpu0 R X20 000000000004CCCD +14199 clk cpu0 IT (14163) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14199 clk cpu0 MW1 13000000:000013000000_NS 61 +14200 clk cpu0 IT (14164) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14200 clk cpu0 MR1 0004cccd:00001004cccd_NS 62 +14200 clk cpu0 R X8 0000000000000062 +14201 clk cpu0 IT (14165) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14201 clk cpu0 R cpsr 220003c5 +14202 clk cpu0 IS (14166) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14203 clk cpu0 IS (14167) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14204 clk cpu0 IT (14168) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14204 clk cpu0 R cpsr 020003c5 +14205 clk cpu0 IT (14169) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14206 clk cpu0 IT (14170) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14206 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14206 clk cpu0 R X9 0000000013000000 +14207 clk cpu0 IT (14171) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14207 clk cpu0 R X27 000000000004CCCD +14208 clk cpu0 IT (14172) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14208 clk cpu0 R X20 000000000004CCCE +14209 clk cpu0 IT (14173) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14209 clk cpu0 MW1 13000000:000013000000_NS 62 +14210 clk cpu0 IT (14174) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14210 clk cpu0 MR1 0004ccce:00001004ccce_NS 6c +14210 clk cpu0 R X8 000000000000006C +14211 clk cpu0 IT (14175) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14211 clk cpu0 R cpsr 220003c5 +14212 clk cpu0 IS (14176) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14213 clk cpu0 IS (14177) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14214 clk cpu0 IT (14178) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14214 clk cpu0 R cpsr 020003c5 +14215 clk cpu0 IT (14179) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14216 clk cpu0 IT (14180) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14216 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14216 clk cpu0 R X9 0000000013000000 +14217 clk cpu0 IT (14181) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14217 clk cpu0 R X27 000000000004CCCE +14218 clk cpu0 IT (14182) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14218 clk cpu0 R X20 000000000004CCCF +14219 clk cpu0 IT (14183) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14219 clk cpu0 MW1 13000000:000013000000_NS 6c +14220 clk cpu0 IT (14184) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14220 clk cpu0 MR1 0004cccf:00001004cccf_NS 65 +14220 clk cpu0 R X8 0000000000000065 +14221 clk cpu0 IT (14185) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14221 clk cpu0 R cpsr 220003c5 +14222 clk cpu0 IS (14186) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14223 clk cpu0 IS (14187) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14224 clk cpu0 IT (14188) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14224 clk cpu0 R cpsr 020003c5 +14225 clk cpu0 IT (14189) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14226 clk cpu0 IT (14190) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14226 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14226 clk cpu0 R X9 0000000013000000 +14227 clk cpu0 IT (14191) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14227 clk cpu0 R X27 000000000004CCCF +14228 clk cpu0 IT (14192) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14228 clk cpu0 R X20 000000000004CCD0 +14229 clk cpu0 IT (14193) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14229 clk cpu0 MW1 13000000:000013000000_NS 65 +14230 clk cpu0 IT (14194) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14230 clk cpu0 MR1 0004ccd0:00001004ccd0_NS 20 +14230 clk cpu0 R X8 0000000000000020 +14231 clk cpu0 IT (14195) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14231 clk cpu0 R cpsr 820003c5 +14232 clk cpu0 IS (14196) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14233 clk cpu0 IS (14197) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14234 clk cpu0 IT (14198) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14234 clk cpu0 R cpsr 420003c5 +14235 clk cpu0 IS (14199) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14236 clk cpu0 IT (14200) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +14236 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +14236 clk cpu0 R X8 0000000000000000 +14237 clk cpu0 IT (14201) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +14237 clk cpu0 MR8 0004ccd0:00001004ccd0_NS 72746563_61727420 +14237 clk cpu0 R X0 7274656361727420 +14238 clk cpu0 IT (14202) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +14238 clk cpu0 R cpsr 820003c5 +14239 clk cpu0 IT (14203) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +14240 clk cpu0 IT (14204) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +14240 clk cpu0 R X27 0000000000000000 +14241 clk cpu0 IT (14205) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +14241 clk cpu0 R X28 000000000004CCD0 +14242 clk cpu0 IT (14206) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +14242 clk cpu0 R X8 00000000FFFFFFF8 +14243 clk cpu0 IT (14207) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14243 clk cpu0 R cpsr 020003c5 +14243 clk cpu0 R X9 0000000000000020 +14244 clk cpu0 IS (14208) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14245 clk cpu0 IT (14209) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14245 clk cpu0 R cpsr 820003c5 +14246 clk cpu0 IS (14210) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14247 clk cpu0 IT (14211) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14247 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14247 clk cpu0 R X9 0000000013000000 +14248 clk cpu0 IT (14212) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14248 clk cpu0 R cpsr 820003c5 +14248 clk cpu0 R X8 00000000FFFFFFF9 +14249 clk cpu0 IT (14213) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14249 clk cpu0 MW1 13000000:000013000000_NS 20 +14250 clk cpu0 IT (14214) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14250 clk cpu0 R X0 0072746563617274 +14251 clk cpu0 IT (14215) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14252 clk cpu0 IT (14216) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14252 clk cpu0 R cpsr 020003c5 +14252 clk cpu0 R X9 0000000000000074 +14253 clk cpu0 IS (14217) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14254 clk cpu0 IT (14218) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14254 clk cpu0 R cpsr 220003c5 +14255 clk cpu0 IS (14219) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14256 clk cpu0 IT (14220) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14256 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14256 clk cpu0 R X9 0000000013000000 +14257 clk cpu0 IT (14221) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14257 clk cpu0 R cpsr 820003c5 +14257 clk cpu0 R X8 00000000FFFFFFFA +14258 clk cpu0 IT (14222) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14258 clk cpu0 MW1 13000000:000013000000_NS 74 +14259 clk cpu0 IT (14223) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14259 clk cpu0 R X0 0000727465636172 +14260 clk cpu0 IT (14224) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14261 clk cpu0 IT (14225) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14261 clk cpu0 R cpsr 020003c5 +14261 clk cpu0 R X9 0000000000000072 +14262 clk cpu0 IS (14226) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14263 clk cpu0 IT (14227) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14263 clk cpu0 R cpsr 220003c5 +14264 clk cpu0 IS (14228) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14265 clk cpu0 IT (14229) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14265 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14265 clk cpu0 R X9 0000000013000000 +14266 clk cpu0 IT (14230) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14266 clk cpu0 R cpsr 820003c5 +14266 clk cpu0 R X8 00000000FFFFFFFB +14267 clk cpu0 IT (14231) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14267 clk cpu0 MW1 13000000:000013000000_NS 72 +14268 clk cpu0 IT (14232) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14268 clk cpu0 R X0 0000007274656361 +14269 clk cpu0 IT (14233) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14270 clk cpu0 IT (14234) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14270 clk cpu0 R cpsr 020003c5 +14270 clk cpu0 R X9 0000000000000061 +14271 clk cpu0 IS (14235) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14272 clk cpu0 IT (14236) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14272 clk cpu0 R cpsr 220003c5 +14273 clk cpu0 IS (14237) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14274 clk cpu0 IT (14238) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14274 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14274 clk cpu0 R X9 0000000013000000 +14275 clk cpu0 IT (14239) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14275 clk cpu0 R cpsr 820003c5 +14275 clk cpu0 R X8 00000000FFFFFFFC +14276 clk cpu0 IT (14240) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14276 clk cpu0 MW1 13000000:000013000000_NS 61 +14277 clk cpu0 IT (14241) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14277 clk cpu0 R X0 0000000072746563 +14278 clk cpu0 IT (14242) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14279 clk cpu0 IT (14243) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14279 clk cpu0 R cpsr 020003c5 +14279 clk cpu0 R X9 0000000000000063 +14280 clk cpu0 IS (14244) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14281 clk cpu0 IT (14245) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14281 clk cpu0 R cpsr 220003c5 +14282 clk cpu0 IS (14246) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14283 clk cpu0 IT (14247) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14283 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14283 clk cpu0 R X9 0000000013000000 +14284 clk cpu0 IT (14248) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14284 clk cpu0 R cpsr 820003c5 +14284 clk cpu0 R X8 00000000FFFFFFFD +14285 clk cpu0 IT (14249) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14285 clk cpu0 MW1 13000000:000013000000_NS 63 +14286 clk cpu0 IT (14250) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14286 clk cpu0 R X0 0000000000727465 +14287 clk cpu0 IT (14251) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14288 clk cpu0 IT (14252) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14288 clk cpu0 R cpsr 020003c5 +14288 clk cpu0 R X9 0000000000000065 +14289 clk cpu0 IS (14253) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14290 clk cpu0 IT (14254) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14290 clk cpu0 R cpsr 220003c5 +14291 clk cpu0 IS (14255) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14292 clk cpu0 IT (14256) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14292 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14292 clk cpu0 R X9 0000000013000000 +14293 clk cpu0 IT (14257) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14293 clk cpu0 R cpsr 820003c5 +14293 clk cpu0 R X8 00000000FFFFFFFE +14294 clk cpu0 IT (14258) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14294 clk cpu0 MW1 13000000:000013000000_NS 65 +14295 clk cpu0 IT (14259) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14295 clk cpu0 R X0 0000000000007274 +14296 clk cpu0 IT (14260) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14297 clk cpu0 IT (14261) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14297 clk cpu0 R cpsr 020003c5 +14297 clk cpu0 R X9 0000000000000074 +14298 clk cpu0 IS (14262) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14299 clk cpu0 IT (14263) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14299 clk cpu0 R cpsr 220003c5 +14300 clk cpu0 IS (14264) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14301 clk cpu0 IT (14265) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14301 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14301 clk cpu0 R X9 0000000013000000 +14302 clk cpu0 IT (14266) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14302 clk cpu0 R cpsr 820003c5 +14302 clk cpu0 R X8 00000000FFFFFFFF +14303 clk cpu0 IT (14267) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14303 clk cpu0 MW1 13000000:000013000000_NS 74 +14304 clk cpu0 IT (14268) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14304 clk cpu0 R X0 0000000000000072 +14305 clk cpu0 IT (14269) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14306 clk cpu0 IT (14270) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14306 clk cpu0 R cpsr 020003c5 +14306 clk cpu0 R X9 0000000000000072 +14307 clk cpu0 IS (14271) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14308 clk cpu0 IT (14272) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14308 clk cpu0 R cpsr 220003c5 +14309 clk cpu0 IS (14273) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14310 clk cpu0 IT (14274) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14310 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14310 clk cpu0 R X9 0000000013000000 +14311 clk cpu0 IT (14275) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14311 clk cpu0 R cpsr 620003c5 +14311 clk cpu0 R X8 0000000000000000 +14312 clk cpu0 IT (14276) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14312 clk cpu0 MW1 13000000:000013000000_NS 72 +14313 clk cpu0 IT (14277) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14313 clk cpu0 R X0 0000000000000000 +14314 clk cpu0 IS (14278) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14315 clk cpu0 IT (14279) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +14315 clk cpu0 MR8 0004ccd8:00001004ccd8_NS 69206c65_2e656361 +14315 clk cpu0 R X0 69206C652E656361 +14315 clk cpu0 R X28 000000000004CCD8 +14316 clk cpu0 IT (14280) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +14316 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +14316 clk cpu0 R X9 0000000000000000 +14317 clk cpu0 IT (14281) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +14317 clk cpu0 R X8 0000000000000000 +14318 clk cpu0 IT (14282) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +14318 clk cpu0 R X27 0000000000000008 +14319 clk cpu0 IT (14283) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +14319 clk cpu0 R cpsr 820003c5 +14320 clk cpu0 IT (14284) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +14321 clk cpu0 IT (14285) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +14321 clk cpu0 R X8 00000000FFFFFFF8 +14322 clk cpu0 IT (14286) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14322 clk cpu0 R cpsr 020003c5 +14322 clk cpu0 R X9 0000000000000061 +14323 clk cpu0 IS (14287) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14324 clk cpu0 IT (14288) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14324 clk cpu0 R cpsr 220003c5 +14325 clk cpu0 IS (14289) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14326 clk cpu0 IT (14290) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14326 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14326 clk cpu0 R X9 0000000013000000 +14327 clk cpu0 IT (14291) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14327 clk cpu0 R cpsr 820003c5 +14327 clk cpu0 R X8 00000000FFFFFFF9 +14328 clk cpu0 IT (14292) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14328 clk cpu0 MW1 13000000:000013000000_NS 61 +14329 clk cpu0 IT (14293) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14329 clk cpu0 R X0 0069206C652E6563 +14330 clk cpu0 IT (14294) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14331 clk cpu0 IT (14295) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14331 clk cpu0 R cpsr 020003c5 +14331 clk cpu0 R X9 0000000000000063 +14332 clk cpu0 IS (14296) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14333 clk cpu0 IT (14297) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14333 clk cpu0 R cpsr 220003c5 +14334 clk cpu0 IS (14298) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14335 clk cpu0 IT (14299) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14335 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14335 clk cpu0 R X9 0000000013000000 +14336 clk cpu0 IT (14300) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14336 clk cpu0 R cpsr 820003c5 +14336 clk cpu0 R X8 00000000FFFFFFFA +14337 clk cpu0 IT (14301) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14337 clk cpu0 MW1 13000000:000013000000_NS 63 +14338 clk cpu0 IT (14302) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14338 clk cpu0 R X0 000069206C652E65 +14339 clk cpu0 IT (14303) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14340 clk cpu0 IT (14304) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14340 clk cpu0 R cpsr 020003c5 +14340 clk cpu0 R X9 0000000000000065 +14341 clk cpu0 IS (14305) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14342 clk cpu0 IT (14306) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14342 clk cpu0 R cpsr 220003c5 +14343 clk cpu0 IS (14307) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14344 clk cpu0 IT (14308) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14344 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14344 clk cpu0 R X9 0000000013000000 +14345 clk cpu0 IT (14309) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14345 clk cpu0 R cpsr 820003c5 +14345 clk cpu0 R X8 00000000FFFFFFFB +14346 clk cpu0 IT (14310) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14346 clk cpu0 MW1 13000000:000013000000_NS 65 +14347 clk cpu0 IT (14311) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14347 clk cpu0 R X0 00000069206C652E +14348 clk cpu0 IT (14312) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14349 clk cpu0 IT (14313) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14349 clk cpu0 R cpsr 020003c5 +14349 clk cpu0 R X9 000000000000002E +14350 clk cpu0 IS (14314) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14351 clk cpu0 IT (14315) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14351 clk cpu0 R cpsr 220003c5 +14352 clk cpu0 IS (14316) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14353 clk cpu0 IT (14317) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14353 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14353 clk cpu0 R X9 0000000013000000 +14354 clk cpu0 IT (14318) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14354 clk cpu0 R cpsr 820003c5 +14354 clk cpu0 R X8 00000000FFFFFFFC +14355 clk cpu0 IT (14319) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14355 clk cpu0 MW1 13000000:000013000000_NS 2e +14356 clk cpu0 IT (14320) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14356 clk cpu0 R X0 0000000069206C65 +14357 clk cpu0 IT (14321) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14358 clk cpu0 IT (14322) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14358 clk cpu0 R cpsr 020003c5 +14358 clk cpu0 R X9 0000000000000065 +14359 clk cpu0 IS (14323) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14360 clk cpu0 IT (14324) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14360 clk cpu0 R cpsr 220003c5 +14361 clk cpu0 IS (14325) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14362 clk cpu0 IT (14326) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14362 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14362 clk cpu0 R X9 0000000013000000 +14363 clk cpu0 IT (14327) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14363 clk cpu0 R cpsr 820003c5 +14363 clk cpu0 R X8 00000000FFFFFFFD +14364 clk cpu0 IT (14328) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14364 clk cpu0 MW1 13000000:000013000000_NS 65 +14365 clk cpu0 IT (14329) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14365 clk cpu0 R X0 000000000069206C +14366 clk cpu0 IT (14330) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14367 clk cpu0 IT (14331) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14367 clk cpu0 R cpsr 020003c5 +14367 clk cpu0 R X9 000000000000006C +14368 clk cpu0 IS (14332) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14369 clk cpu0 IT (14333) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14369 clk cpu0 R cpsr 220003c5 +14370 clk cpu0 IS (14334) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14371 clk cpu0 IT (14335) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14371 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14371 clk cpu0 R X9 0000000013000000 +14372 clk cpu0 IT (14336) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14372 clk cpu0 R cpsr 820003c5 +14372 clk cpu0 R X8 00000000FFFFFFFE +14373 clk cpu0 IT (14337) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14373 clk cpu0 MW1 13000000:000013000000_NS 6c +14374 clk cpu0 IT (14338) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14374 clk cpu0 R X0 0000000000006920 +14375 clk cpu0 IT (14339) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14376 clk cpu0 IT (14340) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14376 clk cpu0 R cpsr 020003c5 +14376 clk cpu0 R X9 0000000000000020 +14377 clk cpu0 IS (14341) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14378 clk cpu0 IT (14342) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14378 clk cpu0 R cpsr 820003c5 +14379 clk cpu0 IS (14343) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14380 clk cpu0 IT (14344) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14380 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14380 clk cpu0 R X9 0000000013000000 +14381 clk cpu0 IT (14345) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14381 clk cpu0 R cpsr 820003c5 +14381 clk cpu0 R X8 00000000FFFFFFFF +14382 clk cpu0 IT (14346) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14382 clk cpu0 MW1 13000000:000013000000_NS 20 +14383 clk cpu0 IT (14347) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14383 clk cpu0 R X0 0000000000000069 +14384 clk cpu0 IT (14348) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14385 clk cpu0 IT (14349) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14385 clk cpu0 R cpsr 020003c5 +14385 clk cpu0 R X9 0000000000000069 +14386 clk cpu0 IS (14350) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14387 clk cpu0 IT (14351) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14387 clk cpu0 R cpsr 220003c5 +14388 clk cpu0 IS (14352) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14389 clk cpu0 IT (14353) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14389 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14389 clk cpu0 R X9 0000000013000000 +14390 clk cpu0 IT (14354) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14390 clk cpu0 R cpsr 620003c5 +14390 clk cpu0 R X8 0000000000000000 +14391 clk cpu0 IT (14355) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14391 clk cpu0 MW1 13000000:000013000000_NS 69 +14392 clk cpu0 IT (14356) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14392 clk cpu0 R X0 0000000000000000 +14393 clk cpu0 IS (14357) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14394 clk cpu0 IT (14358) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +14394 clk cpu0 MR8 0004cce0:00001004cce0_NS 2078253d_206f666e +14394 clk cpu0 R X0 2078253D206F666E +14394 clk cpu0 R X28 000000000004CCE0 +14395 clk cpu0 IT (14359) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +14395 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +14395 clk cpu0 R X9 0000000000000000 +14396 clk cpu0 IT (14360) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +14396 clk cpu0 R X8 0000000000000008 +14397 clk cpu0 IT (14361) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +14397 clk cpu0 R X27 0000000000000010 +14398 clk cpu0 IT (14362) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +14398 clk cpu0 R cpsr 820003c5 +14399 clk cpu0 IT (14363) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +14400 clk cpu0 IT (14364) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +14400 clk cpu0 R X8 00000000FFFFFFF8 +14401 clk cpu0 IT (14365) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14401 clk cpu0 R cpsr 020003c5 +14401 clk cpu0 R X9 000000000000006E +14402 clk cpu0 IS (14366) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14403 clk cpu0 IT (14367) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14403 clk cpu0 R cpsr 220003c5 +14404 clk cpu0 IS (14368) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14405 clk cpu0 IT (14369) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14405 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14405 clk cpu0 R X9 0000000013000000 +14406 clk cpu0 IT (14370) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14406 clk cpu0 R cpsr 820003c5 +14406 clk cpu0 R X8 00000000FFFFFFF9 +14407 clk cpu0 IT (14371) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14407 clk cpu0 MW1 13000000:000013000000_NS 6e +14408 clk cpu0 IT (14372) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14408 clk cpu0 R X0 002078253D206F66 +14409 clk cpu0 IT (14373) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14410 clk cpu0 IT (14374) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14410 clk cpu0 R cpsr 020003c5 +14410 clk cpu0 R X9 0000000000000066 +14411 clk cpu0 IS (14375) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14412 clk cpu0 IT (14376) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14412 clk cpu0 R cpsr 220003c5 +14413 clk cpu0 IS (14377) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14414 clk cpu0 IT (14378) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14414 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14414 clk cpu0 R X9 0000000013000000 +14415 clk cpu0 IT (14379) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14415 clk cpu0 R cpsr 820003c5 +14415 clk cpu0 R X8 00000000FFFFFFFA +14416 clk cpu0 IT (14380) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14416 clk cpu0 MW1 13000000:000013000000_NS 66 +14417 clk cpu0 IT (14381) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14417 clk cpu0 R X0 00002078253D206F +14418 clk cpu0 IT (14382) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14419 clk cpu0 IT (14383) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14419 clk cpu0 R cpsr 020003c5 +14419 clk cpu0 R X9 000000000000006F +14420 clk cpu0 IS (14384) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14421 clk cpu0 IT (14385) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14421 clk cpu0 R cpsr 220003c5 +14422 clk cpu0 IS (14386) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14423 clk cpu0 IT (14387) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14423 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14423 clk cpu0 R X9 0000000013000000 +14424 clk cpu0 IT (14388) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14424 clk cpu0 R cpsr 820003c5 +14424 clk cpu0 R X8 00000000FFFFFFFB +14425 clk cpu0 IT (14389) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14425 clk cpu0 MW1 13000000:000013000000_NS 6f +14426 clk cpu0 IT (14390) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14426 clk cpu0 R X0 0000002078253D20 +14427 clk cpu0 IT (14391) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14428 clk cpu0 IT (14392) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14428 clk cpu0 R cpsr 020003c5 +14428 clk cpu0 R X9 0000000000000020 +14429 clk cpu0 IS (14393) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14430 clk cpu0 IT (14394) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14430 clk cpu0 R cpsr 820003c5 +14431 clk cpu0 IS (14395) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14432 clk cpu0 IT (14396) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14432 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14432 clk cpu0 R X9 0000000013000000 +14433 clk cpu0 IT (14397) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14433 clk cpu0 R cpsr 820003c5 +14433 clk cpu0 R X8 00000000FFFFFFFC +14434 clk cpu0 IT (14398) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14434 clk cpu0 MW1 13000000:000013000000_NS 20 +14435 clk cpu0 IT (14399) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14435 clk cpu0 R X0 000000002078253D +14436 clk cpu0 IT (14400) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14437 clk cpu0 IT (14401) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14437 clk cpu0 R cpsr 020003c5 +14437 clk cpu0 R X9 000000000000003D +14438 clk cpu0 IS (14402) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14439 clk cpu0 IT (14403) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14439 clk cpu0 R cpsr 220003c5 +14440 clk cpu0 IS (14404) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14441 clk cpu0 IT (14405) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14441 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14441 clk cpu0 R X9 0000000013000000 +14442 clk cpu0 IT (14406) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14442 clk cpu0 R cpsr 820003c5 +14442 clk cpu0 R X8 00000000FFFFFFFD +14443 clk cpu0 IT (14407) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14443 clk cpu0 MW1 13000000:000013000000_NS 3d +14444 clk cpu0 IT (14408) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14444 clk cpu0 R X0 0000000000207825 +14445 clk cpu0 IT (14409) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14446 clk cpu0 IT (14410) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14446 clk cpu0 R cpsr 020003c5 +14446 clk cpu0 R X9 0000000000000025 +14447 clk cpu0 IS (14411) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14448 clk cpu0 IT (14412) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14448 clk cpu0 R cpsr 620003c5 +14449 clk cpu0 IT (14413) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14450 clk cpu0 IT (14414) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +14450 clk cpu0 R X8 000000000000000D +14451 clk cpu0 IT (14415) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +14451 clk cpu0 R X9 0000000000000014 +14452 clk cpu0 IT (14416) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +14452 clk cpu0 R X9 000000000004CCE4 +14453 clk cpu0 IT (14417) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +14453 clk cpu0 R cpsr 020003c5 +14454 clk cpu0 IT (14418) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +14454 clk cpu0 R X27 000000000004CCE4 +14455 clk cpu0 IT (14419) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +14455 clk cpu0 R X20 000000000004CCE5 +14456 clk cpu0 IT (14420) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +14457 clk cpu0 IT (14421) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14457 clk cpu0 MR1 0004cce5:00001004cce5_NS 25 +14457 clk cpu0 R X8 0000000000000025 +14458 clk cpu0 IT (14422) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14458 clk cpu0 R cpsr 620003c5 +14459 clk cpu0 IT (14423) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14460 clk cpu0 IT (14424) 00092c30:000010092c30_NS b90736bf O EL1h_n : STR wzr,[x21,#0x734] +14460 clk cpu0 MW4 03029734:000000829734_NS 00000000 +14461 clk cpu0 IT (14425) 00092c34:000010092c34_NS aa1403fb O EL1h_n : MOV x27,x20 +14461 clk cpu0 R X27 000000000004CCE5 +14462 clk cpu0 IT (14426) 00092c38:000010092c38_NS 38401f7c O EL1h_n : LDRB w28,[x27,#1]! +14462 clk cpu0 MR1 0004cce6:00001004cce6_NS 78 +14462 clk cpu0 R X27 000000000004CCE6 +14462 clk cpu0 R X28 0000000000000078 +14463 clk cpu0 IT (14427) 00092c3c:000010092c3c_NS 7100c39f O EL1h_n : CMP w28,#0x30 +14463 clk cpu0 R cpsr 220003c5 +14464 clk cpu0 IS (14428) 00092c40:000010092c40_NS 54000060 O EL1h_n : B.EQ 0x92c4c +14465 clk cpu0 IT (14429) 00092c44:000010092c44_NS 3500041c O EL1h_n : CBNZ w28,0x92cc4 +14466 clk cpu0 IT (14430) 00092cc4:000010092cc4_NS 51016388 O EL1h_n : SUB w8,w28,#0x58 +14466 clk cpu0 R X8 0000000000000020 +14467 clk cpu0 IT (14431) 00092cc8:000010092cc8_NS 7100811f O EL1h_n : CMP w8,#0x20 +14467 clk cpu0 R cpsr 620003c5 +14468 clk cpu0 IS (14432) 00092ccc:000010092ccc_NS 54000b48 O EL1h_n : B.HI 0x92e34 +14469 clk cpu0 IT (14433) 00092cd0:000010092cd0_NS 10000089 O EL1h_n : ADR x9,0x92ce0 +14469 clk cpu0 R X9 0000000000092CE0 +14470 clk cpu0 IT (14434) 00092cd4:000010092cd4_NS 38686aca O EL1h_n : LDRB w10,[x22,x8] +14470 clk cpu0 MR1 0004c128:00001004c128_NS 00 +14470 clk cpu0 R X10 0000000000000000 +14471 clk cpu0 IT (14435) 00092cd8:000010092cd8_NS 8b0a0929 O EL1h_n : ADD x9,x9,x10,LSL #2 +14471 clk cpu0 R X9 0000000000092CE0 +14472 clk cpu0 IT (14436) 00092cdc:000010092cdc_NS d61f0120 O EL1h_n : BR x9 +14472 clk cpu0 R cpsr 620007c5 +14473 clk cpu0 IT (14437) 00092ce0:000010092ce0_NS b9801a68 O EL1h_n : LDRSW x8,[x19,#0x18] +14473 clk cpu0 MR4 03700548:000000f00548_NS ffffffd0 +14473 clk cpu0 R cpsr 620003c5 +14473 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +14474 clk cpu0 IS (14438) 00092ce4:000010092ce4_NS 36f800a8 O EL1h_n : TBZ w8,#31,0x92cf8 +14475 clk cpu0 IT (14439) 00092ce8:000010092ce8_NS 11002109 O EL1h_n : ADD w9,w8,#8 +14475 clk cpu0 R X9 00000000FFFFFFD8 +14476 clk cpu0 IT (14440) 00092cec:000010092cec_NS 7100013f O EL1h_n : CMP w9,#0 +14476 clk cpu0 R cpsr a20003c5 +14477 clk cpu0 IT (14441) 00092cf0:000010092cf0_NS b9001a69 O EL1h_n : STR w9,[x19,#0x18] +14477 clk cpu0 MW4 03700548:000000f00548_NS ffffffd8 +14478 clk cpu0 IT (14442) 00092cf4:000010092cf4_NS 54000cad O EL1h_n : B.LE 0x92e88 +14479 clk cpu0 IT (14443) 00092e88:000010092e88_NS f9400669 O EL1h_n : LDR x9,[x19,#8] +14479 clk cpu0 MR8 03700538:000000f00538_NS 00000000_03700530 +14479 clk cpu0 R X9 0000000003700530 +14480 clk cpu0 IT (14444) 00092e8c:000010092e8c_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +14480 clk cpu0 R X8 0000000003700500 +14481 clk cpu0 IT (14445) 00092e90:000010092e90_NS 17ffff9d O EL1h_n : B 0x92d04 +14482 clk cpu0 IT (14446) 00092d04:000010092d04_NS f9400100 O EL1h_n : LDR x0,[x8,#0] +14482 clk cpu0 MR8 03700500:000000f00500_NS 00000000_00030001 +14482 clk cpu0 R X0 0000000000030001 +14483 clk cpu0 IT (14447) 00092d08:000010092d08_NS 52800201 O EL1h_n : MOV w1,#0x10 +14483 clk cpu0 R X1 0000000000000010 +14484 clk cpu0 IT (14448) 00092d0c:000010092d0c_NS 94000a58 O EL1h_n : BL 0x9566c +14484 clk cpu0 R X30 0000000000092D10 +14485 clk cpu0 IT (14449) 0009566c:00001009566c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +14485 clk cpu0 R SP_EL1 0000000003700440 +14486 clk cpu0 IT (14450) 00095670:000010095670_NS b204c7e8 O EL1h_n : ORR x8,xzr,#0x3030303030303030 +14486 clk cpu0 R X8 3030303030303030 +14487 clk cpu0 IT (14451) 00095674:000010095674_NS a900a3e8 O EL1h_n : STP x8,x8,[sp,#8] +14487 clk cpu0 MW8 03700448:000000f00448_NS 30303030_30303030 +14487 clk cpu0 MW8 03700450:000000f00450_NS 30303030_30303030 +14488 clk cpu0 IT (14452) 00095678:000010095678_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +14488 clk cpu0 MW4 03700458:000000f00458_NS 30303030 +14489 clk cpu0 IS (14453) 0009567c:00001009567c_NS b4000220 O EL1h_n : CBZ x0,0x956c0 +14490 clk cpu0 IT (14454) 00095680:000010095680_NS aa1f03eb O EL1h_n : MOV x11,xzr +14490 clk cpu0 R X11 0000000000000000 +14491 clk cpu0 IT (14455) 00095684:000010095684_NS 2a0103e8 O EL1h_n : MOV w8,w1 +14491 clk cpu0 R X8 0000000000000010 +14492 clk cpu0 IT (14456) 00095688:000010095688_NS 1103dc29 O EL1h_n : ADD w9,w1,#0xf7 +14492 clk cpu0 R X9 0000000000000107 +14493 clk cpu0 IT (14457) 0009568c:00001009568c_NS 910023ea O EL1h_n : ADD x10,sp,#8 +14493 clk cpu0 R X10 0000000003700448 +14494 clk cpu0 IT (14458) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +14494 clk cpu0 R X12 0000000000003000 +14495 clk cpu0 IT (14459) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +14495 clk cpu0 R X13 0000000000000001 +14496 clk cpu0 IT (14460) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +14496 clk cpu0 R cpsr 820003c5 +14497 clk cpu0 IT (14461) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +14497 clk cpu0 R X14 0000000000000000 +14498 clk cpu0 IT (14462) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +14498 clk cpu0 R X13 0000000000000001 +14499 clk cpu0 IT (14463) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +14499 clk cpu0 R X13 0000000000000031 +14500 clk cpu0 IT (14464) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +14500 clk cpu0 R cpsr 220003c5 +14501 clk cpu0 IT (14465) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +14501 clk cpu0 MW1 03700448:000000f00448_NS 31 +14502 clk cpu0 IT (14466) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +14502 clk cpu0 R X11 0000000000000001 +14503 clk cpu0 IT (14467) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +14503 clk cpu0 R X0 0000000000003000 +14504 clk cpu0 IT (14468) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +14505 clk cpu0 IT (14469) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +14505 clk cpu0 R X12 0000000000000300 +14506 clk cpu0 IT (14470) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +14506 clk cpu0 R X13 0000000000000000 +14507 clk cpu0 IT (14471) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +14507 clk cpu0 R cpsr 820003c5 +14508 clk cpu0 IT (14472) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +14508 clk cpu0 R X14 0000000000000000 +14509 clk cpu0 IT (14473) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +14509 clk cpu0 R X13 0000000000000000 +14510 clk cpu0 IT (14474) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +14510 clk cpu0 R X13 0000000000000030 +14511 clk cpu0 IT (14475) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +14511 clk cpu0 R cpsr 220003c5 +14512 clk cpu0 IT (14476) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +14512 clk cpu0 MW1 03700449:000000f00449_NS 30 +14513 clk cpu0 IT (14477) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +14513 clk cpu0 R X11 0000000000000002 +14514 clk cpu0 IT (14478) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +14514 clk cpu0 R X0 0000000000000300 +14515 clk cpu0 IT (14479) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +14516 clk cpu0 IT (14480) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +14516 clk cpu0 R X12 0000000000000030 +14517 clk cpu0 IT (14481) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +14517 clk cpu0 R X13 0000000000000000 +14518 clk cpu0 IT (14482) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +14518 clk cpu0 R cpsr 820003c5 +14519 clk cpu0 IT (14483) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +14519 clk cpu0 R X14 0000000000000000 +14520 clk cpu0 IT (14484) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +14520 clk cpu0 R X13 0000000000000000 +14521 clk cpu0 IT (14485) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +14521 clk cpu0 R X13 0000000000000030 +14522 clk cpu0 IT (14486) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +14522 clk cpu0 R cpsr 220003c5 +14523 clk cpu0 IT (14487) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +14523 clk cpu0 MW1 0370044a:000000f0044a_NS 30 +14524 clk cpu0 IT (14488) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +14524 clk cpu0 R X11 0000000000000003 +14525 clk cpu0 IT (14489) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +14525 clk cpu0 R X0 0000000000000030 +14526 clk cpu0 IT (14490) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +14527 clk cpu0 IT (14491) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +14527 clk cpu0 R X12 0000000000000003 +14528 clk cpu0 IT (14492) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +14528 clk cpu0 R X13 0000000000000000 +14529 clk cpu0 IT (14493) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +14529 clk cpu0 R cpsr 820003c5 +14530 clk cpu0 IT (14494) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +14530 clk cpu0 R X14 0000000000000000 +14531 clk cpu0 IT (14495) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +14531 clk cpu0 R X13 0000000000000000 +14532 clk cpu0 IT (14496) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +14532 clk cpu0 R X13 0000000000000030 +14533 clk cpu0 IT (14497) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +14533 clk cpu0 R cpsr 220003c5 +14534 clk cpu0 IT (14498) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +14534 clk cpu0 MW1 0370044b:000000f0044b_NS 30 +14535 clk cpu0 IT (14499) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +14535 clk cpu0 R X11 0000000000000004 +14536 clk cpu0 IT (14500) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +14536 clk cpu0 R X0 0000000000000003 +14537 clk cpu0 IT (14501) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +14538 clk cpu0 IT (14502) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +14538 clk cpu0 R X12 0000000000000000 +14539 clk cpu0 IT (14503) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +14539 clk cpu0 R X13 0000000000000003 +14540 clk cpu0 IT (14504) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +14540 clk cpu0 R cpsr 820003c5 +14541 clk cpu0 IT (14505) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +14541 clk cpu0 R X14 0000000000000000 +14542 clk cpu0 IT (14506) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +14542 clk cpu0 R X13 0000000000000003 +14543 clk cpu0 IT (14507) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +14543 clk cpu0 R X13 0000000000000033 +14544 clk cpu0 IT (14508) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +14544 clk cpu0 R cpsr 820003c5 +14545 clk cpu0 IT (14509) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +14545 clk cpu0 MW1 0370044c:000000f0044c_NS 33 +14546 clk cpu0 IT (14510) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +14546 clk cpu0 R X11 0000000000000005 +14547 clk cpu0 IT (14511) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +14547 clk cpu0 R X0 0000000000000000 +14548 clk cpu0 IS (14512) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +14549 clk cpu0 IT (14513) 000956bc:0000100956bc_NS 14000002 O EL1h_n : B 0x956c4 +14550 clk cpu0 IT (14514) 000956c4:0000100956c4_NS 90017ca8 O EL1h_n : ADRP x8,0x30296c4 +14550 clk cpu0 R X8 0000000003029000 +14551 clk cpu0 IT (14515) 000956c8:0000100956c8_NS b9473508 O EL1h_n : LDR w8,[x8,#0x734] +14551 clk cpu0 MR4 03029734:000000829734_NS 00000000 +14551 clk cpu0 R X8 0000000000000000 +14552 clk cpu0 IT (14516) 000956cc:0000100956cc_NS 6b0b011f O EL1h_n : CMP w8,w11 +14552 clk cpu0 R cpsr 820003c5 +14553 clk cpu0 IT (14517) 000956d0:0000100956d0_NS 1a8bc108 O EL1h_n : CSEL w8,w8,w11,GT +14553 clk cpu0 R X8 0000000000000005 +14554 clk cpu0 IT (14518) 000956d4:0000100956d4_NS 7100051f O EL1h_n : CMP w8,#1 +14554 clk cpu0 R cpsr 220003c5 +14555 clk cpu0 IS (14519) 000956d8:0000100956d8_NS 540001ab O EL1h_n : B.LT 0x9570c +14556 clk cpu0 IT (14520) 000956dc:0000100956dc_NS 910023e9 O EL1h_n : ADD x9,sp,#8 +14556 clk cpu0 R X9 0000000003700448 +14557 clk cpu0 IT (14521) 000956e0:0000100956e0_NS 93407d08 O EL1h_n : SXTW x8,w8 +14557 clk cpu0 R X8 0000000000000005 +14558 clk cpu0 IT (14522) 000956e4:0000100956e4_NS d1000529 O EL1h_n : SUB x9,x9,#1 +14558 clk cpu0 R X9 0000000003700447 +14559 clk cpu0 IT (14523) 000956e8:0000100956e8_NS b0030c0a O EL1h_n : ADRP x10,0x62166e8 +14559 clk cpu0 R X10 0000000006216000 +14560 clk cpu0 IT (14524) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +14560 clk cpu0 MR1 0370044c:000000f0044c_NS 33 +14560 clk cpu0 R X11 0000000000000033 +14561 clk cpu0 IT (14525) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +14561 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14561 clk cpu0 R X12 0000000013000000 +14562 clk cpu0 IT (14526) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +14562 clk cpu0 R X8 0000000000000004 +14563 clk cpu0 IT (14527) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +14563 clk cpu0 R cpsr 220003c5 +14564 clk cpu0 IT (14528) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +14564 clk cpu0 MW1 13000000:000013000000_NS 33 +14565 clk cpu0 IT (14529) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +14566 clk cpu0 IT (14530) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +14566 clk cpu0 MR1 0370044b:000000f0044b_NS 30 +14566 clk cpu0 R X11 0000000000000030 +14567 clk cpu0 IT (14531) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +14567 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14567 clk cpu0 R X12 0000000013000000 +14568 clk cpu0 IT (14532) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +14568 clk cpu0 R X8 0000000000000003 +14569 clk cpu0 IT (14533) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +14569 clk cpu0 R cpsr 220003c5 +14570 clk cpu0 IT (14534) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +14570 clk cpu0 MW1 13000000:000013000000_NS 30 +14571 clk cpu0 IT (14535) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +14572 clk cpu0 IT (14536) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +14572 clk cpu0 MR1 0370044a:000000f0044a_NS 30 +14572 clk cpu0 R X11 0000000000000030 +14573 clk cpu0 IT (14537) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +14573 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14573 clk cpu0 R X12 0000000013000000 +14574 clk cpu0 IT (14538) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +14574 clk cpu0 R X8 0000000000000002 +14575 clk cpu0 IT (14539) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +14575 clk cpu0 R cpsr 220003c5 +14576 clk cpu0 IT (14540) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +14576 clk cpu0 MW1 13000000:000013000000_NS 30 +14577 clk cpu0 IT (14541) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +14578 clk cpu0 IT (14542) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +14578 clk cpu0 MR1 03700449:000000f00449_NS 30 +14578 clk cpu0 R X11 0000000000000030 +14579 clk cpu0 IT (14543) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +14579 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14579 clk cpu0 R X12 0000000013000000 +14580 clk cpu0 IT (14544) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +14580 clk cpu0 R X8 0000000000000001 +14581 clk cpu0 IT (14545) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +14581 clk cpu0 R cpsr 220003c5 +14582 clk cpu0 IT (14546) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +14582 clk cpu0 MW1 13000000:000013000000_NS 30 +14583 clk cpu0 IT (14547) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +14584 clk cpu0 IT (14548) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +14584 clk cpu0 MR1 03700448:000000f00448_NS 31 +14584 clk cpu0 R X11 0000000000000031 +14585 clk cpu0 IT (14549) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +14585 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14585 clk cpu0 R X12 0000000013000000 +14586 clk cpu0 IT (14550) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +14586 clk cpu0 R X8 0000000000000000 +14587 clk cpu0 IT (14551) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +14587 clk cpu0 R cpsr 620003c5 +14588 clk cpu0 IT (14552) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +14588 clk cpu0 MW1 13000000:000013000000_NS 31 +14589 clk cpu0 IS (14553) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +14590 clk cpu0 IT (14554) 00095704:000010095704_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +14590 clk cpu0 R SP_EL1 0000000003700460 +14591 clk cpu0 IT (14555) 00095708:000010095708_NS d65f03c0 O EL1h_n : RET +14592 clk cpu0 IT (14556) 00092d10:000010092d10_NS 91000774 O EL1h_n : ADD x20,x27,#1 +14592 clk cpu0 R X20 000000000004CCE7 +14593 clk cpu0 IT (14557) 00092d14:000010092d14_NS 17ffffa8 O EL1h_n : B 0x92bb4 +14594 clk cpu0 IT (14558) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14594 clk cpu0 MR1 0004cce7:00001004cce7_NS 20 +14594 clk cpu0 R X8 0000000000000020 +14595 clk cpu0 IT (14559) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14595 clk cpu0 R cpsr 820003c5 +14596 clk cpu0 IS (14560) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14597 clk cpu0 IS (14561) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14598 clk cpu0 IT (14562) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14598 clk cpu0 R cpsr 020003c5 +14599 clk cpu0 IT (14563) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14600 clk cpu0 IT (14564) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14600 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14600 clk cpu0 R X9 0000000013000000 +14601 clk cpu0 IT (14565) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14601 clk cpu0 R X27 000000000004CCE7 +14602 clk cpu0 IT (14566) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14602 clk cpu0 R X20 000000000004CCE8 +14603 clk cpu0 IT (14567) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14603 clk cpu0 MW1 13000000:000013000000_NS 20 +14604 clk cpu0 IT (14568) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14604 clk cpu0 MR1 0004cce8:00001004cce8_NS 2c +14604 clk cpu0 R X8 000000000000002C +14605 clk cpu0 IT (14569) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14605 clk cpu0 R cpsr 220003c5 +14606 clk cpu0 IS (14570) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14607 clk cpu0 IS (14571) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14608 clk cpu0 IT (14572) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14608 clk cpu0 R cpsr 420003c5 +14609 clk cpu0 IS (14573) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14610 clk cpu0 IT (14574) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +14610 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +14610 clk cpu0 R X8 0000000000000000 +14611 clk cpu0 IT (14575) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +14611 clk cpu0 MR8 0004cce8:00001004cce8_NS 6c652072_7575632c +14611 clk cpu0 R X0 6C6520727575632C +14612 clk cpu0 IT (14576) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +14612 clk cpu0 R cpsr 820003c5 +14613 clk cpu0 IT (14577) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +14614 clk cpu0 IT (14578) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +14614 clk cpu0 R X27 0000000000000000 +14615 clk cpu0 IT (14579) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +14615 clk cpu0 R X28 000000000004CCE8 +14616 clk cpu0 IT (14580) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +14616 clk cpu0 R X8 00000000FFFFFFF8 +14617 clk cpu0 IT (14581) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14617 clk cpu0 R cpsr 020003c5 +14617 clk cpu0 R X9 000000000000002C +14618 clk cpu0 IS (14582) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14619 clk cpu0 IT (14583) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14619 clk cpu0 R cpsr 220003c5 +14620 clk cpu0 IS (14584) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14621 clk cpu0 IT (14585) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14621 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14621 clk cpu0 R X9 0000000013000000 +14622 clk cpu0 IT (14586) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14622 clk cpu0 R cpsr 820003c5 +14622 clk cpu0 R X8 00000000FFFFFFF9 +14623 clk cpu0 IT (14587) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14623 clk cpu0 MW1 13000000:000013000000_NS 2c +14624 clk cpu0 IT (14588) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14624 clk cpu0 R X0 006C652072757563 +14625 clk cpu0 IT (14589) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14626 clk cpu0 IT (14590) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14626 clk cpu0 R cpsr 020003c5 +14626 clk cpu0 R X9 0000000000000063 +14627 clk cpu0 IS (14591) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14628 clk cpu0 IT (14592) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14628 clk cpu0 R cpsr 220003c5 +14629 clk cpu0 IS (14593) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14630 clk cpu0 IT (14594) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14630 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14630 clk cpu0 R X9 0000000013000000 +14631 clk cpu0 IT (14595) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14631 clk cpu0 R cpsr 820003c5 +14631 clk cpu0 R X8 00000000FFFFFFFA +14632 clk cpu0 IT (14596) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14632 clk cpu0 MW1 13000000:000013000000_NS 63 +14633 clk cpu0 IT (14597) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14633 clk cpu0 R X0 00006C6520727575 +14634 clk cpu0 IT (14598) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14635 clk cpu0 IT (14599) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14635 clk cpu0 R cpsr 020003c5 +14635 clk cpu0 R X9 0000000000000075 +14636 clk cpu0 IS (14600) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14637 clk cpu0 IT (14601) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14637 clk cpu0 R cpsr 220003c5 +14638 clk cpu0 IS (14602) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14639 clk cpu0 IT (14603) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14639 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14639 clk cpu0 R X9 0000000013000000 +14640 clk cpu0 IT (14604) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14640 clk cpu0 R cpsr 820003c5 +14640 clk cpu0 R X8 00000000FFFFFFFB +14641 clk cpu0 IT (14605) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14641 clk cpu0 MW1 13000000:000013000000_NS 75 +14642 clk cpu0 IT (14606) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14642 clk cpu0 R X0 0000006C65207275 +14643 clk cpu0 IT (14607) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14644 clk cpu0 IT (14608) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14644 clk cpu0 R cpsr 020003c5 +14644 clk cpu0 R X9 0000000000000075 +14645 clk cpu0 IS (14609) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14646 clk cpu0 IT (14610) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14646 clk cpu0 R cpsr 220003c5 +14647 clk cpu0 IS (14611) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14648 clk cpu0 IT (14612) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14648 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14648 clk cpu0 R X9 0000000013000000 +14649 clk cpu0 IT (14613) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14649 clk cpu0 R cpsr 820003c5 +14649 clk cpu0 R X8 00000000FFFFFFFC +14650 clk cpu0 IT (14614) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14650 clk cpu0 MW1 13000000:000013000000_NS 75 +14651 clk cpu0 IT (14615) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14651 clk cpu0 R X0 000000006C652072 +14652 clk cpu0 IT (14616) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14653 clk cpu0 IT (14617) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14653 clk cpu0 R cpsr 020003c5 +14653 clk cpu0 R X9 0000000000000072 +14654 clk cpu0 IS (14618) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14655 clk cpu0 IT (14619) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14655 clk cpu0 R cpsr 220003c5 +14656 clk cpu0 IS (14620) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14657 clk cpu0 IT (14621) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14657 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14657 clk cpu0 R X9 0000000013000000 +14658 clk cpu0 IT (14622) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14658 clk cpu0 R cpsr 820003c5 +14658 clk cpu0 R X8 00000000FFFFFFFD +14659 clk cpu0 IT (14623) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14659 clk cpu0 MW1 13000000:000013000000_NS 72 +14660 clk cpu0 IT (14624) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14660 clk cpu0 R X0 00000000006C6520 +14661 clk cpu0 IT (14625) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14662 clk cpu0 IT (14626) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14662 clk cpu0 R cpsr 020003c5 +14662 clk cpu0 R X9 0000000000000020 +14663 clk cpu0 IS (14627) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14664 clk cpu0 IT (14628) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14664 clk cpu0 R cpsr 820003c5 +14665 clk cpu0 IS (14629) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14666 clk cpu0 IT (14630) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14666 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14666 clk cpu0 R X9 0000000013000000 +14667 clk cpu0 IT (14631) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14667 clk cpu0 R cpsr 820003c5 +14667 clk cpu0 R X8 00000000FFFFFFFE +14668 clk cpu0 IT (14632) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14668 clk cpu0 MW1 13000000:000013000000_NS 20 +14669 clk cpu0 IT (14633) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14669 clk cpu0 R X0 0000000000006C65 +14670 clk cpu0 IT (14634) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14671 clk cpu0 IT (14635) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14671 clk cpu0 R cpsr 020003c5 +14671 clk cpu0 R X9 0000000000000065 +14672 clk cpu0 IS (14636) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14673 clk cpu0 IT (14637) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14673 clk cpu0 R cpsr 220003c5 +14674 clk cpu0 IS (14638) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14675 clk cpu0 IT (14639) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14675 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14675 clk cpu0 R X9 0000000013000000 +14676 clk cpu0 IT (14640) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14676 clk cpu0 R cpsr 820003c5 +14676 clk cpu0 R X8 00000000FFFFFFFF +14677 clk cpu0 IT (14641) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14677 clk cpu0 MW1 13000000:000013000000_NS 65 +14678 clk cpu0 IT (14642) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14678 clk cpu0 R X0 000000000000006C +14679 clk cpu0 IT (14643) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14680 clk cpu0 IT (14644) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14680 clk cpu0 R cpsr 020003c5 +14680 clk cpu0 R X9 000000000000006C +14681 clk cpu0 IS (14645) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14682 clk cpu0 IT (14646) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14682 clk cpu0 R cpsr 220003c5 +14683 clk cpu0 IS (14647) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14684 clk cpu0 IT (14648) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14684 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14684 clk cpu0 R X9 0000000013000000 +14685 clk cpu0 IT (14649) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14685 clk cpu0 R cpsr 620003c5 +14685 clk cpu0 R X8 0000000000000000 +14686 clk cpu0 IT (14650) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14686 clk cpu0 MW1 13000000:000013000000_NS 6c +14687 clk cpu0 IT (14651) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14687 clk cpu0 R X0 0000000000000000 +14688 clk cpu0 IS (14652) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14689 clk cpu0 IT (14653) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +14689 clk cpu0 MR8 0004ccf0:00001004ccf0_NS 740a000a_78253d20 +14689 clk cpu0 R X0 740A000A78253D20 +14689 clk cpu0 R X28 000000000004CCF0 +14690 clk cpu0 IT (14654) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +14690 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +14690 clk cpu0 R X9 0000000000000000 +14691 clk cpu0 IT (14655) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +14691 clk cpu0 R X8 0000000000000000 +14692 clk cpu0 IT (14656) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +14692 clk cpu0 R X27 0000000000000008 +14693 clk cpu0 IT (14657) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +14693 clk cpu0 R cpsr 820003c5 +14694 clk cpu0 IT (14658) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +14695 clk cpu0 IT (14659) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +14695 clk cpu0 R X8 00000000FFFFFFF8 +14696 clk cpu0 IT (14660) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14696 clk cpu0 R cpsr 020003c5 +14696 clk cpu0 R X9 0000000000000020 +14697 clk cpu0 IS (14661) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14698 clk cpu0 IT (14662) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14698 clk cpu0 R cpsr 820003c5 +14699 clk cpu0 IS (14663) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14700 clk cpu0 IT (14664) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14700 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14700 clk cpu0 R X9 0000000013000000 +14701 clk cpu0 IT (14665) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14701 clk cpu0 R cpsr 820003c5 +14701 clk cpu0 R X8 00000000FFFFFFF9 +14702 clk cpu0 IT (14666) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14702 clk cpu0 MW1 13000000:000013000000_NS 20 +14703 clk cpu0 IT (14667) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14703 clk cpu0 R X0 00740A000A78253D +14704 clk cpu0 IT (14668) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14705 clk cpu0 IT (14669) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14705 clk cpu0 R cpsr 020003c5 +14705 clk cpu0 R X9 000000000000003D +14706 clk cpu0 IS (14670) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14707 clk cpu0 IT (14671) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14707 clk cpu0 R cpsr 220003c5 +14708 clk cpu0 IS (14672) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14709 clk cpu0 IT (14673) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14709 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14709 clk cpu0 R X9 0000000013000000 +14710 clk cpu0 IT (14674) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +14710 clk cpu0 R cpsr 820003c5 +14710 clk cpu0 R X8 00000000FFFFFFFA +14711 clk cpu0 IT (14675) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +14711 clk cpu0 MW1 13000000:000013000000_NS 3d +14712 clk cpu0 IT (14676) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +14712 clk cpu0 R X0 0000740A000A7825 +14713 clk cpu0 IT (14677) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +14714 clk cpu0 IT (14678) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +14714 clk cpu0 R cpsr 020003c5 +14714 clk cpu0 R X9 0000000000000025 +14715 clk cpu0 IS (14679) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +14716 clk cpu0 IT (14680) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +14716 clk cpu0 R cpsr 620003c5 +14717 clk cpu0 IT (14681) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +14718 clk cpu0 IT (14682) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +14718 clk cpu0 R X8 0000000000000002 +14719 clk cpu0 IT (14683) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +14719 clk cpu0 R X9 0000000000000009 +14720 clk cpu0 IT (14684) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +14720 clk cpu0 R X9 000000000004CCF1 +14721 clk cpu0 IT (14685) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +14721 clk cpu0 R cpsr 020003c5 +14722 clk cpu0 IT (14686) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +14722 clk cpu0 R X27 000000000004CCF1 +14723 clk cpu0 IT (14687) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +14723 clk cpu0 R X20 000000000004CCF2 +14724 clk cpu0 IT (14688) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +14725 clk cpu0 IT (14689) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14725 clk cpu0 MR1 0004ccf2:00001004ccf2_NS 25 +14725 clk cpu0 R X8 0000000000000025 +14726 clk cpu0 IT (14690) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14726 clk cpu0 R cpsr 620003c5 +14727 clk cpu0 IT (14691) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14728 clk cpu0 IT (14692) 00092c30:000010092c30_NS b90736bf O EL1h_n : STR wzr,[x21,#0x734] +14728 clk cpu0 MW4 03029734:000000829734_NS 00000000 +14729 clk cpu0 IT (14693) 00092c34:000010092c34_NS aa1403fb O EL1h_n : MOV x27,x20 +14729 clk cpu0 R X27 000000000004CCF2 +14730 clk cpu0 IT (14694) 00092c38:000010092c38_NS 38401f7c O EL1h_n : LDRB w28,[x27,#1]! +14730 clk cpu0 MR1 0004ccf3:00001004ccf3_NS 78 +14730 clk cpu0 R X27 000000000004CCF3 +14730 clk cpu0 R X28 0000000000000078 +14731 clk cpu0 IT (14695) 00092c3c:000010092c3c_NS 7100c39f O EL1h_n : CMP w28,#0x30 +14731 clk cpu0 R cpsr 220003c5 +14732 clk cpu0 IS (14696) 00092c40:000010092c40_NS 54000060 O EL1h_n : B.EQ 0x92c4c +14733 clk cpu0 IT (14697) 00092c44:000010092c44_NS 3500041c O EL1h_n : CBNZ w28,0x92cc4 +14734 clk cpu0 IT (14698) 00092cc4:000010092cc4_NS 51016388 O EL1h_n : SUB w8,w28,#0x58 +14734 clk cpu0 R X8 0000000000000020 +14735 clk cpu0 IT (14699) 00092cc8:000010092cc8_NS 7100811f O EL1h_n : CMP w8,#0x20 +14735 clk cpu0 R cpsr 620003c5 +14736 clk cpu0 IS (14700) 00092ccc:000010092ccc_NS 54000b48 O EL1h_n : B.HI 0x92e34 +14737 clk cpu0 IT (14701) 00092cd0:000010092cd0_NS 10000089 O EL1h_n : ADR x9,0x92ce0 +14737 clk cpu0 R X9 0000000000092CE0 +14738 clk cpu0 IT (14702) 00092cd4:000010092cd4_NS 38686aca O EL1h_n : LDRB w10,[x22,x8] +14738 clk cpu0 MR1 0004c128:00001004c128_NS 00 +14738 clk cpu0 R X10 0000000000000000 +14739 clk cpu0 IT (14703) 00092cd8:000010092cd8_NS 8b0a0929 O EL1h_n : ADD x9,x9,x10,LSL #2 +14739 clk cpu0 R X9 0000000000092CE0 +14740 clk cpu0 IT (14704) 00092cdc:000010092cdc_NS d61f0120 O EL1h_n : BR x9 +14740 clk cpu0 R cpsr 620007c5 +14741 clk cpu0 IT (14705) 00092ce0:000010092ce0_NS b9801a68 O EL1h_n : LDRSW x8,[x19,#0x18] +14741 clk cpu0 MR4 03700548:000000f00548_NS ffffffd8 +14741 clk cpu0 R cpsr 620003c5 +14741 clk cpu0 R X8 FFFFFFFFFFFFFFD8 +14742 clk cpu0 IS (14706) 00092ce4:000010092ce4_NS 36f800a8 O EL1h_n : TBZ w8,#31,0x92cf8 +14743 clk cpu0 IT (14707) 00092ce8:000010092ce8_NS 11002109 O EL1h_n : ADD w9,w8,#8 +14743 clk cpu0 R X9 00000000FFFFFFE0 +14744 clk cpu0 IT (14708) 00092cec:000010092cec_NS 7100013f O EL1h_n : CMP w9,#0 +14744 clk cpu0 R cpsr a20003c5 +14745 clk cpu0 IT (14709) 00092cf0:000010092cf0_NS b9001a69 O EL1h_n : STR w9,[x19,#0x18] +14745 clk cpu0 MW4 03700548:000000f00548_NS ffffffe0 +14746 clk cpu0 IT (14710) 00092cf4:000010092cf4_NS 54000cad O EL1h_n : B.LE 0x92e88 +14747 clk cpu0 IT (14711) 00092e88:000010092e88_NS f9400669 O EL1h_n : LDR x9,[x19,#8] +14747 clk cpu0 MR8 03700538:000000f00538_NS 00000000_03700530 +14747 clk cpu0 R X9 0000000003700530 +14748 clk cpu0 IT (14712) 00092e8c:000010092e8c_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +14748 clk cpu0 R X8 0000000003700508 +14749 clk cpu0 IT (14713) 00092e90:000010092e90_NS 17ffff9d O EL1h_n : B 0x92d04 +14750 clk cpu0 IT (14714) 00092d04:000010092d04_NS f9400100 O EL1h_n : LDR x0,[x8,#0] +14750 clk cpu0 MR8 03700508:000000f00508_NS 00000000_00000000 +14750 clk cpu0 R X0 0000000000000000 +14751 clk cpu0 IT (14715) 00092d08:000010092d08_NS 52800201 O EL1h_n : MOV w1,#0x10 +14751 clk cpu0 R X1 0000000000000010 +14752 clk cpu0 IT (14716) 00092d0c:000010092d0c_NS 94000a58 O EL1h_n : BL 0x9566c +14752 clk cpu0 R X30 0000000000092D10 +14753 clk cpu0 IT (14717) 0009566c:00001009566c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +14753 clk cpu0 R SP_EL1 0000000003700440 +14754 clk cpu0 IT (14718) 00095670:000010095670_NS b204c7e8 O EL1h_n : ORR x8,xzr,#0x3030303030303030 +14754 clk cpu0 R X8 3030303030303030 +14755 clk cpu0 IT (14719) 00095674:000010095674_NS a900a3e8 O EL1h_n : STP x8,x8,[sp,#8] +14755 clk cpu0 MW8 03700448:000000f00448_NS 30303030_30303030 +14755 clk cpu0 MW8 03700450:000000f00450_NS 30303030_30303030 +14756 clk cpu0 IT (14720) 00095678:000010095678_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +14756 clk cpu0 MW4 03700458:000000f00458_NS 30303030 +14757 clk cpu0 IT (14721) 0009567c:00001009567c_NS b4000220 O EL1h_n : CBZ x0,0x956c0 +14758 clk cpu0 IT (14722) 000956c0:0000100956c0_NS 2a1f03eb O EL1h_n : MOV w11,wzr +14758 clk cpu0 R X11 0000000000000000 +14759 clk cpu0 IT (14723) 000956c4:0000100956c4_NS 90017ca8 O EL1h_n : ADRP x8,0x30296c4 +14759 clk cpu0 R X8 0000000003029000 +14760 clk cpu0 IT (14724) 000956c8:0000100956c8_NS b9473508 O EL1h_n : LDR w8,[x8,#0x734] +14760 clk cpu0 MR4 03029734:000000829734_NS 00000000 +14760 clk cpu0 R X8 0000000000000000 +14761 clk cpu0 IT (14725) 000956cc:0000100956cc_NS 6b0b011f O EL1h_n : CMP w8,w11 +14761 clk cpu0 R cpsr 620003c5 +14762 clk cpu0 IT (14726) 000956d0:0000100956d0_NS 1a8bc108 O EL1h_n : CSEL w8,w8,w11,GT +14762 clk cpu0 R X8 0000000000000000 +14763 clk cpu0 IT (14727) 000956d4:0000100956d4_NS 7100051f O EL1h_n : CMP w8,#1 +14763 clk cpu0 R cpsr 820003c5 +14764 clk cpu0 IT (14728) 000956d8:0000100956d8_NS 540001ab O EL1h_n : B.LT 0x9570c +14765 clk cpu0 IT (14729) 0009570c:00001009570c_NS 910023e9 O EL1h_n : ADD x9,sp,#8 +14765 clk cpu0 R X9 0000000003700448 +14766 clk cpu0 IT (14730) 00095710:000010095710_NS b0030c0a O EL1h_n : ADRP x10,0x6216710 +14766 clk cpu0 R X10 0000000006216000 +14767 clk cpu0 IT (14731) 00095714:000010095714_NS 38684928 O EL1h_n : LDRB w8,[x9,w8,UXTW] +14767 clk cpu0 MR1 03700448:000000f00448_NS 30 +14767 clk cpu0 R X8 0000000000000030 +14768 clk cpu0 IT (14732) 00095718:000010095718_NS f9407149 O EL1h_n : LDR x9,[x10,#0xe0] +14768 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14768 clk cpu0 R X9 0000000013000000 +14769 clk cpu0 IT (14733) 0009571c:00001009571c_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14769 clk cpu0 MW1 13000000:000013000000_NS 30 +14770 clk cpu0 IT (14734) 00095720:000010095720_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +14770 clk cpu0 R SP_EL1 0000000003700460 +14771 clk cpu0 IT (14735) 00095724:000010095724_NS d65f03c0 O EL1h_n : RET +14772 clk cpu0 IT (14736) 00092d10:000010092d10_NS 91000774 O EL1h_n : ADD x20,x27,#1 +14772 clk cpu0 R X20 000000000004CCF4 +14773 clk cpu0 IT (14737) 00092d14:000010092d14_NS 17ffffa8 O EL1h_n : B 0x92bb4 +14774 clk cpu0 IT (14738) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14774 clk cpu0 MR1 0004ccf4:00001004ccf4_NS 0a +14774 clk cpu0 R X8 000000000000000A +14775 clk cpu0 IT (14739) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14775 clk cpu0 R cpsr 820003c5 +14776 clk cpu0 IS (14740) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14777 clk cpu0 IS (14741) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14778 clk cpu0 IT (14742) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +14778 clk cpu0 R cpsr 020003c5 +14779 clk cpu0 IT (14743) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +14780 clk cpu0 IT (14744) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +14780 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +14780 clk cpu0 R X9 0000000013000000 +14781 clk cpu0 IT (14745) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +14781 clk cpu0 R X27 000000000004CCF4 +14782 clk cpu0 IT (14746) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +14782 clk cpu0 R X20 000000000004CCF5 +TUBE CPU0: Enable tracetrace.el info =30001 ,cuur el =0 +14783 clk cpu0 IT (14747) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +14783 clk cpu0 MW1 13000000:000013000000_NS 0a +14784 clk cpu0 IT (14748) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +14784 clk cpu0 MR1 0004ccf5:00001004ccf5_NS 00 +14784 clk cpu0 R X8 0000000000000000 +14785 clk cpu0 IT (14749) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +14785 clk cpu0 R cpsr 820003c5 +14786 clk cpu0 IS (14750) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +14787 clk cpu0 IT (14751) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +14788 clk cpu0 IT (14752) 00092f98:000010092f98_NS d5033f9f O EL1h_n : DSB SY +14789 clk cpu0 IT (14753) 00092f9c:000010092f9c_NS a9497bf3 O EL1h_n : LDP x19,x30,[sp,#0x90] +14789 clk cpu0 MR8 037004f0:000000f004f0_NS 00000000_0004ccc9 +14789 clk cpu0 MR8 037004f8:000000f004f8_NS 00000000_0009c560 +14789 clk cpu0 R X19 000000000004CCC9 +14789 clk cpu0 R X30 000000000009C560 +14790 clk cpu0 IT (14754) 00092fa0:000010092fa0_NS a94853f5 O EL1h_n : LDP x21,x20,[sp,#0x80] +14790 clk cpu0 MR8 037004e0:000000f004e0_NS 00000000_00000000 +14790 clk cpu0 MR8 037004e8:000000f004e8_NS 00000000_03008528 +14790 clk cpu0 R X20 0000000003008528 +14790 clk cpu0 R X21 0000000000000000 +14791 clk cpu0 IT (14755) 00092fa4:000010092fa4_NS a9475bf7 O EL1h_n : LDP x23,x22,[sp,#0x70] +14791 clk cpu0 MR8 037004d0:000000f004d0_NS 00000000_00000000 +14791 clk cpu0 MR8 037004d8:000000f004d8_NS 00000000_90000000 +14791 clk cpu0 R X22 0000000090000000 +14791 clk cpu0 R X23 0000000000000000 +14792 clk cpu0 IT (14756) 00092fa8:000010092fa8_NS a94663f9 O EL1h_n : LDP x25,x24,[sp,#0x60] +14792 clk cpu0 MR8 037004c0:000000f004c0_NS 00000000_0000003c +14792 clk cpu0 MR8 037004c8:000000f004c8_NS 00000000_00007c00 +14792 clk cpu0 R X24 0000000000007C00 +14792 clk cpu0 R X25 000000000000003C +14793 clk cpu0 IT (14757) 00092fac:000010092fac_NS a9456bfb O EL1h_n : LDP x27,x26,[sp,#0x50] +14793 clk cpu0 MR8 037004b0:000000f004b0_NS 00010001_00010001 +14793 clk cpu0 MR8 037004b8:000000f004b8_NS ffe000ff_ffe000ff +14793 clk cpu0 R X26 FFE000FFFFE000FF +14793 clk cpu0 R X27 0001000100010001 +14794 clk cpu0 IT (14758) 00092fb0:000010092fb0_NS f94023fc O EL1h_n : LDR x28,[sp,#0x40] +14794 clk cpu0 MR8 037004a0:000000f004a0_NS ff7fff7f_ff7fff7f +14794 clk cpu0 R X28 FF7FFF7FFF7FFF7F +14795 clk cpu0 IT (14759) 00092fb4:000010092fb4_NS 910283ff O EL1h_n : ADD sp,sp,#0xa0 +14795 clk cpu0 R SP_EL1 0000000003700500 +14796 clk cpu0 IT (14760) 00092fb8:000010092fb8_NS d65f03c0 O EL1h_n : RET +14797 clk cpu0 IT (14761) 0009c560:00001009c560_NS 52800020 O EL1h_n : MOV w0,#1 +14797 clk cpu0 R X0 0000000000000001 +14798 clk cpu0 IT (14762) 0009c564:00001009c564_NS 2a1503e1 O EL1h_n : MOV w1,w21 +14798 clk cpu0 R X1 0000000000000000 +14799 clk cpu0 IT (14763) 0009c568:00001009c568_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +14799 clk cpu0 R X2 0000000000000000 +14800 clk cpu0 IT (14764) 0009c56c:00001009c56c_NS d503201f O EL1h_n : NOP +14801 clk cpu0 IT (14765) 0009c570:00001009c570_NS d5033f9f O EL1h_n : DSB SY +14802 clk cpu0 IT (14766) 0009c574:00001009c574_NS aa1403e0 O EL1h_n : MOV x0,x20 +14802 clk cpu0 R X0 0000000003008528 +14803 clk cpu0 IT (14767) 0009c578:00001009c578_NS 97fffd30 O EL1h_n : BL 0x9ba38 +14803 clk cpu0 R X30 000000000009C57C +14804 clk cpu0 IT (14768) 0009ba38:00001009ba38_NS d5033fbf O EL1h_n : DMB SY +14805 clk cpu0 IT (14769) 0009ba3c:00001009ba3c_NS f0030bc8 O EL1h_n : ADRP x8,0x6216a3c +14805 clk cpu0 R X8 0000000006216000 +14806 clk cpu0 IT (14770) 0009ba40:00001009ba40_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +14806 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +14806 clk cpu0 R X8 0000000000000001 +14807 clk cpu0 IT (14771) 0009ba44:00001009ba44_NS 7100091f O EL1h_n : CMP w8,#2 +14807 clk cpu0 R cpsr 820003c5 +14808 clk cpu0 IT (14772) 0009ba48:00001009ba48_NS 54000083 O EL1h_n : B.CC 0x9ba58 +14809 clk cpu0 IT (14773) 0009ba58:00001009ba58_NS d65f03c0 O EL1h_n : RET +14810 clk cpu0 IT (14774) 0009c57c:00001009c57c_NS a9487bf3 O EL1h_n : LDP x19,x30,[sp,#0x80] +14810 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +14810 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011490 +14810 clk cpu0 R X19 00000000062160A2 +14810 clk cpu0 R X30 0000000000011490 +14811 clk cpu0 IT (14775) 0009c580:00001009c580_NS a94753f5 O EL1h_n : LDP x21,x20,[sp,#0x70] +14811 clk cpu0 MR8 03700570:000000f00570_NS 00000000_02f00028 +14811 clk cpu0 MR8 03700578:000000f00578_NS ff83ff83_ff83ff83 +14811 clk cpu0 R X20 FF83FF83FF83FF83 +14811 clk cpu0 R X21 0000000002F00028 +14812 clk cpu0 IT (14776) 0009c584:00001009c584_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +14812 clk cpu0 R SP_EL1 0000000003700590 +14813 clk cpu0 IT (14777) 0009c588:00001009c588_NS d65f03c0 O EL1h_n : RET +14814 clk cpu0 IT (14778) 00011490:000010011490_NS b94047e8 O EL1h_n : LDR w8,[sp,#0x44] +14814 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +14814 clk cpu0 R X8 0000000000030001 +14815 clk cpu0 IT (14779) 00011494:000010011494_NS b9400fe9 O EL1h_n : LDR w9,[sp,#0xc] +14815 clk cpu0 MR4 0370059c:000000f0059c_NS 00000f00 +14815 clk cpu0 R X9 0000000000000F00 +14816 clk cpu0 IT (14780) 00011498:000010011498_NS 0a090108 O EL1h_n : AND w8,w8,w9 +14816 clk cpu0 R X8 0000000000000000 +14817 clk cpu0 IT (14781) 0001149c:00001001149c_NS b9400bea O EL1h_n : LDR w10,[sp,#8] +14817 clk cpu0 MR4 03700598:000000f00598_NS 00000008 +14817 clk cpu0 R X10 0000000000000008 +14818 clk cpu0 IT (14782) 000114a0:0000100114a0_NS 1aca2508 O EL1h_n : LSR w8,w8,w10 +14818 clk cpu0 R X8 0000000000000000 +14819 clk cpu0 IT (14783) 000114a4:0000100114a4_NS b9401beb O EL1h_n : LDR w11,[sp,#0x18] +14819 clk cpu0 MR4 037005a8:000000f005a8_NS 00000001 +14819 clk cpu0 R X11 0000000000000001 +14820 clk cpu0 IT (14784) 000114a8:0000100114a8_NS 0a280168 O EL1h_n : BIC w8,w11,w8 +14820 clk cpu0 R X8 0000000000000001 +14821 clk cpu0 IT (14785) 000114ac:0000100114ac_NS 2a0803f2 O EL1h_n : MOV w18,w8 +14821 clk cpu0 R X18 0000000000000001 +14822 clk cpu0 IT (14786) 000114b0:0000100114b0_NS d3407e52 O EL1h_n : UBFX x18,x18,#0,#32 +14822 clk cpu0 R X18 0000000000000001 +14823 clk cpu0 IT (14787) 000114b4:0000100114b4_NS f90033f2 O EL1h_n : STR x18,[sp,#0x60] +14823 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +14824 clk cpu0 IT (14788) 000114b8:0000100114b8_NS f94033f2 O EL1h_n : LDR x18,[sp,#0x60] +14824 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +14824 clk cpu0 R X18 0000000000000001 +14825 clk cpu0 IT (14789) 000114bc:0000100114bc_NS f9002ff2 O EL1h_n : STR x18,[sp,#0x58] +14825 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00000001 +14826 clk cpu0 IT (14790) 000114c0:0000100114c0_NS b9407be8 O EL1h_n : LDR w8,[sp,#0x78] +14826 clk cpu0 MR4 03700608:000000f00608_NS 00000001 +14826 clk cpu0 R X8 0000000000000001 +14827 clk cpu0 IT (14791) 000114c4:0000100114c4_NS 35000048 O EL1h_n : CBNZ w8,0x114cc +14828 clk cpu0 IT (14792) 000114cc:0000100114cc_NS f94037e8 O EL1h_n : LDR x8,[sp,#0x68] +14828 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +14828 clk cpu0 R X8 0000000000000000 +14829 clk cpu0 IT (14793) 000114d0:0000100114d0_NS f100091f O EL1h_n : CMP x8,#2 +14829 clk cpu0 R cpsr 820003c5 +14830 clk cpu0 IT (14794) 000114d4:0000100114d4_NS 1a9f17e9 O EL1h_n : CSET w9,EQ +14830 clk cpu0 R X9 0000000000000000 +14831 clk cpu0 IS (14795) 000114d8:0000100114d8_NS 37000049 O EL1h_n : TBNZ w9,#0,0x114e0 +14832 clk cpu0 IT (14796) 000114dc:0000100114dc_NS 14000003 O EL1h_n : B 0x114e8 +14833 clk cpu0 IT (14797) 000114e8:0000100114e8_NS d2800068 O EL1h_n : MOV x8,#3 +14833 clk cpu0 R X8 0000000000000003 +14834 clk cpu0 IT (14798) 000114ec:0000100114ec_NS f9002be8 O EL1h_n : STR x8,[sp,#0x50] +14834 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000003 +14835 clk cpu0 IT (14799) 000114f0:0000100114f0_NS b9407fe8 O EL1h_n : LDR w8,[sp,#0x7c] +14835 clk cpu0 MR4 0370060c:000000f0060c_NS 00000001 +14835 clk cpu0 R X8 0000000000000001 +14836 clk cpu0 IT (14800) 000114f4:0000100114f4_NS 35000048 O EL1h_n : CBNZ w8,0x114fc +14837 clk cpu0 IT (14801) 000114fc:0000100114fc_NS f94033e8 O EL1h_n : LDR x8,[sp,#0x60] +14837 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +14837 clk cpu0 R X8 0000000000000001 +14838 clk cpu0 IT (14802) 00011500:000010011500_NS b5000088 O EL1h_n : CBNZ x8,0x11510 +14839 clk cpu0 IT (14803) 00011510:000010011510_NS d2800068 O EL1h_n : MOV x8,#3 +14839 clk cpu0 R X8 0000000000000003 +14840 clk cpu0 IT (14804) 00011514:000010011514_NS f90027e8 O EL1h_n : STR x8,[sp,#0x48] +14840 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00000003 +14841 clk cpu0 IT (14805) 00011518:000010011518_NS b94077e8 O EL1h_n : LDR w8,[sp,#0x74] +14841 clk cpu0 MR4 03700604:000000f00604_NS 00000000 +14841 clk cpu0 R X8 0000000000000000 +14842 clk cpu0 IT (14806) 0001151c:00001001151c_NS f94033e9 O EL1h_n : LDR x9,[sp,#0x60] +14842 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +14842 clk cpu0 R X9 0000000000000001 +14843 clk cpu0 IT (14807) 00011520:000010011520_NS f100013f O EL1h_n : CMP x9,#0 +14843 clk cpu0 R cpsr 220003c5 +14844 clk cpu0 IT (14808) 00011524:000010011524_NS 1a9f17ea O EL1h_n : CSET w10,EQ +14844 clk cpu0 R X10 0000000000000000 +14845 clk cpu0 IT (14809) 00011528:000010011528_NS 5280002b O EL1h_n : MOV w11,#1 +14845 clk cpu0 R X11 0000000000000001 +14846 clk cpu0 IT (14810) 0001152c:00001001152c_NS 0a0b014a O EL1h_n : AND w10,w10,w11 +14846 clk cpu0 R X10 0000000000000000 +14847 clk cpu0 IT (14811) 00011530:000010011530_NS 0a0a0108 O EL1h_n : AND w8,w8,w10 +14847 clk cpu0 R X8 0000000000000000 +14848 clk cpu0 IS (14812) 00011534:000010011534_NS 35000048 O EL1h_n : CBNZ w8,0x1153c +14849 clk cpu0 IT (14813) 00011538:000010011538_NS 14000004 O EL1h_n : B 0x11548 +14850 clk cpu0 IT (14814) 00011548:000010011548_NS f94033e8 O EL1h_n : LDR x8,[sp,#0x60] +14850 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +14850 clk cpu0 R X8 0000000000000001 +14851 clk cpu0 IT (14815) 0001154c:00001001154c_NS f90003e8 O EL1h_n : STR x8,[sp,#0] +14851 clk cpu0 MW8 03700590:000000f00590_NS 00000000_00000001 +14852 clk cpu0 IT (14816) 00011550:000010011550_NS f94003e8 O EL1h_n : LDR x8,[sp,#0] +14852 clk cpu0 MR8 03700590:000000f00590_NS 00000000_00000001 +14852 clk cpu0 R X8 0000000000000001 +14853 clk cpu0 IT (14817) 00011554:000010011554_NS f90033e8 O EL1h_n : STR x8,[sp,#0x60] +14853 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +14854 clk cpu0 IT (14818) 00011558:000010011558_NS b9407fe9 O EL1h_n : LDR w9,[sp,#0x7c] +14854 clk cpu0 MR4 0370060c:000000f0060c_NS 00000001 +14854 clk cpu0 R X9 0000000000000001 +14855 clk cpu0 IT (14819) 0001155c:00001001155c_NS 35000049 O EL1h_n : CBNZ w9,0x11564 +14856 clk cpu0 IT (14820) 00011564:000010011564_NS f94027e8 O EL1h_n : LDR x8,[sp,#0x48] +14856 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00000003 +14856 clk cpu0 R X8 0000000000000003 +14857 clk cpu0 IT (14821) 00011568:000010011568_NS d2800309 O EL1h_n : MOV x9,#0x18 +14857 clk cpu0 R X9 0000000000000018 +14858 clk cpu0 IT (14822) 0001156c:00001001156c_NS 9ac92100 O EL1h_n : LSL x0,x8,x9 +14858 clk cpu0 R X0 0000000003000000 +14859 clk cpu0 IT (14823) 00011570:000010011570_NS f94037e2 O EL1h_n : LDR x2,[sp,#0x68] +14859 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +14859 clk cpu0 R X2 0000000000000000 +14860 clk cpu0 IT (14824) 00011574:000010011574_NS f94033e3 O EL1h_n : LDR x3,[sp,#0x60] +14860 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +14860 clk cpu0 R X3 0000000000000001 +14861 clk cpu0 IT (14825) 00011578:000010011578_NS d2a06001 O EL1h_n : MOV x1,#0x3000000 +14861 clk cpu0 R X1 0000000003000000 +14862 clk cpu0 IT (14826) 0001157c:00001001157c_NS 94025656 O EL1h_n : BL 0xa6ed4 +14862 clk cpu0 R X30 0000000000011580 +14862 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0177 INVAL 0x000010036ec0_NS +14862 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0177 ALLOC 0x0000100a6ec0_NS +14863 clk cpu0 IT (14827) 000a6ed4:0000100a6ed4_NS a9bf27e8 O EL1h_n : STP x8,x9,[sp,#-0x10]! +14863 clk cpu0 MW8 03700580:000000f00580_NS 00000000_00000003 +14863 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00000018 +14863 clk cpu0 R SP_EL1 0000000003700580 +14864 clk cpu0 IT (14828) 000a6ed8:0000100a6ed8_NS aa0103e8 O EL1h_n : MOV x8,x1 +14864 clk cpu0 R X8 0000000003000000 +14865 clk cpu0 IT (14829) 000a6edc:0000100a6edc_NS aa0303e9 O EL1h_n : MOV x9,x3 +14865 clk cpu0 R X9 0000000000000001 +14866 clk cpu0 IT (14830) 000a6ee0:0000100a6ee0_NS f1000c5f O EL1h_n : CMP x2,#3 +14866 clk cpu0 R cpsr 820003c5 +14867 clk cpu0 IT (14831) 000a6ee4:0000100a6ee4_NS 540001eb O EL1h_n : B.LT 0xa6f20 +14868 clk cpu0 IT (14832) 000a6f20:0000100a6f20_NS f100045f O EL1h_n : CMP x2,#1 +14868 clk cpu0 R cpsr 820003c5 +14869 clk cpu0 IT (14833) 000a6f24:0000100a6f24_NS 540000eb O EL1h_n : B.LT 0xa6f40 +14869 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017a INVAL 0x000010092f40_NS +14869 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017a ALLOC 0x0000100a6f40_NS +14870 clk cpu0 IT (14834) 000a6f40:0000100a6f40_NS aa0003e1 O EL1h_n : MOV x1,x0 +14870 clk cpu0 R X1 0000000003000000 +14871 clk cpu0 IT (14835) 000a6f44:0000100a6f44_NS d28000e0 O EL1h_n : MOV x0,#7 +14871 clk cpu0 R X0 0000000000000007 +14872 clk cpu0 IT (14836) 000a6f48:0000100a6f48_NS 32120000 O EL1h_n : ORR w0,w0,#0x4000 +14872 clk cpu0 R X0 0000000000004007 +14873 clk cpu0 IT (14837) 000a6f4c:0000100a6f4c_NS f2a004c0 O EL1h_n : MOVK x0,#0x26,LSL #16 +14873 clk cpu0 R X0 0000000000264007 +14874 clk cpu0 IT (14838) 000a6f50:0000100a6f50_NS d40000e1 O EL1h_n : SVC #7 +14874 clk cpu0 E 000a6f50:0000100a6f50_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +14874 clk cpu0 R cpsr 820003c5 +14874 clk cpu0 R PMBIDR_EL1 00000030 +14874 clk cpu0 R ESR_EL1 56000007 +14874 clk cpu0 R SPSR_EL1 820003c5 +14874 clk cpu0 R TRBIDR_EL1 000000000000002b +14874 clk cpu0 R ELR_EL1 00000000000a6f54 +14875 clk cpu0 IT (14839) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +14875 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 INVAL 0x00001009d800_NS +14875 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x000010035800_NS +14876 clk cpu0 IT (14840) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +14876 clk cpu0 R SP_EL1 0000000003700480 +14877 clk cpu0 IT (14841) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +14877 clk cpu0 MW8 03700480:000000f00480_NS 00000000_00264007 +14877 clk cpu0 MW8 03700488:000000f00488_NS 00000000_03000000 +14878 clk cpu0 IT (14842) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +14878 clk cpu0 R X0 0000000056000007 +14879 clk cpu0 IT (14843) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +14879 clk cpu0 R X1 0000000000000015 +14880 clk cpu0 IT (14844) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +14880 clk cpu0 R cpsr 620003c5 +14881 clk cpu0 IT (14845) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +14882 clk cpu0 IT (14846) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +14882 clk cpu0 R X1 0000000000000007 +14883 clk cpu0 IT (14847) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +14883 clk cpu0 R cpsr 220003c5 +14884 clk cpu0 IS (14848) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +14885 clk cpu0 IT (14849) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +14885 clk cpu0 R cpsr 820003c5 +14886 clk cpu0 IS (14850) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +14887 clk cpu0 IT (14851) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +14887 clk cpu0 R cpsr 820003c5 +14888 clk cpu0 IS (14852) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +14889 clk cpu0 IT (14853) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +14889 clk cpu0 R cpsr 620003c5 +14890 clk cpu0 IT (14854) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +14891 clk cpu0 IT (14855) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +14891 clk cpu0 MR8 03700480:000000f00480_NS 00000000_00264007 +14891 clk cpu0 MR8 03700488:000000f00488_NS 00000000_03000000 +14891 clk cpu0 R X0 0000000000264007 +14891 clk cpu0 R X1 0000000003000000 +14892 clk cpu0 IT (14856) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +14892 clk cpu0 R SP_EL1 0000000003700580 +14893 clk cpu0 IT (14857) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +14893 clk cpu0 R cpsr 220003c5 +14894 clk cpu0 IT (14858) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +14895 clk cpu0 IT (14859) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +14895 clk cpu0 MW8 03700570:000000f00570_NS 00000000_030293f0 +14895 clk cpu0 MW8 03700578:000000f00578_NS f800f800_f800f800 +14895 clk cpu0 R SP_EL1 0000000003700570 +14896 clk cpu0 IT (14860) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +14896 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00264007 +14896 clk cpu0 MW8 03700568:000000f00568_NS 00000000_03000000 +14896 clk cpu0 R SP_EL1 0000000003700560 +14897 clk cpu0 IT (14861) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +14897 clk cpu0 R X5 0000000000000000 +14898 clk cpu0 IT (14862) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +14898 clk cpu0 R X1 0000000000000000 +14899 clk cpu0 IT (14863) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +14899 clk cpu0 R cpsr 820003c5 +14900 clk cpu0 IT (14864) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +14900 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00264007 +14900 clk cpu0 MR8 03700568:000000f00568_NS 00000000_03000000 +14900 clk cpu0 R SP_EL1 0000000003700570 +14900 clk cpu0 R X0 0000000000264007 +14900 clk cpu0 R X1 0000000003000000 +14901 clk cpu0 IT (14865) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +14902 clk cpu0 IT (14866) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +14902 clk cpu0 MW8 03700560:000000f00560_NS 00000000_90000000 +14902 clk cpu0 MW8 03700568:000000f00568_NS 03ff8000_03ff8000 +14902 clk cpu0 R SP_EL1 0000000003700560 +14903 clk cpu0 IT (14867) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +14903 clk cpu0 R X6 0000000000000000 +14904 clk cpu0 IT (14868) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +14904 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +14904 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000001 +14904 clk cpu0 R SP_EL1 0000000003700550 +14905 clk cpu0 IT (14869) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +14905 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +14905 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011580 +14905 clk cpu0 R SP_EL1 0000000003700540 +14906 clk cpu0 IT (14870) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +14906 clk cpu0 R X3 0000000000000001 +14907 clk cpu0 IT (14871) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +14907 clk cpu0 R cpsr 620003c5 +14908 clk cpu0 IT (14872) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +14909 clk cpu0 IT (14873) 00035944:000010035944_NS 580557e2 O EL1h_n : LDR x2,0x40440 +14909 clk cpu0 MR8 00040440:000010040440_NS 00000000_00035e90 +14909 clk cpu0 R X2 0000000000035E90 +14910 clk cpu0 IT (14874) 00035948:000010035948_NS 53107c03 O EL1h_n : LSR w3,w0,#16 +14910 clk cpu0 R X3 0000000000000026 +14911 clk cpu0 IT (14875) 0003594c:00001003594c_NS 12003c63 O EL1h_n : AND w3,w3,#0xffff +14911 clk cpu0 R X3 0000000000000026 +14912 clk cpu0 IT (14876) 00035950:000010035950_NS d37df063 O EL1h_n : LSL x3,x3,#3 +14912 clk cpu0 R X3 0000000000000130 +14913 clk cpu0 IT (14877) 00035954:000010035954_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +14913 clk cpu0 R X2 0000000000035FC0 +14914 clk cpu0 IT (14878) 00035958:000010035958_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +14914 clk cpu0 MR8 00035fc0:000010035fc0_NS 00000000_000380c8 +14914 clk cpu0 R X4 00000000000380C8 +14915 clk cpu0 IT (14879) 0003595c:00001003595c_NS d63f0080 O EL1h_n : BLR x4 +14915 clk cpu0 R cpsr 62000bc5 +14915 clk cpu0 R X30 0000000000035960 +14916 clk cpu0 IT (14880) 000380c8:0000100380c8_NS d40000e3 O EL1h_n : SMC #7 +14916 clk cpu0 E 000380c8:0000100380c8_NS EL3h 00000019 CoreEvent_ModeChange +14916 clk cpu0 E 000380c8:0000100380c8_NS 00000088 CoreEvent_LOWER_64_SYNC +14916 clk cpu0 R cpsr 620003cd +14916 clk cpu0 R DBGDSCRext 00020000 +14916 clk cpu0 R PMBIDR_EL1 00000020 +14916 clk cpu0 R ESR_EL3 5e000007 +14916 clk cpu0 R SPSR_EL3 62000bc5 +14916 clk cpu0 R TRBIDR_EL1 000000000000002b +14916 clk cpu0 R ELR_EL3 00000000000380cc +14916 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +14916 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +14917 clk cpu0 IT (14881) 00012400:000010012400 14000c92 O EL3h_s : B 0x15648 +14917 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b2 INVAL 0x000010095640_NS +14917 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b2 ALLOC 0x000010015640 +14918 clk cpu0 IT (14882) 00015648:000010015648 d10403ff O EL3h_s : SUB sp,sp,#0x100 +14918 clk cpu0 R SP_EL3 000000000384C400 +14919 clk cpu0 IT (14883) 0001564c:00001001564c a90007e0 O EL3h_s : STP x0,x1,[sp,#0] +14919 clk cpu0 MW8 0384c400:00001084c400_NS 00000000_00264007 +14919 clk cpu0 MW8 0384c408:00001084c408_NS 00000000_03000000 +14919 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0020 INVAL 0x000016290400_NS +14919 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0020 ALLOC 0x00001084c400_NS +14919 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1101 CLEAN 0x00001084c400_NS +14919 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1101 INVAL 0x00001084c400_NS +14920 clk cpu0 IT (14884) 00015650:000010015650 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +14920 clk cpu0 R X0 000000005E000007 +14921 clk cpu0 IT (14885) 00015654:000010015654 531a7c01 O EL3h_s : LSR w1,w0,#26 +14921 clk cpu0 R X1 0000000000000017 +14922 clk cpu0 IT (14886) 00015658:000010015658 7100543f O EL3h_s : CMP w1,#0x15 +14922 clk cpu0 R cpsr 220003cd +14923 clk cpu0 IS (14887) 0001565c:00001001565c 540005e0 O EL3h_s : B.EQ 0x15718 +14924 clk cpu0 IT (14888) 00015660:000010015660 7100583f O EL3h_s : CMP w1,#0x16 +14924 clk cpu0 R cpsr 220003cd +14925 clk cpu0 IS (14889) 00015664:000010015664 54000360 O EL3h_s : B.EQ 0x156d0 +14926 clk cpu0 IT (14890) 00015668:000010015668 71005c3f O EL3h_s : CMP w1,#0x17 +14926 clk cpu0 R cpsr 620003cd +14927 clk cpu0 IT (14891) 0001566c:00001001566c 540000e0 O EL3h_s : B.EQ 0x15688 +14928 clk cpu0 IT (14892) 00015688:000010015688 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +14928 clk cpu0 R X0 000000005E000007 +14929 clk cpu0 IT (14893) 0001568c:00001001568c 53003c01 O EL3h_s : UXTH w1,w0 +14929 clk cpu0 R X1 0000000000000007 +14930 clk cpu0 IT (14894) 00015690:000010015690 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +14930 clk cpu0 R X0 000000005E000007 +14931 clk cpu0 IT (14895) 00015694:000010015694 7100143f O EL3h_s : CMP w1,#5 +14931 clk cpu0 R cpsr 220003cd +14932 clk cpu0 IS (14896) 00015698:000010015698 5400b46b O EL3h_s : B.LT 0x16d24 +14933 clk cpu0 IT (14897) 0001569c:00001001569c 7100283f O EL3h_s : CMP w1,#0xa +14933 clk cpu0 R cpsr 820003cd +14934 clk cpu0 IS (14898) 000156a0:0000100156a0 5400b42c O EL3h_s : B.GT 0x16d24 +14935 clk cpu0 IT (14899) 000156a4:0000100156a4 71001c3f O EL3h_s : CMP w1,#7 +14935 clk cpu0 R cpsr 620003cd +14936 clk cpu0 IT (14900) 000156a8:0000100156a8 540005c0 O EL3h_s : B.EQ 0x15760 +14937 clk cpu0 IT (14901) 00015760:000010015760 a94007e0 O EL3h_s : LDP x0,x1,[sp,#0] +14937 clk cpu0 MR8 0384c400:00001084c400_NS 00000000_00264007 +14937 clk cpu0 MR8 0384c408:00001084c408_NS 00000000_03000000 +14937 clk cpu0 R X0 0000000000264007 +14937 clk cpu0 R X1 0000000003000000 +14938 clk cpu0 IT (14902) 00015764:000010015764 910403ff O EL3h_s : ADD sp,sp,#0x100 +14938 clk cpu0 R SP_EL3 000000000384C500 +14939 clk cpu0 IT (14903) 00015768:000010015768 f103bc3f O EL3h_s : CMP x1,#0xef +14939 clk cpu0 R cpsr 220003cd +14940 clk cpu0 IT (14904) 0001576c:00001001576c 54000061 O EL3h_s : B.NE 0x15778 +14941 clk cpu0 IT (14905) 00015778:000010015778 a9bf17e4 O EL3h_s : STP x4,x5,[sp,#-0x10]! +14941 clk cpu0 MW8 0384c4f0:00001084c4f0_NS 00000000_000380c8 +14941 clk cpu0 MW8 0384c4f8:00001084c4f8_NS 00000000_00000000 +14941 clk cpu0 R SP_EL3 000000000384C4F0 +14942 clk cpu0 IT (14906) 0001577c:00001001577c a9bf07e0 O EL3h_s : STP x0,x1,[sp,#-0x10]! +14942 clk cpu0 MW8 0384c4e0:00001084c4e0_NS 00000000_00264007 +14942 clk cpu0 MW8 0384c4e8:00001084c4e8_NS 00000000_03000000 +14942 clk cpu0 R SP_EL3 000000000384C4E0 +14943 clk cpu0 IT (14907) 00015780:000010015780 d2800005 O EL3h_s : MOV x5,#0 +14943 clk cpu0 R X5 0000000000000000 +14944 clk cpu0 IT (14908) 00015784:000010015784 d34d3401 O EL3h_s : UBFIZ x1,x0,#51,#14 +14944 clk cpu0 R X1 0000000000000000 +14945 clk cpu0 IT (14909) 00015788:000010015788 f100043f O EL3h_s : CMP x1,#1 +14945 clk cpu0 R cpsr 820003cd +14946 clk cpu0 IT (14910) 0001578c:00001001578c a8c107e0 O EL3h_s : LDP x0,x1,[sp],#0x10 +14946 clk cpu0 MR8 0384c4e0:00001084c4e0_NS 00000000_00264007 +14946 clk cpu0 MR8 0384c4e8:00001084c4e8_NS 00000000_03000000 +14946 clk cpu0 R SP_EL3 000000000384C4F0 +14946 clk cpu0 R X0 0000000000264007 +14946 clk cpu0 R X1 0000000003000000 +14947 clk cpu0 IT (14911) 00015790:000010015790 540003a1 O EL3h_s : B.NE 0x15804 +14947 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 INVAL 0x000010035800_NS +14947 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x000010015800 +14948 clk cpu0 IT (14912) 00015804:000010015804 a9bf0fe2 O EL3h_s : STP x2,x3,[sp,#-0x10]! +14948 clk cpu0 MW8 0384c4e0:00001084c4e0_NS 00000000_00035fc0 +14948 clk cpu0 MW8 0384c4e8:00001084c4e8_NS 00000000_00000130 +14948 clk cpu0 R SP_EL3 000000000384C4E0 +14949 clk cpu0 IT (14913) 00015808:000010015808 a9bf7bfd O EL3h_s : STP x29,x30,[sp,#-0x10]! +14949 clk cpu0 MW8 0384c4d0:00001084c4d0_NS ffffffff_fe00000f +14949 clk cpu0 MW8 0384c4d8:00001084c4d8_NS 00000000_00035960 +14949 clk cpu0 R SP_EL3 000000000384C4D0 +14950 clk cpu0 IT (14914) 0001580c:00001001580c 530e3803 O EL3h_s : UBFIZ w3,w0,#18,#15 +14950 clk cpu0 R X3 0000000000000001 +14951 clk cpu0 IT (14915) 00015810:000010015810 7100047f O EL3h_s : CMP w3,#1 +14951 clk cpu0 R cpsr 620003cd +14952 clk cpu0 IT (14916) 00015814:000010015814 54000180 O EL3h_s : B.EQ 0x15844 +14952 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 INVAL 0x00001009d840_NS +14952 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 ALLOC 0x000010015840 +14953 clk cpu0 IT (14917) 00015844:000010015844 580177a2 O EL3h_s : LDR x2,0x18738 +14953 clk cpu0 MR8 00018738:000010018738 00000000_00015d90 +14953 clk cpu0 R X2 0000000000015D90 +14954 clk cpu0 IT (14918) 00015848:000010015848 53107c03 O EL3h_s : LSR w3,w0,#16 +14954 clk cpu0 R X3 0000000000000026 +14955 clk cpu0 IT (14919) 0001584c:00001001584c 12003c63 O EL3h_s : AND w3,w3,#0xffff +14955 clk cpu0 R X3 0000000000000026 +14956 clk cpu0 IT (14920) 00015850:000010015850 d37df063 O EL3h_s : LSL x3,x3,#3 +14956 clk cpu0 R X3 0000000000000130 +14957 clk cpu0 IT (14921) 00015854:000010015854 8b030042 O EL3h_s : ADD x2,x2,x3 +14957 clk cpu0 R X2 0000000000015EC0 +14958 clk cpu0 IT (14922) 00015858:000010015858 f9400044 O EL3h_s : LDR x4,[x2,#0] +14958 clk cpu0 MR8 00015ec0:000010015ec0 00000000_00016b00 +14958 clk cpu0 R X4 0000000000016B00 +14959 clk cpu0 IT (14923) 0001585c:00001001585c d63f0080 O EL3h_s : BLR x4 +14959 clk cpu0 R cpsr 62000bcd +14959 clk cpu0 R X30 0000000000015860 +14960 clk cpu0 IT (14924) 00016b00:000010016b00 d53e1322 O EL3h_s : MRS x2,MDCR_EL3 +14960 clk cpu0 R cpsr 620003cd +14960 clk cpu0 R X2 0000000013040000 +14961 clk cpu0 IT (14925) 00016b04:000010016b04 8a080021 O EL3h_s : AND x1,x1,x8 +14961 clk cpu0 R X1 0000000003000000 +14962 clk cpu0 IT (14926) 00016b08:000010016b08 8a280042 O EL3h_s : BIC x2,x2,x8 +14962 clk cpu0 R X2 0000000010040000 +14963 clk cpu0 IT (14927) 00016b0c:000010016b0c aa020021 O EL3h_s : ORR x1,x1,x2 +14963 clk cpu0 R X1 0000000013040000 +14964 clk cpu0 IT (14928) 00016b10:000010016b10 a9bf7bfd O EL3h_s : STP x29,x30,[sp,#-0x10]! +14964 clk cpu0 MW8 0384c4c0:00001084c4c0_NS ffffffff_fe00000f +14964 clk cpu0 MW8 0384c4c8:00001084c4c8_NS 00000000_00015860 +14964 clk cpu0 R SP_EL3 000000000384C4C0 +14965 clk cpu0 IT (14929) 00016b14:000010016b14 a9bf07e0 O EL3h_s : STP x0,x1,[sp,#-0x10]! +14965 clk cpu0 MW8 0384c4b0:00001084c4b0_NS 00000000_00264007 +14965 clk cpu0 MW8 0384c4b8:00001084c4b8_NS 00000000_13040000 +14965 clk cpu0 R SP_EL3 000000000384C4B0 +14966 clk cpu0 IT (14930) 00016b18:000010016b18 d503201f O EL3h_s : NOP +14967 clk cpu0 IT (14931) 00016b1c:000010016b1c a8c107e0 O EL3h_s : LDP x0,x1,[sp],#0x10 +14967 clk cpu0 MR8 0384c4b0:00001084c4b0_NS 00000000_00264007 +14967 clk cpu0 MR8 0384c4b8:00001084c4b8_NS 00000000_13040000 +14967 clk cpu0 R SP_EL3 000000000384C4C0 +14967 clk cpu0 R X0 0000000000264007 +14967 clk cpu0 R X1 0000000013040000 +14968 clk cpu0 IT (14932) 00016b20:000010016b20 d51e1321 O EL3h_s : MSR MDCR_EL3,x1 +14968 clk cpu0 R MDCR_EL3 00000000:13040000 +14969 clk cpu0 IT (14933) 00016b24:000010016b24 d5033fdf O EL3h_s : ISB +14969 clk cpu0 R PMBIDR_EL1 00000020 +14969 clk cpu0 R TRBIDR_EL1 000000000000002b +14970 clk cpu0 IT (14934) 00016b28:000010016b28 d503201f O EL3h_s : NOP +14971 clk cpu0 IT (14935) 00016b2c:000010016b2c a8c17bfd O EL3h_s : LDP x29,x30,[sp],#0x10 +14971 clk cpu0 MR8 0384c4c0:00001084c4c0_NS ffffffff_fe00000f +14971 clk cpu0 MR8 0384c4c8:00001084c4c8_NS 00000000_00015860 +14971 clk cpu0 R SP_EL3 000000000384C4D0 +14971 clk cpu0 R X29 FFFFFFFFFE00000F +14971 clk cpu0 R X30 0000000000015860 +14972 clk cpu0 IT (14936) 00016b30:000010016b30 d65f03c0 O EL3h_s : RET +14973 clk cpu0 IT (14937) 00015860:000010015860 a8c17bfd O EL3h_s : LDP x29,x30,[sp],#0x10 +14973 clk cpu0 MR8 0384c4d0:00001084c4d0_NS ffffffff_fe00000f +14973 clk cpu0 MR8 0384c4d8:00001084c4d8_NS 00000000_00035960 +14973 clk cpu0 R SP_EL3 000000000384C4E0 +14973 clk cpu0 R X29 FFFFFFFFFE00000F +14973 clk cpu0 R X30 0000000000035960 +14974 clk cpu0 IT (14938) 00015864:000010015864 a8c10fe2 O EL3h_s : LDP x2,x3,[sp],#0x10 +14974 clk cpu0 MR8 0384c4e0:00001084c4e0_NS 00000000_00035fc0 +14974 clk cpu0 MR8 0384c4e8:00001084c4e8_NS 00000000_00000130 +14974 clk cpu0 R SP_EL3 000000000384C4F0 +14974 clk cpu0 R X2 0000000000035FC0 +14974 clk cpu0 R X3 0000000000000130 +14975 clk cpu0 IT (14939) 00015868:000010015868 a8c117e4 O EL3h_s : LDP x4,x5,[sp],#0x10 +14975 clk cpu0 MR8 0384c4f0:00001084c4f0_NS 00000000_000380c8 +14975 clk cpu0 MR8 0384c4f8:00001084c4f8_NS 00000000_00000000 +14975 clk cpu0 R SP_EL3 000000000384C500 +14975 clk cpu0 R X4 00000000000380C8 +14975 clk cpu0 R X5 0000000000000000 +14976 clk cpu0 IT (14940) 0001586c:00001001586c d69f03e0 O EL3h_s : ERET +14976 clk cpu0 E 00000000 EL1h 00000019 CoreEvent_ModeChange +14976 clk cpu0 R cpsr 62000bc5 +14976 clk cpu0 R DBGDSCRext 00060000 +14976 clk cpu0 R PMBIDR_EL1 00000030 +14976 clk cpu0 R TRBIDR_EL1 000000000000002b +14976 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +14976 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +14977 clk cpu0 IT (14941) 000380cc:0000100380cc_NS d65f03c0 O EL1h_n : RET +14978 clk cpu0 IT (14942) 00035960:000010035960_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +14978 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +14978 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011580 +14978 clk cpu0 R cpsr 620003c5 +14978 clk cpu0 R SP_EL1 0000000003700550 +14978 clk cpu0 R X29 FFFFFFFFFE00000F +14978 clk cpu0 R X30 0000000000011580 +14979 clk cpu0 IT (14943) 00035964:000010035964_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +14979 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000000 +14979 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00000001 +14979 clk cpu0 R SP_EL1 0000000003700560 +14979 clk cpu0 R X2 0000000000000000 +14979 clk cpu0 R X3 0000000000000001 +14980 clk cpu0 IT (14944) 00035968:000010035968_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +14980 clk cpu0 MR8 03700560:000000f00560_NS 00000000_90000000 +14980 clk cpu0 MR8 03700568:000000f00568_NS 03ff8000_03ff8000 +14980 clk cpu0 R SP_EL1 0000000003700570 +14980 clk cpu0 R X6 0000000090000000 +14980 clk cpu0 R X7 03FF800003FF8000 +14981 clk cpu0 IT (14945) 0003596c:00001003596c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +14981 clk cpu0 MR8 03700570:000000f00570_NS 00000000_030293f0 +14981 clk cpu0 MR8 03700578:000000f00578_NS f800f800_f800f800 +14981 clk cpu0 R SP_EL1 0000000003700580 +14981 clk cpu0 R X4 00000000030293F0 +14981 clk cpu0 R X5 F800F800F800F800 +14982 clk cpu0 IT (14946) 00035970:000010035970_NS 1400000c O EL1h_n : B 0x359a0 +14983 clk cpu0 IT (14947) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +14983 clk cpu0 R cpsr 820003c5 +14983 clk cpu0 R PMBIDR_EL1 00000030 +14983 clk cpu0 R TRBIDR_EL1 000000000000002b +14984 clk cpu0 IT (14948) 000a6f54:0000100a6f54_NS a8c127e8 O EL1h_n : LDP x8,x9,[sp],#0x10 +14984 clk cpu0 MR8 03700580:000000f00580_NS 00000000_00000003 +14984 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00000018 +14984 clk cpu0 R SP_EL1 0000000003700590 +14984 clk cpu0 R X8 0000000000000003 +14984 clk cpu0 R X9 0000000000000018 +14985 clk cpu0 IT (14949) 000a6f58:0000100a6f58_NS d65f03c0 O EL1h_n : RET +14986 clk cpu0 IT (14950) 00011580:000010011580_NS f9402fe8 O EL1h_n : LDR x8,[sp,#0x58] +14986 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000001 +14986 clk cpu0 R X8 0000000000000001 +14987 clk cpu0 IS (14951) 00011584:000010011584_NS b4000048 O EL1h_n : CBZ x8,0x1158c +14988 clk cpu0 IT (14952) 00011588:000010011588_NS 14000007 O EL1h_n : B 0x115a4 +14989 clk cpu0 IT (14953) 000115a4:0000100115a4_NS b9407be8 O EL1h_n : LDR w8,[sp,#0x78] +14989 clk cpu0 MR4 03700608:000000f00608_NS 00000001 +14989 clk cpu0 R X8 0000000000000001 +14990 clk cpu0 IT (14954) 000115a8:0000100115a8_NS 35000048 O EL1h_n : CBNZ w8,0x115b0 +14991 clk cpu0 IT (14955) 000115b0:0000100115b0_NS f9402be8 O EL1h_n : LDR x8,[sp,#0x50] +14991 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000003 +14991 clk cpu0 R X8 0000000000000003 +14992 clk cpu0 IT (14956) 000115b4:0000100115b4_NS d2800309 O EL1h_n : MOV x9,#0x18 +14992 clk cpu0 R X9 0000000000000018 +14993 clk cpu0 IT (14957) 000115b8:0000100115b8_NS 9ac92100 O EL1h_n : LSL x0,x8,x9 +14993 clk cpu0 R X0 0000000003000000 +14994 clk cpu0 IT (14958) 000115bc:0000100115bc_NS f94037e2 O EL1h_n : LDR x2,[sp,#0x68] +14994 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +14994 clk cpu0 R X2 0000000000000000 +14995 clk cpu0 IT (14959) 000115c0:0000100115c0_NS f94033e3 O EL1h_n : LDR x3,[sp,#0x60] +14995 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +14995 clk cpu0 R X3 0000000000000001 +14996 clk cpu0 IT (14960) 000115c4:0000100115c4_NS d2a06001 O EL1h_n : MOV x1,#0x3000000 +14996 clk cpu0 R X1 0000000003000000 +14997 clk cpu0 IT (14961) 000115c8:0000100115c8_NS 940256a1 O EL1h_n : BL 0xa704c +14997 clk cpu0 R X30 00000000000115CC +14997 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0183 INVAL 0x00001009b040_NS +14997 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0183 ALLOC 0x0000100a7040_NS +14998 clk cpu0 IT (14962) 000a704c:0000100a704c_NS a9bf27e8 O EL1h_n : STP x8,x9,[sp,#-0x10]! +14998 clk cpu0 MW8 03700580:000000f00580_NS 00000000_00000003 +14998 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00000018 +14998 clk cpu0 R SP_EL1 0000000003700580 +14999 clk cpu0 IT (14963) 000a7050:0000100a7050_NS aa0103e8 O EL1h_n : MOV x8,x1 +14999 clk cpu0 R X8 0000000003000000 +15000 clk cpu0 IT (14964) 000a7054:0000100a7054_NS aa0303e9 O EL1h_n : MOV x9,x3 +15000 clk cpu0 R X9 0000000000000001 +15001 clk cpu0 IT (14965) 000a7058:0000100a7058_NS f100085f O EL1h_n : CMP x2,#2 +15001 clk cpu0 R cpsr 820003c5 +15002 clk cpu0 IT (14966) 000a705c:0000100a705c_NS 540001eb O EL1h_n : B.LT 0xa7098 +15002 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0184 INVAL 0x00001009b080_NS +15002 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0184 ALLOC 0x0000100a7080_NS +15003 clk cpu0 IT (14967) 000a7098:0000100a7098_NS f100045f O EL1h_n : CMP x2,#1 +15003 clk cpu0 R cpsr 820003c5 +15004 clk cpu0 IT (14968) 000a709c:0000100a709c_NS 54000221 O EL1h_n : B.NE 0xa70e0 +15005 clk cpu0 IT (14969) 000a70e0:0000100a70e0_NS aa0003e1 O EL1h_n : MOV x1,x0 +15005 clk cpu0 R X1 0000000003000000 +15006 clk cpu0 IT (14970) 000a70e4:0000100a70e4_NS d28000e0 O EL1h_n : MOV x0,#7 +15006 clk cpu0 R X0 0000000000000007 +15007 clk cpu0 IT (14971) 000a70e8:0000100a70e8_NS 32120000 O EL1h_n : ORR w0,w0,#0x4000 +15007 clk cpu0 R X0 0000000000004007 +15008 clk cpu0 IT (14972) 000a70ec:0000100a70ec_NS f2a004e0 O EL1h_n : MOVK x0,#0x27,LSL #16 +15008 clk cpu0 R X0 0000000000274007 +15009 clk cpu0 IT (14973) 000a70f0:0000100a70f0_NS d40000e1 O EL1h_n : SVC #7 +15009 clk cpu0 E 000a70f0:0000100a70f0_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +15009 clk cpu0 R cpsr 820003c5 +15009 clk cpu0 R PMBIDR_EL1 00000030 +15009 clk cpu0 R ESR_EL1 56000007 +15009 clk cpu0 R SPSR_EL1 820003c5 +15009 clk cpu0 R TRBIDR_EL1 000000000000002b +15009 clk cpu0 R ELR_EL1 00000000000a70f4 +15010 clk cpu0 IT (14974) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +15010 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 INVAL 0x000010015800 +15010 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x000010035800_NS +15011 clk cpu0 IT (14975) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +15011 clk cpu0 R SP_EL1 0000000003700480 +15012 clk cpu0 IT (14976) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +15012 clk cpu0 MW8 03700480:000000f00480_NS 00000000_00274007 +15012 clk cpu0 MW8 03700488:000000f00488_NS 00000000_03000000 +15013 clk cpu0 IT (14977) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +15013 clk cpu0 R X0 0000000056000007 +15014 clk cpu0 IT (14978) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +15014 clk cpu0 R X1 0000000000000015 +15015 clk cpu0 IT (14979) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +15015 clk cpu0 R cpsr 620003c5 +15016 clk cpu0 IT (14980) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +15017 clk cpu0 IT (14981) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +15017 clk cpu0 R X1 0000000000000007 +15018 clk cpu0 IT (14982) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +15018 clk cpu0 R cpsr 220003c5 +15019 clk cpu0 IS (14983) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +15020 clk cpu0 IT (14984) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +15020 clk cpu0 R cpsr 820003c5 +15021 clk cpu0 IS (14985) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +15022 clk cpu0 IT (14986) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +15022 clk cpu0 R cpsr 820003c5 +15023 clk cpu0 IS (14987) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +15024 clk cpu0 IT (14988) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +15024 clk cpu0 R cpsr 620003c5 +15025 clk cpu0 IT (14989) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +15026 clk cpu0 IT (14990) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +15026 clk cpu0 MR8 03700480:000000f00480_NS 00000000_00274007 +15026 clk cpu0 MR8 03700488:000000f00488_NS 00000000_03000000 +15026 clk cpu0 R X0 0000000000274007 +15026 clk cpu0 R X1 0000000003000000 +15027 clk cpu0 IT (14991) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +15027 clk cpu0 R SP_EL1 0000000003700580 +15028 clk cpu0 IT (14992) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +15028 clk cpu0 R cpsr 220003c5 +15029 clk cpu0 IT (14993) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +15030 clk cpu0 IT (14994) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +15030 clk cpu0 MW8 03700570:000000f00570_NS 00000000_030293f0 +15030 clk cpu0 MW8 03700578:000000f00578_NS f800f800_f800f800 +15030 clk cpu0 R SP_EL1 0000000003700570 +15031 clk cpu0 IT (14995) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +15031 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00274007 +15031 clk cpu0 MW8 03700568:000000f00568_NS 00000000_03000000 +15031 clk cpu0 R SP_EL1 0000000003700560 +15032 clk cpu0 IT (14996) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +15032 clk cpu0 R X5 0000000000000000 +15033 clk cpu0 IT (14997) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +15033 clk cpu0 R X1 0000000000000000 +15034 clk cpu0 IT (14998) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +15034 clk cpu0 R cpsr 820003c5 +15035 clk cpu0 IT (14999) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +15035 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00274007 +15035 clk cpu0 MR8 03700568:000000f00568_NS 00000000_03000000 +15035 clk cpu0 R SP_EL1 0000000003700570 +15035 clk cpu0 R X0 0000000000274007 +15035 clk cpu0 R X1 0000000003000000 +15036 clk cpu0 IT (15000) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +15037 clk cpu0 IT (15001) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +15037 clk cpu0 MW8 03700560:000000f00560_NS 00000000_90000000 +15037 clk cpu0 MW8 03700568:000000f00568_NS 03ff8000_03ff8000 +15037 clk cpu0 R SP_EL1 0000000003700560 +15038 clk cpu0 IT (15002) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +15038 clk cpu0 R X6 0000000000000000 +15039 clk cpu0 IT (15003) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +15039 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +15039 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000001 +15039 clk cpu0 R SP_EL1 0000000003700550 +15040 clk cpu0 IT (15004) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15040 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +15040 clk cpu0 MW8 03700548:000000f00548_NS 00000000_000115cc +15040 clk cpu0 R SP_EL1 0000000003700540 +15041 clk cpu0 IT (15005) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +15041 clk cpu0 R X3 0000000000000001 +15042 clk cpu0 IT (15006) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +15042 clk cpu0 R cpsr 620003c5 +15043 clk cpu0 IT (15007) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +15044 clk cpu0 IT (15008) 00035944:000010035944_NS 580557e2 O EL1h_n : LDR x2,0x40440 +15044 clk cpu0 MR8 00040440:000010040440_NS 00000000_00035e90 +15044 clk cpu0 R X2 0000000000035E90 +15045 clk cpu0 IT (15009) 00035948:000010035948_NS 53107c03 O EL1h_n : LSR w3,w0,#16 +15045 clk cpu0 R X3 0000000000000027 +15046 clk cpu0 IT (15010) 0003594c:00001003594c_NS 12003c63 O EL1h_n : AND w3,w3,#0xffff +15046 clk cpu0 R X3 0000000000000027 +15047 clk cpu0 IT (15011) 00035950:000010035950_NS d37df063 O EL1h_n : LSL x3,x3,#3 +15047 clk cpu0 R X3 0000000000000138 +15048 clk cpu0 IT (15012) 00035954:000010035954_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +15048 clk cpu0 R X2 0000000000035FC8 +15049 clk cpu0 IT (15013) 00035958:000010035958_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +15049 clk cpu0 MR8 00035fc8:000010035fc8_NS 00000000_000380d0 +15049 clk cpu0 R X4 00000000000380D0 +15050 clk cpu0 IT (15014) 0003595c:00001003595c_NS d63f0080 O EL1h_n : BLR x4 +15050 clk cpu0 R cpsr 62000bc5 +15050 clk cpu0 R X30 0000000000035960 +15051 clk cpu0 IT (15015) 000380d0:0000100380d0_NS d5384244 O EL1h_n : MRS x4,CURRENTEL +15051 clk cpu0 R cpsr 620003c5 +15051 clk cpu0 R X4 0000000000000004 +15052 clk cpu0 IT (15016) 000380d4:0000100380d4_NS f100209f O EL1h_n : CMP x4,#8 +15052 clk cpu0 R cpsr 820003c5 +15053 clk cpu0 IS (15017) 000380d8:0000100380d8_NS 54000160 O EL1h_n : B.EQ 0x38104 +15054 clk cpu0 IT (15018) 000380dc:0000100380dc_NS f1000d3f O EL1h_n : CMP x9,#3 +15054 clk cpu0 R cpsr 820003c5 +15055 clk cpu0 IT (15019) 000380e0:0000100380e0_NS 54000061 O EL1h_n : B.NE 0x380ec +15056 clk cpu0 IT (15020) 000380ec:0000100380ec_NS f100053f O EL1h_n : CMP x9,#1 +15056 clk cpu0 R cpsr 620003c5 +15057 clk cpu0 IS (15021) 000380f0:0000100380f0_NS 54000061 O EL1h_n : B.NE 0x380fc +15058 clk cpu0 IT (15022) 000380f4:0000100380f4_NS d40000e2 O EL1h_n : HVC #7 +15058 clk cpu0 E 000380f4:0000100380f4_NS EL2h 00000019 CoreEvent_ModeChange +15058 clk cpu0 E 000380f4:0000100380f4_NS 00000088 CoreEvent_LOWER_64_SYNC +15058 clk cpu0 R cpsr 620003c9 +15058 clk cpu0 R PMBIDR_EL1 00000030 +15058 clk cpu0 R ESR_EL2 5a000007 +15058 clk cpu0 R SPSR_EL2 620003c5 +15058 clk cpu0 R TRBIDR_EL1 000000000000002b +15058 clk cpu0 R ELR_EL2 00000000000380f8 +15058 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +15058 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +15058 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0060 INVAL 0x000010010c00_NS +15058 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0060 ALLOC 0x000010018c00_NS +15059 clk cpu0 IT (15023) 00018c00:000010018c00_NS 14001079 O EL2h_n : B 0x1cde4 +15059 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006f INVAL 0x000010010dc0_NS +15059 clk cpu0 CACHE cpu.cpu0.l1icache LINE 006f ALLOC 0x00001001cdc0_NS +15060 clk cpu0 IT (15024) 0001cde4:00001001cde4_NS d10403ff O EL2h_n : SUB sp,sp,#0x100 +15060 clk cpu0 R SP_EL2 000000000383C1D0 +15061 clk cpu0 IT (15025) 0001cde8:00001001cde8_NS a90007e0 O EL2h_n : STP x0,x1,[sp,#0] +15061 clk cpu0 MW8 0383c1d0:00001083c1d0_NS 00000000_00274007 +15061 clk cpu0 MW8 0383c1d8:00001083c1d8_NS 00000000_03000000 +15062 clk cpu0 IT (15026) 0001cdec:00001001cdec_NS d53c5200 O EL2h_n : MRS x0,ESR_EL2 +15062 clk cpu0 R X0 000000005A000007 +15063 clk cpu0 IT (15027) 0001cdf0:00001001cdf0_NS 531a7c01 O EL2h_n : LSR w1,w0,#26 +15063 clk cpu0 R X1 0000000000000016 +15064 clk cpu0 IT (15028) 0001cdf4:00001001cdf4_NS 7100543f O EL2h_n : CMP w1,#0x15 +15064 clk cpu0 R cpsr 220003c9 +15065 clk cpu0 IS (15029) 0001cdf8:00001001cdf8_NS 54000340 O EL2h_n : B.EQ 0x1ce60 +15066 clk cpu0 IT (15030) 0001cdfc:00001001cdfc_NS 7100583f O EL2h_n : CMP w1,#0x16 +15066 clk cpu0 R cpsr 620003c9 +15067 clk cpu0 IT (15031) 0001ce00:00001001ce00_NS 540000a0 O EL2h_n : B.EQ 0x1ce14 +15068 clk cpu0 IT (15032) 0001ce14:00001001ce14_NS d53c5200 O EL2h_n : MRS x0,ESR_EL2 +15068 clk cpu0 R X0 000000005A000007 +15069 clk cpu0 IT (15033) 0001ce18:00001001ce18_NS 53003c01 O EL2h_n : UXTH w1,w0 +15069 clk cpu0 R X1 0000000000000007 +15070 clk cpu0 IT (15034) 0001ce1c:00001001ce1c_NS 7100143f O EL2h_n : CMP w1,#5 +15070 clk cpu0 R cpsr 220003c9 +15071 clk cpu0 IS (15035) 0001ce20:00001001ce20_NS 5400f50b O EL2h_n : B.LT 0x1ecc0 +15072 clk cpu0 IT (15036) 0001ce24:00001001ce24_NS 7100283f O EL2h_n : CMP w1,#0xa +15072 clk cpu0 R cpsr 820003c9 +15073 clk cpu0 IS (15037) 0001ce28:00001001ce28_NS 5400f4cc O EL2h_n : B.GT 0x1ecc0 +15074 clk cpu0 IT (15038) 0001ce2c:00001001ce2c_NS 71001c3f O EL2h_n : CMP w1,#7 +15074 clk cpu0 R cpsr 620003c9 +15075 clk cpu0 IT (15039) 0001ce30:00001001ce30_NS 540003a0 O EL2h_n : B.EQ 0x1cea4 +15076 clk cpu0 IT (15040) 0001cea4:00001001cea4_NS a94007e0 O EL2h_n : LDP x0,x1,[sp,#0] +15076 clk cpu0 MR8 0383c1d0:00001083c1d0_NS 00000000_00274007 +15076 clk cpu0 MR8 0383c1d8:00001083c1d8_NS 00000000_03000000 +15076 clk cpu0 R X0 0000000000274007 +15076 clk cpu0 R X1 0000000003000000 +15077 clk cpu0 IT (15041) 0001cea8:00001001cea8_NS 910403ff O EL2h_n : ADD sp,sp,#0x100 +15077 clk cpu0 R SP_EL2 000000000383C2D0 +15078 clk cpu0 IT (15042) 0001ceac:00001001ceac_NS f103bc3f O EL2h_n : CMP x1,#0xef +15078 clk cpu0 R cpsr 220003c9 +15079 clk cpu0 IT (15043) 0001ceb0:00001001ceb0_NS 54000061 O EL2h_n : B.NE 0x1cebc +15080 clk cpu0 IT (15044) 0001cebc:00001001cebc_NS a9bf17e4 O EL2h_n : STP x4,x5,[sp,#-0x10]! +15080 clk cpu0 MW8 0383c2c0:00001083c2c0_NS 00000000_00000004 +15080 clk cpu0 MW8 0383c2c8:00001083c2c8_NS 00000000_00000000 +15080 clk cpu0 R SP_EL2 000000000383C2C0 +15081 clk cpu0 IT (15045) 0001cec0:00001001cec0_NS a9bf07e0 O EL2h_n : STP x0,x1,[sp,#-0x10]! +15081 clk cpu0 MW8 0383c2b0:00001083c2b0_NS 00000000_00274007 +15081 clk cpu0 MW8 0383c2b8:00001083c2b8_NS 00000000_03000000 +15081 clk cpu0 R SP_EL2 000000000383C2B0 +15082 clk cpu0 IT (15046) 0001cec4:00001001cec4_NS d2800005 O EL2h_n : MOV x5,#0 +15082 clk cpu0 R X5 0000000000000000 +15083 clk cpu0 IT (15047) 0001cec8:00001001cec8_NS d34d3401 O EL2h_n : UBFIZ x1,x0,#51,#14 +15083 clk cpu0 R X1 0000000000000000 +15084 clk cpu0 IT (15048) 0001cecc:00001001cecc_NS f100043f O EL2h_n : CMP x1,#1 +15084 clk cpu0 R cpsr 820003c9 +15085 clk cpu0 IT (15049) 0001ced0:00001001ced0_NS a8c107e0 O EL2h_n : LDP x0,x1,[sp],#0x10 +15085 clk cpu0 MR8 0383c2b0:00001083c2b0_NS 00000000_00274007 +15085 clk cpu0 MR8 0383c2b8:00001083c2b8_NS 00000000_03000000 +15085 clk cpu0 R SP_EL2 000000000383C2C0 +15085 clk cpu0 R X0 0000000000274007 +15085 clk cpu0 R X1 0000000003000000 +15086 clk cpu0 IT (15050) 0001ced4:00001001ced4_NS 540003a1 O EL2h_n : B.NE 0x1cf48 +15087 clk cpu0 IT (15051) 0001cf48:00001001cf48_NS a9bf0fe2 O EL2h_n : STP x2,x3,[sp,#-0x10]! +15087 clk cpu0 MW8 0383c2b0:00001083c2b0_NS 00000000_00035fc8 +15087 clk cpu0 MW8 0383c2b8:00001083c2b8_NS 00000000_00000138 +15087 clk cpu0 R SP_EL2 000000000383C2B0 +15088 clk cpu0 IT (15052) 0001cf4c:00001001cf4c_NS a9bf7bfd O EL2h_n : STP x29,x30,[sp,#-0x10]! +15088 clk cpu0 MW8 0383c2a0:00001083c2a0_NS ffffffff_fe00000f +15088 clk cpu0 MW8 0383c2a8:00001083c2a8_NS 00000000_00035960 +15088 clk cpu0 R SP_EL2 000000000383C2A0 +15089 clk cpu0 IT (15053) 0001cf50:00001001cf50_NS 530e3803 O EL2h_n : UBFIZ w3,w0,#18,#15 +15089 clk cpu0 R X3 0000000000000001 +15090 clk cpu0 IT (15054) 0001cf54:00001001cf54_NS f100047f O EL2h_n : CMP x3,#1 +15090 clk cpu0 R cpsr 620003c9 +15091 clk cpu0 IT (15055) 0001cf58:00001001cf58_NS 540000c0 O EL2h_n : B.EQ 0x1cf70 +15092 clk cpu0 IT (15056) 0001cf70:00001001cf70_NS 5801e582 O EL2h_n : LDR x2,0x20c20 +15092 clk cpu0 MR8 00020c20:000010020c20_NS 00000000_0001d590 +15092 clk cpu0 R X2 000000000001D590 +15093 clk cpu0 IT (15057) 0001cf74:00001001cf74_NS 53107c03 O EL2h_n : LSR w3,w0,#16 +15093 clk cpu0 R X3 0000000000000027 +15094 clk cpu0 IT (15058) 0001cf78:00001001cf78_NS 12003c63 O EL2h_n : AND w3,w3,#0xffff +15094 clk cpu0 R X3 0000000000000027 +15095 clk cpu0 IT (15059) 0001cf7c:00001001cf7c_NS d37df063 O EL2h_n : LSL x3,x3,#3 +15095 clk cpu0 R X3 0000000000000138 +15096 clk cpu0 IT (15060) 0001cf80:00001001cf80_NS 8b030042 O EL2h_n : ADD x2,x2,x3 +15096 clk cpu0 R X2 000000000001D6C8 +15097 clk cpu0 IT (15061) 0001cf84:00001001cf84_NS f9400044 O EL2h_n : LDR x4,[x2,#0] +15097 clk cpu0 MR8 0001d6c8:00001001d6c8_NS 00000000_0001eacc +15097 clk cpu0 R X4 000000000001EACC +15098 clk cpu0 IT (15062) 0001cf88:00001001cf88_NS d63f0080 O EL2h_n : BLR x4 +15098 clk cpu0 R cpsr 62000bc9 +15098 clk cpu0 R X30 000000000001CF8C +15099 clk cpu0 IT (15063) 0001eacc:00001001eacc_NS d53c1122 O EL2h_n : MRS x2,MDCR_EL2 +15099 clk cpu0 R cpsr 620003c9 +15099 clk cpu0 R X2 0000000003000008 +15100 clk cpu0 IT (15064) 0001ead0:00001001ead0_NS 8a080021 O EL2h_n : AND x1,x1,x8 +15100 clk cpu0 R X1 0000000003000000 +15101 clk cpu0 IT (15065) 0001ead4:00001001ead4_NS 8a280042 O EL2h_n : BIC x2,x2,x8 +15101 clk cpu0 R X2 0000000000000008 +15102 clk cpu0 IT (15066) 0001ead8:00001001ead8_NS aa020021 O EL2h_n : ORR x1,x1,x2 +15102 clk cpu0 R X1 0000000003000008 +15103 clk cpu0 IT (15067) 0001eadc:00001001eadc_NS a9bf7bfd O EL2h_n : STP x29,x30,[sp,#-0x10]! +15103 clk cpu0 MW8 0383c290:00001083c290_NS ffffffff_fe00000f +15103 clk cpu0 MW8 0383c298:00001083c298_NS 00000000_0001cf8c +15103 clk cpu0 R SP_EL2 000000000383C290 +15104 clk cpu0 IT (15068) 0001eae0:00001001eae0_NS a9bf07e0 O EL2h_n : STP x0,x1,[sp,#-0x10]! +15104 clk cpu0 MW8 0383c280:00001083c280_NS 00000000_00274007 +15104 clk cpu0 MW8 0383c288:00001083c288_NS 00000000_03000008 +15104 clk cpu0 R SP_EL2 000000000383C280 +15105 clk cpu0 IT (15069) 0001eae4:00001001eae4_NS d503201f O EL2h_n : NOP +15106 clk cpu0 IT (15070) 0001eae8:00001001eae8_NS a8c107e0 O EL2h_n : LDP x0,x1,[sp],#0x10 +15106 clk cpu0 MR8 0383c280:00001083c280_NS 00000000_00274007 +15106 clk cpu0 MR8 0383c288:00001083c288_NS 00000000_03000008 +15106 clk cpu0 R SP_EL2 000000000383C290 +15106 clk cpu0 R X0 0000000000274007 +15106 clk cpu0 R X1 0000000003000008 +15107 clk cpu0 IT (15071) 0001eaec:00001001eaec_NS d51c1121 O EL2h_n : MSR MDCR_EL2,x1 +15107 clk cpu0 R MDCR_EL2 00000000:03000008 +15108 clk cpu0 IT (15072) 0001eaf0:00001001eaf0_NS d5033fdf O EL2h_n : ISB +15108 clk cpu0 R PMBIDR_EL1 00000030 +15108 clk cpu0 R TRBIDR_EL1 000000000000002b +15109 clk cpu0 IT (15073) 0001eaf4:00001001eaf4_NS d503201f O EL2h_n : NOP +15110 clk cpu0 IT (15074) 0001eaf8:00001001eaf8_NS a8c17bfd O EL2h_n : LDP x29,x30,[sp],#0x10 +15110 clk cpu0 MR8 0383c290:00001083c290_NS ffffffff_fe00000f +15110 clk cpu0 MR8 0383c298:00001083c298_NS 00000000_0001cf8c +15110 clk cpu0 R SP_EL2 000000000383C2A0 +15110 clk cpu0 R X29 FFFFFFFFFE00000F +15110 clk cpu0 R X30 000000000001CF8C +15111 clk cpu0 IT (15075) 0001eafc:00001001eafc_NS d65f03c0 O EL2h_n : RET +15112 clk cpu0 IT (15076) 0001cf8c:00001001cf8c_NS a8c17bfd O EL2h_n : LDP x29,x30,[sp],#0x10 +15112 clk cpu0 MR8 0383c2a0:00001083c2a0_NS ffffffff_fe00000f +15112 clk cpu0 MR8 0383c2a8:00001083c2a8_NS 00000000_00035960 +15112 clk cpu0 R SP_EL2 000000000383C2B0 +15112 clk cpu0 R X29 FFFFFFFFFE00000F +15112 clk cpu0 R X30 0000000000035960 +15113 clk cpu0 IT (15077) 0001cf90:00001001cf90_NS a8c10fe2 O EL2h_n : LDP x2,x3,[sp],#0x10 +15113 clk cpu0 MR8 0383c2b0:00001083c2b0_NS 00000000_00035fc8 +15113 clk cpu0 MR8 0383c2b8:00001083c2b8_NS 00000000_00000138 +15113 clk cpu0 R SP_EL2 000000000383C2C0 +15113 clk cpu0 R X2 0000000000035FC8 +15113 clk cpu0 R X3 0000000000000138 +15114 clk cpu0 IT (15078) 0001cf94:00001001cf94_NS a8c117e4 O EL2h_n : LDP x4,x5,[sp],#0x10 +15114 clk cpu0 MR8 0383c2c0:00001083c2c0_NS 00000000_00000004 +15114 clk cpu0 MR8 0383c2c8:00001083c2c8_NS 00000000_00000000 +15114 clk cpu0 R SP_EL2 000000000383C2D0 +15114 clk cpu0 R X4 0000000000000004 +15114 clk cpu0 R X5 0000000000000000 +15115 clk cpu0 IT (15079) 0001cf98:00001001cf98_NS 1400000b O EL2h_n : B 0x1cfc4 +15116 clk cpu0 IT (15080) 0001cfc4:00001001cfc4_NS aa0003e2 O EL2h_n : MOV x2,x0 +15116 clk cpu0 R X2 0000000000274007 +15117 clk cpu0 IT (15081) 0001cfc8:00001001cfc8_NS aa0003e3 O EL2h_n : MOV x3,x0 +15117 clk cpu0 R X3 0000000000274007 +15118 clk cpu0 IT (15082) 0001cfcc:00001001cfcc_NS d34f3c42 O EL2h_n : UBFIZ x2,x2,#49,#16 +15118 clk cpu0 R X2 0000000000000000 +15119 clk cpu0 IT (15083) 0001cfd0:00001001cfd0_NS f100045f O EL2h_n : CMP x2,#1 +15119 clk cpu0 R cpsr 820003c9 +15120 clk cpu0 IT (15084) 0001cfd4:00001001cfd4_NS 540003e1 O EL2h_n : B.NE 0x1d050 +15121 clk cpu0 IT (15085) 0001d050:00001001d050_NS d69f03e0 O EL2h_n : ERET +15121 clk cpu0 E 00000000 EL1h 00000019 CoreEvent_ModeChange +15121 clk cpu0 R cpsr 620003c5 +15121 clk cpu0 R PMBIDR_EL1 00000030 +15121 clk cpu0 R TRBIDR_EL1 000000000000002b +15121 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +15121 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +15122 clk cpu0 IT (15086) 000380f8:0000100380f8_NS 1400000f O EL1h_n : B 0x38134 +15122 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0008 INVAL 0x000010094100 +15122 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0008 ALLOC 0x000010038100_NS +15123 clk cpu0 IT (15087) 00038134:000010038134_NS d65f03c0 O EL1h_n : RET +15124 clk cpu0 IT (15088) 00035960:000010035960_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15124 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +15124 clk cpu0 MR8 03700548:000000f00548_NS 00000000_000115cc +15124 clk cpu0 R SP_EL1 0000000003700550 +15124 clk cpu0 R X29 FFFFFFFFFE00000F +15124 clk cpu0 R X30 00000000000115CC +15125 clk cpu0 IT (15089) 00035964:000010035964_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +15125 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000000 +15125 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00000001 +15125 clk cpu0 R SP_EL1 0000000003700560 +15125 clk cpu0 R X2 0000000000000000 +15125 clk cpu0 R X3 0000000000000001 +15126 clk cpu0 IT (15090) 00035968:000010035968_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +15126 clk cpu0 MR8 03700560:000000f00560_NS 00000000_90000000 +15126 clk cpu0 MR8 03700568:000000f00568_NS 03ff8000_03ff8000 +15126 clk cpu0 R SP_EL1 0000000003700570 +15126 clk cpu0 R X6 0000000090000000 +15126 clk cpu0 R X7 03FF800003FF8000 +15127 clk cpu0 IT (15091) 0003596c:00001003596c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +15127 clk cpu0 MR8 03700570:000000f00570_NS 00000000_030293f0 +15127 clk cpu0 MR8 03700578:000000f00578_NS f800f800_f800f800 +15127 clk cpu0 R SP_EL1 0000000003700580 +15127 clk cpu0 R X4 00000000030293F0 +15127 clk cpu0 R X5 F800F800F800F800 +15128 clk cpu0 IT (15092) 00035970:000010035970_NS 1400000c O EL1h_n : B 0x359a0 +15129 clk cpu0 IT (15093) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +15129 clk cpu0 R cpsr 820003c5 +15129 clk cpu0 R PMBIDR_EL1 00000030 +15129 clk cpu0 R TRBIDR_EL1 000000000000002b +15130 clk cpu0 IT (15094) 000a70f4:0000100a70f4_NS a8c127e8 O EL1h_n : LDP x8,x9,[sp],#0x10 +15130 clk cpu0 MR8 03700580:000000f00580_NS 00000000_00000003 +15130 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00000018 +15130 clk cpu0 R SP_EL1 0000000003700590 +15130 clk cpu0 R X8 0000000000000003 +15130 clk cpu0 R X9 0000000000000018 +15131 clk cpu0 IT (15095) 000a70f8:0000100a70f8_NS d65f03c0 O EL1h_n : RET +15132 clk cpu0 IT (15096) 000115cc:0000100115cc_NS f94043fe O EL1h_n : LDR x30,[sp,#0x80] +15132 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00010898 +15132 clk cpu0 R X30 0000000000010898 +15133 clk cpu0 IT (15097) 000115d0:0000100115d0_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +15133 clk cpu0 R SP_EL1 0000000003700620 +15134 clk cpu0 IT (15098) 000115d4:0000100115d4_NS d65f03c0 O EL1h_n : RET +15135 clk cpu0 IT (15099) 00010898:000010010898_NS f94043e9 O EL1h_n : LDR x9,[sp,#0x80] +15135 clk cpu0 MR8 037006a0:000000f006a0_NS 00000000_03008530 +15135 clk cpu0 R X9 0000000003008530 +15136 clk cpu0 IT (15100) 0001089c:00001001089c_NS f940012a O EL1h_n : LDR x10,[x9,#0] +15136 clk cpu0 MR8 03008530:000000808530_NS 00000000_23000010 +15136 clk cpu0 R X10 0000000023000010 +15137 clk cpu0 IT (15101) 000108a0:0000100108a0_NS f9403fec O EL1h_n : LDR x12,[sp,#0x78] +15137 clk cpu0 MR8 03700698:000000f00698_NS 00000000_00000000 +15137 clk cpu0 R X12 0000000000000000 +15138 clk cpu0 IT (15102) 000108a4:0000100108a4_NS eb0c015f O EL1h_n : CMP x10,x12 +15138 clk cpu0 R cpsr 220003c5 +15139 clk cpu0 IT (15103) 000108a8:0000100108a8_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +15139 clk cpu0 R X8 0000000000000000 +15140 clk cpu0 IS (15104) 000108ac:0000100108ac_NS 37000048 O EL1h_n : TBNZ w8,#0,0x108b4 +15141 clk cpu0 IT (15105) 000108b0:0000100108b0_NS 14000006 O EL1h_n : B 0x108c8 +15142 clk cpu0 IT (15106) 000108c8:0000100108c8_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +15142 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +15142 clk cpu0 R X3 0000000000000000 +15143 clk cpu0 IT (15107) 000108cc:0000100108cc_NS 52803d80 O EL1h_n : MOV w0,#0x1ec +15143 clk cpu0 R X0 00000000000001EC +15144 clk cpu0 IT (15108) 000108d0:0000100108d0_NS 52800021 O EL1h_n : MOV w1,#1 +15144 clk cpu0 R X1 0000000000000001 +15145 clk cpu0 IT (15109) 000108d4:0000100108d4_NS 52800068 O EL1h_n : MOV w8,#3 +15145 clk cpu0 R X8 0000000000000003 +15146 clk cpu0 IT (15110) 000108d8:0000100108d8_NS 2a0803e2 O EL1h_n : MOV w2,w8 +15146 clk cpu0 R X2 0000000000000003 +15147 clk cpu0 IT (15111) 000108dc:0000100108dc_NS b90067e8 O EL1h_n : STR w8,[sp,#0x64] +15147 clk cpu0 MW4 03700684:000000f00684_NS 00000003 +15148 clk cpu0 IT (15112) 000108e0:0000100108e0_NS 94022b85 O EL1h_n : BL 0x9b6f4 +15148 clk cpu0 R X30 00000000000108E4 +15149 clk cpu0 IT (15113) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +15149 clk cpu0 MW8 03700600:000000f00600_NS ff83ff83_ff83ff83 +15149 clk cpu0 R SP_EL1 0000000003700600 +15150 clk cpu0 IT (15114) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +15150 clk cpu0 MW8 03700610:000000f00610_NS 00000000_062160a2 +15150 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000108e4 +15151 clk cpu0 IT (15115) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +15151 clk cpu0 R cpsr 220003c5 +15152 clk cpu0 IT (15116) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +15152 clk cpu0 R X19 00000000000001EC +15153 clk cpu0 IS (15117) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +15154 clk cpu0 IT (15118) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +15154 clk cpu0 R cpsr 620003c5 +15155 clk cpu0 IT (15119) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +15156 clk cpu0 IT (15120) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +15156 clk cpu0 R X1 00000000000001EC +15157 clk cpu0 IT (15121) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +15157 clk cpu0 MR8 03700610:000000f00610_NS 00000000_062160a2 +15157 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000108e4 +15157 clk cpu0 R X19 00000000062160A2 +15157 clk cpu0 R X30 00000000000108E4 +15158 clk cpu0 IT (15122) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +15158 clk cpu0 R X0 0000000000000001 +15159 clk cpu0 IT (15123) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +15159 clk cpu0 MR8 03700600:000000f00600_NS ff83ff83_ff83ff83 +15159 clk cpu0 R SP_EL1 0000000003700620 +15159 clk cpu0 R X20 FF83FF83FF83FF83 +15160 clk cpu0 IT (15124) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +15161 clk cpu0 IT (15125) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15161 clk cpu0 MW8 03700610:000000f00610_NS ffffffff_fe00000f +15161 clk cpu0 MW8 03700618:000000f00618_NS 00000000_000108e4 +15161 clk cpu0 R SP_EL1 0000000003700610 +15162 clk cpu0 IT (15126) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +15162 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +15162 clk cpu0 R cpsr 620003c5 +15162 clk cpu0 R PMBIDR_EL1 00000030 +15162 clk cpu0 R ESR_EL1 56000005 +15162 clk cpu0 R SPSR_EL1 620003c5 +15162 clk cpu0 R TRBIDR_EL1 000000000000002b +15162 clk cpu0 R ELR_EL1 000000000009ef50 +15163 clk cpu0 IT (15127) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +15164 clk cpu0 IT (15128) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +15164 clk cpu0 R SP_EL1 0000000003700510 +15165 clk cpu0 IT (15129) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +15165 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +15165 clk cpu0 MW8 03700518:000000f00518_NS 00000000_000001ec +15166 clk cpu0 IT (15130) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +15166 clk cpu0 R X0 0000000056000005 +15167 clk cpu0 IT (15131) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +15167 clk cpu0 R X1 0000000000000015 +15168 clk cpu0 IT (15132) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +15168 clk cpu0 R cpsr 620003c5 +15169 clk cpu0 IT (15133) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +15170 clk cpu0 IT (15134) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +15170 clk cpu0 R X1 0000000000000005 +15171 clk cpu0 IT (15135) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +15171 clk cpu0 R cpsr 620003c5 +15172 clk cpu0 IS (15136) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +15173 clk cpu0 IT (15137) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +15173 clk cpu0 R cpsr 820003c5 +15174 clk cpu0 IS (15138) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +15175 clk cpu0 IT (15139) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +15175 clk cpu0 R cpsr 820003c5 +15176 clk cpu0 IS (15140) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +15177 clk cpu0 IT (15141) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +15177 clk cpu0 R cpsr 820003c5 +15178 clk cpu0 IS (15142) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +15179 clk cpu0 IT (15143) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +15179 clk cpu0 R cpsr 820003c5 +15180 clk cpu0 IS (15144) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +15181 clk cpu0 IT (15145) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +15181 clk cpu0 R cpsr 820003c5 +15182 clk cpu0 IS (15146) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +15183 clk cpu0 IT (15147) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +15183 clk cpu0 R cpsr 820003c5 +15184 clk cpu0 IS (15148) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +15185 clk cpu0 IT (15149) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +15185 clk cpu0 R cpsr 620003c5 +15186 clk cpu0 IT (15150) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +15187 clk cpu0 IT (15151) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +15187 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +15187 clk cpu0 MR8 03700518:000000f00518_NS 00000000_000001ec +15187 clk cpu0 R X0 0000000000000001 +15187 clk cpu0 R X1 00000000000001EC +15188 clk cpu0 IT (15152) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +15188 clk cpu0 R SP_EL1 0000000003700610 +15189 clk cpu0 IT (15153) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +15189 clk cpu0 R X0 00000000000001EC +15190 clk cpu0 IT (15154) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15190 clk cpu0 MW8 03700600:000000f00600_NS ffffffff_fe00000f +15190 clk cpu0 MW8 03700608:000000f00608_NS 00000000_000108e4 +15190 clk cpu0 R SP_EL1 0000000003700600 +15191 clk cpu0 IT (15155) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +15191 clk cpu0 R X30 00000000000381B4 +15192 clk cpu0 IT (15156) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +15192 clk cpu0 R X9 0000000003003000 +15193 clk cpu0 IT (15157) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +15193 clk cpu0 R X8 000000000000007B +15194 clk cpu0 IT (15158) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +15194 clk cpu0 R X9 00000000030039C8 +15195 clk cpu0 IT (15159) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +15195 clk cpu0 MR8 03003da0:000000803da0_NS 00000000_0009f790 +15195 clk cpu0 R X0 000000000009F790 +15196 clk cpu0 IT (15160) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +15196 clk cpu0 R cpsr 620007c5 +15197 clk cpu0 IT (15161) 0009f790:00001009f790_NS d5310be0 O EL1h_n : MRS x0,TRCIDR3 +15197 clk cpu0 R cpsr 620003c5 +15197 clk cpu0 R X0 000000000D7F0004 +15198 clk cpu0 IT (15162) 0009f794:00001009f794_NS d65f03c0 O EL1h_n : RET +15199 clk cpu0 IT (15163) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15199 clk cpu0 MR8 03700600:000000f00600_NS ffffffff_fe00000f +15199 clk cpu0 MR8 03700608:000000f00608_NS 00000000_000108e4 +15199 clk cpu0 R SP_EL1 0000000003700610 +15199 clk cpu0 R X29 FFFFFFFFFE00000F +15199 clk cpu0 R X30 00000000000108E4 +15200 clk cpu0 IT (15164) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +15200 clk cpu0 R cpsr 620003c5 +15200 clk cpu0 R PMBIDR_EL1 00000030 +15200 clk cpu0 R TRBIDR_EL1 000000000000002b +15201 clk cpu0 IT (15165) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15201 clk cpu0 MR8 03700610:000000f00610_NS ffffffff_fe00000f +15201 clk cpu0 MR8 03700618:000000f00618_NS 00000000_000108e4 +15201 clk cpu0 R SP_EL1 0000000003700620 +15201 clk cpu0 R X29 FFFFFFFFFE00000F +15201 clk cpu0 R X30 00000000000108E4 +15202 clk cpu0 IT (15166) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +15203 clk cpu0 IT (15167) 000108e4:0000100108e4_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +15203 clk cpu0 MW4 037007b8:000000f007b8_NS 0d7f0004 +15204 clk cpu0 IT (15168) 000108e8:0000100108e8_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +15204 clk cpu0 MR4 037007b8:000000f007b8_NS 0d7f0004 +15204 clk cpu0 R X8 000000000D7F0004 +15205 clk cpu0 IT (15169) 000108ec:0000100108ec_NS 52ae0009 O EL1h_n : MOV w9,#0x70000000 +15205 clk cpu0 R X9 0000000070000000 +15206 clk cpu0 IT (15170) 000108f0:0000100108f0_NS 0a090108 O EL1h_n : AND w8,w8,w9 +15206 clk cpu0 R X8 0000000000000000 +15207 clk cpu0 IT (15171) 000108f4:0000100108f4_NS 52800389 O EL1h_n : MOV w9,#0x1c +15207 clk cpu0 R X9 000000000000001C +15208 clk cpu0 IT (15172) 000108f8:0000100108f8_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +15208 clk cpu0 R X8 0000000000000000 +15209 clk cpu0 IT (15173) 000108fc:0000100108fc_NS b90197e8 O EL1h_n : STR w8,[sp,#0x194] +15209 clk cpu0 MW4 037007b4:000000f007b4_NS 00000000 +15210 clk cpu0 IT (15174) 00010900:000010010900_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +15210 clk cpu0 MR4 037007b8:000000f007b8_NS 0d7f0004 +15210 clk cpu0 R X8 000000000D7F0004 +15211 clk cpu0 IT (15175) 00010904:000010010904_NS 52860009 O EL1h_n : MOV w9,#0x3000 +15211 clk cpu0 R X9 0000000000003000 +15212 clk cpu0 IT (15176) 00010908:000010010908_NS 0a090108 O EL1h_n : AND w8,w8,w9 +15212 clk cpu0 R X8 0000000000000000 +15213 clk cpu0 IT (15177) 0001090c:00001001090c_NS 52800189 O EL1h_n : MOV w9,#0xc +15213 clk cpu0 R X9 000000000000000C +15214 clk cpu0 IT (15178) 00010910:000010010910_NS 1ac92908 O EL1h_n : ASR w8,w8,w9 +15214 clk cpu0 R X8 0000000000000000 +15215 clk cpu0 IT (15179) 00010914:000010010914_NS b90193e8 O EL1h_n : STR w8,[sp,#0x190] +15215 clk cpu0 MW4 037007b0:000000f007b0_NS 00000000 +15216 clk cpu0 IT (15180) 00010918:000010010918_NS b94197e8 O EL1h_n : LDR w8,[sp,#0x194] +15216 clk cpu0 MR4 037007b4:000000f007b4_NS 00000000 +15216 clk cpu0 R X8 0000000000000000 +15217 clk cpu0 IT (15181) 0001091c:00001001091c_NS b94193e9 O EL1h_n : LDR w9,[sp,#0x190] +15217 clk cpu0 MR4 037007b0:000000f007b0_NS 00000000 +15217 clk cpu0 R X9 0000000000000000 +15218 clk cpu0 IT (15182) 00010920:000010010920_NS b94067ea O EL1h_n : LDR w10,[sp,#0x64] +15218 clk cpu0 MR4 03700684:000000f00684_NS 00000003 +15218 clk cpu0 R X10 0000000000000003 +15219 clk cpu0 IT (15183) 00010924:000010010924_NS 1aca2129 O EL1h_n : LSL w9,w9,w10 +15219 clk cpu0 R X9 0000000000000000 +15220 clk cpu0 IT (15184) 00010928:000010010928_NS 2a090108 O EL1h_n : ORR w8,w8,w9 +15220 clk cpu0 R X8 0000000000000000 +15221 clk cpu0 IT (15185) 0001092c:00001001092c_NS b9018fe8 O EL1h_n : STR w8,[sp,#0x18c] +15221 clk cpu0 MW4 037007ac:000000f007ac_NS 00000000 +15222 clk cpu0 IT (15186) 00010930:000010010930_NS f94063eb O EL1h_n : LDR x11,[sp,#0xc0] +15222 clk cpu0 MR8 037006e0:000000f006e0_NS 00000000_038007bc +15222 clk cpu0 R X11 00000000038007BC +15223 clk cpu0 IT (15187) 00010934:000010010934_NS b9400168 O EL1h_n : LDR w8,[x11,#0] +15223 clk cpu0 MR4 038007bc:0000108007bc_NS 00000002 +15223 clk cpu0 R X8 0000000000000002 +15224 clk cpu0 IT (15188) 00010938:000010010938_NS 7100051f O EL1h_n : CMP w8,#1 +15224 clk cpu0 R cpsr 220003c5 +15225 clk cpu0 IT (15189) 0001093c:00001001093c_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +15225 clk cpu0 R X8 0000000000000000 +15226 clk cpu0 IS (15190) 00010940:000010010940_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10948 +15227 clk cpu0 IT (15191) 00010944:000010010944_NS 1400019a O EL1h_n : B 0x10fac +15228 clk cpu0 IT (15192) 00010fac:000010010fac_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +15228 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +15228 clk cpu0 R X8 0000000000000001 +15229 clk cpu0 IT (15193) 00010fb0:000010010fb0_NS 7100051f O EL1h_n : CMP w8,#1 +15229 clk cpu0 R cpsr 620003c5 +15230 clk cpu0 IT (15194) 00010fb4:000010010fb4_NS 1a9fd7e8 O EL1h_n : CSET w8,GT +15230 clk cpu0 R X8 0000000000000000 +15231 clk cpu0 IS (15195) 00010fb8:000010010fb8_NS 37000048 O EL1h_n : TBNZ w8,#0,0x10fc0 +15232 clk cpu0 IT (15196) 00010fbc:000010010fbc_NS 14000010 O EL1h_n : B 0x10ffc +15232 clk cpu0 CACHE cpu.cpu0.l1icache LINE 007f ALLOC 0x000010010fc0_NS +15232 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 03f0 ALLOC 0x000010010fc0_NS +15233 clk cpu0 IT (15197) 00010ffc:000010010ffc_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +15233 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +15233 clk cpu0 R X8 0000000000000001 +15233 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0080 ALLOC 0x000010011000_NS +15233 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0400 ALLOC 0x000010011000_NS +15234 clk cpu0 IT (15198) 00011000:000010011000_NS 7100051f O EL1h_n : CMP w8,#1 +15234 clk cpu0 R cpsr 620003c5 +15235 clk cpu0 IT (15199) 00011004:000010011004_NS 1a9fd7e8 O EL1h_n : CSET w8,GT +15235 clk cpu0 R X8 0000000000000000 +15236 clk cpu0 IS (15200) 00011008:000010011008_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11010 +15237 clk cpu0 IT (15201) 0001100c:00001001100c_NS 14000008 O EL1h_n : B 0x1102c +15238 clk cpu0 IT (15202) 0001102c:00001001102c_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +15238 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +15238 clk cpu0 R X8 0000000000000001 +15239 clk cpu0 IT (15203) 00011030:000010011030_NS 7100051f O EL1h_n : CMP w8,#1 +15239 clk cpu0 R cpsr 620003c5 +15240 clk cpu0 IT (15204) 00011034:000010011034_NS 1a9f17e8 O EL1h_n : CSET w8,EQ +15240 clk cpu0 R X8 0000000000000001 +15241 clk cpu0 IT (15205) 00011038:000010011038_NS 37000088 O EL1h_n : TBNZ w8,#0,0x11048 +15241 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0083 ALLOC 0x000010011040_NS +15241 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0410 ALLOC 0x000010011040_NS +15242 clk cpu0 IT (15206) 00011048:000010011048_NS 52800028 O EL1h_n : MOV w8,#1 +15242 clk cpu0 R X8 0000000000000001 +15243 clk cpu0 IT (15207) 0001104c:00001001104c_NS 2a0803e0 O EL1h_n : MOV w0,w8 +15243 clk cpu0 R X0 0000000000000001 +15244 clk cpu0 IT (15208) 00011050:000010011050_NS f00001c1 O EL1h_n : ADRP x1,0x4c050 +15244 clk cpu0 R X1 000000000004C000 +15245 clk cpu0 IT (15209) 00011054:000010011054_NS 9132a821 O EL1h_n : ADD x1,x1,#0xcaa +15245 clk cpu0 R X1 000000000004CCAA +15246 clk cpu0 IT (15210) 00011058:000010011058_NS b90013e8 O EL1h_n : STR w8,[sp,#0x10] +15246 clk cpu0 MW4 03700630:000000f00630_NS 00000001 +15247 clk cpu0 IT (15211) 0001105c:00001001105c_NS 94022d1c O EL1h_n : BL 0x9c4cc +15247 clk cpu0 R X30 0000000000011060 +15248 clk cpu0 IT (15212) 0009c4cc:00001009c4cc_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +15248 clk cpu0 R SP_EL1 0000000003700590 +15249 clk cpu0 IT (15213) 0009c4d0:00001009c4d0_NS d0030bc8 O EL1h_n : ADRP x8,0x62164d0 +15249 clk cpu0 R X8 0000000006216000 +15250 clk cpu0 IT (15214) 0009c4d4:00001009c4d4_NS b940f908 O EL1h_n : LDR w8,[x8,#0xf8] +15250 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +15250 clk cpu0 R X8 0000000000000003 +15251 clk cpu0 IT (15215) 0009c4d8:00001009c4d8_NS a90753f5 O EL1h_n : STP x21,x20,[sp,#0x70] +15251 clk cpu0 MW8 03700600:000000f00600_NS 00000000_02f00028 +15251 clk cpu0 MW8 03700608:000000f00608_NS ff83ff83_ff83ff83 +15252 clk cpu0 IT (15216) 0009c4dc:00001009c4dc_NS a9087bf3 O EL1h_n : STP x19,x30,[sp,#0x80] +15252 clk cpu0 MW8 03700610:000000f00610_NS 00000000_062160a2 +15252 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00011060 +15253 clk cpu0 IT (15217) 0009c4e0:00001009c4e0_NS a9000fe2 O EL1h_n : STP x2,x3,[sp,#0] +15253 clk cpu0 MW8 03700590:000000f00590_NS 00000000_00000003 +15253 clk cpu0 MW8 03700598:000000f00598_NS 00000000_00000000 +15254 clk cpu0 IT (15218) 0009c4e4:00001009c4e4_NS 6b00011f O EL1h_n : CMP w8,w0 +15254 clk cpu0 R cpsr 220003c5 +15255 clk cpu0 IT (15219) 0009c4e8:00001009c4e8_NS a90117e4 O EL1h_n : STP x4,x5,[sp,#0x10] +15255 clk cpu0 MW8 037005a0:000000f005a0_NS 00000000_030293f0 +15255 clk cpu0 MW8 037005a8:000000f005a8_NS f800f800_f800f800 +15256 clk cpu0 IT (15220) 0009c4ec:00001009c4ec_NS a9021fe6 O EL1h_n : STP x6,x7,[sp,#0x20] +15256 clk cpu0 MW8 037005b0:000000f005b0_NS 00000000_90000000 +15256 clk cpu0 MW8 037005b8:000000f005b8_NS 03ff8000_03ff8000 +15257 clk cpu0 IT (15221) 0009c4f0:00001009c4f0_NS a9067fff O EL1h_n : STP xzr,xzr,[sp,#0x60] +15257 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000000 +15257 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000000 +15258 clk cpu0 IT (15222) 0009c4f4:00001009c4f4_NS a9057fff O EL1h_n : STP xzr,xzr,[sp,#0x50] +15258 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000000 +15258 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00000000 +15259 clk cpu0 IS (15223) 0009c4f8:00001009c4f8_NS 54000423 O EL1h_n : B.CC 0x9c57c +15260 clk cpu0 IT (15224) 0009c4fc:00001009c4fc_NS 90017b74 O EL1h_n : ADRP x20,0x30084fc +15260 clk cpu0 R X20 0000000003008000 +15261 clk cpu0 IT (15225) 0009c500:00001009c500_NS 9114a294 O EL1h_n : ADD x20,x20,#0x528 +15261 clk cpu0 R X20 0000000003008528 +15262 clk cpu0 IT (15226) 0009c504:00001009c504_NS aa1403e0 O EL1h_n : MOV x0,x20 +15262 clk cpu0 R X0 0000000003008528 +15263 clk cpu0 IT (15227) 0009c508:00001009c508_NS aa0103f3 O EL1h_n : MOV x19,x1 +15263 clk cpu0 R X19 000000000004CCAA +15264 clk cpu0 IT (15228) 0009c50c:00001009c50c_NS 97fff114 O EL1h_n : BL 0x9895c +15264 clk cpu0 R X30 000000000009C510 +15265 clk cpu0 IT (15229) 0009895c:00001009895c_NS d0030be8 O EL1h_n : ADRP x8,0x621695c +15265 clk cpu0 R X8 0000000006216000 +15266 clk cpu0 IT (15230) 00098960:000010098960_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +15266 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +15266 clk cpu0 R X8 0000000000000001 +15267 clk cpu0 IT (15231) 00098964:000010098964_NS 7100091f O EL1h_n : CMP w8,#2 +15267 clk cpu0 R cpsr 820003c5 +15268 clk cpu0 IT (15232) 00098968:000010098968_NS 54000043 O EL1h_n : B.CC 0x98970 +15269 clk cpu0 IT (15233) 00098970:000010098970_NS d65f03c0 O EL1h_n : RET +15270 clk cpu0 IT (15234) 0009c510:00001009c510_NS 910003e9 O EL1h_n : MOV x9,sp +15270 clk cpu0 R X9 0000000003700590 +15271 clk cpu0 IT (15235) 0009c514:00001009c514_NS 128005e8 O EL1h_n : MOV w8,#0xffffffd0 +15271 clk cpu0 R X8 00000000FFFFFFD0 +15272 clk cpu0 IT (15236) 0009c518:00001009c518_NS 910243ea O EL1h_n : ADD x10,sp,#0x90 +15272 clk cpu0 R X10 0000000003700620 +15273 clk cpu0 IT (15237) 0009c51c:00001009c51c_NS 9100c129 O EL1h_n : ADD x9,x9,#0x30 +15273 clk cpu0 R X9 00000000037005C0 +15274 clk cpu0 IT (15238) 0009c520:00001009c520_NS 2a1f03e0 O EL1h_n : MOV w0,wzr +15274 clk cpu0 R X0 0000000000000000 +15275 clk cpu0 IT (15239) 0009c524:00001009c524_NS 2a1f03e1 O EL1h_n : MOV w1,wzr +15275 clk cpu0 R X1 0000000000000000 +15276 clk cpu0 IT (15240) 0009c528:00001009c528_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +15276 clk cpu0 R X2 0000000000000000 +15277 clk cpu0 IT (15241) 0009c52c:00001009c52c_NS f90037e8 O EL1h_n : STR x8,[sp,#0x68] +15277 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_ffffffd0 +15278 clk cpu0 IT (15242) 0009c530:00001009c530_NS a90527ea O EL1h_n : STP x10,x9,[sp,#0x50] +15278 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_03700620 +15278 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_037005c0 +15279 clk cpu0 IT (15243) 0009c534:00001009c534_NS d503201f O EL1h_n : NOP +15280 clk cpu0 IT (15244) 0009c538:00001009c538_NS a945a3ea O EL1h_n : LDP x10,x8,[sp,#0x58] +15280 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_037005c0 +15280 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +15280 clk cpu0 R X8 0000000000000000 +15280 clk cpu0 R X10 00000000037005C0 +15281 clk cpu0 IT (15245) 0009c53c:00001009c53c_NS f9402be9 O EL1h_n : LDR x9,[sp,#0x50] +15281 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_03700620 +15281 clk cpu0 R X9 0000000003700620 +15282 clk cpu0 IT (15246) 0009c540:00001009c540_NS f94037eb O EL1h_n : LDR x11,[sp,#0x68] +15282 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_ffffffd0 +15282 clk cpu0 R X11 00000000FFFFFFD0 +15283 clk cpu0 IT (15247) 0009c544:00001009c544_NS 2a0003f5 O EL1h_n : MOV w21,w0 +15283 clk cpu0 R X21 0000000000000000 +15284 clk cpu0 IT (15248) 0009c548:00001009c548_NS 9100c3e1 O EL1h_n : ADD x1,sp,#0x30 +15284 clk cpu0 R X1 00000000037005C0 +15285 clk cpu0 IT (15249) 0009c54c:00001009c54c_NS aa1303e0 O EL1h_n : MOV x0,x19 +15285 clk cpu0 R X0 000000000004CCAA +15286 clk cpu0 IT (15250) 0009c550:00001009c550_NS a903a3ea O EL1h_n : STP x10,x8,[sp,#0x38] +15286 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_037005c0 +15286 clk cpu0 MW8 037005d0:000000f005d0_NS 00000000_00000000 +15287 clk cpu0 IT (15251) 0009c554:00001009c554_NS f9001be9 O EL1h_n : STR x9,[sp,#0x30] +15287 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_03700620 +15288 clk cpu0 IT (15252) 0009c558:00001009c558_NS f90027eb O EL1h_n : STR x11,[sp,#0x48] +15288 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_ffffffd0 +15289 clk cpu0 IT (15253) 0009c55c:00001009c55c_NS 97ffd97b O EL1h_n : BL 0x92b48 +15289 clk cpu0 R X30 000000000009C560 +15290 clk cpu0 IT (15254) 00092b48:000010092b48_NS d10283ff O EL1h_n : SUB sp,sp,#0xa0 +15290 clk cpu0 R SP_EL1 00000000037004F0 +15291 clk cpu0 IT (15255) 00092b4c:000010092b4c_NS a9097bf3 O EL1h_n : STP x19,x30,[sp,#0x90] +15291 clk cpu0 MW8 03700580:000000f00580_NS 00000000_0004ccaa +15291 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0009c560 +15292 clk cpu0 IT (15256) 00092b50:000010092b50_NS aa0103f3 O EL1h_n : MOV x19,x1 +15292 clk cpu0 R X19 00000000037005C0 +15293 clk cpu0 IT (15257) 00092b54:000010092b54_NS d0fffdc1 O EL1h_n : ADRP x1,0x4cb54 +15293 clk cpu0 R X1 000000000004C000 +15294 clk cpu0 IT (15258) 00092b58:000010092b58_NS a90853f5 O EL1h_n : STP x21,x20,[sp,#0x80] +15294 clk cpu0 MW8 03700570:000000f00570_NS 00000000_00000000 +15294 clk cpu0 MW8 03700578:000000f00578_NS 00000000_03008528 +15295 clk cpu0 IT (15259) 00092b5c:000010092b5c_NS aa0003f4 O EL1h_n : MOV x20,x0 +15295 clk cpu0 R X20 000000000004CCAA +15296 clk cpu0 IT (15260) 00092b60:000010092b60_NS 91002c21 O EL1h_n : ADD x1,x1,#0xb +15296 clk cpu0 R X1 000000000004C00B +15297 clk cpu0 IT (15261) 00092b64:000010092b64_NS 910013e0 O EL1h_n : ADD x0,sp,#4 +15297 clk cpu0 R X0 00000000037004F4 +15298 clk cpu0 IT (15262) 00092b68:000010092b68_NS 52800762 O EL1h_n : MOV w2,#0x3b +15298 clk cpu0 R X2 000000000000003B +15299 clk cpu0 IT (15263) 00092b6c:000010092b6c_NS f90023fc O EL1h_n : STR x28,[sp,#0x40] +15299 clk cpu0 MW8 03700530:000000f00530_NS ff7fff7f_ff7fff7f +15300 clk cpu0 IT (15264) 00092b70:000010092b70_NS a9056bfb O EL1h_n : STP x27,x26,[sp,#0x50] +15300 clk cpu0 MW8 03700540:000000f00540_NS 00010001_00010001 +15300 clk cpu0 MW8 03700548:000000f00548_NS ffe000ff_ffe000ff +15301 clk cpu0 IT (15265) 00092b74:000010092b74_NS a90663f9 O EL1h_n : STP x25,x24,[sp,#0x60] +15301 clk cpu0 MW8 03700550:000000f00550_NS 00000000_0000003c +15301 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00007c00 +15302 clk cpu0 IT (15266) 00092b78:000010092b78_NS a9075bf7 O EL1h_n : STP x23,x22,[sp,#0x70] +15302 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00000000 +15302 clk cpu0 MW8 03700568:000000f00568_NS 00000000_90000000 +15303 clk cpu0 IT (15267) 00092b7c:000010092b7c_NS 97fdf655 O EL1h_n : BL 0x104d0 +15303 clk cpu0 R X30 0000000000092B80 +15304 clk cpu0 IT (15268) 000104d0:0000100104d0_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +15304 clk cpu0 MW8 037004e0:000000f004e0_NS 00000000_037005c0 +15304 clk cpu0 MW8 037004e8:000000f004e8_NS 00000000_00092b80 +15304 clk cpu0 R SP_EL1 00000000037004E0 +15305 clk cpu0 IT (15269) 000104d4:0000100104d4_NS aa0003f3 O EL1h_n : MOV x19,x0 +15305 clk cpu0 R X19 00000000037004F4 +15306 clk cpu0 IT (15270) 000104d8:0000100104d8_NS 9400002b O EL1h_n : BL 0x10584 +15306 clk cpu0 R X30 00000000000104DC +15307 clk cpu0 IT (15271) 00010584:000010010584_NS f100105f O EL1h_n : CMP x2,#4 +15307 clk cpu0 R cpsr 220003c5 +15308 clk cpu0 IS (15272) 00010588:000010010588_NS 54000643 O EL1h_n : B.CC 0x10650 +15309 clk cpu0 IT (15273) 0001058c:00001001058c_NS f240041f O EL1h_n : TST x0,#3 +15309 clk cpu0 R cpsr 420003c5 +15310 clk cpu0 IT (15274) 00010590:000010010590_NS 54000320 O EL1h_n : B.EQ 0x105f4 +15311 clk cpu0 IT (15275) 000105f4:0000100105f4_NS 7200042a O EL1h_n : ANDS w10,w1,#3 +15311 clk cpu0 R cpsr 020003c5 +15311 clk cpu0 R X10 0000000000000003 +15312 clk cpu0 IS (15276) 000105f8:0000100105f8_NS 54000440 O EL1h_n : B.EQ 0x10680 +15313 clk cpu0 IT (15277) 000105fc:0000100105fc_NS 52800409 O EL1h_n : MOV w9,#0x20 +15313 clk cpu0 R X9 0000000000000020 +15314 clk cpu0 IT (15278) 00010600:000010010600_NS cb0a0028 O EL1h_n : SUB x8,x1,x10 +15314 clk cpu0 R X8 000000000004C008 +15315 clk cpu0 IT (15279) 00010604:000010010604_NS f100105f O EL1h_n : CMP x2,#4 +15315 clk cpu0 R cpsr 220003c5 +15316 clk cpu0 IT (15280) 00010608:000010010608_NS 4b0a0d29 O EL1h_n : SUB w9,w9,w10,LSL #3 +15316 clk cpu0 R X9 0000000000000008 +15317 clk cpu0 IS (15281) 0001060c:00001001060c_NS 540001c3 O EL1h_n : B.CC 0x10644 +15318 clk cpu0 IT (15282) 00010610:000010010610_NS b940010c O EL1h_n : LDR w12,[x8,#0] +15318 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +15318 clk cpu0 R X12 000000000A00000A +15319 clk cpu0 IT (15283) 00010614:000010010614_NS 531d714a O EL1h_n : UBFIZ w10,w10,#3,#29 +15319 clk cpu0 R X10 0000000000000018 +15320 clk cpu0 IT (15284) 00010618:000010010618_NS aa0203eb O EL1h_n : MOV x11,x2 +15320 clk cpu0 R X11 000000000000003B +15321 clk cpu0 IT (15285) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15321 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +15321 clk cpu0 R X8 000000000004C00C +15321 clk cpu0 R X13 000000006F727245 +15322 clk cpu0 IT (15286) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15322 clk cpu0 R X12 000000000000000A +15323 clk cpu0 IT (15287) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15323 clk cpu0 R X11 0000000000000037 +15324 clk cpu0 IT (15288) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15324 clk cpu0 R cpsr 220003c5 +15325 clk cpu0 IT (15289) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15325 clk cpu0 R X14 0000000072724500 +15326 clk cpu0 IT (15290) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15326 clk cpu0 R X12 000000007272450A +15327 clk cpu0 IT (15291) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15327 clk cpu0 MW4 037004f4:000000f004f4_NS 7272450a +15327 clk cpu0 R X0 00000000037004F8 +15328 clk cpu0 IT (15292) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15328 clk cpu0 R X12 000000006F727245 +15329 clk cpu0 IT (15293) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15330 clk cpu0 IT (15294) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15330 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +15330 clk cpu0 R X8 000000000004C010 +15330 clk cpu0 R X13 0000000049203A72 +15331 clk cpu0 IT (15295) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15331 clk cpu0 R X12 000000000000006F +15332 clk cpu0 IT (15296) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15332 clk cpu0 R X11 0000000000000033 +15333 clk cpu0 IT (15297) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15333 clk cpu0 R cpsr 220003c5 +15334 clk cpu0 IT (15298) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15334 clk cpu0 R X14 00000000203A7200 +15335 clk cpu0 IT (15299) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15335 clk cpu0 R X12 00000000203A726F +15336 clk cpu0 IT (15300) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15336 clk cpu0 MW4 037004f8:000000f004f8_NS 203a726f +15336 clk cpu0 R X0 00000000037004FC +15337 clk cpu0 IT (15301) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15337 clk cpu0 R X12 0000000049203A72 +15338 clk cpu0 IT (15302) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15339 clk cpu0 IT (15303) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15339 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +15339 clk cpu0 R X8 000000000004C014 +15339 clk cpu0 R X13 0000000067656C6C +15340 clk cpu0 IT (15304) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15340 clk cpu0 R X12 0000000000000049 +15341 clk cpu0 IT (15305) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15341 clk cpu0 R X11 000000000000002F +15342 clk cpu0 IT (15306) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15342 clk cpu0 R cpsr 220003c5 +15343 clk cpu0 IT (15307) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15343 clk cpu0 R X14 00000000656C6C00 +15344 clk cpu0 IT (15308) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15344 clk cpu0 R X12 00000000656C6C49 +15345 clk cpu0 IT (15309) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15345 clk cpu0 MW4 037004fc:000000f004fc_NS 656c6c49 +15345 clk cpu0 R X0 0000000003700500 +15346 clk cpu0 IT (15310) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15346 clk cpu0 R X12 0000000067656C6C +15347 clk cpu0 IT (15311) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15348 clk cpu0 IT (15312) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15348 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +15348 clk cpu0 R X8 000000000004C018 +15348 clk cpu0 R X13 0000000066206C61 +15349 clk cpu0 IT (15313) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15349 clk cpu0 R X12 0000000000000067 +15350 clk cpu0 IT (15314) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15350 clk cpu0 R X11 000000000000002B +15351 clk cpu0 IT (15315) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15351 clk cpu0 R cpsr 220003c5 +15352 clk cpu0 IT (15316) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15352 clk cpu0 R X14 00000000206C6100 +15353 clk cpu0 IT (15317) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15353 clk cpu0 R X12 00000000206C6167 +15354 clk cpu0 IT (15318) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15354 clk cpu0 MW4 03700500:000000f00500_NS 206c6167 +15354 clk cpu0 R X0 0000000003700504 +15355 clk cpu0 IT (15319) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15355 clk cpu0 R X12 0000000066206C61 +15356 clk cpu0 IT (15320) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15357 clk cpu0 IT (15321) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15357 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +15357 clk cpu0 R X8 000000000004C01C +15357 clk cpu0 R X13 00000000616D726F +15358 clk cpu0 IT (15322) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15358 clk cpu0 R X12 0000000000000066 +15359 clk cpu0 IT (15323) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15359 clk cpu0 R X11 0000000000000027 +15360 clk cpu0 IT (15324) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15360 clk cpu0 R cpsr 220003c5 +15361 clk cpu0 IT (15325) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15361 clk cpu0 R X14 000000006D726F00 +15362 clk cpu0 IT (15326) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15362 clk cpu0 R X12 000000006D726F66 +15363 clk cpu0 IT (15327) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15363 clk cpu0 MW4 03700504:000000f00504_NS 6d726f66 +15363 clk cpu0 R X0 0000000003700508 +15364 clk cpu0 IT (15328) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15364 clk cpu0 R X12 00000000616D726F +15365 clk cpu0 IT (15329) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15366 clk cpu0 IT (15330) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15366 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +15366 clk cpu0 R X8 000000000004C020 +15366 clk cpu0 R X13 0000000070732074 +15367 clk cpu0 IT (15331) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15367 clk cpu0 R X12 0000000000000061 +15368 clk cpu0 IT (15332) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15368 clk cpu0 R X11 0000000000000023 +15369 clk cpu0 IT (15333) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15369 clk cpu0 R cpsr 220003c5 +15370 clk cpu0 IT (15334) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15370 clk cpu0 R X14 0000000073207400 +15371 clk cpu0 IT (15335) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15371 clk cpu0 R X12 0000000073207461 +15372 clk cpu0 IT (15336) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15372 clk cpu0 MW4 03700508:000000f00508_NS 73207461 +15372 clk cpu0 R X0 000000000370050C +15373 clk cpu0 IT (15337) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15373 clk cpu0 R X12 0000000070732074 +15374 clk cpu0 IT (15338) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15375 clk cpu0 IT (15339) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15375 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +15375 clk cpu0 R X8 000000000004C024 +15375 clk cpu0 R X13 0000000066696365 +15376 clk cpu0 IT (15340) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15376 clk cpu0 R X12 0000000000000070 +15377 clk cpu0 IT (15341) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15377 clk cpu0 R X11 000000000000001F +15378 clk cpu0 IT (15342) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15378 clk cpu0 R cpsr 220003c5 +15379 clk cpu0 IT (15343) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15379 clk cpu0 R X14 0000000069636500 +15380 clk cpu0 IT (15344) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15380 clk cpu0 R X12 0000000069636570 +15381 clk cpu0 IT (15345) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15381 clk cpu0 MW4 0370050c:000000f0050c_NS 69636570 +15381 clk cpu0 R X0 0000000003700510 +15382 clk cpu0 IT (15346) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15382 clk cpu0 R X12 0000000066696365 +15383 clk cpu0 IT (15347) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15384 clk cpu0 IT (15348) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15384 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +15384 clk cpu0 R X8 000000000004C028 +15384 clk cpu0 R X13 0000000020726569 +15385 clk cpu0 IT (15349) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15385 clk cpu0 R X12 0000000000000066 +15386 clk cpu0 IT (15350) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15386 clk cpu0 R X11 000000000000001B +15387 clk cpu0 IT (15351) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15387 clk cpu0 R cpsr 220003c5 +15388 clk cpu0 IT (15352) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15388 clk cpu0 R X14 0000000072656900 +15389 clk cpu0 IT (15353) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15389 clk cpu0 R X12 0000000072656966 +15390 clk cpu0 IT (15354) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15390 clk cpu0 MW4 03700510:000000f00510_NS 72656966 +15390 clk cpu0 R X0 0000000003700514 +15391 clk cpu0 IT (15355) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15391 clk cpu0 R X12 0000000020726569 +15392 clk cpu0 IT (15356) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15393 clk cpu0 IT (15357) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15393 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +15393 clk cpu0 R X8 000000000004C02C +15393 clk cpu0 R X13 0000000064657375 +15394 clk cpu0 IT (15358) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15394 clk cpu0 R X12 0000000000000020 +15395 clk cpu0 IT (15359) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15395 clk cpu0 R X11 0000000000000017 +15396 clk cpu0 IT (15360) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15396 clk cpu0 R cpsr 220003c5 +15397 clk cpu0 IT (15361) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15397 clk cpu0 R X14 0000000065737500 +15398 clk cpu0 IT (15362) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15398 clk cpu0 R X12 0000000065737520 +15399 clk cpu0 IT (15363) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15399 clk cpu0 MW4 03700514:000000f00514_NS 65737520 +15399 clk cpu0 R X0 0000000003700518 +15400 clk cpu0 IT (15364) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15400 clk cpu0 R X12 0000000064657375 +15401 clk cpu0 IT (15365) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15402 clk cpu0 IT (15366) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15402 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +15402 clk cpu0 R X8 000000000004C030 +15402 clk cpu0 R X13 000000005F27203A +15403 clk cpu0 IT (15367) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15403 clk cpu0 R X12 0000000000000064 +15404 clk cpu0 IT (15368) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15404 clk cpu0 R X11 0000000000000013 +15405 clk cpu0 IT (15369) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15405 clk cpu0 R cpsr 220003c5 +15406 clk cpu0 IT (15370) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15406 clk cpu0 R X14 0000000027203A00 +15407 clk cpu0 IT (15371) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15407 clk cpu0 R X12 0000000027203A64 +15408 clk cpu0 IT (15372) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15408 clk cpu0 MW4 03700518:000000f00518_NS 27203a64 +15408 clk cpu0 R X0 000000000370051C +15409 clk cpu0 IT (15373) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15409 clk cpu0 R X12 000000005F27203A +15410 clk cpu0 IT (15374) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15411 clk cpu0 IT (15375) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15411 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +15411 clk cpu0 R X8 000000000004C034 +15411 clk cpu0 R X13 0000000045202E27 +15412 clk cpu0 IT (15376) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15412 clk cpu0 R X12 000000000000005F +15413 clk cpu0 IT (15377) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15413 clk cpu0 R X11 000000000000000F +15414 clk cpu0 IT (15378) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15414 clk cpu0 R cpsr 220003c5 +15415 clk cpu0 IT (15379) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15415 clk cpu0 R X14 00000000202E2700 +15416 clk cpu0 IT (15380) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15416 clk cpu0 R X12 00000000202E275F +15417 clk cpu0 IT (15381) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15417 clk cpu0 MW4 0370051c:000000f0051c_NS 202e275f +15417 clk cpu0 R X0 0000000003700520 +15418 clk cpu0 IT (15382) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15418 clk cpu0 R X12 0000000045202E27 +15419 clk cpu0 IT (15383) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15420 clk cpu0 IT (15384) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15420 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +15420 clk cpu0 R X8 000000000004C038 +15420 clk cpu0 R X13 000000006E69646E +15421 clk cpu0 IT (15385) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15421 clk cpu0 R X12 0000000000000045 +15422 clk cpu0 IT (15386) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15422 clk cpu0 R X11 000000000000000B +15423 clk cpu0 IT (15387) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15423 clk cpu0 R cpsr 220003c5 +15424 clk cpu0 IT (15388) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15424 clk cpu0 R X14 0000000069646E00 +15425 clk cpu0 IT (15389) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15425 clk cpu0 R X12 0000000069646E45 +15426 clk cpu0 IT (15390) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15426 clk cpu0 MW4 03700520:000000f00520_NS 69646e45 +15426 clk cpu0 R X0 0000000003700524 +15427 clk cpu0 IT (15391) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15427 clk cpu0 R X12 000000006E69646E +15428 clk cpu0 IT (15392) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15429 clk cpu0 IT (15393) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15429 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +15429 clk cpu0 R X8 000000000004C03C +15429 clk cpu0 R X13 0000000065542067 +15430 clk cpu0 IT (15394) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15430 clk cpu0 R X12 000000000000006E +15431 clk cpu0 IT (15395) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15431 clk cpu0 R X11 0000000000000007 +15432 clk cpu0 IT (15396) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15432 clk cpu0 R cpsr 220003c5 +15433 clk cpu0 IT (15397) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15433 clk cpu0 R X14 0000000054206700 +15434 clk cpu0 IT (15398) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15434 clk cpu0 R X12 000000005420676E +15435 clk cpu0 IT (15399) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15435 clk cpu0 MW4 03700524:000000f00524_NS 5420676e +15435 clk cpu0 R X0 0000000003700528 +15436 clk cpu0 IT (15400) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15436 clk cpu0 R X12 0000000065542067 +15437 clk cpu0 IT (15401) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15438 clk cpu0 IT (15402) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15438 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +15438 clk cpu0 R X8 000000000004C040 +15438 clk cpu0 R X13 000000000A2E7473 +15439 clk cpu0 IT (15403) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15439 clk cpu0 R X12 0000000000000065 +15440 clk cpu0 IT (15404) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15440 clk cpu0 R X11 0000000000000003 +15441 clk cpu0 IT (15405) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15441 clk cpu0 R cpsr 620003c5 +15442 clk cpu0 IT (15406) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15442 clk cpu0 R X14 000000002E747300 +15443 clk cpu0 IT (15407) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15443 clk cpu0 R X12 000000002E747365 +15444 clk cpu0 IT (15408) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15444 clk cpu0 MW4 03700528:000000f00528_NS 2e747365 +15444 clk cpu0 R X0 000000000370052C +15445 clk cpu0 IT (15409) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15445 clk cpu0 R X12 000000000A2E7473 +15446 clk cpu0 IS (15410) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15447 clk cpu0 IT (15411) 00010640:000010010640_NS 92400442 O EL1h_n : AND x2,x2,#3 +15447 clk cpu0 R X2 0000000000000003 +15448 clk cpu0 IT (15412) 00010644:000010010644_NS 53037d29 O EL1h_n : LSR w9,w9,#3 +15448 clk cpu0 R X9 0000000000000001 +15449 clk cpu0 IT (15413) 00010648:000010010648_NS cb090108 O EL1h_n : SUB x8,x8,x9 +15449 clk cpu0 R X8 000000000004C03F +15450 clk cpu0 IT (15414) 0001064c:00001001064c_NS 91001101 O EL1h_n : ADD x1,x8,#4 +15450 clk cpu0 R X1 000000000004C043 +15451 clk cpu0 IT (15415) 00010650:000010010650_NS 7100045f O EL1h_n : CMP w2,#1 +15451 clk cpu0 R cpsr 220003c5 +15452 clk cpu0 IS (15416) 00010654:000010010654_NS 5400014b O EL1h_n : B.LT 0x1067c +15453 clk cpu0 IT (15417) 00010658:000010010658_NS 39400028 O EL1h_n : LDRB w8,[x1,#0] +15453 clk cpu0 MR1 0004c043:00001004c043_NS 0a +15453 clk cpu0 R X8 000000000000000A +15454 clk cpu0 IT (15418) 0001065c:00001001065c_NS 39000008 O EL1h_n : STRB w8,[x0,#0] +15454 clk cpu0 MW1 0370052c:000000f0052c_NS 0a +15455 clk cpu0 IS (15419) 00010660:000010010660_NS 540000e0 O EL1h_n : B.EQ 0x1067c +15456 clk cpu0 IT (15420) 00010664:000010010664_NS 39400428 O EL1h_n : LDRB w8,[x1,#1] +15456 clk cpu0 MR1 0004c044:00001004c044_NS 00 +15456 clk cpu0 R X8 0000000000000000 +15457 clk cpu0 IT (15421) 00010668:000010010668_NS 71000c5f O EL1h_n : CMP w2,#3 +15457 clk cpu0 R cpsr 620003c5 +15458 clk cpu0 IT (15422) 0001066c:00001001066c_NS 39000408 O EL1h_n : STRB w8,[x0,#1] +15458 clk cpu0 MW1 0370052d:000000f0052d_NS 00 +15459 clk cpu0 IS (15423) 00010670:000010010670_NS 5400006b O EL1h_n : B.LT 0x1067c +15460 clk cpu0 IT (15424) 00010674:000010010674_NS 39400828 O EL1h_n : LDRB w8,[x1,#2] +15460 clk cpu0 MR1 0004c045:00001004c045_NS 00 +15460 clk cpu0 R X8 0000000000000000 +15461 clk cpu0 IT (15425) 00010678:000010010678_NS 39000808 O EL1h_n : STRB w8,[x0,#2] +15461 clk cpu0 MW1 0370052e:000000f0052e_NS 00 +15462 clk cpu0 IT (15426) 0001067c:00001001067c_NS d65f03c0 O EL1h_n : RET +15463 clk cpu0 IT (15427) 000104dc:0000100104dc_NS aa1303e0 O EL1h_n : MOV x0,x19 +15463 clk cpu0 R X0 00000000037004F4 +15464 clk cpu0 IT (15428) 000104e0:0000100104e0_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +15464 clk cpu0 MR8 037004e0:000000f004e0_NS 00000000_037005c0 +15464 clk cpu0 MR8 037004e8:000000f004e8_NS 00000000_00092b80 +15464 clk cpu0 R SP_EL1 00000000037004F0 +15464 clk cpu0 R X19 00000000037005C0 +15464 clk cpu0 R X30 0000000000092B80 +15465 clk cpu0 IT (15429) 000104e4:0000100104e4_NS d65f03c0 O EL1h_n : RET +15466 clk cpu0 IT (15430) 00092b80:000010092b80_NS d0fffdd6 O EL1h_n : ADRP x22,0x4cb80 +15466 clk cpu0 R X22 000000000004C000 +15467 clk cpu0 IT (15431) 00092b84:000010092b84_NS d0fffdd7 O EL1h_n : ADRP x23,0x4cb84 +15467 clk cpu0 R X23 000000000004C000 +15468 clk cpu0 IT (15432) 00092b88:000010092b88_NS 2a1f03fa O EL1h_n : MOV w26,wzr +15468 clk cpu0 R X26 0000000000000000 +15469 clk cpu0 IT (15433) 00092b8c:000010092b8c_NS f0017cb5 O EL1h_n : ADRP x21,0x3029b8c +15469 clk cpu0 R X21 0000000003029000 +15470 clk cpu0 IT (15434) 00092b90:000010092b90_NS 910422d6 O EL1h_n : ADD x22,x22,#0x108 +15470 clk cpu0 R X22 000000000004C108 +15471 clk cpu0 IT (15435) 00092b94:000010092b94_NS 9104a6f7 O EL1h_n : ADD x23,x23,#0x129 +15471 clk cpu0 R X23 000000000004C129 +15472 clk cpu0 IT (15436) 00092b98:000010092b98_NS f0017d78 O EL1h_n : ADRP x24,0x3041b98 +15472 clk cpu0 R X24 0000000003041000 +15473 clk cpu0 IT (15437) 00092b9c:000010092b9c_NS 90030c39 O EL1h_n : ADRP x25,0x6216b9c +15473 clk cpu0 R X25 0000000006216000 +15474 clk cpu0 IT (15438) 00092ba0:000010092ba0_NS 14000005 O EL1h_n : B 0x92bb4 +15475 clk cpu0 IT (15439) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15475 clk cpu0 MR1 0004ccaa:00001004ccaa_NS 64 +15475 clk cpu0 R X8 0000000000000064 +15476 clk cpu0 IT (15440) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15476 clk cpu0 R cpsr 220003c5 +15477 clk cpu0 IS (15441) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15478 clk cpu0 IS (15442) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15479 clk cpu0 IT (15443) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +15479 clk cpu0 R cpsr 020003c5 +15480 clk cpu0 IT (15444) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +15481 clk cpu0 IT (15445) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15481 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15481 clk cpu0 R X9 0000000013000000 +15482 clk cpu0 IT (15446) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +15482 clk cpu0 R X27 000000000004CCAA +15483 clk cpu0 IT (15447) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +15483 clk cpu0 R X20 000000000004CCAB +15484 clk cpu0 IT (15448) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +15484 clk cpu0 MW1 13000000:000013000000_NS 64 +15485 clk cpu0 IT (15449) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15485 clk cpu0 MR1 0004ccab:00001004ccab_NS 69 +15485 clk cpu0 R X8 0000000000000069 +15486 clk cpu0 IT (15450) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15486 clk cpu0 R cpsr 220003c5 +15487 clk cpu0 IS (15451) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15488 clk cpu0 IS (15452) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15489 clk cpu0 IT (15453) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +15489 clk cpu0 R cpsr 020003c5 +15490 clk cpu0 IT (15454) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +15491 clk cpu0 IT (15455) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15491 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15491 clk cpu0 R X9 0000000013000000 +15492 clk cpu0 IT (15456) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +15492 clk cpu0 R X27 000000000004CCAB +15493 clk cpu0 IT (15457) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +15493 clk cpu0 R X20 000000000004CCAC +15494 clk cpu0 IT (15458) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +15494 clk cpu0 MW1 13000000:000013000000_NS 69 +15495 clk cpu0 IT (15459) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15495 clk cpu0 MR1 0004ccac:00001004ccac_NS 73 +15495 clk cpu0 R X8 0000000000000073 +15496 clk cpu0 IT (15460) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15496 clk cpu0 R cpsr 220003c5 +15497 clk cpu0 IS (15461) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15498 clk cpu0 IS (15462) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15499 clk cpu0 IT (15463) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +15499 clk cpu0 R cpsr 020003c5 +15500 clk cpu0 IT (15464) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +15501 clk cpu0 IT (15465) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15501 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15501 clk cpu0 R X9 0000000013000000 +15502 clk cpu0 IT (15466) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +15502 clk cpu0 R X27 000000000004CCAC +15503 clk cpu0 IT (15467) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +15503 clk cpu0 R X20 000000000004CCAD +15504 clk cpu0 IT (15468) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +15504 clk cpu0 MW1 13000000:000013000000_NS 73 +15505 clk cpu0 IT (15469) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15505 clk cpu0 MR1 0004ccad:00001004ccad_NS 61 +15505 clk cpu0 R X8 0000000000000061 +15506 clk cpu0 IT (15470) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15506 clk cpu0 R cpsr 220003c5 +15507 clk cpu0 IS (15471) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15508 clk cpu0 IS (15472) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15509 clk cpu0 IT (15473) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +15509 clk cpu0 R cpsr 020003c5 +15510 clk cpu0 IT (15474) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +15511 clk cpu0 IT (15475) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15511 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15511 clk cpu0 R X9 0000000013000000 +15512 clk cpu0 IT (15476) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +15512 clk cpu0 R X27 000000000004CCAD +15513 clk cpu0 IT (15477) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +15513 clk cpu0 R X20 000000000004CCAE +15514 clk cpu0 IT (15478) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +15514 clk cpu0 MW1 13000000:000013000000_NS 61 +15515 clk cpu0 IT (15479) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15515 clk cpu0 MR1 0004ccae:00001004ccae_NS 62 +15515 clk cpu0 R X8 0000000000000062 +15516 clk cpu0 IT (15480) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15516 clk cpu0 R cpsr 220003c5 +15517 clk cpu0 IS (15481) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15518 clk cpu0 IS (15482) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15519 clk cpu0 IT (15483) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +15519 clk cpu0 R cpsr 020003c5 +15520 clk cpu0 IT (15484) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +15521 clk cpu0 IT (15485) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15521 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15521 clk cpu0 R X9 0000000013000000 +15522 clk cpu0 IT (15486) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +15522 clk cpu0 R X27 000000000004CCAE +15523 clk cpu0 IT (15487) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +15523 clk cpu0 R X20 000000000004CCAF +15524 clk cpu0 IT (15488) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +15524 clk cpu0 MW1 13000000:000013000000_NS 62 +15525 clk cpu0 IT (15489) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15525 clk cpu0 MR1 0004ccaf:00001004ccaf_NS 6c +15525 clk cpu0 R X8 000000000000006C +15526 clk cpu0 IT (15490) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15526 clk cpu0 R cpsr 220003c5 +15527 clk cpu0 IS (15491) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15528 clk cpu0 IS (15492) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15529 clk cpu0 IT (15493) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +15529 clk cpu0 R cpsr 020003c5 +15530 clk cpu0 IT (15494) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +15531 clk cpu0 IT (15495) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15531 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15531 clk cpu0 R X9 0000000013000000 +15532 clk cpu0 IT (15496) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +15532 clk cpu0 R X27 000000000004CCAF +15533 clk cpu0 IT (15497) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +15533 clk cpu0 R X20 000000000004CCB0 +15534 clk cpu0 IT (15498) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +15534 clk cpu0 MW1 13000000:000013000000_NS 6c +15535 clk cpu0 IT (15499) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15535 clk cpu0 MR1 0004ccb0:00001004ccb0_NS 65 +15535 clk cpu0 R X8 0000000000000065 +15536 clk cpu0 IT (15500) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15536 clk cpu0 R cpsr 220003c5 +15537 clk cpu0 IS (15501) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15538 clk cpu0 IS (15502) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15539 clk cpu0 IT (15503) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +15539 clk cpu0 R cpsr 420003c5 +15540 clk cpu0 IS (15504) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +15541 clk cpu0 IT (15505) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +15541 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +15541 clk cpu0 R X8 0000000000000000 +15542 clk cpu0 IT (15506) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +15542 clk cpu0 MR8 0004ccb0:00001004ccb0_NS 65636172_74206465 +15542 clk cpu0 R X0 6563617274206465 +15543 clk cpu0 IT (15507) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +15543 clk cpu0 R cpsr 820003c5 +15544 clk cpu0 IT (15508) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +15545 clk cpu0 IT (15509) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +15545 clk cpu0 R X27 0000000000000000 +15546 clk cpu0 IT (15510) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +15546 clk cpu0 R X28 000000000004CCB0 +15547 clk cpu0 IT (15511) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +15547 clk cpu0 R X8 00000000FFFFFFF8 +15548 clk cpu0 IT (15512) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15548 clk cpu0 R cpsr 020003c5 +15548 clk cpu0 R X9 0000000000000065 +15549 clk cpu0 IS (15513) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15550 clk cpu0 IT (15514) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15550 clk cpu0 R cpsr 220003c5 +15551 clk cpu0 IS (15515) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15552 clk cpu0 IT (15516) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15552 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15552 clk cpu0 R X9 0000000013000000 +15553 clk cpu0 IT (15517) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15553 clk cpu0 R cpsr 820003c5 +15553 clk cpu0 R X8 00000000FFFFFFF9 +15554 clk cpu0 IT (15518) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15554 clk cpu0 MW1 13000000:000013000000_NS 65 +15555 clk cpu0 IT (15519) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15555 clk cpu0 R X0 0065636172742064 +15556 clk cpu0 IT (15520) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15557 clk cpu0 IT (15521) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15557 clk cpu0 R cpsr 020003c5 +15557 clk cpu0 R X9 0000000000000064 +15558 clk cpu0 IS (15522) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15559 clk cpu0 IT (15523) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15559 clk cpu0 R cpsr 220003c5 +15560 clk cpu0 IS (15524) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15561 clk cpu0 IT (15525) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15561 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15561 clk cpu0 R X9 0000000013000000 +15562 clk cpu0 IT (15526) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15562 clk cpu0 R cpsr 820003c5 +15562 clk cpu0 R X8 00000000FFFFFFFA +15563 clk cpu0 IT (15527) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15563 clk cpu0 MW1 13000000:000013000000_NS 64 +15564 clk cpu0 IT (15528) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15564 clk cpu0 R X0 0000656361727420 +15565 clk cpu0 IT (15529) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15566 clk cpu0 IT (15530) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15566 clk cpu0 R cpsr 020003c5 +15566 clk cpu0 R X9 0000000000000020 +15567 clk cpu0 IS (15531) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15568 clk cpu0 IT (15532) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15568 clk cpu0 R cpsr 820003c5 +15569 clk cpu0 IS (15533) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15570 clk cpu0 IT (15534) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15570 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15570 clk cpu0 R X9 0000000013000000 +15571 clk cpu0 IT (15535) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15571 clk cpu0 R cpsr 820003c5 +15571 clk cpu0 R X8 00000000FFFFFFFB +15572 clk cpu0 IT (15536) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15572 clk cpu0 MW1 13000000:000013000000_NS 20 +15573 clk cpu0 IT (15537) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15573 clk cpu0 R X0 0000006563617274 +15574 clk cpu0 IT (15538) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15575 clk cpu0 IT (15539) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15575 clk cpu0 R cpsr 020003c5 +15575 clk cpu0 R X9 0000000000000074 +15576 clk cpu0 IS (15540) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15577 clk cpu0 IT (15541) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15577 clk cpu0 R cpsr 220003c5 +15578 clk cpu0 IS (15542) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15579 clk cpu0 IT (15543) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15579 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15579 clk cpu0 R X9 0000000013000000 +15580 clk cpu0 IT (15544) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15580 clk cpu0 R cpsr 820003c5 +15580 clk cpu0 R X8 00000000FFFFFFFC +15581 clk cpu0 IT (15545) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15581 clk cpu0 MW1 13000000:000013000000_NS 74 +15582 clk cpu0 IT (15546) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15582 clk cpu0 R X0 0000000065636172 +15583 clk cpu0 IT (15547) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15584 clk cpu0 IT (15548) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15584 clk cpu0 R cpsr 020003c5 +15584 clk cpu0 R X9 0000000000000072 +15585 clk cpu0 IS (15549) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15586 clk cpu0 IT (15550) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15586 clk cpu0 R cpsr 220003c5 +15587 clk cpu0 IS (15551) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15588 clk cpu0 IT (15552) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15588 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15588 clk cpu0 R X9 0000000013000000 +15589 clk cpu0 IT (15553) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15589 clk cpu0 R cpsr 820003c5 +15589 clk cpu0 R X8 00000000FFFFFFFD +15590 clk cpu0 IT (15554) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15590 clk cpu0 MW1 13000000:000013000000_NS 72 +15591 clk cpu0 IT (15555) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15591 clk cpu0 R X0 0000000000656361 +15592 clk cpu0 IT (15556) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15593 clk cpu0 IT (15557) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15593 clk cpu0 R cpsr 020003c5 +15593 clk cpu0 R X9 0000000000000061 +15594 clk cpu0 IS (15558) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15595 clk cpu0 IT (15559) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15595 clk cpu0 R cpsr 220003c5 +15596 clk cpu0 IS (15560) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15597 clk cpu0 IT (15561) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15597 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15597 clk cpu0 R X9 0000000013000000 +15598 clk cpu0 IT (15562) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15598 clk cpu0 R cpsr 820003c5 +15598 clk cpu0 R X8 00000000FFFFFFFE +15599 clk cpu0 IT (15563) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15599 clk cpu0 MW1 13000000:000013000000_NS 61 +15600 clk cpu0 IT (15564) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15600 clk cpu0 R X0 0000000000006563 +15601 clk cpu0 IT (15565) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15602 clk cpu0 IT (15566) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15602 clk cpu0 R cpsr 020003c5 +15602 clk cpu0 R X9 0000000000000063 +15603 clk cpu0 IS (15567) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15604 clk cpu0 IT (15568) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15604 clk cpu0 R cpsr 220003c5 +15605 clk cpu0 IS (15569) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15606 clk cpu0 IT (15570) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15606 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15606 clk cpu0 R X9 0000000013000000 +15607 clk cpu0 IT (15571) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15607 clk cpu0 R cpsr 820003c5 +15607 clk cpu0 R X8 00000000FFFFFFFF +15608 clk cpu0 IT (15572) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15608 clk cpu0 MW1 13000000:000013000000_NS 63 +15609 clk cpu0 IT (15573) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15609 clk cpu0 R X0 0000000000000065 +15610 clk cpu0 IT (15574) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15611 clk cpu0 IT (15575) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15611 clk cpu0 R cpsr 020003c5 +15611 clk cpu0 R X9 0000000000000065 +15612 clk cpu0 IS (15576) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15613 clk cpu0 IT (15577) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15613 clk cpu0 R cpsr 220003c5 +15614 clk cpu0 IS (15578) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15615 clk cpu0 IT (15579) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15615 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15615 clk cpu0 R X9 0000000013000000 +15616 clk cpu0 IT (15580) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15616 clk cpu0 R cpsr 620003c5 +15616 clk cpu0 R X8 0000000000000000 +15617 clk cpu0 IT (15581) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15617 clk cpu0 MW1 13000000:000013000000_NS 65 +15618 clk cpu0 IT (15582) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15618 clk cpu0 R X0 0000000000000000 +15619 clk cpu0 IS (15583) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15620 clk cpu0 IT (15584) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +15620 clk cpu0 MR8 0004ccb8:00001004ccb8_NS 50425254_0a000a2e +15620 clk cpu0 R X0 504252540A000A2E +15620 clk cpu0 R X28 000000000004CCB8 +15621 clk cpu0 IT (15585) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +15621 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +15621 clk cpu0 R X9 0000000000000000 +15622 clk cpu0 IT (15586) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +15622 clk cpu0 R X8 0000000000000000 +15623 clk cpu0 IT (15587) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +15623 clk cpu0 R X27 0000000000000008 +15624 clk cpu0 IT (15588) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +15624 clk cpu0 R cpsr 820003c5 +15625 clk cpu0 IT (15589) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +15626 clk cpu0 IT (15590) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +15626 clk cpu0 R X8 00000000FFFFFFF8 +15627 clk cpu0 IT (15591) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15627 clk cpu0 R cpsr 020003c5 +15627 clk cpu0 R X9 000000000000002E +15628 clk cpu0 IS (15592) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15629 clk cpu0 IT (15593) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15629 clk cpu0 R cpsr 220003c5 +15630 clk cpu0 IS (15594) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15631 clk cpu0 IT (15595) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15631 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15631 clk cpu0 R X9 0000000013000000 +15632 clk cpu0 IT (15596) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15632 clk cpu0 R cpsr 820003c5 +15632 clk cpu0 R X8 00000000FFFFFFF9 +15633 clk cpu0 IT (15597) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15633 clk cpu0 MW1 13000000:000013000000_NS 2e +15634 clk cpu0 IT (15598) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15634 clk cpu0 R X0 00504252540A000A +15635 clk cpu0 IT (15599) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15636 clk cpu0 IT (15600) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15636 clk cpu0 R cpsr 020003c5 +15636 clk cpu0 R X9 000000000000000A +15637 clk cpu0 IS (15601) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15638 clk cpu0 IT (15602) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +15638 clk cpu0 R cpsr 820003c5 +15639 clk cpu0 IS (15603) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +15640 clk cpu0 IT (15604) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +15640 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +15640 clk cpu0 R X9 0000000013000000 +15641 clk cpu0 IT (15605) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +15641 clk cpu0 R cpsr 820003c5 +15641 clk cpu0 R X8 00000000FFFFFFFA +TUBE CPU0: disabled trace. +15642 clk cpu0 IT (15606) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +15642 clk cpu0 MW1 13000000:000013000000_NS 0a +15643 clk cpu0 IT (15607) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +15643 clk cpu0 R X0 0000504252540A00 +15644 clk cpu0 IT (15608) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +15645 clk cpu0 IT (15609) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +15645 clk cpu0 R cpsr 420003c5 +15645 clk cpu0 R X9 0000000000000000 +15646 clk cpu0 IT (15610) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +15647 clk cpu0 IT (15611) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +15647 clk cpu0 R X8 0000000000000002 +15648 clk cpu0 IT (15612) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +15648 clk cpu0 R X9 0000000000000009 +15649 clk cpu0 IT (15613) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +15649 clk cpu0 R X9 000000000004CCB9 +15650 clk cpu0 IT (15614) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +15650 clk cpu0 R cpsr 020003c5 +15651 clk cpu0 IT (15615) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +15651 clk cpu0 R X27 000000000004CCB9 +15652 clk cpu0 IT (15616) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +15652 clk cpu0 R X20 000000000004CCBA +15653 clk cpu0 IT (15617) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +15654 clk cpu0 IT (15618) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +15654 clk cpu0 MR1 0004ccba:00001004ccba_NS 00 +15654 clk cpu0 R X8 0000000000000000 +15655 clk cpu0 IT (15619) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +15655 clk cpu0 R cpsr 820003c5 +15656 clk cpu0 IS (15620) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +15657 clk cpu0 IT (15621) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +15658 clk cpu0 IT (15622) 00092f98:000010092f98_NS d5033f9f O EL1h_n : DSB SY +15659 clk cpu0 IT (15623) 00092f9c:000010092f9c_NS a9497bf3 O EL1h_n : LDP x19,x30,[sp,#0x90] +15659 clk cpu0 MR8 03700580:000000f00580_NS 00000000_0004ccaa +15659 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0009c560 +15659 clk cpu0 R X19 000000000004CCAA +15659 clk cpu0 R X30 000000000009C560 +15660 clk cpu0 IT (15624) 00092fa0:000010092fa0_NS a94853f5 O EL1h_n : LDP x21,x20,[sp,#0x80] +15660 clk cpu0 MR8 03700570:000000f00570_NS 00000000_00000000 +15660 clk cpu0 MR8 03700578:000000f00578_NS 00000000_03008528 +15660 clk cpu0 R X20 0000000003008528 +15660 clk cpu0 R X21 0000000000000000 +15661 clk cpu0 IT (15625) 00092fa4:000010092fa4_NS a9475bf7 O EL1h_n : LDP x23,x22,[sp,#0x70] +15661 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00000000 +15661 clk cpu0 MR8 03700568:000000f00568_NS 00000000_90000000 +15661 clk cpu0 R X22 0000000090000000 +15661 clk cpu0 R X23 0000000000000000 +15662 clk cpu0 IT (15626) 00092fa8:000010092fa8_NS a94663f9 O EL1h_n : LDP x25,x24,[sp,#0x60] +15662 clk cpu0 MR8 03700550:000000f00550_NS 00000000_0000003c +15662 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00007c00 +15662 clk cpu0 R X24 0000000000007C00 +15662 clk cpu0 R X25 000000000000003C +15663 clk cpu0 IT (15627) 00092fac:000010092fac_NS a9456bfb O EL1h_n : LDP x27,x26,[sp,#0x50] +15663 clk cpu0 MR8 03700540:000000f00540_NS 00010001_00010001 +15663 clk cpu0 MR8 03700548:000000f00548_NS ffe000ff_ffe000ff +15663 clk cpu0 R X26 FFE000FFFFE000FF +15663 clk cpu0 R X27 0001000100010001 +15664 clk cpu0 IT (15628) 00092fb0:000010092fb0_NS f94023fc O EL1h_n : LDR x28,[sp,#0x40] +15664 clk cpu0 MR8 03700530:000000f00530_NS ff7fff7f_ff7fff7f +15664 clk cpu0 R X28 FF7FFF7FFF7FFF7F +15665 clk cpu0 IT (15629) 00092fb4:000010092fb4_NS 910283ff O EL1h_n : ADD sp,sp,#0xa0 +15665 clk cpu0 R SP_EL1 0000000003700590 +15666 clk cpu0 IT (15630) 00092fb8:000010092fb8_NS d65f03c0 O EL1h_n : RET +15667 clk cpu0 IT (15631) 0009c560:00001009c560_NS 52800020 O EL1h_n : MOV w0,#1 +15667 clk cpu0 R X0 0000000000000001 +15668 clk cpu0 IT (15632) 0009c564:00001009c564_NS 2a1503e1 O EL1h_n : MOV w1,w21 +15668 clk cpu0 R X1 0000000000000000 +15669 clk cpu0 IT (15633) 0009c568:00001009c568_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +15669 clk cpu0 R X2 0000000000000000 +15670 clk cpu0 IT (15634) 0009c56c:00001009c56c_NS d503201f O EL1h_n : NOP +15671 clk cpu0 IT (15635) 0009c570:00001009c570_NS d5033f9f O EL1h_n : DSB SY +15672 clk cpu0 IT (15636) 0009c574:00001009c574_NS aa1403e0 O EL1h_n : MOV x0,x20 +15672 clk cpu0 R X0 0000000003008528 +15673 clk cpu0 IT (15637) 0009c578:00001009c578_NS 97fffd30 O EL1h_n : BL 0x9ba38 +15673 clk cpu0 R X30 000000000009C57C +15674 clk cpu0 IT (15638) 0009ba38:00001009ba38_NS d5033fbf O EL1h_n : DMB SY +15675 clk cpu0 IT (15639) 0009ba3c:00001009ba3c_NS f0030bc8 O EL1h_n : ADRP x8,0x6216a3c +15675 clk cpu0 R X8 0000000006216000 +15676 clk cpu0 IT (15640) 0009ba40:00001009ba40_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +15676 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +15676 clk cpu0 R X8 0000000000000001 +15677 clk cpu0 IT (15641) 0009ba44:00001009ba44_NS 7100091f O EL1h_n : CMP w8,#2 +15677 clk cpu0 R cpsr 820003c5 +15678 clk cpu0 IT (15642) 0009ba48:00001009ba48_NS 54000083 O EL1h_n : B.CC 0x9ba58 +15679 clk cpu0 IT (15643) 0009ba58:00001009ba58_NS d65f03c0 O EL1h_n : RET +15680 clk cpu0 IT (15644) 0009c57c:00001009c57c_NS a9487bf3 O EL1h_n : LDP x19,x30,[sp,#0x80] +15680 clk cpu0 MR8 03700610:000000f00610_NS 00000000_062160a2 +15680 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00011060 +15680 clk cpu0 R X19 00000000062160A2 +15680 clk cpu0 R X30 0000000000011060 +15681 clk cpu0 IT (15645) 0009c580:00001009c580_NS a94753f5 O EL1h_n : LDP x21,x20,[sp,#0x70] +15681 clk cpu0 MR8 03700600:000000f00600_NS 00000000_02f00028 +15681 clk cpu0 MR8 03700608:000000f00608_NS ff83ff83_ff83ff83 +15681 clk cpu0 R X20 FF83FF83FF83FF83 +15681 clk cpu0 R X21 0000000002F00028 +15682 clk cpu0 IT (15646) 0009c584:00001009c584_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +15682 clk cpu0 R SP_EL1 0000000003700620 +15683 clk cpu0 IT (15647) 0009c588:00001009c588_NS d65f03c0 O EL1h_n : RET +15684 clk cpu0 IT (15648) 00011060:000010011060_NS b9019bff O EL1h_n : STR wzr,[sp,#0x198] +15684 clk cpu0 MW4 037007b8:000000f007b8_NS 00000000 +15685 clk cpu0 IT (15649) 00011064:000010011064_NS b9819be2 O EL1h_n : LDRSW x2,[sp,#0x198] +15685 clk cpu0 MR4 037007b8:000000f007b8_NS 00000000 +15685 clk cpu0 R X2 0000000000000000 +15686 clk cpu0 IT (15650) 00011068:000010011068_NS b9418be4 O EL1h_n : LDR w4,[sp,#0x188] +15686 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +15686 clk cpu0 R X4 0000000000000000 +15687 clk cpu0 IT (15651) 0001106c:00001001106c_NS 52800080 O EL1h_n : MOV w0,#4 +15687 clk cpu0 R X0 0000000000000004 +15688 clk cpu0 IT (15652) 00011070:000010011070_NS b94013e1 O EL1h_n : LDR w1,[sp,#0x10] +15688 clk cpu0 MR4 03700630:000000f00630_NS 00000001 +15688 clk cpu0 R X1 0000000000000001 +15689 clk cpu0 IT (15653) 00011074:000010011074_NS 52800068 O EL1h_n : MOV w8,#3 +15689 clk cpu0 R X8 0000000000000003 +15690 clk cpu0 IT (15654) 00011078:000010011078_NS 2a0803e3 O EL1h_n : MOV w3,w8 +15690 clk cpu0 R X3 0000000000000003 +15691 clk cpu0 IT (15655) 0001107c:00001001107c_NS b9000fe8 O EL1h_n : STR w8,[sp,#0xc] +15691 clk cpu0 MW4 0370062c:000000f0062c_NS 00000003 +15691 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0084 ALLOC 0x000010011080_NS +15691 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0420 ALLOC 0x000010011080_NS +15692 clk cpu0 IT (15656) 00011080:000010011080_NS 9402329c O EL1h_n : BL 0x9daf0 +15692 clk cpu0 R X30 0000000000011084 +15693 clk cpu0 IT (15657) 0009daf0:00001009daf0_NS f81d0ff6 O EL1h_n : STR x22,[sp,#-0x30]! +15693 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_90000000 +15693 clk cpu0 R SP_EL1 00000000037005F0 +15694 clk cpu0 IT (15658) 0009daf4:00001009daf4_NS a90153f5 O EL1h_n : STP x21,x20,[sp,#0x10] +15694 clk cpu0 MW8 03700600:000000f00600_NS 00000000_02f00028 +15694 clk cpu0 MW8 03700608:000000f00608_NS ff83ff83_ff83ff83 +15695 clk cpu0 IT (15659) 0009daf8:00001009daf8_NS a9027bf3 O EL1h_n : STP x19,x30,[sp,#0x20] +15695 clk cpu0 MW8 03700610:000000f00610_NS 00000000_062160a2 +15695 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00011084 +15696 clk cpu0 IT (15660) 0009dafc:00001009dafc_NS aa0203f3 O EL1h_n : MOV x19,x2 +15696 clk cpu0 R X19 0000000000000000 +15697 clk cpu0 IT (15661) 0009db00:00001009db00_NS 7100047f O EL1h_n : CMP w3,#1 +15697 clk cpu0 R cpsr 220003c5 +15698 clk cpu0 IT (15662) 0009db04:00001009db04_NS 2a0003f4 O EL1h_n : MOV w20,w0 +15698 clk cpu0 R X20 0000000000000004 +15699 clk cpu0 IS (15663) 0009db08:00001009db08_NS 540002a0 O EL1h_n : B.EQ 0x9db5c +15700 clk cpu0 IT (15664) 0009db0c:00001009db0c_NS 71000c7f O EL1h_n : CMP w3,#3 +15700 clk cpu0 R cpsr 620003c5 +15701 clk cpu0 IT (15665) 0009db10:00001009db10_NS 54000320 O EL1h_n : B.EQ 0x9db74 +15702 clk cpu0 IT (15666) 0009db74:00001009db74_NS 2a1403e1 O EL1h_n : MOV w1,w20 +15702 clk cpu0 R X1 0000000000000004 +15703 clk cpu0 IT (15667) 0009db78:00001009db78_NS 2a1303e2 O EL1h_n : MOV w2,w19 +15703 clk cpu0 R X2 0000000000000000 +15704 clk cpu0 IT (15668) 0009db7c:00001009db7c_NS a9427bf3 O EL1h_n : LDP x19,x30,[sp,#0x20] +15704 clk cpu0 MR8 03700610:000000f00610_NS 00000000_062160a2 +15704 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00011084 +15704 clk cpu0 R X19 00000000062160A2 +15704 clk cpu0 R X30 0000000000011084 +15705 clk cpu0 IT (15669) 0009db80:00001009db80_NS a94153f5 O EL1h_n : LDP x21,x20,[sp,#0x10] +15705 clk cpu0 MR8 03700600:000000f00600_NS 00000000_02f00028 +15705 clk cpu0 MR8 03700608:000000f00608_NS ff83ff83_ff83ff83 +15705 clk cpu0 R X20 FF83FF83FF83FF83 +15705 clk cpu0 R X21 0000000002F00028 +15706 clk cpu0 IT (15670) 0009db84:00001009db84_NS 52800040 O EL1h_n : MOV w0,#2 +15706 clk cpu0 R X0 0000000000000002 +15707 clk cpu0 IT (15671) 0009db88:00001009db88_NS f84307f6 O EL1h_n : LDR x22,[sp],#0x30 +15707 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_90000000 +15707 clk cpu0 R SP_EL1 0000000003700620 +15707 clk cpu0 R X22 0000000090000000 +15708 clk cpu0 IT (15672) 0009db8c:00001009db8c_NS 140004f3 O EL1h_n : B 0x9ef58 +15709 clk cpu0 IT (15673) 0009ef58:00001009ef58_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15709 clk cpu0 MW8 03700610:000000f00610_NS ffffffff_fe00000f +15709 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00011084 +15709 clk cpu0 R SP_EL1 0000000003700610 +15710 clk cpu0 IT (15674) 0009ef5c:00001009ef5c_NS d4000141 O EL1h_n : SVC #0xa +15710 clk cpu0 E 0009ef5c:00001009ef5c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +15710 clk cpu0 R cpsr 620003c5 +15710 clk cpu0 R PMBIDR_EL1 00000030 +15710 clk cpu0 R ESR_EL1 5600000a +15710 clk cpu0 R SPSR_EL1 620003c5 +15710 clk cpu0 R TRBIDR_EL1 000000000000002b +15710 clk cpu0 R ELR_EL1 000000000009ef60 +15711 clk cpu0 IT (15675) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +15712 clk cpu0 IT (15676) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +15712 clk cpu0 R SP_EL1 0000000003700510 +15713 clk cpu0 IT (15677) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +15713 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000002 +15713 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00000004 +15714 clk cpu0 IT (15678) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +15714 clk cpu0 R X0 000000005600000A +15715 clk cpu0 IT (15679) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +15715 clk cpu0 R X1 0000000000000015 +15716 clk cpu0 IT (15680) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +15716 clk cpu0 R cpsr 620003c5 +15717 clk cpu0 IT (15681) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +15718 clk cpu0 IT (15682) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +15718 clk cpu0 R X1 000000000000000A +15719 clk cpu0 IT (15683) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +15719 clk cpu0 R cpsr 220003c5 +15720 clk cpu0 IS (15684) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +15721 clk cpu0 IT (15685) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +15721 clk cpu0 R cpsr 620003c5 +15722 clk cpu0 IS (15686) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +15723 clk cpu0 IT (15687) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +15723 clk cpu0 R cpsr 220003c5 +15724 clk cpu0 IS (15688) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +15725 clk cpu0 IT (15689) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +15725 clk cpu0 R cpsr 220003c5 +15726 clk cpu0 IS (15690) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +15727 clk cpu0 IT (15691) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +15727 clk cpu0 R cpsr 220003c5 +15728 clk cpu0 IS (15692) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +15729 clk cpu0 IT (15693) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +15729 clk cpu0 R cpsr 220003c5 +15730 clk cpu0 IS (15694) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +15731 clk cpu0 IT (15695) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +15731 clk cpu0 R cpsr 220003c5 +15732 clk cpu0 IS (15696) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +15733 clk cpu0 IT (15697) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +15733 clk cpu0 R cpsr 220003c5 +15734 clk cpu0 IS (15698) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +15735 clk cpu0 IT (15699) 00035868:000010035868_NS 7100283f O EL1h_n : CMP w1,#0xa +15735 clk cpu0 R cpsr 620003c5 +15736 clk cpu0 IT (15700) 0003586c:00001003586c_NS 54014a80 O EL1h_n : B.EQ 0x381bc +15737 clk cpu0 IT (15701) 000381bc:0000100381bc_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +15737 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000002 +15737 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00000004 +15737 clk cpu0 R X0 0000000000000002 +15737 clk cpu0 R X1 0000000000000004 +15737 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000f INVAL 0x0000100901c0_NS +15737 clk cpu0 CACHE cpu.cpu0.l1icache LINE 000f ALLOC 0x0000100381c0_NS +15738 clk cpu0 IT (15702) 000381c0:0000100381c0_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +15738 clk cpu0 R SP_EL1 0000000003700610 +15739 clk cpu0 IT (15703) 000381c4:0000100381c4_NS aa0103e0 O EL1h_n : MOV x0,x1 +15739 clk cpu0 R X0 0000000000000004 +15740 clk cpu0 IT (15704) 000381c8:0000100381c8_NS aa0203e1 O EL1h_n : MOV x1,x2 +15740 clk cpu0 R X1 0000000000000000 +15741 clk cpu0 IT (15705) 000381cc:0000100381cc_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15741 clk cpu0 MW8 03700600:000000f00600_NS ffffffff_fe00000f +15741 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00011084 +15741 clk cpu0 R SP_EL1 0000000003700600 +15742 clk cpu0 IT (15706) 000381d0:0000100381d0_NS 94019688 O EL1h_n : BL 0x9dbf0 +15742 clk cpu0 R X30 00000000000381D4 +15743 clk cpu0 IT (15707) 0009dbf0:00001009dbf0_NS b0017b49 O EL1h_n : ADRP x9,0x3006bf0 +15743 clk cpu0 R X9 0000000003006000 +15744 clk cpu0 IT (15708) 0009dbf4:00001009dbf4_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +15744 clk cpu0 R X8 0000000000000001 +15745 clk cpu0 IT (15709) 0009dbf8:00001009dbf8_NS 910a8129 O EL1h_n : ADD x9,x9,#0x2a0 +15745 clk cpu0 R X9 00000000030062A0 +15746 clk cpu0 IT (15710) 0009dbfc:00001009dbfc_NS f8685922 O EL1h_n : LDR x2,[x9,w8,UXTW #3] +15746 clk cpu0 MR8 030062a8:0000008062a8_NS 00000000_000a10c0 +15746 clk cpu0 R X2 00000000000A10C0 +15747 clk cpu0 IT (15711) 0009dc00:00001009dc00_NS aa0103e0 O EL1h_n : MOV x0,x1 +15747 clk cpu0 R X0 0000000000000000 +15748 clk cpu0 IT (15712) 0009dc04:00001009dc04_NS d61f0040 O EL1h_n : BR x2 +15748 clk cpu0 R cpsr 620007c5 +15749 clk cpu0 IT (15713) 000a10c0:0000100a10c0_NS d5110100 O EL1h_n : MSR TRCPRGCTLR,x0 +15749 clk cpu0 R cpsr 620003c5 +15749 clk cpu0 R TRCPRGCTLR 00000000:00000000 +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 CLEAN 0x000015216000_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 INVAL 0x000015216000_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 ALLOC 0x000016242000_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 DIRTY 0x000016242000_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0102 CLEAN 0x000015216040_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0102 INVAL 0x000015216040_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0102 ALLOC 0x000016242040_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0102 DIRTY 0x000016242040_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0105 INVAL 0x000070472080_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0105 ALLOC 0x000016242080_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0105 DIRTY 0x000016242080_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0106 INVAL 0x0000152160c0_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0106 ALLOC 0x0000162420c0_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0106 DIRTY 0x0000162420c0_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0109 CLEAN 0x000010832100_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0109 INVAL 0x000010832100_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0109 ALLOC 0x000016242100_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0109 DIRTY 0x000016242100_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010a ALLOC 0x000016242140_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010a DIRTY 0x000016242140_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010c ALLOC 0x000016242180_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010c DIRTY 0x000016242180_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010e ALLOC 0x0000162421c0_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010e DIRTY 0x0000162421c0_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0110 ALLOC 0x000016242200_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0110 DIRTY 0x000016242200_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0112 ALLOC 0x000016242240_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0112 DIRTY 0x000016242240_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0115 ALLOC 0x000016242280_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0115 DIRTY 0x000016242280_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0117 ALLOC 0x0000162422c0_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0117 DIRTY 0x0000162422c0_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0119 ALLOC 0x000016242300_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0119 DIRTY 0x000016242300_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 011a ALLOC 0x000016242340_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 011a DIRTY 0x000016242340_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 011d ALLOC 0x000016242380_NS +15749 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 011d DIRTY 0x000016242380_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1800 ALLOC 0x000015216000_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242000_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242000_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1810 ALLOC 0x000015216040_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242040_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242040_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242080_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242080_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x0000162420c0_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x0000162420c0_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0840 ALLOC 0x000010832100_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242100_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242100_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242140_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242140_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242180_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242180_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x0000162421c0_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x0000162421c0_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242200_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242200_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242240_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242240_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242280_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242280_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x0000162422c0_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x0000162422c0_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242300_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242300_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242340_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242340_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016242380_NS +15749 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016242380_NS +15750 clk cpu0 IT (15714) 000a10c4:0000100a10c4_NS d5033fdf O EL1h_n : ISB +15750 clk cpu0 R PMBIDR_EL1 00000030 +15750 clk cpu0 R TRBPTR_EL1 0000000023002399 +15750 clk cpu0 R TRBTRG_EL1 0000000000000000 +15750 clk cpu0 R TRBIDR_EL1 000000000000002b +15751 clk cpu0 IT (15715) 000a10c8:0000100a10c8_NS d65f03c0 O EL1h_n : RET +15752 clk cpu0 IT (15716) 000381d4:0000100381d4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15752 clk cpu0 MR8 03700600:000000f00600_NS ffffffff_fe00000f +15752 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00011084 +15752 clk cpu0 R SP_EL1 0000000003700610 +15752 clk cpu0 R X29 FFFFFFFFFE00000F +15752 clk cpu0 R X30 0000000000011084 +15753 clk cpu0 IT (15717) 000381d8:0000100381d8_NS d69f03e0 O EL1h_n : ERET +15753 clk cpu0 R cpsr 620003c5 +15753 clk cpu0 R PMBIDR_EL1 00000030 +15753 clk cpu0 R TRBIDR_EL1 000000000000002b +15754 clk cpu0 IT (15718) 0009ef60:00001009ef60_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15754 clk cpu0 MR8 03700610:000000f00610_NS ffffffff_fe00000f +15754 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00011084 +15754 clk cpu0 R SP_EL1 0000000003700620 +15754 clk cpu0 R X29 FFFFFFFFFE00000F +15754 clk cpu0 R X30 0000000000011084 +15755 clk cpu0 IT (15719) 0009ef64:00001009ef64_NS d65f03c0 O EL1h_n : RET +15756 clk cpu0 IT (15720) 00011084:000010011084_NS b9418be3 O EL1h_n : LDR w3,[sp,#0x188] +15756 clk cpu0 MR4 037007a8:000000f007a8_NS 00000000 +15756 clk cpu0 R X3 0000000000000000 +15757 clk cpu0 IT (15721) 00011088:000010011088_NS 52800180 O EL1h_n : MOV w0,#0xc +15757 clk cpu0 R X0 000000000000000C +15758 clk cpu0 IT (15722) 0001108c:00001001108c_NS b94013e1 O EL1h_n : LDR w1,[sp,#0x10] +15758 clk cpu0 MR4 03700630:000000f00630_NS 00000001 +15758 clk cpu0 R X1 0000000000000001 +15759 clk cpu0 IT (15723) 00011090:000010011090_NS b9400fe2 O EL1h_n : LDR w2,[sp,#0xc] +15759 clk cpu0 MR4 0370062c:000000f0062c_NS 00000003 +15759 clk cpu0 R X2 0000000000000003 +15760 clk cpu0 IT (15724) 00011094:000010011094_NS 94022998 O EL1h_n : BL 0x9b6f4 +15760 clk cpu0 R X30 0000000000011098 +15761 clk cpu0 IT (15725) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +15761 clk cpu0 MW8 03700600:000000f00600_NS ff83ff83_ff83ff83 +15761 clk cpu0 R SP_EL1 0000000003700600 +15762 clk cpu0 IT (15726) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +15762 clk cpu0 MW8 03700610:000000f00610_NS 00000000_062160a2 +15762 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00011098 +15763 clk cpu0 IT (15727) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +15763 clk cpu0 R cpsr 220003c5 +15764 clk cpu0 IT (15728) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +15764 clk cpu0 R X19 000000000000000C +15765 clk cpu0 IS (15729) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +15766 clk cpu0 IT (15730) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +15766 clk cpu0 R cpsr 620003c5 +15767 clk cpu0 IT (15731) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +15768 clk cpu0 IT (15732) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +15768 clk cpu0 R X1 000000000000000C +15769 clk cpu0 IT (15733) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +15769 clk cpu0 MR8 03700610:000000f00610_NS 00000000_062160a2 +15769 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00011098 +15769 clk cpu0 R X19 00000000062160A2 +15769 clk cpu0 R X30 0000000000011098 +15770 clk cpu0 IT (15734) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +15770 clk cpu0 R X0 0000000000000001 +15771 clk cpu0 IT (15735) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +15771 clk cpu0 MR8 03700600:000000f00600_NS ff83ff83_ff83ff83 +15771 clk cpu0 R SP_EL1 0000000003700620 +15771 clk cpu0 R X20 FF83FF83FF83FF83 +15772 clk cpu0 IT (15736) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +15773 clk cpu0 IT (15737) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15773 clk cpu0 MW8 03700610:000000f00610_NS ffffffff_fe00000f +15773 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00011098 +15773 clk cpu0 R SP_EL1 0000000003700610 +15774 clk cpu0 IT (15738) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +15774 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +15774 clk cpu0 R cpsr 620003c5 +15774 clk cpu0 R PMBIDR_EL1 00000030 +15774 clk cpu0 R ESR_EL1 56000005 +15774 clk cpu0 R SPSR_EL1 620003c5 +15774 clk cpu0 R TRBIDR_EL1 000000000000002b +15774 clk cpu0 R ELR_EL1 000000000009ef50 +15775 clk cpu0 IT (15739) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +15776 clk cpu0 IT (15740) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +15776 clk cpu0 R SP_EL1 0000000003700510 +15777 clk cpu0 IT (15741) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +15777 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000001 +15777 clk cpu0 MW8 03700518:000000f00518_NS 00000000_0000000c +15778 clk cpu0 IT (15742) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +15778 clk cpu0 R X0 0000000056000005 +15779 clk cpu0 IT (15743) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +15779 clk cpu0 R X1 0000000000000015 +15780 clk cpu0 IT (15744) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +15780 clk cpu0 R cpsr 620003c5 +15781 clk cpu0 IT (15745) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +15782 clk cpu0 IT (15746) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +15782 clk cpu0 R X1 0000000000000005 +15783 clk cpu0 IT (15747) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +15783 clk cpu0 R cpsr 620003c5 +15784 clk cpu0 IS (15748) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +15785 clk cpu0 IT (15749) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +15785 clk cpu0 R cpsr 820003c5 +15786 clk cpu0 IS (15750) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +15787 clk cpu0 IT (15751) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +15787 clk cpu0 R cpsr 820003c5 +15788 clk cpu0 IS (15752) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +15789 clk cpu0 IT (15753) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +15789 clk cpu0 R cpsr 820003c5 +15790 clk cpu0 IS (15754) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +15791 clk cpu0 IT (15755) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +15791 clk cpu0 R cpsr 820003c5 +15792 clk cpu0 IS (15756) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +15793 clk cpu0 IT (15757) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +15793 clk cpu0 R cpsr 820003c5 +15794 clk cpu0 IS (15758) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +15795 clk cpu0 IT (15759) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +15795 clk cpu0 R cpsr 820003c5 +15796 clk cpu0 IS (15760) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +15797 clk cpu0 IT (15761) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +15797 clk cpu0 R cpsr 620003c5 +15798 clk cpu0 IT (15762) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +15799 clk cpu0 IT (15763) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +15799 clk cpu0 MR8 03700510:000000f00510_NS 00000000_00000001 +15799 clk cpu0 MR8 03700518:000000f00518_NS 00000000_0000000c +15799 clk cpu0 R X0 0000000000000001 +15799 clk cpu0 R X1 000000000000000C +15800 clk cpu0 IT (15764) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +15800 clk cpu0 R SP_EL1 0000000003700610 +15801 clk cpu0 IT (15765) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +15801 clk cpu0 R X0 000000000000000C +15802 clk cpu0 IT (15766) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15802 clk cpu0 MW8 03700600:000000f00600_NS ffffffff_fe00000f +15802 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00011098 +15802 clk cpu0 R SP_EL1 0000000003700600 +15803 clk cpu0 IT (15767) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +15803 clk cpu0 R X30 00000000000381B4 +15804 clk cpu0 IT (15768) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +15804 clk cpu0 R X9 0000000003003000 +15805 clk cpu0 IT (15769) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +15805 clk cpu0 R X8 0000000000000003 +15806 clk cpu0 IT (15770) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +15806 clk cpu0 R X9 00000000030039C8 +15807 clk cpu0 IT (15771) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +15807 clk cpu0 MR8 030039e0:0000008039e0_NS 00000000_0009f3d0 +15807 clk cpu0 R X0 000000000009F3D0 +15808 clk cpu0 IT (15772) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +15808 clk cpu0 R cpsr 620007c5 +15809 clk cpu0 IT (15773) 0009f3d0:00001009f3d0_NS d5310300 O EL1h_n : MRS x0,TRCSTATR +15809 clk cpu0 R cpsr 620003c5 +15809 clk cpu0 R X0 0000000000000003 +15810 clk cpu0 IT (15774) 0009f3d4:00001009f3d4_NS d65f03c0 O EL1h_n : RET +15811 clk cpu0 IT (15775) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15811 clk cpu0 MR8 03700600:000000f00600_NS ffffffff_fe00000f +15811 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00011098 +15811 clk cpu0 R SP_EL1 0000000003700610 +15811 clk cpu0 R X29 FFFFFFFFFE00000F +15811 clk cpu0 R X30 0000000000011098 +15812 clk cpu0 IT (15776) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +15812 clk cpu0 R cpsr 620003c5 +15812 clk cpu0 R PMBIDR_EL1 00000030 +15812 clk cpu0 R TRBIDR_EL1 000000000000002b +15813 clk cpu0 IT (15777) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15813 clk cpu0 MR8 03700610:000000f00610_NS ffffffff_fe00000f +15813 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00011098 +15813 clk cpu0 R SP_EL1 0000000003700620 +15813 clk cpu0 R X29 FFFFFFFFFE00000F +15813 clk cpu0 R X30 0000000000011098 +15814 clk cpu0 IT (15778) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +15815 clk cpu0 IT (15779) 00011098:000010011098_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +15815 clk cpu0 MW4 037007b8:000000f007b8_NS 00000003 +15816 clk cpu0 IT (15780) 0001109c:00001001109c_NS b9419be8 O EL1h_n : LDR w8,[sp,#0x198] +15816 clk cpu0 MR4 037007b8:000000f007b8_NS 00000003 +15816 clk cpu0 R X8 0000000000000003 +15817 clk cpu0 IT (15781) 000110a0:0000100110a0_NS 52800029 O EL1h_n : MOV w9,#1 +15817 clk cpu0 R X9 0000000000000001 +15818 clk cpu0 IT (15782) 000110a4:0000100110a4_NS 0a090108 O EL1h_n : AND w8,w8,w9 +15818 clk cpu0 R X8 0000000000000001 +15819 clk cpu0 IT (15783) 000110a8:0000100110a8_NS 7100051f O EL1h_n : CMP w8,#1 +15819 clk cpu0 R cpsr 620003c5 +15820 clk cpu0 IT (15784) 000110ac:0000100110ac_NS 1a9f07e8 O EL1h_n : CSET w8,NE +15820 clk cpu0 R X8 0000000000000000 +15821 clk cpu0 IS (15785) 000110b0:0000100110b0_NS 37000048 O EL1h_n : TBNZ w8,#0,0x110b8 +15822 clk cpu0 IT (15786) 000110b4:0000100110b4_NS 14000008 O EL1h_n : B 0x110d4 +15822 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0087 ALLOC 0x0000100110c0_NS +15822 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0431 ALLOC 0x0000100110c0_NS +15823 clk cpu0 IT (15787) 000110d4:0000100110d4_NS b94187e8 O EL1h_n : LDR w8,[sp,#0x184] +15823 clk cpu0 MR4 037007a4:000000f007a4_NS 00000001 +15823 clk cpu0 R X8 0000000000000001 +15824 clk cpu0 IT (15788) 000110d8:0000100110d8_NS 7100051f O EL1h_n : CMP w8,#1 +15824 clk cpu0 R cpsr 620003c5 +15825 clk cpu0 IT (15789) 000110dc:0000100110dc_NS 1a9fd7e8 O EL1h_n : CSET w8,GT +15825 clk cpu0 R X8 0000000000000000 +15826 clk cpu0 IS (15790) 000110e0:0000100110e0_NS 37000048 O EL1h_n : TBNZ w8,#0,0x110e8 +15827 clk cpu0 IT (15791) 000110e4:0000100110e4_NS 1400000a O EL1h_n : B 0x1110c +15827 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0089 ALLOC 0x000010011100_NS +15827 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0441 ALLOC 0x000010011100_NS +15828 clk cpu0 IT (15792) 0001110c:00001001110c_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +15828 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +15828 clk cpu0 R X8 0000000003700790 +15829 clk cpu0 IT (15793) 00011110:000010011110_NS f9400500 O EL1h_n : LDR x0,[x8,#8] +15829 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +15829 clk cpu0 R X0 0000000000000000 +15830 clk cpu0 IT (15794) 00011114:000010011114_NS f9400101 O EL1h_n : LDR x1,[x8,#0] +15830 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +15830 clk cpu0 R X1 0000000000000001 +15831 clk cpu0 IT (15795) 00011118:000010011118_NS 94024ead O EL1h_n : BL 0xa4bcc +15831 clk cpu0 R X30 000000000001111C +15831 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005e INVAL 0x000010090bc0 +15831 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005e ALLOC 0x0000100a4bc0_NS +15832 clk cpu0 IT (15796) 000a4bcc:0000100a4bcc_NS f100041f O EL1h_n : CMP x0,#1 +15832 clk cpu0 R cpsr 820003c5 +15833 clk cpu0 IT (15797) 000a4bd0:0000100a4bd0_NS 5400006b O EL1h_n : B.LT 0xa4bdc +15834 clk cpu0 IT (15798) 000a4bdc:0000100a4bdc_NS d28000e0 O EL1h_n : MOV x0,#7 +15834 clk cpu0 R X0 0000000000000007 +15835 clk cpu0 IT (15799) 000a4be0:0000100a4be0_NS f2a00580 O EL1h_n : MOVK x0,#0x2c,LSL #16 +15835 clk cpu0 R X0 00000000002C0007 +15836 clk cpu0 IT (15800) 000a4be4:0000100a4be4_NS aa0103e2 O EL1h_n : MOV x2,x1 +15836 clk cpu0 R X2 0000000000000001 +15837 clk cpu0 IT (15801) 000a4be8:0000100a4be8_NS d40000e1 O EL1h_n : SVC #7 +15837 clk cpu0 E 000a4be8:0000100a4be8_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +15837 clk cpu0 R cpsr 820003c5 +15837 clk cpu0 R PMBIDR_EL1 00000030 +15837 clk cpu0 R ESR_EL1 56000007 +15837 clk cpu0 R SPSR_EL1 820003c5 +15837 clk cpu0 R TRBIDR_EL1 000000000000002b +15837 clk cpu0 R ELR_EL1 00000000000a4bec +15838 clk cpu0 IT (15802) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +15839 clk cpu0 IT (15803) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +15839 clk cpu0 R SP_EL1 0000000003700520 +15840 clk cpu0 IT (15804) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +15840 clk cpu0 MW8 03700520:000000f00520_NS 00000000_002c0007 +15840 clk cpu0 MW8 03700528:000000f00528_NS 00000000_00000001 +15841 clk cpu0 IT (15805) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +15841 clk cpu0 R X0 0000000056000007 +15842 clk cpu0 IT (15806) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +15842 clk cpu0 R X1 0000000000000015 +15843 clk cpu0 IT (15807) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +15843 clk cpu0 R cpsr 620003c5 +15844 clk cpu0 IT (15808) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +15845 clk cpu0 IT (15809) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +15845 clk cpu0 R X1 0000000000000007 +15846 clk cpu0 IT (15810) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +15846 clk cpu0 R cpsr 220003c5 +15847 clk cpu0 IS (15811) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +15848 clk cpu0 IT (15812) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +15848 clk cpu0 R cpsr 820003c5 +15849 clk cpu0 IS (15813) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +15850 clk cpu0 IT (15814) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +15850 clk cpu0 R cpsr 820003c5 +15851 clk cpu0 IS (15815) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +15852 clk cpu0 IT (15816) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +15852 clk cpu0 R cpsr 620003c5 +15853 clk cpu0 IT (15817) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +15854 clk cpu0 IT (15818) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +15854 clk cpu0 MR8 03700520:000000f00520_NS 00000000_002c0007 +15854 clk cpu0 MR8 03700528:000000f00528_NS 00000000_00000001 +15854 clk cpu0 R X0 00000000002C0007 +15854 clk cpu0 R X1 0000000000000001 +15855 clk cpu0 IT (15819) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +15855 clk cpu0 R SP_EL1 0000000003700620 +15856 clk cpu0 IT (15820) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +15856 clk cpu0 R cpsr 820003c5 +15857 clk cpu0 IT (15821) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +15858 clk cpu0 IT (15822) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +15858 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +15858 clk cpu0 MW8 03700618:000000f00618_NS f800f800_f800f800 +15858 clk cpu0 R SP_EL1 0000000003700610 +15859 clk cpu0 IT (15823) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +15859 clk cpu0 MW8 03700600:000000f00600_NS 00000000_002c0007 +15859 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00000001 +15859 clk cpu0 R SP_EL1 0000000003700600 +15860 clk cpu0 IT (15824) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +15860 clk cpu0 R X5 0000000000000000 +15861 clk cpu0 IT (15825) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +15861 clk cpu0 R X1 0000000000000000 +15862 clk cpu0 IT (15826) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +15862 clk cpu0 R cpsr 820003c5 +15863 clk cpu0 IT (15827) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +15863 clk cpu0 MR8 03700600:000000f00600_NS 00000000_002c0007 +15863 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00000001 +15863 clk cpu0 R SP_EL1 0000000003700610 +15863 clk cpu0 R X0 00000000002C0007 +15863 clk cpu0 R X1 0000000000000001 +15864 clk cpu0 IT (15828) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +15865 clk cpu0 IT (15829) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +15865 clk cpu0 MW8 03700600:000000f00600_NS 00000000_90000000 +15865 clk cpu0 MW8 03700608:000000f00608_NS 03ff8000_03ff8000 +15865 clk cpu0 R SP_EL1 0000000003700600 +15866 clk cpu0 IT (15830) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +15866 clk cpu0 R X6 0000000000000001 +15867 clk cpu0 IT (15831) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +15867 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +15867 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000000 +15867 clk cpu0 R SP_EL1 00000000037005F0 +15868 clk cpu0 IT (15832) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +15868 clk cpu0 MW8 037005e0:000000f005e0_NS ffffffff_fe00000f +15868 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_0001111c +15868 clk cpu0 R SP_EL1 00000000037005E0 +15869 clk cpu0 IT (15833) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +15869 clk cpu0 R X3 0000000000000000 +15870 clk cpu0 IT (15834) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +15870 clk cpu0 R cpsr 820003c5 +15871 clk cpu0 IS (15835) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +15872 clk cpu0 IT (15836) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +15872 clk cpu0 R X3 0000000000000000 +15873 clk cpu0 IT (15837) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +15873 clk cpu0 R cpsr 820003c5 +15874 clk cpu0 IS (15838) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +15875 clk cpu0 IT (15839) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +15875 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +15875 clk cpu0 R X2 0000000000035A00 +15876 clk cpu0 IT (15840) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +15877 clk cpu0 IT (15841) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +15877 clk cpu0 R X3 0000000000000058 +15878 clk cpu0 IT (15842) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +15878 clk cpu0 R X3 0000000000000058 +15879 clk cpu0 IT (15843) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +15879 clk cpu0 R X3 00000000000002C0 +15880 clk cpu0 IT (15844) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +15880 clk cpu0 R X2 0000000000035CC0 +15881 clk cpu0 IT (15845) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +15881 clk cpu0 MR8 00035cc0:000010035cc0_NS 00000000_00036de4 +15881 clk cpu0 R X4 0000000000036DE4 +15882 clk cpu0 IT (15846) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +15882 clk cpu0 R cpsr 82000bc5 +15882 clk cpu0 R X30 0000000000035990 +15883 clk cpu0 IT (15847) 00036de4:000010036de4_NS d5389b20 O EL1h_n : MRS x0,s3_0_c9_c11_1 +15883 clk cpu0 R cpsr 820003c5 +15883 clk cpu0 R X0 0000000023002399 +15884 clk cpu0 IT (15848) 00036de8:000010036de8_NS f14008bf O EL1h_n : CMP x5,#2,LSL #12 +15884 clk cpu0 R cpsr 820003c5 +15885 clk cpu0 IT (15849) 00036dec:000010036dec_NS 54000041 O EL1h_n : B.NE 0x36df4 +15886 clk cpu0 IT (15850) 00036df4:000010036df4_NS d65f03c0 O EL1h_n : RET +15887 clk cpu0 IT (15851) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +15887 clk cpu0 MR8 037005e0:000000f005e0_NS ffffffff_fe00000f +15887 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_0001111c +15887 clk cpu0 R SP_EL1 00000000037005F0 +15887 clk cpu0 R X29 FFFFFFFFFE00000F +15887 clk cpu0 R X30 000000000001111C +15888 clk cpu0 IT (15852) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +15888 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +15888 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +15888 clk cpu0 R SP_EL1 0000000003700600 +15888 clk cpu0 R X2 0000000000000001 +15888 clk cpu0 R X3 0000000000000000 +15889 clk cpu0 IT (15853) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +15889 clk cpu0 MR8 03700600:000000f00600_NS 00000000_90000000 +15889 clk cpu0 MR8 03700608:000000f00608_NS 03ff8000_03ff8000 +15889 clk cpu0 R SP_EL1 0000000003700610 +15889 clk cpu0 R X6 0000000090000000 +15889 clk cpu0 R X7 03FF800003FF8000 +15890 clk cpu0 IT (15854) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +15890 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +15890 clk cpu0 MR8 03700618:000000f00618_NS f800f800_f800f800 +15890 clk cpu0 R SP_EL1 0000000003700620 +15890 clk cpu0 R X4 0000000000000000 +15890 clk cpu0 R X5 F800F800F800F800 +15891 clk cpu0 IT (15855) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +15891 clk cpu0 R cpsr 820003c5 +15891 clk cpu0 R PMBIDR_EL1 00000030 +15891 clk cpu0 R TRBIDR_EL1 000000000000002b +15892 clk cpu0 IT (15856) 000a4bec:0000100a4bec_NS d65f03c0 O EL1h_n : RET +15893 clk cpu0 IT (15857) 0001111c:00001001111c_NS 52800029 O EL1h_n : MOV w9,#1 +15893 clk cpu0 R X9 0000000000000001 +15894 clk cpu0 IT (15858) 00011120:000010011120_NS f90003e0 O EL1h_n : STR x0,[sp,#0] +15894 clk cpu0 MW8 03700620:000000f00620_NS 00000000_23002399 +15895 clk cpu0 IT (15859) 00011124:000010011124_NS 2a0903e0 O EL1h_n : MOV w0,w9 +15895 clk cpu0 R X0 0000000000000001 +15896 clk cpu0 IT (15860) 00011128:000010011128_NS f00001c1 O EL1h_n : ADRP x1,0x4c128 +15896 clk cpu0 R X1 000000000004C000 +15897 clk cpu0 IT (15861) 0001112c:00001001112c_NS 9132ec21 O EL1h_n : ADD x1,x1,#0xcbb +15897 clk cpu0 R X1 000000000004CCBB +15898 clk cpu0 IT (15862) 00011130:000010011130_NS f94003e2 O EL1h_n : LDR x2,[sp,#0] +15898 clk cpu0 MR8 03700620:000000f00620_NS 00000000_23002399 +15898 clk cpu0 R X2 0000000023002399 +15899 clk cpu0 IT (15863) 00011134:000010011134_NS 94022ce6 O EL1h_n : BL 0x9c4cc +15899 clk cpu0 R X30 0000000000011138 +15900 clk cpu0 IT (15864) 0009c4cc:00001009c4cc_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +15900 clk cpu0 R SP_EL1 0000000003700590 +15901 clk cpu0 IT (15865) 0009c4d0:00001009c4d0_NS d0030bc8 O EL1h_n : ADRP x8,0x62164d0 +15901 clk cpu0 R X8 0000000006216000 +15902 clk cpu0 IT (15866) 0009c4d4:00001009c4d4_NS b940f908 O EL1h_n : LDR w8,[x8,#0xf8] +15902 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +15902 clk cpu0 R X8 0000000000000003 +15902 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0106 CLEAN 0x0000162420c0_NS +15902 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0106 INVAL 0x0000162420c0_NS +15902 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0106 ALLOC 0x0000152160c0_NS +15902 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0831 ALLOC 0x0000162420c0_NS +15903 clk cpu0 IT (15867) 0009c4d8:00001009c4d8_NS a90753f5 O EL1h_n : STP x21,x20,[sp,#0x70] +15903 clk cpu0 MW8 03700600:000000f00600_NS 00000000_02f00028 +15903 clk cpu0 MW8 03700608:000000f00608_NS ff83ff83_ff83ff83 +15904 clk cpu0 IT (15868) 0009c4dc:00001009c4dc_NS a9087bf3 O EL1h_n : STP x19,x30,[sp,#0x80] +15904 clk cpu0 MW8 03700610:000000f00610_NS 00000000_062160a2 +15904 clk cpu0 MW8 03700618:000000f00618_NS 00000000_00011138 +15905 clk cpu0 IT (15869) 0009c4e0:00001009c4e0_NS a9000fe2 O EL1h_n : STP x2,x3,[sp,#0] +15905 clk cpu0 MW8 03700590:000000f00590_NS 00000000_23002399 +15905 clk cpu0 MW8 03700598:000000f00598_NS 00000000_00000000 +15906 clk cpu0 IT (15870) 0009c4e4:00001009c4e4_NS 6b00011f O EL1h_n : CMP w8,w0 +15906 clk cpu0 R cpsr 220003c5 +15907 clk cpu0 IT (15871) 0009c4e8:00001009c4e8_NS a90117e4 O EL1h_n : STP x4,x5,[sp,#0x10] +15907 clk cpu0 MW8 037005a0:000000f005a0_NS 00000000_00000000 +15907 clk cpu0 MW8 037005a8:000000f005a8_NS f800f800_f800f800 +15908 clk cpu0 IT (15872) 0009c4ec:00001009c4ec_NS a9021fe6 O EL1h_n : STP x6,x7,[sp,#0x20] +15908 clk cpu0 MW8 037005b0:000000f005b0_NS 00000000_90000000 +15908 clk cpu0 MW8 037005b8:000000f005b8_NS 03ff8000_03ff8000 +15909 clk cpu0 IT (15873) 0009c4f0:00001009c4f0_NS a9067fff O EL1h_n : STP xzr,xzr,[sp,#0x60] +15909 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000000 +15909 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000000 +15910 clk cpu0 IT (15874) 0009c4f4:00001009c4f4_NS a9057fff O EL1h_n : STP xzr,xzr,[sp,#0x50] +15910 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000000 +15910 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00000000 +15911 clk cpu0 IS (15875) 0009c4f8:00001009c4f8_NS 54000423 O EL1h_n : B.CC 0x9c57c +15912 clk cpu0 IT (15876) 0009c4fc:00001009c4fc_NS 90017b74 O EL1h_n : ADRP x20,0x30084fc +15912 clk cpu0 R X20 0000000003008000 +15913 clk cpu0 IT (15877) 0009c500:00001009c500_NS 9114a294 O EL1h_n : ADD x20,x20,#0x528 +15913 clk cpu0 R X20 0000000003008528 +15914 clk cpu0 IT (15878) 0009c504:00001009c504_NS aa1403e0 O EL1h_n : MOV x0,x20 +15914 clk cpu0 R X0 0000000003008528 +15915 clk cpu0 IT (15879) 0009c508:00001009c508_NS aa0103f3 O EL1h_n : MOV x19,x1 +15915 clk cpu0 R X19 000000000004CCBB +15916 clk cpu0 IT (15880) 0009c50c:00001009c50c_NS 97fff114 O EL1h_n : BL 0x9895c +15916 clk cpu0 R X30 000000000009C510 +15917 clk cpu0 IT (15881) 0009895c:00001009895c_NS d0030be8 O EL1h_n : ADRP x8,0x621695c +15917 clk cpu0 R X8 0000000006216000 +15918 clk cpu0 IT (15882) 00098960:000010098960_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +15918 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +15918 clk cpu0 R X8 0000000000000001 +15918 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0103 INVAL 0x000070472040_NS +15918 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0103 ALLOC 0x000015216040_NS +15919 clk cpu0 IT (15883) 00098964:000010098964_NS 7100091f O EL1h_n : CMP w8,#2 +15919 clk cpu0 R cpsr 820003c5 +15920 clk cpu0 IT (15884) 00098968:000010098968_NS 54000043 O EL1h_n : B.CC 0x98970 +15921 clk cpu0 IT (15885) 00098970:000010098970_NS d65f03c0 O EL1h_n : RET +15922 clk cpu0 IT (15886) 0009c510:00001009c510_NS 910003e9 O EL1h_n : MOV x9,sp +15922 clk cpu0 R X9 0000000003700590 +15923 clk cpu0 IT (15887) 0009c514:00001009c514_NS 128005e8 O EL1h_n : MOV w8,#0xffffffd0 +15923 clk cpu0 R X8 00000000FFFFFFD0 +15924 clk cpu0 IT (15888) 0009c518:00001009c518_NS 910243ea O EL1h_n : ADD x10,sp,#0x90 +15924 clk cpu0 R X10 0000000003700620 +15925 clk cpu0 IT (15889) 0009c51c:00001009c51c_NS 9100c129 O EL1h_n : ADD x9,x9,#0x30 +15925 clk cpu0 R X9 00000000037005C0 +15926 clk cpu0 IT (15890) 0009c520:00001009c520_NS 2a1f03e0 O EL1h_n : MOV w0,wzr +15926 clk cpu0 R X0 0000000000000000 +15927 clk cpu0 IT (15891) 0009c524:00001009c524_NS 2a1f03e1 O EL1h_n : MOV w1,wzr +15927 clk cpu0 R X1 0000000000000000 +15928 clk cpu0 IT (15892) 0009c528:00001009c528_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +15928 clk cpu0 R X2 0000000000000000 +15929 clk cpu0 IT (15893) 0009c52c:00001009c52c_NS f90037e8 O EL1h_n : STR x8,[sp,#0x68] +15929 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_ffffffd0 +15930 clk cpu0 IT (15894) 0009c530:00001009c530_NS a90527ea O EL1h_n : STP x10,x9,[sp,#0x50] +15930 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_03700620 +15930 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_037005c0 +15931 clk cpu0 IT (15895) 0009c534:00001009c534_NS d503201f O EL1h_n : NOP +15932 clk cpu0 IT (15896) 0009c538:00001009c538_NS a945a3ea O EL1h_n : LDP x10,x8,[sp,#0x58] +15932 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_037005c0 +15932 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +15932 clk cpu0 R X8 0000000000000000 +15932 clk cpu0 R X10 00000000037005C0 +15933 clk cpu0 IT (15897) 0009c53c:00001009c53c_NS f9402be9 O EL1h_n : LDR x9,[sp,#0x50] +15933 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_03700620 +15933 clk cpu0 R X9 0000000003700620 +15934 clk cpu0 IT (15898) 0009c540:00001009c540_NS f94037eb O EL1h_n : LDR x11,[sp,#0x68] +15934 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_ffffffd0 +15934 clk cpu0 R X11 00000000FFFFFFD0 +15935 clk cpu0 IT (15899) 0009c544:00001009c544_NS 2a0003f5 O EL1h_n : MOV w21,w0 +15935 clk cpu0 R X21 0000000000000000 +15936 clk cpu0 IT (15900) 0009c548:00001009c548_NS 9100c3e1 O EL1h_n : ADD x1,sp,#0x30 +15936 clk cpu0 R X1 00000000037005C0 +15937 clk cpu0 IT (15901) 0009c54c:00001009c54c_NS aa1303e0 O EL1h_n : MOV x0,x19 +15937 clk cpu0 R X0 000000000004CCBB +15938 clk cpu0 IT (15902) 0009c550:00001009c550_NS a903a3ea O EL1h_n : STP x10,x8,[sp,#0x38] +15938 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_037005c0 +15938 clk cpu0 MW8 037005d0:000000f005d0_NS 00000000_00000000 +15939 clk cpu0 IT (15903) 0009c554:00001009c554_NS f9001be9 O EL1h_n : STR x9,[sp,#0x30] +15939 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_03700620 +15940 clk cpu0 IT (15904) 0009c558:00001009c558_NS f90027eb O EL1h_n : STR x11,[sp,#0x48] +15940 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_ffffffd0 +15941 clk cpu0 IT (15905) 0009c55c:00001009c55c_NS 97ffd97b O EL1h_n : BL 0x92b48 +15941 clk cpu0 R X30 000000000009C560 +15942 clk cpu0 IT (15906) 00092b48:000010092b48_NS d10283ff O EL1h_n : SUB sp,sp,#0xa0 +15942 clk cpu0 R SP_EL1 00000000037004F0 +15943 clk cpu0 IT (15907) 00092b4c:000010092b4c_NS a9097bf3 O EL1h_n : STP x19,x30,[sp,#0x90] +15943 clk cpu0 MW8 03700580:000000f00580_NS 00000000_0004ccbb +15943 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0009c560 +15944 clk cpu0 IT (15908) 00092b50:000010092b50_NS aa0103f3 O EL1h_n : MOV x19,x1 +15944 clk cpu0 R X19 00000000037005C0 +15945 clk cpu0 IT (15909) 00092b54:000010092b54_NS d0fffdc1 O EL1h_n : ADRP x1,0x4cb54 +15945 clk cpu0 R X1 000000000004C000 +15946 clk cpu0 IT (15910) 00092b58:000010092b58_NS a90853f5 O EL1h_n : STP x21,x20,[sp,#0x80] +15946 clk cpu0 MW8 03700570:000000f00570_NS 00000000_00000000 +15946 clk cpu0 MW8 03700578:000000f00578_NS 00000000_03008528 +15947 clk cpu0 IT (15911) 00092b5c:000010092b5c_NS aa0003f4 O EL1h_n : MOV x20,x0 +15947 clk cpu0 R X20 000000000004CCBB +15948 clk cpu0 IT (15912) 00092b60:000010092b60_NS 91002c21 O EL1h_n : ADD x1,x1,#0xb +15948 clk cpu0 R X1 000000000004C00B +15949 clk cpu0 IT (15913) 00092b64:000010092b64_NS 910013e0 O EL1h_n : ADD x0,sp,#4 +15949 clk cpu0 R X0 00000000037004F4 +15950 clk cpu0 IT (15914) 00092b68:000010092b68_NS 52800762 O EL1h_n : MOV w2,#0x3b +15950 clk cpu0 R X2 000000000000003B +15951 clk cpu0 IT (15915) 00092b6c:000010092b6c_NS f90023fc O EL1h_n : STR x28,[sp,#0x40] +15951 clk cpu0 MW8 03700530:000000f00530_NS ff7fff7f_ff7fff7f +15952 clk cpu0 IT (15916) 00092b70:000010092b70_NS a9056bfb O EL1h_n : STP x27,x26,[sp,#0x50] +15952 clk cpu0 MW8 03700540:000000f00540_NS 00010001_00010001 +15952 clk cpu0 MW8 03700548:000000f00548_NS ffe000ff_ffe000ff +15953 clk cpu0 IT (15917) 00092b74:000010092b74_NS a90663f9 O EL1h_n : STP x25,x24,[sp,#0x60] +15953 clk cpu0 MW8 03700550:000000f00550_NS 00000000_0000003c +15953 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00007c00 +15954 clk cpu0 IT (15918) 00092b78:000010092b78_NS a9075bf7 O EL1h_n : STP x23,x22,[sp,#0x70] +15954 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00000000 +15954 clk cpu0 MW8 03700568:000000f00568_NS 00000000_90000000 +15955 clk cpu0 IT (15919) 00092b7c:000010092b7c_NS 97fdf655 O EL1h_n : BL 0x104d0 +15955 clk cpu0 R X30 0000000000092B80 +15956 clk cpu0 IT (15920) 000104d0:0000100104d0_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +15956 clk cpu0 MW8 037004e0:000000f004e0_NS 00000000_037005c0 +15956 clk cpu0 MW8 037004e8:000000f004e8_NS 00000000_00092b80 +15956 clk cpu0 R SP_EL1 00000000037004E0 +15957 clk cpu0 IT (15921) 000104d4:0000100104d4_NS aa0003f3 O EL1h_n : MOV x19,x0 +15957 clk cpu0 R X19 00000000037004F4 +15958 clk cpu0 IT (15922) 000104d8:0000100104d8_NS 9400002b O EL1h_n : BL 0x10584 +15958 clk cpu0 R X30 00000000000104DC +15959 clk cpu0 IT (15923) 00010584:000010010584_NS f100105f O EL1h_n : CMP x2,#4 +15959 clk cpu0 R cpsr 220003c5 +15960 clk cpu0 IS (15924) 00010588:000010010588_NS 54000643 O EL1h_n : B.CC 0x10650 +15961 clk cpu0 IT (15925) 0001058c:00001001058c_NS f240041f O EL1h_n : TST x0,#3 +15961 clk cpu0 R cpsr 420003c5 +15962 clk cpu0 IT (15926) 00010590:000010010590_NS 54000320 O EL1h_n : B.EQ 0x105f4 +15963 clk cpu0 IT (15927) 000105f4:0000100105f4_NS 7200042a O EL1h_n : ANDS w10,w1,#3 +15963 clk cpu0 R cpsr 020003c5 +15963 clk cpu0 R X10 0000000000000003 +15964 clk cpu0 IS (15928) 000105f8:0000100105f8_NS 54000440 O EL1h_n : B.EQ 0x10680 +15965 clk cpu0 IT (15929) 000105fc:0000100105fc_NS 52800409 O EL1h_n : MOV w9,#0x20 +15965 clk cpu0 R X9 0000000000000020 +15966 clk cpu0 IT (15930) 00010600:000010010600_NS cb0a0028 O EL1h_n : SUB x8,x1,x10 +15966 clk cpu0 R X8 000000000004C008 +15967 clk cpu0 IT (15931) 00010604:000010010604_NS f100105f O EL1h_n : CMP x2,#4 +15967 clk cpu0 R cpsr 220003c5 +15968 clk cpu0 IT (15932) 00010608:000010010608_NS 4b0a0d29 O EL1h_n : SUB w9,w9,w10,LSL #3 +15968 clk cpu0 R X9 0000000000000008 +15969 clk cpu0 IS (15933) 0001060c:00001001060c_NS 540001c3 O EL1h_n : B.CC 0x10644 +15970 clk cpu0 IT (15934) 00010610:000010010610_NS b940010c O EL1h_n : LDR w12,[x8,#0] +15970 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +15970 clk cpu0 R X12 000000000A00000A +15971 clk cpu0 IT (15935) 00010614:000010010614_NS 531d714a O EL1h_n : UBFIZ w10,w10,#3,#29 +15971 clk cpu0 R X10 0000000000000018 +15972 clk cpu0 IT (15936) 00010618:000010010618_NS aa0203eb O EL1h_n : MOV x11,x2 +15972 clk cpu0 R X11 000000000000003B +15973 clk cpu0 IT (15937) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15973 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +15973 clk cpu0 R X8 000000000004C00C +15973 clk cpu0 R X13 000000006F727245 +15974 clk cpu0 IT (15938) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15974 clk cpu0 R X12 000000000000000A +15975 clk cpu0 IT (15939) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15975 clk cpu0 R X11 0000000000000037 +15976 clk cpu0 IT (15940) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15976 clk cpu0 R cpsr 220003c5 +15977 clk cpu0 IT (15941) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15977 clk cpu0 R X14 0000000072724500 +15978 clk cpu0 IT (15942) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15978 clk cpu0 R X12 000000007272450A +15979 clk cpu0 IT (15943) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15979 clk cpu0 MW4 037004f4:000000f004f4_NS 7272450a +15979 clk cpu0 R X0 00000000037004F8 +15980 clk cpu0 IT (15944) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15980 clk cpu0 R X12 000000006F727245 +15981 clk cpu0 IT (15945) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15982 clk cpu0 IT (15946) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15982 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +15982 clk cpu0 R X8 000000000004C010 +15982 clk cpu0 R X13 0000000049203A72 +15983 clk cpu0 IT (15947) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15983 clk cpu0 R X12 000000000000006F +15984 clk cpu0 IT (15948) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15984 clk cpu0 R X11 0000000000000033 +15985 clk cpu0 IT (15949) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15985 clk cpu0 R cpsr 220003c5 +15986 clk cpu0 IT (15950) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15986 clk cpu0 R X14 00000000203A7200 +15987 clk cpu0 IT (15951) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15987 clk cpu0 R X12 00000000203A726F +15988 clk cpu0 IT (15952) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15988 clk cpu0 MW4 037004f8:000000f004f8_NS 203a726f +15988 clk cpu0 R X0 00000000037004FC +15989 clk cpu0 IT (15953) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15989 clk cpu0 R X12 0000000049203A72 +15990 clk cpu0 IT (15954) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +15991 clk cpu0 IT (15955) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +15991 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +15991 clk cpu0 R X8 000000000004C014 +15991 clk cpu0 R X13 0000000067656C6C +15992 clk cpu0 IT (15956) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +15992 clk cpu0 R X12 0000000000000049 +15993 clk cpu0 IT (15957) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +15993 clk cpu0 R X11 000000000000002F +15994 clk cpu0 IT (15958) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +15994 clk cpu0 R cpsr 220003c5 +15995 clk cpu0 IT (15959) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +15995 clk cpu0 R X14 00000000656C6C00 +15996 clk cpu0 IT (15960) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +15996 clk cpu0 R X12 00000000656C6C49 +15997 clk cpu0 IT (15961) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +15997 clk cpu0 MW4 037004fc:000000f004fc_NS 656c6c49 +15997 clk cpu0 R X0 0000000003700500 +15998 clk cpu0 IT (15962) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +15998 clk cpu0 R X12 0000000067656C6C +15999 clk cpu0 IT (15963) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16000 clk cpu0 IT (15964) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16000 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +16000 clk cpu0 R X8 000000000004C018 +16000 clk cpu0 R X13 0000000066206C61 +16001 clk cpu0 IT (15965) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16001 clk cpu0 R X12 0000000000000067 +16002 clk cpu0 IT (15966) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16002 clk cpu0 R X11 000000000000002B +16003 clk cpu0 IT (15967) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16003 clk cpu0 R cpsr 220003c5 +16004 clk cpu0 IT (15968) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16004 clk cpu0 R X14 00000000206C6100 +16005 clk cpu0 IT (15969) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16005 clk cpu0 R X12 00000000206C6167 +16006 clk cpu0 IT (15970) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16006 clk cpu0 MW4 03700500:000000f00500_NS 206c6167 +16006 clk cpu0 R X0 0000000003700504 +16007 clk cpu0 IT (15971) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16007 clk cpu0 R X12 0000000066206C61 +16008 clk cpu0 IT (15972) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16009 clk cpu0 IT (15973) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16009 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +16009 clk cpu0 R X8 000000000004C01C +16009 clk cpu0 R X13 00000000616D726F +16010 clk cpu0 IT (15974) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16010 clk cpu0 R X12 0000000000000066 +16011 clk cpu0 IT (15975) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16011 clk cpu0 R X11 0000000000000027 +16012 clk cpu0 IT (15976) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16012 clk cpu0 R cpsr 220003c5 +16013 clk cpu0 IT (15977) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16013 clk cpu0 R X14 000000006D726F00 +16014 clk cpu0 IT (15978) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16014 clk cpu0 R X12 000000006D726F66 +16015 clk cpu0 IT (15979) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16015 clk cpu0 MW4 03700504:000000f00504_NS 6d726f66 +16015 clk cpu0 R X0 0000000003700508 +16016 clk cpu0 IT (15980) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16016 clk cpu0 R X12 00000000616D726F +16017 clk cpu0 IT (15981) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16018 clk cpu0 IT (15982) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16018 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +16018 clk cpu0 R X8 000000000004C020 +16018 clk cpu0 R X13 0000000070732074 +16019 clk cpu0 IT (15983) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16019 clk cpu0 R X12 0000000000000061 +16020 clk cpu0 IT (15984) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16020 clk cpu0 R X11 0000000000000023 +16021 clk cpu0 IT (15985) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16021 clk cpu0 R cpsr 220003c5 +16022 clk cpu0 IT (15986) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16022 clk cpu0 R X14 0000000073207400 +16023 clk cpu0 IT (15987) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16023 clk cpu0 R X12 0000000073207461 +16024 clk cpu0 IT (15988) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16024 clk cpu0 MW4 03700508:000000f00508_NS 73207461 +16024 clk cpu0 R X0 000000000370050C +16025 clk cpu0 IT (15989) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16025 clk cpu0 R X12 0000000070732074 +16026 clk cpu0 IT (15990) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16027 clk cpu0 IT (15991) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16027 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +16027 clk cpu0 R X8 000000000004C024 +16027 clk cpu0 R X13 0000000066696365 +16028 clk cpu0 IT (15992) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16028 clk cpu0 R X12 0000000000000070 +16029 clk cpu0 IT (15993) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16029 clk cpu0 R X11 000000000000001F +16030 clk cpu0 IT (15994) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16030 clk cpu0 R cpsr 220003c5 +16031 clk cpu0 IT (15995) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16031 clk cpu0 R X14 0000000069636500 +16032 clk cpu0 IT (15996) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16032 clk cpu0 R X12 0000000069636570 +16033 clk cpu0 IT (15997) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16033 clk cpu0 MW4 0370050c:000000f0050c_NS 69636570 +16033 clk cpu0 R X0 0000000003700510 +16034 clk cpu0 IT (15998) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16034 clk cpu0 R X12 0000000066696365 +16035 clk cpu0 IT (15999) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16036 clk cpu0 IT (16000) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16036 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +16036 clk cpu0 R X8 000000000004C028 +16036 clk cpu0 R X13 0000000020726569 +16037 clk cpu0 IT (16001) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16037 clk cpu0 R X12 0000000000000066 +16038 clk cpu0 IT (16002) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16038 clk cpu0 R X11 000000000000001B +16039 clk cpu0 IT (16003) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16039 clk cpu0 R cpsr 220003c5 +16040 clk cpu0 IT (16004) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16040 clk cpu0 R X14 0000000072656900 +16041 clk cpu0 IT (16005) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16041 clk cpu0 R X12 0000000072656966 +16042 clk cpu0 IT (16006) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16042 clk cpu0 MW4 03700510:000000f00510_NS 72656966 +16042 clk cpu0 R X0 0000000003700514 +16043 clk cpu0 IT (16007) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16043 clk cpu0 R X12 0000000020726569 +16044 clk cpu0 IT (16008) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16045 clk cpu0 IT (16009) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16045 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +16045 clk cpu0 R X8 000000000004C02C +16045 clk cpu0 R X13 0000000064657375 +16046 clk cpu0 IT (16010) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16046 clk cpu0 R X12 0000000000000020 +16047 clk cpu0 IT (16011) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16047 clk cpu0 R X11 0000000000000017 +16048 clk cpu0 IT (16012) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16048 clk cpu0 R cpsr 220003c5 +16049 clk cpu0 IT (16013) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16049 clk cpu0 R X14 0000000065737500 +16050 clk cpu0 IT (16014) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16050 clk cpu0 R X12 0000000065737520 +16051 clk cpu0 IT (16015) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16051 clk cpu0 MW4 03700514:000000f00514_NS 65737520 +16051 clk cpu0 R X0 0000000003700518 +16052 clk cpu0 IT (16016) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16052 clk cpu0 R X12 0000000064657375 +16053 clk cpu0 IT (16017) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16054 clk cpu0 IT (16018) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16054 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +16054 clk cpu0 R X8 000000000004C030 +16054 clk cpu0 R X13 000000005F27203A +16055 clk cpu0 IT (16019) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16055 clk cpu0 R X12 0000000000000064 +16056 clk cpu0 IT (16020) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16056 clk cpu0 R X11 0000000000000013 +16057 clk cpu0 IT (16021) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16057 clk cpu0 R cpsr 220003c5 +16058 clk cpu0 IT (16022) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16058 clk cpu0 R X14 0000000027203A00 +16059 clk cpu0 IT (16023) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16059 clk cpu0 R X12 0000000027203A64 +16060 clk cpu0 IT (16024) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16060 clk cpu0 MW4 03700518:000000f00518_NS 27203a64 +16060 clk cpu0 R X0 000000000370051C +16061 clk cpu0 IT (16025) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16061 clk cpu0 R X12 000000005F27203A +16062 clk cpu0 IT (16026) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16063 clk cpu0 IT (16027) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16063 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +16063 clk cpu0 R X8 000000000004C034 +16063 clk cpu0 R X13 0000000045202E27 +16064 clk cpu0 IT (16028) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16064 clk cpu0 R X12 000000000000005F +16065 clk cpu0 IT (16029) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16065 clk cpu0 R X11 000000000000000F +16066 clk cpu0 IT (16030) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16066 clk cpu0 R cpsr 220003c5 +16067 clk cpu0 IT (16031) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16067 clk cpu0 R X14 00000000202E2700 +16068 clk cpu0 IT (16032) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16068 clk cpu0 R X12 00000000202E275F +16069 clk cpu0 IT (16033) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16069 clk cpu0 MW4 0370051c:000000f0051c_NS 202e275f +16069 clk cpu0 R X0 0000000003700520 +16070 clk cpu0 IT (16034) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16070 clk cpu0 R X12 0000000045202E27 +16071 clk cpu0 IT (16035) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16072 clk cpu0 IT (16036) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16072 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +16072 clk cpu0 R X8 000000000004C038 +16072 clk cpu0 R X13 000000006E69646E +16073 clk cpu0 IT (16037) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16073 clk cpu0 R X12 0000000000000045 +16074 clk cpu0 IT (16038) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16074 clk cpu0 R X11 000000000000000B +16075 clk cpu0 IT (16039) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16075 clk cpu0 R cpsr 220003c5 +16076 clk cpu0 IT (16040) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16076 clk cpu0 R X14 0000000069646E00 +16077 clk cpu0 IT (16041) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16077 clk cpu0 R X12 0000000069646E45 +16078 clk cpu0 IT (16042) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16078 clk cpu0 MW4 03700520:000000f00520_NS 69646e45 +16078 clk cpu0 R X0 0000000003700524 +16079 clk cpu0 IT (16043) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16079 clk cpu0 R X12 000000006E69646E +16080 clk cpu0 IT (16044) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16081 clk cpu0 IT (16045) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16081 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +16081 clk cpu0 R X8 000000000004C03C +16081 clk cpu0 R X13 0000000065542067 +16082 clk cpu0 IT (16046) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16082 clk cpu0 R X12 000000000000006E +16083 clk cpu0 IT (16047) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16083 clk cpu0 R X11 0000000000000007 +16084 clk cpu0 IT (16048) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16084 clk cpu0 R cpsr 220003c5 +16085 clk cpu0 IT (16049) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16085 clk cpu0 R X14 0000000054206700 +16086 clk cpu0 IT (16050) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16086 clk cpu0 R X12 000000005420676E +16087 clk cpu0 IT (16051) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16087 clk cpu0 MW4 03700524:000000f00524_NS 5420676e +16087 clk cpu0 R X0 0000000003700528 +16088 clk cpu0 IT (16052) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16088 clk cpu0 R X12 0000000065542067 +16089 clk cpu0 IT (16053) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16090 clk cpu0 IT (16054) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16090 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +16090 clk cpu0 R X8 000000000004C040 +16090 clk cpu0 R X13 000000000A2E7473 +16091 clk cpu0 IT (16055) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16091 clk cpu0 R X12 0000000000000065 +16092 clk cpu0 IT (16056) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16092 clk cpu0 R X11 0000000000000003 +16093 clk cpu0 IT (16057) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16093 clk cpu0 R cpsr 620003c5 +16094 clk cpu0 IT (16058) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16094 clk cpu0 R X14 000000002E747300 +16095 clk cpu0 IT (16059) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16095 clk cpu0 R X12 000000002E747365 +16096 clk cpu0 IT (16060) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16096 clk cpu0 MW4 03700528:000000f00528_NS 2e747365 +16096 clk cpu0 R X0 000000000370052C +16097 clk cpu0 IT (16061) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16097 clk cpu0 R X12 000000000A2E7473 +16098 clk cpu0 IS (16062) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16099 clk cpu0 IT (16063) 00010640:000010010640_NS 92400442 O EL1h_n : AND x2,x2,#3 +16099 clk cpu0 R X2 0000000000000003 +16100 clk cpu0 IT (16064) 00010644:000010010644_NS 53037d29 O EL1h_n : LSR w9,w9,#3 +16100 clk cpu0 R X9 0000000000000001 +16101 clk cpu0 IT (16065) 00010648:000010010648_NS cb090108 O EL1h_n : SUB x8,x8,x9 +16101 clk cpu0 R X8 000000000004C03F +16102 clk cpu0 IT (16066) 0001064c:00001001064c_NS 91001101 O EL1h_n : ADD x1,x8,#4 +16102 clk cpu0 R X1 000000000004C043 +16103 clk cpu0 IT (16067) 00010650:000010010650_NS 7100045f O EL1h_n : CMP w2,#1 +16103 clk cpu0 R cpsr 220003c5 +16104 clk cpu0 IS (16068) 00010654:000010010654_NS 5400014b O EL1h_n : B.LT 0x1067c +16105 clk cpu0 IT (16069) 00010658:000010010658_NS 39400028 O EL1h_n : LDRB w8,[x1,#0] +16105 clk cpu0 MR1 0004c043:00001004c043_NS 0a +16105 clk cpu0 R X8 000000000000000A +16106 clk cpu0 IT (16070) 0001065c:00001001065c_NS 39000008 O EL1h_n : STRB w8,[x0,#0] +16106 clk cpu0 MW1 0370052c:000000f0052c_NS 0a +16107 clk cpu0 IS (16071) 00010660:000010010660_NS 540000e0 O EL1h_n : B.EQ 0x1067c +16108 clk cpu0 IT (16072) 00010664:000010010664_NS 39400428 O EL1h_n : LDRB w8,[x1,#1] +16108 clk cpu0 MR1 0004c044:00001004c044_NS 00 +16108 clk cpu0 R X8 0000000000000000 +16109 clk cpu0 IT (16073) 00010668:000010010668_NS 71000c5f O EL1h_n : CMP w2,#3 +16109 clk cpu0 R cpsr 620003c5 +16110 clk cpu0 IT (16074) 0001066c:00001001066c_NS 39000408 O EL1h_n : STRB w8,[x0,#1] +16110 clk cpu0 MW1 0370052d:000000f0052d_NS 00 +16111 clk cpu0 IS (16075) 00010670:000010010670_NS 5400006b O EL1h_n : B.LT 0x1067c +16112 clk cpu0 IT (16076) 00010674:000010010674_NS 39400828 O EL1h_n : LDRB w8,[x1,#2] +16112 clk cpu0 MR1 0004c045:00001004c045_NS 00 +16112 clk cpu0 R X8 0000000000000000 +16113 clk cpu0 IT (16077) 00010678:000010010678_NS 39000808 O EL1h_n : STRB w8,[x0,#2] +16113 clk cpu0 MW1 0370052e:000000f0052e_NS 00 +16114 clk cpu0 IT (16078) 0001067c:00001001067c_NS d65f03c0 O EL1h_n : RET +16115 clk cpu0 IT (16079) 000104dc:0000100104dc_NS aa1303e0 O EL1h_n : MOV x0,x19 +16115 clk cpu0 R X0 00000000037004F4 +16116 clk cpu0 IT (16080) 000104e0:0000100104e0_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +16116 clk cpu0 MR8 037004e0:000000f004e0_NS 00000000_037005c0 +16116 clk cpu0 MR8 037004e8:000000f004e8_NS 00000000_00092b80 +16116 clk cpu0 R SP_EL1 00000000037004F0 +16116 clk cpu0 R X19 00000000037005C0 +16116 clk cpu0 R X30 0000000000092B80 +16117 clk cpu0 IT (16081) 000104e4:0000100104e4_NS d65f03c0 O EL1h_n : RET +16118 clk cpu0 IT (16082) 00092b80:000010092b80_NS d0fffdd6 O EL1h_n : ADRP x22,0x4cb80 +16118 clk cpu0 R X22 000000000004C000 +16119 clk cpu0 IT (16083) 00092b84:000010092b84_NS d0fffdd7 O EL1h_n : ADRP x23,0x4cb84 +16119 clk cpu0 R X23 000000000004C000 +16120 clk cpu0 IT (16084) 00092b88:000010092b88_NS 2a1f03fa O EL1h_n : MOV w26,wzr +16120 clk cpu0 R X26 0000000000000000 +16121 clk cpu0 IT (16085) 00092b8c:000010092b8c_NS f0017cb5 O EL1h_n : ADRP x21,0x3029b8c +16121 clk cpu0 R X21 0000000003029000 +16122 clk cpu0 IT (16086) 00092b90:000010092b90_NS 910422d6 O EL1h_n : ADD x22,x22,#0x108 +16122 clk cpu0 R X22 000000000004C108 +16123 clk cpu0 IT (16087) 00092b94:000010092b94_NS 9104a6f7 O EL1h_n : ADD x23,x23,#0x129 +16123 clk cpu0 R X23 000000000004C129 +16124 clk cpu0 IT (16088) 00092b98:000010092b98_NS f0017d78 O EL1h_n : ADRP x24,0x3041b98 +16124 clk cpu0 R X24 0000000003041000 +16125 clk cpu0 IT (16089) 00092b9c:000010092b9c_NS 90030c39 O EL1h_n : ADRP x25,0x6216b9c +16125 clk cpu0 R X25 0000000006216000 +16126 clk cpu0 IT (16090) 00092ba0:000010092ba0_NS 14000005 O EL1h_n : B 0x92bb4 +16127 clk cpu0 IT (16091) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16127 clk cpu0 MR1 0004ccbb:00001004ccbb_NS 0a +16127 clk cpu0 R X8 000000000000000A +16128 clk cpu0 IT (16092) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16128 clk cpu0 R cpsr 820003c5 +16129 clk cpu0 IS (16093) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16130 clk cpu0 IS (16094) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16131 clk cpu0 IT (16095) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16131 clk cpu0 R cpsr 020003c5 +16132 clk cpu0 IT (16096) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16133 clk cpu0 IT (16097) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16133 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16133 clk cpu0 R X9 0000000013000000 +16134 clk cpu0 IT (16098) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16134 clk cpu0 R X27 000000000004CCBB +16135 clk cpu0 IT (16099) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16135 clk cpu0 R X20 000000000004CCBC +TUBE CPU0: +16136 clk cpu0 IT (16100) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16136 clk cpu0 MW1 13000000:000013000000_NS 0a +16137 clk cpu0 IT (16101) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16137 clk cpu0 MR1 0004ccbc:00001004ccbc_NS 54 +16137 clk cpu0 R X8 0000000000000054 +16138 clk cpu0 IT (16102) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16138 clk cpu0 R cpsr 220003c5 +16139 clk cpu0 IS (16103) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16140 clk cpu0 IS (16104) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16141 clk cpu0 IT (16105) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16141 clk cpu0 R cpsr 020003c5 +16142 clk cpu0 IT (16106) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16143 clk cpu0 IT (16107) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16143 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16143 clk cpu0 R X9 0000000013000000 +16144 clk cpu0 IT (16108) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16144 clk cpu0 R X27 000000000004CCBC +16145 clk cpu0 IT (16109) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16145 clk cpu0 R X20 000000000004CCBD +16146 clk cpu0 IT (16110) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16146 clk cpu0 MW1 13000000:000013000000_NS 54 +16147 clk cpu0 IT (16111) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16147 clk cpu0 MR1 0004ccbd:00001004ccbd_NS 52 +16147 clk cpu0 R X8 0000000000000052 +16148 clk cpu0 IT (16112) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16148 clk cpu0 R cpsr 220003c5 +16149 clk cpu0 IS (16113) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16150 clk cpu0 IS (16114) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16151 clk cpu0 IT (16115) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16151 clk cpu0 R cpsr 020003c5 +16152 clk cpu0 IT (16116) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16153 clk cpu0 IT (16117) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16153 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16153 clk cpu0 R X9 0000000013000000 +16154 clk cpu0 IT (16118) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16154 clk cpu0 R X27 000000000004CCBD +16155 clk cpu0 IT (16119) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16155 clk cpu0 R X20 000000000004CCBE +16156 clk cpu0 IT (16120) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16156 clk cpu0 MW1 13000000:000013000000_NS 52 +16157 clk cpu0 IT (16121) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16157 clk cpu0 MR1 0004ccbe:00001004ccbe_NS 42 +16157 clk cpu0 R X8 0000000000000042 +16158 clk cpu0 IT (16122) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16158 clk cpu0 R cpsr 220003c5 +16159 clk cpu0 IS (16123) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16160 clk cpu0 IS (16124) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16161 clk cpu0 IT (16125) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16161 clk cpu0 R cpsr 020003c5 +16162 clk cpu0 IT (16126) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16163 clk cpu0 IT (16127) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16163 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16163 clk cpu0 R X9 0000000013000000 +16164 clk cpu0 IT (16128) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16164 clk cpu0 R X27 000000000004CCBE +16165 clk cpu0 IT (16129) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16165 clk cpu0 R X20 000000000004CCBF +16166 clk cpu0 IT (16130) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16166 clk cpu0 MW1 13000000:000013000000_NS 42 +16167 clk cpu0 IT (16131) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16167 clk cpu0 MR1 0004ccbf:00001004ccbf_NS 50 +16167 clk cpu0 R X8 0000000000000050 +16168 clk cpu0 IT (16132) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16168 clk cpu0 R cpsr 220003c5 +16169 clk cpu0 IS (16133) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16170 clk cpu0 IS (16134) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16171 clk cpu0 IT (16135) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16171 clk cpu0 R cpsr 020003c5 +16172 clk cpu0 IT (16136) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16173 clk cpu0 IT (16137) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16173 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16173 clk cpu0 R X9 0000000013000000 +16174 clk cpu0 IT (16138) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16174 clk cpu0 R X27 000000000004CCBF +16175 clk cpu0 IT (16139) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16175 clk cpu0 R X20 000000000004CCC0 +16176 clk cpu0 IT (16140) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16176 clk cpu0 MW1 13000000:000013000000_NS 50 +16177 clk cpu0 IT (16141) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16177 clk cpu0 MR1 0004ccc0:00001004ccc0_NS 54 +16177 clk cpu0 R X8 0000000000000054 +16178 clk cpu0 IT (16142) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16178 clk cpu0 R cpsr 220003c5 +16179 clk cpu0 IS (16143) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16180 clk cpu0 IS (16144) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16181 clk cpu0 IT (16145) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16181 clk cpu0 R cpsr 420003c5 +16182 clk cpu0 IS (16146) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16183 clk cpu0 IT (16147) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +16183 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +16183 clk cpu0 R X8 0000000000000000 +16184 clk cpu0 IT (16148) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +16184 clk cpu0 MR8 0004ccc0:00001004ccc0_NS 0a782520_3d205254 +16184 clk cpu0 R X0 0A7825203D205254 +16185 clk cpu0 IT (16149) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +16185 clk cpu0 R cpsr 820003c5 +16186 clk cpu0 IT (16150) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +16187 clk cpu0 IT (16151) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +16187 clk cpu0 R X27 0000000000000000 +16188 clk cpu0 IT (16152) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +16188 clk cpu0 R X28 000000000004CCC0 +16189 clk cpu0 IT (16153) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +16189 clk cpu0 R X8 00000000FFFFFFF8 +16190 clk cpu0 IT (16154) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16190 clk cpu0 R cpsr 020003c5 +16190 clk cpu0 R X9 0000000000000054 +16191 clk cpu0 IS (16155) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16192 clk cpu0 IT (16156) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16192 clk cpu0 R cpsr 220003c5 +16193 clk cpu0 IS (16157) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16194 clk cpu0 IT (16158) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16194 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16194 clk cpu0 R X9 0000000013000000 +16195 clk cpu0 IT (16159) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16195 clk cpu0 R cpsr 820003c5 +16195 clk cpu0 R X8 00000000FFFFFFF9 +16196 clk cpu0 IT (16160) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16196 clk cpu0 MW1 13000000:000013000000_NS 54 +16197 clk cpu0 IT (16161) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16197 clk cpu0 R X0 000A7825203D2052 +16198 clk cpu0 IT (16162) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16199 clk cpu0 IT (16163) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16199 clk cpu0 R cpsr 020003c5 +16199 clk cpu0 R X9 0000000000000052 +16200 clk cpu0 IS (16164) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16201 clk cpu0 IT (16165) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16201 clk cpu0 R cpsr 220003c5 +16202 clk cpu0 IS (16166) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16203 clk cpu0 IT (16167) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16203 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16203 clk cpu0 R X9 0000000013000000 +16204 clk cpu0 IT (16168) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16204 clk cpu0 R cpsr 820003c5 +16204 clk cpu0 R X8 00000000FFFFFFFA +16205 clk cpu0 IT (16169) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16205 clk cpu0 MW1 13000000:000013000000_NS 52 +16206 clk cpu0 IT (16170) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16206 clk cpu0 R X0 00000A7825203D20 +16207 clk cpu0 IT (16171) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16208 clk cpu0 IT (16172) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16208 clk cpu0 R cpsr 020003c5 +16208 clk cpu0 R X9 0000000000000020 +16209 clk cpu0 IS (16173) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16210 clk cpu0 IT (16174) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16210 clk cpu0 R cpsr 820003c5 +16211 clk cpu0 IS (16175) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16212 clk cpu0 IT (16176) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16212 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16212 clk cpu0 R X9 0000000013000000 +16213 clk cpu0 IT (16177) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16213 clk cpu0 R cpsr 820003c5 +16213 clk cpu0 R X8 00000000FFFFFFFB +16214 clk cpu0 IT (16178) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16214 clk cpu0 MW1 13000000:000013000000_NS 20 +16215 clk cpu0 IT (16179) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16215 clk cpu0 R X0 0000000A7825203D +16216 clk cpu0 IT (16180) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16217 clk cpu0 IT (16181) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16217 clk cpu0 R cpsr 020003c5 +16217 clk cpu0 R X9 000000000000003D +16218 clk cpu0 IS (16182) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16219 clk cpu0 IT (16183) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16219 clk cpu0 R cpsr 220003c5 +16220 clk cpu0 IS (16184) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16221 clk cpu0 IT (16185) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16221 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16221 clk cpu0 R X9 0000000013000000 +16222 clk cpu0 IT (16186) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16222 clk cpu0 R cpsr 820003c5 +16222 clk cpu0 R X8 00000000FFFFFFFC +16223 clk cpu0 IT (16187) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16223 clk cpu0 MW1 13000000:000013000000_NS 3d +16224 clk cpu0 IT (16188) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16224 clk cpu0 R X0 000000000A782520 +16225 clk cpu0 IT (16189) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16226 clk cpu0 IT (16190) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16226 clk cpu0 R cpsr 020003c5 +16226 clk cpu0 R X9 0000000000000020 +16227 clk cpu0 IS (16191) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16228 clk cpu0 IT (16192) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16228 clk cpu0 R cpsr 820003c5 +16229 clk cpu0 IS (16193) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16230 clk cpu0 IT (16194) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16230 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16230 clk cpu0 R X9 0000000013000000 +16231 clk cpu0 IT (16195) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16231 clk cpu0 R cpsr 820003c5 +16231 clk cpu0 R X8 00000000FFFFFFFD +16232 clk cpu0 IT (16196) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16232 clk cpu0 MW1 13000000:000013000000_NS 20 +16233 clk cpu0 IT (16197) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16233 clk cpu0 R X0 00000000000A7825 +16234 clk cpu0 IT (16198) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16235 clk cpu0 IT (16199) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16235 clk cpu0 R cpsr 020003c5 +16235 clk cpu0 R X9 0000000000000025 +16236 clk cpu0 IS (16200) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16237 clk cpu0 IT (16201) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16237 clk cpu0 R cpsr 620003c5 +16238 clk cpu0 IT (16202) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16239 clk cpu0 IT (16203) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +16239 clk cpu0 R X8 00000000FFFFFFFD +16240 clk cpu0 IT (16204) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +16240 clk cpu0 R X9 0000000000000004 +16241 clk cpu0 IT (16205) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +16241 clk cpu0 R X9 000000000004CCC4 +16242 clk cpu0 IT (16206) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +16242 clk cpu0 R cpsr 220003c5 +16243 clk cpu0 IT (16207) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +16243 clk cpu0 R X27 000000000004CCC4 +16244 clk cpu0 IT (16208) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +16244 clk cpu0 R X20 000000000004CCC5 +16245 clk cpu0 IT (16209) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +16246 clk cpu0 IT (16210) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16246 clk cpu0 MR1 0004ccc5:00001004ccc5_NS 25 +16246 clk cpu0 R X8 0000000000000025 +16247 clk cpu0 IT (16211) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16247 clk cpu0 R cpsr 620003c5 +16248 clk cpu0 IT (16212) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16249 clk cpu0 IT (16213) 00092c30:000010092c30_NS b90736bf O EL1h_n : STR wzr,[x21,#0x734] +16249 clk cpu0 MW4 03029734:000000829734_NS 00000000 +16250 clk cpu0 IT (16214) 00092c34:000010092c34_NS aa1403fb O EL1h_n : MOV x27,x20 +16250 clk cpu0 R X27 000000000004CCC5 +16251 clk cpu0 IT (16215) 00092c38:000010092c38_NS 38401f7c O EL1h_n : LDRB w28,[x27,#1]! +16251 clk cpu0 MR1 0004ccc6:00001004ccc6_NS 78 +16251 clk cpu0 R X27 000000000004CCC6 +16251 clk cpu0 R X28 0000000000000078 +16252 clk cpu0 IT (16216) 00092c3c:000010092c3c_NS 7100c39f O EL1h_n : CMP w28,#0x30 +16252 clk cpu0 R cpsr 220003c5 +16253 clk cpu0 IS (16217) 00092c40:000010092c40_NS 54000060 O EL1h_n : B.EQ 0x92c4c +16254 clk cpu0 IT (16218) 00092c44:000010092c44_NS 3500041c O EL1h_n : CBNZ w28,0x92cc4 +16255 clk cpu0 IT (16219) 00092cc4:000010092cc4_NS 51016388 O EL1h_n : SUB w8,w28,#0x58 +16255 clk cpu0 R X8 0000000000000020 +16256 clk cpu0 IT (16220) 00092cc8:000010092cc8_NS 7100811f O EL1h_n : CMP w8,#0x20 +16256 clk cpu0 R cpsr 620003c5 +16257 clk cpu0 IS (16221) 00092ccc:000010092ccc_NS 54000b48 O EL1h_n : B.HI 0x92e34 +16258 clk cpu0 IT (16222) 00092cd0:000010092cd0_NS 10000089 O EL1h_n : ADR x9,0x92ce0 +16258 clk cpu0 R X9 0000000000092CE0 +16259 clk cpu0 IT (16223) 00092cd4:000010092cd4_NS 38686aca O EL1h_n : LDRB w10,[x22,x8] +16259 clk cpu0 MR1 0004c128:00001004c128_NS 00 +16259 clk cpu0 R X10 0000000000000000 +16260 clk cpu0 IT (16224) 00092cd8:000010092cd8_NS 8b0a0929 O EL1h_n : ADD x9,x9,x10,LSL #2 +16260 clk cpu0 R X9 0000000000092CE0 +16261 clk cpu0 IT (16225) 00092cdc:000010092cdc_NS d61f0120 O EL1h_n : BR x9 +16261 clk cpu0 R cpsr 620007c5 +16262 clk cpu0 IT (16226) 00092ce0:000010092ce0_NS b9801a68 O EL1h_n : LDRSW x8,[x19,#0x18] +16262 clk cpu0 MR4 037005d8:000000f005d8_NS ffffffd0 +16262 clk cpu0 R cpsr 620003c5 +16262 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +16263 clk cpu0 IS (16227) 00092ce4:000010092ce4_NS 36f800a8 O EL1h_n : TBZ w8,#31,0x92cf8 +16264 clk cpu0 IT (16228) 00092ce8:000010092ce8_NS 11002109 O EL1h_n : ADD w9,w8,#8 +16264 clk cpu0 R X9 00000000FFFFFFD8 +16265 clk cpu0 IT (16229) 00092cec:000010092cec_NS 7100013f O EL1h_n : CMP w9,#0 +16265 clk cpu0 R cpsr a20003c5 +16266 clk cpu0 IT (16230) 00092cf0:000010092cf0_NS b9001a69 O EL1h_n : STR w9,[x19,#0x18] +16266 clk cpu0 MW4 037005d8:000000f005d8_NS ffffffd8 +16267 clk cpu0 IT (16231) 00092cf4:000010092cf4_NS 54000cad O EL1h_n : B.LE 0x92e88 +16268 clk cpu0 IT (16232) 00092e88:000010092e88_NS f9400669 O EL1h_n : LDR x9,[x19,#8] +16268 clk cpu0 MR8 037005c8:000000f005c8_NS 00000000_037005c0 +16268 clk cpu0 R X9 00000000037005C0 +16269 clk cpu0 IT (16233) 00092e8c:000010092e8c_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +16269 clk cpu0 R X8 0000000003700590 +16270 clk cpu0 IT (16234) 00092e90:000010092e90_NS 17ffff9d O EL1h_n : B 0x92d04 +16271 clk cpu0 IT (16235) 00092d04:000010092d04_NS f9400100 O EL1h_n : LDR x0,[x8,#0] +16271 clk cpu0 MR8 03700590:000000f00590_NS 00000000_23002399 +16271 clk cpu0 R X0 0000000023002399 +16272 clk cpu0 IT (16236) 00092d08:000010092d08_NS 52800201 O EL1h_n : MOV w1,#0x10 +16272 clk cpu0 R X1 0000000000000010 +16273 clk cpu0 IT (16237) 00092d0c:000010092d0c_NS 94000a58 O EL1h_n : BL 0x9566c +16273 clk cpu0 R X30 0000000000092D10 +16273 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 INVAL 0x000010011640_NS +16273 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 ALLOC 0x000010095640_NS +16274 clk cpu0 IT (16238) 0009566c:00001009566c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +16274 clk cpu0 R SP_EL1 00000000037004D0 +16275 clk cpu0 IT (16239) 00095670:000010095670_NS b204c7e8 O EL1h_n : ORR x8,xzr,#0x3030303030303030 +16275 clk cpu0 R X8 3030303030303030 +16276 clk cpu0 IT (16240) 00095674:000010095674_NS a900a3e8 O EL1h_n : STP x8,x8,[sp,#8] +16276 clk cpu0 MW8 037004d8:000000f004d8_NS 30303030_30303030 +16276 clk cpu0 MW8 037004e0:000000f004e0_NS 30303030_30303030 +16277 clk cpu0 IT (16241) 00095678:000010095678_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +16277 clk cpu0 MW4 037004e8:000000f004e8_NS 30303030 +16278 clk cpu0 IS (16242) 0009567c:00001009567c_NS b4000220 O EL1h_n : CBZ x0,0x956c0 +16279 clk cpu0 IT (16243) 00095680:000010095680_NS aa1f03eb O EL1h_n : MOV x11,xzr +16279 clk cpu0 R X11 0000000000000000 +16280 clk cpu0 IT (16244) 00095684:000010095684_NS 2a0103e8 O EL1h_n : MOV w8,w1 +16280 clk cpu0 R X8 0000000000000010 +16281 clk cpu0 IT (16245) 00095688:000010095688_NS 1103dc29 O EL1h_n : ADD w9,w1,#0xf7 +16281 clk cpu0 R X9 0000000000000107 +16282 clk cpu0 IT (16246) 0009568c:00001009568c_NS 910023ea O EL1h_n : ADD x10,sp,#8 +16282 clk cpu0 R X10 00000000037004D8 +16283 clk cpu0 IT (16247) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16283 clk cpu0 R X12 0000000002300239 +16284 clk cpu0 IT (16248) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16284 clk cpu0 R X13 0000000000000009 +16285 clk cpu0 IT (16249) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16285 clk cpu0 R cpsr 620003c5 +16286 clk cpu0 IT (16250) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16286 clk cpu0 R X14 0000000000000000 +16287 clk cpu0 IT (16251) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16287 clk cpu0 R X13 0000000000000009 +16288 clk cpu0 IT (16252) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16288 clk cpu0 R X13 0000000000000039 +16289 clk cpu0 IT (16253) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16289 clk cpu0 R cpsr 220003c5 +16290 clk cpu0 IT (16254) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16290 clk cpu0 MW1 037004d8:000000f004d8_NS 39 +16291 clk cpu0 IT (16255) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16291 clk cpu0 R X11 0000000000000001 +16292 clk cpu0 IT (16256) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16292 clk cpu0 R X0 0000000002300239 +16293 clk cpu0 IT (16257) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16294 clk cpu0 IT (16258) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16294 clk cpu0 R X12 0000000000230023 +16295 clk cpu0 IT (16259) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16295 clk cpu0 R X13 0000000000000009 +16296 clk cpu0 IT (16260) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16296 clk cpu0 R cpsr 620003c5 +16297 clk cpu0 IT (16261) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16297 clk cpu0 R X14 0000000000000000 +16298 clk cpu0 IT (16262) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16298 clk cpu0 R X13 0000000000000009 +16299 clk cpu0 IT (16263) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16299 clk cpu0 R X13 0000000000000039 +16300 clk cpu0 IT (16264) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16300 clk cpu0 R cpsr 220003c5 +16301 clk cpu0 IT (16265) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16301 clk cpu0 MW1 037004d9:000000f004d9_NS 39 +16302 clk cpu0 IT (16266) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16302 clk cpu0 R X11 0000000000000002 +16303 clk cpu0 IT (16267) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16303 clk cpu0 R X0 0000000000230023 +16304 clk cpu0 IT (16268) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16305 clk cpu0 IT (16269) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16305 clk cpu0 R X12 0000000000023002 +16306 clk cpu0 IT (16270) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16306 clk cpu0 R X13 0000000000000003 +16307 clk cpu0 IT (16271) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16307 clk cpu0 R cpsr 820003c5 +16308 clk cpu0 IT (16272) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16308 clk cpu0 R X14 0000000000000000 +16309 clk cpu0 IT (16273) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16309 clk cpu0 R X13 0000000000000003 +16310 clk cpu0 IT (16274) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16310 clk cpu0 R X13 0000000000000033 +16311 clk cpu0 IT (16275) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16311 clk cpu0 R cpsr 220003c5 +16312 clk cpu0 IT (16276) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16312 clk cpu0 MW1 037004da:000000f004da_NS 33 +16313 clk cpu0 IT (16277) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16313 clk cpu0 R X11 0000000000000003 +16314 clk cpu0 IT (16278) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16314 clk cpu0 R X0 0000000000023002 +16315 clk cpu0 IT (16279) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16316 clk cpu0 IT (16280) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16316 clk cpu0 R X12 0000000000002300 +16317 clk cpu0 IT (16281) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16317 clk cpu0 R X13 0000000000000002 +16318 clk cpu0 IT (16282) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16318 clk cpu0 R cpsr 820003c5 +16319 clk cpu0 IT (16283) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16319 clk cpu0 R X14 0000000000000000 +16320 clk cpu0 IT (16284) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16320 clk cpu0 R X13 0000000000000002 +16321 clk cpu0 IT (16285) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16321 clk cpu0 R X13 0000000000000032 +16322 clk cpu0 IT (16286) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16322 clk cpu0 R cpsr 220003c5 +16323 clk cpu0 IT (16287) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16323 clk cpu0 MW1 037004db:000000f004db_NS 32 +16324 clk cpu0 IT (16288) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16324 clk cpu0 R X11 0000000000000004 +16325 clk cpu0 IT (16289) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16325 clk cpu0 R X0 0000000000002300 +16326 clk cpu0 IT (16290) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16327 clk cpu0 IT (16291) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16327 clk cpu0 R X12 0000000000000230 +16328 clk cpu0 IT (16292) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16328 clk cpu0 R X13 0000000000000000 +16329 clk cpu0 IT (16293) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16329 clk cpu0 R cpsr 820003c5 +16330 clk cpu0 IT (16294) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16330 clk cpu0 R X14 0000000000000000 +16331 clk cpu0 IT (16295) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16331 clk cpu0 R X13 0000000000000000 +16332 clk cpu0 IT (16296) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16332 clk cpu0 R X13 0000000000000030 +16333 clk cpu0 IT (16297) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16333 clk cpu0 R cpsr 220003c5 +16334 clk cpu0 IT (16298) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16334 clk cpu0 MW1 037004dc:000000f004dc_NS 30 +16335 clk cpu0 IT (16299) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16335 clk cpu0 R X11 0000000000000005 +16336 clk cpu0 IT (16300) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16336 clk cpu0 R X0 0000000000000230 +16337 clk cpu0 IT (16301) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16338 clk cpu0 IT (16302) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16338 clk cpu0 R X12 0000000000000023 +16339 clk cpu0 IT (16303) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16339 clk cpu0 R X13 0000000000000000 +16340 clk cpu0 IT (16304) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16340 clk cpu0 R cpsr 820003c5 +16341 clk cpu0 IT (16305) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16341 clk cpu0 R X14 0000000000000000 +16342 clk cpu0 IT (16306) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16342 clk cpu0 R X13 0000000000000000 +16343 clk cpu0 IT (16307) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16343 clk cpu0 R X13 0000000000000030 +16344 clk cpu0 IT (16308) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16344 clk cpu0 R cpsr 220003c5 +16345 clk cpu0 IT (16309) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16345 clk cpu0 MW1 037004dd:000000f004dd_NS 30 +16346 clk cpu0 IT (16310) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16346 clk cpu0 R X11 0000000000000006 +16347 clk cpu0 IT (16311) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16347 clk cpu0 R X0 0000000000000023 +16348 clk cpu0 IT (16312) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16349 clk cpu0 IT (16313) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16349 clk cpu0 R X12 0000000000000002 +16350 clk cpu0 IT (16314) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16350 clk cpu0 R X13 0000000000000003 +16351 clk cpu0 IT (16315) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16351 clk cpu0 R cpsr 820003c5 +16352 clk cpu0 IT (16316) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16352 clk cpu0 R X14 0000000000000000 +16353 clk cpu0 IT (16317) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16353 clk cpu0 R X13 0000000000000003 +16354 clk cpu0 IT (16318) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16354 clk cpu0 R X13 0000000000000033 +16355 clk cpu0 IT (16319) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16355 clk cpu0 R cpsr 220003c5 +16356 clk cpu0 IT (16320) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16356 clk cpu0 MW1 037004de:000000f004de_NS 33 +16357 clk cpu0 IT (16321) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16357 clk cpu0 R X11 0000000000000007 +16358 clk cpu0 IT (16322) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16358 clk cpu0 R X0 0000000000000002 +16359 clk cpu0 IT (16323) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16360 clk cpu0 IT (16324) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +16360 clk cpu0 R X12 0000000000000000 +16361 clk cpu0 IT (16325) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +16361 clk cpu0 R X13 0000000000000002 +16362 clk cpu0 IT (16326) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +16362 clk cpu0 R cpsr 820003c5 +16363 clk cpu0 IT (16327) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +16363 clk cpu0 R X14 0000000000000000 +16364 clk cpu0 IT (16328) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +16364 clk cpu0 R X13 0000000000000002 +16365 clk cpu0 IT (16329) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +16365 clk cpu0 R X13 0000000000000032 +16366 clk cpu0 IT (16330) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +16366 clk cpu0 R cpsr 820003c5 +16367 clk cpu0 IT (16331) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +16367 clk cpu0 MW1 037004df:000000f004df_NS 32 +16368 clk cpu0 IT (16332) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +16368 clk cpu0 R X11 0000000000000008 +16369 clk cpu0 IT (16333) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +16369 clk cpu0 R X0 0000000000000000 +16370 clk cpu0 IS (16334) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +16371 clk cpu0 IT (16335) 000956bc:0000100956bc_NS 14000002 O EL1h_n : B 0x956c4 +16372 clk cpu0 IT (16336) 000956c4:0000100956c4_NS 90017ca8 O EL1h_n : ADRP x8,0x30296c4 +16372 clk cpu0 R X8 0000000003029000 +16373 clk cpu0 IT (16337) 000956c8:0000100956c8_NS b9473508 O EL1h_n : LDR w8,[x8,#0x734] +16373 clk cpu0 MR4 03029734:000000829734_NS 00000000 +16373 clk cpu0 R X8 0000000000000000 +16374 clk cpu0 IT (16338) 000956cc:0000100956cc_NS 6b0b011f O EL1h_n : CMP w8,w11 +16374 clk cpu0 R cpsr 820003c5 +16375 clk cpu0 IT (16339) 000956d0:0000100956d0_NS 1a8bc108 O EL1h_n : CSEL w8,w8,w11,GT +16375 clk cpu0 R X8 0000000000000008 +16376 clk cpu0 IT (16340) 000956d4:0000100956d4_NS 7100051f O EL1h_n : CMP w8,#1 +16376 clk cpu0 R cpsr 220003c5 +16377 clk cpu0 IS (16341) 000956d8:0000100956d8_NS 540001ab O EL1h_n : B.LT 0x9570c +16378 clk cpu0 IT (16342) 000956dc:0000100956dc_NS 910023e9 O EL1h_n : ADD x9,sp,#8 +16378 clk cpu0 R X9 00000000037004D8 +16379 clk cpu0 IT (16343) 000956e0:0000100956e0_NS 93407d08 O EL1h_n : SXTW x8,w8 +16379 clk cpu0 R X8 0000000000000008 +16380 clk cpu0 IT (16344) 000956e4:0000100956e4_NS d1000529 O EL1h_n : SUB x9,x9,#1 +16380 clk cpu0 R X9 00000000037004D7 +16381 clk cpu0 IT (16345) 000956e8:0000100956e8_NS b0030c0a O EL1h_n : ADRP x10,0x62166e8 +16381 clk cpu0 R X10 0000000006216000 +16382 clk cpu0 IT (16346) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16382 clk cpu0 MR1 037004df:000000f004df_NS 32 +16382 clk cpu0 R X11 0000000000000032 +16383 clk cpu0 IT (16347) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16383 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16383 clk cpu0 R X12 0000000013000000 +16384 clk cpu0 IT (16348) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16384 clk cpu0 R X8 0000000000000007 +16385 clk cpu0 IT (16349) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16385 clk cpu0 R cpsr 220003c5 +16386 clk cpu0 IT (16350) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16386 clk cpu0 MW1 13000000:000013000000_NS 32 +16387 clk cpu0 IT (16351) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16388 clk cpu0 IT (16352) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16388 clk cpu0 MR1 037004de:000000f004de_NS 33 +16388 clk cpu0 R X11 0000000000000033 +16389 clk cpu0 IT (16353) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16389 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16389 clk cpu0 R X12 0000000013000000 +16390 clk cpu0 IT (16354) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16390 clk cpu0 R X8 0000000000000006 +16391 clk cpu0 IT (16355) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16391 clk cpu0 R cpsr 220003c5 +16392 clk cpu0 IT (16356) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16392 clk cpu0 MW1 13000000:000013000000_NS 33 +16393 clk cpu0 IT (16357) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16394 clk cpu0 IT (16358) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16394 clk cpu0 MR1 037004dd:000000f004dd_NS 30 +16394 clk cpu0 R X11 0000000000000030 +16395 clk cpu0 IT (16359) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16395 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16395 clk cpu0 R X12 0000000013000000 +16396 clk cpu0 IT (16360) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16396 clk cpu0 R X8 0000000000000005 +16397 clk cpu0 IT (16361) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16397 clk cpu0 R cpsr 220003c5 +16398 clk cpu0 IT (16362) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16398 clk cpu0 MW1 13000000:000013000000_NS 30 +16399 clk cpu0 IT (16363) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16400 clk cpu0 IT (16364) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16400 clk cpu0 MR1 037004dc:000000f004dc_NS 30 +16400 clk cpu0 R X11 0000000000000030 +16401 clk cpu0 IT (16365) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16401 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16401 clk cpu0 R X12 0000000013000000 +16402 clk cpu0 IT (16366) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16402 clk cpu0 R X8 0000000000000004 +16403 clk cpu0 IT (16367) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16403 clk cpu0 R cpsr 220003c5 +16404 clk cpu0 IT (16368) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16404 clk cpu0 MW1 13000000:000013000000_NS 30 +16405 clk cpu0 IT (16369) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16406 clk cpu0 IT (16370) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16406 clk cpu0 MR1 037004db:000000f004db_NS 32 +16406 clk cpu0 R X11 0000000000000032 +16407 clk cpu0 IT (16371) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16407 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16407 clk cpu0 R X12 0000000013000000 +16408 clk cpu0 IT (16372) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16408 clk cpu0 R X8 0000000000000003 +16409 clk cpu0 IT (16373) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16409 clk cpu0 R cpsr 220003c5 +16410 clk cpu0 IT (16374) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16410 clk cpu0 MW1 13000000:000013000000_NS 32 +16411 clk cpu0 IT (16375) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16412 clk cpu0 IT (16376) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16412 clk cpu0 MR1 037004da:000000f004da_NS 33 +16412 clk cpu0 R X11 0000000000000033 +16413 clk cpu0 IT (16377) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16413 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16413 clk cpu0 R X12 0000000013000000 +16414 clk cpu0 IT (16378) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16414 clk cpu0 R X8 0000000000000002 +16415 clk cpu0 IT (16379) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16415 clk cpu0 R cpsr 220003c5 +16416 clk cpu0 IT (16380) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16416 clk cpu0 MW1 13000000:000013000000_NS 33 +16417 clk cpu0 IT (16381) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16418 clk cpu0 IT (16382) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16418 clk cpu0 MR1 037004d9:000000f004d9_NS 39 +16418 clk cpu0 R X11 0000000000000039 +16419 clk cpu0 IT (16383) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16419 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16419 clk cpu0 R X12 0000000013000000 +16420 clk cpu0 IT (16384) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16420 clk cpu0 R X8 0000000000000001 +16421 clk cpu0 IT (16385) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16421 clk cpu0 R cpsr 220003c5 +16422 clk cpu0 IT (16386) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16422 clk cpu0 MW1 13000000:000013000000_NS 39 +16423 clk cpu0 IT (16387) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16424 clk cpu0 IT (16388) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +16424 clk cpu0 MR1 037004d8:000000f004d8_NS 39 +16424 clk cpu0 R X11 0000000000000039 +16425 clk cpu0 IT (16389) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +16425 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16425 clk cpu0 R X12 0000000013000000 +16426 clk cpu0 IT (16390) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +16426 clk cpu0 R X8 0000000000000000 +16427 clk cpu0 IT (16391) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +16427 clk cpu0 R cpsr 620003c5 +16428 clk cpu0 IT (16392) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +16428 clk cpu0 MW1 13000000:000013000000_NS 39 +16429 clk cpu0 IS (16393) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +16430 clk cpu0 IT (16394) 00095704:000010095704_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +16430 clk cpu0 R SP_EL1 00000000037004F0 +16431 clk cpu0 IT (16395) 00095708:000010095708_NS d65f03c0 O EL1h_n : RET +16432 clk cpu0 IT (16396) 00092d10:000010092d10_NS 91000774 O EL1h_n : ADD x20,x27,#1 +16432 clk cpu0 R X20 000000000004CCC7 +16433 clk cpu0 IT (16397) 00092d14:000010092d14_NS 17ffffa8 O EL1h_n : B 0x92bb4 +16434 clk cpu0 IT (16398) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16434 clk cpu0 MR1 0004ccc7:00001004ccc7_NS 0a +16434 clk cpu0 R X8 000000000000000A +16435 clk cpu0 IT (16399) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16435 clk cpu0 R cpsr 820003c5 +16436 clk cpu0 IS (16400) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16437 clk cpu0 IS (16401) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16438 clk cpu0 IT (16402) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16438 clk cpu0 R cpsr 020003c5 +16439 clk cpu0 IT (16403) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16440 clk cpu0 IT (16404) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16440 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16440 clk cpu0 R X9 0000000013000000 +16441 clk cpu0 IT (16405) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16441 clk cpu0 R X27 000000000004CCC7 +16442 clk cpu0 IT (16406) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16442 clk cpu0 R X20 000000000004CCC8 +TUBE CPU0: TRBPTR = 23002399 +16443 clk cpu0 IT (16407) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16443 clk cpu0 MW1 13000000:000013000000_NS 0a +16444 clk cpu0 IT (16408) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16444 clk cpu0 MR1 0004ccc8:00001004ccc8_NS 00 +16444 clk cpu0 R X8 0000000000000000 +16445 clk cpu0 IT (16409) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16445 clk cpu0 R cpsr 820003c5 +16446 clk cpu0 IS (16410) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16447 clk cpu0 IT (16411) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16448 clk cpu0 IT (16412) 00092f98:000010092f98_NS d5033f9f O EL1h_n : DSB SY +16449 clk cpu0 IT (16413) 00092f9c:000010092f9c_NS a9497bf3 O EL1h_n : LDP x19,x30,[sp,#0x90] +16449 clk cpu0 MR8 03700580:000000f00580_NS 00000000_0004ccbb +16449 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0009c560 +16449 clk cpu0 R X19 000000000004CCBB +16449 clk cpu0 R X30 000000000009C560 +16450 clk cpu0 IT (16414) 00092fa0:000010092fa0_NS a94853f5 O EL1h_n : LDP x21,x20,[sp,#0x80] +16450 clk cpu0 MR8 03700570:000000f00570_NS 00000000_00000000 +16450 clk cpu0 MR8 03700578:000000f00578_NS 00000000_03008528 +16450 clk cpu0 R X20 0000000003008528 +16450 clk cpu0 R X21 0000000000000000 +16451 clk cpu0 IT (16415) 00092fa4:000010092fa4_NS a9475bf7 O EL1h_n : LDP x23,x22,[sp,#0x70] +16451 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00000000 +16451 clk cpu0 MR8 03700568:000000f00568_NS 00000000_90000000 +16451 clk cpu0 R X22 0000000090000000 +16451 clk cpu0 R X23 0000000000000000 +16452 clk cpu0 IT (16416) 00092fa8:000010092fa8_NS a94663f9 O EL1h_n : LDP x25,x24,[sp,#0x60] +16452 clk cpu0 MR8 03700550:000000f00550_NS 00000000_0000003c +16452 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00007c00 +16452 clk cpu0 R X24 0000000000007C00 +16452 clk cpu0 R X25 000000000000003C +16453 clk cpu0 IT (16417) 00092fac:000010092fac_NS a9456bfb O EL1h_n : LDP x27,x26,[sp,#0x50] +16453 clk cpu0 MR8 03700540:000000f00540_NS 00010001_00010001 +16453 clk cpu0 MR8 03700548:000000f00548_NS ffe000ff_ffe000ff +16453 clk cpu0 R X26 FFE000FFFFE000FF +16453 clk cpu0 R X27 0001000100010001 +16454 clk cpu0 IT (16418) 00092fb0:000010092fb0_NS f94023fc O EL1h_n : LDR x28,[sp,#0x40] +16454 clk cpu0 MR8 03700530:000000f00530_NS ff7fff7f_ff7fff7f +16454 clk cpu0 R X28 FF7FFF7FFF7FFF7F +16455 clk cpu0 IT (16419) 00092fb4:000010092fb4_NS 910283ff O EL1h_n : ADD sp,sp,#0xa0 +16455 clk cpu0 R SP_EL1 0000000003700590 +16456 clk cpu0 IT (16420) 00092fb8:000010092fb8_NS d65f03c0 O EL1h_n : RET +16457 clk cpu0 IT (16421) 0009c560:00001009c560_NS 52800020 O EL1h_n : MOV w0,#1 +16457 clk cpu0 R X0 0000000000000001 +16458 clk cpu0 IT (16422) 0009c564:00001009c564_NS 2a1503e1 O EL1h_n : MOV w1,w21 +16458 clk cpu0 R X1 0000000000000000 +16459 clk cpu0 IT (16423) 0009c568:00001009c568_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +16459 clk cpu0 R X2 0000000000000000 +16460 clk cpu0 IT (16424) 0009c56c:00001009c56c_NS d503201f O EL1h_n : NOP +16461 clk cpu0 IT (16425) 0009c570:00001009c570_NS d5033f9f O EL1h_n : DSB SY +16462 clk cpu0 IT (16426) 0009c574:00001009c574_NS aa1403e0 O EL1h_n : MOV x0,x20 +16462 clk cpu0 R X0 0000000003008528 +16463 clk cpu0 IT (16427) 0009c578:00001009c578_NS 97fffd30 O EL1h_n : BL 0x9ba38 +16463 clk cpu0 R X30 000000000009C57C +16464 clk cpu0 IT (16428) 0009ba38:00001009ba38_NS d5033fbf O EL1h_n : DMB SY +16465 clk cpu0 IT (16429) 0009ba3c:00001009ba3c_NS f0030bc8 O EL1h_n : ADRP x8,0x6216a3c +16465 clk cpu0 R X8 0000000006216000 +16466 clk cpu0 IT (16430) 0009ba40:00001009ba40_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +16466 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +16466 clk cpu0 R X8 0000000000000001 +16467 clk cpu0 IT (16431) 0009ba44:00001009ba44_NS 7100091f O EL1h_n : CMP w8,#2 +16467 clk cpu0 R cpsr 820003c5 +16468 clk cpu0 IT (16432) 0009ba48:00001009ba48_NS 54000083 O EL1h_n : B.CC 0x9ba58 +16469 clk cpu0 IT (16433) 0009ba58:00001009ba58_NS d65f03c0 O EL1h_n : RET +16470 clk cpu0 IT (16434) 0009c57c:00001009c57c_NS a9487bf3 O EL1h_n : LDP x19,x30,[sp,#0x80] +16470 clk cpu0 MR8 03700610:000000f00610_NS 00000000_062160a2 +16470 clk cpu0 MR8 03700618:000000f00618_NS 00000000_00011138 +16470 clk cpu0 R X19 00000000062160A2 +16470 clk cpu0 R X30 0000000000011138 +16471 clk cpu0 IT (16435) 0009c580:00001009c580_NS a94753f5 O EL1h_n : LDP x21,x20,[sp,#0x70] +16471 clk cpu0 MR8 03700600:000000f00600_NS 00000000_02f00028 +16471 clk cpu0 MR8 03700608:000000f00608_NS ff83ff83_ff83ff83 +16471 clk cpu0 R X20 FF83FF83FF83FF83 +16471 clk cpu0 R X21 0000000002F00028 +16472 clk cpu0 IT (16436) 0009c584:00001009c584_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +16472 clk cpu0 R SP_EL1 0000000003700620 +16473 clk cpu0 IT (16437) 0009c588:00001009c588_NS d65f03c0 O EL1h_n : RET +16474 clk cpu0 IT (16438) 00011138:000010011138_NS 94000097 O EL1h_n : BL 0x11394 +16474 clk cpu0 R X30 000000000001113C +16475 clk cpu0 IT (16439) 00011394:000010011394_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +16475 clk cpu0 R SP_EL1 0000000003700590 +16476 clk cpu0 IT (16440) 00011398:000010011398_NS f90043fe O EL1h_n : STR x30,[sp,#0x80] +16476 clk cpu0 MW8 03700610:000000f00610_NS 00000000_0001113c +16477 clk cpu0 IT (16441) 0001139c:00001001139c_NS d2800068 O EL1h_n : MOV x8,#3 +16477 clk cpu0 R X8 0000000000000003 +16478 clk cpu0 IT (16442) 000113a0:0000100113a0_NS 52811009 O EL1h_n : MOV w9,#0x880 +16478 clk cpu0 R X9 0000000000000880 +16479 clk cpu0 IT (16443) 000113a4:0000100113a4_NS d28001ea O EL1h_n : MOV x10,#0xf +16479 clk cpu0 R X10 000000000000000F +16480 clk cpu0 IT (16444) 000113a8:0000100113a8_NS 52802700 O EL1h_n : MOV w0,#0x138 +16480 clk cpu0 R X0 0000000000000138 +16481 clk cpu0 IT (16445) 000113ac:0000100113ac_NS d280002b O EL1h_n : MOV x11,#1 +16481 clk cpu0 R X11 0000000000000001 +16482 clk cpu0 IT (16446) 000113b0:0000100113b0_NS 5280000c O EL1h_n : MOV w12,#0 +16482 clk cpu0 R X12 0000000000000000 +16483 clk cpu0 IT (16447) 000113b4:0000100113b4_NS 529e000d O EL1h_n : MOV w13,#0xf000 +16483 clk cpu0 R X13 000000000000F000 +16484 clk cpu0 IT (16448) 000113b8:0000100113b8_NS 5280018e O EL1h_n : MOV w14,#0xc +16484 clk cpu0 R X14 000000000000000C +16485 clk cpu0 IT (16449) 000113bc:0000100113bc_NS 5280002f O EL1h_n : MOV w15,#1 +16485 clk cpu0 R X15 0000000000000001 +16486 clk cpu0 IT (16450) 000113c0:0000100113c0_NS f00001c1 O EL1h_n : ADRP x1,0x4c3c0 +16486 clk cpu0 R X1 000000000004C000 +16487 clk cpu0 IT (16451) 000113c4:0000100113c4_NS 91332421 O EL1h_n : ADD x1,x1,#0xcc9 +16487 clk cpu0 R X1 000000000004CCC9 +16488 clk cpu0 IT (16452) 000113c8:0000100113c8_NS 5281e010 O EL1h_n : MOV w16,#0xf00 +16488 clk cpu0 R X16 0000000000000F00 +16489 clk cpu0 IT (16453) 000113cc:0000100113cc_NS 52800111 O EL1h_n : MOV w17,#8 +16489 clk cpu0 R X17 0000000000000008 +16490 clk cpu0 IT (16454) 000113d0:0000100113d0_NS f9002be8 O EL1h_n : STR x8,[sp,#0x50] +16490 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000003 +16491 clk cpu0 IT (16455) 000113d4:0000100113d4_NS f90027e8 O EL1h_n : STR x8,[sp,#0x48] +16491 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00000003 +16492 clk cpu0 IT (16456) 000113d8:0000100113d8_NS b90043e0 O EL1h_n : STR w0,[sp,#0x40] +16492 clk cpu0 MW4 037005d0:000000f005d0_NS 00000138 +16493 clk cpu0 IT (16457) 000113dc:0000100113dc_NS 2a0903e0 O EL1h_n : MOV w0,w9 +16493 clk cpu0 R X0 0000000000000880 +16494 clk cpu0 IT (16458) 000113e0:0000100113e0_NS b9003fe9 O EL1h_n : STR w9,[sp,#0x3c] +16494 clk cpu0 MW4 037005cc:000000f005cc_NS 00000880 +16495 clk cpu0 IT (16459) 000113e4:0000100113e4_NS f9001bea O EL1h_n : STR x10,[sp,#0x30] +16495 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_0000000f +16496 clk cpu0 IT (16460) 000113e8:0000100113e8_NS f90017eb O EL1h_n : STR x11,[sp,#0x28] +16496 clk cpu0 MW8 037005b8:000000f005b8_NS 00000000_00000001 +16497 clk cpu0 IT (16461) 000113ec:0000100113ec_NS b90027ec O EL1h_n : STR w12,[sp,#0x24] +16497 clk cpu0 MW4 037005b4:000000f005b4_NS 00000000 +16498 clk cpu0 IT (16462) 000113f0:0000100113f0_NS b90023ed O EL1h_n : STR w13,[sp,#0x20] +16498 clk cpu0 MW4 037005b0:000000f005b0_NS 0000f000 +16499 clk cpu0 IT (16463) 000113f4:0000100113f4_NS b9001fee O EL1h_n : STR w14,[sp,#0x1c] +16499 clk cpu0 MW4 037005ac:000000f005ac_NS 0000000c +16500 clk cpu0 IT (16464) 000113f8:0000100113f8_NS b9001bef O EL1h_n : STR w15,[sp,#0x18] +16500 clk cpu0 MW4 037005a8:000000f005a8_NS 00000001 +16501 clk cpu0 IT (16465) 000113fc:0000100113fc_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +16501 clk cpu0 MW8 037005a0:000000f005a0_NS 00000000_0004ccc9 +16502 clk cpu0 IT (16466) 00011400:000010011400_NS b9000ff0 O EL1h_n : STR w16,[sp,#0xc] +16502 clk cpu0 MW4 0370059c:000000f0059c_NS 00000f00 +16503 clk cpu0 IT (16467) 00011404:000010011404_NS b9000bf1 O EL1h_n : STR w17,[sp,#8] +16503 clk cpu0 MW4 03700598:000000f00598_NS 00000008 +16504 clk cpu0 IT (16468) 00011408:000010011408_NS 94021c84 O EL1h_n : BL 0x98618 +16504 clk cpu0 R X30 000000000001140C +16505 clk cpu0 IT (16469) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +16505 clk cpu0 MW8 03700570:000000f00570_NS ff83ff83_ff83ff83 +16505 clk cpu0 R SP_EL1 0000000003700570 +16506 clk cpu0 IT (16470) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +16506 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +16506 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0001140c +16507 clk cpu0 IT (16471) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +16507 clk cpu0 R X19 0000000000000880 +16508 clk cpu0 IT (16472) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +16508 clk cpu0 R X30 0000000000098628 +16509 clk cpu0 IT (16473) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +16509 clk cpu0 R X0 0000000000000000 +16510 clk cpu0 IT (16474) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +16510 clk cpu0 R cpsr 820007c5 +16511 clk cpu0 IT (16475) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +16511 clk cpu0 R cpsr 820003c5 +16512 clk cpu0 IT (16476) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +16512 clk cpu0 R X20 0000000000000000 +16513 clk cpu0 IS (16477) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +16514 clk cpu0 IT (16478) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +16514 clk cpu0 R X8 0000000000000000 +16515 clk cpu0 IT (16479) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +16516 clk cpu0 IT (16480) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +16516 clk cpu0 R X8 0000000003000000 +16517 clk cpu0 IT (16481) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +16517 clk cpu0 R X8 0000000003000268 +16518 clk cpu0 IT (16482) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +16518 clk cpu0 R X9 0000000000000C50 +16519 clk cpu0 IT (16483) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +16519 clk cpu0 R X8 0000000003000268 +16520 clk cpu0 IT (16484) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +16520 clk cpu0 MR8 03000ae8:000000800ae8_NS 12012111_23111112 +16520 clk cpu0 R X19 1201211123111112 +16521 clk cpu0 IT (16485) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +16521 clk cpu0 R X8 000000000000BAAD +16522 clk cpu0 IT (16486) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +16522 clk cpu0 R X8 00000000900DBAAD +16523 clk cpu0 IT (16487) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +16523 clk cpu0 R cpsr 220003c5 +16524 clk cpu0 IT (16488) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +16525 clk cpu0 IT (16489) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +16525 clk cpu0 R X0 1201211123111112 +16526 clk cpu0 IT (16490) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +16526 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +16526 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0001140c +16526 clk cpu0 R X19 00000000062160A2 +16526 clk cpu0 R X30 000000000001140C +16527 clk cpu0 IT (16491) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +16527 clk cpu0 MR8 03700570:000000f00570_NS ff83ff83_ff83ff83 +16527 clk cpu0 R SP_EL1 0000000003700590 +16527 clk cpu0 R X20 FF83FF83FF83FF83 +16528 clk cpu0 IT (16492) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +16529 clk cpu0 IT (16493) 0001140c:00001001140c_NS d34cfc08 O EL1h_n : LSR x8,x0,#12 +16529 clk cpu0 R X8 0001201211123111 +16530 clk cpu0 IT (16494) 00011410:000010011410_NS f9401bea O EL1h_n : LDR x10,[sp,#0x30] +16530 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_0000000f +16530 clk cpu0 R X10 000000000000000F +16531 clk cpu0 IT (16495) 00011414:000010011414_NS 8a0a0108 O EL1h_n : AND x8,x8,x10 +16531 clk cpu0 R X8 0000000000000001 +16532 clk cpu0 IT (16496) 00011418:000010011418_NS b9007fe8 O EL1h_n : STR w8,[sp,#0x7c] +16532 clk cpu0 MW4 0370060c:000000f0060c_NS 00000001 +16533 clk cpu0 IT (16497) 0001141c:00001001141c_NS b9403fe0 O EL1h_n : LDR w0,[sp,#0x3c] +16533 clk cpu0 MR4 037005cc:000000f005cc_NS 00000880 +16533 clk cpu0 R X0 0000000000000880 +16534 clk cpu0 IT (16498) 00011420:000010011420_NS 94021c7e O EL1h_n : BL 0x98618 +16534 clk cpu0 R X30 0000000000011424 +16535 clk cpu0 IT (16499) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +16535 clk cpu0 MW8 03700570:000000f00570_NS ff83ff83_ff83ff83 +16535 clk cpu0 R SP_EL1 0000000003700570 +16536 clk cpu0 IT (16500) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +16536 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +16536 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011424 +16537 clk cpu0 IT (16501) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +16537 clk cpu0 R X19 0000000000000880 +16538 clk cpu0 IT (16502) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +16538 clk cpu0 R X30 0000000000098628 +16539 clk cpu0 IT (16503) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +16539 clk cpu0 R X0 0000000000000000 +16540 clk cpu0 IT (16504) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +16540 clk cpu0 R cpsr 220007c5 +16541 clk cpu0 IT (16505) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +16541 clk cpu0 R cpsr 820003c5 +16542 clk cpu0 IT (16506) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +16542 clk cpu0 R X20 0000000000000000 +16543 clk cpu0 IS (16507) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +16544 clk cpu0 IT (16508) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +16544 clk cpu0 R X8 0000000000000000 +16545 clk cpu0 IT (16509) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +16546 clk cpu0 IT (16510) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +16546 clk cpu0 R X8 0000000003000000 +16547 clk cpu0 IT (16511) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +16547 clk cpu0 R X8 0000000003000268 +16548 clk cpu0 IT (16512) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +16548 clk cpu0 R X9 0000000000000C50 +16549 clk cpu0 IT (16513) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +16549 clk cpu0 R X8 0000000003000268 +16550 clk cpu0 IT (16514) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +16550 clk cpu0 MR8 03000ae8:000000800ae8_NS 12012111_23111112 +16550 clk cpu0 R X19 1201211123111112 +16551 clk cpu0 IT (16515) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +16551 clk cpu0 R X8 000000000000BAAD +16552 clk cpu0 IT (16516) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +16552 clk cpu0 R X8 00000000900DBAAD +16553 clk cpu0 IT (16517) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +16553 clk cpu0 R cpsr 220003c5 +16554 clk cpu0 IT (16518) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +16555 clk cpu0 IT (16519) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +16555 clk cpu0 R X0 1201211123111112 +16556 clk cpu0 IT (16520) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +16556 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +16556 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011424 +16556 clk cpu0 R X19 00000000062160A2 +16556 clk cpu0 R X30 0000000000011424 +16557 clk cpu0 IT (16521) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +16557 clk cpu0 MR8 03700570:000000f00570_NS ff83ff83_ff83ff83 +16557 clk cpu0 R SP_EL1 0000000003700590 +16557 clk cpu0 R X20 FF83FF83FF83FF83 +16558 clk cpu0 IT (16522) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +16559 clk cpu0 IT (16523) 00011424:000010011424_NS d348fc0a O EL1h_n : LSR x10,x0,#8 +16559 clk cpu0 R X10 0012012111231111 +16560 clk cpu0 IT (16524) 00011428:000010011428_NS f9401beb O EL1h_n : LDR x11,[sp,#0x30] +16560 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_0000000f +16560 clk cpu0 R X11 000000000000000F +16561 clk cpu0 IT (16525) 0001142c:00001001142c_NS 8a0b014a O EL1h_n : AND x10,x10,x11 +16561 clk cpu0 R X10 0000000000000001 +16562 clk cpu0 IT (16526) 00011430:000010011430_NS b9007bea O EL1h_n : STR w10,[sp,#0x78] +16562 clk cpu0 MW4 03700608:000000f00608_NS 00000001 +16563 clk cpu0 IT (16527) 00011434:000010011434_NS b94043e0 O EL1h_n : LDR w0,[sp,#0x40] +16563 clk cpu0 MR4 037005d0:000000f005d0_NS 00000138 +16563 clk cpu0 R X0 0000000000000138 +16564 clk cpu0 IT (16528) 00011438:000010011438_NS 94021c78 O EL1h_n : BL 0x98618 +16564 clk cpu0 R X30 000000000001143C +16565 clk cpu0 IT (16529) 00098618:000010098618_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +16565 clk cpu0 MW8 03700570:000000f00570_NS ff83ff83_ff83ff83 +16565 clk cpu0 R SP_EL1 0000000003700570 +16566 clk cpu0 IT (16530) 0009861c:00001009861c_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +16566 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +16566 clk cpu0 MW8 03700588:000000f00588_NS 00000000_0001143c +16567 clk cpu0 IT (16531) 00098620:000010098620_NS 2a0003f3 O EL1h_n : MOV w19,w0 +16567 clk cpu0 R X19 0000000000000138 +16568 clk cpu0 IT (16532) 00098624:000010098624_NS 94003b0f O EL1h_n : BL 0xa7260 +16568 clk cpu0 R X30 0000000000098628 +16569 clk cpu0 IT (16533) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +16569 clk cpu0 R X0 0000000000000000 +16570 clk cpu0 IT (16534) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +16570 clk cpu0 R cpsr 220007c5 +16571 clk cpu0 IT (16535) 00098628:000010098628_NS 7131227f O EL1h_n : CMP w19,#0xc48 +16571 clk cpu0 R cpsr 820003c5 +16572 clk cpu0 IT (16536) 0009862c:00001009862c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +16572 clk cpu0 R X20 0000000000000000 +16573 clk cpu0 IS (16537) 00098630:000010098630_NS 54000068 O EL1h_n : B.HI 0x9863c +16574 clk cpu0 IT (16538) 00098634:000010098634_NS 12000a68 O EL1h_n : AND w8,w19,#7 +16574 clk cpu0 R X8 0000000000000000 +16575 clk cpu0 IT (16539) 00098638:000010098638_NS 340000e8 O EL1h_n : CBZ w8,0x98654 +16576 clk cpu0 IT (16540) 00098654:000010098654_NS 90017b48 O EL1h_n : ADRP x8,0x3000654 +16576 clk cpu0 R X8 0000000003000000 +16577 clk cpu0 IT (16541) 00098658:000010098658_NS 9109a108 O EL1h_n : ADD x8,x8,#0x268 +16577 clk cpu0 R X8 0000000003000268 +16578 clk cpu0 IT (16542) 0009865c:00001009865c_NS 52818a09 O EL1h_n : MOV w9,#0xc50 +16578 clk cpu0 R X9 0000000000000C50 +16579 clk cpu0 IT (16543) 00098660:000010098660_NS 9ba92288 O EL1h_n : UMADDL x8,w20,w9,x8 +16579 clk cpu0 R X8 0000000003000268 +16580 clk cpu0 IT (16544) 00098664:000010098664_NS f8734913 O EL1h_n : LDR x19,[x8,w19,UXTW #0] +16580 clk cpu0 MR8 030003a0:0000008003a0_NS 00000000_00000038 +16580 clk cpu0 R X19 0000000000000038 +16581 clk cpu0 IT (16545) 00098668:000010098668_NS 529755a8 O EL1h_n : MOV w8,#0xbaad +16581 clk cpu0 R X8 000000000000BAAD +16582 clk cpu0 IT (16546) 0009866c:00001009866c_NS 72b201a8 O EL1h_n : MOVK w8,#0x900d,LSL #16 +16582 clk cpu0 R X8 00000000900DBAAD +16583 clk cpu0 IT (16547) 00098670:000010098670_NS eb08027f O EL1h_n : CMP x19,x8 +16583 clk cpu0 R cpsr 820003c5 +16584 clk cpu0 IT (16548) 00098674:000010098674_NS 540000c1 O EL1h_n : B.NE 0x9868c +16585 clk cpu0 IT (16549) 0009868c:00001009868c_NS aa1303e0 O EL1h_n : MOV x0,x19 +16585 clk cpu0 R X0 0000000000000038 +16586 clk cpu0 IT (16550) 00098690:000010098690_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +16586 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +16586 clk cpu0 MR8 03700588:000000f00588_NS 00000000_0001143c +16586 clk cpu0 R X19 00000000062160A2 +16586 clk cpu0 R X30 000000000001143C +16587 clk cpu0 IT (16551) 00098694:000010098694_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +16587 clk cpu0 MR8 03700570:000000f00570_NS ff83ff83_ff83ff83 +16587 clk cpu0 R SP_EL1 0000000003700590 +16587 clk cpu0 R X20 FF83FF83FF83FF83 +16588 clk cpu0 IT (16552) 00098698:000010098698_NS d65f03c0 O EL1h_n : RET +16589 clk cpu0 IT (16553) 0001143c:00001001143c_NS d352fc0b O EL1h_n : LSR x11,x0,#18 +16589 clk cpu0 R X11 0000000000000000 +16590 clk cpu0 IT (16554) 00011440:000010011440_NS f94017f2 O EL1h_n : LDR x18,[sp,#0x28] +16590 clk cpu0 MR8 037005b8:000000f005b8_NS 00000000_00000001 +16590 clk cpu0 R X18 0000000000000001 +16591 clk cpu0 IT (16555) 00011444:000010011444_NS 8a12016b O EL1h_n : AND x11,x11,x18 +16591 clk cpu0 R X11 0000000000000000 +16592 clk cpu0 IT (16556) 00011448:000010011448_NS b90077eb O EL1h_n : STR w11,[sp,#0x74] +16592 clk cpu0 MW4 03700604:000000f00604_NS 00000000 +16593 clk cpu0 IT (16557) 0001144c:00001001144c_NS b94027e0 O EL1h_n : LDR w0,[sp,#0x24] +16593 clk cpu0 MR4 037005b4:000000f005b4_NS 00000000 +16593 clk cpu0 R X0 0000000000000000 +16594 clk cpu0 IT (16558) 00011450:000010011450_NS b94023e1 O EL1h_n : LDR w1,[sp,#0x20] +16594 clk cpu0 MR4 037005b0:000000f005b0_NS 0000f000 +16594 clk cpu0 R X1 000000000000F000 +16595 clk cpu0 IT (16559) 00011454:000010011454_NS 94021cc6 O EL1h_n : BL 0x9876c +16595 clk cpu0 R X30 0000000000011458 +16596 clk cpu0 IT (16560) 0009876c:00001009876c_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +16596 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +16596 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011458 +16596 clk cpu0 R SP_EL1 0000000003700580 +16597 clk cpu0 IT (16561) 00098770:000010098770_NS 71403c3f O EL1h_n : CMP w1,#0xf,LSL #12 +16597 clk cpu0 R cpsr 620003c5 +16598 clk cpu0 IT (16562) 00098774:000010098774_NS 54000100 O EL1h_n : B.EQ 0x98794 +16599 clk cpu0 IT (16563) 00098794:000010098794_NS d0030be8 O EL1h_n : ADRP x8,0x6216794 +16599 clk cpu0 R X8 0000000006216000 +16600 clk cpu0 IT (16564) 00098798:000010098798_NS b9410913 O EL1h_n : LDR w19,[x8,#0x108] +16600 clk cpu0 MR4 06216108:000015216108_NS 00030001 +16600 clk cpu0 R X19 0000000000030001 +16601 clk cpu0 IT (16565) 0009879c:00001009879c_NS 14000005 O EL1h_n : B 0x987b0 +16602 clk cpu0 IT (16566) 000987b0:0000100987b0_NS 2a1303e0 O EL1h_n : MOV w0,w19 +16602 clk cpu0 R X0 0000000000030001 +16603 clk cpu0 IT (16567) 000987b4:0000100987b4_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +16603 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +16603 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011458 +16603 clk cpu0 R SP_EL1 0000000003700590 +16603 clk cpu0 R X19 00000000062160A2 +16603 clk cpu0 R X30 0000000000011458 +16604 clk cpu0 IT (16568) 000987b8:0000100987b8_NS d65f03c0 O EL1h_n : RET +16605 clk cpu0 IT (16569) 00011458:000010011458_NS b90047e0 O EL1h_n : STR w0,[sp,#0x44] +16605 clk cpu0 MW4 037005d4:000000f005d4_NS 00030001 +16606 clk cpu0 IT (16570) 0001145c:00001001145c_NS b94047e8 O EL1h_n : LDR w8,[sp,#0x44] +16606 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +16606 clk cpu0 R X8 0000000000030001 +16607 clk cpu0 IT (16571) 00011460:000010011460_NS b94023e9 O EL1h_n : LDR w9,[sp,#0x20] +16607 clk cpu0 MR4 037005b0:000000f005b0_NS 0000f000 +16607 clk cpu0 R X9 000000000000F000 +16608 clk cpu0 IT (16572) 00011464:000010011464_NS 0a090108 O EL1h_n : AND w8,w8,w9 +16608 clk cpu0 R X8 0000000000000000 +16609 clk cpu0 IT (16573) 00011468:000010011468_NS b9401fea O EL1h_n : LDR w10,[sp,#0x1c] +16609 clk cpu0 MR4 037005ac:000000f005ac_NS 0000000c +16609 clk cpu0 R X10 000000000000000C +16610 clk cpu0 IT (16574) 0001146c:00001001146c_NS 1aca2508 O EL1h_n : LSR w8,w8,w10 +16610 clk cpu0 R X8 0000000000000000 +16611 clk cpu0 IT (16575) 00011470:000010011470_NS 2a0803f2 O EL1h_n : MOV w18,w8 +16611 clk cpu0 R X18 0000000000000000 +16612 clk cpu0 IT (16576) 00011474:000010011474_NS d3407e52 O EL1h_n : UBFX x18,x18,#0,#32 +16612 clk cpu0 R X18 0000000000000000 +16613 clk cpu0 IT (16577) 00011478:000010011478_NS f90037f2 O EL1h_n : STR x18,[sp,#0x68] +16613 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000000 +16614 clk cpu0 IT (16578) 0001147c:00001001147c_NS b94047e2 O EL1h_n : LDR w2,[sp,#0x44] +16614 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +16614 clk cpu0 R X2 0000000000030001 +16615 clk cpu0 IT (16579) 00011480:000010011480_NS f94037e3 O EL1h_n : LDR x3,[sp,#0x68] +16615 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +16615 clk cpu0 R X3 0000000000000000 +16616 clk cpu0 IT (16580) 00011484:000010011484_NS b9401be0 O EL1h_n : LDR w0,[sp,#0x18] +16616 clk cpu0 MR4 037005a8:000000f005a8_NS 00000001 +16616 clk cpu0 R X0 0000000000000001 +16617 clk cpu0 IT (16581) 00011488:000010011488_NS f9400be1 O EL1h_n : LDR x1,[sp,#0x10] +16617 clk cpu0 MR8 037005a0:000000f005a0_NS 00000000_0004ccc9 +16617 clk cpu0 R X1 000000000004CCC9 +16618 clk cpu0 IT (16582) 0001148c:00001001148c_NS 94022c10 O EL1h_n : BL 0x9c4cc +16618 clk cpu0 R X30 0000000000011490 +16619 clk cpu0 IT (16583) 0009c4cc:00001009c4cc_NS d10243ff O EL1h_n : SUB sp,sp,#0x90 +16619 clk cpu0 R SP_EL1 0000000003700500 +16620 clk cpu0 IT (16584) 0009c4d0:00001009c4d0_NS d0030bc8 O EL1h_n : ADRP x8,0x62164d0 +16620 clk cpu0 R X8 0000000006216000 +16621 clk cpu0 IT (16585) 0009c4d4:00001009c4d4_NS b940f908 O EL1h_n : LDR w8,[x8,#0xf8] +16621 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +16621 clk cpu0 R X8 0000000000000003 +16622 clk cpu0 IT (16586) 0009c4d8:00001009c4d8_NS a90753f5 O EL1h_n : STP x21,x20,[sp,#0x70] +16622 clk cpu0 MW8 03700570:000000f00570_NS 00000000_02f00028 +16622 clk cpu0 MW8 03700578:000000f00578_NS ff83ff83_ff83ff83 +16623 clk cpu0 IT (16587) 0009c4dc:00001009c4dc_NS a9087bf3 O EL1h_n : STP x19,x30,[sp,#0x80] +16623 clk cpu0 MW8 03700580:000000f00580_NS 00000000_062160a2 +16623 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00011490 +16624 clk cpu0 IT (16588) 0009c4e0:00001009c4e0_NS a9000fe2 O EL1h_n : STP x2,x3,[sp,#0] +16624 clk cpu0 MW8 03700500:000000f00500_NS 00000000_00030001 +16624 clk cpu0 MW8 03700508:000000f00508_NS 00000000_00000000 +16625 clk cpu0 IT (16589) 0009c4e4:00001009c4e4_NS 6b00011f O EL1h_n : CMP w8,w0 +16625 clk cpu0 R cpsr 220003c5 +16626 clk cpu0 IT (16590) 0009c4e8:00001009c4e8_NS a90117e4 O EL1h_n : STP x4,x5,[sp,#0x10] +16626 clk cpu0 MW8 03700510:000000f00510_NS 00000000_00000000 +16626 clk cpu0 MW8 03700518:000000f00518_NS f800f800_f800f800 +16627 clk cpu0 IT (16591) 0009c4ec:00001009c4ec_NS a9021fe6 O EL1h_n : STP x6,x7,[sp,#0x20] +16627 clk cpu0 MW8 03700520:000000f00520_NS 00000000_90000000 +16627 clk cpu0 MW8 03700528:000000f00528_NS 03ff8000_03ff8000 +16628 clk cpu0 IT (16592) 0009c4f0:00001009c4f0_NS a9067fff O EL1h_n : STP xzr,xzr,[sp,#0x60] +16628 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00000000 +16628 clk cpu0 MW8 03700568:000000f00568_NS 00000000_00000000 +16629 clk cpu0 IT (16593) 0009c4f4:00001009c4f4_NS a9057fff O EL1h_n : STP xzr,xzr,[sp,#0x50] +16629 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +16629 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000000 +16630 clk cpu0 IS (16594) 0009c4f8:00001009c4f8_NS 54000423 O EL1h_n : B.CC 0x9c57c +16631 clk cpu0 IT (16595) 0009c4fc:00001009c4fc_NS 90017b74 O EL1h_n : ADRP x20,0x30084fc +16631 clk cpu0 R X20 0000000003008000 +16632 clk cpu0 IT (16596) 0009c500:00001009c500_NS 9114a294 O EL1h_n : ADD x20,x20,#0x528 +16632 clk cpu0 R X20 0000000003008528 +16633 clk cpu0 IT (16597) 0009c504:00001009c504_NS aa1403e0 O EL1h_n : MOV x0,x20 +16633 clk cpu0 R X0 0000000003008528 +16634 clk cpu0 IT (16598) 0009c508:00001009c508_NS aa0103f3 O EL1h_n : MOV x19,x1 +16634 clk cpu0 R X19 000000000004CCC9 +16635 clk cpu0 IT (16599) 0009c50c:00001009c50c_NS 97fff114 O EL1h_n : BL 0x9895c +16635 clk cpu0 R X30 000000000009C510 +16636 clk cpu0 IT (16600) 0009895c:00001009895c_NS d0030be8 O EL1h_n : ADRP x8,0x621695c +16636 clk cpu0 R X8 0000000006216000 +16637 clk cpu0 IT (16601) 00098960:000010098960_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +16637 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +16637 clk cpu0 R X8 0000000000000001 +16638 clk cpu0 IT (16602) 00098964:000010098964_NS 7100091f O EL1h_n : CMP w8,#2 +16638 clk cpu0 R cpsr 820003c5 +16639 clk cpu0 IT (16603) 00098968:000010098968_NS 54000043 O EL1h_n : B.CC 0x98970 +16640 clk cpu0 IT (16604) 00098970:000010098970_NS d65f03c0 O EL1h_n : RET +16641 clk cpu0 IT (16605) 0009c510:00001009c510_NS 910003e9 O EL1h_n : MOV x9,sp +16641 clk cpu0 R X9 0000000003700500 +16642 clk cpu0 IT (16606) 0009c514:00001009c514_NS 128005e8 O EL1h_n : MOV w8,#0xffffffd0 +16642 clk cpu0 R X8 00000000FFFFFFD0 +16643 clk cpu0 IT (16607) 0009c518:00001009c518_NS 910243ea O EL1h_n : ADD x10,sp,#0x90 +16643 clk cpu0 R X10 0000000003700590 +16644 clk cpu0 IT (16608) 0009c51c:00001009c51c_NS 9100c129 O EL1h_n : ADD x9,x9,#0x30 +16644 clk cpu0 R X9 0000000003700530 +16645 clk cpu0 IT (16609) 0009c520:00001009c520_NS 2a1f03e0 O EL1h_n : MOV w0,wzr +16645 clk cpu0 R X0 0000000000000000 +16646 clk cpu0 IT (16610) 0009c524:00001009c524_NS 2a1f03e1 O EL1h_n : MOV w1,wzr +16646 clk cpu0 R X1 0000000000000000 +16647 clk cpu0 IT (16611) 0009c528:00001009c528_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +16647 clk cpu0 R X2 0000000000000000 +16648 clk cpu0 IT (16612) 0009c52c:00001009c52c_NS f90037e8 O EL1h_n : STR x8,[sp,#0x68] +16648 clk cpu0 MW8 03700568:000000f00568_NS 00000000_ffffffd0 +16649 clk cpu0 IT (16613) 0009c530:00001009c530_NS a90527ea O EL1h_n : STP x10,x9,[sp,#0x50] +16649 clk cpu0 MW8 03700550:000000f00550_NS 00000000_03700590 +16649 clk cpu0 MW8 03700558:000000f00558_NS 00000000_03700530 +16650 clk cpu0 IT (16614) 0009c534:00001009c534_NS d503201f O EL1h_n : NOP +16651 clk cpu0 IT (16615) 0009c538:00001009c538_NS a945a3ea O EL1h_n : LDP x10,x8,[sp,#0x58] +16651 clk cpu0 MR8 03700558:000000f00558_NS 00000000_03700530 +16651 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00000000 +16651 clk cpu0 R X8 0000000000000000 +16651 clk cpu0 R X10 0000000003700530 +16652 clk cpu0 IT (16616) 0009c53c:00001009c53c_NS f9402be9 O EL1h_n : LDR x9,[sp,#0x50] +16652 clk cpu0 MR8 03700550:000000f00550_NS 00000000_03700590 +16652 clk cpu0 R X9 0000000003700590 +16653 clk cpu0 IT (16617) 0009c540:00001009c540_NS f94037eb O EL1h_n : LDR x11,[sp,#0x68] +16653 clk cpu0 MR8 03700568:000000f00568_NS 00000000_ffffffd0 +16653 clk cpu0 R X11 00000000FFFFFFD0 +16654 clk cpu0 IT (16618) 0009c544:00001009c544_NS 2a0003f5 O EL1h_n : MOV w21,w0 +16654 clk cpu0 R X21 0000000000000000 +16655 clk cpu0 IT (16619) 0009c548:00001009c548_NS 9100c3e1 O EL1h_n : ADD x1,sp,#0x30 +16655 clk cpu0 R X1 0000000003700530 +16656 clk cpu0 IT (16620) 0009c54c:00001009c54c_NS aa1303e0 O EL1h_n : MOV x0,x19 +16656 clk cpu0 R X0 000000000004CCC9 +16657 clk cpu0 IT (16621) 0009c550:00001009c550_NS a903a3ea O EL1h_n : STP x10,x8,[sp,#0x38] +16657 clk cpu0 MW8 03700538:000000f00538_NS 00000000_03700530 +16657 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000000 +16658 clk cpu0 IT (16622) 0009c554:00001009c554_NS f9001be9 O EL1h_n : STR x9,[sp,#0x30] +16658 clk cpu0 MW8 03700530:000000f00530_NS 00000000_03700590 +16659 clk cpu0 IT (16623) 0009c558:00001009c558_NS f90027eb O EL1h_n : STR x11,[sp,#0x48] +16659 clk cpu0 MW8 03700548:000000f00548_NS 00000000_ffffffd0 +16660 clk cpu0 IT (16624) 0009c55c:00001009c55c_NS 97ffd97b O EL1h_n : BL 0x92b48 +16660 clk cpu0 R X30 000000000009C560 +16661 clk cpu0 IT (16625) 00092b48:000010092b48_NS d10283ff O EL1h_n : SUB sp,sp,#0xa0 +16661 clk cpu0 R SP_EL1 0000000003700460 +16662 clk cpu0 IT (16626) 00092b4c:000010092b4c_NS a9097bf3 O EL1h_n : STP x19,x30,[sp,#0x90] +16662 clk cpu0 MW8 037004f0:000000f004f0_NS 00000000_0004ccc9 +16662 clk cpu0 MW8 037004f8:000000f004f8_NS 00000000_0009c560 +16663 clk cpu0 IT (16627) 00092b50:000010092b50_NS aa0103f3 O EL1h_n : MOV x19,x1 +16663 clk cpu0 R X19 0000000003700530 +16664 clk cpu0 IT (16628) 00092b54:000010092b54_NS d0fffdc1 O EL1h_n : ADRP x1,0x4cb54 +16664 clk cpu0 R X1 000000000004C000 +16665 clk cpu0 IT (16629) 00092b58:000010092b58_NS a90853f5 O EL1h_n : STP x21,x20,[sp,#0x80] +16665 clk cpu0 MW8 037004e0:000000f004e0_NS 00000000_00000000 +16665 clk cpu0 MW8 037004e8:000000f004e8_NS 00000000_03008528 +16666 clk cpu0 IT (16630) 00092b5c:000010092b5c_NS aa0003f4 O EL1h_n : MOV x20,x0 +16666 clk cpu0 R X20 000000000004CCC9 +16667 clk cpu0 IT (16631) 00092b60:000010092b60_NS 91002c21 O EL1h_n : ADD x1,x1,#0xb +16667 clk cpu0 R X1 000000000004C00B +16668 clk cpu0 IT (16632) 00092b64:000010092b64_NS 910013e0 O EL1h_n : ADD x0,sp,#4 +16668 clk cpu0 R X0 0000000003700464 +16669 clk cpu0 IT (16633) 00092b68:000010092b68_NS 52800762 O EL1h_n : MOV w2,#0x3b +16669 clk cpu0 R X2 000000000000003B +16670 clk cpu0 IT (16634) 00092b6c:000010092b6c_NS f90023fc O EL1h_n : STR x28,[sp,#0x40] +16670 clk cpu0 MW8 037004a0:000000f004a0_NS ff7fff7f_ff7fff7f +16671 clk cpu0 IT (16635) 00092b70:000010092b70_NS a9056bfb O EL1h_n : STP x27,x26,[sp,#0x50] +16671 clk cpu0 MW8 037004b0:000000f004b0_NS 00010001_00010001 +16671 clk cpu0 MW8 037004b8:000000f004b8_NS ffe000ff_ffe000ff +16672 clk cpu0 IT (16636) 00092b74:000010092b74_NS a90663f9 O EL1h_n : STP x25,x24,[sp,#0x60] +16672 clk cpu0 MW8 037004c0:000000f004c0_NS 00000000_0000003c +16672 clk cpu0 MW8 037004c8:000000f004c8_NS 00000000_00007c00 +16673 clk cpu0 IT (16637) 00092b78:000010092b78_NS a9075bf7 O EL1h_n : STP x23,x22,[sp,#0x70] +16673 clk cpu0 MW8 037004d0:000000f004d0_NS 00000000_00000000 +16673 clk cpu0 MW8 037004d8:000000f004d8_NS 00000000_90000000 +16674 clk cpu0 IT (16638) 00092b7c:000010092b7c_NS 97fdf655 O EL1h_n : BL 0x104d0 +16674 clk cpu0 R X30 0000000000092B80 +16675 clk cpu0 IT (16639) 000104d0:0000100104d0_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +16675 clk cpu0 MW8 03700450:000000f00450_NS 00000000_03700530 +16675 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00092b80 +16675 clk cpu0 R SP_EL1 0000000003700450 +16676 clk cpu0 IT (16640) 000104d4:0000100104d4_NS aa0003f3 O EL1h_n : MOV x19,x0 +16676 clk cpu0 R X19 0000000003700464 +16677 clk cpu0 IT (16641) 000104d8:0000100104d8_NS 9400002b O EL1h_n : BL 0x10584 +16677 clk cpu0 R X30 00000000000104DC +16678 clk cpu0 IT (16642) 00010584:000010010584_NS f100105f O EL1h_n : CMP x2,#4 +16678 clk cpu0 R cpsr 220003c5 +16679 clk cpu0 IS (16643) 00010588:000010010588_NS 54000643 O EL1h_n : B.CC 0x10650 +16680 clk cpu0 IT (16644) 0001058c:00001001058c_NS f240041f O EL1h_n : TST x0,#3 +16680 clk cpu0 R cpsr 420003c5 +16681 clk cpu0 IT (16645) 00010590:000010010590_NS 54000320 O EL1h_n : B.EQ 0x105f4 +16682 clk cpu0 IT (16646) 000105f4:0000100105f4_NS 7200042a O EL1h_n : ANDS w10,w1,#3 +16682 clk cpu0 R cpsr 020003c5 +16682 clk cpu0 R X10 0000000000000003 +16683 clk cpu0 IS (16647) 000105f8:0000100105f8_NS 54000440 O EL1h_n : B.EQ 0x10680 +16684 clk cpu0 IT (16648) 000105fc:0000100105fc_NS 52800409 O EL1h_n : MOV w9,#0x20 +16684 clk cpu0 R X9 0000000000000020 +16685 clk cpu0 IT (16649) 00010600:000010010600_NS cb0a0028 O EL1h_n : SUB x8,x1,x10 +16685 clk cpu0 R X8 000000000004C008 +16686 clk cpu0 IT (16650) 00010604:000010010604_NS f100105f O EL1h_n : CMP x2,#4 +16686 clk cpu0 R cpsr 220003c5 +16687 clk cpu0 IT (16651) 00010608:000010010608_NS 4b0a0d29 O EL1h_n : SUB w9,w9,w10,LSL #3 +16687 clk cpu0 R X9 0000000000000008 +16688 clk cpu0 IS (16652) 0001060c:00001001060c_NS 540001c3 O EL1h_n : B.CC 0x10644 +16689 clk cpu0 IT (16653) 00010610:000010010610_NS b940010c O EL1h_n : LDR w12,[x8,#0] +16689 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +16689 clk cpu0 R X12 000000000A00000A +16690 clk cpu0 IT (16654) 00010614:000010010614_NS 531d714a O EL1h_n : UBFIZ w10,w10,#3,#29 +16690 clk cpu0 R X10 0000000000000018 +16691 clk cpu0 IT (16655) 00010618:000010010618_NS aa0203eb O EL1h_n : MOV x11,x2 +16691 clk cpu0 R X11 000000000000003B +16692 clk cpu0 IT (16656) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16692 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +16692 clk cpu0 R X8 000000000004C00C +16692 clk cpu0 R X13 000000006F727245 +16693 clk cpu0 IT (16657) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16693 clk cpu0 R X12 000000000000000A +16694 clk cpu0 IT (16658) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16694 clk cpu0 R X11 0000000000000037 +16695 clk cpu0 IT (16659) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16695 clk cpu0 R cpsr 220003c5 +16696 clk cpu0 IT (16660) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16696 clk cpu0 R X14 0000000072724500 +16697 clk cpu0 IT (16661) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16697 clk cpu0 R X12 000000007272450A +16698 clk cpu0 IT (16662) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16698 clk cpu0 MW4 03700464:000000f00464_NS 7272450a +16698 clk cpu0 R X0 0000000003700468 +16699 clk cpu0 IT (16663) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16699 clk cpu0 R X12 000000006F727245 +16700 clk cpu0 IT (16664) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16701 clk cpu0 IT (16665) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16701 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +16701 clk cpu0 R X8 000000000004C010 +16701 clk cpu0 R X13 0000000049203A72 +16702 clk cpu0 IT (16666) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16702 clk cpu0 R X12 000000000000006F +16703 clk cpu0 IT (16667) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16703 clk cpu0 R X11 0000000000000033 +16704 clk cpu0 IT (16668) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16704 clk cpu0 R cpsr 220003c5 +16705 clk cpu0 IT (16669) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16705 clk cpu0 R X14 00000000203A7200 +16706 clk cpu0 IT (16670) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16706 clk cpu0 R X12 00000000203A726F +16707 clk cpu0 IT (16671) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16707 clk cpu0 MW4 03700468:000000f00468_NS 203a726f +16707 clk cpu0 R X0 000000000370046C +16708 clk cpu0 IT (16672) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16708 clk cpu0 R X12 0000000049203A72 +16709 clk cpu0 IT (16673) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16710 clk cpu0 IT (16674) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16710 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +16710 clk cpu0 R X8 000000000004C014 +16710 clk cpu0 R X13 0000000067656C6C +16711 clk cpu0 IT (16675) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16711 clk cpu0 R X12 0000000000000049 +16712 clk cpu0 IT (16676) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16712 clk cpu0 R X11 000000000000002F +16713 clk cpu0 IT (16677) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16713 clk cpu0 R cpsr 220003c5 +16714 clk cpu0 IT (16678) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16714 clk cpu0 R X14 00000000656C6C00 +16715 clk cpu0 IT (16679) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16715 clk cpu0 R X12 00000000656C6C49 +16716 clk cpu0 IT (16680) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16716 clk cpu0 MW4 0370046c:000000f0046c_NS 656c6c49 +16716 clk cpu0 R X0 0000000003700470 +16717 clk cpu0 IT (16681) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16717 clk cpu0 R X12 0000000067656C6C +16718 clk cpu0 IT (16682) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16719 clk cpu0 IT (16683) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16719 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +16719 clk cpu0 R X8 000000000004C018 +16719 clk cpu0 R X13 0000000066206C61 +16720 clk cpu0 IT (16684) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16720 clk cpu0 R X12 0000000000000067 +16721 clk cpu0 IT (16685) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16721 clk cpu0 R X11 000000000000002B +16722 clk cpu0 IT (16686) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16722 clk cpu0 R cpsr 220003c5 +16723 clk cpu0 IT (16687) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16723 clk cpu0 R X14 00000000206C6100 +16724 clk cpu0 IT (16688) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16724 clk cpu0 R X12 00000000206C6167 +16725 clk cpu0 IT (16689) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16725 clk cpu0 MW4 03700470:000000f00470_NS 206c6167 +16725 clk cpu0 R X0 0000000003700474 +16726 clk cpu0 IT (16690) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16726 clk cpu0 R X12 0000000066206C61 +16727 clk cpu0 IT (16691) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16728 clk cpu0 IT (16692) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16728 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +16728 clk cpu0 R X8 000000000004C01C +16728 clk cpu0 R X13 00000000616D726F +16729 clk cpu0 IT (16693) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16729 clk cpu0 R X12 0000000000000066 +16730 clk cpu0 IT (16694) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16730 clk cpu0 R X11 0000000000000027 +16731 clk cpu0 IT (16695) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16731 clk cpu0 R cpsr 220003c5 +16732 clk cpu0 IT (16696) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16732 clk cpu0 R X14 000000006D726F00 +16733 clk cpu0 IT (16697) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16733 clk cpu0 R X12 000000006D726F66 +16734 clk cpu0 IT (16698) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16734 clk cpu0 MW4 03700474:000000f00474_NS 6d726f66 +16734 clk cpu0 R X0 0000000003700478 +16735 clk cpu0 IT (16699) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16735 clk cpu0 R X12 00000000616D726F +16736 clk cpu0 IT (16700) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16737 clk cpu0 IT (16701) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16737 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +16737 clk cpu0 R X8 000000000004C020 +16737 clk cpu0 R X13 0000000070732074 +16738 clk cpu0 IT (16702) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16738 clk cpu0 R X12 0000000000000061 +16739 clk cpu0 IT (16703) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16739 clk cpu0 R X11 0000000000000023 +16740 clk cpu0 IT (16704) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16740 clk cpu0 R cpsr 220003c5 +16741 clk cpu0 IT (16705) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16741 clk cpu0 R X14 0000000073207400 +16742 clk cpu0 IT (16706) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16742 clk cpu0 R X12 0000000073207461 +16743 clk cpu0 IT (16707) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16743 clk cpu0 MW4 03700478:000000f00478_NS 73207461 +16743 clk cpu0 R X0 000000000370047C +16744 clk cpu0 IT (16708) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16744 clk cpu0 R X12 0000000070732074 +16745 clk cpu0 IT (16709) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16746 clk cpu0 IT (16710) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16746 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +16746 clk cpu0 R X8 000000000004C024 +16746 clk cpu0 R X13 0000000066696365 +16747 clk cpu0 IT (16711) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16747 clk cpu0 R X12 0000000000000070 +16748 clk cpu0 IT (16712) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16748 clk cpu0 R X11 000000000000001F +16749 clk cpu0 IT (16713) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16749 clk cpu0 R cpsr 220003c5 +16750 clk cpu0 IT (16714) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16750 clk cpu0 R X14 0000000069636500 +16751 clk cpu0 IT (16715) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16751 clk cpu0 R X12 0000000069636570 +16752 clk cpu0 IT (16716) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16752 clk cpu0 MW4 0370047c:000000f0047c_NS 69636570 +16752 clk cpu0 R X0 0000000003700480 +16753 clk cpu0 IT (16717) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16753 clk cpu0 R X12 0000000066696365 +16754 clk cpu0 IT (16718) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16755 clk cpu0 IT (16719) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16755 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +16755 clk cpu0 R X8 000000000004C028 +16755 clk cpu0 R X13 0000000020726569 +16756 clk cpu0 IT (16720) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16756 clk cpu0 R X12 0000000000000066 +16757 clk cpu0 IT (16721) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16757 clk cpu0 R X11 000000000000001B +16758 clk cpu0 IT (16722) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16758 clk cpu0 R cpsr 220003c5 +16759 clk cpu0 IT (16723) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16759 clk cpu0 R X14 0000000072656900 +16760 clk cpu0 IT (16724) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16760 clk cpu0 R X12 0000000072656966 +16761 clk cpu0 IT (16725) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16761 clk cpu0 MW4 03700480:000000f00480_NS 72656966 +16761 clk cpu0 R X0 0000000003700484 +16762 clk cpu0 IT (16726) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16762 clk cpu0 R X12 0000000020726569 +16763 clk cpu0 IT (16727) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16764 clk cpu0 IT (16728) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16764 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +16764 clk cpu0 R X8 000000000004C02C +16764 clk cpu0 R X13 0000000064657375 +16765 clk cpu0 IT (16729) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16765 clk cpu0 R X12 0000000000000020 +16766 clk cpu0 IT (16730) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16766 clk cpu0 R X11 0000000000000017 +16767 clk cpu0 IT (16731) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16767 clk cpu0 R cpsr 220003c5 +16768 clk cpu0 IT (16732) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16768 clk cpu0 R X14 0000000065737500 +16769 clk cpu0 IT (16733) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16769 clk cpu0 R X12 0000000065737520 +16770 clk cpu0 IT (16734) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16770 clk cpu0 MW4 03700484:000000f00484_NS 65737520 +16770 clk cpu0 R X0 0000000003700488 +16771 clk cpu0 IT (16735) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16771 clk cpu0 R X12 0000000064657375 +16772 clk cpu0 IT (16736) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16773 clk cpu0 IT (16737) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16773 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +16773 clk cpu0 R X8 000000000004C030 +16773 clk cpu0 R X13 000000005F27203A +16774 clk cpu0 IT (16738) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16774 clk cpu0 R X12 0000000000000064 +16775 clk cpu0 IT (16739) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16775 clk cpu0 R X11 0000000000000013 +16776 clk cpu0 IT (16740) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16776 clk cpu0 R cpsr 220003c5 +16777 clk cpu0 IT (16741) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16777 clk cpu0 R X14 0000000027203A00 +16778 clk cpu0 IT (16742) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16778 clk cpu0 R X12 0000000027203A64 +16779 clk cpu0 IT (16743) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16779 clk cpu0 MW4 03700488:000000f00488_NS 27203a64 +16779 clk cpu0 R X0 000000000370048C +16780 clk cpu0 IT (16744) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16780 clk cpu0 R X12 000000005F27203A +16781 clk cpu0 IT (16745) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16782 clk cpu0 IT (16746) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16782 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +16782 clk cpu0 R X8 000000000004C034 +16782 clk cpu0 R X13 0000000045202E27 +16783 clk cpu0 IT (16747) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16783 clk cpu0 R X12 000000000000005F +16784 clk cpu0 IT (16748) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16784 clk cpu0 R X11 000000000000000F +16785 clk cpu0 IT (16749) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16785 clk cpu0 R cpsr 220003c5 +16786 clk cpu0 IT (16750) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16786 clk cpu0 R X14 00000000202E2700 +16787 clk cpu0 IT (16751) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16787 clk cpu0 R X12 00000000202E275F +16788 clk cpu0 IT (16752) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16788 clk cpu0 MW4 0370048c:000000f0048c_NS 202e275f +16788 clk cpu0 R X0 0000000003700490 +16789 clk cpu0 IT (16753) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16789 clk cpu0 R X12 0000000045202E27 +16790 clk cpu0 IT (16754) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16791 clk cpu0 IT (16755) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16791 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +16791 clk cpu0 R X8 000000000004C038 +16791 clk cpu0 R X13 000000006E69646E +16792 clk cpu0 IT (16756) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16792 clk cpu0 R X12 0000000000000045 +16793 clk cpu0 IT (16757) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16793 clk cpu0 R X11 000000000000000B +16794 clk cpu0 IT (16758) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16794 clk cpu0 R cpsr 220003c5 +16795 clk cpu0 IT (16759) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16795 clk cpu0 R X14 0000000069646E00 +16796 clk cpu0 IT (16760) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16796 clk cpu0 R X12 0000000069646E45 +16797 clk cpu0 IT (16761) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16797 clk cpu0 MW4 03700490:000000f00490_NS 69646e45 +16797 clk cpu0 R X0 0000000003700494 +16798 clk cpu0 IT (16762) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16798 clk cpu0 R X12 000000006E69646E +16799 clk cpu0 IT (16763) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16800 clk cpu0 IT (16764) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16800 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +16800 clk cpu0 R X8 000000000004C03C +16800 clk cpu0 R X13 0000000065542067 +16801 clk cpu0 IT (16765) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16801 clk cpu0 R X12 000000000000006E +16802 clk cpu0 IT (16766) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16802 clk cpu0 R X11 0000000000000007 +16803 clk cpu0 IT (16767) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16803 clk cpu0 R cpsr 220003c5 +16804 clk cpu0 IT (16768) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16804 clk cpu0 R X14 0000000054206700 +16805 clk cpu0 IT (16769) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16805 clk cpu0 R X12 000000005420676E +16806 clk cpu0 IT (16770) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16806 clk cpu0 MW4 03700494:000000f00494_NS 5420676e +16806 clk cpu0 R X0 0000000003700498 +16807 clk cpu0 IT (16771) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16807 clk cpu0 R X12 0000000065542067 +16808 clk cpu0 IT (16772) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16809 clk cpu0 IT (16773) 0001061c:00001001061c_NS b8404d0d O EL1h_n : LDR w13,[x8,#4]! +16809 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +16809 clk cpu0 R X8 000000000004C040 +16809 clk cpu0 R X13 000000000A2E7473 +16810 clk cpu0 IT (16774) 00010620:000010010620_NS 1aca258c O EL1h_n : LSR w12,w12,w10 +16810 clk cpu0 R X12 0000000000000065 +16811 clk cpu0 IT (16775) 00010624:000010010624_NS d100116b O EL1h_n : SUB x11,x11,#4 +16811 clk cpu0 R X11 0000000000000003 +16812 clk cpu0 IT (16776) 00010628:000010010628_NS f1000d7f O EL1h_n : CMP x11,#3 +16812 clk cpu0 R cpsr 620003c5 +16813 clk cpu0 IT (16777) 0001062c:00001001062c_NS 1ac921ae O EL1h_n : LSL w14,w13,w9 +16813 clk cpu0 R X14 000000002E747300 +16814 clk cpu0 IT (16778) 00010630:000010010630_NS 2a0c01cc O EL1h_n : ORR w12,w14,w12 +16814 clk cpu0 R X12 000000002E747365 +16815 clk cpu0 IT (16779) 00010634:000010010634_NS b800440c O EL1h_n : STR w12,[x0],#4 +16815 clk cpu0 MW4 03700498:000000f00498_NS 2e747365 +16815 clk cpu0 R X0 000000000370049C +16816 clk cpu0 IT (16780) 00010638:000010010638_NS 2a0d03ec O EL1h_n : MOV w12,w13 +16816 clk cpu0 R X12 000000000A2E7473 +16817 clk cpu0 IS (16781) 0001063c:00001001063c_NS 54ffff08 O EL1h_n : B.HI 0x1061c +16818 clk cpu0 IT (16782) 00010640:000010010640_NS 92400442 O EL1h_n : AND x2,x2,#3 +16818 clk cpu0 R X2 0000000000000003 +16819 clk cpu0 IT (16783) 00010644:000010010644_NS 53037d29 O EL1h_n : LSR w9,w9,#3 +16819 clk cpu0 R X9 0000000000000001 +16820 clk cpu0 IT (16784) 00010648:000010010648_NS cb090108 O EL1h_n : SUB x8,x8,x9 +16820 clk cpu0 R X8 000000000004C03F +16821 clk cpu0 IT (16785) 0001064c:00001001064c_NS 91001101 O EL1h_n : ADD x1,x8,#4 +16821 clk cpu0 R X1 000000000004C043 +16822 clk cpu0 IT (16786) 00010650:000010010650_NS 7100045f O EL1h_n : CMP w2,#1 +16822 clk cpu0 R cpsr 220003c5 +16823 clk cpu0 IS (16787) 00010654:000010010654_NS 5400014b O EL1h_n : B.LT 0x1067c +16824 clk cpu0 IT (16788) 00010658:000010010658_NS 39400028 O EL1h_n : LDRB w8,[x1,#0] +16824 clk cpu0 MR1 0004c043:00001004c043_NS 0a +16824 clk cpu0 R X8 000000000000000A +16825 clk cpu0 IT (16789) 0001065c:00001001065c_NS 39000008 O EL1h_n : STRB w8,[x0,#0] +16825 clk cpu0 MW1 0370049c:000000f0049c_NS 0a +16826 clk cpu0 IS (16790) 00010660:000010010660_NS 540000e0 O EL1h_n : B.EQ 0x1067c +16827 clk cpu0 IT (16791) 00010664:000010010664_NS 39400428 O EL1h_n : LDRB w8,[x1,#1] +16827 clk cpu0 MR1 0004c044:00001004c044_NS 00 +16827 clk cpu0 R X8 0000000000000000 +16828 clk cpu0 IT (16792) 00010668:000010010668_NS 71000c5f O EL1h_n : CMP w2,#3 +16828 clk cpu0 R cpsr 620003c5 +16829 clk cpu0 IT (16793) 0001066c:00001001066c_NS 39000408 O EL1h_n : STRB w8,[x0,#1] +16829 clk cpu0 MW1 0370049d:000000f0049d_NS 00 +16830 clk cpu0 IS (16794) 00010670:000010010670_NS 5400006b O EL1h_n : B.LT 0x1067c +16831 clk cpu0 IT (16795) 00010674:000010010674_NS 39400828 O EL1h_n : LDRB w8,[x1,#2] +16831 clk cpu0 MR1 0004c045:00001004c045_NS 00 +16831 clk cpu0 R X8 0000000000000000 +16832 clk cpu0 IT (16796) 00010678:000010010678_NS 39000808 O EL1h_n : STRB w8,[x0,#2] +16832 clk cpu0 MW1 0370049e:000000f0049e_NS 00 +16833 clk cpu0 IT (16797) 0001067c:00001001067c_NS d65f03c0 O EL1h_n : RET +16834 clk cpu0 IT (16798) 000104dc:0000100104dc_NS aa1303e0 O EL1h_n : MOV x0,x19 +16834 clk cpu0 R X0 0000000003700464 +16835 clk cpu0 IT (16799) 000104e0:0000100104e0_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +16835 clk cpu0 MR8 03700450:000000f00450_NS 00000000_03700530 +16835 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00092b80 +16835 clk cpu0 R SP_EL1 0000000003700460 +16835 clk cpu0 R X19 0000000003700530 +16835 clk cpu0 R X30 0000000000092B80 +16836 clk cpu0 IT (16800) 000104e4:0000100104e4_NS d65f03c0 O EL1h_n : RET +16837 clk cpu0 IT (16801) 00092b80:000010092b80_NS d0fffdd6 O EL1h_n : ADRP x22,0x4cb80 +16837 clk cpu0 R X22 000000000004C000 +16838 clk cpu0 IT (16802) 00092b84:000010092b84_NS d0fffdd7 O EL1h_n : ADRP x23,0x4cb84 +16838 clk cpu0 R X23 000000000004C000 +16839 clk cpu0 IT (16803) 00092b88:000010092b88_NS 2a1f03fa O EL1h_n : MOV w26,wzr +16839 clk cpu0 R X26 0000000000000000 +16840 clk cpu0 IT (16804) 00092b8c:000010092b8c_NS f0017cb5 O EL1h_n : ADRP x21,0x3029b8c +16840 clk cpu0 R X21 0000000003029000 +16841 clk cpu0 IT (16805) 00092b90:000010092b90_NS 910422d6 O EL1h_n : ADD x22,x22,#0x108 +16841 clk cpu0 R X22 000000000004C108 +16842 clk cpu0 IT (16806) 00092b94:000010092b94_NS 9104a6f7 O EL1h_n : ADD x23,x23,#0x129 +16842 clk cpu0 R X23 000000000004C129 +16843 clk cpu0 IT (16807) 00092b98:000010092b98_NS f0017d78 O EL1h_n : ADRP x24,0x3041b98 +16843 clk cpu0 R X24 0000000003041000 +16844 clk cpu0 IT (16808) 00092b9c:000010092b9c_NS 90030c39 O EL1h_n : ADRP x25,0x6216b9c +16844 clk cpu0 R X25 0000000006216000 +16845 clk cpu0 IT (16809) 00092ba0:000010092ba0_NS 14000005 O EL1h_n : B 0x92bb4 +16846 clk cpu0 IT (16810) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16846 clk cpu0 MR1 0004ccc9:00001004ccc9_NS 20 +16846 clk cpu0 R X8 0000000000000020 +16847 clk cpu0 IT (16811) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16847 clk cpu0 R cpsr 820003c5 +16848 clk cpu0 IS (16812) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16849 clk cpu0 IS (16813) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16850 clk cpu0 IT (16814) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16850 clk cpu0 R cpsr 020003c5 +16851 clk cpu0 IT (16815) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16852 clk cpu0 IT (16816) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16852 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16852 clk cpu0 R X9 0000000013000000 +16853 clk cpu0 IT (16817) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16853 clk cpu0 R X27 000000000004CCC9 +16854 clk cpu0 IT (16818) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16854 clk cpu0 R X20 000000000004CCCA +16855 clk cpu0 IT (16819) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16855 clk cpu0 MW1 13000000:000013000000_NS 20 +16856 clk cpu0 IT (16820) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16856 clk cpu0 MR1 0004ccca:00001004ccca_NS 45 +16856 clk cpu0 R X8 0000000000000045 +16857 clk cpu0 IT (16821) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16857 clk cpu0 R cpsr 220003c5 +16858 clk cpu0 IS (16822) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16859 clk cpu0 IS (16823) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16860 clk cpu0 IT (16824) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16860 clk cpu0 R cpsr 020003c5 +16861 clk cpu0 IT (16825) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16862 clk cpu0 IT (16826) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16862 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16862 clk cpu0 R X9 0000000013000000 +16863 clk cpu0 IT (16827) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16863 clk cpu0 R X27 000000000004CCCA +16864 clk cpu0 IT (16828) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16864 clk cpu0 R X20 000000000004CCCB +16865 clk cpu0 IT (16829) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16865 clk cpu0 MW1 13000000:000013000000_NS 45 +16866 clk cpu0 IT (16830) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16866 clk cpu0 MR1 0004cccb:00001004cccb_NS 6e +16866 clk cpu0 R X8 000000000000006E +16867 clk cpu0 IT (16831) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16867 clk cpu0 R cpsr 220003c5 +16868 clk cpu0 IS (16832) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16869 clk cpu0 IS (16833) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16870 clk cpu0 IT (16834) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16870 clk cpu0 R cpsr 020003c5 +16871 clk cpu0 IT (16835) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16872 clk cpu0 IT (16836) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16872 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16872 clk cpu0 R X9 0000000013000000 +16873 clk cpu0 IT (16837) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16873 clk cpu0 R X27 000000000004CCCB +16874 clk cpu0 IT (16838) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16874 clk cpu0 R X20 000000000004CCCC +16875 clk cpu0 IT (16839) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16875 clk cpu0 MW1 13000000:000013000000_NS 6e +16876 clk cpu0 IT (16840) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16876 clk cpu0 MR1 0004cccc:00001004cccc_NS 61 +16876 clk cpu0 R X8 0000000000000061 +16877 clk cpu0 IT (16841) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16877 clk cpu0 R cpsr 220003c5 +16878 clk cpu0 IS (16842) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16879 clk cpu0 IS (16843) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16880 clk cpu0 IT (16844) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16880 clk cpu0 R cpsr 020003c5 +16881 clk cpu0 IT (16845) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16882 clk cpu0 IT (16846) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16882 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16882 clk cpu0 R X9 0000000013000000 +16883 clk cpu0 IT (16847) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16883 clk cpu0 R X27 000000000004CCCC +16884 clk cpu0 IT (16848) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16884 clk cpu0 R X20 000000000004CCCD +16885 clk cpu0 IT (16849) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16885 clk cpu0 MW1 13000000:000013000000_NS 61 +16886 clk cpu0 IT (16850) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16886 clk cpu0 MR1 0004cccd:00001004cccd_NS 62 +16886 clk cpu0 R X8 0000000000000062 +16887 clk cpu0 IT (16851) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16887 clk cpu0 R cpsr 220003c5 +16888 clk cpu0 IS (16852) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16889 clk cpu0 IS (16853) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16890 clk cpu0 IT (16854) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16890 clk cpu0 R cpsr 020003c5 +16891 clk cpu0 IT (16855) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16892 clk cpu0 IT (16856) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16892 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16892 clk cpu0 R X9 0000000013000000 +16893 clk cpu0 IT (16857) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16893 clk cpu0 R X27 000000000004CCCD +16894 clk cpu0 IT (16858) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16894 clk cpu0 R X20 000000000004CCCE +16895 clk cpu0 IT (16859) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16895 clk cpu0 MW1 13000000:000013000000_NS 62 +16896 clk cpu0 IT (16860) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16896 clk cpu0 MR1 0004ccce:00001004ccce_NS 6c +16896 clk cpu0 R X8 000000000000006C +16897 clk cpu0 IT (16861) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16897 clk cpu0 R cpsr 220003c5 +16898 clk cpu0 IS (16862) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16899 clk cpu0 IS (16863) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16900 clk cpu0 IT (16864) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16900 clk cpu0 R cpsr 020003c5 +16901 clk cpu0 IT (16865) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16902 clk cpu0 IT (16866) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16902 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16902 clk cpu0 R X9 0000000013000000 +16903 clk cpu0 IT (16867) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16903 clk cpu0 R X27 000000000004CCCE +16904 clk cpu0 IT (16868) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16904 clk cpu0 R X20 000000000004CCCF +16905 clk cpu0 IT (16869) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16905 clk cpu0 MW1 13000000:000013000000_NS 6c +16906 clk cpu0 IT (16870) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16906 clk cpu0 MR1 0004cccf:00001004cccf_NS 65 +16906 clk cpu0 R X8 0000000000000065 +16907 clk cpu0 IT (16871) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16907 clk cpu0 R cpsr 220003c5 +16908 clk cpu0 IS (16872) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16909 clk cpu0 IS (16873) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16910 clk cpu0 IT (16874) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16910 clk cpu0 R cpsr 020003c5 +16911 clk cpu0 IT (16875) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16912 clk cpu0 IT (16876) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16912 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16912 clk cpu0 R X9 0000000013000000 +16913 clk cpu0 IT (16877) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +16913 clk cpu0 R X27 000000000004CCCF +16914 clk cpu0 IT (16878) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +16914 clk cpu0 R X20 000000000004CCD0 +16915 clk cpu0 IT (16879) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +16915 clk cpu0 MW1 13000000:000013000000_NS 65 +16916 clk cpu0 IT (16880) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +16916 clk cpu0 MR1 0004ccd0:00001004ccd0_NS 20 +16916 clk cpu0 R X8 0000000000000020 +16917 clk cpu0 IT (16881) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +16917 clk cpu0 R cpsr 820003c5 +16918 clk cpu0 IS (16882) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +16919 clk cpu0 IS (16883) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +16920 clk cpu0 IT (16884) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +16920 clk cpu0 R cpsr 420003c5 +16921 clk cpu0 IS (16885) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +16922 clk cpu0 IT (16886) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +16922 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +16922 clk cpu0 R X8 0000000000000000 +16923 clk cpu0 IT (16887) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +16923 clk cpu0 MR8 0004ccd0:00001004ccd0_NS 72746563_61727420 +16923 clk cpu0 R X0 7274656361727420 +16924 clk cpu0 IT (16888) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +16924 clk cpu0 R cpsr 820003c5 +16925 clk cpu0 IT (16889) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +16926 clk cpu0 IT (16890) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +16926 clk cpu0 R X27 0000000000000000 +16927 clk cpu0 IT (16891) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +16927 clk cpu0 R X28 000000000004CCD0 +16928 clk cpu0 IT (16892) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +16928 clk cpu0 R X8 00000000FFFFFFF8 +16929 clk cpu0 IT (16893) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16929 clk cpu0 R cpsr 020003c5 +16929 clk cpu0 R X9 0000000000000020 +16930 clk cpu0 IS (16894) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16931 clk cpu0 IT (16895) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16931 clk cpu0 R cpsr 820003c5 +16932 clk cpu0 IS (16896) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16933 clk cpu0 IT (16897) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16933 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16933 clk cpu0 R X9 0000000013000000 +16934 clk cpu0 IT (16898) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16934 clk cpu0 R cpsr 820003c5 +16934 clk cpu0 R X8 00000000FFFFFFF9 +16935 clk cpu0 IT (16899) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16935 clk cpu0 MW1 13000000:000013000000_NS 20 +16936 clk cpu0 IT (16900) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16936 clk cpu0 R X0 0072746563617274 +16937 clk cpu0 IT (16901) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16938 clk cpu0 IT (16902) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16938 clk cpu0 R cpsr 020003c5 +16938 clk cpu0 R X9 0000000000000074 +16939 clk cpu0 IS (16903) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16940 clk cpu0 IT (16904) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16940 clk cpu0 R cpsr 220003c5 +16941 clk cpu0 IS (16905) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16942 clk cpu0 IT (16906) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16942 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16942 clk cpu0 R X9 0000000013000000 +16943 clk cpu0 IT (16907) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16943 clk cpu0 R cpsr 820003c5 +16943 clk cpu0 R X8 00000000FFFFFFFA +16944 clk cpu0 IT (16908) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16944 clk cpu0 MW1 13000000:000013000000_NS 74 +16945 clk cpu0 IT (16909) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16945 clk cpu0 R X0 0000727465636172 +16946 clk cpu0 IT (16910) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16947 clk cpu0 IT (16911) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16947 clk cpu0 R cpsr 020003c5 +16947 clk cpu0 R X9 0000000000000072 +16948 clk cpu0 IS (16912) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16949 clk cpu0 IT (16913) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16949 clk cpu0 R cpsr 220003c5 +16950 clk cpu0 IS (16914) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16951 clk cpu0 IT (16915) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16951 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16951 clk cpu0 R X9 0000000013000000 +16952 clk cpu0 IT (16916) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16952 clk cpu0 R cpsr 820003c5 +16952 clk cpu0 R X8 00000000FFFFFFFB +16953 clk cpu0 IT (16917) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16953 clk cpu0 MW1 13000000:000013000000_NS 72 +16954 clk cpu0 IT (16918) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16954 clk cpu0 R X0 0000007274656361 +16955 clk cpu0 IT (16919) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16956 clk cpu0 IT (16920) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16956 clk cpu0 R cpsr 020003c5 +16956 clk cpu0 R X9 0000000000000061 +16957 clk cpu0 IS (16921) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16958 clk cpu0 IT (16922) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16958 clk cpu0 R cpsr 220003c5 +16959 clk cpu0 IS (16923) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16960 clk cpu0 IT (16924) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16960 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16960 clk cpu0 R X9 0000000013000000 +16961 clk cpu0 IT (16925) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16961 clk cpu0 R cpsr 820003c5 +16961 clk cpu0 R X8 00000000FFFFFFFC +16962 clk cpu0 IT (16926) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16962 clk cpu0 MW1 13000000:000013000000_NS 61 +16963 clk cpu0 IT (16927) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16963 clk cpu0 R X0 0000000072746563 +16964 clk cpu0 IT (16928) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16965 clk cpu0 IT (16929) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16965 clk cpu0 R cpsr 020003c5 +16965 clk cpu0 R X9 0000000000000063 +16966 clk cpu0 IS (16930) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16967 clk cpu0 IT (16931) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16967 clk cpu0 R cpsr 220003c5 +16968 clk cpu0 IS (16932) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16969 clk cpu0 IT (16933) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16969 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16969 clk cpu0 R X9 0000000013000000 +16970 clk cpu0 IT (16934) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16970 clk cpu0 R cpsr 820003c5 +16970 clk cpu0 R X8 00000000FFFFFFFD +16971 clk cpu0 IT (16935) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16971 clk cpu0 MW1 13000000:000013000000_NS 63 +16972 clk cpu0 IT (16936) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16972 clk cpu0 R X0 0000000000727465 +16973 clk cpu0 IT (16937) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16974 clk cpu0 IT (16938) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16974 clk cpu0 R cpsr 020003c5 +16974 clk cpu0 R X9 0000000000000065 +16975 clk cpu0 IS (16939) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16976 clk cpu0 IT (16940) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16976 clk cpu0 R cpsr 220003c5 +16977 clk cpu0 IS (16941) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16978 clk cpu0 IT (16942) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16978 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16978 clk cpu0 R X9 0000000013000000 +16979 clk cpu0 IT (16943) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16979 clk cpu0 R cpsr 820003c5 +16979 clk cpu0 R X8 00000000FFFFFFFE +16980 clk cpu0 IT (16944) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16980 clk cpu0 MW1 13000000:000013000000_NS 65 +16981 clk cpu0 IT (16945) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16981 clk cpu0 R X0 0000000000007274 +16982 clk cpu0 IT (16946) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16983 clk cpu0 IT (16947) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16983 clk cpu0 R cpsr 020003c5 +16983 clk cpu0 R X9 0000000000000074 +16984 clk cpu0 IS (16948) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16985 clk cpu0 IT (16949) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16985 clk cpu0 R cpsr 220003c5 +16986 clk cpu0 IS (16950) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16987 clk cpu0 IT (16951) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16987 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16987 clk cpu0 R X9 0000000013000000 +16988 clk cpu0 IT (16952) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16988 clk cpu0 R cpsr 820003c5 +16988 clk cpu0 R X8 00000000FFFFFFFF +16989 clk cpu0 IT (16953) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16989 clk cpu0 MW1 13000000:000013000000_NS 74 +16990 clk cpu0 IT (16954) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16990 clk cpu0 R X0 0000000000000072 +16991 clk cpu0 IT (16955) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +16992 clk cpu0 IT (16956) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +16992 clk cpu0 R cpsr 020003c5 +16992 clk cpu0 R X9 0000000000000072 +16993 clk cpu0 IS (16957) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +16994 clk cpu0 IT (16958) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +16994 clk cpu0 R cpsr 220003c5 +16995 clk cpu0 IS (16959) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +16996 clk cpu0 IT (16960) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +16996 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +16996 clk cpu0 R X9 0000000013000000 +16997 clk cpu0 IT (16961) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +16997 clk cpu0 R cpsr 620003c5 +16997 clk cpu0 R X8 0000000000000000 +16998 clk cpu0 IT (16962) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +16998 clk cpu0 MW1 13000000:000013000000_NS 72 +16999 clk cpu0 IT (16963) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +16999 clk cpu0 R X0 0000000000000000 +17000 clk cpu0 IS (16964) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17001 clk cpu0 IT (16965) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +17001 clk cpu0 MR8 0004ccd8:00001004ccd8_NS 69206c65_2e656361 +17001 clk cpu0 R X0 69206C652E656361 +17001 clk cpu0 R X28 000000000004CCD8 +17002 clk cpu0 IT (16966) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +17002 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +17002 clk cpu0 R X9 0000000000000000 +17003 clk cpu0 IT (16967) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +17003 clk cpu0 R X8 0000000000000000 +17004 clk cpu0 IT (16968) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +17004 clk cpu0 R X27 0000000000000008 +17005 clk cpu0 IT (16969) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +17005 clk cpu0 R cpsr 820003c5 +17006 clk cpu0 IT (16970) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +17007 clk cpu0 IT (16971) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +17007 clk cpu0 R X8 00000000FFFFFFF8 +17008 clk cpu0 IT (16972) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17008 clk cpu0 R cpsr 020003c5 +17008 clk cpu0 R X9 0000000000000061 +17009 clk cpu0 IS (16973) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17010 clk cpu0 IT (16974) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17010 clk cpu0 R cpsr 220003c5 +17011 clk cpu0 IS (16975) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17012 clk cpu0 IT (16976) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17012 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17012 clk cpu0 R X9 0000000013000000 +17013 clk cpu0 IT (16977) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17013 clk cpu0 R cpsr 820003c5 +17013 clk cpu0 R X8 00000000FFFFFFF9 +17014 clk cpu0 IT (16978) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17014 clk cpu0 MW1 13000000:000013000000_NS 61 +17015 clk cpu0 IT (16979) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17015 clk cpu0 R X0 0069206C652E6563 +17016 clk cpu0 IT (16980) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17017 clk cpu0 IT (16981) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17017 clk cpu0 R cpsr 020003c5 +17017 clk cpu0 R X9 0000000000000063 +17018 clk cpu0 IS (16982) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17019 clk cpu0 IT (16983) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17019 clk cpu0 R cpsr 220003c5 +17020 clk cpu0 IS (16984) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17021 clk cpu0 IT (16985) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17021 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17021 clk cpu0 R X9 0000000013000000 +17022 clk cpu0 IT (16986) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17022 clk cpu0 R cpsr 820003c5 +17022 clk cpu0 R X8 00000000FFFFFFFA +17023 clk cpu0 IT (16987) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17023 clk cpu0 MW1 13000000:000013000000_NS 63 +17024 clk cpu0 IT (16988) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17024 clk cpu0 R X0 000069206C652E65 +17025 clk cpu0 IT (16989) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17026 clk cpu0 IT (16990) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17026 clk cpu0 R cpsr 020003c5 +17026 clk cpu0 R X9 0000000000000065 +17027 clk cpu0 IS (16991) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17028 clk cpu0 IT (16992) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17028 clk cpu0 R cpsr 220003c5 +17029 clk cpu0 IS (16993) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17030 clk cpu0 IT (16994) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17030 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17030 clk cpu0 R X9 0000000013000000 +17031 clk cpu0 IT (16995) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17031 clk cpu0 R cpsr 820003c5 +17031 clk cpu0 R X8 00000000FFFFFFFB +17032 clk cpu0 IT (16996) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17032 clk cpu0 MW1 13000000:000013000000_NS 65 +17033 clk cpu0 IT (16997) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17033 clk cpu0 R X0 00000069206C652E +17034 clk cpu0 IT (16998) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17035 clk cpu0 IT (16999) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17035 clk cpu0 R cpsr 020003c5 +17035 clk cpu0 R X9 000000000000002E +17036 clk cpu0 IS (17000) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17037 clk cpu0 IT (17001) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17037 clk cpu0 R cpsr 220003c5 +17038 clk cpu0 IS (17002) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17039 clk cpu0 IT (17003) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17039 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17039 clk cpu0 R X9 0000000013000000 +17040 clk cpu0 IT (17004) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17040 clk cpu0 R cpsr 820003c5 +17040 clk cpu0 R X8 00000000FFFFFFFC +17041 clk cpu0 IT (17005) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17041 clk cpu0 MW1 13000000:000013000000_NS 2e +17042 clk cpu0 IT (17006) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17042 clk cpu0 R X0 0000000069206C65 +17043 clk cpu0 IT (17007) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17044 clk cpu0 IT (17008) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17044 clk cpu0 R cpsr 020003c5 +17044 clk cpu0 R X9 0000000000000065 +17045 clk cpu0 IS (17009) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17046 clk cpu0 IT (17010) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17046 clk cpu0 R cpsr 220003c5 +17047 clk cpu0 IS (17011) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17048 clk cpu0 IT (17012) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17048 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17048 clk cpu0 R X9 0000000013000000 +17049 clk cpu0 IT (17013) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17049 clk cpu0 R cpsr 820003c5 +17049 clk cpu0 R X8 00000000FFFFFFFD +17050 clk cpu0 IT (17014) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17050 clk cpu0 MW1 13000000:000013000000_NS 65 +17051 clk cpu0 IT (17015) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17051 clk cpu0 R X0 000000000069206C +17052 clk cpu0 IT (17016) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17053 clk cpu0 IT (17017) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17053 clk cpu0 R cpsr 020003c5 +17053 clk cpu0 R X9 000000000000006C +17054 clk cpu0 IS (17018) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17055 clk cpu0 IT (17019) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17055 clk cpu0 R cpsr 220003c5 +17056 clk cpu0 IS (17020) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17057 clk cpu0 IT (17021) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17057 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17057 clk cpu0 R X9 0000000013000000 +17058 clk cpu0 IT (17022) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17058 clk cpu0 R cpsr 820003c5 +17058 clk cpu0 R X8 00000000FFFFFFFE +17059 clk cpu0 IT (17023) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17059 clk cpu0 MW1 13000000:000013000000_NS 6c +17060 clk cpu0 IT (17024) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17060 clk cpu0 R X0 0000000000006920 +17061 clk cpu0 IT (17025) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17062 clk cpu0 IT (17026) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17062 clk cpu0 R cpsr 020003c5 +17062 clk cpu0 R X9 0000000000000020 +17063 clk cpu0 IS (17027) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17064 clk cpu0 IT (17028) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17064 clk cpu0 R cpsr 820003c5 +17065 clk cpu0 IS (17029) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17066 clk cpu0 IT (17030) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17066 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17066 clk cpu0 R X9 0000000013000000 +17067 clk cpu0 IT (17031) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17067 clk cpu0 R cpsr 820003c5 +17067 clk cpu0 R X8 00000000FFFFFFFF +17068 clk cpu0 IT (17032) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17068 clk cpu0 MW1 13000000:000013000000_NS 20 +17069 clk cpu0 IT (17033) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17069 clk cpu0 R X0 0000000000000069 +17070 clk cpu0 IT (17034) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17071 clk cpu0 IT (17035) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17071 clk cpu0 R cpsr 020003c5 +17071 clk cpu0 R X9 0000000000000069 +17072 clk cpu0 IS (17036) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17073 clk cpu0 IT (17037) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17073 clk cpu0 R cpsr 220003c5 +17074 clk cpu0 IS (17038) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17075 clk cpu0 IT (17039) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17075 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17075 clk cpu0 R X9 0000000013000000 +17076 clk cpu0 IT (17040) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17076 clk cpu0 R cpsr 620003c5 +17076 clk cpu0 R X8 0000000000000000 +17077 clk cpu0 IT (17041) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17077 clk cpu0 MW1 13000000:000013000000_NS 69 +17078 clk cpu0 IT (17042) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17078 clk cpu0 R X0 0000000000000000 +17079 clk cpu0 IS (17043) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17080 clk cpu0 IT (17044) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +17080 clk cpu0 MR8 0004cce0:00001004cce0_NS 2078253d_206f666e +17080 clk cpu0 R X0 2078253D206F666E +17080 clk cpu0 R X28 000000000004CCE0 +17081 clk cpu0 IT (17045) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +17081 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +17081 clk cpu0 R X9 0000000000000000 +17082 clk cpu0 IT (17046) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +17082 clk cpu0 R X8 0000000000000008 +17083 clk cpu0 IT (17047) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +17083 clk cpu0 R X27 0000000000000010 +17084 clk cpu0 IT (17048) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +17084 clk cpu0 R cpsr 820003c5 +17085 clk cpu0 IT (17049) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +17086 clk cpu0 IT (17050) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +17086 clk cpu0 R X8 00000000FFFFFFF8 +17087 clk cpu0 IT (17051) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17087 clk cpu0 R cpsr 020003c5 +17087 clk cpu0 R X9 000000000000006E +17088 clk cpu0 IS (17052) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17089 clk cpu0 IT (17053) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17089 clk cpu0 R cpsr 220003c5 +17090 clk cpu0 IS (17054) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17091 clk cpu0 IT (17055) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17091 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17091 clk cpu0 R X9 0000000013000000 +17092 clk cpu0 IT (17056) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17092 clk cpu0 R cpsr 820003c5 +17092 clk cpu0 R X8 00000000FFFFFFF9 +17093 clk cpu0 IT (17057) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17093 clk cpu0 MW1 13000000:000013000000_NS 6e +17094 clk cpu0 IT (17058) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17094 clk cpu0 R X0 002078253D206F66 +17095 clk cpu0 IT (17059) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17096 clk cpu0 IT (17060) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17096 clk cpu0 R cpsr 020003c5 +17096 clk cpu0 R X9 0000000000000066 +17097 clk cpu0 IS (17061) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17098 clk cpu0 IT (17062) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17098 clk cpu0 R cpsr 220003c5 +17099 clk cpu0 IS (17063) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17100 clk cpu0 IT (17064) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17100 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17100 clk cpu0 R X9 0000000013000000 +17101 clk cpu0 IT (17065) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17101 clk cpu0 R cpsr 820003c5 +17101 clk cpu0 R X8 00000000FFFFFFFA +17102 clk cpu0 IT (17066) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17102 clk cpu0 MW1 13000000:000013000000_NS 66 +17103 clk cpu0 IT (17067) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17103 clk cpu0 R X0 00002078253D206F +17104 clk cpu0 IT (17068) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17105 clk cpu0 IT (17069) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17105 clk cpu0 R cpsr 020003c5 +17105 clk cpu0 R X9 000000000000006F +17106 clk cpu0 IS (17070) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17107 clk cpu0 IT (17071) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17107 clk cpu0 R cpsr 220003c5 +17108 clk cpu0 IS (17072) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17109 clk cpu0 IT (17073) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17109 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17109 clk cpu0 R X9 0000000013000000 +17110 clk cpu0 IT (17074) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17110 clk cpu0 R cpsr 820003c5 +17110 clk cpu0 R X8 00000000FFFFFFFB +17111 clk cpu0 IT (17075) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17111 clk cpu0 MW1 13000000:000013000000_NS 6f +17112 clk cpu0 IT (17076) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17112 clk cpu0 R X0 0000002078253D20 +17113 clk cpu0 IT (17077) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17114 clk cpu0 IT (17078) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17114 clk cpu0 R cpsr 020003c5 +17114 clk cpu0 R X9 0000000000000020 +17115 clk cpu0 IS (17079) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17116 clk cpu0 IT (17080) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17116 clk cpu0 R cpsr 820003c5 +17117 clk cpu0 IS (17081) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17118 clk cpu0 IT (17082) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17118 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17118 clk cpu0 R X9 0000000013000000 +17119 clk cpu0 IT (17083) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17119 clk cpu0 R cpsr 820003c5 +17119 clk cpu0 R X8 00000000FFFFFFFC +17120 clk cpu0 IT (17084) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17120 clk cpu0 MW1 13000000:000013000000_NS 20 +17121 clk cpu0 IT (17085) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17121 clk cpu0 R X0 000000002078253D +17122 clk cpu0 IT (17086) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17123 clk cpu0 IT (17087) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17123 clk cpu0 R cpsr 020003c5 +17123 clk cpu0 R X9 000000000000003D +17124 clk cpu0 IS (17088) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17125 clk cpu0 IT (17089) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17125 clk cpu0 R cpsr 220003c5 +17126 clk cpu0 IS (17090) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17127 clk cpu0 IT (17091) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17127 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17127 clk cpu0 R X9 0000000013000000 +17128 clk cpu0 IT (17092) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17128 clk cpu0 R cpsr 820003c5 +17128 clk cpu0 R X8 00000000FFFFFFFD +17129 clk cpu0 IT (17093) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17129 clk cpu0 MW1 13000000:000013000000_NS 3d +17130 clk cpu0 IT (17094) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17130 clk cpu0 R X0 0000000000207825 +17131 clk cpu0 IT (17095) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17132 clk cpu0 IT (17096) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17132 clk cpu0 R cpsr 020003c5 +17132 clk cpu0 R X9 0000000000000025 +17133 clk cpu0 IS (17097) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17134 clk cpu0 IT (17098) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17134 clk cpu0 R cpsr 620003c5 +17135 clk cpu0 IT (17099) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17136 clk cpu0 IT (17100) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +17136 clk cpu0 R X8 000000000000000D +17137 clk cpu0 IT (17101) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +17137 clk cpu0 R X9 0000000000000014 +17138 clk cpu0 IT (17102) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +17138 clk cpu0 R X9 000000000004CCE4 +17139 clk cpu0 IT (17103) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +17139 clk cpu0 R cpsr 020003c5 +17140 clk cpu0 IT (17104) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +17140 clk cpu0 R X27 000000000004CCE4 +17141 clk cpu0 IT (17105) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +17141 clk cpu0 R X20 000000000004CCE5 +17142 clk cpu0 IT (17106) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +17143 clk cpu0 IT (17107) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +17143 clk cpu0 MR1 0004cce5:00001004cce5_NS 25 +17143 clk cpu0 R X8 0000000000000025 +17144 clk cpu0 IT (17108) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +17144 clk cpu0 R cpsr 620003c5 +17145 clk cpu0 IT (17109) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +17146 clk cpu0 IT (17110) 00092c30:000010092c30_NS b90736bf O EL1h_n : STR wzr,[x21,#0x734] +17146 clk cpu0 MW4 03029734:000000829734_NS 00000000 +17147 clk cpu0 IT (17111) 00092c34:000010092c34_NS aa1403fb O EL1h_n : MOV x27,x20 +17147 clk cpu0 R X27 000000000004CCE5 +17148 clk cpu0 IT (17112) 00092c38:000010092c38_NS 38401f7c O EL1h_n : LDRB w28,[x27,#1]! +17148 clk cpu0 MR1 0004cce6:00001004cce6_NS 78 +17148 clk cpu0 R X27 000000000004CCE6 +17148 clk cpu0 R X28 0000000000000078 +17149 clk cpu0 IT (17113) 00092c3c:000010092c3c_NS 7100c39f O EL1h_n : CMP w28,#0x30 +17149 clk cpu0 R cpsr 220003c5 +17150 clk cpu0 IS (17114) 00092c40:000010092c40_NS 54000060 O EL1h_n : B.EQ 0x92c4c +17151 clk cpu0 IT (17115) 00092c44:000010092c44_NS 3500041c O EL1h_n : CBNZ w28,0x92cc4 +17152 clk cpu0 IT (17116) 00092cc4:000010092cc4_NS 51016388 O EL1h_n : SUB w8,w28,#0x58 +17152 clk cpu0 R X8 0000000000000020 +17153 clk cpu0 IT (17117) 00092cc8:000010092cc8_NS 7100811f O EL1h_n : CMP w8,#0x20 +17153 clk cpu0 R cpsr 620003c5 +17154 clk cpu0 IS (17118) 00092ccc:000010092ccc_NS 54000b48 O EL1h_n : B.HI 0x92e34 +17155 clk cpu0 IT (17119) 00092cd0:000010092cd0_NS 10000089 O EL1h_n : ADR x9,0x92ce0 +17155 clk cpu0 R X9 0000000000092CE0 +17156 clk cpu0 IT (17120) 00092cd4:000010092cd4_NS 38686aca O EL1h_n : LDRB w10,[x22,x8] +17156 clk cpu0 MR1 0004c128:00001004c128_NS 00 +17156 clk cpu0 R X10 0000000000000000 +17157 clk cpu0 IT (17121) 00092cd8:000010092cd8_NS 8b0a0929 O EL1h_n : ADD x9,x9,x10,LSL #2 +17157 clk cpu0 R X9 0000000000092CE0 +17158 clk cpu0 IT (17122) 00092cdc:000010092cdc_NS d61f0120 O EL1h_n : BR x9 +17158 clk cpu0 R cpsr 620007c5 +17159 clk cpu0 IT (17123) 00092ce0:000010092ce0_NS b9801a68 O EL1h_n : LDRSW x8,[x19,#0x18] +17159 clk cpu0 MR4 03700548:000000f00548_NS ffffffd0 +17159 clk cpu0 R cpsr 620003c5 +17159 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +17160 clk cpu0 IS (17124) 00092ce4:000010092ce4_NS 36f800a8 O EL1h_n : TBZ w8,#31,0x92cf8 +17161 clk cpu0 IT (17125) 00092ce8:000010092ce8_NS 11002109 O EL1h_n : ADD w9,w8,#8 +17161 clk cpu0 R X9 00000000FFFFFFD8 +17162 clk cpu0 IT (17126) 00092cec:000010092cec_NS 7100013f O EL1h_n : CMP w9,#0 +17162 clk cpu0 R cpsr a20003c5 +17163 clk cpu0 IT (17127) 00092cf0:000010092cf0_NS b9001a69 O EL1h_n : STR w9,[x19,#0x18] +17163 clk cpu0 MW4 03700548:000000f00548_NS ffffffd8 +17164 clk cpu0 IT (17128) 00092cf4:000010092cf4_NS 54000cad O EL1h_n : B.LE 0x92e88 +17165 clk cpu0 IT (17129) 00092e88:000010092e88_NS f9400669 O EL1h_n : LDR x9,[x19,#8] +17165 clk cpu0 MR8 03700538:000000f00538_NS 00000000_03700530 +17165 clk cpu0 R X9 0000000003700530 +17166 clk cpu0 IT (17130) 00092e8c:000010092e8c_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +17166 clk cpu0 R X8 0000000003700500 +17167 clk cpu0 IT (17131) 00092e90:000010092e90_NS 17ffff9d O EL1h_n : B 0x92d04 +17168 clk cpu0 IT (17132) 00092d04:000010092d04_NS f9400100 O EL1h_n : LDR x0,[x8,#0] +17168 clk cpu0 MR8 03700500:000000f00500_NS 00000000_00030001 +17168 clk cpu0 R X0 0000000000030001 +17169 clk cpu0 IT (17133) 00092d08:000010092d08_NS 52800201 O EL1h_n : MOV w1,#0x10 +17169 clk cpu0 R X1 0000000000000010 +17170 clk cpu0 IT (17134) 00092d0c:000010092d0c_NS 94000a58 O EL1h_n : BL 0x9566c +17170 clk cpu0 R X30 0000000000092D10 +17171 clk cpu0 IT (17135) 0009566c:00001009566c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +17171 clk cpu0 R SP_EL1 0000000003700440 +17172 clk cpu0 IT (17136) 00095670:000010095670_NS b204c7e8 O EL1h_n : ORR x8,xzr,#0x3030303030303030 +17172 clk cpu0 R X8 3030303030303030 +17173 clk cpu0 IT (17137) 00095674:000010095674_NS a900a3e8 O EL1h_n : STP x8,x8,[sp,#8] +17173 clk cpu0 MW8 03700448:000000f00448_NS 30303030_30303030 +17173 clk cpu0 MW8 03700450:000000f00450_NS 30303030_30303030 +17174 clk cpu0 IT (17138) 00095678:000010095678_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +17174 clk cpu0 MW4 03700458:000000f00458_NS 30303030 +17175 clk cpu0 IS (17139) 0009567c:00001009567c_NS b4000220 O EL1h_n : CBZ x0,0x956c0 +17176 clk cpu0 IT (17140) 00095680:000010095680_NS aa1f03eb O EL1h_n : MOV x11,xzr +17176 clk cpu0 R X11 0000000000000000 +17177 clk cpu0 IT (17141) 00095684:000010095684_NS 2a0103e8 O EL1h_n : MOV w8,w1 +17177 clk cpu0 R X8 0000000000000010 +17178 clk cpu0 IT (17142) 00095688:000010095688_NS 1103dc29 O EL1h_n : ADD w9,w1,#0xf7 +17178 clk cpu0 R X9 0000000000000107 +17179 clk cpu0 IT (17143) 0009568c:00001009568c_NS 910023ea O EL1h_n : ADD x10,sp,#8 +17179 clk cpu0 R X10 0000000003700448 +17180 clk cpu0 IT (17144) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +17180 clk cpu0 R X12 0000000000003000 +17181 clk cpu0 IT (17145) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +17181 clk cpu0 R X13 0000000000000001 +17182 clk cpu0 IT (17146) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +17182 clk cpu0 R cpsr 820003c5 +17183 clk cpu0 IT (17147) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +17183 clk cpu0 R X14 0000000000000000 +17184 clk cpu0 IT (17148) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +17184 clk cpu0 R X13 0000000000000001 +17185 clk cpu0 IT (17149) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +17185 clk cpu0 R X13 0000000000000031 +17186 clk cpu0 IT (17150) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +17186 clk cpu0 R cpsr 220003c5 +17187 clk cpu0 IT (17151) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +17187 clk cpu0 MW1 03700448:000000f00448_NS 31 +17188 clk cpu0 IT (17152) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +17188 clk cpu0 R X11 0000000000000001 +17189 clk cpu0 IT (17153) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +17189 clk cpu0 R X0 0000000000003000 +17190 clk cpu0 IT (17154) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +17191 clk cpu0 IT (17155) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +17191 clk cpu0 R X12 0000000000000300 +17192 clk cpu0 IT (17156) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +17192 clk cpu0 R X13 0000000000000000 +17193 clk cpu0 IT (17157) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +17193 clk cpu0 R cpsr 820003c5 +17194 clk cpu0 IT (17158) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +17194 clk cpu0 R X14 0000000000000000 +17195 clk cpu0 IT (17159) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +17195 clk cpu0 R X13 0000000000000000 +17196 clk cpu0 IT (17160) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +17196 clk cpu0 R X13 0000000000000030 +17197 clk cpu0 IT (17161) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +17197 clk cpu0 R cpsr 220003c5 +17198 clk cpu0 IT (17162) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +17198 clk cpu0 MW1 03700449:000000f00449_NS 30 +17199 clk cpu0 IT (17163) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +17199 clk cpu0 R X11 0000000000000002 +17200 clk cpu0 IT (17164) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +17200 clk cpu0 R X0 0000000000000300 +17201 clk cpu0 IT (17165) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +17202 clk cpu0 IT (17166) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +17202 clk cpu0 R X12 0000000000000030 +17203 clk cpu0 IT (17167) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +17203 clk cpu0 R X13 0000000000000000 +17204 clk cpu0 IT (17168) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +17204 clk cpu0 R cpsr 820003c5 +17205 clk cpu0 IT (17169) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +17205 clk cpu0 R X14 0000000000000000 +17206 clk cpu0 IT (17170) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +17206 clk cpu0 R X13 0000000000000000 +17207 clk cpu0 IT (17171) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +17207 clk cpu0 R X13 0000000000000030 +17208 clk cpu0 IT (17172) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +17208 clk cpu0 R cpsr 220003c5 +17209 clk cpu0 IT (17173) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +17209 clk cpu0 MW1 0370044a:000000f0044a_NS 30 +17210 clk cpu0 IT (17174) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +17210 clk cpu0 R X11 0000000000000003 +17211 clk cpu0 IT (17175) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +17211 clk cpu0 R X0 0000000000000030 +17212 clk cpu0 IT (17176) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +17213 clk cpu0 IT (17177) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +17213 clk cpu0 R X12 0000000000000003 +17214 clk cpu0 IT (17178) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +17214 clk cpu0 R X13 0000000000000000 +17215 clk cpu0 IT (17179) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +17215 clk cpu0 R cpsr 820003c5 +17216 clk cpu0 IT (17180) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +17216 clk cpu0 R X14 0000000000000000 +17217 clk cpu0 IT (17181) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +17217 clk cpu0 R X13 0000000000000000 +17218 clk cpu0 IT (17182) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +17218 clk cpu0 R X13 0000000000000030 +17219 clk cpu0 IT (17183) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +17219 clk cpu0 R cpsr 220003c5 +17220 clk cpu0 IT (17184) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +17220 clk cpu0 MW1 0370044b:000000f0044b_NS 30 +17221 clk cpu0 IT (17185) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +17221 clk cpu0 R X11 0000000000000004 +17222 clk cpu0 IT (17186) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +17222 clk cpu0 R X0 0000000000000003 +17223 clk cpu0 IT (17187) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +17224 clk cpu0 IT (17188) 00095690:000010095690_NS 9ac8080c O EL1h_n : UDIV x12,x0,x8 +17224 clk cpu0 R X12 0000000000000000 +17225 clk cpu0 IT (17189) 00095694:000010095694_NS 1b08818d O EL1h_n : MSUB w13,w12,w8,w0 +17225 clk cpu0 R X13 0000000000000003 +17226 clk cpu0 IT (17190) 00095698:000010095698_NS 710025bf O EL1h_n : CMP w13,#9 +17226 clk cpu0 R cpsr 820003c5 +17227 clk cpu0 IT (17191) 0009569c:00001009569c_NS 1a9f812e O EL1h_n : CSEL w14,w9,wzr,HI +17227 clk cpu0 R X14 0000000000000000 +17228 clk cpu0 IT (17192) 000956a0:0000100956a0_NS 0b0d01cd O EL1h_n : ADD w13,w14,w13 +17228 clk cpu0 R X13 0000000000000003 +17229 clk cpu0 IT (17193) 000956a4:0000100956a4_NS 1100c1ad O EL1h_n : ADD w13,w13,#0x30 +17229 clk cpu0 R X13 0000000000000033 +17230 clk cpu0 IT (17194) 000956a8:0000100956a8_NS eb08001f O EL1h_n : CMP x0,x8 +17230 clk cpu0 R cpsr 820003c5 +17231 clk cpu0 IT (17195) 000956ac:0000100956ac_NS 382b694d O EL1h_n : STRB w13,[x10,x11] +17231 clk cpu0 MW1 0370044c:000000f0044c_NS 33 +17232 clk cpu0 IT (17196) 000956b0:0000100956b0_NS 9100056b O EL1h_n : ADD x11,x11,#1 +17232 clk cpu0 R X11 0000000000000005 +17233 clk cpu0 IT (17197) 000956b4:0000100956b4_NS aa0c03e0 O EL1h_n : MOV x0,x12 +17233 clk cpu0 R X0 0000000000000000 +17234 clk cpu0 IS (17198) 000956b8:0000100956b8_NS 54fffec2 O EL1h_n : B.CS 0x95690 +17235 clk cpu0 IT (17199) 000956bc:0000100956bc_NS 14000002 O EL1h_n : B 0x956c4 +17236 clk cpu0 IT (17200) 000956c4:0000100956c4_NS 90017ca8 O EL1h_n : ADRP x8,0x30296c4 +17236 clk cpu0 R X8 0000000003029000 +17237 clk cpu0 IT (17201) 000956c8:0000100956c8_NS b9473508 O EL1h_n : LDR w8,[x8,#0x734] +17237 clk cpu0 MR4 03029734:000000829734_NS 00000000 +17237 clk cpu0 R X8 0000000000000000 +17238 clk cpu0 IT (17202) 000956cc:0000100956cc_NS 6b0b011f O EL1h_n : CMP w8,w11 +17238 clk cpu0 R cpsr 820003c5 +17239 clk cpu0 IT (17203) 000956d0:0000100956d0_NS 1a8bc108 O EL1h_n : CSEL w8,w8,w11,GT +17239 clk cpu0 R X8 0000000000000005 +17240 clk cpu0 IT (17204) 000956d4:0000100956d4_NS 7100051f O EL1h_n : CMP w8,#1 +17240 clk cpu0 R cpsr 220003c5 +17241 clk cpu0 IS (17205) 000956d8:0000100956d8_NS 540001ab O EL1h_n : B.LT 0x9570c +17242 clk cpu0 IT (17206) 000956dc:0000100956dc_NS 910023e9 O EL1h_n : ADD x9,sp,#8 +17242 clk cpu0 R X9 0000000003700448 +17243 clk cpu0 IT (17207) 000956e0:0000100956e0_NS 93407d08 O EL1h_n : SXTW x8,w8 +17243 clk cpu0 R X8 0000000000000005 +17244 clk cpu0 IT (17208) 000956e4:0000100956e4_NS d1000529 O EL1h_n : SUB x9,x9,#1 +17244 clk cpu0 R X9 0000000003700447 +17245 clk cpu0 IT (17209) 000956e8:0000100956e8_NS b0030c0a O EL1h_n : ADRP x10,0x62166e8 +17245 clk cpu0 R X10 0000000006216000 +17246 clk cpu0 IT (17210) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +17246 clk cpu0 MR1 0370044c:000000f0044c_NS 33 +17246 clk cpu0 R X11 0000000000000033 +17247 clk cpu0 IT (17211) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +17247 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17247 clk cpu0 R X12 0000000013000000 +17248 clk cpu0 IT (17212) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +17248 clk cpu0 R X8 0000000000000004 +17249 clk cpu0 IT (17213) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +17249 clk cpu0 R cpsr 220003c5 +17250 clk cpu0 IT (17214) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +17250 clk cpu0 MW1 13000000:000013000000_NS 33 +17251 clk cpu0 IT (17215) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +17252 clk cpu0 IT (17216) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +17252 clk cpu0 MR1 0370044b:000000f0044b_NS 30 +17252 clk cpu0 R X11 0000000000000030 +17253 clk cpu0 IT (17217) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +17253 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17253 clk cpu0 R X12 0000000013000000 +17254 clk cpu0 IT (17218) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +17254 clk cpu0 R X8 0000000000000003 +17255 clk cpu0 IT (17219) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +17255 clk cpu0 R cpsr 220003c5 +17256 clk cpu0 IT (17220) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +17256 clk cpu0 MW1 13000000:000013000000_NS 30 +17257 clk cpu0 IT (17221) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +17258 clk cpu0 IT (17222) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +17258 clk cpu0 MR1 0370044a:000000f0044a_NS 30 +17258 clk cpu0 R X11 0000000000000030 +17259 clk cpu0 IT (17223) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +17259 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17259 clk cpu0 R X12 0000000013000000 +17260 clk cpu0 IT (17224) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +17260 clk cpu0 R X8 0000000000000002 +17261 clk cpu0 IT (17225) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +17261 clk cpu0 R cpsr 220003c5 +17262 clk cpu0 IT (17226) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +17262 clk cpu0 MW1 13000000:000013000000_NS 30 +17263 clk cpu0 IT (17227) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +17264 clk cpu0 IT (17228) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +17264 clk cpu0 MR1 03700449:000000f00449_NS 30 +17264 clk cpu0 R X11 0000000000000030 +17265 clk cpu0 IT (17229) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +17265 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17265 clk cpu0 R X12 0000000013000000 +17266 clk cpu0 IT (17230) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +17266 clk cpu0 R X8 0000000000000001 +17267 clk cpu0 IT (17231) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +17267 clk cpu0 R cpsr 220003c5 +17268 clk cpu0 IT (17232) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +17268 clk cpu0 MW1 13000000:000013000000_NS 30 +17269 clk cpu0 IT (17233) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +17270 clk cpu0 IT (17234) 000956ec:0000100956ec_NS 3868692b O EL1h_n : LDRB w11,[x9,x8] +17270 clk cpu0 MR1 03700448:000000f00448_NS 31 +17270 clk cpu0 R X11 0000000000000031 +17271 clk cpu0 IT (17235) 000956f0:0000100956f0_NS f940714c O EL1h_n : LDR x12,[x10,#0xe0] +17271 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17271 clk cpu0 R X12 0000000013000000 +17272 clk cpu0 IT (17236) 000956f4:0000100956f4_NS d1000508 O EL1h_n : SUB x8,x8,#1 +17272 clk cpu0 R X8 0000000000000000 +17273 clk cpu0 IT (17237) 000956f8:0000100956f8_NS f100011f O EL1h_n : CMP x8,#0 +17273 clk cpu0 R cpsr 620003c5 +17274 clk cpu0 IT (17238) 000956fc:0000100956fc_NS 3900018b O EL1h_n : STRB w11,[x12,#0] +17274 clk cpu0 MW1 13000000:000013000000_NS 31 +17275 clk cpu0 IS (17239) 00095700:000010095700_NS 54ffff6c O EL1h_n : B.GT 0x956ec +17276 clk cpu0 IT (17240) 00095704:000010095704_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +17276 clk cpu0 R SP_EL1 0000000003700460 +17277 clk cpu0 IT (17241) 00095708:000010095708_NS d65f03c0 O EL1h_n : RET +17278 clk cpu0 IT (17242) 00092d10:000010092d10_NS 91000774 O EL1h_n : ADD x20,x27,#1 +17278 clk cpu0 R X20 000000000004CCE7 +17279 clk cpu0 IT (17243) 00092d14:000010092d14_NS 17ffffa8 O EL1h_n : B 0x92bb4 +17280 clk cpu0 IT (17244) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +17280 clk cpu0 MR1 0004cce7:00001004cce7_NS 20 +17280 clk cpu0 R X8 0000000000000020 +17281 clk cpu0 IT (17245) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +17281 clk cpu0 R cpsr 820003c5 +17282 clk cpu0 IS (17246) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +17283 clk cpu0 IS (17247) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +17284 clk cpu0 IT (17248) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +17284 clk cpu0 R cpsr 020003c5 +17285 clk cpu0 IT (17249) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +17286 clk cpu0 IT (17250) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17286 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17286 clk cpu0 R X9 0000000013000000 +17287 clk cpu0 IT (17251) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +17287 clk cpu0 R X27 000000000004CCE7 +17288 clk cpu0 IT (17252) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +17288 clk cpu0 R X20 000000000004CCE8 +17289 clk cpu0 IT (17253) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +17289 clk cpu0 MW1 13000000:000013000000_NS 20 +17290 clk cpu0 IT (17254) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +17290 clk cpu0 MR1 0004cce8:00001004cce8_NS 2c +17290 clk cpu0 R X8 000000000000002C +17291 clk cpu0 IT (17255) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +17291 clk cpu0 R cpsr 220003c5 +17292 clk cpu0 IS (17256) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +17293 clk cpu0 IS (17257) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +17294 clk cpu0 IT (17258) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +17294 clk cpu0 R cpsr 420003c5 +17295 clk cpu0 IS (17259) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +17296 clk cpu0 IT (17260) 00092bcc:000010092bcc_NS b948fb08 O EL1h_n : LDR w8,[x24,#0x8f8] +17296 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +17296 clk cpu0 R X8 0000000000000000 +17297 clk cpu0 IT (17261) 00092bd0:000010092bd0_NS f9400280 O EL1h_n : LDR x0,[x20,#0] +17297 clk cpu0 MR8 0004cce8:00001004cce8_NS 6c652072_7575632c +17297 clk cpu0 R X0 6C6520727575632C +17298 clk cpu0 IT (17262) 00092bd4:000010092bd4_NS 7100051f O EL1h_n : CMP w8,#1 +17298 clk cpu0 R cpsr 820003c5 +17299 clk cpu0 IT (17263) 00092bd8:000010092bd8_NS 54000041 O EL1h_n : B.NE 0x92be0 +17300 clk cpu0 IT (17264) 00092be0:000010092be0_NS 2a1f03fb O EL1h_n : MOV w27,wzr +17300 clk cpu0 R X27 0000000000000000 +17301 clk cpu0 IT (17265) 00092be4:000010092be4_NS aa1403fc O EL1h_n : MOV x28,x20 +17301 clk cpu0 R X28 000000000004CCE8 +17302 clk cpu0 IT (17266) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +17302 clk cpu0 R X8 00000000FFFFFFF8 +17303 clk cpu0 IT (17267) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17303 clk cpu0 R cpsr 020003c5 +17303 clk cpu0 R X9 000000000000002C +17304 clk cpu0 IS (17268) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17305 clk cpu0 IT (17269) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17305 clk cpu0 R cpsr 220003c5 +17306 clk cpu0 IS (17270) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17307 clk cpu0 IT (17271) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17307 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17307 clk cpu0 R X9 0000000013000000 +17308 clk cpu0 IT (17272) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17308 clk cpu0 R cpsr 820003c5 +17308 clk cpu0 R X8 00000000FFFFFFF9 +17309 clk cpu0 IT (17273) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17309 clk cpu0 MW1 13000000:000013000000_NS 2c +17310 clk cpu0 IT (17274) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17310 clk cpu0 R X0 006C652072757563 +17311 clk cpu0 IT (17275) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17312 clk cpu0 IT (17276) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17312 clk cpu0 R cpsr 020003c5 +17312 clk cpu0 R X9 0000000000000063 +17313 clk cpu0 IS (17277) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17314 clk cpu0 IT (17278) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17314 clk cpu0 R cpsr 220003c5 +17315 clk cpu0 IS (17279) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17316 clk cpu0 IT (17280) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17316 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17316 clk cpu0 R X9 0000000013000000 +17317 clk cpu0 IT (17281) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17317 clk cpu0 R cpsr 820003c5 +17317 clk cpu0 R X8 00000000FFFFFFFA +17318 clk cpu0 IT (17282) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17318 clk cpu0 MW1 13000000:000013000000_NS 63 +17319 clk cpu0 IT (17283) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17319 clk cpu0 R X0 00006C6520727575 +17320 clk cpu0 IT (17284) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17321 clk cpu0 IT (17285) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17321 clk cpu0 R cpsr 020003c5 +17321 clk cpu0 R X9 0000000000000075 +17322 clk cpu0 IS (17286) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17323 clk cpu0 IT (17287) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17323 clk cpu0 R cpsr 220003c5 +17324 clk cpu0 IS (17288) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17325 clk cpu0 IT (17289) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17325 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17325 clk cpu0 R X9 0000000013000000 +17326 clk cpu0 IT (17290) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17326 clk cpu0 R cpsr 820003c5 +17326 clk cpu0 R X8 00000000FFFFFFFB +17327 clk cpu0 IT (17291) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17327 clk cpu0 MW1 13000000:000013000000_NS 75 +17328 clk cpu0 IT (17292) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17328 clk cpu0 R X0 0000006C65207275 +17329 clk cpu0 IT (17293) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17330 clk cpu0 IT (17294) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17330 clk cpu0 R cpsr 020003c5 +17330 clk cpu0 R X9 0000000000000075 +17331 clk cpu0 IS (17295) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17332 clk cpu0 IT (17296) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17332 clk cpu0 R cpsr 220003c5 +17333 clk cpu0 IS (17297) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17334 clk cpu0 IT (17298) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17334 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17334 clk cpu0 R X9 0000000013000000 +17335 clk cpu0 IT (17299) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17335 clk cpu0 R cpsr 820003c5 +17335 clk cpu0 R X8 00000000FFFFFFFC +17336 clk cpu0 IT (17300) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17336 clk cpu0 MW1 13000000:000013000000_NS 75 +17337 clk cpu0 IT (17301) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17337 clk cpu0 R X0 000000006C652072 +17338 clk cpu0 IT (17302) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17339 clk cpu0 IT (17303) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17339 clk cpu0 R cpsr 020003c5 +17339 clk cpu0 R X9 0000000000000072 +17340 clk cpu0 IS (17304) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17341 clk cpu0 IT (17305) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17341 clk cpu0 R cpsr 220003c5 +17342 clk cpu0 IS (17306) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17343 clk cpu0 IT (17307) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17343 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17343 clk cpu0 R X9 0000000013000000 +17344 clk cpu0 IT (17308) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17344 clk cpu0 R cpsr 820003c5 +17344 clk cpu0 R X8 00000000FFFFFFFD +17345 clk cpu0 IT (17309) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17345 clk cpu0 MW1 13000000:000013000000_NS 72 +17346 clk cpu0 IT (17310) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17346 clk cpu0 R X0 00000000006C6520 +17347 clk cpu0 IT (17311) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17348 clk cpu0 IT (17312) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17348 clk cpu0 R cpsr 020003c5 +17348 clk cpu0 R X9 0000000000000020 +17349 clk cpu0 IS (17313) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17350 clk cpu0 IT (17314) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17350 clk cpu0 R cpsr 820003c5 +17351 clk cpu0 IS (17315) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17352 clk cpu0 IT (17316) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17352 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17352 clk cpu0 R X9 0000000013000000 +17353 clk cpu0 IT (17317) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17353 clk cpu0 R cpsr 820003c5 +17353 clk cpu0 R X8 00000000FFFFFFFE +17354 clk cpu0 IT (17318) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17354 clk cpu0 MW1 13000000:000013000000_NS 20 +17355 clk cpu0 IT (17319) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17355 clk cpu0 R X0 0000000000006C65 +17356 clk cpu0 IT (17320) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17357 clk cpu0 IT (17321) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17357 clk cpu0 R cpsr 020003c5 +17357 clk cpu0 R X9 0000000000000065 +17358 clk cpu0 IS (17322) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17359 clk cpu0 IT (17323) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17359 clk cpu0 R cpsr 220003c5 +17360 clk cpu0 IS (17324) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17361 clk cpu0 IT (17325) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17361 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17361 clk cpu0 R X9 0000000013000000 +17362 clk cpu0 IT (17326) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17362 clk cpu0 R cpsr 820003c5 +17362 clk cpu0 R X8 00000000FFFFFFFF +17363 clk cpu0 IT (17327) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17363 clk cpu0 MW1 13000000:000013000000_NS 65 +17364 clk cpu0 IT (17328) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17364 clk cpu0 R X0 000000000000006C +17365 clk cpu0 IT (17329) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17366 clk cpu0 IT (17330) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17366 clk cpu0 R cpsr 020003c5 +17366 clk cpu0 R X9 000000000000006C +17367 clk cpu0 IS (17331) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17368 clk cpu0 IT (17332) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17368 clk cpu0 R cpsr 220003c5 +17369 clk cpu0 IS (17333) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17370 clk cpu0 IT (17334) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17370 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17370 clk cpu0 R X9 0000000013000000 +17371 clk cpu0 IT (17335) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17371 clk cpu0 R cpsr 620003c5 +17371 clk cpu0 R X8 0000000000000000 +17372 clk cpu0 IT (17336) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17372 clk cpu0 MW1 13000000:000013000000_NS 6c +17373 clk cpu0 IT (17337) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17373 clk cpu0 R X0 0000000000000000 +17374 clk cpu0 IS (17338) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17375 clk cpu0 IT (17339) 00092c10:000010092c10_NS f8408f80 O EL1h_n : LDR x0,[x28,#8]! +17375 clk cpu0 MR8 0004ccf0:00001004ccf0_NS 740a000a_78253d20 +17375 clk cpu0 R X0 740A000A78253D20 +17375 clk cpu0 R X28 000000000004CCF0 +17376 clk cpu0 IT (17340) 00092c14:000010092c14_NS b948fb09 O EL1h_n : LDR w9,[x24,#0x8f8] +17376 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +17376 clk cpu0 R X9 0000000000000000 +17377 clk cpu0 IT (17341) 00092c18:000010092c18_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +17377 clk cpu0 R X8 0000000000000000 +17378 clk cpu0 IT (17342) 00092c1c:000010092c1c_NS 1100211b O EL1h_n : ADD w27,w8,#8 +17378 clk cpu0 R X27 0000000000000008 +17379 clk cpu0 IT (17343) 00092c20:000010092c20_NS 7100053f O EL1h_n : CMP w9,#1 +17379 clk cpu0 R cpsr 820003c5 +17380 clk cpu0 IT (17344) 00092c24:000010092c24_NS 54fffe21 O EL1h_n : B.NE 0x92be8 +17381 clk cpu0 IT (17345) 00092be8:000010092be8_NS 128000e8 O EL1h_n : MOV w8,#0xfffffff8 +17381 clk cpu0 R X8 00000000FFFFFFF8 +17382 clk cpu0 IT (17346) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17382 clk cpu0 R cpsr 020003c5 +17382 clk cpu0 R X9 0000000000000020 +17383 clk cpu0 IS (17347) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17384 clk cpu0 IT (17348) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17384 clk cpu0 R cpsr 820003c5 +17385 clk cpu0 IS (17349) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17386 clk cpu0 IT (17350) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17386 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17386 clk cpu0 R X9 0000000013000000 +17387 clk cpu0 IT (17351) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17387 clk cpu0 R cpsr 820003c5 +17387 clk cpu0 R X8 00000000FFFFFFF9 +17388 clk cpu0 IT (17352) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17388 clk cpu0 MW1 13000000:000013000000_NS 20 +17389 clk cpu0 IT (17353) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17389 clk cpu0 R X0 00740A000A78253D +17390 clk cpu0 IT (17354) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17391 clk cpu0 IT (17355) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17391 clk cpu0 R cpsr 020003c5 +17391 clk cpu0 R X9 000000000000003D +17392 clk cpu0 IS (17356) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17393 clk cpu0 IT (17357) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17393 clk cpu0 R cpsr 220003c5 +17394 clk cpu0 IS (17358) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17395 clk cpu0 IT (17359) 00092bfc:000010092bfc_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17395 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17395 clk cpu0 R X9 0000000013000000 +17396 clk cpu0 IT (17360) 00092c00:000010092c00_NS 31000508 O EL1h_n : ADDS w8,w8,#1 +17396 clk cpu0 R cpsr 820003c5 +17396 clk cpu0 R X8 00000000FFFFFFFA +17397 clk cpu0 IT (17361) 00092c04:000010092c04_NS 39000120 O EL1h_n : STRB w0,[x9,#0] +17397 clk cpu0 MW1 13000000:000013000000_NS 3d +17398 clk cpu0 IT (17362) 00092c08:000010092c08_NS d348fc00 O EL1h_n : LSR x0,x0,#8 +17398 clk cpu0 R X0 0000740A000A7825 +17399 clk cpu0 IT (17363) 00092c0c:000010092c0c_NS 54ffff03 O EL1h_n : B.CC 0x92bec +17400 clk cpu0 IT (17364) 00092bec:000010092bec_NS 72001c09 O EL1h_n : ANDS w9,w0,#0xff +17400 clk cpu0 R cpsr 020003c5 +17400 clk cpu0 R X9 0000000000000025 +17401 clk cpu0 IS (17365) 00092bf0:000010092bf0_NS 54000520 O EL1h_n : B.EQ 0x92c94 +17402 clk cpu0 IT (17366) 00092bf4:000010092bf4_NS 7100953f O EL1h_n : CMP w9,#0x25 +17402 clk cpu0 R cpsr 620003c5 +17403 clk cpu0 IT (17367) 00092bf8:000010092bf8_NS 540004e0 O EL1h_n : B.EQ 0x92c94 +17404 clk cpu0 IT (17368) 00092c94:000010092c94_NS 0b080368 O EL1h_n : ADD w8,w27,w8 +17404 clk cpu0 R X8 0000000000000002 +17405 clk cpu0 IT (17369) 00092c98:000010092c98_NS 11001d09 O EL1h_n : ADD w9,w8,#7 +17405 clk cpu0 R X9 0000000000000009 +17406 clk cpu0 IT (17370) 00092c9c:000010092c9c_NS 8b090289 O EL1h_n : ADD x9,x20,x9 +17406 clk cpu0 R X9 000000000004CCF1 +17407 clk cpu0 IT (17371) 00092ca0:000010092ca0_NS 3100211f O EL1h_n : CMN w8,#8 +17407 clk cpu0 R cpsr 020003c5 +17408 clk cpu0 IT (17372) 00092ca4:000010092ca4_NS 9a89029b O EL1h_n : CSEL x27,x20,x9,EQ +17408 clk cpu0 R X27 000000000004CCF1 +17409 clk cpu0 IT (17373) 00092ca8:000010092ca8_NS 91000774 O EL1h_n : ADD x20,x27,#1 +17409 clk cpu0 R X20 000000000004CCF2 +17410 clk cpu0 IT (17374) 00092cac:000010092cac_NS 17ffffc2 O EL1h_n : B 0x92bb4 +17411 clk cpu0 IT (17375) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +17411 clk cpu0 MR1 0004ccf2:00001004ccf2_NS 25 +17411 clk cpu0 R X8 0000000000000025 +17412 clk cpu0 IT (17376) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +17412 clk cpu0 R cpsr 620003c5 +17413 clk cpu0 IT (17377) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +17414 clk cpu0 IT (17378) 00092c30:000010092c30_NS b90736bf O EL1h_n : STR wzr,[x21,#0x734] +17414 clk cpu0 MW4 03029734:000000829734_NS 00000000 +17415 clk cpu0 IT (17379) 00092c34:000010092c34_NS aa1403fb O EL1h_n : MOV x27,x20 +17415 clk cpu0 R X27 000000000004CCF2 +17416 clk cpu0 IT (17380) 00092c38:000010092c38_NS 38401f7c O EL1h_n : LDRB w28,[x27,#1]! +17416 clk cpu0 MR1 0004ccf3:00001004ccf3_NS 78 +17416 clk cpu0 R X27 000000000004CCF3 +17416 clk cpu0 R X28 0000000000000078 +17417 clk cpu0 IT (17381) 00092c3c:000010092c3c_NS 7100c39f O EL1h_n : CMP w28,#0x30 +17417 clk cpu0 R cpsr 220003c5 +17418 clk cpu0 IS (17382) 00092c40:000010092c40_NS 54000060 O EL1h_n : B.EQ 0x92c4c +17419 clk cpu0 IT (17383) 00092c44:000010092c44_NS 3500041c O EL1h_n : CBNZ w28,0x92cc4 +17420 clk cpu0 IT (17384) 00092cc4:000010092cc4_NS 51016388 O EL1h_n : SUB w8,w28,#0x58 +17420 clk cpu0 R X8 0000000000000020 +17421 clk cpu0 IT (17385) 00092cc8:000010092cc8_NS 7100811f O EL1h_n : CMP w8,#0x20 +17421 clk cpu0 R cpsr 620003c5 +17422 clk cpu0 IS (17386) 00092ccc:000010092ccc_NS 54000b48 O EL1h_n : B.HI 0x92e34 +17423 clk cpu0 IT (17387) 00092cd0:000010092cd0_NS 10000089 O EL1h_n : ADR x9,0x92ce0 +17423 clk cpu0 R X9 0000000000092CE0 +17424 clk cpu0 IT (17388) 00092cd4:000010092cd4_NS 38686aca O EL1h_n : LDRB w10,[x22,x8] +17424 clk cpu0 MR1 0004c128:00001004c128_NS 00 +17424 clk cpu0 R X10 0000000000000000 +17425 clk cpu0 IT (17389) 00092cd8:000010092cd8_NS 8b0a0929 O EL1h_n : ADD x9,x9,x10,LSL #2 +17425 clk cpu0 R X9 0000000000092CE0 +17426 clk cpu0 IT (17390) 00092cdc:000010092cdc_NS d61f0120 O EL1h_n : BR x9 +17426 clk cpu0 R cpsr 620007c5 +17427 clk cpu0 IT (17391) 00092ce0:000010092ce0_NS b9801a68 O EL1h_n : LDRSW x8,[x19,#0x18] +17427 clk cpu0 MR4 03700548:000000f00548_NS ffffffd8 +17427 clk cpu0 R cpsr 620003c5 +17427 clk cpu0 R X8 FFFFFFFFFFFFFFD8 +17428 clk cpu0 IS (17392) 00092ce4:000010092ce4_NS 36f800a8 O EL1h_n : TBZ w8,#31,0x92cf8 +17429 clk cpu0 IT (17393) 00092ce8:000010092ce8_NS 11002109 O EL1h_n : ADD w9,w8,#8 +17429 clk cpu0 R X9 00000000FFFFFFE0 +17430 clk cpu0 IT (17394) 00092cec:000010092cec_NS 7100013f O EL1h_n : CMP w9,#0 +17430 clk cpu0 R cpsr a20003c5 +17431 clk cpu0 IT (17395) 00092cf0:000010092cf0_NS b9001a69 O EL1h_n : STR w9,[x19,#0x18] +17431 clk cpu0 MW4 03700548:000000f00548_NS ffffffe0 +17432 clk cpu0 IT (17396) 00092cf4:000010092cf4_NS 54000cad O EL1h_n : B.LE 0x92e88 +17433 clk cpu0 IT (17397) 00092e88:000010092e88_NS f9400669 O EL1h_n : LDR x9,[x19,#8] +17433 clk cpu0 MR8 03700538:000000f00538_NS 00000000_03700530 +17433 clk cpu0 R X9 0000000003700530 +17434 clk cpu0 IT (17398) 00092e8c:000010092e8c_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +17434 clk cpu0 R X8 0000000003700508 +17435 clk cpu0 IT (17399) 00092e90:000010092e90_NS 17ffff9d O EL1h_n : B 0x92d04 +17436 clk cpu0 IT (17400) 00092d04:000010092d04_NS f9400100 O EL1h_n : LDR x0,[x8,#0] +17436 clk cpu0 MR8 03700508:000000f00508_NS 00000000_00000000 +17436 clk cpu0 R X0 0000000000000000 +17437 clk cpu0 IT (17401) 00092d08:000010092d08_NS 52800201 O EL1h_n : MOV w1,#0x10 +17437 clk cpu0 R X1 0000000000000010 +17438 clk cpu0 IT (17402) 00092d0c:000010092d0c_NS 94000a58 O EL1h_n : BL 0x9566c +17438 clk cpu0 R X30 0000000000092D10 +17439 clk cpu0 IT (17403) 0009566c:00001009566c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +17439 clk cpu0 R SP_EL1 0000000003700440 +17440 clk cpu0 IT (17404) 00095670:000010095670_NS b204c7e8 O EL1h_n : ORR x8,xzr,#0x3030303030303030 +17440 clk cpu0 R X8 3030303030303030 +17441 clk cpu0 IT (17405) 00095674:000010095674_NS a900a3e8 O EL1h_n : STP x8,x8,[sp,#8] +17441 clk cpu0 MW8 03700448:000000f00448_NS 30303030_30303030 +17441 clk cpu0 MW8 03700450:000000f00450_NS 30303030_30303030 +17442 clk cpu0 IT (17406) 00095678:000010095678_NS b9001be8 O EL1h_n : STR w8,[sp,#0x18] +17442 clk cpu0 MW4 03700458:000000f00458_NS 30303030 +17443 clk cpu0 IT (17407) 0009567c:00001009567c_NS b4000220 O EL1h_n : CBZ x0,0x956c0 +17444 clk cpu0 IT (17408) 000956c0:0000100956c0_NS 2a1f03eb O EL1h_n : MOV w11,wzr +17444 clk cpu0 R X11 0000000000000000 +17445 clk cpu0 IT (17409) 000956c4:0000100956c4_NS 90017ca8 O EL1h_n : ADRP x8,0x30296c4 +17445 clk cpu0 R X8 0000000003029000 +17446 clk cpu0 IT (17410) 000956c8:0000100956c8_NS b9473508 O EL1h_n : LDR w8,[x8,#0x734] +17446 clk cpu0 MR4 03029734:000000829734_NS 00000000 +17446 clk cpu0 R X8 0000000000000000 +17447 clk cpu0 IT (17411) 000956cc:0000100956cc_NS 6b0b011f O EL1h_n : CMP w8,w11 +17447 clk cpu0 R cpsr 620003c5 +17448 clk cpu0 IT (17412) 000956d0:0000100956d0_NS 1a8bc108 O EL1h_n : CSEL w8,w8,w11,GT +17448 clk cpu0 R X8 0000000000000000 +17449 clk cpu0 IT (17413) 000956d4:0000100956d4_NS 7100051f O EL1h_n : CMP w8,#1 +17449 clk cpu0 R cpsr 820003c5 +17450 clk cpu0 IT (17414) 000956d8:0000100956d8_NS 540001ab O EL1h_n : B.LT 0x9570c +17451 clk cpu0 IT (17415) 0009570c:00001009570c_NS 910023e9 O EL1h_n : ADD x9,sp,#8 +17451 clk cpu0 R X9 0000000003700448 +17452 clk cpu0 IT (17416) 00095710:000010095710_NS b0030c0a O EL1h_n : ADRP x10,0x6216710 +17452 clk cpu0 R X10 0000000006216000 +17453 clk cpu0 IT (17417) 00095714:000010095714_NS 38684928 O EL1h_n : LDRB w8,[x9,w8,UXTW] +17453 clk cpu0 MR1 03700448:000000f00448_NS 30 +17453 clk cpu0 R X8 0000000000000030 +17454 clk cpu0 IT (17418) 00095718:000010095718_NS f9407149 O EL1h_n : LDR x9,[x10,#0xe0] +17454 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17454 clk cpu0 R X9 0000000013000000 +17455 clk cpu0 IT (17419) 0009571c:00001009571c_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +17455 clk cpu0 MW1 13000000:000013000000_NS 30 +17456 clk cpu0 IT (17420) 00095720:000010095720_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +17456 clk cpu0 R SP_EL1 0000000003700460 +17457 clk cpu0 IT (17421) 00095724:000010095724_NS d65f03c0 O EL1h_n : RET +17458 clk cpu0 IT (17422) 00092d10:000010092d10_NS 91000774 O EL1h_n : ADD x20,x27,#1 +17458 clk cpu0 R X20 000000000004CCF4 +17459 clk cpu0 IT (17423) 00092d14:000010092d14_NS 17ffffa8 O EL1h_n : B 0x92bb4 +17460 clk cpu0 IT (17424) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +17460 clk cpu0 MR1 0004ccf4:00001004ccf4_NS 0a +17460 clk cpu0 R X8 000000000000000A +17461 clk cpu0 IT (17425) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +17461 clk cpu0 R cpsr 820003c5 +17462 clk cpu0 IS (17426) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +17463 clk cpu0 IS (17427) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +17464 clk cpu0 IT (17428) 00092bc4:000010092bc4_NS f2400a9f O EL1h_n : TST x20,#7 +17464 clk cpu0 R cpsr 020003c5 +17465 clk cpu0 IT (17429) 00092bc8:000010092bc8_NS 54fffee1 O EL1h_n : B.NE 0x92ba4 +17466 clk cpu0 IT (17430) 00092ba4:000010092ba4_NS f9407329 O EL1h_n : LDR x9,[x25,#0xe0] +17466 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +17466 clk cpu0 R X9 0000000013000000 +17467 clk cpu0 IT (17431) 00092ba8:000010092ba8_NS aa1403fb O EL1h_n : MOV x27,x20 +17467 clk cpu0 R X27 000000000004CCF4 +17468 clk cpu0 IT (17432) 00092bac:000010092bac_NS 91000694 O EL1h_n : ADD x20,x20,#1 +17468 clk cpu0 R X20 000000000004CCF5 +TUBE CPU0: Enable tracetrace.el info =30001 ,cuur el =0 +17469 clk cpu0 IT (17433) 00092bb0:000010092bb0_NS 39000128 O EL1h_n : STRB w8,[x9,#0] +17469 clk cpu0 MW1 13000000:000013000000_NS 0a +17470 clk cpu0 IT (17434) 00092bb4:000010092bb4_NS 39400288 O EL1h_n : LDRB w8,[x20,#0] +17470 clk cpu0 MR1 0004ccf5:00001004ccf5_NS 00 +17470 clk cpu0 R X8 0000000000000000 +17471 clk cpu0 IT (17435) 00092bb8:000010092bb8_NS 7100951f O EL1h_n : CMP w8,#0x25 +17471 clk cpu0 R cpsr 820003c5 +17472 clk cpu0 IS (17436) 00092bbc:000010092bbc_NS 540003a0 O EL1h_n : B.EQ 0x92c30 +17473 clk cpu0 IT (17437) 00092bc0:000010092bc0_NS 34001ec8 O EL1h_n : CBZ w8,0x92f98 +17474 clk cpu0 IT (17438) 00092f98:000010092f98_NS d5033f9f O EL1h_n : DSB SY +17475 clk cpu0 IT (17439) 00092f9c:000010092f9c_NS a9497bf3 O EL1h_n : LDP x19,x30,[sp,#0x90] +17475 clk cpu0 MR8 037004f0:000000f004f0_NS 00000000_0004ccc9 +17475 clk cpu0 MR8 037004f8:000000f004f8_NS 00000000_0009c560 +17475 clk cpu0 R X19 000000000004CCC9 +17475 clk cpu0 R X30 000000000009C560 +17476 clk cpu0 IT (17440) 00092fa0:000010092fa0_NS a94853f5 O EL1h_n : LDP x21,x20,[sp,#0x80] +17476 clk cpu0 MR8 037004e0:000000f004e0_NS 00000000_00000000 +17476 clk cpu0 MR8 037004e8:000000f004e8_NS 00000000_03008528 +17476 clk cpu0 R X20 0000000003008528 +17476 clk cpu0 R X21 0000000000000000 +17477 clk cpu0 IT (17441) 00092fa4:000010092fa4_NS a9475bf7 O EL1h_n : LDP x23,x22,[sp,#0x70] +17477 clk cpu0 MR8 037004d0:000000f004d0_NS 00000000_00000000 +17477 clk cpu0 MR8 037004d8:000000f004d8_NS 00000000_90000000 +17477 clk cpu0 R X22 0000000090000000 +17477 clk cpu0 R X23 0000000000000000 +17478 clk cpu0 IT (17442) 00092fa8:000010092fa8_NS a94663f9 O EL1h_n : LDP x25,x24,[sp,#0x60] +17478 clk cpu0 MR8 037004c0:000000f004c0_NS 00000000_0000003c +17478 clk cpu0 MR8 037004c8:000000f004c8_NS 00000000_00007c00 +17478 clk cpu0 R X24 0000000000007C00 +17478 clk cpu0 R X25 000000000000003C +17479 clk cpu0 IT (17443) 00092fac:000010092fac_NS a9456bfb O EL1h_n : LDP x27,x26,[sp,#0x50] +17479 clk cpu0 MR8 037004b0:000000f004b0_NS 00010001_00010001 +17479 clk cpu0 MR8 037004b8:000000f004b8_NS ffe000ff_ffe000ff +17479 clk cpu0 R X26 FFE000FFFFE000FF +17479 clk cpu0 R X27 0001000100010001 +17480 clk cpu0 IT (17444) 00092fb0:000010092fb0_NS f94023fc O EL1h_n : LDR x28,[sp,#0x40] +17480 clk cpu0 MR8 037004a0:000000f004a0_NS ff7fff7f_ff7fff7f +17480 clk cpu0 R X28 FF7FFF7FFF7FFF7F +17481 clk cpu0 IT (17445) 00092fb4:000010092fb4_NS 910283ff O EL1h_n : ADD sp,sp,#0xa0 +17481 clk cpu0 R SP_EL1 0000000003700500 +17482 clk cpu0 IT (17446) 00092fb8:000010092fb8_NS d65f03c0 O EL1h_n : RET +17483 clk cpu0 IT (17447) 0009c560:00001009c560_NS 52800020 O EL1h_n : MOV w0,#1 +17483 clk cpu0 R X0 0000000000000001 +17484 clk cpu0 IT (17448) 0009c564:00001009c564_NS 2a1503e1 O EL1h_n : MOV w1,w21 +17484 clk cpu0 R X1 0000000000000000 +17485 clk cpu0 IT (17449) 0009c568:00001009c568_NS 2a1f03e2 O EL1h_n : MOV w2,wzr +17485 clk cpu0 R X2 0000000000000000 +17486 clk cpu0 IT (17450) 0009c56c:00001009c56c_NS d503201f O EL1h_n : NOP +17487 clk cpu0 IT (17451) 0009c570:00001009c570_NS d5033f9f O EL1h_n : DSB SY +17488 clk cpu0 IT (17452) 0009c574:00001009c574_NS aa1403e0 O EL1h_n : MOV x0,x20 +17488 clk cpu0 R X0 0000000003008528 +17489 clk cpu0 IT (17453) 0009c578:00001009c578_NS 97fffd30 O EL1h_n : BL 0x9ba38 +17489 clk cpu0 R X30 000000000009C57C +17490 clk cpu0 IT (17454) 0009ba38:00001009ba38_NS d5033fbf O EL1h_n : DMB SY +17491 clk cpu0 IT (17455) 0009ba3c:00001009ba3c_NS f0030bc8 O EL1h_n : ADRP x8,0x6216a3c +17491 clk cpu0 R X8 0000000006216000 +17492 clk cpu0 IT (17456) 0009ba40:00001009ba40_NS b9404d08 O EL1h_n : LDR w8,[x8,#0x4c] +17492 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +17492 clk cpu0 R X8 0000000000000001 +17493 clk cpu0 IT (17457) 0009ba44:00001009ba44_NS 7100091f O EL1h_n : CMP w8,#2 +17493 clk cpu0 R cpsr 820003c5 +17494 clk cpu0 IT (17458) 0009ba48:00001009ba48_NS 54000083 O EL1h_n : B.CC 0x9ba58 +17495 clk cpu0 IT (17459) 0009ba58:00001009ba58_NS d65f03c0 O EL1h_n : RET +17496 clk cpu0 IT (17460) 0009c57c:00001009c57c_NS a9487bf3 O EL1h_n : LDP x19,x30,[sp,#0x80] +17496 clk cpu0 MR8 03700580:000000f00580_NS 00000000_062160a2 +17496 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00011490 +17496 clk cpu0 R X19 00000000062160A2 +17496 clk cpu0 R X30 0000000000011490 +17497 clk cpu0 IT (17461) 0009c580:00001009c580_NS a94753f5 O EL1h_n : LDP x21,x20,[sp,#0x70] +17497 clk cpu0 MR8 03700570:000000f00570_NS 00000000_02f00028 +17497 clk cpu0 MR8 03700578:000000f00578_NS ff83ff83_ff83ff83 +17497 clk cpu0 R X20 FF83FF83FF83FF83 +17497 clk cpu0 R X21 0000000002F00028 +17498 clk cpu0 IT (17462) 0009c584:00001009c584_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +17498 clk cpu0 R SP_EL1 0000000003700590 +17499 clk cpu0 IT (17463) 0009c588:00001009c588_NS d65f03c0 O EL1h_n : RET +17500 clk cpu0 IT (17464) 00011490:000010011490_NS b94047e8 O EL1h_n : LDR w8,[sp,#0x44] +17500 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +17500 clk cpu0 R X8 0000000000030001 +17501 clk cpu0 IT (17465) 00011494:000010011494_NS b9400fe9 O EL1h_n : LDR w9,[sp,#0xc] +17501 clk cpu0 MR4 0370059c:000000f0059c_NS 00000f00 +17501 clk cpu0 R X9 0000000000000F00 +17502 clk cpu0 IT (17466) 00011498:000010011498_NS 0a090108 O EL1h_n : AND w8,w8,w9 +17502 clk cpu0 R X8 0000000000000000 +17503 clk cpu0 IT (17467) 0001149c:00001001149c_NS b9400bea O EL1h_n : LDR w10,[sp,#8] +17503 clk cpu0 MR4 03700598:000000f00598_NS 00000008 +17503 clk cpu0 R X10 0000000000000008 +17504 clk cpu0 IT (17468) 000114a0:0000100114a0_NS 1aca2508 O EL1h_n : LSR w8,w8,w10 +17504 clk cpu0 R X8 0000000000000000 +17505 clk cpu0 IT (17469) 000114a4:0000100114a4_NS b9401beb O EL1h_n : LDR w11,[sp,#0x18] +17505 clk cpu0 MR4 037005a8:000000f005a8_NS 00000001 +17505 clk cpu0 R X11 0000000000000001 +17506 clk cpu0 IT (17470) 000114a8:0000100114a8_NS 0a280168 O EL1h_n : BIC w8,w11,w8 +17506 clk cpu0 R X8 0000000000000001 +17507 clk cpu0 IT (17471) 000114ac:0000100114ac_NS 2a0803f2 O EL1h_n : MOV w18,w8 +17507 clk cpu0 R X18 0000000000000001 +17508 clk cpu0 IT (17472) 000114b0:0000100114b0_NS d3407e52 O EL1h_n : UBFX x18,x18,#0,#32 +17508 clk cpu0 R X18 0000000000000001 +17509 clk cpu0 IT (17473) 000114b4:0000100114b4_NS f90033f2 O EL1h_n : STR x18,[sp,#0x60] +17509 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +17510 clk cpu0 IT (17474) 000114b8:0000100114b8_NS f94033f2 O EL1h_n : LDR x18,[sp,#0x60] +17510 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17510 clk cpu0 R X18 0000000000000001 +17511 clk cpu0 IT (17475) 000114bc:0000100114bc_NS f9002ff2 O EL1h_n : STR x18,[sp,#0x58] +17511 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00000001 +17512 clk cpu0 IT (17476) 000114c0:0000100114c0_NS b9407be8 O EL1h_n : LDR w8,[sp,#0x78] +17512 clk cpu0 MR4 03700608:000000f00608_NS 00000001 +17512 clk cpu0 R X8 0000000000000001 +17513 clk cpu0 IT (17477) 000114c4:0000100114c4_NS 35000048 O EL1h_n : CBNZ w8,0x114cc +17514 clk cpu0 IT (17478) 000114cc:0000100114cc_NS f94037e8 O EL1h_n : LDR x8,[sp,#0x68] +17514 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +17514 clk cpu0 R X8 0000000000000000 +17515 clk cpu0 IT (17479) 000114d0:0000100114d0_NS f100091f O EL1h_n : CMP x8,#2 +17515 clk cpu0 R cpsr 820003c5 +17516 clk cpu0 IT (17480) 000114d4:0000100114d4_NS 1a9f17e9 O EL1h_n : CSET w9,EQ +17516 clk cpu0 R X9 0000000000000000 +17517 clk cpu0 IS (17481) 000114d8:0000100114d8_NS 37000049 O EL1h_n : TBNZ w9,#0,0x114e0 +17518 clk cpu0 IT (17482) 000114dc:0000100114dc_NS 14000003 O EL1h_n : B 0x114e8 +17519 clk cpu0 IT (17483) 000114e8:0000100114e8_NS d2800068 O EL1h_n : MOV x8,#3 +17519 clk cpu0 R X8 0000000000000003 +17520 clk cpu0 IT (17484) 000114ec:0000100114ec_NS f9002be8 O EL1h_n : STR x8,[sp,#0x50] +17520 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000003 +17521 clk cpu0 IT (17485) 000114f0:0000100114f0_NS b9407fe8 O EL1h_n : LDR w8,[sp,#0x7c] +17521 clk cpu0 MR4 0370060c:000000f0060c_NS 00000001 +17521 clk cpu0 R X8 0000000000000001 +17522 clk cpu0 IT (17486) 000114f4:0000100114f4_NS 35000048 O EL1h_n : CBNZ w8,0x114fc +17523 clk cpu0 IT (17487) 000114fc:0000100114fc_NS f94033e8 O EL1h_n : LDR x8,[sp,#0x60] +17523 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17523 clk cpu0 R X8 0000000000000001 +17524 clk cpu0 IT (17488) 00011500:000010011500_NS b5000088 O EL1h_n : CBNZ x8,0x11510 +17525 clk cpu0 IT (17489) 00011510:000010011510_NS d2800068 O EL1h_n : MOV x8,#3 +17525 clk cpu0 R X8 0000000000000003 +17526 clk cpu0 IT (17490) 00011514:000010011514_NS f90027e8 O EL1h_n : STR x8,[sp,#0x48] +17526 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00000003 +17527 clk cpu0 IT (17491) 00011518:000010011518_NS b94077e8 O EL1h_n : LDR w8,[sp,#0x74] +17527 clk cpu0 MR4 03700604:000000f00604_NS 00000000 +17527 clk cpu0 R X8 0000000000000000 +17528 clk cpu0 IT (17492) 0001151c:00001001151c_NS f94033e9 O EL1h_n : LDR x9,[sp,#0x60] +17528 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17528 clk cpu0 R X9 0000000000000001 +17529 clk cpu0 IT (17493) 00011520:000010011520_NS f100013f O EL1h_n : CMP x9,#0 +17529 clk cpu0 R cpsr 220003c5 +17530 clk cpu0 IT (17494) 00011524:000010011524_NS 1a9f17ea O EL1h_n : CSET w10,EQ +17530 clk cpu0 R X10 0000000000000000 +17531 clk cpu0 IT (17495) 00011528:000010011528_NS 5280002b O EL1h_n : MOV w11,#1 +17531 clk cpu0 R X11 0000000000000001 +17532 clk cpu0 IT (17496) 0001152c:00001001152c_NS 0a0b014a O EL1h_n : AND w10,w10,w11 +17532 clk cpu0 R X10 0000000000000000 +17533 clk cpu0 IT (17497) 00011530:000010011530_NS 0a0a0108 O EL1h_n : AND w8,w8,w10 +17533 clk cpu0 R X8 0000000000000000 +17534 clk cpu0 IS (17498) 00011534:000010011534_NS 35000048 O EL1h_n : CBNZ w8,0x1153c +17535 clk cpu0 IT (17499) 00011538:000010011538_NS 14000004 O EL1h_n : B 0x11548 +17536 clk cpu0 IT (17500) 00011548:000010011548_NS f94033e8 O EL1h_n : LDR x8,[sp,#0x60] +17536 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17536 clk cpu0 R X8 0000000000000001 +17537 clk cpu0 IT (17501) 0001154c:00001001154c_NS f90003e8 O EL1h_n : STR x8,[sp,#0] +17537 clk cpu0 MW8 03700590:000000f00590_NS 00000000_00000001 +17538 clk cpu0 IT (17502) 00011550:000010011550_NS f94003e8 O EL1h_n : LDR x8,[sp,#0] +17538 clk cpu0 MR8 03700590:000000f00590_NS 00000000_00000001 +17538 clk cpu0 R X8 0000000000000001 +17539 clk cpu0 IT (17503) 00011554:000010011554_NS f90033e8 O EL1h_n : STR x8,[sp,#0x60] +17539 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +17540 clk cpu0 IT (17504) 00011558:000010011558_NS b9407fe9 O EL1h_n : LDR w9,[sp,#0x7c] +17540 clk cpu0 MR4 0370060c:000000f0060c_NS 00000001 +17540 clk cpu0 R X9 0000000000000001 +17541 clk cpu0 IT (17505) 0001155c:00001001155c_NS 35000049 O EL1h_n : CBNZ w9,0x11564 +17542 clk cpu0 IT (17506) 00011564:000010011564_NS f94027e8 O EL1h_n : LDR x8,[sp,#0x48] +17542 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00000003 +17542 clk cpu0 R X8 0000000000000003 +17543 clk cpu0 IT (17507) 00011568:000010011568_NS d2800309 O EL1h_n : MOV x9,#0x18 +17543 clk cpu0 R X9 0000000000000018 +17544 clk cpu0 IT (17508) 0001156c:00001001156c_NS 9ac92100 O EL1h_n : LSL x0,x8,x9 +17544 clk cpu0 R X0 0000000003000000 +17545 clk cpu0 IT (17509) 00011570:000010011570_NS f94037e2 O EL1h_n : LDR x2,[sp,#0x68] +17545 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +17545 clk cpu0 R X2 0000000000000000 +17546 clk cpu0 IT (17510) 00011574:000010011574_NS f94033e3 O EL1h_n : LDR x3,[sp,#0x60] +17546 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17546 clk cpu0 R X3 0000000000000001 +17547 clk cpu0 IT (17511) 00011578:000010011578_NS d2a06001 O EL1h_n : MOV x1,#0x3000000 +17547 clk cpu0 R X1 0000000003000000 +17548 clk cpu0 IT (17512) 0001157c:00001001157c_NS 94025656 O EL1h_n : BL 0xa6ed4 +17548 clk cpu0 R X30 0000000000011580 +17549 clk cpu0 IT (17513) 000a6ed4:0000100a6ed4_NS a9bf27e8 O EL1h_n : STP x8,x9,[sp,#-0x10]! +17549 clk cpu0 MW8 03700580:000000f00580_NS 00000000_00000003 +17549 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00000018 +17549 clk cpu0 R SP_EL1 0000000003700580 +17550 clk cpu0 IT (17514) 000a6ed8:0000100a6ed8_NS aa0103e8 O EL1h_n : MOV x8,x1 +17550 clk cpu0 R X8 0000000003000000 +17551 clk cpu0 IT (17515) 000a6edc:0000100a6edc_NS aa0303e9 O EL1h_n : MOV x9,x3 +17551 clk cpu0 R X9 0000000000000001 +17552 clk cpu0 IT (17516) 000a6ee0:0000100a6ee0_NS f1000c5f O EL1h_n : CMP x2,#3 +17552 clk cpu0 R cpsr 820003c5 +17553 clk cpu0 IT (17517) 000a6ee4:0000100a6ee4_NS 540001eb O EL1h_n : B.LT 0xa6f20 +17554 clk cpu0 IT (17518) 000a6f20:0000100a6f20_NS f100045f O EL1h_n : CMP x2,#1 +17554 clk cpu0 R cpsr 820003c5 +17555 clk cpu0 IT (17519) 000a6f24:0000100a6f24_NS 540000eb O EL1h_n : B.LT 0xa6f40 +17556 clk cpu0 IT (17520) 000a6f40:0000100a6f40_NS aa0003e1 O EL1h_n : MOV x1,x0 +17556 clk cpu0 R X1 0000000003000000 +17557 clk cpu0 IT (17521) 000a6f44:0000100a6f44_NS d28000e0 O EL1h_n : MOV x0,#7 +17557 clk cpu0 R X0 0000000000000007 +17558 clk cpu0 IT (17522) 000a6f48:0000100a6f48_NS 32120000 O EL1h_n : ORR w0,w0,#0x4000 +17558 clk cpu0 R X0 0000000000004007 +17559 clk cpu0 IT (17523) 000a6f4c:0000100a6f4c_NS f2a004c0 O EL1h_n : MOVK x0,#0x26,LSL #16 +17559 clk cpu0 R X0 0000000000264007 +17560 clk cpu0 IT (17524) 000a6f50:0000100a6f50_NS d40000e1 O EL1h_n : SVC #7 +17560 clk cpu0 E 000a6f50:0000100a6f50_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +17560 clk cpu0 R cpsr 820003c5 +17560 clk cpu0 R PMBIDR_EL1 00000030 +17560 clk cpu0 R ESR_EL1 56000007 +17560 clk cpu0 R SPSR_EL1 820003c5 +17560 clk cpu0 R TRBIDR_EL1 000000000000002b +17560 clk cpu0 R ELR_EL1 00000000000a6f54 +17561 clk cpu0 IT (17525) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +17562 clk cpu0 IT (17526) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +17562 clk cpu0 R SP_EL1 0000000003700480 +17563 clk cpu0 IT (17527) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +17563 clk cpu0 MW8 03700480:000000f00480_NS 00000000_00264007 +17563 clk cpu0 MW8 03700488:000000f00488_NS 00000000_03000000 +17564 clk cpu0 IT (17528) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +17564 clk cpu0 R X0 0000000056000007 +17565 clk cpu0 IT (17529) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +17565 clk cpu0 R X1 0000000000000015 +17566 clk cpu0 IT (17530) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +17566 clk cpu0 R cpsr 620003c5 +17567 clk cpu0 IT (17531) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +17568 clk cpu0 IT (17532) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +17568 clk cpu0 R X1 0000000000000007 +17569 clk cpu0 IT (17533) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +17569 clk cpu0 R cpsr 220003c5 +17570 clk cpu0 IS (17534) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +17571 clk cpu0 IT (17535) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +17571 clk cpu0 R cpsr 820003c5 +17572 clk cpu0 IS (17536) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +17573 clk cpu0 IT (17537) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +17573 clk cpu0 R cpsr 820003c5 +17574 clk cpu0 IS (17538) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +17575 clk cpu0 IT (17539) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +17575 clk cpu0 R cpsr 620003c5 +17576 clk cpu0 IT (17540) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +17577 clk cpu0 IT (17541) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +17577 clk cpu0 MR8 03700480:000000f00480_NS 00000000_00264007 +17577 clk cpu0 MR8 03700488:000000f00488_NS 00000000_03000000 +17577 clk cpu0 R X0 0000000000264007 +17577 clk cpu0 R X1 0000000003000000 +17578 clk cpu0 IT (17542) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +17578 clk cpu0 R SP_EL1 0000000003700580 +17579 clk cpu0 IT (17543) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +17579 clk cpu0 R cpsr 220003c5 +17580 clk cpu0 IT (17544) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +17581 clk cpu0 IT (17545) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +17581 clk cpu0 MW8 03700570:000000f00570_NS 00000000_00000000 +17581 clk cpu0 MW8 03700578:000000f00578_NS f800f800_f800f800 +17581 clk cpu0 R SP_EL1 0000000003700570 +17582 clk cpu0 IT (17546) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +17582 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00264007 +17582 clk cpu0 MW8 03700568:000000f00568_NS 00000000_03000000 +17582 clk cpu0 R SP_EL1 0000000003700560 +17583 clk cpu0 IT (17547) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +17583 clk cpu0 R X5 0000000000000000 +17584 clk cpu0 IT (17548) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +17584 clk cpu0 R X1 0000000000000000 +17585 clk cpu0 IT (17549) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +17585 clk cpu0 R cpsr 820003c5 +17586 clk cpu0 IT (17550) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +17586 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00264007 +17586 clk cpu0 MR8 03700568:000000f00568_NS 00000000_03000000 +17586 clk cpu0 R SP_EL1 0000000003700570 +17586 clk cpu0 R X0 0000000000264007 +17586 clk cpu0 R X1 0000000003000000 +17587 clk cpu0 IT (17551) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +17588 clk cpu0 IT (17552) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +17588 clk cpu0 MW8 03700560:000000f00560_NS 00000000_90000000 +17588 clk cpu0 MW8 03700568:000000f00568_NS 03ff8000_03ff8000 +17588 clk cpu0 R SP_EL1 0000000003700560 +17589 clk cpu0 IT (17553) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +17589 clk cpu0 R X6 0000000000000000 +17590 clk cpu0 IT (17554) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +17590 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +17590 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000001 +17590 clk cpu0 R SP_EL1 0000000003700550 +17591 clk cpu0 IT (17555) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +17591 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +17591 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011580 +17591 clk cpu0 R SP_EL1 0000000003700540 +17592 clk cpu0 IT (17556) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +17592 clk cpu0 R X3 0000000000000001 +17593 clk cpu0 IT (17557) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +17593 clk cpu0 R cpsr 620003c5 +17594 clk cpu0 IT (17558) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +17595 clk cpu0 IT (17559) 00035944:000010035944_NS 580557e2 O EL1h_n : LDR x2,0x40440 +17595 clk cpu0 MR8 00040440:000010040440_NS 00000000_00035e90 +17595 clk cpu0 R X2 0000000000035E90 +17596 clk cpu0 IT (17560) 00035948:000010035948_NS 53107c03 O EL1h_n : LSR w3,w0,#16 +17596 clk cpu0 R X3 0000000000000026 +17597 clk cpu0 IT (17561) 0003594c:00001003594c_NS 12003c63 O EL1h_n : AND w3,w3,#0xffff +17597 clk cpu0 R X3 0000000000000026 +17598 clk cpu0 IT (17562) 00035950:000010035950_NS d37df063 O EL1h_n : LSL x3,x3,#3 +17598 clk cpu0 R X3 0000000000000130 +17599 clk cpu0 IT (17563) 00035954:000010035954_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +17599 clk cpu0 R X2 0000000000035FC0 +17600 clk cpu0 IT (17564) 00035958:000010035958_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +17600 clk cpu0 MR8 00035fc0:000010035fc0_NS 00000000_000380c8 +17600 clk cpu0 R X4 00000000000380C8 +17601 clk cpu0 IT (17565) 0003595c:00001003595c_NS d63f0080 O EL1h_n : BLR x4 +17601 clk cpu0 R cpsr 62000bc5 +17601 clk cpu0 R X30 0000000000035960 +17602 clk cpu0 IT (17566) 000380c8:0000100380c8_NS d40000e3 O EL1h_n : SMC #7 +17602 clk cpu0 E 000380c8:0000100380c8_NS EL3h 00000019 CoreEvent_ModeChange +17602 clk cpu0 E 000380c8:0000100380c8_NS 00000088 CoreEvent_LOWER_64_SYNC +17602 clk cpu0 R cpsr 620003cd +17602 clk cpu0 R DBGDSCRext 00020000 +17602 clk cpu0 R PMBIDR_EL1 00000020 +17602 clk cpu0 R ESR_EL3 5e000007 +17602 clk cpu0 R SPSR_EL3 62000bc5 +17602 clk cpu0 R TRBIDR_EL1 000000000000002b +17602 clk cpu0 R ELR_EL3 00000000000380cc +17602 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +17602 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +17603 clk cpu0 IT (17567) 00012400:000010012400 14000c92 O EL3h_s : B 0x15648 +17604 clk cpu0 IT (17568) 00015648:000010015648 d10403ff O EL3h_s : SUB sp,sp,#0x100 +17604 clk cpu0 R SP_EL3 000000000384C400 +17605 clk cpu0 IT (17569) 0001564c:00001001564c a90007e0 O EL3h_s : STP x0,x1,[sp,#0] +17605 clk cpu0 MW8 0384c400:00001084c400_NS 00000000_00264007 +17605 clk cpu0 MW8 0384c408:00001084c408_NS 00000000_03000000 +17606 clk cpu0 IT (17570) 00015650:000010015650 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +17606 clk cpu0 R X0 000000005E000007 +17607 clk cpu0 IT (17571) 00015654:000010015654 531a7c01 O EL3h_s : LSR w1,w0,#26 +17607 clk cpu0 R X1 0000000000000017 +17608 clk cpu0 IT (17572) 00015658:000010015658 7100543f O EL3h_s : CMP w1,#0x15 +17608 clk cpu0 R cpsr 220003cd +17609 clk cpu0 IS (17573) 0001565c:00001001565c 540005e0 O EL3h_s : B.EQ 0x15718 +17610 clk cpu0 IT (17574) 00015660:000010015660 7100583f O EL3h_s : CMP w1,#0x16 +17610 clk cpu0 R cpsr 220003cd +17611 clk cpu0 IS (17575) 00015664:000010015664 54000360 O EL3h_s : B.EQ 0x156d0 +17612 clk cpu0 IT (17576) 00015668:000010015668 71005c3f O EL3h_s : CMP w1,#0x17 +17612 clk cpu0 R cpsr 620003cd +17613 clk cpu0 IT (17577) 0001566c:00001001566c 540000e0 O EL3h_s : B.EQ 0x15688 +17614 clk cpu0 IT (17578) 00015688:000010015688 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +17614 clk cpu0 R X0 000000005E000007 +17615 clk cpu0 IT (17579) 0001568c:00001001568c 53003c01 O EL3h_s : UXTH w1,w0 +17615 clk cpu0 R X1 0000000000000007 +17616 clk cpu0 IT (17580) 00015690:000010015690 d53e5200 O EL3h_s : MRS x0,ESR_EL3 +17616 clk cpu0 R X0 000000005E000007 +17617 clk cpu0 IT (17581) 00015694:000010015694 7100143f O EL3h_s : CMP w1,#5 +17617 clk cpu0 R cpsr 220003cd +17618 clk cpu0 IS (17582) 00015698:000010015698 5400b46b O EL3h_s : B.LT 0x16d24 +17619 clk cpu0 IT (17583) 0001569c:00001001569c 7100283f O EL3h_s : CMP w1,#0xa +17619 clk cpu0 R cpsr 820003cd +17620 clk cpu0 IS (17584) 000156a0:0000100156a0 5400b42c O EL3h_s : B.GT 0x16d24 +17621 clk cpu0 IT (17585) 000156a4:0000100156a4 71001c3f O EL3h_s : CMP w1,#7 +17621 clk cpu0 R cpsr 620003cd +17622 clk cpu0 IT (17586) 000156a8:0000100156a8 540005c0 O EL3h_s : B.EQ 0x15760 +17623 clk cpu0 IT (17587) 00015760:000010015760 a94007e0 O EL3h_s : LDP x0,x1,[sp,#0] +17623 clk cpu0 MR8 0384c400:00001084c400_NS 00000000_00264007 +17623 clk cpu0 MR8 0384c408:00001084c408_NS 00000000_03000000 +17623 clk cpu0 R X0 0000000000264007 +17623 clk cpu0 R X1 0000000003000000 +17624 clk cpu0 IT (17588) 00015764:000010015764 910403ff O EL3h_s : ADD sp,sp,#0x100 +17624 clk cpu0 R SP_EL3 000000000384C500 +17625 clk cpu0 IT (17589) 00015768:000010015768 f103bc3f O EL3h_s : CMP x1,#0xef +17625 clk cpu0 R cpsr 220003cd +17626 clk cpu0 IT (17590) 0001576c:00001001576c 54000061 O EL3h_s : B.NE 0x15778 +17627 clk cpu0 IT (17591) 00015778:000010015778 a9bf17e4 O EL3h_s : STP x4,x5,[sp,#-0x10]! +17627 clk cpu0 MW8 0384c4f0:00001084c4f0_NS 00000000_000380c8 +17627 clk cpu0 MW8 0384c4f8:00001084c4f8_NS 00000000_00000000 +17627 clk cpu0 R SP_EL3 000000000384C4F0 +17628 clk cpu0 IT (17592) 0001577c:00001001577c a9bf07e0 O EL3h_s : STP x0,x1,[sp,#-0x10]! +17628 clk cpu0 MW8 0384c4e0:00001084c4e0_NS 00000000_00264007 +17628 clk cpu0 MW8 0384c4e8:00001084c4e8_NS 00000000_03000000 +17628 clk cpu0 R SP_EL3 000000000384C4E0 +17629 clk cpu0 IT (17593) 00015780:000010015780 d2800005 O EL3h_s : MOV x5,#0 +17629 clk cpu0 R X5 0000000000000000 +17630 clk cpu0 IT (17594) 00015784:000010015784 d34d3401 O EL3h_s : UBFIZ x1,x0,#51,#14 +17630 clk cpu0 R X1 0000000000000000 +17631 clk cpu0 IT (17595) 00015788:000010015788 f100043f O EL3h_s : CMP x1,#1 +17631 clk cpu0 R cpsr 820003cd +17632 clk cpu0 IT (17596) 0001578c:00001001578c a8c107e0 O EL3h_s : LDP x0,x1,[sp],#0x10 +17632 clk cpu0 MR8 0384c4e0:00001084c4e0_NS 00000000_00264007 +17632 clk cpu0 MR8 0384c4e8:00001084c4e8_NS 00000000_03000000 +17632 clk cpu0 R SP_EL3 000000000384C4F0 +17632 clk cpu0 R X0 0000000000264007 +17632 clk cpu0 R X1 0000000003000000 +17633 clk cpu0 IT (17597) 00015790:000010015790 540003a1 O EL3h_s : B.NE 0x15804 +17633 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 INVAL 0x00001003d800_NS +17633 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 ALLOC 0x000010015800 +17634 clk cpu0 IT (17598) 00015804:000010015804 a9bf0fe2 O EL3h_s : STP x2,x3,[sp,#-0x10]! +17634 clk cpu0 MW8 0384c4e0:00001084c4e0_NS 00000000_00035fc0 +17634 clk cpu0 MW8 0384c4e8:00001084c4e8_NS 00000000_00000130 +17634 clk cpu0 R SP_EL3 000000000384C4E0 +17635 clk cpu0 IT (17599) 00015808:000010015808 a9bf7bfd O EL3h_s : STP x29,x30,[sp,#-0x10]! +17635 clk cpu0 MW8 0384c4d0:00001084c4d0_NS ffffffff_fe00000f +17635 clk cpu0 MW8 0384c4d8:00001084c4d8_NS 00000000_00035960 +17635 clk cpu0 R SP_EL3 000000000384C4D0 +17636 clk cpu0 IT (17600) 0001580c:00001001580c 530e3803 O EL3h_s : UBFIZ w3,w0,#18,#15 +17636 clk cpu0 R X3 0000000000000001 +17637 clk cpu0 IT (17601) 00015810:000010015810 7100047f O EL3h_s : CMP w3,#1 +17637 clk cpu0 R cpsr 620003cd +17638 clk cpu0 IT (17602) 00015814:000010015814 54000180 O EL3h_s : B.EQ 0x15844 +17639 clk cpu0 IT (17603) 00015844:000010015844 580177a2 O EL3h_s : LDR x2,0x18738 +17639 clk cpu0 MR8 00018738:000010018738 00000000_00015d90 +17639 clk cpu0 R X2 0000000000015D90 +17640 clk cpu0 IT (17604) 00015848:000010015848 53107c03 O EL3h_s : LSR w3,w0,#16 +17640 clk cpu0 R X3 0000000000000026 +17641 clk cpu0 IT (17605) 0001584c:00001001584c 12003c63 O EL3h_s : AND w3,w3,#0xffff +17641 clk cpu0 R X3 0000000000000026 +17642 clk cpu0 IT (17606) 00015850:000010015850 d37df063 O EL3h_s : LSL x3,x3,#3 +17642 clk cpu0 R X3 0000000000000130 +17643 clk cpu0 IT (17607) 00015854:000010015854 8b030042 O EL3h_s : ADD x2,x2,x3 +17643 clk cpu0 R X2 0000000000015EC0 +17644 clk cpu0 IT (17608) 00015858:000010015858 f9400044 O EL3h_s : LDR x4,[x2,#0] +17644 clk cpu0 MR8 00015ec0:000010015ec0 00000000_00016b00 +17644 clk cpu0 R X4 0000000000016B00 +17645 clk cpu0 IT (17609) 0001585c:00001001585c d63f0080 O EL3h_s : BLR x4 +17645 clk cpu0 R cpsr 62000bcd +17645 clk cpu0 R X30 0000000000015860 +17646 clk cpu0 IT (17610) 00016b00:000010016b00 d53e1322 O EL3h_s : MRS x2,MDCR_EL3 +17646 clk cpu0 R cpsr 620003cd +17646 clk cpu0 R X2 0000000013040000 +17647 clk cpu0 IT (17611) 00016b04:000010016b04 8a080021 O EL3h_s : AND x1,x1,x8 +17647 clk cpu0 R X1 0000000003000000 +17648 clk cpu0 IT (17612) 00016b08:000010016b08 8a280042 O EL3h_s : BIC x2,x2,x8 +17648 clk cpu0 R X2 0000000010040000 +17649 clk cpu0 IT (17613) 00016b0c:000010016b0c aa020021 O EL3h_s : ORR x1,x1,x2 +17649 clk cpu0 R X1 0000000013040000 +17650 clk cpu0 IT (17614) 00016b10:000010016b10 a9bf7bfd O EL3h_s : STP x29,x30,[sp,#-0x10]! +17650 clk cpu0 MW8 0384c4c0:00001084c4c0_NS ffffffff_fe00000f +17650 clk cpu0 MW8 0384c4c8:00001084c4c8_NS 00000000_00015860 +17650 clk cpu0 R SP_EL3 000000000384C4C0 +17651 clk cpu0 IT (17615) 00016b14:000010016b14 a9bf07e0 O EL3h_s : STP x0,x1,[sp,#-0x10]! +17651 clk cpu0 MW8 0384c4b0:00001084c4b0_NS 00000000_00264007 +17651 clk cpu0 MW8 0384c4b8:00001084c4b8_NS 00000000_13040000 +17651 clk cpu0 R SP_EL3 000000000384C4B0 +17652 clk cpu0 IT (17616) 00016b18:000010016b18 d503201f O EL3h_s : NOP +17653 clk cpu0 IT (17617) 00016b1c:000010016b1c a8c107e0 O EL3h_s : LDP x0,x1,[sp],#0x10 +17653 clk cpu0 MR8 0384c4b0:00001084c4b0_NS 00000000_00264007 +17653 clk cpu0 MR8 0384c4b8:00001084c4b8_NS 00000000_13040000 +17653 clk cpu0 R SP_EL3 000000000384C4C0 +17653 clk cpu0 R X0 0000000000264007 +17653 clk cpu0 R X1 0000000013040000 +17654 clk cpu0 IT (17618) 00016b20:000010016b20 d51e1321 O EL3h_s : MSR MDCR_EL3,x1 +17654 clk cpu0 R MDCR_EL3 00000000:13040000 +17655 clk cpu0 IT (17619) 00016b24:000010016b24 d5033fdf O EL3h_s : ISB +17655 clk cpu0 R PMBIDR_EL1 00000020 +17655 clk cpu0 R TRBIDR_EL1 000000000000002b +17656 clk cpu0 IT (17620) 00016b28:000010016b28 d503201f O EL3h_s : NOP +17657 clk cpu0 IT (17621) 00016b2c:000010016b2c a8c17bfd O EL3h_s : LDP x29,x30,[sp],#0x10 +17657 clk cpu0 MR8 0384c4c0:00001084c4c0_NS ffffffff_fe00000f +17657 clk cpu0 MR8 0384c4c8:00001084c4c8_NS 00000000_00015860 +17657 clk cpu0 R SP_EL3 000000000384C4D0 +17657 clk cpu0 R X29 FFFFFFFFFE00000F +17657 clk cpu0 R X30 0000000000015860 +17658 clk cpu0 IT (17622) 00016b30:000010016b30 d65f03c0 O EL3h_s : RET +17659 clk cpu0 IT (17623) 00015860:000010015860 a8c17bfd O EL3h_s : LDP x29,x30,[sp],#0x10 +17659 clk cpu0 MR8 0384c4d0:00001084c4d0_NS ffffffff_fe00000f +17659 clk cpu0 MR8 0384c4d8:00001084c4d8_NS 00000000_00035960 +17659 clk cpu0 R SP_EL3 000000000384C4E0 +17659 clk cpu0 R X29 FFFFFFFFFE00000F +17659 clk cpu0 R X30 0000000000035960 +17660 clk cpu0 IT (17624) 00015864:000010015864 a8c10fe2 O EL3h_s : LDP x2,x3,[sp],#0x10 +17660 clk cpu0 MR8 0384c4e0:00001084c4e0_NS 00000000_00035fc0 +17660 clk cpu0 MR8 0384c4e8:00001084c4e8_NS 00000000_00000130 +17660 clk cpu0 R SP_EL3 000000000384C4F0 +17660 clk cpu0 R X2 0000000000035FC0 +17660 clk cpu0 R X3 0000000000000130 +17661 clk cpu0 IT (17625) 00015868:000010015868 a8c117e4 O EL3h_s : LDP x4,x5,[sp],#0x10 +17661 clk cpu0 MR8 0384c4f0:00001084c4f0_NS 00000000_000380c8 +17661 clk cpu0 MR8 0384c4f8:00001084c4f8_NS 00000000_00000000 +17661 clk cpu0 R SP_EL3 000000000384C500 +17661 clk cpu0 R X4 00000000000380C8 +17661 clk cpu0 R X5 0000000000000000 +17662 clk cpu0 IT (17626) 0001586c:00001001586c d69f03e0 O EL3h_s : ERET +17662 clk cpu0 E 00000000 EL1h 00000019 CoreEvent_ModeChange +17662 clk cpu0 R cpsr 62000bc5 +17662 clk cpu0 R DBGDSCRext 00060000 +17662 clk cpu0 R PMBIDR_EL1 00000030 +17662 clk cpu0 R TRBIDR_EL1 000000000000002b +17662 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +17662 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +17663 clk cpu0 IT (17627) 000380cc:0000100380cc_NS d65f03c0 O EL1h_n : RET +17664 clk cpu0 IT (17628) 00035960:000010035960_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +17664 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +17664 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011580 +17664 clk cpu0 R cpsr 620003c5 +17664 clk cpu0 R SP_EL1 0000000003700550 +17664 clk cpu0 R X29 FFFFFFFFFE00000F +17664 clk cpu0 R X30 0000000000011580 +17665 clk cpu0 IT (17629) 00035964:000010035964_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +17665 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000000 +17665 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00000001 +17665 clk cpu0 R SP_EL1 0000000003700560 +17665 clk cpu0 R X2 0000000000000000 +17665 clk cpu0 R X3 0000000000000001 +17666 clk cpu0 IT (17630) 00035968:000010035968_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +17666 clk cpu0 MR8 03700560:000000f00560_NS 00000000_90000000 +17666 clk cpu0 MR8 03700568:000000f00568_NS 03ff8000_03ff8000 +17666 clk cpu0 R SP_EL1 0000000003700570 +17666 clk cpu0 R X6 0000000090000000 +17666 clk cpu0 R X7 03FF800003FF8000 +17667 clk cpu0 IT (17631) 0003596c:00001003596c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +17667 clk cpu0 MR8 03700570:000000f00570_NS 00000000_00000000 +17667 clk cpu0 MR8 03700578:000000f00578_NS f800f800_f800f800 +17667 clk cpu0 R SP_EL1 0000000003700580 +17667 clk cpu0 R X4 0000000000000000 +17667 clk cpu0 R X5 F800F800F800F800 +17668 clk cpu0 IT (17632) 00035970:000010035970_NS 1400000c O EL1h_n : B 0x359a0 +17669 clk cpu0 IT (17633) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +17669 clk cpu0 R cpsr 820003c5 +17669 clk cpu0 R PMBIDR_EL1 00000030 +17669 clk cpu0 R TRBIDR_EL1 000000000000002b +17670 clk cpu0 IT (17634) 000a6f54:0000100a6f54_NS a8c127e8 O EL1h_n : LDP x8,x9,[sp],#0x10 +17670 clk cpu0 MR8 03700580:000000f00580_NS 00000000_00000003 +17670 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00000018 +17670 clk cpu0 R SP_EL1 0000000003700590 +17670 clk cpu0 R X8 0000000000000003 +17670 clk cpu0 R X9 0000000000000018 +17671 clk cpu0 IT (17635) 000a6f58:0000100a6f58_NS d65f03c0 O EL1h_n : RET +17672 clk cpu0 IT (17636) 00011580:000010011580_NS f9402fe8 O EL1h_n : LDR x8,[sp,#0x58] +17672 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000001 +17672 clk cpu0 R X8 0000000000000001 +17673 clk cpu0 IS (17637) 00011584:000010011584_NS b4000048 O EL1h_n : CBZ x8,0x1158c +17674 clk cpu0 IT (17638) 00011588:000010011588_NS 14000007 O EL1h_n : B 0x115a4 +17675 clk cpu0 IT (17639) 000115a4:0000100115a4_NS b9407be8 O EL1h_n : LDR w8,[sp,#0x78] +17675 clk cpu0 MR4 03700608:000000f00608_NS 00000001 +17675 clk cpu0 R X8 0000000000000001 +17676 clk cpu0 IT (17640) 000115a8:0000100115a8_NS 35000048 O EL1h_n : CBNZ w8,0x115b0 +17677 clk cpu0 IT (17641) 000115b0:0000100115b0_NS f9402be8 O EL1h_n : LDR x8,[sp,#0x50] +17677 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000003 +17677 clk cpu0 R X8 0000000000000003 +17678 clk cpu0 IT (17642) 000115b4:0000100115b4_NS d2800309 O EL1h_n : MOV x9,#0x18 +17678 clk cpu0 R X9 0000000000000018 +17679 clk cpu0 IT (17643) 000115b8:0000100115b8_NS 9ac92100 O EL1h_n : LSL x0,x8,x9 +17679 clk cpu0 R X0 0000000003000000 +17680 clk cpu0 IT (17644) 000115bc:0000100115bc_NS f94037e2 O EL1h_n : LDR x2,[sp,#0x68] +17680 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000000 +17680 clk cpu0 R X2 0000000000000000 +17681 clk cpu0 IT (17645) 000115c0:0000100115c0_NS f94033e3 O EL1h_n : LDR x3,[sp,#0x60] +17681 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17681 clk cpu0 R X3 0000000000000001 +17682 clk cpu0 IT (17646) 000115c4:0000100115c4_NS d2a06001 O EL1h_n : MOV x1,#0x3000000 +17682 clk cpu0 R X1 0000000003000000 +17683 clk cpu0 IT (17647) 000115c8:0000100115c8_NS 940256a1 O EL1h_n : BL 0xa704c +17683 clk cpu0 R X30 00000000000115CC +17684 clk cpu0 IT (17648) 000a704c:0000100a704c_NS a9bf27e8 O EL1h_n : STP x8,x9,[sp,#-0x10]! +17684 clk cpu0 MW8 03700580:000000f00580_NS 00000000_00000003 +17684 clk cpu0 MW8 03700588:000000f00588_NS 00000000_00000018 +17684 clk cpu0 R SP_EL1 0000000003700580 +17685 clk cpu0 IT (17649) 000a7050:0000100a7050_NS aa0103e8 O EL1h_n : MOV x8,x1 +17685 clk cpu0 R X8 0000000003000000 +17686 clk cpu0 IT (17650) 000a7054:0000100a7054_NS aa0303e9 O EL1h_n : MOV x9,x3 +17686 clk cpu0 R X9 0000000000000001 +17687 clk cpu0 IT (17651) 000a7058:0000100a7058_NS f100085f O EL1h_n : CMP x2,#2 +17687 clk cpu0 R cpsr 820003c5 +17688 clk cpu0 IT (17652) 000a705c:0000100a705c_NS 540001eb O EL1h_n : B.LT 0xa7098 +17689 clk cpu0 IT (17653) 000a7098:0000100a7098_NS f100045f O EL1h_n : CMP x2,#1 +17689 clk cpu0 R cpsr 820003c5 +17690 clk cpu0 IT (17654) 000a709c:0000100a709c_NS 54000221 O EL1h_n : B.NE 0xa70e0 +17691 clk cpu0 IT (17655) 000a70e0:0000100a70e0_NS aa0003e1 O EL1h_n : MOV x1,x0 +17691 clk cpu0 R X1 0000000003000000 +17692 clk cpu0 IT (17656) 000a70e4:0000100a70e4_NS d28000e0 O EL1h_n : MOV x0,#7 +17692 clk cpu0 R X0 0000000000000007 +17693 clk cpu0 IT (17657) 000a70e8:0000100a70e8_NS 32120000 O EL1h_n : ORR w0,w0,#0x4000 +17693 clk cpu0 R X0 0000000000004007 +17694 clk cpu0 IT (17658) 000a70ec:0000100a70ec_NS f2a004e0 O EL1h_n : MOVK x0,#0x27,LSL #16 +17694 clk cpu0 R X0 0000000000274007 +17695 clk cpu0 IT (17659) 000a70f0:0000100a70f0_NS d40000e1 O EL1h_n : SVC #7 +17695 clk cpu0 E 000a70f0:0000100a70f0_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +17695 clk cpu0 R cpsr 820003c5 +17695 clk cpu0 R PMBIDR_EL1 00000030 +17695 clk cpu0 R ESR_EL1 56000007 +17695 clk cpu0 R SPSR_EL1 820003c5 +17695 clk cpu0 R TRBIDR_EL1 000000000000002b +17695 clk cpu0 R ELR_EL1 00000000000a70f4 +17696 clk cpu0 IT (17660) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +17697 clk cpu0 IT (17661) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +17697 clk cpu0 R SP_EL1 0000000003700480 +17698 clk cpu0 IT (17662) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +17698 clk cpu0 MW8 03700480:000000f00480_NS 00000000_00274007 +17698 clk cpu0 MW8 03700488:000000f00488_NS 00000000_03000000 +17699 clk cpu0 IT (17663) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +17699 clk cpu0 R X0 0000000056000007 +17700 clk cpu0 IT (17664) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +17700 clk cpu0 R X1 0000000000000015 +17701 clk cpu0 IT (17665) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +17701 clk cpu0 R cpsr 620003c5 +17702 clk cpu0 IT (17666) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +17703 clk cpu0 IT (17667) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +17703 clk cpu0 R X1 0000000000000007 +17704 clk cpu0 IT (17668) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +17704 clk cpu0 R cpsr 220003c5 +17705 clk cpu0 IS (17669) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +17706 clk cpu0 IT (17670) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +17706 clk cpu0 R cpsr 820003c5 +17707 clk cpu0 IS (17671) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +17708 clk cpu0 IT (17672) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +17708 clk cpu0 R cpsr 820003c5 +17709 clk cpu0 IS (17673) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +17710 clk cpu0 IT (17674) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +17710 clk cpu0 R cpsr 620003c5 +17711 clk cpu0 IT (17675) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +17712 clk cpu0 IT (17676) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +17712 clk cpu0 MR8 03700480:000000f00480_NS 00000000_00274007 +17712 clk cpu0 MR8 03700488:000000f00488_NS 00000000_03000000 +17712 clk cpu0 R X0 0000000000274007 +17712 clk cpu0 R X1 0000000003000000 +17713 clk cpu0 IT (17677) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +17713 clk cpu0 R SP_EL1 0000000003700580 +17714 clk cpu0 IT (17678) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +17714 clk cpu0 R cpsr 220003c5 +17715 clk cpu0 IT (17679) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +17716 clk cpu0 IT (17680) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +17716 clk cpu0 MW8 03700570:000000f00570_NS 00000000_00000000 +17716 clk cpu0 MW8 03700578:000000f00578_NS f800f800_f800f800 +17716 clk cpu0 R SP_EL1 0000000003700570 +17717 clk cpu0 IT (17681) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +17717 clk cpu0 MW8 03700560:000000f00560_NS 00000000_00274007 +17717 clk cpu0 MW8 03700568:000000f00568_NS 00000000_03000000 +17717 clk cpu0 R SP_EL1 0000000003700560 +17718 clk cpu0 IT (17682) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +17718 clk cpu0 R X5 0000000000000000 +17719 clk cpu0 IT (17683) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +17719 clk cpu0 R X1 0000000000000000 +17720 clk cpu0 IT (17684) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +17720 clk cpu0 R cpsr 820003c5 +17721 clk cpu0 IT (17685) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +17721 clk cpu0 MR8 03700560:000000f00560_NS 00000000_00274007 +17721 clk cpu0 MR8 03700568:000000f00568_NS 00000000_03000000 +17721 clk cpu0 R SP_EL1 0000000003700570 +17721 clk cpu0 R X0 0000000000274007 +17721 clk cpu0 R X1 0000000003000000 +17722 clk cpu0 IT (17686) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +17723 clk cpu0 IT (17687) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +17723 clk cpu0 MW8 03700560:000000f00560_NS 00000000_90000000 +17723 clk cpu0 MW8 03700568:000000f00568_NS 03ff8000_03ff8000 +17723 clk cpu0 R SP_EL1 0000000003700560 +17724 clk cpu0 IT (17688) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +17724 clk cpu0 R X6 0000000000000000 +17725 clk cpu0 IT (17689) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +17725 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000000 +17725 clk cpu0 MW8 03700558:000000f00558_NS 00000000_00000001 +17725 clk cpu0 R SP_EL1 0000000003700550 +17726 clk cpu0 IT (17690) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +17726 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +17726 clk cpu0 MW8 03700548:000000f00548_NS 00000000_000115cc +17726 clk cpu0 R SP_EL1 0000000003700540 +17727 clk cpu0 IT (17691) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +17727 clk cpu0 R X3 0000000000000001 +17728 clk cpu0 IT (17692) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +17728 clk cpu0 R cpsr 620003c5 +17729 clk cpu0 IT (17693) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +17730 clk cpu0 IT (17694) 00035944:000010035944_NS 580557e2 O EL1h_n : LDR x2,0x40440 +17730 clk cpu0 MR8 00040440:000010040440_NS 00000000_00035e90 +17730 clk cpu0 R X2 0000000000035E90 +17731 clk cpu0 IT (17695) 00035948:000010035948_NS 53107c03 O EL1h_n : LSR w3,w0,#16 +17731 clk cpu0 R X3 0000000000000027 +17732 clk cpu0 IT (17696) 0003594c:00001003594c_NS 12003c63 O EL1h_n : AND w3,w3,#0xffff +17732 clk cpu0 R X3 0000000000000027 +17733 clk cpu0 IT (17697) 00035950:000010035950_NS d37df063 O EL1h_n : LSL x3,x3,#3 +17733 clk cpu0 R X3 0000000000000138 +17734 clk cpu0 IT (17698) 00035954:000010035954_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +17734 clk cpu0 R X2 0000000000035FC8 +17735 clk cpu0 IT (17699) 00035958:000010035958_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +17735 clk cpu0 MR8 00035fc8:000010035fc8_NS 00000000_000380d0 +17735 clk cpu0 R X4 00000000000380D0 +17736 clk cpu0 IT (17700) 0003595c:00001003595c_NS d63f0080 O EL1h_n : BLR x4 +17736 clk cpu0 R cpsr 62000bc5 +17736 clk cpu0 R X30 0000000000035960 +17737 clk cpu0 IT (17701) 000380d0:0000100380d0_NS d5384244 O EL1h_n : MRS x4,CURRENTEL +17737 clk cpu0 R cpsr 620003c5 +17737 clk cpu0 R X4 0000000000000004 +17738 clk cpu0 IT (17702) 000380d4:0000100380d4_NS f100209f O EL1h_n : CMP x4,#8 +17738 clk cpu0 R cpsr 820003c5 +17739 clk cpu0 IS (17703) 000380d8:0000100380d8_NS 54000160 O EL1h_n : B.EQ 0x38104 +17740 clk cpu0 IT (17704) 000380dc:0000100380dc_NS f1000d3f O EL1h_n : CMP x9,#3 +17740 clk cpu0 R cpsr 820003c5 +17741 clk cpu0 IT (17705) 000380e0:0000100380e0_NS 54000061 O EL1h_n : B.NE 0x380ec +17742 clk cpu0 IT (17706) 000380ec:0000100380ec_NS f100053f O EL1h_n : CMP x9,#1 +17742 clk cpu0 R cpsr 620003c5 +17743 clk cpu0 IS (17707) 000380f0:0000100380f0_NS 54000061 O EL1h_n : B.NE 0x380fc +17744 clk cpu0 IT (17708) 000380f4:0000100380f4_NS d40000e2 O EL1h_n : HVC #7 +17744 clk cpu0 E 000380f4:0000100380f4_NS EL2h 00000019 CoreEvent_ModeChange +17744 clk cpu0 E 000380f4:0000100380f4_NS 00000088 CoreEvent_LOWER_64_SYNC +17744 clk cpu0 R cpsr 620003c9 +17744 clk cpu0 R PMBIDR_EL1 00000030 +17744 clk cpu0 R ESR_EL2 5a000007 +17744 clk cpu0 R SPSR_EL2 620003c5 +17744 clk cpu0 R TRBIDR_EL1 000000000000002b +17744 clk cpu0 R ELR_EL2 00000000000380f8 +17744 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +17744 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +17745 clk cpu0 IT (17709) 00018c00:000010018c00_NS 14001079 O EL2h_n : B 0x1cde4 +17746 clk cpu0 IT (17710) 0001cde4:00001001cde4_NS d10403ff O EL2h_n : SUB sp,sp,#0x100 +17746 clk cpu0 R SP_EL2 000000000383C1D0 +17747 clk cpu0 IT (17711) 0001cde8:00001001cde8_NS a90007e0 O EL2h_n : STP x0,x1,[sp,#0] +17747 clk cpu0 MW8 0383c1d0:00001083c1d0_NS 00000000_00274007 +17747 clk cpu0 MW8 0383c1d8:00001083c1d8_NS 00000000_03000000 +17748 clk cpu0 IT (17712) 0001cdec:00001001cdec_NS d53c5200 O EL2h_n : MRS x0,ESR_EL2 +17748 clk cpu0 R X0 000000005A000007 +17749 clk cpu0 IT (17713) 0001cdf0:00001001cdf0_NS 531a7c01 O EL2h_n : LSR w1,w0,#26 +17749 clk cpu0 R X1 0000000000000016 +17750 clk cpu0 IT (17714) 0001cdf4:00001001cdf4_NS 7100543f O EL2h_n : CMP w1,#0x15 +17750 clk cpu0 R cpsr 220003c9 +17751 clk cpu0 IS (17715) 0001cdf8:00001001cdf8_NS 54000340 O EL2h_n : B.EQ 0x1ce60 +17752 clk cpu0 IT (17716) 0001cdfc:00001001cdfc_NS 7100583f O EL2h_n : CMP w1,#0x16 +17752 clk cpu0 R cpsr 620003c9 +17753 clk cpu0 IT (17717) 0001ce00:00001001ce00_NS 540000a0 O EL2h_n : B.EQ 0x1ce14 +17754 clk cpu0 IT (17718) 0001ce14:00001001ce14_NS d53c5200 O EL2h_n : MRS x0,ESR_EL2 +17754 clk cpu0 R X0 000000005A000007 +17755 clk cpu0 IT (17719) 0001ce18:00001001ce18_NS 53003c01 O EL2h_n : UXTH w1,w0 +17755 clk cpu0 R X1 0000000000000007 +17756 clk cpu0 IT (17720) 0001ce1c:00001001ce1c_NS 7100143f O EL2h_n : CMP w1,#5 +17756 clk cpu0 R cpsr 220003c9 +17757 clk cpu0 IS (17721) 0001ce20:00001001ce20_NS 5400f50b O EL2h_n : B.LT 0x1ecc0 +17758 clk cpu0 IT (17722) 0001ce24:00001001ce24_NS 7100283f O EL2h_n : CMP w1,#0xa +17758 clk cpu0 R cpsr 820003c9 +17759 clk cpu0 IS (17723) 0001ce28:00001001ce28_NS 5400f4cc O EL2h_n : B.GT 0x1ecc0 +17760 clk cpu0 IT (17724) 0001ce2c:00001001ce2c_NS 71001c3f O EL2h_n : CMP w1,#7 +17760 clk cpu0 R cpsr 620003c9 +17761 clk cpu0 IT (17725) 0001ce30:00001001ce30_NS 540003a0 O EL2h_n : B.EQ 0x1cea4 +17762 clk cpu0 IT (17726) 0001cea4:00001001cea4_NS a94007e0 O EL2h_n : LDP x0,x1,[sp,#0] +17762 clk cpu0 MR8 0383c1d0:00001083c1d0_NS 00000000_00274007 +17762 clk cpu0 MR8 0383c1d8:00001083c1d8_NS 00000000_03000000 +17762 clk cpu0 R X0 0000000000274007 +17762 clk cpu0 R X1 0000000003000000 +17763 clk cpu0 IT (17727) 0001cea8:00001001cea8_NS 910403ff O EL2h_n : ADD sp,sp,#0x100 +17763 clk cpu0 R SP_EL2 000000000383C2D0 +17764 clk cpu0 IT (17728) 0001ceac:00001001ceac_NS f103bc3f O EL2h_n : CMP x1,#0xef +17764 clk cpu0 R cpsr 220003c9 +17765 clk cpu0 IT (17729) 0001ceb0:00001001ceb0_NS 54000061 O EL2h_n : B.NE 0x1cebc +17766 clk cpu0 IT (17730) 0001cebc:00001001cebc_NS a9bf17e4 O EL2h_n : STP x4,x5,[sp,#-0x10]! +17766 clk cpu0 MW8 0383c2c0:00001083c2c0_NS 00000000_00000004 +17766 clk cpu0 MW8 0383c2c8:00001083c2c8_NS 00000000_00000000 +17766 clk cpu0 R SP_EL2 000000000383C2C0 +17767 clk cpu0 IT (17731) 0001cec0:00001001cec0_NS a9bf07e0 O EL2h_n : STP x0,x1,[sp,#-0x10]! +17767 clk cpu0 MW8 0383c2b0:00001083c2b0_NS 00000000_00274007 +17767 clk cpu0 MW8 0383c2b8:00001083c2b8_NS 00000000_03000000 +17767 clk cpu0 R SP_EL2 000000000383C2B0 +17768 clk cpu0 IT (17732) 0001cec4:00001001cec4_NS d2800005 O EL2h_n : MOV x5,#0 +17768 clk cpu0 R X5 0000000000000000 +17769 clk cpu0 IT (17733) 0001cec8:00001001cec8_NS d34d3401 O EL2h_n : UBFIZ x1,x0,#51,#14 +17769 clk cpu0 R X1 0000000000000000 +17770 clk cpu0 IT (17734) 0001cecc:00001001cecc_NS f100043f O EL2h_n : CMP x1,#1 +17770 clk cpu0 R cpsr 820003c9 +17771 clk cpu0 IT (17735) 0001ced0:00001001ced0_NS a8c107e0 O EL2h_n : LDP x0,x1,[sp],#0x10 +17771 clk cpu0 MR8 0383c2b0:00001083c2b0_NS 00000000_00274007 +17771 clk cpu0 MR8 0383c2b8:00001083c2b8_NS 00000000_03000000 +17771 clk cpu0 R SP_EL2 000000000383C2C0 +17771 clk cpu0 R X0 0000000000274007 +17771 clk cpu0 R X1 0000000003000000 +17772 clk cpu0 IT (17736) 0001ced4:00001001ced4_NS 540003a1 O EL2h_n : B.NE 0x1cf48 +17773 clk cpu0 IT (17737) 0001cf48:00001001cf48_NS a9bf0fe2 O EL2h_n : STP x2,x3,[sp,#-0x10]! +17773 clk cpu0 MW8 0383c2b0:00001083c2b0_NS 00000000_00035fc8 +17773 clk cpu0 MW8 0383c2b8:00001083c2b8_NS 00000000_00000138 +17773 clk cpu0 R SP_EL2 000000000383C2B0 +17774 clk cpu0 IT (17738) 0001cf4c:00001001cf4c_NS a9bf7bfd O EL2h_n : STP x29,x30,[sp,#-0x10]! +17774 clk cpu0 MW8 0383c2a0:00001083c2a0_NS ffffffff_fe00000f +17774 clk cpu0 MW8 0383c2a8:00001083c2a8_NS 00000000_00035960 +17774 clk cpu0 R SP_EL2 000000000383C2A0 +17775 clk cpu0 IT (17739) 0001cf50:00001001cf50_NS 530e3803 O EL2h_n : UBFIZ w3,w0,#18,#15 +17775 clk cpu0 R X3 0000000000000001 +17776 clk cpu0 IT (17740) 0001cf54:00001001cf54_NS f100047f O EL2h_n : CMP x3,#1 +17776 clk cpu0 R cpsr 620003c9 +17777 clk cpu0 IT (17741) 0001cf58:00001001cf58_NS 540000c0 O EL2h_n : B.EQ 0x1cf70 +17778 clk cpu0 IT (17742) 0001cf70:00001001cf70_NS 5801e582 O EL2h_n : LDR x2,0x20c20 +17778 clk cpu0 MR8 00020c20:000010020c20_NS 00000000_0001d590 +17778 clk cpu0 R X2 000000000001D590 +17779 clk cpu0 IT (17743) 0001cf74:00001001cf74_NS 53107c03 O EL2h_n : LSR w3,w0,#16 +17779 clk cpu0 R X3 0000000000000027 +17780 clk cpu0 IT (17744) 0001cf78:00001001cf78_NS 12003c63 O EL2h_n : AND w3,w3,#0xffff +17780 clk cpu0 R X3 0000000000000027 +17781 clk cpu0 IT (17745) 0001cf7c:00001001cf7c_NS d37df063 O EL2h_n : LSL x3,x3,#3 +17781 clk cpu0 R X3 0000000000000138 +17782 clk cpu0 IT (17746) 0001cf80:00001001cf80_NS 8b030042 O EL2h_n : ADD x2,x2,x3 +17782 clk cpu0 R X2 000000000001D6C8 +17783 clk cpu0 IT (17747) 0001cf84:00001001cf84_NS f9400044 O EL2h_n : LDR x4,[x2,#0] +17783 clk cpu0 MR8 0001d6c8:00001001d6c8_NS 00000000_0001eacc +17783 clk cpu0 R X4 000000000001EACC +17784 clk cpu0 IT (17748) 0001cf88:00001001cf88_NS d63f0080 O EL2h_n : BLR x4 +17784 clk cpu0 R cpsr 62000bc9 +17784 clk cpu0 R X30 000000000001CF8C +17785 clk cpu0 IT (17749) 0001eacc:00001001eacc_NS d53c1122 O EL2h_n : MRS x2,MDCR_EL2 +17785 clk cpu0 R cpsr 620003c9 +17785 clk cpu0 R X2 0000000003000008 +17786 clk cpu0 IT (17750) 0001ead0:00001001ead0_NS 8a080021 O EL2h_n : AND x1,x1,x8 +17786 clk cpu0 R X1 0000000003000000 +17787 clk cpu0 IT (17751) 0001ead4:00001001ead4_NS 8a280042 O EL2h_n : BIC x2,x2,x8 +17787 clk cpu0 R X2 0000000000000008 +17788 clk cpu0 IT (17752) 0001ead8:00001001ead8_NS aa020021 O EL2h_n : ORR x1,x1,x2 +17788 clk cpu0 R X1 0000000003000008 +17789 clk cpu0 IT (17753) 0001eadc:00001001eadc_NS a9bf7bfd O EL2h_n : STP x29,x30,[sp,#-0x10]! +17789 clk cpu0 MW8 0383c290:00001083c290_NS ffffffff_fe00000f +17789 clk cpu0 MW8 0383c298:00001083c298_NS 00000000_0001cf8c +17789 clk cpu0 R SP_EL2 000000000383C290 +17790 clk cpu0 IT (17754) 0001eae0:00001001eae0_NS a9bf07e0 O EL2h_n : STP x0,x1,[sp,#-0x10]! +17790 clk cpu0 MW8 0383c280:00001083c280_NS 00000000_00274007 +17790 clk cpu0 MW8 0383c288:00001083c288_NS 00000000_03000008 +17790 clk cpu0 R SP_EL2 000000000383C280 +17791 clk cpu0 IT (17755) 0001eae4:00001001eae4_NS d503201f O EL2h_n : NOP +17792 clk cpu0 IT (17756) 0001eae8:00001001eae8_NS a8c107e0 O EL2h_n : LDP x0,x1,[sp],#0x10 +17792 clk cpu0 MR8 0383c280:00001083c280_NS 00000000_00274007 +17792 clk cpu0 MR8 0383c288:00001083c288_NS 00000000_03000008 +17792 clk cpu0 R SP_EL2 000000000383C290 +17792 clk cpu0 R X0 0000000000274007 +17792 clk cpu0 R X1 0000000003000008 +17793 clk cpu0 IT (17757) 0001eaec:00001001eaec_NS d51c1121 O EL2h_n : MSR MDCR_EL2,x1 +17793 clk cpu0 R MDCR_EL2 00000000:03000008 +17794 clk cpu0 IT (17758) 0001eaf0:00001001eaf0_NS d5033fdf O EL2h_n : ISB +17794 clk cpu0 R PMBIDR_EL1 00000030 +17794 clk cpu0 R TRBIDR_EL1 000000000000002b +17795 clk cpu0 IT (17759) 0001eaf4:00001001eaf4_NS d503201f O EL2h_n : NOP +17796 clk cpu0 IT (17760) 0001eaf8:00001001eaf8_NS a8c17bfd O EL2h_n : LDP x29,x30,[sp],#0x10 +17796 clk cpu0 MR8 0383c290:00001083c290_NS ffffffff_fe00000f +17796 clk cpu0 MR8 0383c298:00001083c298_NS 00000000_0001cf8c +17796 clk cpu0 R SP_EL2 000000000383C2A0 +17796 clk cpu0 R X29 FFFFFFFFFE00000F +17796 clk cpu0 R X30 000000000001CF8C +17797 clk cpu0 IT (17761) 0001eafc:00001001eafc_NS d65f03c0 O EL2h_n : RET +17798 clk cpu0 IT (17762) 0001cf8c:00001001cf8c_NS a8c17bfd O EL2h_n : LDP x29,x30,[sp],#0x10 +17798 clk cpu0 MR8 0383c2a0:00001083c2a0_NS ffffffff_fe00000f +17798 clk cpu0 MR8 0383c2a8:00001083c2a8_NS 00000000_00035960 +17798 clk cpu0 R SP_EL2 000000000383C2B0 +17798 clk cpu0 R X29 FFFFFFFFFE00000F +17798 clk cpu0 R X30 0000000000035960 +17799 clk cpu0 IT (17763) 0001cf90:00001001cf90_NS a8c10fe2 O EL2h_n : LDP x2,x3,[sp],#0x10 +17799 clk cpu0 MR8 0383c2b0:00001083c2b0_NS 00000000_00035fc8 +17799 clk cpu0 MR8 0383c2b8:00001083c2b8_NS 00000000_00000138 +17799 clk cpu0 R SP_EL2 000000000383C2C0 +17799 clk cpu0 R X2 0000000000035FC8 +17799 clk cpu0 R X3 0000000000000138 +17800 clk cpu0 IT (17764) 0001cf94:00001001cf94_NS a8c117e4 O EL2h_n : LDP x4,x5,[sp],#0x10 +17800 clk cpu0 MR8 0383c2c0:00001083c2c0_NS 00000000_00000004 +17800 clk cpu0 MR8 0383c2c8:00001083c2c8_NS 00000000_00000000 +17800 clk cpu0 R SP_EL2 000000000383C2D0 +17800 clk cpu0 R X4 0000000000000004 +17800 clk cpu0 R X5 0000000000000000 +17801 clk cpu0 IT (17765) 0001cf98:00001001cf98_NS 1400000b O EL2h_n : B 0x1cfc4 +17802 clk cpu0 IT (17766) 0001cfc4:00001001cfc4_NS aa0003e2 O EL2h_n : MOV x2,x0 +17802 clk cpu0 R X2 0000000000274007 +17803 clk cpu0 IT (17767) 0001cfc8:00001001cfc8_NS aa0003e3 O EL2h_n : MOV x3,x0 +17803 clk cpu0 R X3 0000000000274007 +17804 clk cpu0 IT (17768) 0001cfcc:00001001cfcc_NS d34f3c42 O EL2h_n : UBFIZ x2,x2,#49,#16 +17804 clk cpu0 R X2 0000000000000000 +17805 clk cpu0 IT (17769) 0001cfd0:00001001cfd0_NS f100045f O EL2h_n : CMP x2,#1 +17805 clk cpu0 R cpsr 820003c9 +17806 clk cpu0 IT (17770) 0001cfd4:00001001cfd4_NS 540003e1 O EL2h_n : B.NE 0x1d050 +17807 clk cpu0 IT (17771) 0001d050:00001001d050_NS d69f03e0 O EL2h_n : ERET +17807 clk cpu0 E 00000000 EL1h 00000019 CoreEvent_ModeChange +17807 clk cpu0 R cpsr 620003c5 +17807 clk cpu0 R PMBIDR_EL1 00000030 +17807 clk cpu0 R TRBIDR_EL1 000000000000002b +17807 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +17807 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +17808 clk cpu0 IT (17772) 000380f8:0000100380f8_NS 1400000f O EL1h_n : B 0x38134 +17809 clk cpu0 IT (17773) 00038134:000010038134_NS d65f03c0 O EL1h_n : RET +17810 clk cpu0 IT (17774) 00035960:000010035960_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +17810 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +17810 clk cpu0 MR8 03700548:000000f00548_NS 00000000_000115cc +17810 clk cpu0 R SP_EL1 0000000003700550 +17810 clk cpu0 R X29 FFFFFFFFFE00000F +17810 clk cpu0 R X30 00000000000115CC +17811 clk cpu0 IT (17775) 00035964:000010035964_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +17811 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000000 +17811 clk cpu0 MR8 03700558:000000f00558_NS 00000000_00000001 +17811 clk cpu0 R SP_EL1 0000000003700560 +17811 clk cpu0 R X2 0000000000000000 +17811 clk cpu0 R X3 0000000000000001 +17812 clk cpu0 IT (17776) 00035968:000010035968_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +17812 clk cpu0 MR8 03700560:000000f00560_NS 00000000_90000000 +17812 clk cpu0 MR8 03700568:000000f00568_NS 03ff8000_03ff8000 +17812 clk cpu0 R SP_EL1 0000000003700570 +17812 clk cpu0 R X6 0000000090000000 +17812 clk cpu0 R X7 03FF800003FF8000 +17813 clk cpu0 IT (17777) 0003596c:00001003596c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +17813 clk cpu0 MR8 03700570:000000f00570_NS 00000000_00000000 +17813 clk cpu0 MR8 03700578:000000f00578_NS f800f800_f800f800 +17813 clk cpu0 R SP_EL1 0000000003700580 +17813 clk cpu0 R X4 0000000000000000 +17813 clk cpu0 R X5 F800F800F800F800 +17814 clk cpu0 IT (17778) 00035970:000010035970_NS 1400000c O EL1h_n : B 0x359a0 +17815 clk cpu0 IT (17779) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +17815 clk cpu0 R cpsr 820003c5 +17815 clk cpu0 R PMBIDR_EL1 00000030 +17815 clk cpu0 R TRBIDR_EL1 000000000000002b +17816 clk cpu0 IT (17780) 000a70f4:0000100a70f4_NS a8c127e8 O EL1h_n : LDP x8,x9,[sp],#0x10 +17816 clk cpu0 MR8 03700580:000000f00580_NS 00000000_00000003 +17816 clk cpu0 MR8 03700588:000000f00588_NS 00000000_00000018 +17816 clk cpu0 R SP_EL1 0000000003700590 +17816 clk cpu0 R X8 0000000000000003 +17816 clk cpu0 R X9 0000000000000018 +17817 clk cpu0 IT (17781) 000a70f8:0000100a70f8_NS d65f03c0 O EL1h_n : RET +17818 clk cpu0 IT (17782) 000115cc:0000100115cc_NS f94043fe O EL1h_n : LDR x30,[sp,#0x80] +17818 clk cpu0 MR8 03700610:000000f00610_NS 00000000_0001113c +17818 clk cpu0 R X30 000000000001113C +17819 clk cpu0 IT (17783) 000115d0:0000100115d0_NS 910243ff O EL1h_n : ADD sp,sp,#0x90 +17819 clk cpu0 R SP_EL1 0000000003700620 +17820 clk cpu0 IT (17784) 000115d4:0000100115d4_NS d65f03c0 O EL1h_n : RET +17821 clk cpu0 IT (17785) 0001113c:00001001113c_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +17821 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +17821 clk cpu0 R X8 0000000003700790 +17821 clk cpu0 CACHE cpu.cpu0.l1icache LINE 008b ALLOC 0x000010011140_NS +17821 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0451 ALLOC 0x000010011140_NS +17822 clk cpu0 IT (17786) 00011140:000010011140_NS f9400500 O EL1h_n : LDR x0,[x8,#8] +17822 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +17822 clk cpu0 R X0 0000000000000000 +17823 clk cpu0 IT (17787) 00011144:000010011144_NS f9400101 O EL1h_n : LDR x1,[x8,#0] +17823 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +17823 clk cpu0 R X1 0000000000000001 +17824 clk cpu0 IT (17788) 00011148:000010011148_NS 94024e87 O EL1h_n : BL 0xa4b64 +17824 clk cpu0 R X30 000000000001114C +17824 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005a INVAL 0x000010090b40 +17824 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005a ALLOC 0x0000100a4b40_NS +17824 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 12d0 ALLOC 0x0000100a4b40_NS +17825 clk cpu0 IT (17789) 000a4b64:0000100a4b64_NS f100041f O EL1h_n : CMP x0,#1 +17825 clk cpu0 R cpsr 820003c5 +17826 clk cpu0 IT (17790) 000a4b68:0000100a4b68_NS 5400006b O EL1h_n : B.LT 0xa4b74 +17827 clk cpu0 IT (17791) 000a4b74:0000100a4b74_NS d28000e0 O EL1h_n : MOV x0,#7 +17827 clk cpu0 R X0 0000000000000007 +17828 clk cpu0 IT (17792) 000a4b78:0000100a4b78_NS f2a00560 O EL1h_n : MOVK x0,#0x2b,LSL #16 +17828 clk cpu0 R X0 00000000002B0007 +17829 clk cpu0 IT (17793) 000a4b7c:0000100a4b7c_NS aa0103e2 O EL1h_n : MOV x2,x1 +17829 clk cpu0 R X2 0000000000000001 +17829 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005d INVAL 0x000010010b80_NS +17829 clk cpu0 CACHE cpu.cpu0.l1icache LINE 005d ALLOC 0x0000100a4b80_NS +17830 clk cpu0 IT (17794) 000a4b80:0000100a4b80_NS d40000e1 O EL1h_n : SVC #7 +17830 clk cpu0 E 000a4b80:0000100a4b80_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +17830 clk cpu0 R cpsr 820003c5 +17830 clk cpu0 R PMBIDR_EL1 00000030 +17830 clk cpu0 R ESR_EL1 56000007 +17830 clk cpu0 R SPSR_EL1 820003c5 +17830 clk cpu0 R TRBIDR_EL1 000000000000002b +17830 clk cpu0 R ELR_EL1 00000000000a4b84 +17831 clk cpu0 IT (17795) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +17832 clk cpu0 IT (17796) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +17832 clk cpu0 R SP_EL1 0000000003700520 +17833 clk cpu0 IT (17797) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +17833 clk cpu0 MW8 03700520:000000f00520_NS 00000000_002b0007 +17833 clk cpu0 MW8 03700528:000000f00528_NS 00000000_00000001 +17834 clk cpu0 IT (17798) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +17834 clk cpu0 R X0 0000000056000007 +17835 clk cpu0 IT (17799) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +17835 clk cpu0 R X1 0000000000000015 +17836 clk cpu0 IT (17800) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +17836 clk cpu0 R cpsr 620003c5 +17837 clk cpu0 IT (17801) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +17838 clk cpu0 IT (17802) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +17838 clk cpu0 R X1 0000000000000007 +17839 clk cpu0 IT (17803) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +17839 clk cpu0 R cpsr 220003c5 +17840 clk cpu0 IS (17804) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +17841 clk cpu0 IT (17805) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +17841 clk cpu0 R cpsr 820003c5 +17842 clk cpu0 IS (17806) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +17843 clk cpu0 IT (17807) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +17843 clk cpu0 R cpsr 820003c5 +17844 clk cpu0 IS (17808) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +17845 clk cpu0 IT (17809) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +17845 clk cpu0 R cpsr 620003c5 +17846 clk cpu0 IT (17810) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +17847 clk cpu0 IT (17811) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +17847 clk cpu0 MR8 03700520:000000f00520_NS 00000000_002b0007 +17847 clk cpu0 MR8 03700528:000000f00528_NS 00000000_00000001 +17847 clk cpu0 R X0 00000000002B0007 +17847 clk cpu0 R X1 0000000000000001 +17848 clk cpu0 IT (17812) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +17848 clk cpu0 R SP_EL1 0000000003700620 +17849 clk cpu0 IT (17813) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +17849 clk cpu0 R cpsr 820003c5 +17850 clk cpu0 IT (17814) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +17851 clk cpu0 IT (17815) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +17851 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +17851 clk cpu0 MW8 03700618:000000f00618_NS f800f800_f800f800 +17851 clk cpu0 R SP_EL1 0000000003700610 +17852 clk cpu0 IT (17816) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +17852 clk cpu0 MW8 03700600:000000f00600_NS 00000000_002b0007 +17852 clk cpu0 MW8 03700608:000000f00608_NS 00000000_00000001 +17852 clk cpu0 R SP_EL1 0000000003700600 +17853 clk cpu0 IT (17817) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +17853 clk cpu0 R X5 0000000000000000 +17854 clk cpu0 IT (17818) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +17854 clk cpu0 R X1 0000000000000000 +17855 clk cpu0 IT (17819) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +17855 clk cpu0 R cpsr 820003c5 +17856 clk cpu0 IT (17820) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +17856 clk cpu0 MR8 03700600:000000f00600_NS 00000000_002b0007 +17856 clk cpu0 MR8 03700608:000000f00608_NS 00000000_00000001 +17856 clk cpu0 R SP_EL1 0000000003700610 +17856 clk cpu0 R X0 00000000002B0007 +17856 clk cpu0 R X1 0000000000000001 +17857 clk cpu0 IT (17821) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +17858 clk cpu0 IT (17822) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +17858 clk cpu0 MW8 03700600:000000f00600_NS 00000000_90000000 +17858 clk cpu0 MW8 03700608:000000f00608_NS 03ff8000_03ff8000 +17858 clk cpu0 R SP_EL1 0000000003700600 +17859 clk cpu0 IT (17823) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +17859 clk cpu0 R X6 0000000000000001 +17860 clk cpu0 IT (17824) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +17860 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +17860 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000001 +17860 clk cpu0 R SP_EL1 00000000037005F0 +17861 clk cpu0 IT (17825) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +17861 clk cpu0 MW8 037005e0:000000f005e0_NS ffffffff_fe00000f +17861 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_0001114c +17861 clk cpu0 R SP_EL1 00000000037005E0 +17862 clk cpu0 IT (17826) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +17862 clk cpu0 R X3 0000000000000000 +17863 clk cpu0 IT (17827) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +17863 clk cpu0 R cpsr 820003c5 +17864 clk cpu0 IS (17828) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +17865 clk cpu0 IT (17829) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +17865 clk cpu0 R X3 0000000000000000 +17866 clk cpu0 IT (17830) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +17866 clk cpu0 R cpsr 820003c5 +17867 clk cpu0 IS (17831) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +17868 clk cpu0 IT (17832) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +17868 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +17868 clk cpu0 R X2 0000000000035A00 +17869 clk cpu0 IT (17833) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +17870 clk cpu0 IT (17834) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +17870 clk cpu0 R X3 0000000000000056 +17871 clk cpu0 IT (17835) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +17871 clk cpu0 R X3 0000000000000056 +17872 clk cpu0 IT (17836) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +17872 clk cpu0 R X3 00000000000002B0 +17873 clk cpu0 IT (17837) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +17873 clk cpu0 R X2 0000000000035CB0 +17874 clk cpu0 IT (17838) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +17874 clk cpu0 MR8 00035cb0:000010035cb0_NS 00000000_00036dac +17874 clk cpu0 R X4 0000000000036DAC +17875 clk cpu0 IT (17839) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +17875 clk cpu0 R cpsr 82000bc5 +17875 clk cpu0 R X30 0000000000035990 +17875 clk cpu0 CACHE cpu.cpu0.l1icache LINE 016d ALLOC 0x000010036d80_NS +17875 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1b60 ALLOC 0x000010036d80_NS +17876 clk cpu0 IT (17840) 00036dac:000010036dac_NS d5389b00 O EL1h_n : MRS x0,s3_0_c9_c11_0 +17876 clk cpu0 R cpsr 820003c5 +17876 clk cpu0 R X0 0000000024002019 +17877 clk cpu0 IT (17841) 00036db0:000010036db0_NS f14008bf O EL1h_n : CMP x5,#2,LSL #12 +17877 clk cpu0 R cpsr 820003c5 +17878 clk cpu0 IT (17842) 00036db4:000010036db4_NS 54000041 O EL1h_n : B.NE 0x36dbc +17879 clk cpu0 IT (17843) 00036dbc:000010036dbc_NS d65f03c0 O EL1h_n : RET +17880 clk cpu0 IT (17844) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +17880 clk cpu0 MR8 037005e0:000000f005e0_NS ffffffff_fe00000f +17880 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_0001114c +17880 clk cpu0 R SP_EL1 00000000037005F0 +17880 clk cpu0 R X29 FFFFFFFFFE00000F +17880 clk cpu0 R X30 000000000001114C +17881 clk cpu0 IT (17845) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +17881 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17881 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000001 +17881 clk cpu0 R SP_EL1 0000000003700600 +17881 clk cpu0 R X2 0000000000000001 +17881 clk cpu0 R X3 0000000000000001 +17882 clk cpu0 IT (17846) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +17882 clk cpu0 MR8 03700600:000000f00600_NS 00000000_90000000 +17882 clk cpu0 MR8 03700608:000000f00608_NS 03ff8000_03ff8000 +17882 clk cpu0 R SP_EL1 0000000003700610 +17882 clk cpu0 R X6 0000000090000000 +17882 clk cpu0 R X7 03FF800003FF8000 +17883 clk cpu0 IT (17847) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +17883 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +17883 clk cpu0 MR8 03700618:000000f00618_NS f800f800_f800f800 +17883 clk cpu0 R SP_EL1 0000000003700620 +17883 clk cpu0 R X4 0000000000000000 +17883 clk cpu0 R X5 F800F800F800F800 +17884 clk cpu0 IT (17848) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +17884 clk cpu0 R cpsr 820003c5 +17884 clk cpu0 R PMBIDR_EL1 00000030 +17884 clk cpu0 R TRBIDR_EL1 000000000000002b +17885 clk cpu0 IT (17849) 000a4b84:0000100a4b84_NS d65f03c0 O EL1h_n : RET +17886 clk cpu0 IT (17850) 0001114c:00001001114c_NS b9019be0 O EL1h_n : STR w0,[sp,#0x198] +17886 clk cpu0 MW4 037007b8:000000f007b8_NS 24002019 +17887 clk cpu0 IT (17851) 00011150:000010011150_NS b9819be8 O EL1h_n : LDRSW x8,[sp,#0x198] +17887 clk cpu0 MR4 037007b8:000000f007b8_NS 24002019 +17887 clk cpu0 R X8 0000000024002019 +17888 clk cpu0 IT (17852) 00011154:000010011154_NS 9280002a O EL1h_n : MOV x10,#0xfffffffffffffffe +17888 clk cpu0 R X10 FFFFFFFFFFFFFFFE +17889 clk cpu0 IT (17853) 00011158:000010011158_NS 8a0a0100 O EL1h_n : AND x0,x8,x10 +17889 clk cpu0 R X0 0000000024002018 +17890 clk cpu0 IT (17854) 0001115c:00001001115c_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +17890 clk cpu0 MR8 037006d8:000000f006d8_NS 00000000_03700790 +17890 clk cpu0 R X8 0000000003700790 +17891 clk cpu0 IT (17855) 00011160:000010011160_NS f9400501 O EL1h_n : LDR x1,[x8,#8] +17891 clk cpu0 MR8 03700798:000000f00798_NS 00000000_00000000 +17891 clk cpu0 R X1 0000000000000000 +17892 clk cpu0 IT (17856) 00011164:000010011164_NS f9400102 O EL1h_n : LDR x2,[x8,#0] +17892 clk cpu0 MR8 03700790:000000f00790_NS 00000000_00000001 +17892 clk cpu0 R X2 0000000000000001 +17893 clk cpu0 IT (17857) 00011168:000010011168_NS 94024e88 O EL1h_n : BL 0xa4b88 +17893 clk cpu0 R X30 000000000001116C +17894 clk cpu0 IT (17858) 000a4b88:0000100a4b88_NS f100043f O EL1h_n : CMP x1,#1 +17894 clk cpu0 R cpsr 820003c5 +17895 clk cpu0 IT (17859) 000a4b8c:0000100a4b8c_NS 5400014b O EL1h_n : B.LT 0xa4bb4 +17896 clk cpu0 IT (17860) 000a4bb4:0000100a4bb4_NS aa0003e1 O EL1h_n : MOV x1,x0 +17896 clk cpu0 R X1 0000000024002018 +17897 clk cpu0 IT (17861) 000a4bb8:0000100a4bb8_NS d28000e0 O EL1h_n : MOV x0,#7 +17897 clk cpu0 R X0 0000000000000007 +17898 clk cpu0 IT (17862) 000a4bbc:0000100a4bbc_NS 32110000 O EL1h_n : ORR w0,w0,#0x8000 +17898 clk cpu0 R X0 0000000000008007 +17899 clk cpu0 IT (17863) 000a4bc0:0000100a4bc0_NS f2a00560 O EL1h_n : MOVK x0,#0x2b,LSL #16 +17899 clk cpu0 R X0 00000000002B8007 +17900 clk cpu0 IT (17864) 000a4bc4:0000100a4bc4_NS d40000e1 O EL1h_n : SVC #7 +17900 clk cpu0 E 000a4bc4:0000100a4bc4_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +17900 clk cpu0 R cpsr 820003c5 +17900 clk cpu0 R PMBIDR_EL1 00000030 +17900 clk cpu0 R ESR_EL1 56000007 +17900 clk cpu0 R SPSR_EL1 820003c5 +17900 clk cpu0 R TRBIDR_EL1 000000000000002b +17900 clk cpu0 R ELR_EL1 00000000000a4bc8 +17901 clk cpu0 IT (17865) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +17902 clk cpu0 IT (17866) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +17902 clk cpu0 R SP_EL1 0000000003700520 +17903 clk cpu0 IT (17867) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +17903 clk cpu0 MW8 03700520:000000f00520_NS 00000000_002b8007 +17903 clk cpu0 MW8 03700528:000000f00528_NS 00000000_24002018 +17904 clk cpu0 IT (17868) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +17904 clk cpu0 R X0 0000000056000007 +17905 clk cpu0 IT (17869) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +17905 clk cpu0 R X1 0000000000000015 +17906 clk cpu0 IT (17870) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +17906 clk cpu0 R cpsr 620003c5 +17907 clk cpu0 IT (17871) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +17908 clk cpu0 IT (17872) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +17908 clk cpu0 R X1 0000000000000007 +17909 clk cpu0 IT (17873) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +17909 clk cpu0 R cpsr 220003c5 +17910 clk cpu0 IS (17874) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +17911 clk cpu0 IT (17875) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +17911 clk cpu0 R cpsr 820003c5 +17912 clk cpu0 IS (17876) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +17913 clk cpu0 IT (17877) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +17913 clk cpu0 R cpsr 820003c5 +17914 clk cpu0 IS (17878) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +17915 clk cpu0 IT (17879) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +17915 clk cpu0 R cpsr 620003c5 +17916 clk cpu0 IT (17880) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +17917 clk cpu0 IT (17881) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +17917 clk cpu0 MR8 03700520:000000f00520_NS 00000000_002b8007 +17917 clk cpu0 MR8 03700528:000000f00528_NS 00000000_24002018 +17917 clk cpu0 R X0 00000000002B8007 +17917 clk cpu0 R X1 0000000024002018 +17918 clk cpu0 IT (17882) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +17918 clk cpu0 R SP_EL1 0000000003700620 +17919 clk cpu0 IT (17883) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +17919 clk cpu0 R cpsr 220003c5 +17920 clk cpu0 IT (17884) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +17921 clk cpu0 IT (17885) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +17921 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00000000 +17921 clk cpu0 MW8 03700618:000000f00618_NS f800f800_f800f800 +17921 clk cpu0 R SP_EL1 0000000003700610 +17922 clk cpu0 IT (17886) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +17922 clk cpu0 MW8 03700600:000000f00600_NS 00000000_002b8007 +17922 clk cpu0 MW8 03700608:000000f00608_NS 00000000_24002018 +17922 clk cpu0 R SP_EL1 0000000003700600 +17923 clk cpu0 IT (17887) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +17923 clk cpu0 R X5 0000000000000000 +17924 clk cpu0 IT (17888) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +17924 clk cpu0 R X1 0000000000000000 +17925 clk cpu0 IT (17889) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +17925 clk cpu0 R cpsr 820003c5 +17926 clk cpu0 IT (17890) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +17926 clk cpu0 MR8 03700600:000000f00600_NS 00000000_002b8007 +17926 clk cpu0 MR8 03700608:000000f00608_NS 00000000_24002018 +17926 clk cpu0 R SP_EL1 0000000003700610 +17926 clk cpu0 R X0 00000000002B8007 +17926 clk cpu0 R X1 0000000024002018 +17927 clk cpu0 IT (17891) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +17928 clk cpu0 IT (17892) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +17928 clk cpu0 MW8 03700600:000000f00600_NS 00000000_90000000 +17928 clk cpu0 MW8 03700608:000000f00608_NS 03ff8000_03ff8000 +17928 clk cpu0 R SP_EL1 0000000003700600 +17929 clk cpu0 IT (17893) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +17929 clk cpu0 R X6 0000000000000001 +17930 clk cpu0 IT (17894) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +17930 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000001 +17930 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00000001 +17930 clk cpu0 R SP_EL1 00000000037005F0 +17931 clk cpu0 IT (17895) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +17931 clk cpu0 MW8 037005e0:000000f005e0_NS ffffffff_fe00000f +17931 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_0001116c +17931 clk cpu0 R SP_EL1 00000000037005E0 +17932 clk cpu0 IT (17896) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +17932 clk cpu0 R X3 0000000000000000 +17933 clk cpu0 IT (17897) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +17933 clk cpu0 R cpsr 820003c5 +17934 clk cpu0 IS (17898) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +17935 clk cpu0 IT (17899) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +17935 clk cpu0 R X3 0000000000000000 +17936 clk cpu0 IT (17900) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +17936 clk cpu0 R cpsr 820003c5 +17937 clk cpu0 IS (17901) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +17938 clk cpu0 IT (17902) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +17938 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +17938 clk cpu0 R X2 0000000000035A00 +17939 clk cpu0 IT (17903) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +17940 clk cpu0 IT (17904) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +17940 clk cpu0 R X3 0000000000000057 +17941 clk cpu0 IT (17905) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +17941 clk cpu0 R X3 0000000000000057 +17942 clk cpu0 IT (17906) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +17942 clk cpu0 R X3 00000000000002B8 +17943 clk cpu0 IT (17907) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +17943 clk cpu0 R X2 0000000000035CB8 +17944 clk cpu0 IT (17908) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +17944 clk cpu0 MR8 00035cb8:000010035cb8_NS 00000000_00036dc0 +17944 clk cpu0 R X4 0000000000036DC0 +17945 clk cpu0 IT (17909) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +17945 clk cpu0 R cpsr 82000bc5 +17945 clk cpu0 R X30 0000000000035990 +17946 clk cpu0 IT (17910) 00036dc0:000010036dc0_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +17946 clk cpu0 MW8 037005d0:000000f005d0_NS ffffffff_fe00000f +17946 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00035990 +17946 clk cpu0 R cpsr 820003c5 +17946 clk cpu0 R SP_EL1 00000000037005D0 +17947 clk cpu0 IT (17911) 00036dc4:000010036dc4_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +17947 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_002b8007 +17947 clk cpu0 MW8 037005c8:000000f005c8_NS 00000000_24002018 +17947 clk cpu0 R SP_EL1 00000000037005C0 +17948 clk cpu0 IT (17912) 00036dc8:000010036dc8_NS d503201f O EL1h_n : NOP +17949 clk cpu0 IT (17913) 00036dcc:000010036dcc_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +17949 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_002b8007 +17949 clk cpu0 MR8 037005c8:000000f005c8_NS 00000000_24002018 +17949 clk cpu0 R SP_EL1 00000000037005D0 +17949 clk cpu0 R X0 00000000002B8007 +17949 clk cpu0 R X1 0000000024002018 +17950 clk cpu0 IT (17914) 00036dd0:000010036dd0_NS d5189b01 O EL1h_n : MSR s3_0_c9_c11_0,x1 +17950 clk cpu0 R TRBLIMITR_EL1 00000000:24002018 +17951 clk cpu0 IT (17915) 00036dd4:000010036dd4_NS d5033fdf O EL1h_n : ISB +17951 clk cpu0 R PMBIDR_EL1 00000030 +17951 clk cpu0 R TRBLIMITR_EL1 0000000024002018 +17951 clk cpu0 R TRBIDR_EL1 000000000000002b +17952 clk cpu0 IT (17916) 00036dd8:000010036dd8_NS d503201f O EL1h_n : NOP +17953 clk cpu0 IT (17917) 00036ddc:000010036ddc_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +17953 clk cpu0 MR8 037005d0:000000f005d0_NS ffffffff_fe00000f +17953 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_00035990 +17953 clk cpu0 R SP_EL1 00000000037005E0 +17953 clk cpu0 R X29 FFFFFFFFFE00000F +17953 clk cpu0 R X30 0000000000035990 +17954 clk cpu0 IT (17918) 00036de0:000010036de0_NS d65f03c0 O EL1h_n : RET +17955 clk cpu0 IT (17919) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +17955 clk cpu0 MR8 037005e0:000000f005e0_NS ffffffff_fe00000f +17955 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_0001116c +17955 clk cpu0 R SP_EL1 00000000037005F0 +17955 clk cpu0 R X29 FFFFFFFFFE00000F +17955 clk cpu0 R X30 000000000001116C +17956 clk cpu0 IT (17920) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +17956 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000001 +17956 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00000001 +17956 clk cpu0 R SP_EL1 0000000003700600 +17956 clk cpu0 R X2 0000000000000001 +17956 clk cpu0 R X3 0000000000000001 +17957 clk cpu0 IT (17921) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +17957 clk cpu0 MR8 03700600:000000f00600_NS 00000000_90000000 +17957 clk cpu0 MR8 03700608:000000f00608_NS 03ff8000_03ff8000 +17957 clk cpu0 R SP_EL1 0000000003700610 +17957 clk cpu0 R X6 0000000090000000 +17957 clk cpu0 R X7 03FF800003FF8000 +17958 clk cpu0 IT (17922) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +17958 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00000000 +17958 clk cpu0 MR8 03700618:000000f00618_NS f800f800_f800f800 +17958 clk cpu0 R SP_EL1 0000000003700620 +17958 clk cpu0 R X4 0000000000000000 +17958 clk cpu0 R X5 F800F800F800F800 +17959 clk cpu0 IT (17923) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +17959 clk cpu0 R cpsr 820003c5 +17959 clk cpu0 R PMBIDR_EL1 00000030 +17959 clk cpu0 R TRBIDR_EL1 000000000000002b +17960 clk cpu0 IT (17924) 000a4bc8:0000100a4bc8_NS d65f03c0 O EL1h_n : RET +17961 clk cpu0 IT (17925) 0001116c:00001001116c_NS f94043e8 O EL1h_n : LDR x8,[sp,#0x80] +17961 clk cpu0 MR8 037006a0:000000f006a0_NS 00000000_03008530 +17961 clk cpu0 R X8 0000000003008530 +17962 clk cpu0 IT (17926) 00011170:000010011170_NS f9400101 O EL1h_n : LDR x1,[x8,#0] +17962 clk cpu0 MR8 03008530:000000808530_NS 00000000_23000010 +17962 clk cpu0 R X1 0000000023000010 +17963 clk cpu0 IT (17927) 00011174:000010011174_NS 910383e0 O EL1h_n : ADD x0,sp,#0xe0 +17963 clk cpu0 R X0 0000000003700700 +17964 clk cpu0 IT (17928) 00011178:000010011178_NS 52800022 O EL1h_n : MOV w2,#1 +17964 clk cpu0 R X2 0000000000000001 +17965 clk cpu0 IT (17929) 0001117c:00001001117c_NS 94000137 O EL1h_n : BL 0x11658 +17965 clk cpu0 R X30 0000000000011180 +17965 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 INVAL 0x000010095640_NS +17965 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 ALLOC 0x000010011640_NS +17966 clk cpu0 IT (17930) 00011658:000010011658_NS d10343ff O EL1h_n : SUB sp,sp,#0xd0 +17966 clk cpu0 R SP_EL1 0000000003700550 +17967 clk cpu0 IT (17931) 0001165c:00001001165c_NS f90063fe O EL1h_n : STR x30,[sp,#0xc0] +17967 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00011180 +17968 clk cpu0 IT (17932) 00011660:000010011660_NS d2800008 O EL1h_n : MOV x8,#0 +17968 clk cpu0 R X8 0000000000000000 +17969 clk cpu0 IT (17933) 00011664:000010011664_NS 52800009 O EL1h_n : MOV w9,#0 +17969 clk cpu0 R X9 0000000000000000 +17970 clk cpu0 IT (17934) 00011668:000010011668_NS 529e000a O EL1h_n : MOV w10,#0xf000 +17970 clk cpu0 R X10 000000000000F000 +17971 clk cpu0 IT (17935) 0001166c:00001001166c_NS 5280018b O EL1h_n : MOV w11,#0xc +17971 clk cpu0 R X11 000000000000000C +17972 clk cpu0 IT (17936) 00011670:000010011670_NS 5281e00c O EL1h_n : MOV w12,#0xf00 +17972 clk cpu0 R X12 0000000000000F00 +17973 clk cpu0 IT (17937) 00011674:000010011674_NS 5280010d O EL1h_n : MOV w13,#8 +17973 clk cpu0 R X13 0000000000000008 +17974 clk cpu0 IT (17938) 00011678:000010011678_NS 5280002e O EL1h_n : MOV w14,#1 +17974 clk cpu0 R X14 0000000000000001 +17975 clk cpu0 IT (17939) 0001167c:00001001167c_NS 9001830f O EL1h_n : ADRP x15,0x307167c +17975 clk cpu0 R X15 0000000003071000 +17975 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b4 INVAL 0x000010095680_NS +17975 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b4 ALLOC 0x000010011680_NS +17975 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 05a0 ALLOC 0x000010011680_NS +17976 clk cpu0 IT (17940) 00011680:000010011680_NS 912441ef O EL1h_n : ADD x15,x15,#0x910 +17976 clk cpu0 R X15 0000000003071910 +17977 clk cpu0 IT (17941) 00011684:000010011684_NS f9005fe0 O EL1h_n : STR x0,[sp,#0xb8] +17977 clk cpu0 MW8 03700608:000000f00608_NS 00000000_03700700 +17978 clk cpu0 IT (17942) 00011688:000010011688_NS f9005be1 O EL1h_n : STR x1,[sp,#0xb0] +17978 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000010 +17979 clk cpu0 IT (17943) 0001168c:00001001168c_NS 3902bfe2 O EL1h_n : STRB w2,[sp,#0xaf] +17979 clk cpu0 MW1 037005ff:000000f005ff_NS 01 +17980 clk cpu0 IT (17944) 00011690:000010011690_NS f90047e8 O EL1h_n : STR x8,[sp,#0x88] +17980 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_00000000 +17981 clk cpu0 IT (17945) 00011694:000010011694_NS 2a0903e0 O EL1h_n : MOV w0,w9 +17981 clk cpu0 R X0 0000000000000000 +17982 clk cpu0 IT (17946) 00011698:000010011698_NS 2a0a03e1 O EL1h_n : MOV w1,w10 +17982 clk cpu0 R X1 000000000000F000 +17983 clk cpu0 IT (17947) 0001169c:00001001169c_NS f9003be8 O EL1h_n : STR x8,[sp,#0x70] +17983 clk cpu0 MW8 037005c0:000000f005c0_NS 00000000_00000000 +17984 clk cpu0 IT (17948) 000116a0:0000100116a0_NS b9006fea O EL1h_n : STR w10,[sp,#0x6c] +17984 clk cpu0 MW4 037005bc:000000f005bc_NS 0000f000 +17985 clk cpu0 IT (17949) 000116a4:0000100116a4_NS b9006beb O EL1h_n : STR w11,[sp,#0x68] +17985 clk cpu0 MW4 037005b8:000000f005b8_NS 0000000c +17986 clk cpu0 IT (17950) 000116a8:0000100116a8_NS b90067ec O EL1h_n : STR w12,[sp,#0x64] +17986 clk cpu0 MW4 037005b4:000000f005b4_NS 00000f00 +17987 clk cpu0 IT (17951) 000116ac:0000100116ac_NS b90063ed O EL1h_n : STR w13,[sp,#0x60] +17987 clk cpu0 MW4 037005b0:000000f005b0_NS 00000008 +17988 clk cpu0 IT (17952) 000116b0:0000100116b0_NS b9005fee O EL1h_n : STR w14,[sp,#0x5c] +17988 clk cpu0 MW4 037005ac:000000f005ac_NS 00000001 +17989 clk cpu0 IT (17953) 000116b4:0000100116b4_NS f9002bef O EL1h_n : STR x15,[sp,#0x50] +17989 clk cpu0 MW8 037005a0:000000f005a0_NS 00000000_03071910 +17990 clk cpu0 IT (17954) 000116b8:0000100116b8_NS 94021c2d O EL1h_n : BL 0x9876c +17990 clk cpu0 R X30 00000000000116BC +17991 clk cpu0 IT (17955) 0009876c:00001009876c_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +17991 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +17991 clk cpu0 MW8 03700548:000000f00548_NS 00000000_000116bc +17991 clk cpu0 R SP_EL1 0000000003700540 +17992 clk cpu0 IT (17956) 00098770:000010098770_NS 71403c3f O EL1h_n : CMP w1,#0xf,LSL #12 +17992 clk cpu0 R cpsr 620003c5 +17993 clk cpu0 IT (17957) 00098774:000010098774_NS 54000100 O EL1h_n : B.EQ 0x98794 +17994 clk cpu0 IT (17958) 00098794:000010098794_NS d0030be8 O EL1h_n : ADRP x8,0x6216794 +17994 clk cpu0 R X8 0000000006216000 +17995 clk cpu0 IT (17959) 00098798:000010098798_NS b9410913 O EL1h_n : LDR w19,[x8,#0x108] +17995 clk cpu0 MR4 06216108:000015216108_NS 00030001 +17995 clk cpu0 R X19 0000000000030001 +17996 clk cpu0 IT (17960) 0009879c:00001009879c_NS 14000005 O EL1h_n : B 0x987b0 +17997 clk cpu0 IT (17961) 000987b0:0000100987b0_NS 2a1303e0 O EL1h_n : MOV w0,w19 +17997 clk cpu0 R X0 0000000000030001 +17998 clk cpu0 IT (17962) 000987b4:0000100987b4_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +17998 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +17998 clk cpu0 MR8 03700548:000000f00548_NS 00000000_000116bc +17998 clk cpu0 R SP_EL1 0000000003700550 +17998 clk cpu0 R X19 00000000062160A2 +17998 clk cpu0 R X30 00000000000116BC +17999 clk cpu0 IT (17963) 000987b8:0000100987b8_NS d65f03c0 O EL1h_n : RET +18000 clk cpu0 IT (17964) 000116bc:0000100116bc_NS b90087e0 O EL1h_n : STR w0,[sp,#0x84] +18000 clk cpu0 MW4 037005d4:000000f005d4_NS 00030001 +18000 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b7 ALLOC 0x0000100116c0_NS +18000 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 05b0 ALLOC 0x0000100116c0_NS +18001 clk cpu0 IT (17965) 000116c0:0000100116c0_NS b94087e9 O EL1h_n : LDR w9,[sp,#0x84] +18001 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +18001 clk cpu0 R X9 0000000000030001 +18002 clk cpu0 IT (17966) 000116c4:0000100116c4_NS b9406fea O EL1h_n : LDR w10,[sp,#0x6c] +18002 clk cpu0 MR4 037005bc:000000f005bc_NS 0000f000 +18002 clk cpu0 R X10 000000000000F000 +18003 clk cpu0 IT (17967) 000116c8:0000100116c8_NS 0a0a0129 O EL1h_n : AND w9,w9,w10 +18003 clk cpu0 R X9 0000000000000000 +18004 clk cpu0 IT (17968) 000116cc:0000100116cc_NS b9406beb O EL1h_n : LDR w11,[sp,#0x68] +18004 clk cpu0 MR4 037005b8:000000f005b8_NS 0000000c +18004 clk cpu0 R X11 000000000000000C +18005 clk cpu0 IT (17969) 000116d0:0000100116d0_NS 1acb2529 O EL1h_n : LSR w9,w9,w11 +18005 clk cpu0 R X9 0000000000000000 +18006 clk cpu0 IT (17970) 000116d4:0000100116d4_NS 2a0903e8 O EL1h_n : MOV w8,w9 +18006 clk cpu0 R X8 0000000000000000 +18007 clk cpu0 IT (17971) 000116d8:0000100116d8_NS d3407d08 O EL1h_n : UBFX x8,x8,#0,#32 +18007 clk cpu0 R X8 0000000000000000 +18008 clk cpu0 IT (17972) 000116dc:0000100116dc_NS f9004fe8 O EL1h_n : STR x8,[sp,#0x98] +18008 clk cpu0 MW8 037005e8:000000f005e8_NS 00000000_00000000 +18009 clk cpu0 IT (17973) 000116e0:0000100116e0_NS b94087e9 O EL1h_n : LDR w9,[sp,#0x84] +18009 clk cpu0 MR4 037005d4:000000f005d4_NS 00030001 +18009 clk cpu0 R X9 0000000000030001 +18010 clk cpu0 IT (17974) 000116e4:0000100116e4_NS b94067ec O EL1h_n : LDR w12,[sp,#0x64] +18010 clk cpu0 MR4 037005b4:000000f005b4_NS 00000f00 +18010 clk cpu0 R X12 0000000000000F00 +18011 clk cpu0 IT (17975) 000116e8:0000100116e8_NS 0a0c0129 O EL1h_n : AND w9,w9,w12 +18011 clk cpu0 R X9 0000000000000000 +18012 clk cpu0 IT (17976) 000116ec:0000100116ec_NS b94063ed O EL1h_n : LDR w13,[sp,#0x60] +18012 clk cpu0 MR4 037005b0:000000f005b0_NS 00000008 +18012 clk cpu0 R X13 0000000000000008 +18013 clk cpu0 IT (17977) 000116f0:0000100116f0_NS 1acd2529 O EL1h_n : LSR w9,w9,w13 +18013 clk cpu0 R X9 0000000000000000 +18014 clk cpu0 IT (17978) 000116f4:0000100116f4_NS b9405fee O EL1h_n : LDR w14,[sp,#0x5c] +18014 clk cpu0 MR4 037005ac:000000f005ac_NS 00000001 +18014 clk cpu0 R X14 0000000000000001 +18015 clk cpu0 IT (17979) 000116f8:0000100116f8_NS 0a2901c9 O EL1h_n : BIC w9,w14,w9 +18015 clk cpu0 R X9 0000000000000001 +18016 clk cpu0 IT (17980) 000116fc:0000100116fc_NS 2a0903e8 O EL1h_n : MOV w8,w9 +18016 clk cpu0 R X8 0000000000000001 +18016 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b9 ALLOC 0x000010011700_NS +18016 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 05c0 ALLOC 0x000010011700_NS +18017 clk cpu0 IT (17981) 00011700:000010011700_NS d3407d08 O EL1h_n : UBFX x8,x8,#0,#32 +18017 clk cpu0 R X8 0000000000000001 +18018 clk cpu0 IT (17982) 00011704:000010011704_NS f9004be8 O EL1h_n : STR x8,[sp,#0x90] +18018 clk cpu0 MW8 037005e0:000000f005e0_NS 00000000_00000001 +18019 clk cpu0 IT (17983) 00011708:000010011708_NS 940256d6 O EL1h_n : BL 0xa7260 +18019 clk cpu0 R X30 000000000001170C +18020 clk cpu0 IT (17984) 000a7260:0000100a7260_NS d53bd060 O EL1h_n : MRS x0,TPIDRRO_EL0 +18020 clk cpu0 R X0 0000000000000000 +18021 clk cpu0 IT (17985) 000a7264:0000100a7264_NS d61f03c0 O EL1h_n : BR x30 +18021 clk cpu0 R cpsr 620007c5 +18022 clk cpu0 IT (17986) 0001170c:00001001170c_NS 2a0003e8 O EL1h_n : MOV w8,w0 +18022 clk cpu0 R cpsr 620003c5 +18022 clk cpu0 R X8 0000000000000000 +18023 clk cpu0 IT (17987) 00011710:000010011710_NS d3407d08 O EL1h_n : UBFX x8,x8,#0,#32 +18023 clk cpu0 R X8 0000000000000000 +18024 clk cpu0 IT (17988) 00011714:000010011714_NS f90053e8 O EL1h_n : STR x8,[sp,#0xa0] +18024 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00000000 +18025 clk cpu0 IT (17989) 00011718:000010011718_NS f9402be8 O EL1h_n : LDR x8,[sp,#0x50] +18025 clk cpu0 MR8 037005a0:000000f005a0_NS 00000000_03071910 +18025 clk cpu0 R X8 0000000003071910 +18026 clk cpu0 IT (17990) 0001171c:00001001171c_NS f940010f O EL1h_n : LDR x15,[x8,#0] +18026 clk cpu0 MR8 03071910:000000871910_NS 00000000_00000000 +18026 clk cpu0 R X15 0000000000000000 +18027 clk cpu0 IT (17991) 00011720:000010011720_NS f9403bf0 O EL1h_n : LDR x16,[sp,#0x70] +18027 clk cpu0 MR8 037005c0:000000f005c0_NS 00000000_00000000 +18027 clk cpu0 R X16 0000000000000000 +18028 clk cpu0 IT (17992) 00011724:000010011724_NS eb1001ff O EL1h_n : CMP x15,x16 +18028 clk cpu0 R cpsr 620003c5 +18029 clk cpu0 IT (17993) 00011728:000010011728_NS 1a9f17e9 O EL1h_n : CSET w9,EQ +18029 clk cpu0 R X9 0000000000000001 +18030 clk cpu0 IT (17994) 0001172c:00001001172c_NS 37000049 O EL1h_n : TBNZ w9,#0,0x11734 +18031 clk cpu0 IT (17995) 00011734:000010011734_NS 97fffebc O EL1h_n : BL 0x11224 +18031 clk cpu0 R X30 0000000000011738 +18032 clk cpu0 IT (17996) 00011224:000010011224_NS f81f0ffe O EL1h_n : STR x30,[sp,#-0x10]! +18032 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00011738 +18032 clk cpu0 R SP_EL1 0000000003700540 +18033 clk cpu0 IT (17997) 00011228:000010011228_NS 94000280 O EL1h_n : BL 0x11c28 +18033 clk cpu0 R X30 000000000001122C +18034 clk cpu0 IT (17998) 00011c28:000010011c28_NS d2a46008 O EL1h_n : MOV x8,#0x23000000 +18034 clk cpu0 R X8 0000000023000000 +18035 clk cpu0 IT (17999) 00011c2c:000010011c2c_NS 90018309 O EL1h_n : ADRP x9,0x3071c2c +18035 clk cpu0 R X9 0000000003071000 +18036 clk cpu0 IT (18000) 00011c30:000010011c30_NS 9124a129 O EL1h_n : ADD x9,x9,#0x928 +18036 clk cpu0 R X9 0000000003071928 +18037 clk cpu0 IT (18001) 00011c34:000010011c34_NS f9000128 O EL1h_n : STR x8,[x9,#0] +18037 clk cpu0 MW8 03071928:000000871928_NS 00000000_23000000 +18038 clk cpu0 IT (18002) 00011c38:000010011c38_NS f9400120 O EL1h_n : LDR x0,[x9,#0] +18038 clk cpu0 MR8 03071928:000000871928_NS 00000000_23000000 +18038 clk cpu0 R X0 0000000023000000 +18039 clk cpu0 IT (18003) 00011c3c:000010011c3c_NS d65f03c0 O EL1h_n : RET +18040 clk cpu0 IT (18004) 0001122c:00001001122c_NS f84107fe O EL1h_n : LDR x30,[sp],#0x10 +18040 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00011738 +18040 clk cpu0 R SP_EL1 0000000003700550 +18040 clk cpu0 R X30 0000000000011738 +18041 clk cpu0 IT (18005) 00011230:000010011230_NS d65f03c0 O EL1h_n : RET +18042 clk cpu0 IT (18006) 00011738:000010011738_NS f9402be8 O EL1h_n : LDR x8,[sp,#0x50] +18042 clk cpu0 MR8 037005a0:000000f005a0_NS 00000000_03071910 +18042 clk cpu0 R X8 0000000003071910 +18043 clk cpu0 IT (18007) 0001173c:00001001173c_NS f9000100 O EL1h_n : STR x0,[x8,#0] +18043 clk cpu0 MW8 03071910:000000871910_NS 00000000_23000000 +18043 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bb ALLOC 0x000010011740_NS +18043 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 05d0 ALLOC 0x000010011740_NS +18044 clk cpu0 IT (18008) 00011740:000010011740_NS 3942bfe8 O EL1h_n : LDRB w8,[sp,#0xaf] +18044 clk cpu0 MR1 037005ff:000000f005ff_NS 01 +18044 clk cpu0 R X8 0000000000000001 +18045 clk cpu0 IT (18009) 00011744:000010011744_NS f9402be9 O EL1h_n : LDR x9,[sp,#0x50] +18045 clk cpu0 MR8 037005a0:000000f005a0_NS 00000000_03071910 +18045 clk cpu0 R X9 0000000003071910 +18046 clk cpu0 IT (18010) 00011748:000010011748_NS f940012a O EL1h_n : LDR x10,[x9,#0] +18046 clk cpu0 MR8 03071910:000000871910_NS 00000000_23000000 +18046 clk cpu0 R X10 0000000023000000 +18047 clk cpu0 IT (18011) 0001174c:00001001174c_NS 39000148 O EL1h_n : STRB w8,[x10,#0] +18047 clk cpu0 MW1 23000000:000016240000_NS 01 +18047 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000011f00000_NS +18047 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000016240000_NS +18047 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000a CLEAN 0x000016240000_NS +18047 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000a INVAL 0x000016240000_NS +18048 clk cpu0 IT (18012) 00011750:000010011750_NS 9102c3ea O EL1h_n : ADD x10,sp,#0xb0 +18048 clk cpu0 R X10 0000000003700600 +18049 clk cpu0 IT (18013) 00011754:000010011754_NS f9405beb O EL1h_n : LDR x11,[sp,#0xb0] +18049 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000010 +18049 clk cpu0 R X11 0000000023000010 +18050 clk cpu0 IT (18014) 00011758:000010011758_NS f90047eb O EL1h_n : STR x11,[sp,#0x88] +18050 clk cpu0 MW8 037005d8:000000f005d8_NS 00000000_23000010 +18051 clk cpu0 IT (18015) 0001175c:00001001175c_NS f9405feb O EL1h_n : LDR x11,[sp,#0xb8] +18051 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18051 clk cpu0 R X11 0000000003700700 +18052 clk cpu0 IT (18016) 00011760:000010011760_NS d280020c O EL1h_n : MOV x12,#0x10 +18052 clk cpu0 R X12 0000000000000010 +18053 clk cpu0 IT (18017) 00011764:000010011764_NS 52800008 O EL1h_n : MOV w8,#0 +18053 clk cpu0 R X8 0000000000000000 +18054 clk cpu0 IT (18018) 00011768:000010011768_NS 39004168 O EL1h_n : STRB w8,[x11,#0x10] +18054 clk cpu0 MW1 03700710:000000f00710_NS 00 +18054 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 CLEAN 0x000010800700_NS +18054 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 INVAL 0x000010800700_NS +18054 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0039 ALLOC 0x000000f00700_NS +18054 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01c1 ALLOC 0x000010800700_NS +18054 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01c2 CLEAN 0x000000f00700_NS +18054 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 01c2 INVAL 0x000000f00700_NS +18055 clk cpu0 IT (18019) 0001176c:00001001176c_NS f9405feb O EL1h_n : LDR x11,[sp,#0xb8] +18055 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18055 clk cpu0 R X11 0000000003700700 +18056 clk cpu0 IT (18020) 00011770:000010011770_NS 8b0c0161 O EL1h_n : ADD x1,x11,x12 +18056 clk cpu0 R X1 0000000003700710 +18057 clk cpu0 IT (18021) 00011774:000010011774_NS aa0a03e0 O EL1h_n : MOV x0,x10 +18057 clk cpu0 R X0 0000000003700600 +18058 clk cpu0 IT (18022) 00011778:000010011778_NS 5280002d O EL1h_n : MOV w13,#1 +18058 clk cpu0 R X13 0000000000000001 +18059 clk cpu0 IT (18023) 0001177c:00001001177c_NS 2a0d03e2 O EL1h_n : MOV w2,w13 +18059 clk cpu0 R X2 0000000000000001 +18059 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bc INVAL 0x000010015780 +18059 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bc ALLOC 0x000010011780_NS +18059 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 05e0 ALLOC 0x000010011780_NS +18060 clk cpu0 IT (18024) 00011780:000010011780_NS f90027ea O EL1h_n : STR x10,[sp,#0x48] +18060 clk cpu0 MW8 03700598:000000f00598_NS 00000000_03700600 +18061 clk cpu0 IT (18025) 00011784:000010011784_NS f90023ec O EL1h_n : STR x12,[sp,#0x40] +18061 clk cpu0 MW8 03700590:000000f00590_NS 00000000_00000010 +18062 clk cpu0 IT (18026) 00011788:000010011788_NS b9003fe8 O EL1h_n : STR w8,[sp,#0x3c] +18062 clk cpu0 MW4 0370058c:000000f0058c_NS 00000000 +18063 clk cpu0 IT (18027) 0001178c:00001001178c_NS b9003bed O EL1h_n : STR w13,[sp,#0x38] +18063 clk cpu0 MW4 03700588:000000f00588_NS 00000001 +18064 clk cpu0 IT (18028) 00011790:000010011790_NS 97ffff92 O EL1h_n : BL 0x115d8 +18064 clk cpu0 R X30 0000000000011794 +18065 clk cpu0 IT (18029) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +18065 clk cpu0 R SP_EL1 0000000003700530 +18066 clk cpu0 IT (18030) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +18066 clk cpu0 R X8 0000000000000000 +18067 clk cpu0 IT (18031) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +18067 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +18068 clk cpu0 IT (18032) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +18068 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700710 +18069 clk cpu0 IT (18033) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +18069 clk cpu0 MW1 0370053f:000000f0053f_NS 01 +18070 clk cpu0 IT (18034) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18070 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +18071 clk cpu0 IT (18035) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18071 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18071 clk cpu0 R X8 0000000000000000 +18072 clk cpu0 IT (18036) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18072 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18072 clk cpu0 R X9 0000000000000001 +18073 clk cpu0 IT (18037) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18073 clk cpu0 R cpsr 820003c5 +18074 clk cpu0 IT (18038) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18074 clk cpu0 R X8 0000000000000001 +18075 clk cpu0 IT (18039) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18076 clk cpu0 IT (18040) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18076 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700710 +18076 clk cpu0 R X8 0000000003700710 +18077 clk cpu0 IT (18041) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18077 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18077 clk cpu0 R X9 0000000000000000 +18078 clk cpu0 IT (18042) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18078 clk cpu0 R X10 0000000000000000 +18079 clk cpu0 IT (18043) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18079 clk cpu0 R X10 0000000000000000 +18080 clk cpu0 IT (18044) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18080 clk cpu0 R X8 0000000003700710 +18081 clk cpu0 IT (18045) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18081 clk cpu0 MR1 03700710:000000f00710_NS 00 +18081 clk cpu0 R X9 0000000000000000 +18082 clk cpu0 IT (18046) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18082 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18082 clk cpu0 R X8 0000000003700600 +18083 clk cpu0 IT (18047) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18083 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000010 +18083 clk cpu0 R X8 0000000023000010 +18084 clk cpu0 IT (18048) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18084 clk cpu0 MW1 23000010:000016240010_NS 00 +18085 clk cpu0 IT (18049) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18085 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18085 clk cpu0 R X8 0000000003700600 +18086 clk cpu0 IT (18050) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18086 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000010 +18086 clk cpu0 R X10 0000000023000010 +18087 clk cpu0 IT (18051) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18087 clk cpu0 R X11 0000000000000001 +18088 clk cpu0 IT (18052) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18088 clk cpu0 R X10 0000000023000011 +18089 clk cpu0 IT (18053) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18089 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000011 +18090 clk cpu0 IT (18054) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18090 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18090 clk cpu0 R X8 0000000000000000 +18091 clk cpu0 IT (18055) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18091 clk cpu0 R X8 0000000000000001 +18092 clk cpu0 IT (18056) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18092 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +18093 clk cpu0 IT (18057) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18094 clk cpu0 IT (18058) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18094 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18094 clk cpu0 R X8 0000000000000001 +18095 clk cpu0 IT (18059) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18095 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18095 clk cpu0 R X9 0000000000000001 +18096 clk cpu0 IT (18060) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18096 clk cpu0 R cpsr 620003c5 +18097 clk cpu0 IT (18061) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18097 clk cpu0 R X8 0000000000000000 +18098 clk cpu0 IS (18062) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18099 clk cpu0 IT (18063) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +18100 clk cpu0 IT (18064) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +18100 clk cpu0 R SP_EL1 0000000003700550 +18101 clk cpu0 IT (18065) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +18102 clk cpu0 IT (18066) 00011794:000010011794_NS 3942bfe8 O EL1h_n : LDRB w8,[sp,#0xaf] +18102 clk cpu0 MR1 037005ff:000000f005ff_NS 01 +18102 clk cpu0 R X8 0000000000000001 +18103 clk cpu0 IT (18067) 00011798:000010011798_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +18103 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18103 clk cpu0 R X9 0000000003700700 +18104 clk cpu0 IT (18068) 0001179c:00001001179c_NS f94023ea O EL1h_n : LDR x10,[sp,#0x40] +18104 clk cpu0 MR8 03700590:000000f00590_NS 00000000_00000010 +18104 clk cpu0 R X10 0000000000000010 +18105 clk cpu0 IT (18069) 000117a0:0000100117a0_NS 8b0a0129 O EL1h_n : ADD x9,x9,x10 +18105 clk cpu0 R X9 0000000003700710 +18106 clk cpu0 IT (18070) 000117a4:0000100117a4_NS d280002b O EL1h_n : MOV x11,#1 +18106 clk cpu0 R X11 0000000000000001 +18107 clk cpu0 IT (18071) 000117a8:0000100117a8_NS 39000528 O EL1h_n : STRB w8,[x9,#1] +18107 clk cpu0 MW1 03700711:000000f00711_NS 01 +18108 clk cpu0 IT (18072) 000117ac:0000100117ac_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +18108 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18108 clk cpu0 R X9 0000000003700700 +18109 clk cpu0 IT (18073) 000117b0:0000100117b0_NS 8b0a0129 O EL1h_n : ADD x9,x9,x10 +18109 clk cpu0 R X9 0000000003700710 +18110 clk cpu0 IT (18074) 000117b4:0000100117b4_NS 8b0b0121 O EL1h_n : ADD x1,x9,x11 +18110 clk cpu0 R X1 0000000003700711 +18111 clk cpu0 IT (18075) 000117b8:0000100117b8_NS f94027e0 O EL1h_n : LDR x0,[sp,#0x48] +18111 clk cpu0 MR8 03700598:000000f00598_NS 00000000_03700600 +18111 clk cpu0 R X0 0000000003700600 +18112 clk cpu0 IT (18076) 000117bc:0000100117bc_NS b9403be8 O EL1h_n : LDR w8,[sp,#0x38] +18112 clk cpu0 MR4 03700588:000000f00588_NS 00000001 +18112 clk cpu0 R X8 0000000000000001 +18112 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bf INVAL 0x00001003d7c0_NS +18112 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00bf ALLOC 0x0000100117c0_NS +18112 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 05f0 ALLOC 0x0000100117c0_NS +18113 clk cpu0 IT (18077) 000117c0:0000100117c0_NS 2a0803e2 O EL1h_n : MOV w2,w8 +18113 clk cpu0 R X2 0000000000000001 +18114 clk cpu0 IT (18078) 000117c4:0000100117c4_NS 97ffff85 O EL1h_n : BL 0x115d8 +18114 clk cpu0 R X30 00000000000117C8 +18115 clk cpu0 IT (18079) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +18115 clk cpu0 R SP_EL1 0000000003700530 +18116 clk cpu0 IT (18080) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +18116 clk cpu0 R X8 0000000000000000 +18117 clk cpu0 IT (18081) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +18117 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +18118 clk cpu0 IT (18082) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +18118 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700711 +18119 clk cpu0 IT (18083) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +18119 clk cpu0 MW1 0370053f:000000f0053f_NS 01 +18120 clk cpu0 IT (18084) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18120 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +18121 clk cpu0 IT (18085) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18121 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18121 clk cpu0 R X8 0000000000000000 +18122 clk cpu0 IT (18086) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18122 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18122 clk cpu0 R X9 0000000000000001 +18123 clk cpu0 IT (18087) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18123 clk cpu0 R cpsr 820003c5 +18124 clk cpu0 IT (18088) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18124 clk cpu0 R X8 0000000000000001 +18125 clk cpu0 IT (18089) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18126 clk cpu0 IT (18090) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18126 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700711 +18126 clk cpu0 R X8 0000000003700711 +18127 clk cpu0 IT (18091) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18127 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18127 clk cpu0 R X9 0000000000000000 +18128 clk cpu0 IT (18092) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18128 clk cpu0 R X10 0000000000000000 +18129 clk cpu0 IT (18093) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18129 clk cpu0 R X10 0000000000000000 +18130 clk cpu0 IT (18094) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18130 clk cpu0 R X8 0000000003700711 +18131 clk cpu0 IT (18095) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18131 clk cpu0 MR1 03700711:000000f00711_NS 01 +18131 clk cpu0 R X9 0000000000000001 +18132 clk cpu0 IT (18096) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18132 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18132 clk cpu0 R X8 0000000003700600 +18133 clk cpu0 IT (18097) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18133 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000011 +18133 clk cpu0 R X8 0000000023000011 +18134 clk cpu0 IT (18098) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18134 clk cpu0 MW1 23000011:000016240011_NS 01 +18135 clk cpu0 IT (18099) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18135 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18135 clk cpu0 R X8 0000000003700600 +18136 clk cpu0 IT (18100) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18136 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000011 +18136 clk cpu0 R X10 0000000023000011 +18137 clk cpu0 IT (18101) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18137 clk cpu0 R X11 0000000000000001 +18138 clk cpu0 IT (18102) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18138 clk cpu0 R X10 0000000023000012 +18139 clk cpu0 IT (18103) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18139 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000012 +18140 clk cpu0 IT (18104) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18140 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18140 clk cpu0 R X8 0000000000000000 +18141 clk cpu0 IT (18105) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18141 clk cpu0 R X8 0000000000000001 +18142 clk cpu0 IT (18106) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18142 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +18143 clk cpu0 IT (18107) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18144 clk cpu0 IT (18108) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18144 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18144 clk cpu0 R X8 0000000000000001 +18145 clk cpu0 IT (18109) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18145 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18145 clk cpu0 R X9 0000000000000001 +18146 clk cpu0 IT (18110) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18146 clk cpu0 R cpsr 620003c5 +18147 clk cpu0 IT (18111) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18147 clk cpu0 R X8 0000000000000000 +18148 clk cpu0 IS (18112) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18149 clk cpu0 IT (18113) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +18150 clk cpu0 IT (18114) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +18150 clk cpu0 R SP_EL1 0000000003700550 +18151 clk cpu0 IT (18115) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +18152 clk cpu0 IT (18116) 000117c8:0000100117c8_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +18152 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18152 clk cpu0 R X9 0000000003700700 +18153 clk cpu0 IT (18117) 000117cc:0000100117cc_NS f94023ea O EL1h_n : LDR x10,[sp,#0x40] +18153 clk cpu0 MR8 03700590:000000f00590_NS 00000000_00000010 +18153 clk cpu0 R X10 0000000000000010 +18154 clk cpu0 IT (18118) 000117d0:0000100117d0_NS 8b0a0129 O EL1h_n : ADD x9,x9,x10 +18154 clk cpu0 R X9 0000000003700710 +18155 clk cpu0 IT (18119) 000117d4:0000100117d4_NS d280004b O EL1h_n : MOV x11,#2 +18155 clk cpu0 R X11 0000000000000002 +18156 clk cpu0 IT (18120) 000117d8:0000100117d8_NS b9403fe8 O EL1h_n : LDR w8,[sp,#0x3c] +18156 clk cpu0 MR4 0370058c:000000f0058c_NS 00000000 +18156 clk cpu0 R X8 0000000000000000 +18157 clk cpu0 IT (18121) 000117dc:0000100117dc_NS 39000928 O EL1h_n : STRB w8,[x9,#2] +18157 clk cpu0 MW1 03700712:000000f00712_NS 00 +18158 clk cpu0 IT (18122) 000117e0:0000100117e0_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +18158 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18158 clk cpu0 R X9 0000000003700700 +18159 clk cpu0 IT (18123) 000117e4:0000100117e4_NS 8b0a0129 O EL1h_n : ADD x9,x9,x10 +18159 clk cpu0 R X9 0000000003700710 +18160 clk cpu0 IT (18124) 000117e8:0000100117e8_NS 8b0b0121 O EL1h_n : ADD x1,x9,x11 +18160 clk cpu0 R X1 0000000003700712 +18161 clk cpu0 IT (18125) 000117ec:0000100117ec_NS f94027e0 O EL1h_n : LDR x0,[sp,#0x48] +18161 clk cpu0 MR8 03700598:000000f00598_NS 00000000_03700600 +18161 clk cpu0 R X0 0000000003700600 +18162 clk cpu0 IT (18126) 000117f0:0000100117f0_NS b9403bed O EL1h_n : LDR w13,[sp,#0x38] +18162 clk cpu0 MR4 03700588:000000f00588_NS 00000001 +18162 clk cpu0 R X13 0000000000000001 +18163 clk cpu0 IT (18127) 000117f4:0000100117f4_NS 2a0d03e2 O EL1h_n : MOV w2,w13 +18163 clk cpu0 R X2 0000000000000001 +18164 clk cpu0 IT (18128) 000117f8:0000100117f8_NS 97ffff78 O EL1h_n : BL 0x115d8 +18164 clk cpu0 R X30 00000000000117FC +18165 clk cpu0 IT (18129) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +18165 clk cpu0 R SP_EL1 0000000003700530 +18166 clk cpu0 IT (18130) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +18166 clk cpu0 R X8 0000000000000000 +18167 clk cpu0 IT (18131) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +18167 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +18168 clk cpu0 IT (18132) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +18168 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700712 +18169 clk cpu0 IT (18133) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +18169 clk cpu0 MW1 0370053f:000000f0053f_NS 01 +18170 clk cpu0 IT (18134) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18170 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +18171 clk cpu0 IT (18135) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18171 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18171 clk cpu0 R X8 0000000000000000 +18172 clk cpu0 IT (18136) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18172 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18172 clk cpu0 R X9 0000000000000001 +18173 clk cpu0 IT (18137) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18173 clk cpu0 R cpsr 820003c5 +18174 clk cpu0 IT (18138) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18174 clk cpu0 R X8 0000000000000001 +18175 clk cpu0 IT (18139) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18176 clk cpu0 IT (18140) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18176 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700712 +18176 clk cpu0 R X8 0000000003700712 +18177 clk cpu0 IT (18141) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18177 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18177 clk cpu0 R X9 0000000000000000 +18178 clk cpu0 IT (18142) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18178 clk cpu0 R X10 0000000000000000 +18179 clk cpu0 IT (18143) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18179 clk cpu0 R X10 0000000000000000 +18180 clk cpu0 IT (18144) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18180 clk cpu0 R X8 0000000003700712 +18181 clk cpu0 IT (18145) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18181 clk cpu0 MR1 03700712:000000f00712_NS 00 +18181 clk cpu0 R X9 0000000000000000 +18182 clk cpu0 IT (18146) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18182 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18182 clk cpu0 R X8 0000000003700600 +18183 clk cpu0 IT (18147) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18183 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000012 +18183 clk cpu0 R X8 0000000023000012 +18184 clk cpu0 IT (18148) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18184 clk cpu0 MW1 23000012:000016240012_NS 00 +18185 clk cpu0 IT (18149) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18185 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18185 clk cpu0 R X8 0000000003700600 +18186 clk cpu0 IT (18150) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18186 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000012 +18186 clk cpu0 R X10 0000000023000012 +18187 clk cpu0 IT (18151) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18187 clk cpu0 R X11 0000000000000001 +18188 clk cpu0 IT (18152) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18188 clk cpu0 R X10 0000000023000013 +18189 clk cpu0 IT (18153) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18189 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000013 +18190 clk cpu0 IT (18154) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18190 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18190 clk cpu0 R X8 0000000000000000 +18191 clk cpu0 IT (18155) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18191 clk cpu0 R X8 0000000000000001 +18192 clk cpu0 IT (18156) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18192 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +18193 clk cpu0 IT (18157) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18194 clk cpu0 IT (18158) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18194 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18194 clk cpu0 R X8 0000000000000001 +18195 clk cpu0 IT (18159) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18195 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18195 clk cpu0 R X9 0000000000000001 +18196 clk cpu0 IT (18160) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18196 clk cpu0 R cpsr 620003c5 +18197 clk cpu0 IT (18161) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18197 clk cpu0 R X8 0000000000000000 +18198 clk cpu0 IS (18162) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18199 clk cpu0 IT (18163) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +18200 clk cpu0 IT (18164) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +18200 clk cpu0 R SP_EL1 0000000003700550 +18201 clk cpu0 IT (18165) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +18202 clk cpu0 IT (18166) 000117fc:0000100117fc_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +18202 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18202 clk cpu0 R X9 0000000003700700 +18202 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 INVAL 0x000010015800 +18202 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c0 ALLOC 0x000010011800_NS +18202 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0600 ALLOC 0x000010011800_NS +18203 clk cpu0 IT (18167) 00011800:000010011800_NS f94023ea O EL1h_n : LDR x10,[sp,#0x40] +18203 clk cpu0 MR8 03700590:000000f00590_NS 00000000_00000010 +18203 clk cpu0 R X10 0000000000000010 +18204 clk cpu0 IT (18168) 00011804:000010011804_NS 8b0a0129 O EL1h_n : ADD x9,x9,x10 +18204 clk cpu0 R X9 0000000003700710 +18205 clk cpu0 IT (18169) 00011808:000010011808_NS d280006b O EL1h_n : MOV x11,#3 +18205 clk cpu0 R X11 0000000000000003 +18206 clk cpu0 IT (18170) 0001180c:00001001180c_NS b9403fe8 O EL1h_n : LDR w8,[sp,#0x3c] +18206 clk cpu0 MR4 0370058c:000000f0058c_NS 00000000 +18206 clk cpu0 R X8 0000000000000000 +18207 clk cpu0 IT (18171) 00011810:000010011810_NS 39000d28 O EL1h_n : STRB w8,[x9,#3] +18207 clk cpu0 MW1 03700713:000000f00713_NS 00 +18208 clk cpu0 IT (18172) 00011814:000010011814_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +18208 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18208 clk cpu0 R X9 0000000003700700 +18209 clk cpu0 IT (18173) 00011818:000010011818_NS 8b0a0129 O EL1h_n : ADD x9,x9,x10 +18209 clk cpu0 R X9 0000000003700710 +18210 clk cpu0 IT (18174) 0001181c:00001001181c_NS 8b0b0121 O EL1h_n : ADD x1,x9,x11 +18210 clk cpu0 R X1 0000000003700713 +18211 clk cpu0 IT (18175) 00011820:000010011820_NS f94027e0 O EL1h_n : LDR x0,[sp,#0x48] +18211 clk cpu0 MR8 03700598:000000f00598_NS 00000000_03700600 +18211 clk cpu0 R X0 0000000003700600 +18212 clk cpu0 IT (18176) 00011824:000010011824_NS b9403be2 O EL1h_n : LDR w2,[sp,#0x38] +18212 clk cpu0 MR4 03700588:000000f00588_NS 00000001 +18212 clk cpu0 R X2 0000000000000001 +18213 clk cpu0 IT (18177) 00011828:000010011828_NS 97ffff6c O EL1h_n : BL 0x115d8 +18213 clk cpu0 R X30 000000000001182C +18214 clk cpu0 IT (18178) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +18214 clk cpu0 R SP_EL1 0000000003700530 +18215 clk cpu0 IT (18179) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +18215 clk cpu0 R X8 0000000000000000 +18216 clk cpu0 IT (18180) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +18216 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +18217 clk cpu0 IT (18181) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +18217 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700713 +18218 clk cpu0 IT (18182) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +18218 clk cpu0 MW1 0370053f:000000f0053f_NS 01 +18219 clk cpu0 IT (18183) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18219 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +18220 clk cpu0 IT (18184) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18220 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18220 clk cpu0 R X8 0000000000000000 +18221 clk cpu0 IT (18185) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18221 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18221 clk cpu0 R X9 0000000000000001 +18222 clk cpu0 IT (18186) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18222 clk cpu0 R cpsr 820003c5 +18223 clk cpu0 IT (18187) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18223 clk cpu0 R X8 0000000000000001 +18224 clk cpu0 IT (18188) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18225 clk cpu0 IT (18189) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18225 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700713 +18225 clk cpu0 R X8 0000000003700713 +18226 clk cpu0 IT (18190) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18226 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18226 clk cpu0 R X9 0000000000000000 +18227 clk cpu0 IT (18191) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18227 clk cpu0 R X10 0000000000000000 +18228 clk cpu0 IT (18192) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18228 clk cpu0 R X10 0000000000000000 +18229 clk cpu0 IT (18193) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18229 clk cpu0 R X8 0000000003700713 +18230 clk cpu0 IT (18194) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18230 clk cpu0 MR1 03700713:000000f00713_NS 00 +18230 clk cpu0 R X9 0000000000000000 +18231 clk cpu0 IT (18195) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18231 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18231 clk cpu0 R X8 0000000003700600 +18232 clk cpu0 IT (18196) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18232 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000013 +18232 clk cpu0 R X8 0000000023000013 +18233 clk cpu0 IT (18197) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18233 clk cpu0 MW1 23000013:000016240013_NS 00 +18234 clk cpu0 IT (18198) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18234 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18234 clk cpu0 R X8 0000000003700600 +18235 clk cpu0 IT (18199) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18235 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000013 +18235 clk cpu0 R X10 0000000023000013 +18236 clk cpu0 IT (18200) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18236 clk cpu0 R X11 0000000000000001 +18237 clk cpu0 IT (18201) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18237 clk cpu0 R X10 0000000023000014 +18238 clk cpu0 IT (18202) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18238 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000014 +18239 clk cpu0 IT (18203) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18239 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18239 clk cpu0 R X8 0000000000000000 +18240 clk cpu0 IT (18204) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18240 clk cpu0 R X8 0000000000000001 +18241 clk cpu0 IT (18205) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18241 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +18242 clk cpu0 IT (18206) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18243 clk cpu0 IT (18207) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18243 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18243 clk cpu0 R X8 0000000000000001 +18244 clk cpu0 IT (18208) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18244 clk cpu0 MR1 0370053f:000000f0053f_NS 01 +18244 clk cpu0 R X9 0000000000000001 +18245 clk cpu0 IT (18209) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18245 clk cpu0 R cpsr 620003c5 +18246 clk cpu0 IT (18210) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18246 clk cpu0 R X8 0000000000000000 +18247 clk cpu0 IS (18211) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18248 clk cpu0 IT (18212) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +18249 clk cpu0 IT (18213) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +18249 clk cpu0 R SP_EL1 0000000003700550 +18250 clk cpu0 IT (18214) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +18251 clk cpu0 IT (18215) 0001182c:00001001182c_NS f9404fe0 O EL1h_n : LDR x0,[sp,#0x98] +18251 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000000 +18251 clk cpu0 R X0 0000000000000000 +18252 clk cpu0 IT (18216) 00011830:000010011830_NS f9404be1 O EL1h_n : LDR x1,[sp,#0x90] +18252 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000001 +18252 clk cpu0 R X1 0000000000000001 +18253 clk cpu0 IT (18217) 00011834:000010011834_NS 94024ce6 O EL1h_n : BL 0xa4bcc +18253 clk cpu0 R X30 0000000000011838 +18254 clk cpu0 IT (18218) 000a4bcc:0000100a4bcc_NS f100041f O EL1h_n : CMP x0,#1 +18254 clk cpu0 R cpsr 820003c5 +18255 clk cpu0 IT (18219) 000a4bd0:0000100a4bd0_NS 5400006b O EL1h_n : B.LT 0xa4bdc +18256 clk cpu0 IT (18220) 000a4bdc:0000100a4bdc_NS d28000e0 O EL1h_n : MOV x0,#7 +18256 clk cpu0 R X0 0000000000000007 +18257 clk cpu0 IT (18221) 000a4be0:0000100a4be0_NS f2a00580 O EL1h_n : MOVK x0,#0x2c,LSL #16 +18257 clk cpu0 R X0 00000000002C0007 +18258 clk cpu0 IT (18222) 000a4be4:0000100a4be4_NS aa0103e2 O EL1h_n : MOV x2,x1 +18258 clk cpu0 R X2 0000000000000001 +18259 clk cpu0 IT (18223) 000a4be8:0000100a4be8_NS d40000e1 O EL1h_n : SVC #7 +18259 clk cpu0 E 000a4be8:0000100a4be8_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +18259 clk cpu0 R cpsr 820003c5 +18259 clk cpu0 R PMBIDR_EL1 00000030 +18259 clk cpu0 R ESR_EL1 56000007 +18259 clk cpu0 R SPSR_EL1 820003c5 +18259 clk cpu0 R TRBIDR_EL1 000000000000002b +18259 clk cpu0 R ELR_EL1 00000000000a4bec +18260 clk cpu0 IT (18224) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +18261 clk cpu0 IT (18225) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +18261 clk cpu0 R SP_EL1 0000000003700450 +18262 clk cpu0 IT (18226) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +18262 clk cpu0 MW8 03700450:000000f00450_NS 00000000_002c0007 +18262 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00000001 +18263 clk cpu0 IT (18227) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +18263 clk cpu0 R X0 0000000056000007 +18264 clk cpu0 IT (18228) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +18264 clk cpu0 R X1 0000000000000015 +18265 clk cpu0 IT (18229) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +18265 clk cpu0 R cpsr 620003c5 +18266 clk cpu0 IT (18230) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +18267 clk cpu0 IT (18231) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +18267 clk cpu0 R X1 0000000000000007 +18268 clk cpu0 IT (18232) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +18268 clk cpu0 R cpsr 220003c5 +18269 clk cpu0 IS (18233) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +18270 clk cpu0 IT (18234) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +18270 clk cpu0 R cpsr 820003c5 +18271 clk cpu0 IS (18235) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +18272 clk cpu0 IT (18236) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +18272 clk cpu0 R cpsr 820003c5 +18273 clk cpu0 IS (18237) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +18274 clk cpu0 IT (18238) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +18274 clk cpu0 R cpsr 620003c5 +18275 clk cpu0 IT (18239) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +18276 clk cpu0 IT (18240) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +18276 clk cpu0 MR8 03700450:000000f00450_NS 00000000_002c0007 +18276 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00000001 +18276 clk cpu0 R X0 00000000002C0007 +18276 clk cpu0 R X1 0000000000000001 +18277 clk cpu0 IT (18241) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +18277 clk cpu0 R SP_EL1 0000000003700550 +18278 clk cpu0 IT (18242) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +18278 clk cpu0 R cpsr 820003c5 +18279 clk cpu0 IT (18243) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +18280 clk cpu0 IT (18244) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +18280 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000000 +18280 clk cpu0 MW8 03700548:000000f00548_NS f800f800_f800f800 +18280 clk cpu0 R SP_EL1 0000000003700540 +18281 clk cpu0 IT (18245) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +18281 clk cpu0 MW8 03700530:000000f00530_NS 00000000_002c0007 +18281 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00000001 +18281 clk cpu0 R SP_EL1 0000000003700530 +18282 clk cpu0 IT (18246) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +18282 clk cpu0 R X5 0000000000000000 +18283 clk cpu0 IT (18247) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +18283 clk cpu0 R X1 0000000000000000 +18284 clk cpu0 IT (18248) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +18284 clk cpu0 R cpsr 820003c5 +18285 clk cpu0 IT (18249) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +18285 clk cpu0 MR8 03700530:000000f00530_NS 00000000_002c0007 +18285 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00000001 +18285 clk cpu0 R SP_EL1 0000000003700540 +18285 clk cpu0 R X0 00000000002C0007 +18285 clk cpu0 R X1 0000000000000001 +18286 clk cpu0 IT (18250) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +18287 clk cpu0 IT (18251) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +18287 clk cpu0 MW8 03700530:000000f00530_NS 00000000_90000000 +18287 clk cpu0 MW8 03700538:000000f00538_NS 03ff8000_03ff8000 +18287 clk cpu0 R SP_EL1 0000000003700530 +18288 clk cpu0 IT (18252) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +18288 clk cpu0 R X6 0000000000000001 +18289 clk cpu0 IT (18253) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +18289 clk cpu0 MW8 03700520:000000f00520_NS 00000000_00000001 +18289 clk cpu0 MW8 03700528:000000f00528_NS 00000000_00000001 +18289 clk cpu0 R SP_EL1 0000000003700520 +18290 clk cpu0 IT (18254) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +18290 clk cpu0 MW8 03700510:000000f00510_NS ffffffff_fe00000f +18290 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00011838 +18290 clk cpu0 R SP_EL1 0000000003700510 +18291 clk cpu0 IT (18255) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +18291 clk cpu0 R X3 0000000000000000 +18292 clk cpu0 IT (18256) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +18292 clk cpu0 R cpsr 820003c5 +18293 clk cpu0 IS (18257) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +18294 clk cpu0 IT (18258) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +18294 clk cpu0 R X3 0000000000000000 +18295 clk cpu0 IT (18259) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +18295 clk cpu0 R cpsr 820003c5 +18296 clk cpu0 IS (18260) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +18297 clk cpu0 IT (18261) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +18297 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +18297 clk cpu0 R X2 0000000000035A00 +18298 clk cpu0 IT (18262) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +18299 clk cpu0 IT (18263) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +18299 clk cpu0 R X3 0000000000000058 +18300 clk cpu0 IT (18264) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +18300 clk cpu0 R X3 0000000000000058 +18301 clk cpu0 IT (18265) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +18301 clk cpu0 R X3 00000000000002C0 +18302 clk cpu0 IT (18266) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +18302 clk cpu0 R X2 0000000000035CC0 +18303 clk cpu0 IT (18267) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +18303 clk cpu0 MR8 00035cc0:000010035cc0_NS 00000000_00036de4 +18303 clk cpu0 R X4 0000000000036DE4 +18304 clk cpu0 IT (18268) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +18304 clk cpu0 R cpsr 82000bc5 +18304 clk cpu0 R X30 0000000000035990 +18305 clk cpu0 IT (18269) 00036de4:000010036de4_NS d5389b20 O EL1h_n : MRS x0,s3_0_c9_c11_1 +18305 clk cpu0 R cpsr 820003c5 +18305 clk cpu0 R X0 0000000023002399 +18306 clk cpu0 IT (18270) 00036de8:000010036de8_NS f14008bf O EL1h_n : CMP x5,#2,LSL #12 +18306 clk cpu0 R cpsr 820003c5 +18307 clk cpu0 IT (18271) 00036dec:000010036dec_NS 54000041 O EL1h_n : B.NE 0x36df4 +18308 clk cpu0 IT (18272) 00036df4:000010036df4_NS d65f03c0 O EL1h_n : RET +18309 clk cpu0 IT (18273) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +18309 clk cpu0 MR8 03700510:000000f00510_NS ffffffff_fe00000f +18309 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00011838 +18309 clk cpu0 R SP_EL1 0000000003700520 +18309 clk cpu0 R X29 FFFFFFFFFE00000F +18309 clk cpu0 R X30 0000000000011838 +18310 clk cpu0 IT (18274) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +18310 clk cpu0 MR8 03700520:000000f00520_NS 00000000_00000001 +18310 clk cpu0 MR8 03700528:000000f00528_NS 00000000_00000001 +18310 clk cpu0 R SP_EL1 0000000003700530 +18310 clk cpu0 R X2 0000000000000001 +18310 clk cpu0 R X3 0000000000000001 +18311 clk cpu0 IT (18275) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +18311 clk cpu0 MR8 03700530:000000f00530_NS 00000000_90000000 +18311 clk cpu0 MR8 03700538:000000f00538_NS 03ff8000_03ff8000 +18311 clk cpu0 R SP_EL1 0000000003700540 +18311 clk cpu0 R X6 0000000090000000 +18311 clk cpu0 R X7 03FF800003FF8000 +18312 clk cpu0 IT (18276) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +18312 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00000000 +18312 clk cpu0 MR8 03700548:000000f00548_NS f800f800_f800f800 +18312 clk cpu0 R SP_EL1 0000000003700550 +18312 clk cpu0 R X4 0000000000000000 +18312 clk cpu0 R X5 F800F800F800F800 +18313 clk cpu0 IT (18277) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +18313 clk cpu0 R cpsr 820003c5 +18313 clk cpu0 R PMBIDR_EL1 00000030 +18313 clk cpu0 R TRBIDR_EL1 000000000000002b +18314 clk cpu0 IT (18278) 000a4bec:0000100a4bec_NS d65f03c0 O EL1h_n : RET +18315 clk cpu0 IT (18279) 00011838:000010011838_NS f9404fe9 O EL1h_n : LDR x9,[sp,#0x98] +18315 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000000 +18315 clk cpu0 R X9 0000000000000000 +18316 clk cpu0 IT (18280) 0001183c:00001001183c_NS f9404be1 O EL1h_n : LDR x1,[sp,#0x90] +18316 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000001 +18316 clk cpu0 R X1 0000000000000001 +18316 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c3 INVAL 0x000010035840_NS +18316 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c3 ALLOC 0x000010011840_NS +18316 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0610 ALLOC 0x000010011840_NS +18317 clk cpu0 IT (18281) 00011840:000010011840_NS f9001be0 O EL1h_n : STR x0,[sp,#0x30] +18317 clk cpu0 MW8 03700580:000000f00580_NS 00000000_23002399 +18318 clk cpu0 IT (18282) 00011844:000010011844_NS aa0903e0 O EL1h_n : MOV x0,x9 +18318 clk cpu0 R X0 0000000000000000 +18319 clk cpu0 IT (18283) 00011848:000010011848_NS 94024cfb O EL1h_n : BL 0xa4c34 +18319 clk cpu0 R X30 000000000001184C +18320 clk cpu0 IT (18284) 000a4c34:0000100a4c34_NS f100041f O EL1h_n : CMP x0,#1 +18320 clk cpu0 R cpsr 820003c5 +18321 clk cpu0 IT (18285) 000a4c38:0000100a4c38_NS 5400006b O EL1h_n : B.LT 0xa4c44 +18322 clk cpu0 IT (18286) 000a4c44:0000100a4c44_NS d28000e0 O EL1h_n : MOV x0,#7 +18322 clk cpu0 R X0 0000000000000007 +18323 clk cpu0 IT (18287) 000a4c48:0000100a4c48_NS f2a005a0 O EL1h_n : MOVK x0,#0x2d,LSL #16 +18323 clk cpu0 R X0 00000000002D0007 +18324 clk cpu0 IT (18288) 000a4c4c:0000100a4c4c_NS aa0103e2 O EL1h_n : MOV x2,x1 +18324 clk cpu0 R X2 0000000000000001 +18325 clk cpu0 IT (18289) 000a4c50:0000100a4c50_NS d40000e1 O EL1h_n : SVC #7 +18325 clk cpu0 E 000a4c50:0000100a4c50_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +18325 clk cpu0 R cpsr 820003c5 +18325 clk cpu0 R PMBIDR_EL1 00000030 +18325 clk cpu0 R ESR_EL1 56000007 +18325 clk cpu0 R SPSR_EL1 820003c5 +18325 clk cpu0 R TRBIDR_EL1 000000000000002b +18325 clk cpu0 R ELR_EL1 00000000000a4c54 +18326 clk cpu0 IT (18290) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +18327 clk cpu0 IT (18291) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +18327 clk cpu0 R SP_EL1 0000000003700450 +18328 clk cpu0 IT (18292) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +18328 clk cpu0 MW8 03700450:000000f00450_NS 00000000_002d0007 +18328 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00000001 +18329 clk cpu0 IT (18293) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +18329 clk cpu0 R X0 0000000056000007 +18330 clk cpu0 IT (18294) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +18330 clk cpu0 R X1 0000000000000015 +18331 clk cpu0 IT (18295) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +18331 clk cpu0 R cpsr 620003c5 +18332 clk cpu0 IT (18296) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +18333 clk cpu0 IT (18297) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +18333 clk cpu0 R X1 0000000000000007 +18334 clk cpu0 IT (18298) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +18334 clk cpu0 R cpsr 220003c5 +18335 clk cpu0 IS (18299) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +18336 clk cpu0 IT (18300) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +18336 clk cpu0 R cpsr 820003c5 +18337 clk cpu0 IS (18301) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +18338 clk cpu0 IT (18302) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +18338 clk cpu0 R cpsr 820003c5 +18339 clk cpu0 IS (18303) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +18339 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 INVAL 0x000010015840 +18339 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 ALLOC 0x000010035840_NS +18340 clk cpu0 IT (18304) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +18340 clk cpu0 R cpsr 620003c5 +18341 clk cpu0 IT (18305) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +18342 clk cpu0 IT (18306) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +18342 clk cpu0 MR8 03700450:000000f00450_NS 00000000_002d0007 +18342 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00000001 +18342 clk cpu0 R X0 00000000002D0007 +18342 clk cpu0 R X1 0000000000000001 +18343 clk cpu0 IT (18307) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +18343 clk cpu0 R SP_EL1 0000000003700550 +18344 clk cpu0 IT (18308) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +18344 clk cpu0 R cpsr 820003c5 +18345 clk cpu0 IT (18309) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +18346 clk cpu0 IT (18310) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +18346 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000000 +18346 clk cpu0 MW8 03700548:000000f00548_NS f800f800_f800f800 +18346 clk cpu0 R SP_EL1 0000000003700540 +18347 clk cpu0 IT (18311) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +18347 clk cpu0 MW8 03700530:000000f00530_NS 00000000_002d0007 +18347 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00000001 +18347 clk cpu0 R SP_EL1 0000000003700530 +18348 clk cpu0 IT (18312) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +18348 clk cpu0 R X5 0000000000000000 +18349 clk cpu0 IT (18313) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +18349 clk cpu0 R X1 0000000000000000 +18350 clk cpu0 IT (18314) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +18350 clk cpu0 R cpsr 820003c5 +18351 clk cpu0 IT (18315) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +18351 clk cpu0 MR8 03700530:000000f00530_NS 00000000_002d0007 +18351 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00000001 +18351 clk cpu0 R SP_EL1 0000000003700540 +18351 clk cpu0 R X0 00000000002D0007 +18351 clk cpu0 R X1 0000000000000001 +18352 clk cpu0 IT (18316) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +18353 clk cpu0 IT (18317) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +18353 clk cpu0 MW8 03700530:000000f00530_NS 00000000_90000000 +18353 clk cpu0 MW8 03700538:000000f00538_NS 03ff8000_03ff8000 +18353 clk cpu0 R SP_EL1 0000000003700530 +18354 clk cpu0 IT (18318) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +18354 clk cpu0 R X6 0000000000000001 +18355 clk cpu0 IT (18319) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +18355 clk cpu0 MW8 03700520:000000f00520_NS 00000000_00000001 +18355 clk cpu0 MW8 03700528:000000f00528_NS 00000000_00000001 +18355 clk cpu0 R SP_EL1 0000000003700520 +18356 clk cpu0 IT (18320) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +18356 clk cpu0 MW8 03700510:000000f00510_NS ffffffff_fe00000f +18356 clk cpu0 MW8 03700518:000000f00518_NS 00000000_0001184c +18356 clk cpu0 R SP_EL1 0000000003700510 +18357 clk cpu0 IT (18321) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +18357 clk cpu0 R X3 0000000000000000 +18358 clk cpu0 IT (18322) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +18358 clk cpu0 R cpsr 820003c5 +18359 clk cpu0 IS (18323) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +18360 clk cpu0 IT (18324) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +18360 clk cpu0 R X3 0000000000000000 +18361 clk cpu0 IT (18325) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +18361 clk cpu0 R cpsr 820003c5 +18362 clk cpu0 IS (18326) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +18363 clk cpu0 IT (18327) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +18363 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +18363 clk cpu0 R X2 0000000000035A00 +18364 clk cpu0 IT (18328) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +18365 clk cpu0 IT (18329) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +18365 clk cpu0 R X3 000000000000005A +18366 clk cpu0 IT (18330) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +18366 clk cpu0 R X3 000000000000005A +18367 clk cpu0 IT (18331) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +18367 clk cpu0 R X3 00000000000002D0 +18368 clk cpu0 IT (18332) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +18368 clk cpu0 R X2 0000000000035CD0 +18369 clk cpu0 IT (18333) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +18369 clk cpu0 MR8 00035cd0:000010035cd0_NS 00000000_00036e1c +18369 clk cpu0 R X4 0000000000036E1C +18370 clk cpu0 IT (18334) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +18370 clk cpu0 R cpsr 82000bc5 +18370 clk cpu0 R X30 0000000000035990 +18371 clk cpu0 IT (18335) 00036e1c:000010036e1c_NS d5389b40 O EL1h_n : MRS x0,s3_0_c9_c11_2 +18371 clk cpu0 R cpsr 820003c5 +18371 clk cpu0 R X0 0000000023002000 +18372 clk cpu0 IT (18336) 00036e20:000010036e20_NS f14008bf O EL1h_n : CMP x5,#2,LSL #12 +18372 clk cpu0 R cpsr 820003c5 +18373 clk cpu0 IT (18337) 00036e24:000010036e24_NS 54000041 O EL1h_n : B.NE 0x36e2c +18374 clk cpu0 IT (18338) 00036e2c:000010036e2c_NS d65f03c0 O EL1h_n : RET +18375 clk cpu0 IT (18339) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +18375 clk cpu0 MR8 03700510:000000f00510_NS ffffffff_fe00000f +18375 clk cpu0 MR8 03700518:000000f00518_NS 00000000_0001184c +18375 clk cpu0 R SP_EL1 0000000003700520 +18375 clk cpu0 R X29 FFFFFFFFFE00000F +18375 clk cpu0 R X30 000000000001184C +18376 clk cpu0 IT (18340) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +18376 clk cpu0 MR8 03700520:000000f00520_NS 00000000_00000001 +18376 clk cpu0 MR8 03700528:000000f00528_NS 00000000_00000001 +18376 clk cpu0 R SP_EL1 0000000003700530 +18376 clk cpu0 R X2 0000000000000001 +18376 clk cpu0 R X3 0000000000000001 +18377 clk cpu0 IT (18341) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +18377 clk cpu0 MR8 03700530:000000f00530_NS 00000000_90000000 +18377 clk cpu0 MR8 03700538:000000f00538_NS 03ff8000_03ff8000 +18377 clk cpu0 R SP_EL1 0000000003700540 +18377 clk cpu0 R X6 0000000090000000 +18377 clk cpu0 R X7 03FF800003FF8000 +18378 clk cpu0 IT (18342) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +18378 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00000000 +18378 clk cpu0 MR8 03700548:000000f00548_NS f800f800_f800f800 +18378 clk cpu0 R SP_EL1 0000000003700550 +18378 clk cpu0 R X4 0000000000000000 +18378 clk cpu0 R X5 F800F800F800F800 +18379 clk cpu0 IT (18343) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +18379 clk cpu0 R cpsr 820003c5 +18379 clk cpu0 R PMBIDR_EL1 00000030 +18379 clk cpu0 R TRBIDR_EL1 000000000000002b +18380 clk cpu0 IT (18344) 000a4c54:0000100a4c54_NS d65f03c0 O EL1h_n : RET +18381 clk cpu0 IT (18345) 0001184c:00001001184c_NS f9401be9 O EL1h_n : LDR x9,[sp,#0x30] +18381 clk cpu0 MR8 03700580:000000f00580_NS 00000000_23002399 +18381 clk cpu0 R X9 0000000023002399 +18382 clk cpu0 IT (18346) 00011850:000010011850_NS eb00012a O EL1h_n : SUBS x10,x9,x0 +18382 clk cpu0 R cpsr 220003c5 +18382 clk cpu0 R X10 0000000000000399 +18383 clk cpu0 IT (18347) 00011854:000010011854_NS f9405feb O EL1h_n : LDR x11,[sp,#0xb8] +18383 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18383 clk cpu0 R X11 0000000003700700 +18384 clk cpu0 IT (18348) 00011858:000010011858_NS f94023ec O EL1h_n : LDR x12,[sp,#0x40] +18384 clk cpu0 MR8 03700590:000000f00590_NS 00000000_00000010 +18384 clk cpu0 R X12 0000000000000010 +18385 clk cpu0 IT (18349) 0001185c:00001001185c_NS 8b0c016b O EL1h_n : ADD x11,x11,x12 +18385 clk cpu0 R X11 0000000003700710 +18386 clk cpu0 IT (18350) 00011860:000010011860_NS d280008e O EL1h_n : MOV x14,#4 +18386 clk cpu0 R X14 0000000000000004 +18387 clk cpu0 IT (18351) 00011864:000010011864_NS 7900096a O EL1h_n : STRH w10,[x11,#4] +18387 clk cpu0 MW2 03700714:000000f00714_NS 0399 +18388 clk cpu0 IT (18352) 00011868:000010011868_NS f9405feb O EL1h_n : LDR x11,[sp,#0xb8] +18388 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18388 clk cpu0 R X11 0000000003700700 +18389 clk cpu0 IT (18353) 0001186c:00001001186c_NS 8b0c016b O EL1h_n : ADD x11,x11,x12 +18389 clk cpu0 R X11 0000000003700710 +18390 clk cpu0 IT (18354) 00011870:000010011870_NS 8b0e0161 O EL1h_n : ADD x1,x11,x14 +18390 clk cpu0 R X1 0000000003700714 +18391 clk cpu0 IT (18355) 00011874:000010011874_NS f94027e0 O EL1h_n : LDR x0,[sp,#0x48] +18391 clk cpu0 MR8 03700598:000000f00598_NS 00000000_03700600 +18391 clk cpu0 R X0 0000000003700600 +18392 clk cpu0 IT (18356) 00011878:000010011878_NS 52800042 O EL1h_n : MOV w2,#2 +18392 clk cpu0 R X2 0000000000000002 +18393 clk cpu0 IT (18357) 0001187c:00001001187c_NS 97ffff57 O EL1h_n : BL 0x115d8 +18393 clk cpu0 R X30 0000000000011880 +18394 clk cpu0 IT (18358) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +18394 clk cpu0 R SP_EL1 0000000003700530 +18395 clk cpu0 IT (18359) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +18395 clk cpu0 R X8 0000000000000000 +18396 clk cpu0 IT (18360) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +18396 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +18397 clk cpu0 IT (18361) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +18397 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700714 +18398 clk cpu0 IT (18362) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +18398 clk cpu0 MW1 0370053f:000000f0053f_NS 02 +18399 clk cpu0 IT (18363) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18399 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +18400 clk cpu0 IT (18364) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18400 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18400 clk cpu0 R X8 0000000000000000 +18401 clk cpu0 IT (18365) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18401 clk cpu0 MR1 0370053f:000000f0053f_NS 02 +18401 clk cpu0 R X9 0000000000000002 +18402 clk cpu0 IT (18366) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18402 clk cpu0 R cpsr 820003c5 +18403 clk cpu0 IT (18367) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18403 clk cpu0 R X8 0000000000000001 +18404 clk cpu0 IT (18368) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18405 clk cpu0 IT (18369) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18405 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700714 +18405 clk cpu0 R X8 0000000003700714 +18406 clk cpu0 IT (18370) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18406 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18406 clk cpu0 R X9 0000000000000000 +18407 clk cpu0 IT (18371) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18407 clk cpu0 R X10 0000000000000000 +18408 clk cpu0 IT (18372) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18408 clk cpu0 R X10 0000000000000000 +18409 clk cpu0 IT (18373) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18409 clk cpu0 R X8 0000000003700714 +18410 clk cpu0 IT (18374) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18410 clk cpu0 MR1 03700714:000000f00714_NS 99 +18410 clk cpu0 R X9 0000000000000099 +18411 clk cpu0 IT (18375) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18411 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18411 clk cpu0 R X8 0000000003700600 +18412 clk cpu0 IT (18376) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18412 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000014 +18412 clk cpu0 R X8 0000000023000014 +18413 clk cpu0 IT (18377) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18413 clk cpu0 MW1 23000014:000016240014_NS 99 +18414 clk cpu0 IT (18378) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18414 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18414 clk cpu0 R X8 0000000003700600 +18415 clk cpu0 IT (18379) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18415 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000014 +18415 clk cpu0 R X10 0000000023000014 +18416 clk cpu0 IT (18380) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18416 clk cpu0 R X11 0000000000000001 +18417 clk cpu0 IT (18381) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18417 clk cpu0 R X10 0000000023000015 +18418 clk cpu0 IT (18382) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18418 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000015 +18419 clk cpu0 IT (18383) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18419 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18419 clk cpu0 R X8 0000000000000000 +18420 clk cpu0 IT (18384) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18420 clk cpu0 R X8 0000000000000001 +18421 clk cpu0 IT (18385) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18421 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +18422 clk cpu0 IT (18386) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18423 clk cpu0 IT (18387) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18423 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18423 clk cpu0 R X8 0000000000000001 +18424 clk cpu0 IT (18388) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18424 clk cpu0 MR1 0370053f:000000f0053f_NS 02 +18424 clk cpu0 R X9 0000000000000002 +18425 clk cpu0 IT (18389) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18425 clk cpu0 R cpsr 820003c5 +18426 clk cpu0 IT (18390) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18426 clk cpu0 R X8 0000000000000001 +18427 clk cpu0 IT (18391) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18428 clk cpu0 IT (18392) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18428 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700714 +18428 clk cpu0 R X8 0000000003700714 +18429 clk cpu0 IT (18393) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18429 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18429 clk cpu0 R X9 0000000000000001 +18430 clk cpu0 IT (18394) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18430 clk cpu0 R X10 0000000000000001 +18431 clk cpu0 IT (18395) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18431 clk cpu0 R X10 0000000000000001 +18432 clk cpu0 IT (18396) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18432 clk cpu0 R X8 0000000003700715 +18433 clk cpu0 IT (18397) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18433 clk cpu0 MR1 03700715:000000f00715_NS 03 +18433 clk cpu0 R X9 0000000000000003 +18434 clk cpu0 IT (18398) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18434 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18434 clk cpu0 R X8 0000000003700600 +18435 clk cpu0 IT (18399) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18435 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000015 +18435 clk cpu0 R X8 0000000023000015 +18436 clk cpu0 IT (18400) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18436 clk cpu0 MW1 23000015:000016240015_NS 03 +18437 clk cpu0 IT (18401) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18437 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18437 clk cpu0 R X8 0000000003700600 +18438 clk cpu0 IT (18402) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18438 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000015 +18438 clk cpu0 R X10 0000000023000015 +18439 clk cpu0 IT (18403) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18439 clk cpu0 R X11 0000000000000001 +18440 clk cpu0 IT (18404) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18440 clk cpu0 R X10 0000000023000016 +18441 clk cpu0 IT (18405) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18441 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000016 +18442 clk cpu0 IT (18406) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18442 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18442 clk cpu0 R X8 0000000000000001 +18443 clk cpu0 IT (18407) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18443 clk cpu0 R X8 0000000000000002 +18444 clk cpu0 IT (18408) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18444 clk cpu0 MW1 0370053e:000000f0053e_NS 02 +18445 clk cpu0 IT (18409) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18446 clk cpu0 IT (18410) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18446 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +18446 clk cpu0 R X8 0000000000000002 +18447 clk cpu0 IT (18411) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18447 clk cpu0 MR1 0370053f:000000f0053f_NS 02 +18447 clk cpu0 R X9 0000000000000002 +18448 clk cpu0 IT (18412) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18448 clk cpu0 R cpsr 620003c5 +18449 clk cpu0 IT (18413) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18449 clk cpu0 R X8 0000000000000000 +18450 clk cpu0 IS (18414) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18451 clk cpu0 IT (18415) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +18452 clk cpu0 IT (18416) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +18452 clk cpu0 R SP_EL1 0000000003700550 +18453 clk cpu0 IT (18417) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +18453 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c5 INVAL 0x000010035880_NS +18453 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c5 ALLOC 0x000010011880_NS +18453 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0620 ALLOC 0x000010011880_NS +18454 clk cpu0 IT (18418) 00011880:000010011880_NS 52800008 O EL1h_n : MOV w8,#0 +18454 clk cpu0 R X8 0000000000000000 +18455 clk cpu0 IT (18419) 00011884:000010011884_NS 790107e8 O EL1h_n : STRH w8,[sp,#0x82] +18455 clk cpu0 MW2 037005d2:000000f005d2_NS 0000 +18456 clk cpu0 IT (18420) 00011888:000010011888_NS 794107e8 O EL1h_n : LDRH w8,[sp,#0x82] +18456 clk cpu0 MR2 037005d2:000000f005d2_NS 0000 +18456 clk cpu0 R X8 0000000000000000 +18457 clk cpu0 IT (18421) 0001188c:00001001188c_NS 7100091f O EL1h_n : CMP w8,#2 +18457 clk cpu0 R cpsr 820003c5 +18458 clk cpu0 IT (18422) 00011890:000010011890_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18458 clk cpu0 R X8 0000000000000001 +18459 clk cpu0 IT (18423) 00011894:000010011894_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1189c +18460 clk cpu0 IT (18424) 0001189c:00001001189c_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18460 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18460 clk cpu0 R X8 0000000003700700 +18461 clk cpu0 IT (18425) 000118a0:0000100118a0_NS d2800209 O EL1h_n : MOV x9,#0x10 +18461 clk cpu0 R X9 0000000000000010 +18462 clk cpu0 IT (18426) 000118a4:0000100118a4_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18462 clk cpu0 R X8 0000000003700710 +18463 clk cpu0 IT (18427) 000118a8:0000100118a8_NS d28000c9 O EL1h_n : MOV x9,#6 +18463 clk cpu0 R X9 0000000000000006 +18464 clk cpu0 IT (18428) 000118ac:0000100118ac_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18464 clk cpu0 R X8 0000000003700716 +18465 clk cpu0 IT (18429) 000118b0:0000100118b0_NS 794107ea O EL1h_n : LDRH w10,[sp,#0x82] +18465 clk cpu0 MR2 037005d2:000000f005d2_NS 0000 +18465 clk cpu0 R X10 0000000000000000 +18466 clk cpu0 IT (18430) 000118b4:0000100118b4_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18466 clk cpu0 R X9 0000000000000000 +18467 clk cpu0 IT (18431) 000118b8:0000100118b8_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18467 clk cpu0 R X8 0000000003700716 +18468 clk cpu0 IT (18432) 000118bc:0000100118bc_NS 5280000a O EL1h_n : MOV w10,#0 +18468 clk cpu0 R X10 0000000000000000 +18468 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c7 ALLOC 0x0000100118c0_NS +18468 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0631 ALLOC 0x0000100118c0_NS +18469 clk cpu0 IT (18433) 000118c0:0000100118c0_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18469 clk cpu0 MW1 03700716:000000f00716_NS 00 +18470 clk cpu0 IT (18434) 000118c4:0000100118c4_NS 794107e8 O EL1h_n : LDRH w8,[sp,#0x82] +18470 clk cpu0 MR2 037005d2:000000f005d2_NS 0000 +18470 clk cpu0 R X8 0000000000000000 +18471 clk cpu0 IT (18435) 000118c8:0000100118c8_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18471 clk cpu0 R X8 0000000000000001 +18472 clk cpu0 IT (18436) 000118cc:0000100118cc_NS 790107e8 O EL1h_n : STRH w8,[sp,#0x82] +18472 clk cpu0 MW2 037005d2:000000f005d2_NS 0001 +18473 clk cpu0 IT (18437) 000118d0:0000100118d0_NS 17ffffee O EL1h_n : B 0x11888 +18474 clk cpu0 IT (18438) 00011888:000010011888_NS 794107e8 O EL1h_n : LDRH w8,[sp,#0x82] +18474 clk cpu0 MR2 037005d2:000000f005d2_NS 0001 +18474 clk cpu0 R X8 0000000000000001 +18475 clk cpu0 IT (18439) 0001188c:00001001188c_NS 7100091f O EL1h_n : CMP w8,#2 +18475 clk cpu0 R cpsr 820003c5 +18476 clk cpu0 IT (18440) 00011890:000010011890_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18476 clk cpu0 R X8 0000000000000001 +18477 clk cpu0 IT (18441) 00011894:000010011894_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1189c +18478 clk cpu0 IT (18442) 0001189c:00001001189c_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18478 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18478 clk cpu0 R X8 0000000003700700 +18479 clk cpu0 IT (18443) 000118a0:0000100118a0_NS d2800209 O EL1h_n : MOV x9,#0x10 +18479 clk cpu0 R X9 0000000000000010 +18480 clk cpu0 IT (18444) 000118a4:0000100118a4_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18480 clk cpu0 R X8 0000000003700710 +18481 clk cpu0 IT (18445) 000118a8:0000100118a8_NS d28000c9 O EL1h_n : MOV x9,#6 +18481 clk cpu0 R X9 0000000000000006 +18482 clk cpu0 IT (18446) 000118ac:0000100118ac_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18482 clk cpu0 R X8 0000000003700716 +18483 clk cpu0 IT (18447) 000118b0:0000100118b0_NS 794107ea O EL1h_n : LDRH w10,[sp,#0x82] +18483 clk cpu0 MR2 037005d2:000000f005d2_NS 0001 +18483 clk cpu0 R X10 0000000000000001 +18484 clk cpu0 IT (18448) 000118b4:0000100118b4_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18484 clk cpu0 R X9 0000000000000001 +18485 clk cpu0 IT (18449) 000118b8:0000100118b8_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18485 clk cpu0 R X8 0000000003700717 +18486 clk cpu0 IT (18450) 000118bc:0000100118bc_NS 5280000a O EL1h_n : MOV w10,#0 +18486 clk cpu0 R X10 0000000000000000 +18487 clk cpu0 IT (18451) 000118c0:0000100118c0_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18487 clk cpu0 MW1 03700717:000000f00717_NS 00 +18488 clk cpu0 IT (18452) 000118c4:0000100118c4_NS 794107e8 O EL1h_n : LDRH w8,[sp,#0x82] +18488 clk cpu0 MR2 037005d2:000000f005d2_NS 0001 +18488 clk cpu0 R X8 0000000000000001 +18489 clk cpu0 IT (18453) 000118c8:0000100118c8_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18489 clk cpu0 R X8 0000000000000002 +18490 clk cpu0 IT (18454) 000118cc:0000100118cc_NS 790107e8 O EL1h_n : STRH w8,[sp,#0x82] +18490 clk cpu0 MW2 037005d2:000000f005d2_NS 0002 +18491 clk cpu0 IT (18455) 000118d0:0000100118d0_NS 17ffffee O EL1h_n : B 0x11888 +18492 clk cpu0 IT (18456) 00011888:000010011888_NS 794107e8 O EL1h_n : LDRH w8,[sp,#0x82] +18492 clk cpu0 MR2 037005d2:000000f005d2_NS 0002 +18492 clk cpu0 R X8 0000000000000002 +18493 clk cpu0 IT (18457) 0001188c:00001001188c_NS 7100091f O EL1h_n : CMP w8,#2 +18493 clk cpu0 R cpsr 620003c5 +18494 clk cpu0 IT (18458) 00011890:000010011890_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18494 clk cpu0 R X8 0000000000000000 +18495 clk cpu0 IS (18459) 00011894:000010011894_NS 37000048 O EL1h_n : TBNZ w8,#0,0x1189c +18496 clk cpu0 IT (18460) 00011898:000010011898_NS 1400000f O EL1h_n : B 0x118d4 +18497 clk cpu0 IT (18461) 000118d4:0000100118d4_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18497 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18497 clk cpu0 R X8 0000000003700700 +18498 clk cpu0 IT (18462) 000118d8:0000100118d8_NS d2800209 O EL1h_n : MOV x9,#0x10 +18498 clk cpu0 R X9 0000000000000010 +18499 clk cpu0 IT (18463) 000118dc:0000100118dc_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18499 clk cpu0 R X8 0000000003700710 +18500 clk cpu0 IT (18464) 000118e0:0000100118e0_NS d28000ca O EL1h_n : MOV x10,#6 +18500 clk cpu0 R X10 0000000000000006 +18501 clk cpu0 IT (18465) 000118e4:0000100118e4_NS 8b0a0101 O EL1h_n : ADD x1,x8,x10 +18501 clk cpu0 R X1 0000000003700716 +18502 clk cpu0 IT (18466) 000118e8:0000100118e8_NS 9102c3e8 O EL1h_n : ADD x8,sp,#0xb0 +18502 clk cpu0 R X8 0000000003700600 +18503 clk cpu0 IT (18467) 000118ec:0000100118ec_NS aa0803e0 O EL1h_n : MOV x0,x8 +18503 clk cpu0 R X0 0000000003700600 +18504 clk cpu0 IT (18468) 000118f0:0000100118f0_NS 52800042 O EL1h_n : MOV w2,#2 +18504 clk cpu0 R X2 0000000000000002 +18505 clk cpu0 IT (18469) 000118f4:0000100118f4_NS f90017e9 O EL1h_n : STR x9,[sp,#0x28] +18505 clk cpu0 MW8 03700578:000000f00578_NS 00000000_00000010 +18506 clk cpu0 IT (18470) 000118f8:0000100118f8_NS f90013e8 O EL1h_n : STR x8,[sp,#0x20] +18506 clk cpu0 MW8 03700570:000000f00570_NS 00000000_03700600 +18507 clk cpu0 IT (18471) 000118fc:0000100118fc_NS 97ffff37 O EL1h_n : BL 0x115d8 +18507 clk cpu0 R X30 0000000000011900 +18508 clk cpu0 IT (18472) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +18508 clk cpu0 R SP_EL1 0000000003700530 +18509 clk cpu0 IT (18473) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +18509 clk cpu0 R X8 0000000000000000 +18510 clk cpu0 IT (18474) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +18510 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +18511 clk cpu0 IT (18475) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +18511 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700716 +18512 clk cpu0 IT (18476) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +18512 clk cpu0 MW1 0370053f:000000f0053f_NS 02 +18513 clk cpu0 IT (18477) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18513 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +18514 clk cpu0 IT (18478) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18514 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18514 clk cpu0 R X8 0000000000000000 +18515 clk cpu0 IT (18479) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18515 clk cpu0 MR1 0370053f:000000f0053f_NS 02 +18515 clk cpu0 R X9 0000000000000002 +18516 clk cpu0 IT (18480) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18516 clk cpu0 R cpsr 820003c5 +18517 clk cpu0 IT (18481) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18517 clk cpu0 R X8 0000000000000001 +18518 clk cpu0 IT (18482) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18519 clk cpu0 IT (18483) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18519 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700716 +18519 clk cpu0 R X8 0000000003700716 +18520 clk cpu0 IT (18484) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18520 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18520 clk cpu0 R X9 0000000000000000 +18521 clk cpu0 IT (18485) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18521 clk cpu0 R X10 0000000000000000 +18522 clk cpu0 IT (18486) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18522 clk cpu0 R X10 0000000000000000 +18523 clk cpu0 IT (18487) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18523 clk cpu0 R X8 0000000003700716 +18524 clk cpu0 IT (18488) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18524 clk cpu0 MR1 03700716:000000f00716_NS 00 +18524 clk cpu0 R X9 0000000000000000 +18525 clk cpu0 IT (18489) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18525 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18525 clk cpu0 R X8 0000000003700600 +18526 clk cpu0 IT (18490) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18526 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000016 +18526 clk cpu0 R X8 0000000023000016 +18527 clk cpu0 IT (18491) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18527 clk cpu0 MW1 23000016:000016240016_NS 00 +18528 clk cpu0 IT (18492) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18528 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18528 clk cpu0 R X8 0000000003700600 +18529 clk cpu0 IT (18493) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18529 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000016 +18529 clk cpu0 R X10 0000000023000016 +18530 clk cpu0 IT (18494) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18530 clk cpu0 R X11 0000000000000001 +18531 clk cpu0 IT (18495) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18531 clk cpu0 R X10 0000000023000017 +18532 clk cpu0 IT (18496) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18532 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000017 +18533 clk cpu0 IT (18497) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18533 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18533 clk cpu0 R X8 0000000000000000 +18534 clk cpu0 IT (18498) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18534 clk cpu0 R X8 0000000000000001 +18535 clk cpu0 IT (18499) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18535 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +18536 clk cpu0 IT (18500) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18537 clk cpu0 IT (18501) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18537 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18537 clk cpu0 R X8 0000000000000001 +18538 clk cpu0 IT (18502) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18538 clk cpu0 MR1 0370053f:000000f0053f_NS 02 +18538 clk cpu0 R X9 0000000000000002 +18539 clk cpu0 IT (18503) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18539 clk cpu0 R cpsr 820003c5 +18540 clk cpu0 IT (18504) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18540 clk cpu0 R X8 0000000000000001 +18541 clk cpu0 IT (18505) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18542 clk cpu0 IT (18506) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18542 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700716 +18542 clk cpu0 R X8 0000000003700716 +18543 clk cpu0 IT (18507) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18543 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18543 clk cpu0 R X9 0000000000000001 +18544 clk cpu0 IT (18508) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18544 clk cpu0 R X10 0000000000000001 +18545 clk cpu0 IT (18509) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18545 clk cpu0 R X10 0000000000000001 +18546 clk cpu0 IT (18510) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18546 clk cpu0 R X8 0000000003700717 +18547 clk cpu0 IT (18511) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18547 clk cpu0 MR1 03700717:000000f00717_NS 00 +18547 clk cpu0 R X9 0000000000000000 +18548 clk cpu0 IT (18512) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18548 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18548 clk cpu0 R X8 0000000003700600 +18549 clk cpu0 IT (18513) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18549 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000017 +18549 clk cpu0 R X8 0000000023000017 +18550 clk cpu0 IT (18514) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18550 clk cpu0 MW1 23000017:000016240017_NS 00 +18551 clk cpu0 IT (18515) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18551 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18551 clk cpu0 R X8 0000000003700600 +18552 clk cpu0 IT (18516) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18552 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000017 +18552 clk cpu0 R X10 0000000023000017 +18553 clk cpu0 IT (18517) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18553 clk cpu0 R X11 0000000000000001 +18554 clk cpu0 IT (18518) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18554 clk cpu0 R X10 0000000023000018 +18555 clk cpu0 IT (18519) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18555 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000018 +18556 clk cpu0 IT (18520) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18556 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18556 clk cpu0 R X8 0000000000000001 +18557 clk cpu0 IT (18521) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18557 clk cpu0 R X8 0000000000000002 +18558 clk cpu0 IT (18522) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18558 clk cpu0 MW1 0370053e:000000f0053e_NS 02 +18559 clk cpu0 IT (18523) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18560 clk cpu0 IT (18524) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18560 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +18560 clk cpu0 R X8 0000000000000002 +18561 clk cpu0 IT (18525) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18561 clk cpu0 MR1 0370053f:000000f0053f_NS 02 +18561 clk cpu0 R X9 0000000000000002 +18562 clk cpu0 IT (18526) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18562 clk cpu0 R cpsr 620003c5 +18563 clk cpu0 IT (18527) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18563 clk cpu0 R X8 0000000000000000 +18564 clk cpu0 IS (18528) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18565 clk cpu0 IT (18529) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +18566 clk cpu0 IT (18530) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +18566 clk cpu0 R SP_EL1 0000000003700550 +18567 clk cpu0 IT (18531) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +18567 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c9 INVAL 0x000010035900_NS +18567 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c9 ALLOC 0x000010011900_NS +18567 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0640 ALLOC 0x000010011900_NS +18568 clk cpu0 IT (18532) 00011900:000010011900_NS f9404fe0 O EL1h_n : LDR x0,[sp,#0x98] +18568 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000000 +18568 clk cpu0 R X0 0000000000000000 +18569 clk cpu0 IT (18533) 00011904:000010011904_NS f9404be1 O EL1h_n : LDR x1,[sp,#0x90] +18569 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000001 +18569 clk cpu0 R X1 0000000000000001 +18570 clk cpu0 IT (18534) 00011908:000010011908_NS 94024ccb O EL1h_n : BL 0xa4c34 +18570 clk cpu0 R X30 000000000001190C +18571 clk cpu0 IT (18535) 000a4c34:0000100a4c34_NS f100041f O EL1h_n : CMP x0,#1 +18571 clk cpu0 R cpsr 820003c5 +18572 clk cpu0 IT (18536) 000a4c38:0000100a4c38_NS 5400006b O EL1h_n : B.LT 0xa4c44 +18573 clk cpu0 IT (18537) 000a4c44:0000100a4c44_NS d28000e0 O EL1h_n : MOV x0,#7 +18573 clk cpu0 R X0 0000000000000007 +18574 clk cpu0 IT (18538) 000a4c48:0000100a4c48_NS f2a005a0 O EL1h_n : MOVK x0,#0x2d,LSL #16 +18574 clk cpu0 R X0 00000000002D0007 +18575 clk cpu0 IT (18539) 000a4c4c:0000100a4c4c_NS aa0103e2 O EL1h_n : MOV x2,x1 +18575 clk cpu0 R X2 0000000000000001 +18576 clk cpu0 IT (18540) 000a4c50:0000100a4c50_NS d40000e1 O EL1h_n : SVC #7 +18576 clk cpu0 E 000a4c50:0000100a4c50_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +18576 clk cpu0 R cpsr 820003c5 +18576 clk cpu0 R PMBIDR_EL1 00000030 +18576 clk cpu0 R ESR_EL1 56000007 +18576 clk cpu0 R SPSR_EL1 820003c5 +18576 clk cpu0 R TRBIDR_EL1 000000000000002b +18576 clk cpu0 R ELR_EL1 00000000000a4c54 +18577 clk cpu0 IT (18541) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +18578 clk cpu0 IT (18542) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +18578 clk cpu0 R SP_EL1 0000000003700450 +18579 clk cpu0 IT (18543) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +18579 clk cpu0 MW8 03700450:000000f00450_NS 00000000_002d0007 +18579 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00000001 +18580 clk cpu0 IT (18544) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +18580 clk cpu0 R X0 0000000056000007 +18581 clk cpu0 IT (18545) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +18581 clk cpu0 R X1 0000000000000015 +18582 clk cpu0 IT (18546) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +18582 clk cpu0 R cpsr 620003c5 +18583 clk cpu0 IT (18547) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +18584 clk cpu0 IT (18548) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +18584 clk cpu0 R X1 0000000000000007 +18585 clk cpu0 IT (18549) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +18585 clk cpu0 R cpsr 220003c5 +18586 clk cpu0 IS (18550) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +18587 clk cpu0 IT (18551) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +18587 clk cpu0 R cpsr 820003c5 +18588 clk cpu0 IS (18552) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +18589 clk cpu0 IT (18553) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +18589 clk cpu0 R cpsr 820003c5 +18590 clk cpu0 IS (18554) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +18591 clk cpu0 IT (18555) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +18591 clk cpu0 R cpsr 620003c5 +18592 clk cpu0 IT (18556) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +18593 clk cpu0 IT (18557) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +18593 clk cpu0 MR8 03700450:000000f00450_NS 00000000_002d0007 +18593 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00000001 +18593 clk cpu0 R X0 00000000002D0007 +18593 clk cpu0 R X1 0000000000000001 +18594 clk cpu0 IT (18558) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +18594 clk cpu0 R SP_EL1 0000000003700550 +18595 clk cpu0 IT (18559) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +18595 clk cpu0 R cpsr 820003c5 +18595 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c4 INVAL 0x00001009d880_NS +18595 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c4 ALLOC 0x000010035880_NS +18596 clk cpu0 IT (18560) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +18597 clk cpu0 IT (18561) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +18597 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000000 +18597 clk cpu0 MW8 03700548:000000f00548_NS f800f800_f800f800 +18597 clk cpu0 R SP_EL1 0000000003700540 +18598 clk cpu0 IT (18562) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +18598 clk cpu0 MW8 03700530:000000f00530_NS 00000000_002d0007 +18598 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00000001 +18598 clk cpu0 R SP_EL1 0000000003700530 +18599 clk cpu0 IT (18563) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +18599 clk cpu0 R X5 0000000000000000 +18600 clk cpu0 IT (18564) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +18600 clk cpu0 R X1 0000000000000000 +18601 clk cpu0 IT (18565) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +18601 clk cpu0 R cpsr 820003c5 +18602 clk cpu0 IT (18566) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +18602 clk cpu0 MR8 03700530:000000f00530_NS 00000000_002d0007 +18602 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00000001 +18602 clk cpu0 R SP_EL1 0000000003700540 +18602 clk cpu0 R X0 00000000002D0007 +18602 clk cpu0 R X1 0000000000000001 +18603 clk cpu0 IT (18567) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +18603 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c9 INVAL 0x000010011900_NS +18603 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c9 ALLOC 0x000010035900_NS +18604 clk cpu0 IT (18568) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +18604 clk cpu0 MW8 03700530:000000f00530_NS 00000000_90000000 +18604 clk cpu0 MW8 03700538:000000f00538_NS 03ff8000_03ff8000 +18604 clk cpu0 R SP_EL1 0000000003700530 +18605 clk cpu0 IT (18569) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +18605 clk cpu0 R X6 0000000000000001 +18606 clk cpu0 IT (18570) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +18606 clk cpu0 MW8 03700520:000000f00520_NS 00000000_00000001 +18606 clk cpu0 MW8 03700528:000000f00528_NS 00000000_00000001 +18606 clk cpu0 R SP_EL1 0000000003700520 +18607 clk cpu0 IT (18571) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +18607 clk cpu0 MW8 03700510:000000f00510_NS ffffffff_fe00000f +18607 clk cpu0 MW8 03700518:000000f00518_NS 00000000_0001190c +18607 clk cpu0 R SP_EL1 0000000003700510 +18608 clk cpu0 IT (18572) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +18608 clk cpu0 R X3 0000000000000000 +18609 clk cpu0 IT (18573) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +18609 clk cpu0 R cpsr 820003c5 +18610 clk cpu0 IS (18574) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +18611 clk cpu0 IT (18575) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +18611 clk cpu0 R X3 0000000000000000 +18612 clk cpu0 IT (18576) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +18612 clk cpu0 R cpsr 820003c5 +18613 clk cpu0 IS (18577) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +18614 clk cpu0 IT (18578) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +18614 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +18614 clk cpu0 R X2 0000000000035A00 +18615 clk cpu0 IT (18579) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +18616 clk cpu0 IT (18580) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +18616 clk cpu0 R X3 000000000000005A +18617 clk cpu0 IT (18581) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +18617 clk cpu0 R X3 000000000000005A +18618 clk cpu0 IT (18582) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +18618 clk cpu0 R X3 00000000000002D0 +18619 clk cpu0 IT (18583) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +18619 clk cpu0 R X2 0000000000035CD0 +18620 clk cpu0 IT (18584) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +18620 clk cpu0 MR8 00035cd0:000010035cd0_NS 00000000_00036e1c +18620 clk cpu0 R X4 0000000000036E1C +18621 clk cpu0 IT (18585) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +18621 clk cpu0 R cpsr 82000bc5 +18621 clk cpu0 R X30 0000000000035990 +18622 clk cpu0 IT (18586) 00036e1c:000010036e1c_NS d5389b40 O EL1h_n : MRS x0,s3_0_c9_c11_2 +18622 clk cpu0 R cpsr 820003c5 +18622 clk cpu0 R X0 0000000023002000 +18623 clk cpu0 IT (18587) 00036e20:000010036e20_NS f14008bf O EL1h_n : CMP x5,#2,LSL #12 +18623 clk cpu0 R cpsr 820003c5 +18624 clk cpu0 IT (18588) 00036e24:000010036e24_NS 54000041 O EL1h_n : B.NE 0x36e2c +18625 clk cpu0 IT (18589) 00036e2c:000010036e2c_NS d65f03c0 O EL1h_n : RET +18626 clk cpu0 IT (18590) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +18626 clk cpu0 MR8 03700510:000000f00510_NS ffffffff_fe00000f +18626 clk cpu0 MR8 03700518:000000f00518_NS 00000000_0001190c +18626 clk cpu0 R SP_EL1 0000000003700520 +18626 clk cpu0 R X29 FFFFFFFFFE00000F +18626 clk cpu0 R X30 000000000001190C +18627 clk cpu0 IT (18591) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +18627 clk cpu0 MR8 03700520:000000f00520_NS 00000000_00000001 +18627 clk cpu0 MR8 03700528:000000f00528_NS 00000000_00000001 +18627 clk cpu0 R SP_EL1 0000000003700530 +18627 clk cpu0 R X2 0000000000000001 +18627 clk cpu0 R X3 0000000000000001 +18628 clk cpu0 IT (18592) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +18628 clk cpu0 MR8 03700530:000000f00530_NS 00000000_90000000 +18628 clk cpu0 MR8 03700538:000000f00538_NS 03ff8000_03ff8000 +18628 clk cpu0 R SP_EL1 0000000003700540 +18628 clk cpu0 R X6 0000000090000000 +18628 clk cpu0 R X7 03FF800003FF8000 +18629 clk cpu0 IT (18593) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +18629 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00000000 +18629 clk cpu0 MR8 03700548:000000f00548_NS f800f800_f800f800 +18629 clk cpu0 R SP_EL1 0000000003700550 +18629 clk cpu0 R X4 0000000000000000 +18629 clk cpu0 R X5 F800F800F800F800 +18630 clk cpu0 IT (18594) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +18630 clk cpu0 R cpsr 820003c5 +18630 clk cpu0 R PMBIDR_EL1 00000030 +18630 clk cpu0 R TRBIDR_EL1 000000000000002b +18631 clk cpu0 IT (18595) 000a4c54:0000100a4c54_NS d65f03c0 O EL1h_n : RET +18631 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c8 INVAL 0x00001009d900_NS +18631 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c8 ALLOC 0x000010011900_NS +18632 clk cpu0 IT (18596) 0001190c:00001001190c_NS 97fffe3b O EL1h_n : BL 0x111f8 +18632 clk cpu0 R X30 0000000000011910 +18633 clk cpu0 IT (18597) 000111f8:0000100111f8_NS d10043ff O EL1h_n : SUB sp,sp,#0x10 +18633 clk cpu0 R SP_EL1 0000000003700540 +18634 clk cpu0 IT (18598) 000111fc:0000100111fc_NS d2a46008 O EL1h_n : MOV x8,#0x23000000 +18634 clk cpu0 R X8 0000000023000000 +18635 clk cpu0 IT (18599) 00011200:000010011200_NS d2a2c489 O EL1h_n : MOV x9,#0x16240000 +18635 clk cpu0 R X9 0000000016240000 +18636 clk cpu0 IT (18600) 00011204:000010011204_NS 9281ffea O EL1h_n : MOV x10,#0xfffffffffffff000 +18636 clk cpu0 R X10 FFFFFFFFFFFFF000 +18637 clk cpu0 IT (18601) 00011208:000010011208_NS f90007e0 O EL1h_n : STR x0,[sp,#8] +18637 clk cpu0 MW8 03700548:000000f00548_NS 00000000_23002000 +18638 clk cpu0 IT (18602) 0001120c:00001001120c_NS f94007eb O EL1h_n : LDR x11,[sp,#8] +18638 clk cpu0 MR8 03700548:000000f00548_NS 00000000_23002000 +18638 clk cpu0 R X11 0000000023002000 +18639 clk cpu0 IT (18603) 00011210:000010011210_NS eb080168 O EL1h_n : SUBS x8,x11,x8 +18639 clk cpu0 R cpsr 220003c5 +18639 clk cpu0 R X8 0000000000002000 +18640 clk cpu0 IT (18604) 00011214:000010011214_NS 8b080128 O EL1h_n : ADD x8,x9,x8 +18640 clk cpu0 R X8 0000000016242000 +18641 clk cpu0 IT (18605) 00011218:000010011218_NS 8a0a0100 O EL1h_n : AND x0,x8,x10 +18641 clk cpu0 R X0 0000000016242000 +18642 clk cpu0 IT (18606) 0001121c:00001001121c_NS 910043ff O EL1h_n : ADD sp,sp,#0x10 +18642 clk cpu0 R SP_EL1 0000000003700550 +18643 clk cpu0 IT (18607) 00011220:000010011220_NS d65f03c0 O EL1h_n : RET +18644 clk cpu0 IT (18608) 00011910:000010011910_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18644 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18644 clk cpu0 R X8 0000000003700700 +18645 clk cpu0 IT (18609) 00011914:000010011914_NS f94017e9 O EL1h_n : LDR x9,[sp,#0x28] +18645 clk cpu0 MR8 03700578:000000f00578_NS 00000000_00000010 +18645 clk cpu0 R X9 0000000000000010 +18646 clk cpu0 IT (18610) 00011918:000010011918_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18646 clk cpu0 R X8 0000000003700710 +18647 clk cpu0 IT (18611) 0001191c:00001001191c_NS d280010a O EL1h_n : MOV x10,#8 +18647 clk cpu0 R X10 0000000000000008 +18648 clk cpu0 IT (18612) 00011920:000010011920_NS f9000500 O EL1h_n : STR x0,[x8,#8] +18648 clk cpu0 MW8 03700718:000000f00718_NS 00000000_16242000 +18649 clk cpu0 IT (18613) 00011924:000010011924_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18649 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18649 clk cpu0 R X8 0000000003700700 +18650 clk cpu0 IT (18614) 00011928:000010011928_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18650 clk cpu0 R X8 0000000003700710 +18651 clk cpu0 IT (18615) 0001192c:00001001192c_NS 8b0a0101 O EL1h_n : ADD x1,x8,x10 +18651 clk cpu0 R X1 0000000003700718 +18652 clk cpu0 IT (18616) 00011930:000010011930_NS f94013e0 O EL1h_n : LDR x0,[sp,#0x20] +18652 clk cpu0 MR8 03700570:000000f00570_NS 00000000_03700600 +18652 clk cpu0 R X0 0000000003700600 +18653 clk cpu0 IT (18617) 00011934:000010011934_NS 52800102 O EL1h_n : MOV w2,#8 +18653 clk cpu0 R X2 0000000000000008 +18654 clk cpu0 IT (18618) 00011938:000010011938_NS 97ffff28 O EL1h_n : BL 0x115d8 +18654 clk cpu0 R X30 000000000001193C +18655 clk cpu0 IT (18619) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +18655 clk cpu0 R SP_EL1 0000000003700530 +18656 clk cpu0 IT (18620) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +18656 clk cpu0 R X8 0000000000000000 +18657 clk cpu0 IT (18621) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +18657 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +18658 clk cpu0 IT (18622) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +18658 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700718 +18659 clk cpu0 IT (18623) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +18659 clk cpu0 MW1 0370053f:000000f0053f_NS 08 +18660 clk cpu0 IT (18624) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18660 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +18661 clk cpu0 IT (18625) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18661 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18661 clk cpu0 R X8 0000000000000000 +18662 clk cpu0 IT (18626) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18662 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18662 clk cpu0 R X9 0000000000000008 +18663 clk cpu0 IT (18627) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18663 clk cpu0 R cpsr 820003c5 +18664 clk cpu0 IT (18628) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18664 clk cpu0 R X8 0000000000000001 +18665 clk cpu0 IT (18629) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18666 clk cpu0 IT (18630) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18666 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18666 clk cpu0 R X8 0000000003700718 +18667 clk cpu0 IT (18631) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18667 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18667 clk cpu0 R X9 0000000000000000 +18668 clk cpu0 IT (18632) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18668 clk cpu0 R X10 0000000000000000 +18669 clk cpu0 IT (18633) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18669 clk cpu0 R X10 0000000000000000 +18670 clk cpu0 IT (18634) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18670 clk cpu0 R X8 0000000003700718 +18671 clk cpu0 IT (18635) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18671 clk cpu0 MR1 03700718:000000f00718_NS 00 +18671 clk cpu0 R X9 0000000000000000 +18672 clk cpu0 IT (18636) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18672 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18672 clk cpu0 R X8 0000000003700600 +18673 clk cpu0 IT (18637) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18673 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000018 +18673 clk cpu0 R X8 0000000023000018 +18674 clk cpu0 IT (18638) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18674 clk cpu0 MW1 23000018:000016240018_NS 00 +18675 clk cpu0 IT (18639) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18675 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18675 clk cpu0 R X8 0000000003700600 +18676 clk cpu0 IT (18640) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18676 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000018 +18676 clk cpu0 R X10 0000000023000018 +18677 clk cpu0 IT (18641) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18677 clk cpu0 R X11 0000000000000001 +18678 clk cpu0 IT (18642) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18678 clk cpu0 R X10 0000000023000019 +18679 clk cpu0 IT (18643) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18679 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000019 +18680 clk cpu0 IT (18644) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18680 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +18680 clk cpu0 R X8 0000000000000000 +18681 clk cpu0 IT (18645) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18681 clk cpu0 R X8 0000000000000001 +18682 clk cpu0 IT (18646) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18682 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +18683 clk cpu0 IT (18647) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18684 clk cpu0 IT (18648) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18684 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18684 clk cpu0 R X8 0000000000000001 +18685 clk cpu0 IT (18649) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18685 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18685 clk cpu0 R X9 0000000000000008 +18686 clk cpu0 IT (18650) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18686 clk cpu0 R cpsr 820003c5 +18687 clk cpu0 IT (18651) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18687 clk cpu0 R X8 0000000000000001 +18688 clk cpu0 IT (18652) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18689 clk cpu0 IT (18653) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18689 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18689 clk cpu0 R X8 0000000003700718 +18690 clk cpu0 IT (18654) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18690 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18690 clk cpu0 R X9 0000000000000001 +18691 clk cpu0 IT (18655) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18691 clk cpu0 R X10 0000000000000001 +18692 clk cpu0 IT (18656) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18692 clk cpu0 R X10 0000000000000001 +18693 clk cpu0 IT (18657) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18693 clk cpu0 R X8 0000000003700719 +18694 clk cpu0 IT (18658) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18694 clk cpu0 MR1 03700719:000000f00719_NS 20 +18694 clk cpu0 R X9 0000000000000020 +18695 clk cpu0 IT (18659) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18695 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18695 clk cpu0 R X8 0000000003700600 +18696 clk cpu0 IT (18660) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18696 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000019 +18696 clk cpu0 R X8 0000000023000019 +18697 clk cpu0 IT (18661) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18697 clk cpu0 MW1 23000019:000016240019_NS 20 +18698 clk cpu0 IT (18662) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18698 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18698 clk cpu0 R X8 0000000003700600 +18699 clk cpu0 IT (18663) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18699 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000019 +18699 clk cpu0 R X10 0000000023000019 +18700 clk cpu0 IT (18664) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18700 clk cpu0 R X11 0000000000000001 +18701 clk cpu0 IT (18665) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18701 clk cpu0 R X10 000000002300001A +18702 clk cpu0 IT (18666) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18702 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300001a +18703 clk cpu0 IT (18667) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18703 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +18703 clk cpu0 R X8 0000000000000001 +18704 clk cpu0 IT (18668) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18704 clk cpu0 R X8 0000000000000002 +18705 clk cpu0 IT (18669) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18705 clk cpu0 MW1 0370053e:000000f0053e_NS 02 +18706 clk cpu0 IT (18670) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18707 clk cpu0 IT (18671) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18707 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +18707 clk cpu0 R X8 0000000000000002 +18708 clk cpu0 IT (18672) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18708 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18708 clk cpu0 R X9 0000000000000008 +18709 clk cpu0 IT (18673) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18709 clk cpu0 R cpsr 820003c5 +18710 clk cpu0 IT (18674) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18710 clk cpu0 R X8 0000000000000001 +18711 clk cpu0 IT (18675) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18712 clk cpu0 IT (18676) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18712 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18712 clk cpu0 R X8 0000000003700718 +18713 clk cpu0 IT (18677) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18713 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +18713 clk cpu0 R X9 0000000000000002 +18714 clk cpu0 IT (18678) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18714 clk cpu0 R X10 0000000000000002 +18715 clk cpu0 IT (18679) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18715 clk cpu0 R X10 0000000000000002 +18716 clk cpu0 IT (18680) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18716 clk cpu0 R X8 000000000370071A +18717 clk cpu0 IT (18681) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18717 clk cpu0 MR1 0370071a:000000f0071a_NS 24 +18717 clk cpu0 R X9 0000000000000024 +18718 clk cpu0 IT (18682) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18718 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18718 clk cpu0 R X8 0000000003700600 +18719 clk cpu0 IT (18683) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18719 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001a +18719 clk cpu0 R X8 000000002300001A +18720 clk cpu0 IT (18684) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18720 clk cpu0 MW1 2300001a:00001624001a_NS 24 +18721 clk cpu0 IT (18685) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18721 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18721 clk cpu0 R X8 0000000003700600 +18722 clk cpu0 IT (18686) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18722 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001a +18722 clk cpu0 R X10 000000002300001A +18723 clk cpu0 IT (18687) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18723 clk cpu0 R X11 0000000000000001 +18724 clk cpu0 IT (18688) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18724 clk cpu0 R X10 000000002300001B +18725 clk cpu0 IT (18689) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18725 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300001b +18726 clk cpu0 IT (18690) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18726 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +18726 clk cpu0 R X8 0000000000000002 +18727 clk cpu0 IT (18691) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18727 clk cpu0 R X8 0000000000000003 +18728 clk cpu0 IT (18692) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18728 clk cpu0 MW1 0370053e:000000f0053e_NS 03 +18729 clk cpu0 IT (18693) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18730 clk cpu0 IT (18694) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18730 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +18730 clk cpu0 R X8 0000000000000003 +18731 clk cpu0 IT (18695) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18731 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18731 clk cpu0 R X9 0000000000000008 +18732 clk cpu0 IT (18696) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18732 clk cpu0 R cpsr 820003c5 +18733 clk cpu0 IT (18697) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18733 clk cpu0 R X8 0000000000000001 +18734 clk cpu0 IT (18698) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18735 clk cpu0 IT (18699) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18735 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18735 clk cpu0 R X8 0000000003700718 +18736 clk cpu0 IT (18700) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18736 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +18736 clk cpu0 R X9 0000000000000003 +18737 clk cpu0 IT (18701) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18737 clk cpu0 R X10 0000000000000003 +18738 clk cpu0 IT (18702) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18738 clk cpu0 R X10 0000000000000003 +18739 clk cpu0 IT (18703) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18739 clk cpu0 R X8 000000000370071B +18740 clk cpu0 IT (18704) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18740 clk cpu0 MR1 0370071b:000000f0071b_NS 16 +18740 clk cpu0 R X9 0000000000000016 +18741 clk cpu0 IT (18705) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18741 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18741 clk cpu0 R X8 0000000003700600 +18742 clk cpu0 IT (18706) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18742 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001b +18742 clk cpu0 R X8 000000002300001B +18743 clk cpu0 IT (18707) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18743 clk cpu0 MW1 2300001b:00001624001b_NS 16 +18744 clk cpu0 IT (18708) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18744 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18744 clk cpu0 R X8 0000000003700600 +18745 clk cpu0 IT (18709) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18745 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001b +18745 clk cpu0 R X10 000000002300001B +18746 clk cpu0 IT (18710) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18746 clk cpu0 R X11 0000000000000001 +18747 clk cpu0 IT (18711) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18747 clk cpu0 R X10 000000002300001C +18748 clk cpu0 IT (18712) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18748 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300001c +18749 clk cpu0 IT (18713) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18749 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +18749 clk cpu0 R X8 0000000000000003 +18750 clk cpu0 IT (18714) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18750 clk cpu0 R X8 0000000000000004 +18751 clk cpu0 IT (18715) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18751 clk cpu0 MW1 0370053e:000000f0053e_NS 04 +18752 clk cpu0 IT (18716) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18753 clk cpu0 IT (18717) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18753 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +18753 clk cpu0 R X8 0000000000000004 +18754 clk cpu0 IT (18718) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18754 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18754 clk cpu0 R X9 0000000000000008 +18755 clk cpu0 IT (18719) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18755 clk cpu0 R cpsr 820003c5 +18756 clk cpu0 IT (18720) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18756 clk cpu0 R X8 0000000000000001 +18757 clk cpu0 IT (18721) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18758 clk cpu0 IT (18722) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18758 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18758 clk cpu0 R X8 0000000003700718 +18759 clk cpu0 IT (18723) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18759 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +18759 clk cpu0 R X9 0000000000000004 +18760 clk cpu0 IT (18724) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18760 clk cpu0 R X10 0000000000000004 +18761 clk cpu0 IT (18725) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18761 clk cpu0 R X10 0000000000000004 +18762 clk cpu0 IT (18726) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18762 clk cpu0 R X8 000000000370071C +18763 clk cpu0 IT (18727) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18763 clk cpu0 MR1 0370071c:000000f0071c_NS 00 +18763 clk cpu0 R X9 0000000000000000 +18764 clk cpu0 IT (18728) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18764 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18764 clk cpu0 R X8 0000000003700600 +18765 clk cpu0 IT (18729) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18765 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001c +18765 clk cpu0 R X8 000000002300001C +18766 clk cpu0 IT (18730) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18766 clk cpu0 MW1 2300001c:00001624001c_NS 00 +18767 clk cpu0 IT (18731) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18767 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18767 clk cpu0 R X8 0000000003700600 +18768 clk cpu0 IT (18732) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18768 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001c +18768 clk cpu0 R X10 000000002300001C +18769 clk cpu0 IT (18733) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18769 clk cpu0 R X11 0000000000000001 +18770 clk cpu0 IT (18734) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18770 clk cpu0 R X10 000000002300001D +18771 clk cpu0 IT (18735) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18771 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300001d +18772 clk cpu0 IT (18736) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18772 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +18772 clk cpu0 R X8 0000000000000004 +18773 clk cpu0 IT (18737) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18773 clk cpu0 R X8 0000000000000005 +18774 clk cpu0 IT (18738) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18774 clk cpu0 MW1 0370053e:000000f0053e_NS 05 +18775 clk cpu0 IT (18739) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18776 clk cpu0 IT (18740) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18776 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +18776 clk cpu0 R X8 0000000000000005 +18777 clk cpu0 IT (18741) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18777 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18777 clk cpu0 R X9 0000000000000008 +18778 clk cpu0 IT (18742) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18778 clk cpu0 R cpsr 820003c5 +18779 clk cpu0 IT (18743) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18779 clk cpu0 R X8 0000000000000001 +18780 clk cpu0 IT (18744) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18781 clk cpu0 IT (18745) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18781 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18781 clk cpu0 R X8 0000000003700718 +18782 clk cpu0 IT (18746) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18782 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +18782 clk cpu0 R X9 0000000000000005 +18783 clk cpu0 IT (18747) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18783 clk cpu0 R X10 0000000000000005 +18784 clk cpu0 IT (18748) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18784 clk cpu0 R X10 0000000000000005 +18785 clk cpu0 IT (18749) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18785 clk cpu0 R X8 000000000370071D +18786 clk cpu0 IT (18750) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18786 clk cpu0 MR1 0370071d:000000f0071d_NS 00 +18786 clk cpu0 R X9 0000000000000000 +18787 clk cpu0 IT (18751) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18787 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18787 clk cpu0 R X8 0000000003700600 +18788 clk cpu0 IT (18752) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18788 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001d +18788 clk cpu0 R X8 000000002300001D +18789 clk cpu0 IT (18753) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18789 clk cpu0 MW1 2300001d:00001624001d_NS 00 +18790 clk cpu0 IT (18754) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18790 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18790 clk cpu0 R X8 0000000003700600 +18791 clk cpu0 IT (18755) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18791 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001d +18791 clk cpu0 R X10 000000002300001D +18792 clk cpu0 IT (18756) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18792 clk cpu0 R X11 0000000000000001 +18793 clk cpu0 IT (18757) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18793 clk cpu0 R X10 000000002300001E +18794 clk cpu0 IT (18758) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18794 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300001e +18795 clk cpu0 IT (18759) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18795 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +18795 clk cpu0 R X8 0000000000000005 +18796 clk cpu0 IT (18760) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18796 clk cpu0 R X8 0000000000000006 +18797 clk cpu0 IT (18761) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18797 clk cpu0 MW1 0370053e:000000f0053e_NS 06 +18798 clk cpu0 IT (18762) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18799 clk cpu0 IT (18763) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18799 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +18799 clk cpu0 R X8 0000000000000006 +18800 clk cpu0 IT (18764) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18800 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18800 clk cpu0 R X9 0000000000000008 +18801 clk cpu0 IT (18765) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18801 clk cpu0 R cpsr 820003c5 +18802 clk cpu0 IT (18766) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18802 clk cpu0 R X8 0000000000000001 +18803 clk cpu0 IT (18767) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18804 clk cpu0 IT (18768) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18804 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18804 clk cpu0 R X8 0000000003700718 +18805 clk cpu0 IT (18769) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18805 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +18805 clk cpu0 R X9 0000000000000006 +18806 clk cpu0 IT (18770) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18806 clk cpu0 R X10 0000000000000006 +18807 clk cpu0 IT (18771) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18807 clk cpu0 R X10 0000000000000006 +18808 clk cpu0 IT (18772) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18808 clk cpu0 R X8 000000000370071E +18809 clk cpu0 IT (18773) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18809 clk cpu0 MR1 0370071e:000000f0071e_NS 00 +18809 clk cpu0 R X9 0000000000000000 +18810 clk cpu0 IT (18774) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18810 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18810 clk cpu0 R X8 0000000003700600 +18811 clk cpu0 IT (18775) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18811 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001e +18811 clk cpu0 R X8 000000002300001E +18812 clk cpu0 IT (18776) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18812 clk cpu0 MW1 2300001e:00001624001e_NS 00 +18813 clk cpu0 IT (18777) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18813 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18813 clk cpu0 R X8 0000000003700600 +18814 clk cpu0 IT (18778) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18814 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001e +18814 clk cpu0 R X10 000000002300001E +18815 clk cpu0 IT (18779) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18815 clk cpu0 R X11 0000000000000001 +18816 clk cpu0 IT (18780) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18816 clk cpu0 R X10 000000002300001F +18817 clk cpu0 IT (18781) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18817 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300001f +18818 clk cpu0 IT (18782) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18818 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +18818 clk cpu0 R X8 0000000000000006 +18819 clk cpu0 IT (18783) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18819 clk cpu0 R X8 0000000000000007 +18820 clk cpu0 IT (18784) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18820 clk cpu0 MW1 0370053e:000000f0053e_NS 07 +18821 clk cpu0 IT (18785) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18822 clk cpu0 IT (18786) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18822 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +18822 clk cpu0 R X8 0000000000000007 +18823 clk cpu0 IT (18787) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18823 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18823 clk cpu0 R X9 0000000000000008 +18824 clk cpu0 IT (18788) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18824 clk cpu0 R cpsr 820003c5 +18825 clk cpu0 IT (18789) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18825 clk cpu0 R X8 0000000000000001 +18826 clk cpu0 IT (18790) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18827 clk cpu0 IT (18791) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +18827 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700718 +18827 clk cpu0 R X8 0000000003700718 +18828 clk cpu0 IT (18792) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +18828 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +18828 clk cpu0 R X9 0000000000000007 +18829 clk cpu0 IT (18793) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +18829 clk cpu0 R X10 0000000000000007 +18830 clk cpu0 IT (18794) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +18830 clk cpu0 R X10 0000000000000007 +18831 clk cpu0 IT (18795) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +18831 clk cpu0 R X8 000000000370071F +18832 clk cpu0 IT (18796) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +18832 clk cpu0 MR1 0370071f:000000f0071f_NS 00 +18832 clk cpu0 R X9 0000000000000000 +18833 clk cpu0 IT (18797) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18833 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18833 clk cpu0 R X8 0000000003700600 +18834 clk cpu0 IT (18798) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +18834 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001f +18834 clk cpu0 R X8 000000002300001F +18835 clk cpu0 IT (18799) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +18835 clk cpu0 MW1 2300001f:00001624001f_NS 00 +18836 clk cpu0 IT (18800) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +18836 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +18836 clk cpu0 R X8 0000000003700600 +18837 clk cpu0 IT (18801) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +18837 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300001f +18837 clk cpu0 R X10 000000002300001F +18838 clk cpu0 IT (18802) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +18838 clk cpu0 R X11 0000000000000001 +18839 clk cpu0 IT (18803) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +18839 clk cpu0 R X10 0000000023000020 +18840 clk cpu0 IT (18804) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +18840 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000020 +18841 clk cpu0 IT (18805) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18841 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +18841 clk cpu0 R X8 0000000000000007 +18842 clk cpu0 IT (18806) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18842 clk cpu0 R X8 0000000000000008 +18843 clk cpu0 IT (18807) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +18843 clk cpu0 MW1 0370053e:000000f0053e_NS 08 +18844 clk cpu0 IT (18808) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +18845 clk cpu0 IT (18809) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +18845 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +18845 clk cpu0 R X8 0000000000000008 +18846 clk cpu0 IT (18810) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +18846 clk cpu0 MR1 0370053f:000000f0053f_NS 08 +18846 clk cpu0 R X9 0000000000000008 +18847 clk cpu0 IT (18811) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +18847 clk cpu0 R cpsr 620003c5 +18848 clk cpu0 IT (18812) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18848 clk cpu0 R X8 0000000000000000 +18849 clk cpu0 IS (18813) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +18850 clk cpu0 IT (18814) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +18851 clk cpu0 IT (18815) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +18851 clk cpu0 R SP_EL1 0000000003700550 +18852 clk cpu0 IT (18816) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +18853 clk cpu0 IT (18817) 0001193c:00001001193c_NS 5280000b O EL1h_n : MOV w11,#0 +18853 clk cpu0 R X11 0000000000000000 +18853 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cb INVAL 0x0000100a5940_NS +18853 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cb ALLOC 0x000010011940_NS +18853 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0650 ALLOC 0x000010011940_NS +18854 clk cpu0 IT (18818) 00011940:000010011940_NS 790103eb O EL1h_n : STRH w11,[sp,#0x80] +18854 clk cpu0 MW2 037005d0:000000f005d0_NS 0000 +18855 clk cpu0 IT (18819) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18855 clk cpu0 MR2 037005d0:000000f005d0_NS 0000 +18855 clk cpu0 R X8 0000000000000000 +18856 clk cpu0 IT (18820) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18856 clk cpu0 R cpsr 820003c5 +18857 clk cpu0 IT (18821) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18857 clk cpu0 R X8 0000000000000001 +18858 clk cpu0 IT (18822) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18859 clk cpu0 IT (18823) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18859 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18859 clk cpu0 R X8 0000000003700700 +18860 clk cpu0 IT (18824) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18860 clk cpu0 R X9 0000000000000010 +18861 clk cpu0 IT (18825) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18861 clk cpu0 R X8 0000000003700710 +18862 clk cpu0 IT (18826) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18862 clk cpu0 R X8 0000000003700720 +18863 clk cpu0 IT (18827) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18863 clk cpu0 MR2 037005d0:000000f005d0_NS 0000 +18863 clk cpu0 R X10 0000000000000000 +18864 clk cpu0 IT (18828) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18864 clk cpu0 R X9 0000000000000000 +18865 clk cpu0 IT (18829) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18865 clk cpu0 R X8 0000000003700720 +18866 clk cpu0 IT (18830) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18866 clk cpu0 R X10 0000000000000000 +18867 clk cpu0 IT (18831) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18867 clk cpu0 MW1 03700720:000000f00720_NS 00 +18868 clk cpu0 IT (18832) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18868 clk cpu0 MR2 037005d0:000000f005d0_NS 0000 +18868 clk cpu0 R X8 0000000000000000 +18868 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cc INVAL 0x000010035980_NS +18868 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cc ALLOC 0x000010011980_NS +18868 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0660 ALLOC 0x000010011980_NS +18869 clk cpu0 IT (18833) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18869 clk cpu0 R X8 0000000000000001 +18870 clk cpu0 IT (18834) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18870 clk cpu0 MW2 037005d0:000000f005d0_NS 0001 +18871 clk cpu0 IT (18835) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18872 clk cpu0 IT (18836) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18872 clk cpu0 MR2 037005d0:000000f005d0_NS 0001 +18872 clk cpu0 R X8 0000000000000001 +18873 clk cpu0 IT (18837) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18873 clk cpu0 R cpsr 820003c5 +18874 clk cpu0 IT (18838) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18874 clk cpu0 R X8 0000000000000001 +18875 clk cpu0 IT (18839) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18876 clk cpu0 IT (18840) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18876 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18876 clk cpu0 R X8 0000000003700700 +18877 clk cpu0 IT (18841) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18877 clk cpu0 R X9 0000000000000010 +18878 clk cpu0 IT (18842) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18878 clk cpu0 R X8 0000000003700710 +18879 clk cpu0 IT (18843) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18879 clk cpu0 R X8 0000000003700720 +18880 clk cpu0 IT (18844) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18880 clk cpu0 MR2 037005d0:000000f005d0_NS 0001 +18880 clk cpu0 R X10 0000000000000001 +18881 clk cpu0 IT (18845) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18881 clk cpu0 R X9 0000000000000001 +18882 clk cpu0 IT (18846) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18882 clk cpu0 R X8 0000000003700721 +18883 clk cpu0 IT (18847) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18883 clk cpu0 R X10 0000000000000000 +18884 clk cpu0 IT (18848) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18884 clk cpu0 MW1 03700721:000000f00721_NS 00 +18885 clk cpu0 IT (18849) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18885 clk cpu0 MR2 037005d0:000000f005d0_NS 0001 +18885 clk cpu0 R X8 0000000000000001 +18886 clk cpu0 IT (18850) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18886 clk cpu0 R X8 0000000000000002 +18887 clk cpu0 IT (18851) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18887 clk cpu0 MW2 037005d0:000000f005d0_NS 0002 +18888 clk cpu0 IT (18852) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18889 clk cpu0 IT (18853) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18889 clk cpu0 MR2 037005d0:000000f005d0_NS 0002 +18889 clk cpu0 R X8 0000000000000002 +18890 clk cpu0 IT (18854) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18890 clk cpu0 R cpsr 820003c5 +18891 clk cpu0 IT (18855) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18891 clk cpu0 R X8 0000000000000001 +18892 clk cpu0 IT (18856) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18893 clk cpu0 IT (18857) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18893 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18893 clk cpu0 R X8 0000000003700700 +18894 clk cpu0 IT (18858) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18894 clk cpu0 R X9 0000000000000010 +18895 clk cpu0 IT (18859) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18895 clk cpu0 R X8 0000000003700710 +18896 clk cpu0 IT (18860) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18896 clk cpu0 R X8 0000000003700720 +18897 clk cpu0 IT (18861) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18897 clk cpu0 MR2 037005d0:000000f005d0_NS 0002 +18897 clk cpu0 R X10 0000000000000002 +18898 clk cpu0 IT (18862) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18898 clk cpu0 R X9 0000000000000002 +18899 clk cpu0 IT (18863) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18899 clk cpu0 R X8 0000000003700722 +18900 clk cpu0 IT (18864) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18900 clk cpu0 R X10 0000000000000000 +18901 clk cpu0 IT (18865) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18901 clk cpu0 MW1 03700722:000000f00722_NS 00 +18902 clk cpu0 IT (18866) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18902 clk cpu0 MR2 037005d0:000000f005d0_NS 0002 +18902 clk cpu0 R X8 0000000000000002 +18903 clk cpu0 IT (18867) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18903 clk cpu0 R X8 0000000000000003 +18904 clk cpu0 IT (18868) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18904 clk cpu0 MW2 037005d0:000000f005d0_NS 0003 +18905 clk cpu0 IT (18869) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18906 clk cpu0 IT (18870) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18906 clk cpu0 MR2 037005d0:000000f005d0_NS 0003 +18906 clk cpu0 R X8 0000000000000003 +18907 clk cpu0 IT (18871) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18907 clk cpu0 R cpsr 820003c5 +18908 clk cpu0 IT (18872) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18908 clk cpu0 R X8 0000000000000001 +18909 clk cpu0 IT (18873) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18910 clk cpu0 IT (18874) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18910 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18910 clk cpu0 R X8 0000000003700700 +18911 clk cpu0 IT (18875) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18911 clk cpu0 R X9 0000000000000010 +18912 clk cpu0 IT (18876) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18912 clk cpu0 R X8 0000000003700710 +18913 clk cpu0 IT (18877) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18913 clk cpu0 R X8 0000000003700720 +18914 clk cpu0 IT (18878) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18914 clk cpu0 MR2 037005d0:000000f005d0_NS 0003 +18914 clk cpu0 R X10 0000000000000003 +18915 clk cpu0 IT (18879) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18915 clk cpu0 R X9 0000000000000003 +18916 clk cpu0 IT (18880) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18916 clk cpu0 R X8 0000000003700723 +18917 clk cpu0 IT (18881) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18917 clk cpu0 R X10 0000000000000000 +18918 clk cpu0 IT (18882) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18918 clk cpu0 MW1 03700723:000000f00723_NS 00 +18919 clk cpu0 IT (18883) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18919 clk cpu0 MR2 037005d0:000000f005d0_NS 0003 +18919 clk cpu0 R X8 0000000000000003 +18920 clk cpu0 IT (18884) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18920 clk cpu0 R X8 0000000000000004 +18921 clk cpu0 IT (18885) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18921 clk cpu0 MW2 037005d0:000000f005d0_NS 0004 +18922 clk cpu0 IT (18886) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18923 clk cpu0 IT (18887) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18923 clk cpu0 MR2 037005d0:000000f005d0_NS 0004 +18923 clk cpu0 R X8 0000000000000004 +18924 clk cpu0 IT (18888) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18924 clk cpu0 R cpsr 820003c5 +18925 clk cpu0 IT (18889) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18925 clk cpu0 R X8 0000000000000001 +18926 clk cpu0 IT (18890) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18927 clk cpu0 IT (18891) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18927 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18927 clk cpu0 R X8 0000000003700700 +18928 clk cpu0 IT (18892) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18928 clk cpu0 R X9 0000000000000010 +18929 clk cpu0 IT (18893) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18929 clk cpu0 R X8 0000000003700710 +18930 clk cpu0 IT (18894) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18930 clk cpu0 R X8 0000000003700720 +18931 clk cpu0 IT (18895) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18931 clk cpu0 MR2 037005d0:000000f005d0_NS 0004 +18931 clk cpu0 R X10 0000000000000004 +18932 clk cpu0 IT (18896) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18932 clk cpu0 R X9 0000000000000004 +18933 clk cpu0 IT (18897) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18933 clk cpu0 R X8 0000000003700724 +18934 clk cpu0 IT (18898) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18934 clk cpu0 R X10 0000000000000000 +18935 clk cpu0 IT (18899) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18935 clk cpu0 MW1 03700724:000000f00724_NS 00 +18936 clk cpu0 IT (18900) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18936 clk cpu0 MR2 037005d0:000000f005d0_NS 0004 +18936 clk cpu0 R X8 0000000000000004 +18937 clk cpu0 IT (18901) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18937 clk cpu0 R X8 0000000000000005 +18938 clk cpu0 IT (18902) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18938 clk cpu0 MW2 037005d0:000000f005d0_NS 0005 +18939 clk cpu0 IT (18903) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18940 clk cpu0 IT (18904) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18940 clk cpu0 MR2 037005d0:000000f005d0_NS 0005 +18940 clk cpu0 R X8 0000000000000005 +18941 clk cpu0 IT (18905) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18941 clk cpu0 R cpsr 820003c5 +18942 clk cpu0 IT (18906) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18942 clk cpu0 R X8 0000000000000001 +18943 clk cpu0 IT (18907) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18944 clk cpu0 IT (18908) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18944 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18944 clk cpu0 R X8 0000000003700700 +18945 clk cpu0 IT (18909) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18945 clk cpu0 R X9 0000000000000010 +18946 clk cpu0 IT (18910) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18946 clk cpu0 R X8 0000000003700710 +18947 clk cpu0 IT (18911) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18947 clk cpu0 R X8 0000000003700720 +18948 clk cpu0 IT (18912) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18948 clk cpu0 MR2 037005d0:000000f005d0_NS 0005 +18948 clk cpu0 R X10 0000000000000005 +18949 clk cpu0 IT (18913) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18949 clk cpu0 R X9 0000000000000005 +18950 clk cpu0 IT (18914) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18950 clk cpu0 R X8 0000000003700725 +18951 clk cpu0 IT (18915) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18951 clk cpu0 R X10 0000000000000000 +18952 clk cpu0 IT (18916) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18952 clk cpu0 MW1 03700725:000000f00725_NS 00 +18953 clk cpu0 IT (18917) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18953 clk cpu0 MR2 037005d0:000000f005d0_NS 0005 +18953 clk cpu0 R X8 0000000000000005 +18954 clk cpu0 IT (18918) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18954 clk cpu0 R X8 0000000000000006 +18955 clk cpu0 IT (18919) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18955 clk cpu0 MW2 037005d0:000000f005d0_NS 0006 +18956 clk cpu0 IT (18920) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18957 clk cpu0 IT (18921) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18957 clk cpu0 MR2 037005d0:000000f005d0_NS 0006 +18957 clk cpu0 R X8 0000000000000006 +18958 clk cpu0 IT (18922) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18958 clk cpu0 R cpsr 820003c5 +18959 clk cpu0 IT (18923) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18959 clk cpu0 R X8 0000000000000001 +18960 clk cpu0 IT (18924) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18961 clk cpu0 IT (18925) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18961 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18961 clk cpu0 R X8 0000000003700700 +18962 clk cpu0 IT (18926) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18962 clk cpu0 R X9 0000000000000010 +18963 clk cpu0 IT (18927) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18963 clk cpu0 R X8 0000000003700710 +18964 clk cpu0 IT (18928) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18964 clk cpu0 R X8 0000000003700720 +18965 clk cpu0 IT (18929) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18965 clk cpu0 MR2 037005d0:000000f005d0_NS 0006 +18965 clk cpu0 R X10 0000000000000006 +18966 clk cpu0 IT (18930) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18966 clk cpu0 R X9 0000000000000006 +18967 clk cpu0 IT (18931) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18967 clk cpu0 R X8 0000000003700726 +18968 clk cpu0 IT (18932) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18968 clk cpu0 R X10 0000000000000000 +18969 clk cpu0 IT (18933) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18969 clk cpu0 MW1 03700726:000000f00726_NS 00 +18970 clk cpu0 IT (18934) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18970 clk cpu0 MR2 037005d0:000000f005d0_NS 0006 +18970 clk cpu0 R X8 0000000000000006 +18971 clk cpu0 IT (18935) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18971 clk cpu0 R X8 0000000000000007 +18972 clk cpu0 IT (18936) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18972 clk cpu0 MW2 037005d0:000000f005d0_NS 0007 +18973 clk cpu0 IT (18937) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18974 clk cpu0 IT (18938) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18974 clk cpu0 MR2 037005d0:000000f005d0_NS 0007 +18974 clk cpu0 R X8 0000000000000007 +18975 clk cpu0 IT (18939) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18975 clk cpu0 R cpsr 820003c5 +18976 clk cpu0 IT (18940) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18976 clk cpu0 R X8 0000000000000001 +18977 clk cpu0 IT (18941) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18978 clk cpu0 IT (18942) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18978 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18978 clk cpu0 R X8 0000000003700700 +18979 clk cpu0 IT (18943) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18979 clk cpu0 R X9 0000000000000010 +18980 clk cpu0 IT (18944) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18980 clk cpu0 R X8 0000000003700710 +18981 clk cpu0 IT (18945) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18981 clk cpu0 R X8 0000000003700720 +18982 clk cpu0 IT (18946) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18982 clk cpu0 MR2 037005d0:000000f005d0_NS 0007 +18982 clk cpu0 R X10 0000000000000007 +18983 clk cpu0 IT (18947) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +18983 clk cpu0 R X9 0000000000000007 +18984 clk cpu0 IT (18948) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18984 clk cpu0 R X8 0000000003700727 +18985 clk cpu0 IT (18949) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +18985 clk cpu0 R X10 0000000000000000 +18986 clk cpu0 IT (18950) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +18986 clk cpu0 MW1 03700727:000000f00727_NS 00 +18987 clk cpu0 IT (18951) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18987 clk cpu0 MR2 037005d0:000000f005d0_NS 0007 +18987 clk cpu0 R X8 0000000000000007 +18988 clk cpu0 IT (18952) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +18988 clk cpu0 R X8 0000000000000008 +18989 clk cpu0 IT (18953) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +18989 clk cpu0 MW2 037005d0:000000f005d0_NS 0008 +18990 clk cpu0 IT (18954) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +18991 clk cpu0 IT (18955) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +18991 clk cpu0 MR2 037005d0:000000f005d0_NS 0008 +18991 clk cpu0 R X8 0000000000000008 +18992 clk cpu0 IT (18956) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +18992 clk cpu0 R cpsr 820003c5 +18993 clk cpu0 IT (18957) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +18993 clk cpu0 R X8 0000000000000001 +18994 clk cpu0 IT (18958) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +18995 clk cpu0 IT (18959) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +18995 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +18995 clk cpu0 R X8 0000000003700700 +18996 clk cpu0 IT (18960) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +18996 clk cpu0 R X9 0000000000000010 +18997 clk cpu0 IT (18961) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18997 clk cpu0 R X8 0000000003700710 +18998 clk cpu0 IT (18962) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +18998 clk cpu0 R X8 0000000003700720 +18999 clk cpu0 IT (18963) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +18999 clk cpu0 MR2 037005d0:000000f005d0_NS 0008 +18999 clk cpu0 R X10 0000000000000008 +19000 clk cpu0 IT (18964) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19000 clk cpu0 R X9 0000000000000008 +19001 clk cpu0 IT (18965) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19001 clk cpu0 R X8 0000000003700728 +19002 clk cpu0 IT (18966) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19002 clk cpu0 R X10 0000000000000000 +19003 clk cpu0 IT (18967) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19003 clk cpu0 MW1 03700728:000000f00728_NS 00 +19004 clk cpu0 IT (18968) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19004 clk cpu0 MR2 037005d0:000000f005d0_NS 0008 +19004 clk cpu0 R X8 0000000000000008 +19005 clk cpu0 IT (18969) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19005 clk cpu0 R X8 0000000000000009 +19006 clk cpu0 IT (18970) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19006 clk cpu0 MW2 037005d0:000000f005d0_NS 0009 +19007 clk cpu0 IT (18971) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19008 clk cpu0 IT (18972) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19008 clk cpu0 MR2 037005d0:000000f005d0_NS 0009 +19008 clk cpu0 R X8 0000000000000009 +19009 clk cpu0 IT (18973) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19009 clk cpu0 R cpsr 820003c5 +19010 clk cpu0 IT (18974) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19010 clk cpu0 R X8 0000000000000001 +19011 clk cpu0 IT (18975) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19012 clk cpu0 IT (18976) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19012 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19012 clk cpu0 R X8 0000000003700700 +19013 clk cpu0 IT (18977) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +19013 clk cpu0 R X9 0000000000000010 +19014 clk cpu0 IT (18978) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19014 clk cpu0 R X8 0000000003700710 +19015 clk cpu0 IT (18979) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19015 clk cpu0 R X8 0000000003700720 +19016 clk cpu0 IT (18980) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +19016 clk cpu0 MR2 037005d0:000000f005d0_NS 0009 +19016 clk cpu0 R X10 0000000000000009 +19017 clk cpu0 IT (18981) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19017 clk cpu0 R X9 0000000000000009 +19018 clk cpu0 IT (18982) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19018 clk cpu0 R X8 0000000003700729 +19019 clk cpu0 IT (18983) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19019 clk cpu0 R X10 0000000000000000 +19020 clk cpu0 IT (18984) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19020 clk cpu0 MW1 03700729:000000f00729_NS 00 +19021 clk cpu0 IT (18985) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19021 clk cpu0 MR2 037005d0:000000f005d0_NS 0009 +19021 clk cpu0 R X8 0000000000000009 +19022 clk cpu0 IT (18986) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19022 clk cpu0 R X8 000000000000000A +19023 clk cpu0 IT (18987) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19023 clk cpu0 MW2 037005d0:000000f005d0_NS 000a +19024 clk cpu0 IT (18988) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19025 clk cpu0 IT (18989) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19025 clk cpu0 MR2 037005d0:000000f005d0_NS 000a +19025 clk cpu0 R X8 000000000000000A +19026 clk cpu0 IT (18990) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19026 clk cpu0 R cpsr 820003c5 +19027 clk cpu0 IT (18991) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19027 clk cpu0 R X8 0000000000000001 +19028 clk cpu0 IT (18992) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19029 clk cpu0 IT (18993) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19029 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19029 clk cpu0 R X8 0000000003700700 +19030 clk cpu0 IT (18994) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +19030 clk cpu0 R X9 0000000000000010 +19031 clk cpu0 IT (18995) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19031 clk cpu0 R X8 0000000003700710 +19032 clk cpu0 IT (18996) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19032 clk cpu0 R X8 0000000003700720 +19033 clk cpu0 IT (18997) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +19033 clk cpu0 MR2 037005d0:000000f005d0_NS 000a +19033 clk cpu0 R X10 000000000000000A +19034 clk cpu0 IT (18998) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19034 clk cpu0 R X9 000000000000000A +19035 clk cpu0 IT (18999) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19035 clk cpu0 R X8 000000000370072A +19036 clk cpu0 IT (19000) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19036 clk cpu0 R X10 0000000000000000 +19037 clk cpu0 IT (19001) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19037 clk cpu0 MW1 0370072a:000000f0072a_NS 00 +19038 clk cpu0 IT (19002) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19038 clk cpu0 MR2 037005d0:000000f005d0_NS 000a +19038 clk cpu0 R X8 000000000000000A +19039 clk cpu0 IT (19003) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19039 clk cpu0 R X8 000000000000000B +19040 clk cpu0 IT (19004) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19040 clk cpu0 MW2 037005d0:000000f005d0_NS 000b +19041 clk cpu0 IT (19005) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19042 clk cpu0 IT (19006) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19042 clk cpu0 MR2 037005d0:000000f005d0_NS 000b +19042 clk cpu0 R X8 000000000000000B +19043 clk cpu0 IT (19007) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19043 clk cpu0 R cpsr 820003c5 +19044 clk cpu0 IT (19008) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19044 clk cpu0 R X8 0000000000000001 +19045 clk cpu0 IT (19009) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19046 clk cpu0 IT (19010) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19046 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19046 clk cpu0 R X8 0000000003700700 +19047 clk cpu0 IT (19011) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +19047 clk cpu0 R X9 0000000000000010 +19048 clk cpu0 IT (19012) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19048 clk cpu0 R X8 0000000003700710 +19049 clk cpu0 IT (19013) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19049 clk cpu0 R X8 0000000003700720 +19050 clk cpu0 IT (19014) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +19050 clk cpu0 MR2 037005d0:000000f005d0_NS 000b +19050 clk cpu0 R X10 000000000000000B +19051 clk cpu0 IT (19015) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19051 clk cpu0 R X9 000000000000000B +19052 clk cpu0 IT (19016) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19052 clk cpu0 R X8 000000000370072B +19053 clk cpu0 IT (19017) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19053 clk cpu0 R X10 0000000000000000 +19054 clk cpu0 IT (19018) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19054 clk cpu0 MW1 0370072b:000000f0072b_NS 00 +19055 clk cpu0 IT (19019) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19055 clk cpu0 MR2 037005d0:000000f005d0_NS 000b +19055 clk cpu0 R X8 000000000000000B +19056 clk cpu0 IT (19020) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19056 clk cpu0 R X8 000000000000000C +19057 clk cpu0 IT (19021) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19057 clk cpu0 MW2 037005d0:000000f005d0_NS 000c +19058 clk cpu0 IT (19022) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19059 clk cpu0 IT (19023) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19059 clk cpu0 MR2 037005d0:000000f005d0_NS 000c +19059 clk cpu0 R X8 000000000000000C +19060 clk cpu0 IT (19024) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19060 clk cpu0 R cpsr 820003c5 +19061 clk cpu0 IT (19025) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19061 clk cpu0 R X8 0000000000000001 +19062 clk cpu0 IT (19026) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19063 clk cpu0 IT (19027) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19063 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19063 clk cpu0 R X8 0000000003700700 +19064 clk cpu0 IT (19028) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +19064 clk cpu0 R X9 0000000000000010 +19065 clk cpu0 IT (19029) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19065 clk cpu0 R X8 0000000003700710 +19066 clk cpu0 IT (19030) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19066 clk cpu0 R X8 0000000003700720 +19067 clk cpu0 IT (19031) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +19067 clk cpu0 MR2 037005d0:000000f005d0_NS 000c +19067 clk cpu0 R X10 000000000000000C +19068 clk cpu0 IT (19032) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19068 clk cpu0 R X9 000000000000000C +19069 clk cpu0 IT (19033) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19069 clk cpu0 R X8 000000000370072C +19070 clk cpu0 IT (19034) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19070 clk cpu0 R X10 0000000000000000 +19071 clk cpu0 IT (19035) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19071 clk cpu0 MW1 0370072c:000000f0072c_NS 00 +19072 clk cpu0 IT (19036) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19072 clk cpu0 MR2 037005d0:000000f005d0_NS 000c +19072 clk cpu0 R X8 000000000000000C +19073 clk cpu0 IT (19037) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19073 clk cpu0 R X8 000000000000000D +19074 clk cpu0 IT (19038) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19074 clk cpu0 MW2 037005d0:000000f005d0_NS 000d +19075 clk cpu0 IT (19039) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19076 clk cpu0 IT (19040) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19076 clk cpu0 MR2 037005d0:000000f005d0_NS 000d +19076 clk cpu0 R X8 000000000000000D +19077 clk cpu0 IT (19041) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19077 clk cpu0 R cpsr 820003c5 +19078 clk cpu0 IT (19042) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19078 clk cpu0 R X8 0000000000000001 +19079 clk cpu0 IT (19043) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19080 clk cpu0 IT (19044) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19080 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19080 clk cpu0 R X8 0000000003700700 +19081 clk cpu0 IT (19045) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +19081 clk cpu0 R X9 0000000000000010 +19082 clk cpu0 IT (19046) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19082 clk cpu0 R X8 0000000003700710 +19083 clk cpu0 IT (19047) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19083 clk cpu0 R X8 0000000003700720 +19084 clk cpu0 IT (19048) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +19084 clk cpu0 MR2 037005d0:000000f005d0_NS 000d +19084 clk cpu0 R X10 000000000000000D +19085 clk cpu0 IT (19049) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19085 clk cpu0 R X9 000000000000000D +19086 clk cpu0 IT (19050) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19086 clk cpu0 R X8 000000000370072D +19087 clk cpu0 IT (19051) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19087 clk cpu0 R X10 0000000000000000 +19088 clk cpu0 IT (19052) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19088 clk cpu0 MW1 0370072d:000000f0072d_NS 00 +19089 clk cpu0 IT (19053) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19089 clk cpu0 MR2 037005d0:000000f005d0_NS 000d +19089 clk cpu0 R X8 000000000000000D +19090 clk cpu0 IT (19054) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19090 clk cpu0 R X8 000000000000000E +19091 clk cpu0 IT (19055) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19091 clk cpu0 MW2 037005d0:000000f005d0_NS 000e +19092 clk cpu0 IT (19056) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19093 clk cpu0 IT (19057) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19093 clk cpu0 MR2 037005d0:000000f005d0_NS 000e +19093 clk cpu0 R X8 000000000000000E +19094 clk cpu0 IT (19058) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19094 clk cpu0 R cpsr 820003c5 +19095 clk cpu0 IT (19059) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19095 clk cpu0 R X8 0000000000000001 +19096 clk cpu0 IT (19060) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19097 clk cpu0 IT (19061) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19097 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19097 clk cpu0 R X8 0000000003700700 +19098 clk cpu0 IT (19062) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +19098 clk cpu0 R X9 0000000000000010 +19099 clk cpu0 IT (19063) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19099 clk cpu0 R X8 0000000003700710 +19100 clk cpu0 IT (19064) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19100 clk cpu0 R X8 0000000003700720 +19101 clk cpu0 IT (19065) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +19101 clk cpu0 MR2 037005d0:000000f005d0_NS 000e +19101 clk cpu0 R X10 000000000000000E +19102 clk cpu0 IT (19066) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19102 clk cpu0 R X9 000000000000000E +19103 clk cpu0 IT (19067) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19103 clk cpu0 R X8 000000000370072E +19104 clk cpu0 IT (19068) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19104 clk cpu0 R X10 0000000000000000 +19105 clk cpu0 IT (19069) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19105 clk cpu0 MW1 0370072e:000000f0072e_NS 00 +19106 clk cpu0 IT (19070) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19106 clk cpu0 MR2 037005d0:000000f005d0_NS 000e +19106 clk cpu0 R X8 000000000000000E +19107 clk cpu0 IT (19071) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19107 clk cpu0 R X8 000000000000000F +19108 clk cpu0 IT (19072) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19108 clk cpu0 MW2 037005d0:000000f005d0_NS 000f +19109 clk cpu0 IT (19073) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19110 clk cpu0 IT (19074) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19110 clk cpu0 MR2 037005d0:000000f005d0_NS 000f +19110 clk cpu0 R X8 000000000000000F +19111 clk cpu0 IT (19075) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19111 clk cpu0 R cpsr 820003c5 +19112 clk cpu0 IT (19076) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19112 clk cpu0 R X8 0000000000000001 +19113 clk cpu0 IT (19077) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19114 clk cpu0 IT (19078) 00011958:000010011958_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19114 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19114 clk cpu0 R X8 0000000003700700 +19115 clk cpu0 IT (19079) 0001195c:00001001195c_NS d2800209 O EL1h_n : MOV x9,#0x10 +19115 clk cpu0 R X9 0000000000000010 +19116 clk cpu0 IT (19080) 00011960:000010011960_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19116 clk cpu0 R X8 0000000003700710 +19117 clk cpu0 IT (19081) 00011964:000010011964_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19117 clk cpu0 R X8 0000000003700720 +19118 clk cpu0 IT (19082) 00011968:000010011968_NS 794103ea O EL1h_n : LDRH w10,[sp,#0x80] +19118 clk cpu0 MR2 037005d0:000000f005d0_NS 000f +19118 clk cpu0 R X10 000000000000000F +19119 clk cpu0 IT (19083) 0001196c:00001001196c_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +19119 clk cpu0 R X9 000000000000000F +19120 clk cpu0 IT (19084) 00011970:000010011970_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19120 clk cpu0 R X8 000000000370072F +19121 clk cpu0 IT (19085) 00011974:000010011974_NS 5280000a O EL1h_n : MOV w10,#0 +19121 clk cpu0 R X10 0000000000000000 +19122 clk cpu0 IT (19086) 00011978:000010011978_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +19122 clk cpu0 MW1 0370072f:000000f0072f_NS 00 +19123 clk cpu0 IT (19087) 0001197c:00001001197c_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19123 clk cpu0 MR2 037005d0:000000f005d0_NS 000f +19123 clk cpu0 R X8 000000000000000F +19124 clk cpu0 IT (19088) 00011980:000010011980_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19124 clk cpu0 R X8 0000000000000010 +19125 clk cpu0 IT (19089) 00011984:000010011984_NS 790103e8 O EL1h_n : STRH w8,[sp,#0x80] +19125 clk cpu0 MW2 037005d0:000000f005d0_NS 0010 +19126 clk cpu0 IT (19090) 00011988:000010011988_NS 17ffffef O EL1h_n : B 0x11944 +19127 clk cpu0 IT (19091) 00011944:000010011944_NS 794103e8 O EL1h_n : LDRH w8,[sp,#0x80] +19127 clk cpu0 MR2 037005d0:000000f005d0_NS 0010 +19127 clk cpu0 R X8 0000000000000010 +19128 clk cpu0 IT (19092) 00011948:000010011948_NS 7100411f O EL1h_n : CMP w8,#0x10 +19128 clk cpu0 R cpsr 620003c5 +19129 clk cpu0 IT (19093) 0001194c:00001001194c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19129 clk cpu0 R X8 0000000000000000 +19130 clk cpu0 IS (19094) 00011950:000010011950_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11958 +19131 clk cpu0 IT (19095) 00011954:000010011954_NS 1400000e O EL1h_n : B 0x1198c +19132 clk cpu0 IT (19096) 0001198c:00001001198c_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +19132 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19132 clk cpu0 R X8 0000000003700700 +19133 clk cpu0 IT (19097) 00011990:000010011990_NS d2800209 O EL1h_n : MOV x9,#0x10 +19133 clk cpu0 R X9 0000000000000010 +19134 clk cpu0 IT (19098) 00011994:000010011994_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +19134 clk cpu0 R X8 0000000003700710 +19135 clk cpu0 IT (19099) 00011998:000010011998_NS 8b090101 O EL1h_n : ADD x1,x8,x9 +19135 clk cpu0 R X1 0000000003700720 +19136 clk cpu0 IT (19100) 0001199c:00001001199c_NS 9102c3e8 O EL1h_n : ADD x8,sp,#0xb0 +19136 clk cpu0 R X8 0000000003700600 +19137 clk cpu0 IT (19101) 000119a0:0000100119a0_NS aa0803e0 O EL1h_n : MOV x0,x8 +19137 clk cpu0 R X0 0000000003700600 +19138 clk cpu0 IT (19102) 000119a4:0000100119a4_NS 52800202 O EL1h_n : MOV w2,#0x10 +19138 clk cpu0 R X2 0000000000000010 +19139 clk cpu0 IT (19103) 000119a8:0000100119a8_NS f9000fe9 O EL1h_n : STR x9,[sp,#0x18] +19139 clk cpu0 MW8 03700568:000000f00568_NS 00000000_00000010 +19140 clk cpu0 IT (19104) 000119ac:0000100119ac_NS f9000be8 O EL1h_n : STR x8,[sp,#0x10] +19140 clk cpu0 MW8 03700560:000000f00560_NS 00000000_03700600 +19141 clk cpu0 IT (19105) 000119b0:0000100119b0_NS 97ffff0a O EL1h_n : BL 0x115d8 +19141 clk cpu0 R X30 00000000000119B4 +19142 clk cpu0 IT (19106) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +19142 clk cpu0 R SP_EL1 0000000003700530 +19143 clk cpu0 IT (19107) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +19143 clk cpu0 R X8 0000000000000000 +19144 clk cpu0 IT (19108) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +19144 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +19145 clk cpu0 IT (19109) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +19145 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700720 +19146 clk cpu0 IT (19110) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +19146 clk cpu0 MW1 0370053f:000000f0053f_NS 10 +19147 clk cpu0 IT (19111) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19147 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +19148 clk cpu0 IT (19112) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19148 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +19148 clk cpu0 R X8 0000000000000000 +19149 clk cpu0 IT (19113) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19149 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19149 clk cpu0 R X9 0000000000000010 +19150 clk cpu0 IT (19114) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19150 clk cpu0 R cpsr 820003c5 +19151 clk cpu0 IT (19115) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19151 clk cpu0 R X8 0000000000000001 +19152 clk cpu0 IT (19116) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19153 clk cpu0 IT (19117) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19153 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19153 clk cpu0 R X8 0000000003700720 +19154 clk cpu0 IT (19118) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19154 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +19154 clk cpu0 R X9 0000000000000000 +19155 clk cpu0 IT (19119) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19155 clk cpu0 R X10 0000000000000000 +19156 clk cpu0 IT (19120) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19156 clk cpu0 R X10 0000000000000000 +19157 clk cpu0 IT (19121) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19157 clk cpu0 R X8 0000000003700720 +19158 clk cpu0 IT (19122) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19158 clk cpu0 MR1 03700720:000000f00720_NS 00 +19158 clk cpu0 R X9 0000000000000000 +19159 clk cpu0 IT (19123) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19159 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19159 clk cpu0 R X8 0000000003700600 +19160 clk cpu0 IT (19124) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19160 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000020 +19160 clk cpu0 R X8 0000000023000020 +19161 clk cpu0 IT (19125) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19161 clk cpu0 MW1 23000020:000016240020_NS 00 +19162 clk cpu0 IT (19126) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19162 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19162 clk cpu0 R X8 0000000003700600 +19163 clk cpu0 IT (19127) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19163 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000020 +19163 clk cpu0 R X10 0000000023000020 +19164 clk cpu0 IT (19128) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19164 clk cpu0 R X11 0000000000000001 +19165 clk cpu0 IT (19129) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19165 clk cpu0 R X10 0000000023000021 +19166 clk cpu0 IT (19130) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19166 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000021 +19167 clk cpu0 IT (19131) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19167 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +19167 clk cpu0 R X8 0000000000000000 +19168 clk cpu0 IT (19132) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19168 clk cpu0 R X8 0000000000000001 +19169 clk cpu0 IT (19133) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19169 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +19170 clk cpu0 IT (19134) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19171 clk cpu0 IT (19135) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19171 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +19171 clk cpu0 R X8 0000000000000001 +19172 clk cpu0 IT (19136) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19172 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19172 clk cpu0 R X9 0000000000000010 +19173 clk cpu0 IT (19137) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19173 clk cpu0 R cpsr 820003c5 +19174 clk cpu0 IT (19138) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19174 clk cpu0 R X8 0000000000000001 +19175 clk cpu0 IT (19139) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19176 clk cpu0 IT (19140) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19176 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19176 clk cpu0 R X8 0000000003700720 +19177 clk cpu0 IT (19141) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19177 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +19177 clk cpu0 R X9 0000000000000001 +19178 clk cpu0 IT (19142) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19178 clk cpu0 R X10 0000000000000001 +19179 clk cpu0 IT (19143) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19179 clk cpu0 R X10 0000000000000001 +19180 clk cpu0 IT (19144) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19180 clk cpu0 R X8 0000000003700721 +19181 clk cpu0 IT (19145) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19181 clk cpu0 MR1 03700721:000000f00721_NS 00 +19181 clk cpu0 R X9 0000000000000000 +19182 clk cpu0 IT (19146) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19182 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19182 clk cpu0 R X8 0000000003700600 +19183 clk cpu0 IT (19147) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19183 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000021 +19183 clk cpu0 R X8 0000000023000021 +19184 clk cpu0 IT (19148) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19184 clk cpu0 MW1 23000021:000016240021_NS 00 +19185 clk cpu0 IT (19149) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19185 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19185 clk cpu0 R X8 0000000003700600 +19186 clk cpu0 IT (19150) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19186 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000021 +19186 clk cpu0 R X10 0000000023000021 +19187 clk cpu0 IT (19151) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19187 clk cpu0 R X11 0000000000000001 +19188 clk cpu0 IT (19152) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19188 clk cpu0 R X10 0000000023000022 +19189 clk cpu0 IT (19153) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19189 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000022 +19190 clk cpu0 IT (19154) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19190 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +19190 clk cpu0 R X8 0000000000000001 +19191 clk cpu0 IT (19155) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19191 clk cpu0 R X8 0000000000000002 +19192 clk cpu0 IT (19156) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19192 clk cpu0 MW1 0370053e:000000f0053e_NS 02 +19193 clk cpu0 IT (19157) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19194 clk cpu0 IT (19158) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19194 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +19194 clk cpu0 R X8 0000000000000002 +19195 clk cpu0 IT (19159) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19195 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19195 clk cpu0 R X9 0000000000000010 +19196 clk cpu0 IT (19160) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19196 clk cpu0 R cpsr 820003c5 +19197 clk cpu0 IT (19161) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19197 clk cpu0 R X8 0000000000000001 +19198 clk cpu0 IT (19162) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19199 clk cpu0 IT (19163) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19199 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19199 clk cpu0 R X8 0000000003700720 +19200 clk cpu0 IT (19164) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19200 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +19200 clk cpu0 R X9 0000000000000002 +19201 clk cpu0 IT (19165) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19201 clk cpu0 R X10 0000000000000002 +19202 clk cpu0 IT (19166) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19202 clk cpu0 R X10 0000000000000002 +19203 clk cpu0 IT (19167) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19203 clk cpu0 R X8 0000000003700722 +19204 clk cpu0 IT (19168) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19204 clk cpu0 MR1 03700722:000000f00722_NS 00 +19204 clk cpu0 R X9 0000000000000000 +19205 clk cpu0 IT (19169) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19205 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19205 clk cpu0 R X8 0000000003700600 +19206 clk cpu0 IT (19170) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19206 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000022 +19206 clk cpu0 R X8 0000000023000022 +19207 clk cpu0 IT (19171) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19207 clk cpu0 MW1 23000022:000016240022_NS 00 +19208 clk cpu0 IT (19172) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19208 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19208 clk cpu0 R X8 0000000003700600 +19209 clk cpu0 IT (19173) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19209 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000022 +19209 clk cpu0 R X10 0000000023000022 +19210 clk cpu0 IT (19174) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19210 clk cpu0 R X11 0000000000000001 +19211 clk cpu0 IT (19175) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19211 clk cpu0 R X10 0000000023000023 +19212 clk cpu0 IT (19176) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19212 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000023 +19213 clk cpu0 IT (19177) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19213 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +19213 clk cpu0 R X8 0000000000000002 +19214 clk cpu0 IT (19178) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19214 clk cpu0 R X8 0000000000000003 +19215 clk cpu0 IT (19179) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19215 clk cpu0 MW1 0370053e:000000f0053e_NS 03 +19216 clk cpu0 IT (19180) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19217 clk cpu0 IT (19181) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19217 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +19217 clk cpu0 R X8 0000000000000003 +19218 clk cpu0 IT (19182) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19218 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19218 clk cpu0 R X9 0000000000000010 +19219 clk cpu0 IT (19183) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19219 clk cpu0 R cpsr 820003c5 +19220 clk cpu0 IT (19184) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19220 clk cpu0 R X8 0000000000000001 +19221 clk cpu0 IT (19185) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19222 clk cpu0 IT (19186) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19222 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19222 clk cpu0 R X8 0000000003700720 +19223 clk cpu0 IT (19187) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19223 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +19223 clk cpu0 R X9 0000000000000003 +19224 clk cpu0 IT (19188) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19224 clk cpu0 R X10 0000000000000003 +19225 clk cpu0 IT (19189) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19225 clk cpu0 R X10 0000000000000003 +19226 clk cpu0 IT (19190) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19226 clk cpu0 R X8 0000000003700723 +19227 clk cpu0 IT (19191) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19227 clk cpu0 MR1 03700723:000000f00723_NS 00 +19227 clk cpu0 R X9 0000000000000000 +19228 clk cpu0 IT (19192) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19228 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19228 clk cpu0 R X8 0000000003700600 +19229 clk cpu0 IT (19193) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19229 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000023 +19229 clk cpu0 R X8 0000000023000023 +19230 clk cpu0 IT (19194) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19230 clk cpu0 MW1 23000023:000016240023_NS 00 +19231 clk cpu0 IT (19195) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19231 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19231 clk cpu0 R X8 0000000003700600 +19232 clk cpu0 IT (19196) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19232 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000023 +19232 clk cpu0 R X10 0000000023000023 +19233 clk cpu0 IT (19197) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19233 clk cpu0 R X11 0000000000000001 +19234 clk cpu0 IT (19198) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19234 clk cpu0 R X10 0000000023000024 +19235 clk cpu0 IT (19199) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19235 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000024 +19236 clk cpu0 IT (19200) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19236 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +19236 clk cpu0 R X8 0000000000000003 +19237 clk cpu0 IT (19201) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19237 clk cpu0 R X8 0000000000000004 +19238 clk cpu0 IT (19202) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19238 clk cpu0 MW1 0370053e:000000f0053e_NS 04 +19239 clk cpu0 IT (19203) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19240 clk cpu0 IT (19204) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19240 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +19240 clk cpu0 R X8 0000000000000004 +19241 clk cpu0 IT (19205) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19241 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19241 clk cpu0 R X9 0000000000000010 +19242 clk cpu0 IT (19206) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19242 clk cpu0 R cpsr 820003c5 +19243 clk cpu0 IT (19207) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19243 clk cpu0 R X8 0000000000000001 +19244 clk cpu0 IT (19208) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19245 clk cpu0 IT (19209) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19245 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19245 clk cpu0 R X8 0000000003700720 +19246 clk cpu0 IT (19210) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19246 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +19246 clk cpu0 R X9 0000000000000004 +19247 clk cpu0 IT (19211) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19247 clk cpu0 R X10 0000000000000004 +19248 clk cpu0 IT (19212) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19248 clk cpu0 R X10 0000000000000004 +19249 clk cpu0 IT (19213) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19249 clk cpu0 R X8 0000000003700724 +19250 clk cpu0 IT (19214) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19250 clk cpu0 MR1 03700724:000000f00724_NS 00 +19250 clk cpu0 R X9 0000000000000000 +19251 clk cpu0 IT (19215) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19251 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19251 clk cpu0 R X8 0000000003700600 +19252 clk cpu0 IT (19216) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19252 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000024 +19252 clk cpu0 R X8 0000000023000024 +19253 clk cpu0 IT (19217) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19253 clk cpu0 MW1 23000024:000016240024_NS 00 +19254 clk cpu0 IT (19218) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19254 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19254 clk cpu0 R X8 0000000003700600 +19255 clk cpu0 IT (19219) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19255 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000024 +19255 clk cpu0 R X10 0000000023000024 +19256 clk cpu0 IT (19220) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19256 clk cpu0 R X11 0000000000000001 +19257 clk cpu0 IT (19221) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19257 clk cpu0 R X10 0000000023000025 +19258 clk cpu0 IT (19222) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19258 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000025 +19259 clk cpu0 IT (19223) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19259 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +19259 clk cpu0 R X8 0000000000000004 +19260 clk cpu0 IT (19224) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19260 clk cpu0 R X8 0000000000000005 +19261 clk cpu0 IT (19225) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19261 clk cpu0 MW1 0370053e:000000f0053e_NS 05 +19262 clk cpu0 IT (19226) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19263 clk cpu0 IT (19227) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19263 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +19263 clk cpu0 R X8 0000000000000005 +19264 clk cpu0 IT (19228) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19264 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19264 clk cpu0 R X9 0000000000000010 +19265 clk cpu0 IT (19229) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19265 clk cpu0 R cpsr 820003c5 +19266 clk cpu0 IT (19230) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19266 clk cpu0 R X8 0000000000000001 +19267 clk cpu0 IT (19231) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19268 clk cpu0 IT (19232) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19268 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19268 clk cpu0 R X8 0000000003700720 +19269 clk cpu0 IT (19233) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19269 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +19269 clk cpu0 R X9 0000000000000005 +19270 clk cpu0 IT (19234) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19270 clk cpu0 R X10 0000000000000005 +19271 clk cpu0 IT (19235) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19271 clk cpu0 R X10 0000000000000005 +19272 clk cpu0 IT (19236) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19272 clk cpu0 R X8 0000000003700725 +19273 clk cpu0 IT (19237) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19273 clk cpu0 MR1 03700725:000000f00725_NS 00 +19273 clk cpu0 R X9 0000000000000000 +19274 clk cpu0 IT (19238) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19274 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19274 clk cpu0 R X8 0000000003700600 +19275 clk cpu0 IT (19239) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19275 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000025 +19275 clk cpu0 R X8 0000000023000025 +19276 clk cpu0 IT (19240) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19276 clk cpu0 MW1 23000025:000016240025_NS 00 +19277 clk cpu0 IT (19241) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19277 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19277 clk cpu0 R X8 0000000003700600 +19278 clk cpu0 IT (19242) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19278 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000025 +19278 clk cpu0 R X10 0000000023000025 +19279 clk cpu0 IT (19243) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19279 clk cpu0 R X11 0000000000000001 +19280 clk cpu0 IT (19244) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19280 clk cpu0 R X10 0000000023000026 +19281 clk cpu0 IT (19245) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19281 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000026 +19282 clk cpu0 IT (19246) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19282 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +19282 clk cpu0 R X8 0000000000000005 +19283 clk cpu0 IT (19247) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19283 clk cpu0 R X8 0000000000000006 +19284 clk cpu0 IT (19248) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19284 clk cpu0 MW1 0370053e:000000f0053e_NS 06 +19285 clk cpu0 IT (19249) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19286 clk cpu0 IT (19250) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19286 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +19286 clk cpu0 R X8 0000000000000006 +19287 clk cpu0 IT (19251) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19287 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19287 clk cpu0 R X9 0000000000000010 +19288 clk cpu0 IT (19252) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19288 clk cpu0 R cpsr 820003c5 +19289 clk cpu0 IT (19253) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19289 clk cpu0 R X8 0000000000000001 +19290 clk cpu0 IT (19254) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19291 clk cpu0 IT (19255) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19291 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19291 clk cpu0 R X8 0000000003700720 +19292 clk cpu0 IT (19256) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19292 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +19292 clk cpu0 R X9 0000000000000006 +19293 clk cpu0 IT (19257) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19293 clk cpu0 R X10 0000000000000006 +19294 clk cpu0 IT (19258) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19294 clk cpu0 R X10 0000000000000006 +19295 clk cpu0 IT (19259) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19295 clk cpu0 R X8 0000000003700726 +19296 clk cpu0 IT (19260) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19296 clk cpu0 MR1 03700726:000000f00726_NS 00 +19296 clk cpu0 R X9 0000000000000000 +19297 clk cpu0 IT (19261) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19297 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19297 clk cpu0 R X8 0000000003700600 +19298 clk cpu0 IT (19262) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19298 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000026 +19298 clk cpu0 R X8 0000000023000026 +19299 clk cpu0 IT (19263) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19299 clk cpu0 MW1 23000026:000016240026_NS 00 +19300 clk cpu0 IT (19264) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19300 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19300 clk cpu0 R X8 0000000003700600 +19301 clk cpu0 IT (19265) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19301 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000026 +19301 clk cpu0 R X10 0000000023000026 +19302 clk cpu0 IT (19266) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19302 clk cpu0 R X11 0000000000000001 +19303 clk cpu0 IT (19267) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19303 clk cpu0 R X10 0000000023000027 +19304 clk cpu0 IT (19268) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19304 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000027 +19305 clk cpu0 IT (19269) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19305 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +19305 clk cpu0 R X8 0000000000000006 +19306 clk cpu0 IT (19270) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19306 clk cpu0 R X8 0000000000000007 +19307 clk cpu0 IT (19271) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19307 clk cpu0 MW1 0370053e:000000f0053e_NS 07 +19308 clk cpu0 IT (19272) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19309 clk cpu0 IT (19273) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19309 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +19309 clk cpu0 R X8 0000000000000007 +19310 clk cpu0 IT (19274) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19310 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19310 clk cpu0 R X9 0000000000000010 +19311 clk cpu0 IT (19275) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19311 clk cpu0 R cpsr 820003c5 +19312 clk cpu0 IT (19276) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19312 clk cpu0 R X8 0000000000000001 +19313 clk cpu0 IT (19277) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19314 clk cpu0 IT (19278) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19314 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19314 clk cpu0 R X8 0000000003700720 +19315 clk cpu0 IT (19279) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19315 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +19315 clk cpu0 R X9 0000000000000007 +19316 clk cpu0 IT (19280) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19316 clk cpu0 R X10 0000000000000007 +19317 clk cpu0 IT (19281) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19317 clk cpu0 R X10 0000000000000007 +19318 clk cpu0 IT (19282) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19318 clk cpu0 R X8 0000000003700727 +19319 clk cpu0 IT (19283) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19319 clk cpu0 MR1 03700727:000000f00727_NS 00 +19319 clk cpu0 R X9 0000000000000000 +19320 clk cpu0 IT (19284) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19320 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19320 clk cpu0 R X8 0000000003700600 +19321 clk cpu0 IT (19285) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19321 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000027 +19321 clk cpu0 R X8 0000000023000027 +19322 clk cpu0 IT (19286) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19322 clk cpu0 MW1 23000027:000016240027_NS 00 +19323 clk cpu0 IT (19287) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19323 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19323 clk cpu0 R X8 0000000003700600 +19324 clk cpu0 IT (19288) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19324 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000027 +19324 clk cpu0 R X10 0000000023000027 +19325 clk cpu0 IT (19289) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19325 clk cpu0 R X11 0000000000000001 +19326 clk cpu0 IT (19290) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19326 clk cpu0 R X10 0000000023000028 +19327 clk cpu0 IT (19291) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19327 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000028 +19328 clk cpu0 IT (19292) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19328 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +19328 clk cpu0 R X8 0000000000000007 +19329 clk cpu0 IT (19293) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19329 clk cpu0 R X8 0000000000000008 +19330 clk cpu0 IT (19294) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19330 clk cpu0 MW1 0370053e:000000f0053e_NS 08 +19331 clk cpu0 IT (19295) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19332 clk cpu0 IT (19296) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19332 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +19332 clk cpu0 R X8 0000000000000008 +19333 clk cpu0 IT (19297) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19333 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19333 clk cpu0 R X9 0000000000000010 +19334 clk cpu0 IT (19298) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19334 clk cpu0 R cpsr 820003c5 +19335 clk cpu0 IT (19299) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19335 clk cpu0 R X8 0000000000000001 +19336 clk cpu0 IT (19300) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19337 clk cpu0 IT (19301) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19337 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19337 clk cpu0 R X8 0000000003700720 +19338 clk cpu0 IT (19302) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19338 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +19338 clk cpu0 R X9 0000000000000008 +19339 clk cpu0 IT (19303) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19339 clk cpu0 R X10 0000000000000008 +19340 clk cpu0 IT (19304) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19340 clk cpu0 R X10 0000000000000008 +19341 clk cpu0 IT (19305) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19341 clk cpu0 R X8 0000000003700728 +19342 clk cpu0 IT (19306) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19342 clk cpu0 MR1 03700728:000000f00728_NS 00 +19342 clk cpu0 R X9 0000000000000000 +19343 clk cpu0 IT (19307) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19343 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19343 clk cpu0 R X8 0000000003700600 +19344 clk cpu0 IT (19308) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19344 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000028 +19344 clk cpu0 R X8 0000000023000028 +19345 clk cpu0 IT (19309) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19345 clk cpu0 MW1 23000028:000016240028_NS 00 +19346 clk cpu0 IT (19310) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19346 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19346 clk cpu0 R X8 0000000003700600 +19347 clk cpu0 IT (19311) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19347 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000028 +19347 clk cpu0 R X10 0000000023000028 +19348 clk cpu0 IT (19312) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19348 clk cpu0 R X11 0000000000000001 +19349 clk cpu0 IT (19313) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19349 clk cpu0 R X10 0000000023000029 +19350 clk cpu0 IT (19314) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19350 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000029 +19351 clk cpu0 IT (19315) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19351 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +19351 clk cpu0 R X8 0000000000000008 +19352 clk cpu0 IT (19316) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19352 clk cpu0 R X8 0000000000000009 +19353 clk cpu0 IT (19317) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19353 clk cpu0 MW1 0370053e:000000f0053e_NS 09 +19354 clk cpu0 IT (19318) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19355 clk cpu0 IT (19319) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19355 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +19355 clk cpu0 R X8 0000000000000009 +19356 clk cpu0 IT (19320) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19356 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19356 clk cpu0 R X9 0000000000000010 +19357 clk cpu0 IT (19321) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19357 clk cpu0 R cpsr 820003c5 +19358 clk cpu0 IT (19322) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19358 clk cpu0 R X8 0000000000000001 +19359 clk cpu0 IT (19323) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19360 clk cpu0 IT (19324) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19360 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19360 clk cpu0 R X8 0000000003700720 +19361 clk cpu0 IT (19325) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19361 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +19361 clk cpu0 R X9 0000000000000009 +19362 clk cpu0 IT (19326) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19362 clk cpu0 R X10 0000000000000009 +19363 clk cpu0 IT (19327) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19363 clk cpu0 R X10 0000000000000009 +19364 clk cpu0 IT (19328) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19364 clk cpu0 R X8 0000000003700729 +19365 clk cpu0 IT (19329) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19365 clk cpu0 MR1 03700729:000000f00729_NS 00 +19365 clk cpu0 R X9 0000000000000000 +19366 clk cpu0 IT (19330) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19366 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19366 clk cpu0 R X8 0000000003700600 +19367 clk cpu0 IT (19331) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19367 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000029 +19367 clk cpu0 R X8 0000000023000029 +19368 clk cpu0 IT (19332) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19368 clk cpu0 MW1 23000029:000016240029_NS 00 +19369 clk cpu0 IT (19333) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19369 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19369 clk cpu0 R X8 0000000003700600 +19370 clk cpu0 IT (19334) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19370 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000029 +19370 clk cpu0 R X10 0000000023000029 +19371 clk cpu0 IT (19335) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19371 clk cpu0 R X11 0000000000000001 +19372 clk cpu0 IT (19336) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19372 clk cpu0 R X10 000000002300002A +19373 clk cpu0 IT (19337) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19373 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300002a +19374 clk cpu0 IT (19338) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19374 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +19374 clk cpu0 R X8 0000000000000009 +19375 clk cpu0 IT (19339) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19375 clk cpu0 R X8 000000000000000A +19376 clk cpu0 IT (19340) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19376 clk cpu0 MW1 0370053e:000000f0053e_NS 0a +19377 clk cpu0 IT (19341) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19378 clk cpu0 IT (19342) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19378 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +19378 clk cpu0 R X8 000000000000000A +19379 clk cpu0 IT (19343) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19379 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19379 clk cpu0 R X9 0000000000000010 +19380 clk cpu0 IT (19344) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19380 clk cpu0 R cpsr 820003c5 +19381 clk cpu0 IT (19345) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19381 clk cpu0 R X8 0000000000000001 +19382 clk cpu0 IT (19346) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19383 clk cpu0 IT (19347) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19383 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19383 clk cpu0 R X8 0000000003700720 +19384 clk cpu0 IT (19348) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19384 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +19384 clk cpu0 R X9 000000000000000A +19385 clk cpu0 IT (19349) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19385 clk cpu0 R X10 000000000000000A +19386 clk cpu0 IT (19350) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19386 clk cpu0 R X10 000000000000000A +19387 clk cpu0 IT (19351) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19387 clk cpu0 R X8 000000000370072A +19388 clk cpu0 IT (19352) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19388 clk cpu0 MR1 0370072a:000000f0072a_NS 00 +19388 clk cpu0 R X9 0000000000000000 +19389 clk cpu0 IT (19353) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19389 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19389 clk cpu0 R X8 0000000003700600 +19390 clk cpu0 IT (19354) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19390 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002a +19390 clk cpu0 R X8 000000002300002A +19391 clk cpu0 IT (19355) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19391 clk cpu0 MW1 2300002a:00001624002a_NS 00 +19392 clk cpu0 IT (19356) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19392 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19392 clk cpu0 R X8 0000000003700600 +19393 clk cpu0 IT (19357) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19393 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002a +19393 clk cpu0 R X10 000000002300002A +19394 clk cpu0 IT (19358) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19394 clk cpu0 R X11 0000000000000001 +19395 clk cpu0 IT (19359) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19395 clk cpu0 R X10 000000002300002B +19396 clk cpu0 IT (19360) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19396 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300002b +19397 clk cpu0 IT (19361) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19397 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +19397 clk cpu0 R X8 000000000000000A +19398 clk cpu0 IT (19362) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19398 clk cpu0 R X8 000000000000000B +19399 clk cpu0 IT (19363) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19399 clk cpu0 MW1 0370053e:000000f0053e_NS 0b +19400 clk cpu0 IT (19364) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19401 clk cpu0 IT (19365) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19401 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +19401 clk cpu0 R X8 000000000000000B +19402 clk cpu0 IT (19366) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19402 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19402 clk cpu0 R X9 0000000000000010 +19403 clk cpu0 IT (19367) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19403 clk cpu0 R cpsr 820003c5 +19404 clk cpu0 IT (19368) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19404 clk cpu0 R X8 0000000000000001 +19405 clk cpu0 IT (19369) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19406 clk cpu0 IT (19370) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19406 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19406 clk cpu0 R X8 0000000003700720 +19407 clk cpu0 IT (19371) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19407 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +19407 clk cpu0 R X9 000000000000000B +19408 clk cpu0 IT (19372) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19408 clk cpu0 R X10 000000000000000B +19409 clk cpu0 IT (19373) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19409 clk cpu0 R X10 000000000000000B +19410 clk cpu0 IT (19374) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19410 clk cpu0 R X8 000000000370072B +19411 clk cpu0 IT (19375) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19411 clk cpu0 MR1 0370072b:000000f0072b_NS 00 +19411 clk cpu0 R X9 0000000000000000 +19412 clk cpu0 IT (19376) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19412 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19412 clk cpu0 R X8 0000000003700600 +19413 clk cpu0 IT (19377) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19413 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002b +19413 clk cpu0 R X8 000000002300002B +19414 clk cpu0 IT (19378) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19414 clk cpu0 MW1 2300002b:00001624002b_NS 00 +19415 clk cpu0 IT (19379) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19415 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19415 clk cpu0 R X8 0000000003700600 +19416 clk cpu0 IT (19380) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19416 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002b +19416 clk cpu0 R X10 000000002300002B +19417 clk cpu0 IT (19381) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19417 clk cpu0 R X11 0000000000000001 +19418 clk cpu0 IT (19382) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19418 clk cpu0 R X10 000000002300002C +19419 clk cpu0 IT (19383) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19419 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300002c +19420 clk cpu0 IT (19384) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19420 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +19420 clk cpu0 R X8 000000000000000B +19421 clk cpu0 IT (19385) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19421 clk cpu0 R X8 000000000000000C +19422 clk cpu0 IT (19386) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19422 clk cpu0 MW1 0370053e:000000f0053e_NS 0c +19423 clk cpu0 IT (19387) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19424 clk cpu0 IT (19388) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19424 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +19424 clk cpu0 R X8 000000000000000C +19425 clk cpu0 IT (19389) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19425 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19425 clk cpu0 R X9 0000000000000010 +19426 clk cpu0 IT (19390) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19426 clk cpu0 R cpsr 820003c5 +19427 clk cpu0 IT (19391) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19427 clk cpu0 R X8 0000000000000001 +19428 clk cpu0 IT (19392) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19429 clk cpu0 IT (19393) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19429 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19429 clk cpu0 R X8 0000000003700720 +19430 clk cpu0 IT (19394) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19430 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +19430 clk cpu0 R X9 000000000000000C +19431 clk cpu0 IT (19395) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19431 clk cpu0 R X10 000000000000000C +19432 clk cpu0 IT (19396) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19432 clk cpu0 R X10 000000000000000C +19433 clk cpu0 IT (19397) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19433 clk cpu0 R X8 000000000370072C +19434 clk cpu0 IT (19398) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19434 clk cpu0 MR1 0370072c:000000f0072c_NS 00 +19434 clk cpu0 R X9 0000000000000000 +19435 clk cpu0 IT (19399) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19435 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19435 clk cpu0 R X8 0000000003700600 +19436 clk cpu0 IT (19400) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19436 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002c +19436 clk cpu0 R X8 000000002300002C +19437 clk cpu0 IT (19401) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19437 clk cpu0 MW1 2300002c:00001624002c_NS 00 +19438 clk cpu0 IT (19402) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19438 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19438 clk cpu0 R X8 0000000003700600 +19439 clk cpu0 IT (19403) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19439 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002c +19439 clk cpu0 R X10 000000002300002C +19440 clk cpu0 IT (19404) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19440 clk cpu0 R X11 0000000000000001 +19441 clk cpu0 IT (19405) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19441 clk cpu0 R X10 000000002300002D +19442 clk cpu0 IT (19406) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19442 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300002d +19443 clk cpu0 IT (19407) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19443 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +19443 clk cpu0 R X8 000000000000000C +19444 clk cpu0 IT (19408) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19444 clk cpu0 R X8 000000000000000D +19445 clk cpu0 IT (19409) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19445 clk cpu0 MW1 0370053e:000000f0053e_NS 0d +19446 clk cpu0 IT (19410) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19447 clk cpu0 IT (19411) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19447 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +19447 clk cpu0 R X8 000000000000000D +19448 clk cpu0 IT (19412) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19448 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19448 clk cpu0 R X9 0000000000000010 +19449 clk cpu0 IT (19413) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19449 clk cpu0 R cpsr 820003c5 +19450 clk cpu0 IT (19414) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19450 clk cpu0 R X8 0000000000000001 +19451 clk cpu0 IT (19415) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19452 clk cpu0 IT (19416) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19452 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19452 clk cpu0 R X8 0000000003700720 +19453 clk cpu0 IT (19417) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19453 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +19453 clk cpu0 R X9 000000000000000D +19454 clk cpu0 IT (19418) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19454 clk cpu0 R X10 000000000000000D +19455 clk cpu0 IT (19419) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19455 clk cpu0 R X10 000000000000000D +19456 clk cpu0 IT (19420) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19456 clk cpu0 R X8 000000000370072D +19457 clk cpu0 IT (19421) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19457 clk cpu0 MR1 0370072d:000000f0072d_NS 00 +19457 clk cpu0 R X9 0000000000000000 +19458 clk cpu0 IT (19422) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19458 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19458 clk cpu0 R X8 0000000003700600 +19459 clk cpu0 IT (19423) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19459 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002d +19459 clk cpu0 R X8 000000002300002D +19460 clk cpu0 IT (19424) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19460 clk cpu0 MW1 2300002d:00001624002d_NS 00 +19461 clk cpu0 IT (19425) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19461 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19461 clk cpu0 R X8 0000000003700600 +19462 clk cpu0 IT (19426) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19462 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002d +19462 clk cpu0 R X10 000000002300002D +19463 clk cpu0 IT (19427) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19463 clk cpu0 R X11 0000000000000001 +19464 clk cpu0 IT (19428) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19464 clk cpu0 R X10 000000002300002E +19465 clk cpu0 IT (19429) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19465 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300002e +19466 clk cpu0 IT (19430) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19466 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +19466 clk cpu0 R X8 000000000000000D +19467 clk cpu0 IT (19431) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19467 clk cpu0 R X8 000000000000000E +19468 clk cpu0 IT (19432) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19468 clk cpu0 MW1 0370053e:000000f0053e_NS 0e +19469 clk cpu0 IT (19433) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19470 clk cpu0 IT (19434) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19470 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +19470 clk cpu0 R X8 000000000000000E +19471 clk cpu0 IT (19435) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19471 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19471 clk cpu0 R X9 0000000000000010 +19472 clk cpu0 IT (19436) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19472 clk cpu0 R cpsr 820003c5 +19473 clk cpu0 IT (19437) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19473 clk cpu0 R X8 0000000000000001 +19474 clk cpu0 IT (19438) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19475 clk cpu0 IT (19439) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19475 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19475 clk cpu0 R X8 0000000003700720 +19476 clk cpu0 IT (19440) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19476 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +19476 clk cpu0 R X9 000000000000000E +19477 clk cpu0 IT (19441) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19477 clk cpu0 R X10 000000000000000E +19478 clk cpu0 IT (19442) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19478 clk cpu0 R X10 000000000000000E +19479 clk cpu0 IT (19443) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19479 clk cpu0 R X8 000000000370072E +19480 clk cpu0 IT (19444) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19480 clk cpu0 MR1 0370072e:000000f0072e_NS 00 +19480 clk cpu0 R X9 0000000000000000 +19481 clk cpu0 IT (19445) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19481 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19481 clk cpu0 R X8 0000000003700600 +19482 clk cpu0 IT (19446) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19482 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002e +19482 clk cpu0 R X8 000000002300002E +19483 clk cpu0 IT (19447) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19483 clk cpu0 MW1 2300002e:00001624002e_NS 00 +19484 clk cpu0 IT (19448) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19484 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19484 clk cpu0 R X8 0000000003700600 +19485 clk cpu0 IT (19449) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19485 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002e +19485 clk cpu0 R X10 000000002300002E +19486 clk cpu0 IT (19450) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19486 clk cpu0 R X11 0000000000000001 +19487 clk cpu0 IT (19451) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19487 clk cpu0 R X10 000000002300002F +19488 clk cpu0 IT (19452) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19488 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300002f +19489 clk cpu0 IT (19453) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19489 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +19489 clk cpu0 R X8 000000000000000E +19490 clk cpu0 IT (19454) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19490 clk cpu0 R X8 000000000000000F +19491 clk cpu0 IT (19455) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19491 clk cpu0 MW1 0370053e:000000f0053e_NS 0f +19492 clk cpu0 IT (19456) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19493 clk cpu0 IT (19457) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19493 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +19493 clk cpu0 R X8 000000000000000F +19494 clk cpu0 IT (19458) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19494 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19494 clk cpu0 R X9 0000000000000010 +19495 clk cpu0 IT (19459) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19495 clk cpu0 R cpsr 820003c5 +19496 clk cpu0 IT (19460) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19496 clk cpu0 R X8 0000000000000001 +19497 clk cpu0 IT (19461) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19498 clk cpu0 IT (19462) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +19498 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700720 +19498 clk cpu0 R X8 0000000003700720 +19499 clk cpu0 IT (19463) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +19499 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +19499 clk cpu0 R X9 000000000000000F +19500 clk cpu0 IT (19464) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +19500 clk cpu0 R X10 000000000000000F +19501 clk cpu0 IT (19465) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +19501 clk cpu0 R X10 000000000000000F +19502 clk cpu0 IT (19466) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +19502 clk cpu0 R X8 000000000370072F +19503 clk cpu0 IT (19467) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +19503 clk cpu0 MR1 0370072f:000000f0072f_NS 00 +19503 clk cpu0 R X9 0000000000000000 +19504 clk cpu0 IT (19468) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19504 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19504 clk cpu0 R X8 0000000003700600 +19505 clk cpu0 IT (19469) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +19505 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002f +19505 clk cpu0 R X8 000000002300002F +19506 clk cpu0 IT (19470) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +19506 clk cpu0 MW1 2300002f:00001624002f_NS 00 +19507 clk cpu0 IT (19471) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +19507 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +19507 clk cpu0 R X8 0000000003700600 +19508 clk cpu0 IT (19472) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +19508 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300002f +19508 clk cpu0 R X10 000000002300002F +19509 clk cpu0 IT (19473) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +19509 clk cpu0 R X11 0000000000000001 +19510 clk cpu0 IT (19474) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +19510 clk cpu0 R X10 0000000023000030 +19511 clk cpu0 IT (19475) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +19511 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000030 +19512 clk cpu0 IT (19476) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19512 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +19512 clk cpu0 R X8 000000000000000F +19513 clk cpu0 IT (19477) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +19513 clk cpu0 R X8 0000000000000010 +19514 clk cpu0 IT (19478) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +19514 clk cpu0 MW1 0370053e:000000f0053e_NS 10 +19515 clk cpu0 IT (19479) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +19516 clk cpu0 IT (19480) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +19516 clk cpu0 MR1 0370053e:000000f0053e_NS 10 +19516 clk cpu0 R X8 0000000000000010 +19517 clk cpu0 IT (19481) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +19517 clk cpu0 MR1 0370053f:000000f0053f_NS 10 +19517 clk cpu0 R X9 0000000000000010 +19518 clk cpu0 IT (19482) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +19518 clk cpu0 R cpsr 620003c5 +19519 clk cpu0 IT (19483) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +19519 clk cpu0 R X8 0000000000000000 +19520 clk cpu0 IS (19484) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +19521 clk cpu0 IT (19485) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +19522 clk cpu0 IT (19486) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +19522 clk cpu0 R SP_EL1 0000000003700550 +19523 clk cpu0 IT (19487) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +19524 clk cpu0 IT (19488) 000119b4:0000100119b4_NS f94053e8 O EL1h_n : LDR x8,[sp,#0xa0] +19524 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +19524 clk cpu0 R X8 0000000000000000 +19525 clk cpu0 IT (19489) 000119b8:0000100119b8_NS 52800200 O EL1h_n : MOV w0,#0x10 +19525 clk cpu0 R X0 0000000000000010 +19526 clk cpu0 IT (19490) 000119bc:0000100119bc_NS 5280002a O EL1h_n : MOV w10,#1 +19526 clk cpu0 R X10 0000000000000001 +19526 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cf INVAL 0x0000100a59c0_NS +19526 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cf ALLOC 0x0000100119c0_NS +19526 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0670 ALLOC 0x0000100119c0_NS +19527 clk cpu0 IT (19491) 000119c0:0000100119c0_NS 2a0a03e1 O EL1h_n : MOV w1,w10 +19527 clk cpu0 R X1 0000000000000001 +19528 clk cpu0 IT (19492) 000119c4:0000100119c4_NS 5280006b O EL1h_n : MOV w11,#3 +19528 clk cpu0 R X11 0000000000000003 +19529 clk cpu0 IT (19493) 000119c8:0000100119c8_NS 2a0b03e2 O EL1h_n : MOV w2,w11 +19529 clk cpu0 R X2 0000000000000003 +19530 clk cpu0 IT (19494) 000119cc:0000100119cc_NS 2a0803e3 O EL1h_n : MOV w3,w8 +19530 clk cpu0 R X3 0000000000000000 +19531 clk cpu0 IT (19495) 000119d0:0000100119d0_NS b9000fea O EL1h_n : STR w10,[sp,#0xc] +19531 clk cpu0 MW4 0370055c:000000f0055c_NS 00000001 +19532 clk cpu0 IT (19496) 000119d4:0000100119d4_NS b9000beb O EL1h_n : STR w11,[sp,#8] +19532 clk cpu0 MW4 03700558:000000f00558_NS 00000003 +19533 clk cpu0 IT (19497) 000119d8:0000100119d8_NS 94022747 O EL1h_n : BL 0x9b6f4 +19533 clk cpu0 R X30 00000000000119DC +19534 clk cpu0 IT (19498) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +19534 clk cpu0 MW8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19534 clk cpu0 R SP_EL1 0000000003700530 +19535 clk cpu0 IT (19499) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +19535 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +19535 clk cpu0 MW8 03700548:000000f00548_NS 00000000_000119dc +19536 clk cpu0 IT (19500) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +19536 clk cpu0 R cpsr 220003c5 +19537 clk cpu0 IT (19501) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +19537 clk cpu0 R X19 0000000000000010 +19538 clk cpu0 IS (19502) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +19539 clk cpu0 IT (19503) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +19539 clk cpu0 R cpsr 620003c5 +19540 clk cpu0 IT (19504) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +19541 clk cpu0 IT (19505) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +19541 clk cpu0 R X1 0000000000000010 +19542 clk cpu0 IT (19506) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +19542 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +19542 clk cpu0 MR8 03700548:000000f00548_NS 00000000_000119dc +19542 clk cpu0 R X19 00000000062160A2 +19542 clk cpu0 R X30 00000000000119DC +19543 clk cpu0 IT (19507) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +19543 clk cpu0 R X0 0000000000000001 +19544 clk cpu0 IT (19508) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +19544 clk cpu0 MR8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19544 clk cpu0 R SP_EL1 0000000003700550 +19544 clk cpu0 R X20 FF83FF83FF83FF83 +19545 clk cpu0 IT (19509) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +19546 clk cpu0 IT (19510) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19546 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +19546 clk cpu0 MW8 03700548:000000f00548_NS 00000000_000119dc +19546 clk cpu0 R SP_EL1 0000000003700540 +19547 clk cpu0 IT (19511) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +19547 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +19547 clk cpu0 R cpsr 620003c5 +19547 clk cpu0 R PMBIDR_EL1 00000030 +19547 clk cpu0 R ESR_EL1 56000005 +19547 clk cpu0 R SPSR_EL1 620003c5 +19547 clk cpu0 R TRBIDR_EL1 000000000000002b +19547 clk cpu0 R ELR_EL1 000000000009ef50 +19548 clk cpu0 IT (19512) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +19549 clk cpu0 IT (19513) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +19549 clk cpu0 R SP_EL1 0000000003700440 +19550 clk cpu0 IT (19514) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +19550 clk cpu0 MW8 03700440:000000f00440_NS 00000000_00000001 +19550 clk cpu0 MW8 03700448:000000f00448_NS 00000000_00000010 +19551 clk cpu0 IT (19515) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +19551 clk cpu0 R X0 0000000056000005 +19552 clk cpu0 IT (19516) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +19552 clk cpu0 R X1 0000000000000015 +19553 clk cpu0 IT (19517) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +19553 clk cpu0 R cpsr 620003c5 +19554 clk cpu0 IT (19518) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +19555 clk cpu0 IT (19519) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +19555 clk cpu0 R X1 0000000000000005 +19556 clk cpu0 IT (19520) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +19556 clk cpu0 R cpsr 620003c5 +19557 clk cpu0 IS (19521) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +19558 clk cpu0 IT (19522) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +19558 clk cpu0 R cpsr 820003c5 +19559 clk cpu0 IS (19523) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +19560 clk cpu0 IT (19524) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +19560 clk cpu0 R cpsr 820003c5 +19561 clk cpu0 IS (19525) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +19562 clk cpu0 IT (19526) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +19562 clk cpu0 R cpsr 820003c5 +19563 clk cpu0 IS (19527) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +19564 clk cpu0 IT (19528) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +19564 clk cpu0 R cpsr 820003c5 +19565 clk cpu0 IS (19529) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +19566 clk cpu0 IT (19530) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +19566 clk cpu0 R cpsr 820003c5 +19567 clk cpu0 IS (19531) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +19568 clk cpu0 IT (19532) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +19568 clk cpu0 R cpsr 820003c5 +19569 clk cpu0 IS (19533) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +19570 clk cpu0 IT (19534) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +19570 clk cpu0 R cpsr 620003c5 +19571 clk cpu0 IT (19535) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +19572 clk cpu0 IT (19536) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +19572 clk cpu0 MR8 03700440:000000f00440_NS 00000000_00000001 +19572 clk cpu0 MR8 03700448:000000f00448_NS 00000000_00000010 +19572 clk cpu0 R X0 0000000000000001 +19572 clk cpu0 R X1 0000000000000010 +19573 clk cpu0 IT (19537) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +19573 clk cpu0 R SP_EL1 0000000003700540 +19574 clk cpu0 IT (19538) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +19574 clk cpu0 R X0 0000000000000010 +19575 clk cpu0 IT (19539) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19575 clk cpu0 MW8 03700530:000000f00530_NS ffffffff_fe00000f +19575 clk cpu0 MW8 03700538:000000f00538_NS 00000000_000119dc +19575 clk cpu0 R SP_EL1 0000000003700530 +19576 clk cpu0 IT (19540) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +19576 clk cpu0 R X30 00000000000381B4 +19577 clk cpu0 IT (19541) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +19577 clk cpu0 R X9 0000000003003000 +19578 clk cpu0 IT (19542) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +19578 clk cpu0 R X8 0000000000000004 +19579 clk cpu0 IT (19543) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +19579 clk cpu0 R X9 00000000030039C8 +19580 clk cpu0 IT (19544) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +19580 clk cpu0 MR8 030039e8:0000008039e8_NS 00000000_0009f3d8 +19580 clk cpu0 R X0 000000000009F3D8 +19581 clk cpu0 IT (19545) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +19581 clk cpu0 R cpsr 620007c5 +19582 clk cpu0 IT (19546) 0009f3d8:00001009f3d8_NS d5310400 O EL1h_n : MRS x0,TRCCONFIGR +19582 clk cpu0 R cpsr 620003c5 +19582 clk cpu0 R X0 0000000000000001 +19583 clk cpu0 IT (19547) 0009f3dc:00001009f3dc_NS d65f03c0 O EL1h_n : RET +19584 clk cpu0 IT (19548) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19584 clk cpu0 MR8 03700530:000000f00530_NS ffffffff_fe00000f +19584 clk cpu0 MR8 03700538:000000f00538_NS 00000000_000119dc +19584 clk cpu0 R SP_EL1 0000000003700540 +19584 clk cpu0 R X29 FFFFFFFFFE00000F +19584 clk cpu0 R X30 00000000000119DC +19585 clk cpu0 IT (19549) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +19585 clk cpu0 R cpsr 620003c5 +19585 clk cpu0 R PMBIDR_EL1 00000030 +19585 clk cpu0 R TRBIDR_EL1 000000000000002b +19586 clk cpu0 IT (19550) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19586 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +19586 clk cpu0 MR8 03700548:000000f00548_NS 00000000_000119dc +19586 clk cpu0 R SP_EL1 0000000003700550 +19586 clk cpu0 R X29 FFFFFFFFFE00000F +19586 clk cpu0 R X30 00000000000119DC +19587 clk cpu0 IT (19551) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +19588 clk cpu0 IT (19552) 000119dc:0000100119dc_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +19588 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19588 clk cpu0 R X9 0000000003700700 +19589 clk cpu0 IT (19553) 000119e0:0000100119e0_NS f9400fec O EL1h_n : LDR x12,[sp,#0x18] +19589 clk cpu0 MR8 03700568:000000f00568_NS 00000000_00000010 +19589 clk cpu0 R X12 0000000000000010 +19590 clk cpu0 IT (19554) 000119e4:0000100119e4_NS 8b0c0129 O EL1h_n : ADD x9,x9,x12 +19590 clk cpu0 R X9 0000000003700710 +19591 clk cpu0 IT (19555) 000119e8:0000100119e8_NS d280040d O EL1h_n : MOV x13,#0x20 +19591 clk cpu0 R X13 0000000000000020 +19592 clk cpu0 IT (19556) 000119ec:0000100119ec_NS f9001120 O EL1h_n : STR x0,[x9,#0x20] +19592 clk cpu0 MW8 03700730:000000f00730_NS 00000000_00000001 +19593 clk cpu0 IT (19557) 000119f0:0000100119f0_NS f94053e9 O EL1h_n : LDR x9,[sp,#0xa0] +19593 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +19593 clk cpu0 R X9 0000000000000000 +19594 clk cpu0 IT (19558) 000119f4:0000100119f4_NS 52800800 O EL1h_n : MOV w0,#0x40 +19594 clk cpu0 R X0 0000000000000040 +19595 clk cpu0 IT (19559) 000119f8:0000100119f8_NS b9400fe1 O EL1h_n : LDR w1,[sp,#0xc] +19595 clk cpu0 MR4 0370055c:000000f0055c_NS 00000001 +19595 clk cpu0 R X1 0000000000000001 +19596 clk cpu0 IT (19560) 000119fc:0000100119fc_NS b9400be2 O EL1h_n : LDR w2,[sp,#8] +19596 clk cpu0 MR4 03700558:000000f00558_NS 00000003 +19596 clk cpu0 R X2 0000000000000003 +19596 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d0 INVAL 0x0000100a5a00 +19596 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d0 ALLOC 0x000010011a00_NS +19596 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0680 ALLOC 0x000010011a00_NS +19597 clk cpu0 IT (19561) 00011a00:000010011a00_NS 2a0903e3 O EL1h_n : MOV w3,w9 +19597 clk cpu0 R X3 0000000000000000 +19598 clk cpu0 IT (19562) 00011a04:000010011a04_NS f90003ed O EL1h_n : STR x13,[sp,#0] +19598 clk cpu0 MW8 03700550:000000f00550_NS 00000000_00000020 +19599 clk cpu0 IT (19563) 00011a08:000010011a08_NS 9402273b O EL1h_n : BL 0x9b6f4 +19599 clk cpu0 R X30 0000000000011A0C +19600 clk cpu0 IT (19564) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +19600 clk cpu0 MW8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19600 clk cpu0 R SP_EL1 0000000003700530 +19601 clk cpu0 IT (19565) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +19601 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +19601 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a0c +19602 clk cpu0 IT (19566) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +19602 clk cpu0 R cpsr 220003c5 +19603 clk cpu0 IT (19567) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +19603 clk cpu0 R X19 0000000000000040 +19604 clk cpu0 IS (19568) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +19605 clk cpu0 IT (19569) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +19605 clk cpu0 R cpsr 620003c5 +19606 clk cpu0 IT (19570) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +19607 clk cpu0 IT (19571) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +19607 clk cpu0 R X1 0000000000000040 +19608 clk cpu0 IT (19572) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +19608 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +19608 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a0c +19608 clk cpu0 R X19 00000000062160A2 +19608 clk cpu0 R X30 0000000000011A0C +19609 clk cpu0 IT (19573) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +19609 clk cpu0 R X0 0000000000000001 +19610 clk cpu0 IT (19574) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +19610 clk cpu0 MR8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19610 clk cpu0 R SP_EL1 0000000003700550 +19610 clk cpu0 R X20 FF83FF83FF83FF83 +19611 clk cpu0 IT (19575) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +19612 clk cpu0 IT (19576) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19612 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +19612 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a0c +19612 clk cpu0 R SP_EL1 0000000003700540 +19613 clk cpu0 IT (19577) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +19613 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +19613 clk cpu0 R cpsr 620003c5 +19613 clk cpu0 R PMBIDR_EL1 00000030 +19613 clk cpu0 R ESR_EL1 56000005 +19613 clk cpu0 R SPSR_EL1 620003c5 +19613 clk cpu0 R TRBIDR_EL1 000000000000002b +19613 clk cpu0 R ELR_EL1 000000000009ef50 +19614 clk cpu0 IT (19578) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +19615 clk cpu0 IT (19579) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +19615 clk cpu0 R SP_EL1 0000000003700440 +19616 clk cpu0 IT (19580) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +19616 clk cpu0 MW8 03700440:000000f00440_NS 00000000_00000001 +19616 clk cpu0 MW8 03700448:000000f00448_NS 00000000_00000040 +19617 clk cpu0 IT (19581) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +19617 clk cpu0 R X0 0000000056000005 +19618 clk cpu0 IT (19582) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +19618 clk cpu0 R X1 0000000000000015 +19619 clk cpu0 IT (19583) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +19619 clk cpu0 R cpsr 620003c5 +19620 clk cpu0 IT (19584) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +19621 clk cpu0 IT (19585) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +19621 clk cpu0 R X1 0000000000000005 +19622 clk cpu0 IT (19586) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +19622 clk cpu0 R cpsr 620003c5 +19623 clk cpu0 IS (19587) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +19624 clk cpu0 IT (19588) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +19624 clk cpu0 R cpsr 820003c5 +19625 clk cpu0 IS (19589) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +19626 clk cpu0 IT (19590) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +19626 clk cpu0 R cpsr 820003c5 +19627 clk cpu0 IS (19591) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +19628 clk cpu0 IT (19592) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +19628 clk cpu0 R cpsr 820003c5 +19629 clk cpu0 IS (19593) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +19630 clk cpu0 IT (19594) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +19630 clk cpu0 R cpsr 820003c5 +19631 clk cpu0 IS (19595) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +19632 clk cpu0 IT (19596) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +19632 clk cpu0 R cpsr 820003c5 +19633 clk cpu0 IS (19597) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +19634 clk cpu0 IT (19598) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +19634 clk cpu0 R cpsr 820003c5 +19635 clk cpu0 IS (19599) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +19636 clk cpu0 IT (19600) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +19636 clk cpu0 R cpsr 620003c5 +19637 clk cpu0 IT (19601) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +19638 clk cpu0 IT (19602) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +19638 clk cpu0 MR8 03700440:000000f00440_NS 00000000_00000001 +19638 clk cpu0 MR8 03700448:000000f00448_NS 00000000_00000040 +19638 clk cpu0 R X0 0000000000000001 +19638 clk cpu0 R X1 0000000000000040 +19639 clk cpu0 IT (19603) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +19639 clk cpu0 R SP_EL1 0000000003700540 +19640 clk cpu0 IT (19604) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +19640 clk cpu0 R X0 0000000000000040 +19641 clk cpu0 IT (19605) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19641 clk cpu0 MW8 03700530:000000f00530_NS ffffffff_fe00000f +19641 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00011a0c +19641 clk cpu0 R SP_EL1 0000000003700530 +19642 clk cpu0 IT (19606) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +19642 clk cpu0 R X30 00000000000381B4 +19643 clk cpu0 IT (19607) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +19643 clk cpu0 R X9 0000000003003000 +19644 clk cpu0 IT (19608) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +19644 clk cpu0 R X8 0000000000000010 +19645 clk cpu0 IT (19609) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +19645 clk cpu0 R X9 00000000030039C8 +19646 clk cpu0 IT (19610) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +19646 clk cpu0 MR8 03003a48:000000803a48_NS 00000000_0009f438 +19646 clk cpu0 R X0 000000000009F438 +19646 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 01d2 ALLOC 0x000000803a40_NS +19646 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0e92 ALLOC 0x000000803a40_NS +19647 clk cpu0 IT (19611) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +19647 clk cpu0 R cpsr 620007c5 +19647 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01a1 ALLOC 0x00001009f400_NS +19647 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1d00 ALLOC 0x00001009f400_NS +19648 clk cpu0 IT (19612) 0009f438:00001009f438_NS d5310020 O EL1h_n : MRS x0,TRCTRACEIDR +19648 clk cpu0 R cpsr 620003c5 +19648 clk cpu0 R X0 0000000000000002 +19649 clk cpu0 IT (19613) 0009f43c:00001009f43c_NS d65f03c0 O EL1h_n : RET +19650 clk cpu0 IT (19614) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19650 clk cpu0 MR8 03700530:000000f00530_NS ffffffff_fe00000f +19650 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00011a0c +19650 clk cpu0 R SP_EL1 0000000003700540 +19650 clk cpu0 R X29 FFFFFFFFFE00000F +19650 clk cpu0 R X30 0000000000011A0C +19651 clk cpu0 IT (19615) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +19651 clk cpu0 R cpsr 620003c5 +19651 clk cpu0 R PMBIDR_EL1 00000030 +19651 clk cpu0 R TRBIDR_EL1 000000000000002b +19652 clk cpu0 IT (19616) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19652 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +19652 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a0c +19652 clk cpu0 R SP_EL1 0000000003700550 +19652 clk cpu0 R X29 FFFFFFFFFE00000F +19652 clk cpu0 R X30 0000000000011A0C +19653 clk cpu0 IT (19617) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +19654 clk cpu0 IT (19618) 00011a0c:000010011a0c_NS f9405fec O EL1h_n : LDR x12,[sp,#0xb8] +19654 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19654 clk cpu0 R X12 0000000003700700 +19655 clk cpu0 IT (19619) 00011a10:000010011a10_NS f9400fed O EL1h_n : LDR x13,[sp,#0x18] +19655 clk cpu0 MR8 03700568:000000f00568_NS 00000000_00000010 +19655 clk cpu0 R X13 0000000000000010 +19656 clk cpu0 IT (19620) 00011a14:000010011a14_NS 8b0d018c O EL1h_n : ADD x12,x12,x13 +19656 clk cpu0 R X12 0000000003700710 +19657 clk cpu0 IT (19621) 00011a18:000010011a18_NS f94003ee O EL1h_n : LDR x14,[sp,#0] +19657 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000020 +19657 clk cpu0 R X14 0000000000000020 +19658 clk cpu0 IT (19622) 00011a1c:000010011a1c_NS 8b0e018c O EL1h_n : ADD x12,x12,x14 +19658 clk cpu0 R X12 0000000003700730 +19659 clk cpu0 IT (19623) 00011a20:000010011a20_NS f9000580 O EL1h_n : STR x0,[x12,#8] +19659 clk cpu0 MW8 03700738:000000f00738_NS 00000000_00000002 +19660 clk cpu0 IT (19624) 00011a24:000010011a24_NS f94053ec O EL1h_n : LDR x12,[sp,#0xa0] +19660 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +19660 clk cpu0 R X12 0000000000000000 +19661 clk cpu0 IT (19625) 00011a28:000010011a28_NS 5281f780 O EL1h_n : MOV w0,#0xfbc +19661 clk cpu0 R X0 0000000000000FBC +19662 clk cpu0 IT (19626) 00011a2c:000010011a2c_NS b9400fe1 O EL1h_n : LDR w1,[sp,#0xc] +19662 clk cpu0 MR4 0370055c:000000f0055c_NS 00000001 +19662 clk cpu0 R X1 0000000000000001 +19663 clk cpu0 IT (19627) 00011a30:000010011a30_NS b9400be2 O EL1h_n : LDR w2,[sp,#8] +19663 clk cpu0 MR4 03700558:000000f00558_NS 00000003 +19663 clk cpu0 R X2 0000000000000003 +19664 clk cpu0 IT (19628) 00011a34:000010011a34_NS 2a0c03e3 O EL1h_n : MOV w3,w12 +19664 clk cpu0 R X3 0000000000000000 +19665 clk cpu0 IT (19629) 00011a38:000010011a38_NS 9402272f O EL1h_n : BL 0x9b6f4 +19665 clk cpu0 R X30 0000000000011A3C +19666 clk cpu0 IT (19630) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +19666 clk cpu0 MW8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19666 clk cpu0 R SP_EL1 0000000003700530 +19667 clk cpu0 IT (19631) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +19667 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +19667 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a3c +19668 clk cpu0 IT (19632) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +19668 clk cpu0 R cpsr 220003c5 +19669 clk cpu0 IT (19633) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +19669 clk cpu0 R X19 0000000000000FBC +19670 clk cpu0 IS (19634) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +19671 clk cpu0 IT (19635) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +19671 clk cpu0 R cpsr 620003c5 +19672 clk cpu0 IT (19636) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +19673 clk cpu0 IT (19637) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +19673 clk cpu0 R X1 0000000000000FBC +19674 clk cpu0 IT (19638) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +19674 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +19674 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a3c +19674 clk cpu0 R X19 00000000062160A2 +19674 clk cpu0 R X30 0000000000011A3C +19675 clk cpu0 IT (19639) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +19675 clk cpu0 R X0 0000000000000001 +19676 clk cpu0 IT (19640) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +19676 clk cpu0 MR8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19676 clk cpu0 R SP_EL1 0000000003700550 +19676 clk cpu0 R X20 FF83FF83FF83FF83 +19677 clk cpu0 IT (19641) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +19678 clk cpu0 IT (19642) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19678 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +19678 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a3c +19678 clk cpu0 R SP_EL1 0000000003700540 +19679 clk cpu0 IT (19643) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +19679 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +19679 clk cpu0 R cpsr 620003c5 +19679 clk cpu0 R PMBIDR_EL1 00000030 +19679 clk cpu0 R ESR_EL1 56000005 +19679 clk cpu0 R SPSR_EL1 620003c5 +19679 clk cpu0 R TRBIDR_EL1 000000000000002b +19679 clk cpu0 R ELR_EL1 000000000009ef50 +19680 clk cpu0 IT (19644) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +19681 clk cpu0 IT (19645) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +19681 clk cpu0 R SP_EL1 0000000003700440 +19682 clk cpu0 IT (19646) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +19682 clk cpu0 MW8 03700440:000000f00440_NS 00000000_00000001 +19682 clk cpu0 MW8 03700448:000000f00448_NS 00000000_00000fbc +19683 clk cpu0 IT (19647) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +19683 clk cpu0 R X0 0000000056000005 +19684 clk cpu0 IT (19648) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +19684 clk cpu0 R X1 0000000000000015 +19685 clk cpu0 IT (19649) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +19685 clk cpu0 R cpsr 620003c5 +19686 clk cpu0 IT (19650) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +19687 clk cpu0 IT (19651) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +19687 clk cpu0 R X1 0000000000000005 +19688 clk cpu0 IT (19652) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +19688 clk cpu0 R cpsr 620003c5 +19689 clk cpu0 IS (19653) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +19690 clk cpu0 IT (19654) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +19690 clk cpu0 R cpsr 820003c5 +19691 clk cpu0 IS (19655) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +19692 clk cpu0 IT (19656) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +19692 clk cpu0 R cpsr 820003c5 +19693 clk cpu0 IS (19657) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +19694 clk cpu0 IT (19658) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +19694 clk cpu0 R cpsr 820003c5 +19695 clk cpu0 IS (19659) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +19696 clk cpu0 IT (19660) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +19696 clk cpu0 R cpsr 820003c5 +19697 clk cpu0 IS (19661) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +19698 clk cpu0 IT (19662) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +19698 clk cpu0 R cpsr 820003c5 +19699 clk cpu0 IS (19663) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +19700 clk cpu0 IT (19664) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +19700 clk cpu0 R cpsr 820003c5 +19701 clk cpu0 IS (19665) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +19702 clk cpu0 IT (19666) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +19702 clk cpu0 R cpsr 620003c5 +19703 clk cpu0 IT (19667) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +19704 clk cpu0 IT (19668) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +19704 clk cpu0 MR8 03700440:000000f00440_NS 00000000_00000001 +19704 clk cpu0 MR8 03700448:000000f00448_NS 00000000_00000fbc +19704 clk cpu0 R X0 0000000000000001 +19704 clk cpu0 R X1 0000000000000FBC +19705 clk cpu0 IT (19669) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +19705 clk cpu0 R SP_EL1 0000000003700540 +19706 clk cpu0 IT (19670) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +19706 clk cpu0 R X0 0000000000000FBC +19707 clk cpu0 IT (19671) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19707 clk cpu0 MW8 03700530:000000f00530_NS ffffffff_fe00000f +19707 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00011a3c +19707 clk cpu0 R SP_EL1 0000000003700530 +19708 clk cpu0 IT (19672) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +19708 clk cpu0 R X30 00000000000381B4 +19709 clk cpu0 IT (19673) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +19709 clk cpu0 R X9 0000000003003000 +19710 clk cpu0 IT (19674) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +19710 clk cpu0 R X8 00000000000003EF +19711 clk cpu0 IT (19675) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +19711 clk cpu0 R X9 00000000030039C8 +19712 clk cpu0 IT (19676) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +19712 clk cpu0 MR8 03005940:000000805940_NS 00000000_000a1030 +19712 clk cpu0 R X0 00000000000A1030 +19712 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 00ca ALLOC 0x000000805940_NS +19712 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1653 ALLOC 0x000000805940_NS +19713 clk cpu0 IT (19677) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +19713 clk cpu0 R cpsr 620007c5 +19713 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0081 ALLOC 0x0000100a1000_NS +19713 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0401 ALLOC 0x0000100a1000_NS +19714 clk cpu0 IT (19678) 000a1030:0000100a1030_NS d5317fc0 O EL1h_n : MRS x0,TRCDEVARCH +19714 clk cpu0 R cpsr 620003c5 +19714 clk cpu0 R X0 0000000047705A13 +19715 clk cpu0 IT (19679) 000a1034:0000100a1034_NS d65f03c0 O EL1h_n : RET +19716 clk cpu0 IT (19680) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19716 clk cpu0 MR8 03700530:000000f00530_NS ffffffff_fe00000f +19716 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00011a3c +19716 clk cpu0 R SP_EL1 0000000003700540 +19716 clk cpu0 R X29 FFFFFFFFFE00000F +19716 clk cpu0 R X30 0000000000011A3C +19717 clk cpu0 IT (19681) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +19717 clk cpu0 R cpsr 620003c5 +19717 clk cpu0 R PMBIDR_EL1 00000030 +19717 clk cpu0 R TRBIDR_EL1 000000000000002b +19718 clk cpu0 IT (19682) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19718 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +19718 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a3c +19718 clk cpu0 R SP_EL1 0000000003700550 +19718 clk cpu0 R X29 FFFFFFFFFE00000F +19718 clk cpu0 R X30 0000000000011A3C +19719 clk cpu0 IT (19683) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +19720 clk cpu0 IT (19684) 00011a3c:000010011a3c_NS f9405fed O EL1h_n : LDR x13,[sp,#0xb8] +19720 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19720 clk cpu0 R X13 0000000003700700 +19720 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d3 INVAL 0x0000100a5a40_NS +19720 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d3 ALLOC 0x000010011a40_NS +19720 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0690 ALLOC 0x000010011a40_NS +19721 clk cpu0 IT (19685) 00011a40:000010011a40_NS f9400fee O EL1h_n : LDR x14,[sp,#0x18] +19721 clk cpu0 MR8 03700568:000000f00568_NS 00000000_00000010 +19721 clk cpu0 R X14 0000000000000010 +19722 clk cpu0 IT (19686) 00011a44:000010011a44_NS 8b0e01ad O EL1h_n : ADD x13,x13,x14 +19722 clk cpu0 R X13 0000000003700710 +19723 clk cpu0 IT (19687) 00011a48:000010011a48_NS f94003ef O EL1h_n : LDR x15,[sp,#0] +19723 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000020 +19723 clk cpu0 R X15 0000000000000020 +19724 clk cpu0 IT (19688) 00011a4c:000010011a4c_NS 8b0f01ad O EL1h_n : ADD x13,x13,x15 +19724 clk cpu0 R X13 0000000003700730 +19725 clk cpu0 IT (19689) 00011a50:000010011a50_NS f90009a0 O EL1h_n : STR x0,[x13,#0x10] +19725 clk cpu0 MW8 03700740:000000f00740_NS 00000000_47705a13 +19725 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003a INVAL 0x000010018740 +19725 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003a ALLOC 0x000000f00740_NS +19725 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 003a DIRTY 0x000000f00740_NS +19725 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000000f00740_NS +19725 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000000f00740_NS +19726 clk cpu0 IT (19690) 00011a54:000010011a54_NS f94053ed O EL1h_n : LDR x13,[sp,#0xa0] +19726 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +19726 clk cpu0 R X13 0000000000000000 +19727 clk cpu0 IT (19691) 00011a58:000010011a58_NS 52803c00 O EL1h_n : MOV w0,#0x1e0 +19727 clk cpu0 R X0 00000000000001E0 +19728 clk cpu0 IT (19692) 00011a5c:000010011a5c_NS b9400fe1 O EL1h_n : LDR w1,[sp,#0xc] +19728 clk cpu0 MR4 0370055c:000000f0055c_NS 00000001 +19728 clk cpu0 R X1 0000000000000001 +19729 clk cpu0 IT (19693) 00011a60:000010011a60_NS b9400be2 O EL1h_n : LDR w2,[sp,#8] +19729 clk cpu0 MR4 03700558:000000f00558_NS 00000003 +19729 clk cpu0 R X2 0000000000000003 +19730 clk cpu0 IT (19694) 00011a64:000010011a64_NS 2a0d03e3 O EL1h_n : MOV w3,w13 +19730 clk cpu0 R X3 0000000000000000 +19731 clk cpu0 IT (19695) 00011a68:000010011a68_NS 94022723 O EL1h_n : BL 0x9b6f4 +19731 clk cpu0 R X30 0000000000011A6C +19732 clk cpu0 IT (19696) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +19732 clk cpu0 MW8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19732 clk cpu0 R SP_EL1 0000000003700530 +19733 clk cpu0 IT (19697) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +19733 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +19733 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a6c +19734 clk cpu0 IT (19698) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +19734 clk cpu0 R cpsr 220003c5 +19735 clk cpu0 IT (19699) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +19735 clk cpu0 R X19 00000000000001E0 +19736 clk cpu0 IS (19700) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +19737 clk cpu0 IT (19701) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +19737 clk cpu0 R cpsr 620003c5 +19738 clk cpu0 IT (19702) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +19739 clk cpu0 IT (19703) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +19739 clk cpu0 R X1 00000000000001E0 +19740 clk cpu0 IT (19704) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +19740 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +19740 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a6c +19740 clk cpu0 R X19 00000000062160A2 +19740 clk cpu0 R X30 0000000000011A6C +19741 clk cpu0 IT (19705) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +19741 clk cpu0 R X0 0000000000000001 +19742 clk cpu0 IT (19706) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +19742 clk cpu0 MR8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19742 clk cpu0 R SP_EL1 0000000003700550 +19742 clk cpu0 R X20 FF83FF83FF83FF83 +19743 clk cpu0 IT (19707) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +19744 clk cpu0 IT (19708) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19744 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +19744 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a6c +19744 clk cpu0 R SP_EL1 0000000003700540 +19745 clk cpu0 IT (19709) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +19745 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +19745 clk cpu0 R cpsr 620003c5 +19745 clk cpu0 R PMBIDR_EL1 00000030 +19745 clk cpu0 R ESR_EL1 56000005 +19745 clk cpu0 R SPSR_EL1 620003c5 +19745 clk cpu0 R TRBIDR_EL1 000000000000002b +19745 clk cpu0 R ELR_EL1 000000000009ef50 +19746 clk cpu0 IT (19710) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +19747 clk cpu0 IT (19711) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +19747 clk cpu0 R SP_EL1 0000000003700440 +19748 clk cpu0 IT (19712) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +19748 clk cpu0 MW8 03700440:000000f00440_NS 00000000_00000001 +19748 clk cpu0 MW8 03700448:000000f00448_NS 00000000_000001e0 +19749 clk cpu0 IT (19713) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +19749 clk cpu0 R X0 0000000056000005 +19750 clk cpu0 IT (19714) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +19750 clk cpu0 R X1 0000000000000015 +19751 clk cpu0 IT (19715) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +19751 clk cpu0 R cpsr 620003c5 +19752 clk cpu0 IT (19716) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +19753 clk cpu0 IT (19717) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +19753 clk cpu0 R X1 0000000000000005 +19754 clk cpu0 IT (19718) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +19754 clk cpu0 R cpsr 620003c5 +19755 clk cpu0 IS (19719) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +19756 clk cpu0 IT (19720) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +19756 clk cpu0 R cpsr 820003c5 +19757 clk cpu0 IS (19721) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +19758 clk cpu0 IT (19722) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +19758 clk cpu0 R cpsr 820003c5 +19759 clk cpu0 IS (19723) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +19760 clk cpu0 IT (19724) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +19760 clk cpu0 R cpsr 820003c5 +19761 clk cpu0 IS (19725) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +19762 clk cpu0 IT (19726) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +19762 clk cpu0 R cpsr 820003c5 +19763 clk cpu0 IS (19727) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +19764 clk cpu0 IT (19728) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +19764 clk cpu0 R cpsr 820003c5 +19765 clk cpu0 IS (19729) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +19766 clk cpu0 IT (19730) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +19766 clk cpu0 R cpsr 820003c5 +19767 clk cpu0 IS (19731) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +19768 clk cpu0 IT (19732) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +19768 clk cpu0 R cpsr 620003c5 +19769 clk cpu0 IT (19733) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +19770 clk cpu0 IT (19734) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +19770 clk cpu0 MR8 03700440:000000f00440_NS 00000000_00000001 +19770 clk cpu0 MR8 03700448:000000f00448_NS 00000000_000001e0 +19770 clk cpu0 R X0 0000000000000001 +19770 clk cpu0 R X1 00000000000001E0 +19771 clk cpu0 IT (19735) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +19771 clk cpu0 R SP_EL1 0000000003700540 +19772 clk cpu0 IT (19736) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +19772 clk cpu0 R X0 00000000000001E0 +19773 clk cpu0 IT (19737) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19773 clk cpu0 MW8 03700530:000000f00530_NS ffffffff_fe00000f +19773 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00011a6c +19773 clk cpu0 R SP_EL1 0000000003700530 +19774 clk cpu0 IT (19738) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +19774 clk cpu0 R X30 00000000000381B4 +19775 clk cpu0 IT (19739) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +19775 clk cpu0 R X9 0000000003003000 +19776 clk cpu0 IT (19740) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +19776 clk cpu0 R X8 0000000000000078 +19777 clk cpu0 IT (19741) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +19777 clk cpu0 R X9 00000000030039C8 +19778 clk cpu0 IT (19742) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +19778 clk cpu0 MR8 03003d88:000000803d88_NS 00000000_0009f778 +19778 clk cpu0 R X0 000000000009F778 +19779 clk cpu0 IT (19743) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +19779 clk cpu0 R cpsr 620007c5 +19780 clk cpu0 IT (19744) 0009f778:00001009f778_NS d53108e0 O EL1h_n : MRS x0,TRCIDR0 +19780 clk cpu0 R cpsr 620003c5 +19780 clk cpu0 R X0 0000000008000AA1 +19781 clk cpu0 IT (19745) 0009f77c:00001009f77c_NS d65f03c0 O EL1h_n : RET +19782 clk cpu0 IT (19746) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19782 clk cpu0 MR8 03700530:000000f00530_NS ffffffff_fe00000f +19782 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00011a6c +19782 clk cpu0 R SP_EL1 0000000003700540 +19782 clk cpu0 R X29 FFFFFFFFFE00000F +19782 clk cpu0 R X30 0000000000011A6C +19783 clk cpu0 IT (19747) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +19783 clk cpu0 R cpsr 620003c5 +19783 clk cpu0 R PMBIDR_EL1 00000030 +19783 clk cpu0 R TRBIDR_EL1 000000000000002b +19784 clk cpu0 IT (19748) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19784 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +19784 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a6c +19784 clk cpu0 R SP_EL1 0000000003700550 +19784 clk cpu0 R X29 FFFFFFFFFE00000F +19784 clk cpu0 R X30 0000000000011A6C +19785 clk cpu0 IT (19749) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +19786 clk cpu0 IT (19750) 00011a6c:000010011a6c_NS f9405fee O EL1h_n : LDR x14,[sp,#0xb8] +19786 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19786 clk cpu0 R X14 0000000003700700 +19787 clk cpu0 IT (19751) 00011a70:000010011a70_NS f9400fef O EL1h_n : LDR x15,[sp,#0x18] +19787 clk cpu0 MR8 03700568:000000f00568_NS 00000000_00000010 +19787 clk cpu0 R X15 0000000000000010 +19788 clk cpu0 IT (19752) 00011a74:000010011a74_NS 8b0f01ce O EL1h_n : ADD x14,x14,x15 +19788 clk cpu0 R X14 0000000003700710 +19789 clk cpu0 IT (19753) 00011a78:000010011a78_NS f94003f0 O EL1h_n : LDR x16,[sp,#0] +19789 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000020 +19789 clk cpu0 R X16 0000000000000020 +19790 clk cpu0 IT (19754) 00011a7c:000010011a7c_NS 8b1001ce O EL1h_n : ADD x14,x14,x16 +19790 clk cpu0 R X14 0000000003700730 +19790 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d4 ALLOC 0x000010011a80_NS +19790 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 06a0 ALLOC 0x000010011a80_NS +19791 clk cpu0 IT (19755) 00011a80:000010011a80_NS f9000dc0 O EL1h_n : STR x0,[x14,#0x18] +19791 clk cpu0 MW8 03700748:000000f00748_NS 00000000_08000aa1 +19792 clk cpu0 IT (19756) 00011a84:000010011a84_NS f94053ee O EL1h_n : LDR x14,[sp,#0xa0] +19792 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +19792 clk cpu0 R X14 0000000000000000 +19793 clk cpu0 IT (19757) 00011a88:000010011a88_NS 52803c80 O EL1h_n : MOV w0,#0x1e4 +19793 clk cpu0 R X0 00000000000001E4 +19794 clk cpu0 IT (19758) 00011a8c:000010011a8c_NS b9400fe1 O EL1h_n : LDR w1,[sp,#0xc] +19794 clk cpu0 MR4 0370055c:000000f0055c_NS 00000001 +19794 clk cpu0 R X1 0000000000000001 +19795 clk cpu0 IT (19759) 00011a90:000010011a90_NS b9400be2 O EL1h_n : LDR w2,[sp,#8] +19795 clk cpu0 MR4 03700558:000000f00558_NS 00000003 +19795 clk cpu0 R X2 0000000000000003 +19796 clk cpu0 IT (19760) 00011a94:000010011a94_NS 2a0e03e3 O EL1h_n : MOV w3,w14 +19796 clk cpu0 R X3 0000000000000000 +19797 clk cpu0 IT (19761) 00011a98:000010011a98_NS 94022717 O EL1h_n : BL 0x9b6f4 +19797 clk cpu0 R X30 0000000000011A9C +19798 clk cpu0 IT (19762) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +19798 clk cpu0 MW8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19798 clk cpu0 R SP_EL1 0000000003700530 +19799 clk cpu0 IT (19763) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +19799 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +19799 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a9c +19800 clk cpu0 IT (19764) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +19800 clk cpu0 R cpsr 220003c5 +19801 clk cpu0 IT (19765) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +19801 clk cpu0 R X19 00000000000001E4 +19802 clk cpu0 IS (19766) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +19803 clk cpu0 IT (19767) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +19803 clk cpu0 R cpsr 620003c5 +19804 clk cpu0 IT (19768) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +19805 clk cpu0 IT (19769) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +19805 clk cpu0 R X1 00000000000001E4 +19806 clk cpu0 IT (19770) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +19806 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +19806 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a9c +19806 clk cpu0 R X19 00000000062160A2 +19806 clk cpu0 R X30 0000000000011A9C +19807 clk cpu0 IT (19771) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +19807 clk cpu0 R X0 0000000000000001 +19808 clk cpu0 IT (19772) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +19808 clk cpu0 MR8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19808 clk cpu0 R SP_EL1 0000000003700550 +19808 clk cpu0 R X20 FF83FF83FF83FF83 +19809 clk cpu0 IT (19773) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +19810 clk cpu0 IT (19774) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19810 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +19810 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011a9c +19810 clk cpu0 R SP_EL1 0000000003700540 +19811 clk cpu0 IT (19775) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +19811 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +19811 clk cpu0 R cpsr 620003c5 +19811 clk cpu0 R PMBIDR_EL1 00000030 +19811 clk cpu0 R ESR_EL1 56000005 +19811 clk cpu0 R SPSR_EL1 620003c5 +19811 clk cpu0 R TRBIDR_EL1 000000000000002b +19811 clk cpu0 R ELR_EL1 000000000009ef50 +19812 clk cpu0 IT (19776) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +19813 clk cpu0 IT (19777) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +19813 clk cpu0 R SP_EL1 0000000003700440 +19814 clk cpu0 IT (19778) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +19814 clk cpu0 MW8 03700440:000000f00440_NS 00000000_00000001 +19814 clk cpu0 MW8 03700448:000000f00448_NS 00000000_000001e4 +19815 clk cpu0 IT (19779) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +19815 clk cpu0 R X0 0000000056000005 +19816 clk cpu0 IT (19780) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +19816 clk cpu0 R X1 0000000000000015 +19817 clk cpu0 IT (19781) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +19817 clk cpu0 R cpsr 620003c5 +19818 clk cpu0 IT (19782) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +19819 clk cpu0 IT (19783) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +19819 clk cpu0 R X1 0000000000000005 +19820 clk cpu0 IT (19784) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +19820 clk cpu0 R cpsr 620003c5 +19821 clk cpu0 IS (19785) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +19822 clk cpu0 IT (19786) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +19822 clk cpu0 R cpsr 820003c5 +19823 clk cpu0 IS (19787) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +19824 clk cpu0 IT (19788) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +19824 clk cpu0 R cpsr 820003c5 +19825 clk cpu0 IS (19789) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +19826 clk cpu0 IT (19790) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +19826 clk cpu0 R cpsr 820003c5 +19827 clk cpu0 IS (19791) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +19828 clk cpu0 IT (19792) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +19828 clk cpu0 R cpsr 820003c5 +19829 clk cpu0 IS (19793) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +19830 clk cpu0 IT (19794) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +19830 clk cpu0 R cpsr 820003c5 +19831 clk cpu0 IS (19795) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +19832 clk cpu0 IT (19796) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +19832 clk cpu0 R cpsr 820003c5 +19833 clk cpu0 IS (19797) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +19834 clk cpu0 IT (19798) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +19834 clk cpu0 R cpsr 620003c5 +19835 clk cpu0 IT (19799) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +19836 clk cpu0 IT (19800) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +19836 clk cpu0 MR8 03700440:000000f00440_NS 00000000_00000001 +19836 clk cpu0 MR8 03700448:000000f00448_NS 00000000_000001e4 +19836 clk cpu0 R X0 0000000000000001 +19836 clk cpu0 R X1 00000000000001E4 +19837 clk cpu0 IT (19801) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +19837 clk cpu0 R SP_EL1 0000000003700540 +19838 clk cpu0 IT (19802) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +19838 clk cpu0 R X0 00000000000001E4 +19839 clk cpu0 IT (19803) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19839 clk cpu0 MW8 03700530:000000f00530_NS ffffffff_fe00000f +19839 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00011a9c +19839 clk cpu0 R SP_EL1 0000000003700530 +19840 clk cpu0 IT (19804) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +19840 clk cpu0 R X30 00000000000381B4 +19841 clk cpu0 IT (19805) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +19841 clk cpu0 R X9 0000000003003000 +19842 clk cpu0 IT (19806) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +19842 clk cpu0 R X8 0000000000000079 +19843 clk cpu0 IT (19807) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +19843 clk cpu0 R X9 00000000030039C8 +19844 clk cpu0 IT (19808) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +19844 clk cpu0 MR8 03003d90:000000803d90_NS 00000000_0009f780 +19844 clk cpu0 R X0 000000000009F780 +19845 clk cpu0 IT (19809) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +19845 clk cpu0 R cpsr 620007c5 +19846 clk cpu0 IT (19810) 0009f780:00001009f780_NS d53109e0 O EL1h_n : MRS x0,TRCIDR1 +19846 clk cpu0 R cpsr 620003c5 +19846 clk cpu0 R X0 000000004100FFF0 +19847 clk cpu0 IT (19811) 0009f784:00001009f784_NS d65f03c0 O EL1h_n : RET +19848 clk cpu0 IT (19812) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19848 clk cpu0 MR8 03700530:000000f00530_NS ffffffff_fe00000f +19848 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00011a9c +19848 clk cpu0 R SP_EL1 0000000003700540 +19848 clk cpu0 R X29 FFFFFFFFFE00000F +19848 clk cpu0 R X30 0000000000011A9C +19849 clk cpu0 IT (19813) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +19849 clk cpu0 R cpsr 620003c5 +19849 clk cpu0 R PMBIDR_EL1 00000030 +19849 clk cpu0 R TRBIDR_EL1 000000000000002b +19850 clk cpu0 IT (19814) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19850 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +19850 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011a9c +19850 clk cpu0 R SP_EL1 0000000003700550 +19850 clk cpu0 R X29 FFFFFFFFFE00000F +19850 clk cpu0 R X30 0000000000011A9C +19851 clk cpu0 IT (19815) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +19852 clk cpu0 IT (19816) 00011a9c:000010011a9c_NS f9405fef O EL1h_n : LDR x15,[sp,#0xb8] +19852 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19852 clk cpu0 R X15 0000000003700700 +19853 clk cpu0 IT (19817) 00011aa0:000010011aa0_NS f9400ff0 O EL1h_n : LDR x16,[sp,#0x18] +19853 clk cpu0 MR8 03700568:000000f00568_NS 00000000_00000010 +19853 clk cpu0 R X16 0000000000000010 +19854 clk cpu0 IT (19818) 00011aa4:000010011aa4_NS 8b1001ef O EL1h_n : ADD x15,x15,x16 +19854 clk cpu0 R X15 0000000003700710 +19855 clk cpu0 IT (19819) 00011aa8:000010011aa8_NS f94003f1 O EL1h_n : LDR x17,[sp,#0] +19855 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000020 +19855 clk cpu0 R X17 0000000000000020 +19856 clk cpu0 IT (19820) 00011aac:000010011aac_NS 8b1101ef O EL1h_n : ADD x15,x15,x17 +19856 clk cpu0 R X15 0000000003700730 +19857 clk cpu0 IT (19821) 00011ab0:000010011ab0_NS f90011e0 O EL1h_n : STR x0,[x15,#0x20] +19857 clk cpu0 MW8 03700750:000000f00750_NS 00000000_4100fff0 +19858 clk cpu0 IT (19822) 00011ab4:000010011ab4_NS f94053ef O EL1h_n : LDR x15,[sp,#0xa0] +19858 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +19858 clk cpu0 R X15 0000000000000000 +19859 clk cpu0 IT (19823) 00011ab8:000010011ab8_NS 52803d00 O EL1h_n : MOV w0,#0x1e8 +19859 clk cpu0 R X0 00000000000001E8 +19860 clk cpu0 IT (19824) 00011abc:000010011abc_NS b9400fe1 O EL1h_n : LDR w1,[sp,#0xc] +19860 clk cpu0 MR4 0370055c:000000f0055c_NS 00000001 +19860 clk cpu0 R X1 0000000000000001 +19860 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d7 ALLOC 0x000010011ac0_NS +19860 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 06b0 ALLOC 0x000010011ac0_NS +19861 clk cpu0 IT (19825) 00011ac0:000010011ac0_NS b9400be2 O EL1h_n : LDR w2,[sp,#8] +19861 clk cpu0 MR4 03700558:000000f00558_NS 00000003 +19861 clk cpu0 R X2 0000000000000003 +19862 clk cpu0 IT (19826) 00011ac4:000010011ac4_NS 2a0f03e3 O EL1h_n : MOV w3,w15 +19862 clk cpu0 R X3 0000000000000000 +19863 clk cpu0 IT (19827) 00011ac8:000010011ac8_NS 9402270b O EL1h_n : BL 0x9b6f4 +19863 clk cpu0 R X30 0000000000011ACC +19864 clk cpu0 IT (19828) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +19864 clk cpu0 MW8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19864 clk cpu0 R SP_EL1 0000000003700530 +19865 clk cpu0 IT (19829) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +19865 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +19865 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011acc +19866 clk cpu0 IT (19830) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +19866 clk cpu0 R cpsr 220003c5 +19867 clk cpu0 IT (19831) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +19867 clk cpu0 R X19 00000000000001E8 +19868 clk cpu0 IS (19832) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +19869 clk cpu0 IT (19833) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +19869 clk cpu0 R cpsr 620003c5 +19870 clk cpu0 IT (19834) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +19871 clk cpu0 IT (19835) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +19871 clk cpu0 R X1 00000000000001E8 +19872 clk cpu0 IT (19836) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +19872 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +19872 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011acc +19872 clk cpu0 R X19 00000000062160A2 +19872 clk cpu0 R X30 0000000000011ACC +19873 clk cpu0 IT (19837) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +19873 clk cpu0 R X0 0000000000000001 +19874 clk cpu0 IT (19838) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +19874 clk cpu0 MR8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19874 clk cpu0 R SP_EL1 0000000003700550 +19874 clk cpu0 R X20 FF83FF83FF83FF83 +19875 clk cpu0 IT (19839) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +19876 clk cpu0 IT (19840) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19876 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +19876 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011acc +19876 clk cpu0 R SP_EL1 0000000003700540 +19877 clk cpu0 IT (19841) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +19877 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +19877 clk cpu0 R cpsr 620003c5 +19877 clk cpu0 R PMBIDR_EL1 00000030 +19877 clk cpu0 R ESR_EL1 56000005 +19877 clk cpu0 R SPSR_EL1 620003c5 +19877 clk cpu0 R TRBIDR_EL1 000000000000002b +19877 clk cpu0 R ELR_EL1 000000000009ef50 +19878 clk cpu0 IT (19842) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +19879 clk cpu0 IT (19843) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +19879 clk cpu0 R SP_EL1 0000000003700440 +19880 clk cpu0 IT (19844) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +19880 clk cpu0 MW8 03700440:000000f00440_NS 00000000_00000001 +19880 clk cpu0 MW8 03700448:000000f00448_NS 00000000_000001e8 +19881 clk cpu0 IT (19845) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +19881 clk cpu0 R X0 0000000056000005 +19882 clk cpu0 IT (19846) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +19882 clk cpu0 R X1 0000000000000015 +19883 clk cpu0 IT (19847) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +19883 clk cpu0 R cpsr 620003c5 +19884 clk cpu0 IT (19848) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +19885 clk cpu0 IT (19849) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +19885 clk cpu0 R X1 0000000000000005 +19886 clk cpu0 IT (19850) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +19886 clk cpu0 R cpsr 620003c5 +19887 clk cpu0 IS (19851) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +19888 clk cpu0 IT (19852) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +19888 clk cpu0 R cpsr 820003c5 +19889 clk cpu0 IS (19853) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +19890 clk cpu0 IT (19854) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +19890 clk cpu0 R cpsr 820003c5 +19891 clk cpu0 IS (19855) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +19892 clk cpu0 IT (19856) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +19892 clk cpu0 R cpsr 820003c5 +19893 clk cpu0 IS (19857) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +19894 clk cpu0 IT (19858) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +19894 clk cpu0 R cpsr 820003c5 +19895 clk cpu0 IS (19859) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +19896 clk cpu0 IT (19860) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +19896 clk cpu0 R cpsr 820003c5 +19897 clk cpu0 IS (19861) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +19898 clk cpu0 IT (19862) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +19898 clk cpu0 R cpsr 820003c5 +19899 clk cpu0 IS (19863) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +19900 clk cpu0 IT (19864) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +19900 clk cpu0 R cpsr 620003c5 +19901 clk cpu0 IT (19865) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +19902 clk cpu0 IT (19866) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +19902 clk cpu0 MR8 03700440:000000f00440_NS 00000000_00000001 +19902 clk cpu0 MR8 03700448:000000f00448_NS 00000000_000001e8 +19902 clk cpu0 R X0 0000000000000001 +19902 clk cpu0 R X1 00000000000001E8 +19903 clk cpu0 IT (19867) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +19903 clk cpu0 R SP_EL1 0000000003700540 +19904 clk cpu0 IT (19868) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +19904 clk cpu0 R X0 00000000000001E8 +19905 clk cpu0 IT (19869) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19905 clk cpu0 MW8 03700530:000000f00530_NS ffffffff_fe00000f +19905 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00011acc +19905 clk cpu0 R SP_EL1 0000000003700530 +19906 clk cpu0 IT (19870) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +19906 clk cpu0 R X30 00000000000381B4 +19907 clk cpu0 IT (19871) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +19907 clk cpu0 R X9 0000000003003000 +19908 clk cpu0 IT (19872) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +19908 clk cpu0 R X8 000000000000007A +19909 clk cpu0 IT (19873) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +19909 clk cpu0 R X9 00000000030039C8 +19910 clk cpu0 IT (19874) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +19910 clk cpu0 MR8 03003d98:000000803d98_NS 00000000_0009f788 +19910 clk cpu0 R X0 000000000009F788 +19911 clk cpu0 IT (19875) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +19911 clk cpu0 R cpsr 620007c5 +19912 clk cpu0 IT (19876) 0009f788:00001009f788_NS d5310ae0 O EL1h_n : MRS x0,TRCIDR2 +19912 clk cpu0 R cpsr 620003c5 +19912 clk cpu0 R X0 00000000C0001088 +19913 clk cpu0 IT (19877) 0009f78c:00001009f78c_NS d65f03c0 O EL1h_n : RET +19914 clk cpu0 IT (19878) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19914 clk cpu0 MR8 03700530:000000f00530_NS ffffffff_fe00000f +19914 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00011acc +19914 clk cpu0 R SP_EL1 0000000003700540 +19914 clk cpu0 R X29 FFFFFFFFFE00000F +19914 clk cpu0 R X30 0000000000011ACC +19915 clk cpu0 IT (19879) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +19915 clk cpu0 R cpsr 620003c5 +19915 clk cpu0 R PMBIDR_EL1 00000030 +19915 clk cpu0 R TRBIDR_EL1 000000000000002b +19916 clk cpu0 IT (19880) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19916 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +19916 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011acc +19916 clk cpu0 R SP_EL1 0000000003700550 +19916 clk cpu0 R X29 FFFFFFFFFE00000F +19916 clk cpu0 R X30 0000000000011ACC +19917 clk cpu0 IT (19881) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +19918 clk cpu0 IT (19882) 00011acc:000010011acc_NS f9405ff0 O EL1h_n : LDR x16,[sp,#0xb8] +19918 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19918 clk cpu0 R X16 0000000003700700 +19919 clk cpu0 IT (19883) 00011ad0:000010011ad0_NS f9400ff1 O EL1h_n : LDR x17,[sp,#0x18] +19919 clk cpu0 MR8 03700568:000000f00568_NS 00000000_00000010 +19919 clk cpu0 R X17 0000000000000010 +19920 clk cpu0 IT (19884) 00011ad4:000010011ad4_NS 8b110210 O EL1h_n : ADD x16,x16,x17 +19920 clk cpu0 R X16 0000000003700710 +19921 clk cpu0 IT (19885) 00011ad8:000010011ad8_NS f94003f2 O EL1h_n : LDR x18,[sp,#0] +19921 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000020 +19921 clk cpu0 R X18 0000000000000020 +19922 clk cpu0 IT (19886) 00011adc:000010011adc_NS 8b120210 O EL1h_n : ADD x16,x16,x18 +19922 clk cpu0 R X16 0000000003700730 +19923 clk cpu0 IT (19887) 00011ae0:000010011ae0_NS f9001600 O EL1h_n : STR x0,[x16,#0x28] +19923 clk cpu0 MW8 03700758:000000f00758_NS 00000000_c0001088 +19924 clk cpu0 IT (19888) 00011ae4:000010011ae4_NS f94053f0 O EL1h_n : LDR x16,[sp,#0xa0] +19924 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00000000 +19924 clk cpu0 R X16 0000000000000000 +19925 clk cpu0 IT (19889) 00011ae8:000010011ae8_NS 52803000 O EL1h_n : MOV w0,#0x180 +19925 clk cpu0 R X0 0000000000000180 +19926 clk cpu0 IT (19890) 00011aec:000010011aec_NS b9400fe1 O EL1h_n : LDR w1,[sp,#0xc] +19926 clk cpu0 MR4 0370055c:000000f0055c_NS 00000001 +19926 clk cpu0 R X1 0000000000000001 +19927 clk cpu0 IT (19891) 00011af0:000010011af0_NS b9400be2 O EL1h_n : LDR w2,[sp,#8] +19927 clk cpu0 MR4 03700558:000000f00558_NS 00000003 +19927 clk cpu0 R X2 0000000000000003 +19928 clk cpu0 IT (19892) 00011af4:000010011af4_NS 2a1003e3 O EL1h_n : MOV w3,w16 +19928 clk cpu0 R X3 0000000000000000 +19929 clk cpu0 IT (19893) 00011af8:000010011af8_NS 940226ff O EL1h_n : BL 0x9b6f4 +19929 clk cpu0 R X30 0000000000011AFC +19930 clk cpu0 IT (19894) 0009b6f4:00001009b6f4_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +19930 clk cpu0 MW8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19930 clk cpu0 R SP_EL1 0000000003700530 +19931 clk cpu0 IT (19895) 0009b6f8:00001009b6f8_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +19931 clk cpu0 MW8 03700540:000000f00540_NS 00000000_062160a2 +19931 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011afc +19932 clk cpu0 IT (19896) 0009b6fc:00001009b6fc_NS 7100045f O EL1h_n : CMP w2,#1 +19932 clk cpu0 R cpsr 220003c5 +19933 clk cpu0 IT (19897) 0009b700:00001009b700_NS 2a0003f3 O EL1h_n : MOV w19,w0 +19933 clk cpu0 R X19 0000000000000180 +19934 clk cpu0 IS (19898) 0009b704:00001009b704_NS 54000260 O EL1h_n : B.EQ 0x9b750 +19935 clk cpu0 IT (19899) 0009b708:00001009b708_NS 71000c5f O EL1h_n : CMP w2,#3 +19935 clk cpu0 R cpsr 620003c5 +19936 clk cpu0 IT (19900) 0009b70c:00001009b70c_NS 540002a0 O EL1h_n : B.EQ 0x9b760 +19937 clk cpu0 IT (19901) 0009b760:00001009b760_NS 2a1303e1 O EL1h_n : MOV w1,w19 +19937 clk cpu0 R X1 0000000000000180 +19938 clk cpu0 IT (19902) 0009b764:00001009b764_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +19938 clk cpu0 MR8 03700540:000000f00540_NS 00000000_062160a2 +19938 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011afc +19938 clk cpu0 R X19 00000000062160A2 +19938 clk cpu0 R X30 0000000000011AFC +19939 clk cpu0 IT (19903) 0009b768:00001009b768_NS 52800020 O EL1h_n : MOV w0,#1 +19939 clk cpu0 R X0 0000000000000001 +19940 clk cpu0 IT (19904) 0009b76c:00001009b76c_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +19940 clk cpu0 MR8 03700530:000000f00530_NS ff83ff83_ff83ff83 +19940 clk cpu0 R SP_EL1 0000000003700550 +19940 clk cpu0 R X20 FF83FF83FF83FF83 +19941 clk cpu0 IT (19905) 0009b770:00001009b770_NS 14000df6 O EL1h_n : B 0x9ef48 +19942 clk cpu0 IT (19906) 0009ef48:00001009ef48_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19942 clk cpu0 MW8 03700540:000000f00540_NS ffffffff_fe00000f +19942 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00011afc +19942 clk cpu0 R SP_EL1 0000000003700540 +19943 clk cpu0 IT (19907) 0009ef4c:00001009ef4c_NS d40000a1 O EL1h_n : SVC #5 +19943 clk cpu0 E 0009ef4c:00001009ef4c_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +19943 clk cpu0 R cpsr 620003c5 +19943 clk cpu0 R PMBIDR_EL1 00000030 +19943 clk cpu0 R ESR_EL1 56000005 +19943 clk cpu0 R SPSR_EL1 620003c5 +19943 clk cpu0 R TRBIDR_EL1 000000000000002b +19943 clk cpu0 R ELR_EL1 000000000009ef50 +19944 clk cpu0 IT (19908) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +19945 clk cpu0 IT (19909) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +19945 clk cpu0 R SP_EL1 0000000003700440 +19946 clk cpu0 IT (19910) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +19946 clk cpu0 MW8 03700440:000000f00440_NS 00000000_00000001 +19946 clk cpu0 MW8 03700448:000000f00448_NS 00000000_00000180 +19947 clk cpu0 IT (19911) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +19947 clk cpu0 R X0 0000000056000005 +19948 clk cpu0 IT (19912) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +19948 clk cpu0 R X1 0000000000000015 +19949 clk cpu0 IT (19913) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +19949 clk cpu0 R cpsr 620003c5 +19950 clk cpu0 IT (19914) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +19951 clk cpu0 IT (19915) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +19951 clk cpu0 R X1 0000000000000005 +19952 clk cpu0 IT (19916) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +19952 clk cpu0 R cpsr 620003c5 +19953 clk cpu0 IS (19917) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +19954 clk cpu0 IT (19918) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +19954 clk cpu0 R cpsr 820003c5 +19955 clk cpu0 IS (19919) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +19956 clk cpu0 IT (19920) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +19956 clk cpu0 R cpsr 820003c5 +19957 clk cpu0 IS (19921) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +19958 clk cpu0 IT (19922) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +19958 clk cpu0 R cpsr 820003c5 +19959 clk cpu0 IS (19923) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +19960 clk cpu0 IT (19924) 00035848:000010035848_NS 7100183f O EL1h_n : CMP w1,#6 +19960 clk cpu0 R cpsr 820003c5 +19961 clk cpu0 IS (19925) 0003584c:00001003584c_NS 54015080 O EL1h_n : B.EQ 0x3825c +19962 clk cpu0 IT (19926) 00035850:000010035850_NS 7100243f O EL1h_n : CMP w1,#9 +19962 clk cpu0 R cpsr 820003c5 +19963 clk cpu0 IS (19927) 00035854:000010035854_NS 54014c40 O EL1h_n : B.EQ 0x381dc +19964 clk cpu0 IT (19928) 00035858:000010035858_NS 7100243f O EL1h_n : CMP w1,#9 +19964 clk cpu0 R cpsr 820003c5 +19965 clk cpu0 IS (19929) 0003585c:00001003585c_NS 54014e40 O EL1h_n : B.EQ 0x38224 +19966 clk cpu0 IT (19930) 00035860:000010035860_NS 7100143f O EL1h_n : CMP w1,#5 +19966 clk cpu0 R cpsr 620003c5 +19967 clk cpu0 IT (19931) 00035864:000010035864_NS 540149e0 O EL1h_n : B.EQ 0x381a0 +19968 clk cpu0 IT (19932) 000381a0:0000100381a0_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +19968 clk cpu0 MR8 03700440:000000f00440_NS 00000000_00000001 +19968 clk cpu0 MR8 03700448:000000f00448_NS 00000000_00000180 +19968 clk cpu0 R X0 0000000000000001 +19968 clk cpu0 R X1 0000000000000180 +19969 clk cpu0 IT (19933) 000381a4:0000100381a4_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +19969 clk cpu0 R SP_EL1 0000000003700540 +19970 clk cpu0 IT (19934) 000381a8:0000100381a8_NS aa0103e0 O EL1h_n : MOV x0,x1 +19970 clk cpu0 R X0 0000000000000180 +19971 clk cpu0 IT (19935) 000381ac:0000100381ac_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +19971 clk cpu0 MW8 03700530:000000f00530_NS ffffffff_fe00000f +19971 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00011afc +19971 clk cpu0 R SP_EL1 0000000003700530 +19972 clk cpu0 IT (19936) 000381b0:0000100381b0_NS 94018d87 O EL1h_n : BL 0x9b7cc +19972 clk cpu0 R X30 00000000000381B4 +19973 clk cpu0 IT (19937) 0009b7cc:00001009b7cc_NS 90017b49 O EL1h_n : ADRP x9,0x30037cc +19973 clk cpu0 R X9 0000000003003000 +19974 clk cpu0 IT (19938) 0009b7d0:00001009b7d0_NS 53027c08 O EL1h_n : LSR w8,w0,#2 +19974 clk cpu0 R X8 0000000000000060 +19975 clk cpu0 IT (19939) 0009b7d4:00001009b7d4_NS 91272129 O EL1h_n : ADD x9,x9,#0x9c8 +19975 clk cpu0 R X9 00000000030039C8 +19976 clk cpu0 IT (19940) 0009b7d8:00001009b7d8_NS f8685920 O EL1h_n : LDR x0,[x9,w8,UXTW #3] +19976 clk cpu0 MR8 03003cc8:000000803cc8_NS 00000000_0009f6b8 +19976 clk cpu0 R X0 000000000009F6B8 +19976 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 01e7 INVAL 0x0000100a7cc0_NS +19976 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 01e7 ALLOC 0x000000803cc0_NS +19976 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0f31 ALLOC 0x000000803cc0_NS +19977 clk cpu0 IT (19941) 0009b7dc:00001009b7dc_NS d61f0000 O EL1h_n : BR x0 +19977 clk cpu0 R cpsr 620007c5 +19977 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01b4 ALLOC 0x00001009f680_NS +19977 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1da0 ALLOC 0x00001009f680_NS +19978 clk cpu0 IT (19942) 0009f6b8:00001009f6b8_NS d53100c0 O EL1h_n : MRS x0,TRCIDR8 +19978 clk cpu0 R cpsr 620003c5 +19978 clk cpu0 R X0 0000000000000000 +19979 clk cpu0 IT (19943) 0009f6bc:00001009f6bc_NS d65f03c0 O EL1h_n : RET +19980 clk cpu0 IT (19944) 000381b4:0000100381b4_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19980 clk cpu0 MR8 03700530:000000f00530_NS ffffffff_fe00000f +19980 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00011afc +19980 clk cpu0 R SP_EL1 0000000003700540 +19980 clk cpu0 R X29 FFFFFFFFFE00000F +19980 clk cpu0 R X30 0000000000011AFC +19981 clk cpu0 IT (19945) 000381b8:0000100381b8_NS d69f03e0 O EL1h_n : ERET +19981 clk cpu0 R cpsr 620003c5 +19981 clk cpu0 R PMBIDR_EL1 00000030 +19981 clk cpu0 R TRBIDR_EL1 000000000000002b +19982 clk cpu0 IT (19946) 0009ef50:00001009ef50_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +19982 clk cpu0 MR8 03700540:000000f00540_NS ffffffff_fe00000f +19982 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00011afc +19982 clk cpu0 R SP_EL1 0000000003700550 +19982 clk cpu0 R X29 FFFFFFFFFE00000F +19982 clk cpu0 R X30 0000000000011AFC +19983 clk cpu0 IT (19947) 0009ef54:00001009ef54_NS d65f03c0 O EL1h_n : RET +19984 clk cpu0 IT (19948) 00011afc:000010011afc_NS f9405ff1 O EL1h_n : LDR x17,[sp,#0xb8] +19984 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19984 clk cpu0 R X17 0000000003700700 +19984 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d9 ALLOC 0x000010011b00_NS +19984 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 06c0 ALLOC 0x000010011b00_NS +19985 clk cpu0 IT (19949) 00011b00:000010011b00_NS f9400ff2 O EL1h_n : LDR x18,[sp,#0x18] +19985 clk cpu0 MR8 03700568:000000f00568_NS 00000000_00000010 +19985 clk cpu0 R X18 0000000000000010 +19986 clk cpu0 IT (19950) 00011b04:000010011b04_NS 8b120231 O EL1h_n : ADD x17,x17,x18 +19986 clk cpu0 R X17 0000000003700710 +19987 clk cpu0 IT (19951) 00011b08:000010011b08_NS f94003e4 O EL1h_n : LDR x4,[sp,#0] +19987 clk cpu0 MR8 03700550:000000f00550_NS 00000000_00000020 +19987 clk cpu0 R X4 0000000000000020 +19988 clk cpu0 IT (19952) 00011b0c:000010011b0c_NS 8b040231 O EL1h_n : ADD x17,x17,x4 +19988 clk cpu0 R X17 0000000003700730 +19989 clk cpu0 IT (19953) 00011b10:000010011b10_NS f9001a20 O EL1h_n : STR x0,[x17,#0x30] +19989 clk cpu0 MW8 03700760:000000f00760_NS 00000000_00000000 +19990 clk cpu0 IT (19954) 00011b14:000010011b14_NS f9405ff1 O EL1h_n : LDR x17,[sp,#0xb8] +19990 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +19990 clk cpu0 R X17 0000000003700700 +19991 clk cpu0 IT (19955) 00011b18:000010011b18_NS 8b120231 O EL1h_n : ADD x17,x17,x18 +19991 clk cpu0 R X17 0000000003700710 +19992 clk cpu0 IT (19956) 00011b1c:000010011b1c_NS 8b040221 O EL1h_n : ADD x1,x17,x4 +19992 clk cpu0 R X1 0000000003700730 +19993 clk cpu0 IT (19957) 00011b20:000010011b20_NS f9400be0 O EL1h_n : LDR x0,[sp,#0x10] +19993 clk cpu0 MR8 03700560:000000f00560_NS 00000000_03700600 +19993 clk cpu0 R X0 0000000003700600 +19994 clk cpu0 IT (19958) 00011b24:000010011b24_NS 52800702 O EL1h_n : MOV w2,#0x38 +19994 clk cpu0 R X2 0000000000000038 +19995 clk cpu0 IT (19959) 00011b28:000010011b28_NS 97fffeac O EL1h_n : BL 0x115d8 +19995 clk cpu0 R X30 0000000000011B2C +19996 clk cpu0 IT (19960) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +19996 clk cpu0 R SP_EL1 0000000003700530 +19997 clk cpu0 IT (19961) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +19997 clk cpu0 R X8 0000000000000000 +19998 clk cpu0 IT (19962) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +19998 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +19999 clk cpu0 IT (19963) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +19999 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700730 +20000 clk cpu0 IT (19964) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +20000 clk cpu0 MW1 0370053f:000000f0053f_NS 38 +20001 clk cpu0 IT (19965) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20001 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +20002 clk cpu0 IT (19966) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20002 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +20002 clk cpu0 R X8 0000000000000000 +20003 clk cpu0 IT (19967) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20003 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20003 clk cpu0 R X9 0000000000000038 +20004 clk cpu0 IT (19968) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20004 clk cpu0 R cpsr 820003c5 +20005 clk cpu0 IT (19969) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20005 clk cpu0 R X8 0000000000000001 +20006 clk cpu0 IT (19970) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20007 clk cpu0 IT (19971) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20007 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20007 clk cpu0 R X8 0000000003700730 +20008 clk cpu0 IT (19972) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20008 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +20008 clk cpu0 R X9 0000000000000000 +20009 clk cpu0 IT (19973) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20009 clk cpu0 R X10 0000000000000000 +20010 clk cpu0 IT (19974) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20010 clk cpu0 R X10 0000000000000000 +20011 clk cpu0 IT (19975) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20011 clk cpu0 R X8 0000000003700730 +20012 clk cpu0 IT (19976) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20012 clk cpu0 MR1 03700730:000000f00730_NS 01 +20012 clk cpu0 R X9 0000000000000001 +20013 clk cpu0 IT (19977) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20013 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20013 clk cpu0 R X8 0000000003700600 +20014 clk cpu0 IT (19978) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20014 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000030 +20014 clk cpu0 R X8 0000000023000030 +20015 clk cpu0 IT (19979) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20015 clk cpu0 MW1 23000030:000016240030_NS 01 +20016 clk cpu0 IT (19980) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20016 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20016 clk cpu0 R X8 0000000003700600 +20017 clk cpu0 IT (19981) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20017 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000030 +20017 clk cpu0 R X10 0000000023000030 +20018 clk cpu0 IT (19982) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20018 clk cpu0 R X11 0000000000000001 +20019 clk cpu0 IT (19983) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20019 clk cpu0 R X10 0000000023000031 +20020 clk cpu0 IT (19984) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20020 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000031 +20021 clk cpu0 IT (19985) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20021 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +20021 clk cpu0 R X8 0000000000000000 +20022 clk cpu0 IT (19986) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20022 clk cpu0 R X8 0000000000000001 +20023 clk cpu0 IT (19987) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20023 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +20024 clk cpu0 IT (19988) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20025 clk cpu0 IT (19989) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20025 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +20025 clk cpu0 R X8 0000000000000001 +20026 clk cpu0 IT (19990) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20026 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20026 clk cpu0 R X9 0000000000000038 +20027 clk cpu0 IT (19991) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20027 clk cpu0 R cpsr 820003c5 +20028 clk cpu0 IT (19992) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20028 clk cpu0 R X8 0000000000000001 +20029 clk cpu0 IT (19993) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20030 clk cpu0 IT (19994) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20030 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20030 clk cpu0 R X8 0000000003700730 +20031 clk cpu0 IT (19995) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20031 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +20031 clk cpu0 R X9 0000000000000001 +20032 clk cpu0 IT (19996) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20032 clk cpu0 R X10 0000000000000001 +20033 clk cpu0 IT (19997) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20033 clk cpu0 R X10 0000000000000001 +20034 clk cpu0 IT (19998) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20034 clk cpu0 R X8 0000000003700731 +20035 clk cpu0 IT (19999) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20035 clk cpu0 MR1 03700731:000000f00731_NS 00 +20035 clk cpu0 R X9 0000000000000000 +20036 clk cpu0 IT (20000) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20036 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20036 clk cpu0 R X8 0000000003700600 +20037 clk cpu0 IT (20001) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20037 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000031 +20037 clk cpu0 R X8 0000000023000031 +20038 clk cpu0 IT (20002) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20038 clk cpu0 MW1 23000031:000016240031_NS 00 +20039 clk cpu0 IT (20003) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20039 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20039 clk cpu0 R X8 0000000003700600 +20040 clk cpu0 IT (20004) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20040 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000031 +20040 clk cpu0 R X10 0000000023000031 +20041 clk cpu0 IT (20005) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20041 clk cpu0 R X11 0000000000000001 +20042 clk cpu0 IT (20006) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20042 clk cpu0 R X10 0000000023000032 +20043 clk cpu0 IT (20007) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20043 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000032 +20044 clk cpu0 IT (20008) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20044 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +20044 clk cpu0 R X8 0000000000000001 +20045 clk cpu0 IT (20009) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20045 clk cpu0 R X8 0000000000000002 +20046 clk cpu0 IT (20010) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20046 clk cpu0 MW1 0370053e:000000f0053e_NS 02 +20047 clk cpu0 IT (20011) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20048 clk cpu0 IT (20012) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20048 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +20048 clk cpu0 R X8 0000000000000002 +20049 clk cpu0 IT (20013) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20049 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20049 clk cpu0 R X9 0000000000000038 +20050 clk cpu0 IT (20014) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20050 clk cpu0 R cpsr 820003c5 +20051 clk cpu0 IT (20015) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20051 clk cpu0 R X8 0000000000000001 +20052 clk cpu0 IT (20016) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20053 clk cpu0 IT (20017) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20053 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20053 clk cpu0 R X8 0000000003700730 +20054 clk cpu0 IT (20018) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20054 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +20054 clk cpu0 R X9 0000000000000002 +20055 clk cpu0 IT (20019) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20055 clk cpu0 R X10 0000000000000002 +20056 clk cpu0 IT (20020) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20056 clk cpu0 R X10 0000000000000002 +20057 clk cpu0 IT (20021) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20057 clk cpu0 R X8 0000000003700732 +20058 clk cpu0 IT (20022) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20058 clk cpu0 MR1 03700732:000000f00732_NS 00 +20058 clk cpu0 R X9 0000000000000000 +20059 clk cpu0 IT (20023) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20059 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20059 clk cpu0 R X8 0000000003700600 +20060 clk cpu0 IT (20024) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20060 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000032 +20060 clk cpu0 R X8 0000000023000032 +20061 clk cpu0 IT (20025) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20061 clk cpu0 MW1 23000032:000016240032_NS 00 +20062 clk cpu0 IT (20026) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20062 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20062 clk cpu0 R X8 0000000003700600 +20063 clk cpu0 IT (20027) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20063 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000032 +20063 clk cpu0 R X10 0000000023000032 +20064 clk cpu0 IT (20028) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20064 clk cpu0 R X11 0000000000000001 +20065 clk cpu0 IT (20029) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20065 clk cpu0 R X10 0000000023000033 +20066 clk cpu0 IT (20030) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20066 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000033 +20067 clk cpu0 IT (20031) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20067 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +20067 clk cpu0 R X8 0000000000000002 +20068 clk cpu0 IT (20032) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20068 clk cpu0 R X8 0000000000000003 +20069 clk cpu0 IT (20033) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20069 clk cpu0 MW1 0370053e:000000f0053e_NS 03 +20070 clk cpu0 IT (20034) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20071 clk cpu0 IT (20035) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20071 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +20071 clk cpu0 R X8 0000000000000003 +20072 clk cpu0 IT (20036) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20072 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20072 clk cpu0 R X9 0000000000000038 +20073 clk cpu0 IT (20037) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20073 clk cpu0 R cpsr 820003c5 +20074 clk cpu0 IT (20038) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20074 clk cpu0 R X8 0000000000000001 +20075 clk cpu0 IT (20039) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20076 clk cpu0 IT (20040) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20076 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20076 clk cpu0 R X8 0000000003700730 +20077 clk cpu0 IT (20041) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20077 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +20077 clk cpu0 R X9 0000000000000003 +20078 clk cpu0 IT (20042) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20078 clk cpu0 R X10 0000000000000003 +20079 clk cpu0 IT (20043) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20079 clk cpu0 R X10 0000000000000003 +20080 clk cpu0 IT (20044) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20080 clk cpu0 R X8 0000000003700733 +20081 clk cpu0 IT (20045) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20081 clk cpu0 MR1 03700733:000000f00733_NS 00 +20081 clk cpu0 R X9 0000000000000000 +20082 clk cpu0 IT (20046) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20082 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20082 clk cpu0 R X8 0000000003700600 +20083 clk cpu0 IT (20047) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20083 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000033 +20083 clk cpu0 R X8 0000000023000033 +20084 clk cpu0 IT (20048) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20084 clk cpu0 MW1 23000033:000016240033_NS 00 +20085 clk cpu0 IT (20049) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20085 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20085 clk cpu0 R X8 0000000003700600 +20086 clk cpu0 IT (20050) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20086 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000033 +20086 clk cpu0 R X10 0000000023000033 +20087 clk cpu0 IT (20051) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20087 clk cpu0 R X11 0000000000000001 +20088 clk cpu0 IT (20052) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20088 clk cpu0 R X10 0000000023000034 +20089 clk cpu0 IT (20053) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20089 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000034 +20090 clk cpu0 IT (20054) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20090 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +20090 clk cpu0 R X8 0000000000000003 +20091 clk cpu0 IT (20055) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20091 clk cpu0 R X8 0000000000000004 +20092 clk cpu0 IT (20056) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20092 clk cpu0 MW1 0370053e:000000f0053e_NS 04 +20093 clk cpu0 IT (20057) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20094 clk cpu0 IT (20058) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20094 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +20094 clk cpu0 R X8 0000000000000004 +20095 clk cpu0 IT (20059) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20095 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20095 clk cpu0 R X9 0000000000000038 +20096 clk cpu0 IT (20060) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20096 clk cpu0 R cpsr 820003c5 +20097 clk cpu0 IT (20061) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20097 clk cpu0 R X8 0000000000000001 +20098 clk cpu0 IT (20062) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20099 clk cpu0 IT (20063) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20099 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20099 clk cpu0 R X8 0000000003700730 +20100 clk cpu0 IT (20064) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20100 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +20100 clk cpu0 R X9 0000000000000004 +20101 clk cpu0 IT (20065) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20101 clk cpu0 R X10 0000000000000004 +20102 clk cpu0 IT (20066) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20102 clk cpu0 R X10 0000000000000004 +20103 clk cpu0 IT (20067) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20103 clk cpu0 R X8 0000000003700734 +20104 clk cpu0 IT (20068) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20104 clk cpu0 MR1 03700734:000000f00734_NS 00 +20104 clk cpu0 R X9 0000000000000000 +20105 clk cpu0 IT (20069) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20105 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20105 clk cpu0 R X8 0000000003700600 +20106 clk cpu0 IT (20070) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20106 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000034 +20106 clk cpu0 R X8 0000000023000034 +20107 clk cpu0 IT (20071) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20107 clk cpu0 MW1 23000034:000016240034_NS 00 +20108 clk cpu0 IT (20072) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20108 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20108 clk cpu0 R X8 0000000003700600 +20109 clk cpu0 IT (20073) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20109 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000034 +20109 clk cpu0 R X10 0000000023000034 +20110 clk cpu0 IT (20074) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20110 clk cpu0 R X11 0000000000000001 +20111 clk cpu0 IT (20075) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20111 clk cpu0 R X10 0000000023000035 +20112 clk cpu0 IT (20076) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20112 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000035 +20113 clk cpu0 IT (20077) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20113 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +20113 clk cpu0 R X8 0000000000000004 +20114 clk cpu0 IT (20078) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20114 clk cpu0 R X8 0000000000000005 +20115 clk cpu0 IT (20079) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20115 clk cpu0 MW1 0370053e:000000f0053e_NS 05 +20116 clk cpu0 IT (20080) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20117 clk cpu0 IT (20081) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20117 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +20117 clk cpu0 R X8 0000000000000005 +20118 clk cpu0 IT (20082) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20118 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20118 clk cpu0 R X9 0000000000000038 +20119 clk cpu0 IT (20083) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20119 clk cpu0 R cpsr 820003c5 +20120 clk cpu0 IT (20084) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20120 clk cpu0 R X8 0000000000000001 +20121 clk cpu0 IT (20085) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20122 clk cpu0 IT (20086) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20122 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20122 clk cpu0 R X8 0000000003700730 +20123 clk cpu0 IT (20087) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20123 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +20123 clk cpu0 R X9 0000000000000005 +20124 clk cpu0 IT (20088) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20124 clk cpu0 R X10 0000000000000005 +20125 clk cpu0 IT (20089) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20125 clk cpu0 R X10 0000000000000005 +20126 clk cpu0 IT (20090) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20126 clk cpu0 R X8 0000000003700735 +20127 clk cpu0 IT (20091) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20127 clk cpu0 MR1 03700735:000000f00735_NS 00 +20127 clk cpu0 R X9 0000000000000000 +20128 clk cpu0 IT (20092) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20128 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20128 clk cpu0 R X8 0000000003700600 +20129 clk cpu0 IT (20093) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20129 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000035 +20129 clk cpu0 R X8 0000000023000035 +20130 clk cpu0 IT (20094) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20130 clk cpu0 MW1 23000035:000016240035_NS 00 +20131 clk cpu0 IT (20095) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20131 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20131 clk cpu0 R X8 0000000003700600 +20132 clk cpu0 IT (20096) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20132 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000035 +20132 clk cpu0 R X10 0000000023000035 +20133 clk cpu0 IT (20097) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20133 clk cpu0 R X11 0000000000000001 +20134 clk cpu0 IT (20098) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20134 clk cpu0 R X10 0000000023000036 +20135 clk cpu0 IT (20099) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20135 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000036 +20136 clk cpu0 IT (20100) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20136 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +20136 clk cpu0 R X8 0000000000000005 +20137 clk cpu0 IT (20101) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20137 clk cpu0 R X8 0000000000000006 +20138 clk cpu0 IT (20102) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20138 clk cpu0 MW1 0370053e:000000f0053e_NS 06 +20139 clk cpu0 IT (20103) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20140 clk cpu0 IT (20104) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20140 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +20140 clk cpu0 R X8 0000000000000006 +20141 clk cpu0 IT (20105) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20141 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20141 clk cpu0 R X9 0000000000000038 +20142 clk cpu0 IT (20106) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20142 clk cpu0 R cpsr 820003c5 +20143 clk cpu0 IT (20107) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20143 clk cpu0 R X8 0000000000000001 +20144 clk cpu0 IT (20108) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20145 clk cpu0 IT (20109) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20145 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20145 clk cpu0 R X8 0000000003700730 +20146 clk cpu0 IT (20110) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20146 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +20146 clk cpu0 R X9 0000000000000006 +20147 clk cpu0 IT (20111) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20147 clk cpu0 R X10 0000000000000006 +20148 clk cpu0 IT (20112) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20148 clk cpu0 R X10 0000000000000006 +20149 clk cpu0 IT (20113) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20149 clk cpu0 R X8 0000000003700736 +20150 clk cpu0 IT (20114) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20150 clk cpu0 MR1 03700736:000000f00736_NS 00 +20150 clk cpu0 R X9 0000000000000000 +20151 clk cpu0 IT (20115) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20151 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20151 clk cpu0 R X8 0000000003700600 +20152 clk cpu0 IT (20116) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20152 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000036 +20152 clk cpu0 R X8 0000000023000036 +20153 clk cpu0 IT (20117) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20153 clk cpu0 MW1 23000036:000016240036_NS 00 +20154 clk cpu0 IT (20118) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20154 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20154 clk cpu0 R X8 0000000003700600 +20155 clk cpu0 IT (20119) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20155 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000036 +20155 clk cpu0 R X10 0000000023000036 +20156 clk cpu0 IT (20120) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20156 clk cpu0 R X11 0000000000000001 +20157 clk cpu0 IT (20121) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20157 clk cpu0 R X10 0000000023000037 +20158 clk cpu0 IT (20122) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20158 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000037 +20159 clk cpu0 IT (20123) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20159 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +20159 clk cpu0 R X8 0000000000000006 +20160 clk cpu0 IT (20124) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20160 clk cpu0 R X8 0000000000000007 +20161 clk cpu0 IT (20125) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20161 clk cpu0 MW1 0370053e:000000f0053e_NS 07 +20162 clk cpu0 IT (20126) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20163 clk cpu0 IT (20127) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20163 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +20163 clk cpu0 R X8 0000000000000007 +20164 clk cpu0 IT (20128) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20164 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20164 clk cpu0 R X9 0000000000000038 +20165 clk cpu0 IT (20129) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20165 clk cpu0 R cpsr 820003c5 +20166 clk cpu0 IT (20130) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20166 clk cpu0 R X8 0000000000000001 +20167 clk cpu0 IT (20131) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20168 clk cpu0 IT (20132) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20168 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20168 clk cpu0 R X8 0000000003700730 +20169 clk cpu0 IT (20133) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20169 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +20169 clk cpu0 R X9 0000000000000007 +20170 clk cpu0 IT (20134) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20170 clk cpu0 R X10 0000000000000007 +20171 clk cpu0 IT (20135) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20171 clk cpu0 R X10 0000000000000007 +20172 clk cpu0 IT (20136) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20172 clk cpu0 R X8 0000000003700737 +20173 clk cpu0 IT (20137) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20173 clk cpu0 MR1 03700737:000000f00737_NS 00 +20173 clk cpu0 R X9 0000000000000000 +20174 clk cpu0 IT (20138) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20174 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20174 clk cpu0 R X8 0000000003700600 +20175 clk cpu0 IT (20139) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20175 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000037 +20175 clk cpu0 R X8 0000000023000037 +20176 clk cpu0 IT (20140) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20176 clk cpu0 MW1 23000037:000016240037_NS 00 +20177 clk cpu0 IT (20141) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20177 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20177 clk cpu0 R X8 0000000003700600 +20178 clk cpu0 IT (20142) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20178 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000037 +20178 clk cpu0 R X10 0000000023000037 +20179 clk cpu0 IT (20143) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20179 clk cpu0 R X11 0000000000000001 +20180 clk cpu0 IT (20144) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20180 clk cpu0 R X10 0000000023000038 +20181 clk cpu0 IT (20145) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20181 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000038 +20182 clk cpu0 IT (20146) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20182 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +20182 clk cpu0 R X8 0000000000000007 +20183 clk cpu0 IT (20147) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20183 clk cpu0 R X8 0000000000000008 +20184 clk cpu0 IT (20148) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20184 clk cpu0 MW1 0370053e:000000f0053e_NS 08 +20185 clk cpu0 IT (20149) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20186 clk cpu0 IT (20150) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20186 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +20186 clk cpu0 R X8 0000000000000008 +20187 clk cpu0 IT (20151) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20187 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20187 clk cpu0 R X9 0000000000000038 +20188 clk cpu0 IT (20152) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20188 clk cpu0 R cpsr 820003c5 +20189 clk cpu0 IT (20153) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20189 clk cpu0 R X8 0000000000000001 +20190 clk cpu0 IT (20154) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20191 clk cpu0 IT (20155) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20191 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20191 clk cpu0 R X8 0000000003700730 +20192 clk cpu0 IT (20156) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20192 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +20192 clk cpu0 R X9 0000000000000008 +20193 clk cpu0 IT (20157) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20193 clk cpu0 R X10 0000000000000008 +20194 clk cpu0 IT (20158) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20194 clk cpu0 R X10 0000000000000008 +20195 clk cpu0 IT (20159) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20195 clk cpu0 R X8 0000000003700738 +20196 clk cpu0 IT (20160) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20196 clk cpu0 MR1 03700738:000000f00738_NS 02 +20196 clk cpu0 R X9 0000000000000002 +20197 clk cpu0 IT (20161) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20197 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20197 clk cpu0 R X8 0000000003700600 +20198 clk cpu0 IT (20162) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20198 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000038 +20198 clk cpu0 R X8 0000000023000038 +20199 clk cpu0 IT (20163) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20199 clk cpu0 MW1 23000038:000016240038_NS 02 +20200 clk cpu0 IT (20164) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20200 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20200 clk cpu0 R X8 0000000003700600 +20201 clk cpu0 IT (20165) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20201 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000038 +20201 clk cpu0 R X10 0000000023000038 +20202 clk cpu0 IT (20166) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20202 clk cpu0 R X11 0000000000000001 +20203 clk cpu0 IT (20167) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20203 clk cpu0 R X10 0000000023000039 +20204 clk cpu0 IT (20168) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20204 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000039 +20205 clk cpu0 IT (20169) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20205 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +20205 clk cpu0 R X8 0000000000000008 +20206 clk cpu0 IT (20170) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20206 clk cpu0 R X8 0000000000000009 +20207 clk cpu0 IT (20171) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20207 clk cpu0 MW1 0370053e:000000f0053e_NS 09 +20208 clk cpu0 IT (20172) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20209 clk cpu0 IT (20173) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20209 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +20209 clk cpu0 R X8 0000000000000009 +20210 clk cpu0 IT (20174) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20210 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20210 clk cpu0 R X9 0000000000000038 +20211 clk cpu0 IT (20175) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20211 clk cpu0 R cpsr 820003c5 +20212 clk cpu0 IT (20176) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20212 clk cpu0 R X8 0000000000000001 +20213 clk cpu0 IT (20177) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20214 clk cpu0 IT (20178) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20214 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20214 clk cpu0 R X8 0000000003700730 +20215 clk cpu0 IT (20179) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20215 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +20215 clk cpu0 R X9 0000000000000009 +20216 clk cpu0 IT (20180) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20216 clk cpu0 R X10 0000000000000009 +20217 clk cpu0 IT (20181) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20217 clk cpu0 R X10 0000000000000009 +20218 clk cpu0 IT (20182) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20218 clk cpu0 R X8 0000000003700739 +20219 clk cpu0 IT (20183) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20219 clk cpu0 MR1 03700739:000000f00739_NS 00 +20219 clk cpu0 R X9 0000000000000000 +20220 clk cpu0 IT (20184) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20220 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20220 clk cpu0 R X8 0000000003700600 +20221 clk cpu0 IT (20185) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20221 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000039 +20221 clk cpu0 R X8 0000000023000039 +20222 clk cpu0 IT (20186) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20222 clk cpu0 MW1 23000039:000016240039_NS 00 +20223 clk cpu0 IT (20187) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20223 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20223 clk cpu0 R X8 0000000003700600 +20224 clk cpu0 IT (20188) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20224 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000039 +20224 clk cpu0 R X10 0000000023000039 +20225 clk cpu0 IT (20189) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20225 clk cpu0 R X11 0000000000000001 +20226 clk cpu0 IT (20190) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20226 clk cpu0 R X10 000000002300003A +20227 clk cpu0 IT (20191) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20227 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300003a +20228 clk cpu0 IT (20192) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20228 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +20228 clk cpu0 R X8 0000000000000009 +20229 clk cpu0 IT (20193) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20229 clk cpu0 R X8 000000000000000A +20230 clk cpu0 IT (20194) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20230 clk cpu0 MW1 0370053e:000000f0053e_NS 0a +20231 clk cpu0 IT (20195) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20232 clk cpu0 IT (20196) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20232 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +20232 clk cpu0 R X8 000000000000000A +20233 clk cpu0 IT (20197) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20233 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20233 clk cpu0 R X9 0000000000000038 +20234 clk cpu0 IT (20198) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20234 clk cpu0 R cpsr 820003c5 +20235 clk cpu0 IT (20199) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20235 clk cpu0 R X8 0000000000000001 +20236 clk cpu0 IT (20200) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20237 clk cpu0 IT (20201) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20237 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20237 clk cpu0 R X8 0000000003700730 +20238 clk cpu0 IT (20202) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20238 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +20238 clk cpu0 R X9 000000000000000A +20239 clk cpu0 IT (20203) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20239 clk cpu0 R X10 000000000000000A +20240 clk cpu0 IT (20204) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20240 clk cpu0 R X10 000000000000000A +20241 clk cpu0 IT (20205) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20241 clk cpu0 R X8 000000000370073A +20242 clk cpu0 IT (20206) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20242 clk cpu0 MR1 0370073a:000000f0073a_NS 00 +20242 clk cpu0 R X9 0000000000000000 +20243 clk cpu0 IT (20207) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20243 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20243 clk cpu0 R X8 0000000003700600 +20244 clk cpu0 IT (20208) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20244 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003a +20244 clk cpu0 R X8 000000002300003A +20245 clk cpu0 IT (20209) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20245 clk cpu0 MW1 2300003a:00001624003a_NS 00 +20246 clk cpu0 IT (20210) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20246 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20246 clk cpu0 R X8 0000000003700600 +20247 clk cpu0 IT (20211) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20247 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003a +20247 clk cpu0 R X10 000000002300003A +20248 clk cpu0 IT (20212) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20248 clk cpu0 R X11 0000000000000001 +20249 clk cpu0 IT (20213) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20249 clk cpu0 R X10 000000002300003B +20250 clk cpu0 IT (20214) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20250 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300003b +20251 clk cpu0 IT (20215) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20251 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +20251 clk cpu0 R X8 000000000000000A +20252 clk cpu0 IT (20216) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20252 clk cpu0 R X8 000000000000000B +20253 clk cpu0 IT (20217) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20253 clk cpu0 MW1 0370053e:000000f0053e_NS 0b +20254 clk cpu0 IT (20218) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20255 clk cpu0 IT (20219) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20255 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +20255 clk cpu0 R X8 000000000000000B +20256 clk cpu0 IT (20220) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20256 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20256 clk cpu0 R X9 0000000000000038 +20257 clk cpu0 IT (20221) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20257 clk cpu0 R cpsr 820003c5 +20258 clk cpu0 IT (20222) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20258 clk cpu0 R X8 0000000000000001 +20259 clk cpu0 IT (20223) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20260 clk cpu0 IT (20224) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20260 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20260 clk cpu0 R X8 0000000003700730 +20261 clk cpu0 IT (20225) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20261 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +20261 clk cpu0 R X9 000000000000000B +20262 clk cpu0 IT (20226) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20262 clk cpu0 R X10 000000000000000B +20263 clk cpu0 IT (20227) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20263 clk cpu0 R X10 000000000000000B +20264 clk cpu0 IT (20228) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20264 clk cpu0 R X8 000000000370073B +20265 clk cpu0 IT (20229) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20265 clk cpu0 MR1 0370073b:000000f0073b_NS 00 +20265 clk cpu0 R X9 0000000000000000 +20266 clk cpu0 IT (20230) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20266 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20266 clk cpu0 R X8 0000000003700600 +20267 clk cpu0 IT (20231) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20267 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003b +20267 clk cpu0 R X8 000000002300003B +20268 clk cpu0 IT (20232) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20268 clk cpu0 MW1 2300003b:00001624003b_NS 00 +20269 clk cpu0 IT (20233) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20269 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20269 clk cpu0 R X8 0000000003700600 +20270 clk cpu0 IT (20234) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20270 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003b +20270 clk cpu0 R X10 000000002300003B +20271 clk cpu0 IT (20235) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20271 clk cpu0 R X11 0000000000000001 +20272 clk cpu0 IT (20236) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20272 clk cpu0 R X10 000000002300003C +20273 clk cpu0 IT (20237) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20273 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300003c +20274 clk cpu0 IT (20238) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20274 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +20274 clk cpu0 R X8 000000000000000B +20275 clk cpu0 IT (20239) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20275 clk cpu0 R X8 000000000000000C +20276 clk cpu0 IT (20240) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20276 clk cpu0 MW1 0370053e:000000f0053e_NS 0c +20277 clk cpu0 IT (20241) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20278 clk cpu0 IT (20242) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20278 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +20278 clk cpu0 R X8 000000000000000C +20279 clk cpu0 IT (20243) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20279 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20279 clk cpu0 R X9 0000000000000038 +20280 clk cpu0 IT (20244) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20280 clk cpu0 R cpsr 820003c5 +20281 clk cpu0 IT (20245) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20281 clk cpu0 R X8 0000000000000001 +20282 clk cpu0 IT (20246) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20283 clk cpu0 IT (20247) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20283 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20283 clk cpu0 R X8 0000000003700730 +20284 clk cpu0 IT (20248) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20284 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +20284 clk cpu0 R X9 000000000000000C +20285 clk cpu0 IT (20249) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20285 clk cpu0 R X10 000000000000000C +20286 clk cpu0 IT (20250) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20286 clk cpu0 R X10 000000000000000C +20287 clk cpu0 IT (20251) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20287 clk cpu0 R X8 000000000370073C +20288 clk cpu0 IT (20252) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20288 clk cpu0 MR1 0370073c:000000f0073c_NS 00 +20288 clk cpu0 R X9 0000000000000000 +20289 clk cpu0 IT (20253) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20289 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20289 clk cpu0 R X8 0000000003700600 +20290 clk cpu0 IT (20254) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20290 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003c +20290 clk cpu0 R X8 000000002300003C +20291 clk cpu0 IT (20255) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20291 clk cpu0 MW1 2300003c:00001624003c_NS 00 +20292 clk cpu0 IT (20256) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20292 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20292 clk cpu0 R X8 0000000003700600 +20293 clk cpu0 IT (20257) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20293 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003c +20293 clk cpu0 R X10 000000002300003C +20294 clk cpu0 IT (20258) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20294 clk cpu0 R X11 0000000000000001 +20295 clk cpu0 IT (20259) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20295 clk cpu0 R X10 000000002300003D +20296 clk cpu0 IT (20260) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20296 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300003d +20297 clk cpu0 IT (20261) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20297 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +20297 clk cpu0 R X8 000000000000000C +20298 clk cpu0 IT (20262) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20298 clk cpu0 R X8 000000000000000D +20299 clk cpu0 IT (20263) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20299 clk cpu0 MW1 0370053e:000000f0053e_NS 0d +20300 clk cpu0 IT (20264) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20301 clk cpu0 IT (20265) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20301 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +20301 clk cpu0 R X8 000000000000000D +20302 clk cpu0 IT (20266) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20302 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20302 clk cpu0 R X9 0000000000000038 +20303 clk cpu0 IT (20267) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20303 clk cpu0 R cpsr 820003c5 +20304 clk cpu0 IT (20268) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20304 clk cpu0 R X8 0000000000000001 +20305 clk cpu0 IT (20269) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20306 clk cpu0 IT (20270) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20306 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20306 clk cpu0 R X8 0000000003700730 +20307 clk cpu0 IT (20271) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20307 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +20307 clk cpu0 R X9 000000000000000D +20308 clk cpu0 IT (20272) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20308 clk cpu0 R X10 000000000000000D +20309 clk cpu0 IT (20273) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20309 clk cpu0 R X10 000000000000000D +20310 clk cpu0 IT (20274) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20310 clk cpu0 R X8 000000000370073D +20311 clk cpu0 IT (20275) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20311 clk cpu0 MR1 0370073d:000000f0073d_NS 00 +20311 clk cpu0 R X9 0000000000000000 +20312 clk cpu0 IT (20276) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20312 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20312 clk cpu0 R X8 0000000003700600 +20313 clk cpu0 IT (20277) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20313 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003d +20313 clk cpu0 R X8 000000002300003D +20314 clk cpu0 IT (20278) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20314 clk cpu0 MW1 2300003d:00001624003d_NS 00 +20315 clk cpu0 IT (20279) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20315 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20315 clk cpu0 R X8 0000000003700600 +20316 clk cpu0 IT (20280) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20316 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003d +20316 clk cpu0 R X10 000000002300003D +20317 clk cpu0 IT (20281) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20317 clk cpu0 R X11 0000000000000001 +20318 clk cpu0 IT (20282) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20318 clk cpu0 R X10 000000002300003E +20319 clk cpu0 IT (20283) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20319 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300003e +20320 clk cpu0 IT (20284) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20320 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +20320 clk cpu0 R X8 000000000000000D +20321 clk cpu0 IT (20285) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20321 clk cpu0 R X8 000000000000000E +20322 clk cpu0 IT (20286) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20322 clk cpu0 MW1 0370053e:000000f0053e_NS 0e +20323 clk cpu0 IT (20287) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20324 clk cpu0 IT (20288) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20324 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +20324 clk cpu0 R X8 000000000000000E +20325 clk cpu0 IT (20289) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20325 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20325 clk cpu0 R X9 0000000000000038 +20326 clk cpu0 IT (20290) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20326 clk cpu0 R cpsr 820003c5 +20327 clk cpu0 IT (20291) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20327 clk cpu0 R X8 0000000000000001 +20328 clk cpu0 IT (20292) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20329 clk cpu0 IT (20293) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20329 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20329 clk cpu0 R X8 0000000003700730 +20330 clk cpu0 IT (20294) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20330 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +20330 clk cpu0 R X9 000000000000000E +20331 clk cpu0 IT (20295) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20331 clk cpu0 R X10 000000000000000E +20332 clk cpu0 IT (20296) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20332 clk cpu0 R X10 000000000000000E +20333 clk cpu0 IT (20297) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20333 clk cpu0 R X8 000000000370073E +20334 clk cpu0 IT (20298) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20334 clk cpu0 MR1 0370073e:000000f0073e_NS 00 +20334 clk cpu0 R X9 0000000000000000 +20335 clk cpu0 IT (20299) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20335 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20335 clk cpu0 R X8 0000000003700600 +20336 clk cpu0 IT (20300) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20336 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003e +20336 clk cpu0 R X8 000000002300003E +20337 clk cpu0 IT (20301) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20337 clk cpu0 MW1 2300003e:00001624003e_NS 00 +20338 clk cpu0 IT (20302) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20338 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20338 clk cpu0 R X8 0000000003700600 +20339 clk cpu0 IT (20303) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20339 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003e +20339 clk cpu0 R X10 000000002300003E +20340 clk cpu0 IT (20304) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20340 clk cpu0 R X11 0000000000000001 +20341 clk cpu0 IT (20305) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20341 clk cpu0 R X10 000000002300003F +20342 clk cpu0 IT (20306) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20342 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300003f +20343 clk cpu0 IT (20307) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20343 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +20343 clk cpu0 R X8 000000000000000E +20344 clk cpu0 IT (20308) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20344 clk cpu0 R X8 000000000000000F +20345 clk cpu0 IT (20309) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20345 clk cpu0 MW1 0370053e:000000f0053e_NS 0f +20346 clk cpu0 IT (20310) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20347 clk cpu0 IT (20311) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20347 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +20347 clk cpu0 R X8 000000000000000F +20348 clk cpu0 IT (20312) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20348 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20348 clk cpu0 R X9 0000000000000038 +20349 clk cpu0 IT (20313) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20349 clk cpu0 R cpsr 820003c5 +20350 clk cpu0 IT (20314) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20350 clk cpu0 R X8 0000000000000001 +20351 clk cpu0 IT (20315) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20352 clk cpu0 IT (20316) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20352 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20352 clk cpu0 R X8 0000000003700730 +20353 clk cpu0 IT (20317) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20353 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +20353 clk cpu0 R X9 000000000000000F +20354 clk cpu0 IT (20318) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20354 clk cpu0 R X10 000000000000000F +20355 clk cpu0 IT (20319) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20355 clk cpu0 R X10 000000000000000F +20356 clk cpu0 IT (20320) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20356 clk cpu0 R X8 000000000370073F +20357 clk cpu0 IT (20321) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20357 clk cpu0 MR1 0370073f:000000f0073f_NS 00 +20357 clk cpu0 R X9 0000000000000000 +20358 clk cpu0 IT (20322) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20358 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20358 clk cpu0 R X8 0000000003700600 +20359 clk cpu0 IT (20323) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20359 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003f +20359 clk cpu0 R X8 000000002300003F +20360 clk cpu0 IT (20324) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20360 clk cpu0 MW1 2300003f:00001624003f_NS 00 +20361 clk cpu0 IT (20325) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20361 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20361 clk cpu0 R X8 0000000003700600 +20362 clk cpu0 IT (20326) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20362 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300003f +20362 clk cpu0 R X10 000000002300003F +20363 clk cpu0 IT (20327) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20363 clk cpu0 R X11 0000000000000001 +20364 clk cpu0 IT (20328) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20364 clk cpu0 R X10 0000000023000040 +20365 clk cpu0 IT (20329) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20365 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000040 +20366 clk cpu0 IT (20330) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20366 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +20366 clk cpu0 R X8 000000000000000F +20367 clk cpu0 IT (20331) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20367 clk cpu0 R X8 0000000000000010 +20368 clk cpu0 IT (20332) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20368 clk cpu0 MW1 0370053e:000000f0053e_NS 10 +20369 clk cpu0 IT (20333) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20370 clk cpu0 IT (20334) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20370 clk cpu0 MR1 0370053e:000000f0053e_NS 10 +20370 clk cpu0 R X8 0000000000000010 +20371 clk cpu0 IT (20335) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20371 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20371 clk cpu0 R X9 0000000000000038 +20372 clk cpu0 IT (20336) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20372 clk cpu0 R cpsr 820003c5 +20373 clk cpu0 IT (20337) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20373 clk cpu0 R X8 0000000000000001 +20374 clk cpu0 IT (20338) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20375 clk cpu0 IT (20339) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20375 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20375 clk cpu0 R X8 0000000003700730 +20376 clk cpu0 IT (20340) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20376 clk cpu0 MR1 0370053e:000000f0053e_NS 10 +20376 clk cpu0 R X9 0000000000000010 +20377 clk cpu0 IT (20341) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20377 clk cpu0 R X10 0000000000000010 +20378 clk cpu0 IT (20342) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20378 clk cpu0 R X10 0000000000000010 +20379 clk cpu0 IT (20343) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20379 clk cpu0 R X8 0000000003700740 +20380 clk cpu0 IT (20344) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20380 clk cpu0 MR1 03700740:000000f00740_NS 13 +20380 clk cpu0 R X9 0000000000000013 +20381 clk cpu0 IT (20345) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20381 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20381 clk cpu0 R X8 0000000003700600 +20382 clk cpu0 IT (20346) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20382 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000040 +20382 clk cpu0 R X8 0000000023000040 +20383 clk cpu0 IT (20347) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20383 clk cpu0 MW1 23000040:000016240040_NS 13 +20383 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0002 INVAL 0x000070460040_NS +20383 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0002 ALLOC 0x000016240040_NS +20383 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0002 DIRTY 0x000016240040_NS +20383 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016240040_NS +20383 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016240040_NS +20384 clk cpu0 IT (20348) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20384 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20384 clk cpu0 R X8 0000000003700600 +20385 clk cpu0 IT (20349) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20385 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000040 +20385 clk cpu0 R X10 0000000023000040 +20386 clk cpu0 IT (20350) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20386 clk cpu0 R X11 0000000000000001 +20387 clk cpu0 IT (20351) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20387 clk cpu0 R X10 0000000023000041 +20388 clk cpu0 IT (20352) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20388 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000041 +20389 clk cpu0 IT (20353) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20389 clk cpu0 MR1 0370053e:000000f0053e_NS 10 +20389 clk cpu0 R X8 0000000000000010 +20390 clk cpu0 IT (20354) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20390 clk cpu0 R X8 0000000000000011 +20391 clk cpu0 IT (20355) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20391 clk cpu0 MW1 0370053e:000000f0053e_NS 11 +20392 clk cpu0 IT (20356) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20393 clk cpu0 IT (20357) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20393 clk cpu0 MR1 0370053e:000000f0053e_NS 11 +20393 clk cpu0 R X8 0000000000000011 +20394 clk cpu0 IT (20358) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20394 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20394 clk cpu0 R X9 0000000000000038 +20395 clk cpu0 IT (20359) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20395 clk cpu0 R cpsr 820003c5 +20396 clk cpu0 IT (20360) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20396 clk cpu0 R X8 0000000000000001 +20397 clk cpu0 IT (20361) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20398 clk cpu0 IT (20362) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20398 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20398 clk cpu0 R X8 0000000003700730 +20399 clk cpu0 IT (20363) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20399 clk cpu0 MR1 0370053e:000000f0053e_NS 11 +20399 clk cpu0 R X9 0000000000000011 +20400 clk cpu0 IT (20364) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20400 clk cpu0 R X10 0000000000000011 +20401 clk cpu0 IT (20365) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20401 clk cpu0 R X10 0000000000000011 +20402 clk cpu0 IT (20366) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20402 clk cpu0 R X8 0000000003700741 +20403 clk cpu0 IT (20367) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20403 clk cpu0 MR1 03700741:000000f00741_NS 5a +20403 clk cpu0 R X9 000000000000005A +20404 clk cpu0 IT (20368) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20404 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20404 clk cpu0 R X8 0000000003700600 +20405 clk cpu0 IT (20369) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20405 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000041 +20405 clk cpu0 R X8 0000000023000041 +20406 clk cpu0 IT (20370) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20406 clk cpu0 MW1 23000041:000016240041_NS 5a +20407 clk cpu0 IT (20371) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20407 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20407 clk cpu0 R X8 0000000003700600 +20408 clk cpu0 IT (20372) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20408 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000041 +20408 clk cpu0 R X10 0000000023000041 +20409 clk cpu0 IT (20373) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20409 clk cpu0 R X11 0000000000000001 +20410 clk cpu0 IT (20374) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20410 clk cpu0 R X10 0000000023000042 +20411 clk cpu0 IT (20375) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20411 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000042 +20412 clk cpu0 IT (20376) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20412 clk cpu0 MR1 0370053e:000000f0053e_NS 11 +20412 clk cpu0 R X8 0000000000000011 +20413 clk cpu0 IT (20377) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20413 clk cpu0 R X8 0000000000000012 +20414 clk cpu0 IT (20378) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20414 clk cpu0 MW1 0370053e:000000f0053e_NS 12 +20415 clk cpu0 IT (20379) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20416 clk cpu0 IT (20380) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20416 clk cpu0 MR1 0370053e:000000f0053e_NS 12 +20416 clk cpu0 R X8 0000000000000012 +20417 clk cpu0 IT (20381) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20417 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20417 clk cpu0 R X9 0000000000000038 +20418 clk cpu0 IT (20382) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20418 clk cpu0 R cpsr 820003c5 +20419 clk cpu0 IT (20383) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20419 clk cpu0 R X8 0000000000000001 +20420 clk cpu0 IT (20384) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20421 clk cpu0 IT (20385) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20421 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20421 clk cpu0 R X8 0000000003700730 +20422 clk cpu0 IT (20386) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20422 clk cpu0 MR1 0370053e:000000f0053e_NS 12 +20422 clk cpu0 R X9 0000000000000012 +20423 clk cpu0 IT (20387) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20423 clk cpu0 R X10 0000000000000012 +20424 clk cpu0 IT (20388) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20424 clk cpu0 R X10 0000000000000012 +20425 clk cpu0 IT (20389) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20425 clk cpu0 R X8 0000000003700742 +20426 clk cpu0 IT (20390) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20426 clk cpu0 MR1 03700742:000000f00742_NS 70 +20426 clk cpu0 R X9 0000000000000070 +20427 clk cpu0 IT (20391) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20427 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20427 clk cpu0 R X8 0000000003700600 +20428 clk cpu0 IT (20392) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20428 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000042 +20428 clk cpu0 R X8 0000000023000042 +20429 clk cpu0 IT (20393) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20429 clk cpu0 MW1 23000042:000016240042_NS 70 +20430 clk cpu0 IT (20394) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20430 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20430 clk cpu0 R X8 0000000003700600 +20431 clk cpu0 IT (20395) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20431 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000042 +20431 clk cpu0 R X10 0000000023000042 +20432 clk cpu0 IT (20396) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20432 clk cpu0 R X11 0000000000000001 +20433 clk cpu0 IT (20397) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20433 clk cpu0 R X10 0000000023000043 +20434 clk cpu0 IT (20398) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20434 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000043 +20435 clk cpu0 IT (20399) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20435 clk cpu0 MR1 0370053e:000000f0053e_NS 12 +20435 clk cpu0 R X8 0000000000000012 +20436 clk cpu0 IT (20400) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20436 clk cpu0 R X8 0000000000000013 +20437 clk cpu0 IT (20401) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20437 clk cpu0 MW1 0370053e:000000f0053e_NS 13 +20438 clk cpu0 IT (20402) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20439 clk cpu0 IT (20403) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20439 clk cpu0 MR1 0370053e:000000f0053e_NS 13 +20439 clk cpu0 R X8 0000000000000013 +20440 clk cpu0 IT (20404) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20440 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20440 clk cpu0 R X9 0000000000000038 +20441 clk cpu0 IT (20405) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20441 clk cpu0 R cpsr 820003c5 +20442 clk cpu0 IT (20406) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20442 clk cpu0 R X8 0000000000000001 +20443 clk cpu0 IT (20407) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20444 clk cpu0 IT (20408) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20444 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20444 clk cpu0 R X8 0000000003700730 +20445 clk cpu0 IT (20409) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20445 clk cpu0 MR1 0370053e:000000f0053e_NS 13 +20445 clk cpu0 R X9 0000000000000013 +20446 clk cpu0 IT (20410) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20446 clk cpu0 R X10 0000000000000013 +20447 clk cpu0 IT (20411) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20447 clk cpu0 R X10 0000000000000013 +20448 clk cpu0 IT (20412) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20448 clk cpu0 R X8 0000000003700743 +20449 clk cpu0 IT (20413) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20449 clk cpu0 MR1 03700743:000000f00743_NS 47 +20449 clk cpu0 R X9 0000000000000047 +20450 clk cpu0 IT (20414) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20450 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20450 clk cpu0 R X8 0000000003700600 +20451 clk cpu0 IT (20415) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20451 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000043 +20451 clk cpu0 R X8 0000000023000043 +20452 clk cpu0 IT (20416) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20452 clk cpu0 MW1 23000043:000016240043_NS 47 +20453 clk cpu0 IT (20417) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20453 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20453 clk cpu0 R X8 0000000003700600 +20454 clk cpu0 IT (20418) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20454 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000043 +20454 clk cpu0 R X10 0000000023000043 +20455 clk cpu0 IT (20419) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20455 clk cpu0 R X11 0000000000000001 +20456 clk cpu0 IT (20420) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20456 clk cpu0 R X10 0000000023000044 +20457 clk cpu0 IT (20421) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20457 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000044 +20458 clk cpu0 IT (20422) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20458 clk cpu0 MR1 0370053e:000000f0053e_NS 13 +20458 clk cpu0 R X8 0000000000000013 +20459 clk cpu0 IT (20423) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20459 clk cpu0 R X8 0000000000000014 +20460 clk cpu0 IT (20424) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20460 clk cpu0 MW1 0370053e:000000f0053e_NS 14 +20461 clk cpu0 IT (20425) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20462 clk cpu0 IT (20426) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20462 clk cpu0 MR1 0370053e:000000f0053e_NS 14 +20462 clk cpu0 R X8 0000000000000014 +20463 clk cpu0 IT (20427) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20463 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20463 clk cpu0 R X9 0000000000000038 +20464 clk cpu0 IT (20428) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20464 clk cpu0 R cpsr 820003c5 +20465 clk cpu0 IT (20429) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20465 clk cpu0 R X8 0000000000000001 +20466 clk cpu0 IT (20430) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20467 clk cpu0 IT (20431) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20467 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20467 clk cpu0 R X8 0000000003700730 +20468 clk cpu0 IT (20432) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20468 clk cpu0 MR1 0370053e:000000f0053e_NS 14 +20468 clk cpu0 R X9 0000000000000014 +20469 clk cpu0 IT (20433) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20469 clk cpu0 R X10 0000000000000014 +20470 clk cpu0 IT (20434) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20470 clk cpu0 R X10 0000000000000014 +20471 clk cpu0 IT (20435) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20471 clk cpu0 R X8 0000000003700744 +20472 clk cpu0 IT (20436) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20472 clk cpu0 MR1 03700744:000000f00744_NS 00 +20472 clk cpu0 R X9 0000000000000000 +20473 clk cpu0 IT (20437) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20473 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20473 clk cpu0 R X8 0000000003700600 +20474 clk cpu0 IT (20438) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20474 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000044 +20474 clk cpu0 R X8 0000000023000044 +20475 clk cpu0 IT (20439) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20475 clk cpu0 MW1 23000044:000016240044_NS 00 +20476 clk cpu0 IT (20440) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20476 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20476 clk cpu0 R X8 0000000003700600 +20477 clk cpu0 IT (20441) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20477 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000044 +20477 clk cpu0 R X10 0000000023000044 +20478 clk cpu0 IT (20442) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20478 clk cpu0 R X11 0000000000000001 +20479 clk cpu0 IT (20443) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20479 clk cpu0 R X10 0000000023000045 +20480 clk cpu0 IT (20444) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20480 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000045 +20481 clk cpu0 IT (20445) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20481 clk cpu0 MR1 0370053e:000000f0053e_NS 14 +20481 clk cpu0 R X8 0000000000000014 +20482 clk cpu0 IT (20446) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20482 clk cpu0 R X8 0000000000000015 +20483 clk cpu0 IT (20447) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20483 clk cpu0 MW1 0370053e:000000f0053e_NS 15 +20484 clk cpu0 IT (20448) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20485 clk cpu0 IT (20449) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20485 clk cpu0 MR1 0370053e:000000f0053e_NS 15 +20485 clk cpu0 R X8 0000000000000015 +20486 clk cpu0 IT (20450) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20486 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20486 clk cpu0 R X9 0000000000000038 +20487 clk cpu0 IT (20451) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20487 clk cpu0 R cpsr 820003c5 +20488 clk cpu0 IT (20452) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20488 clk cpu0 R X8 0000000000000001 +20489 clk cpu0 IT (20453) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20490 clk cpu0 IT (20454) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20490 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20490 clk cpu0 R X8 0000000003700730 +20491 clk cpu0 IT (20455) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20491 clk cpu0 MR1 0370053e:000000f0053e_NS 15 +20491 clk cpu0 R X9 0000000000000015 +20492 clk cpu0 IT (20456) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20492 clk cpu0 R X10 0000000000000015 +20493 clk cpu0 IT (20457) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20493 clk cpu0 R X10 0000000000000015 +20494 clk cpu0 IT (20458) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20494 clk cpu0 R X8 0000000003700745 +20495 clk cpu0 IT (20459) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20495 clk cpu0 MR1 03700745:000000f00745_NS 00 +20495 clk cpu0 R X9 0000000000000000 +20496 clk cpu0 IT (20460) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20496 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20496 clk cpu0 R X8 0000000003700600 +20497 clk cpu0 IT (20461) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20497 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000045 +20497 clk cpu0 R X8 0000000023000045 +20498 clk cpu0 IT (20462) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20498 clk cpu0 MW1 23000045:000016240045_NS 00 +20499 clk cpu0 IT (20463) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20499 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20499 clk cpu0 R X8 0000000003700600 +20500 clk cpu0 IT (20464) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20500 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000045 +20500 clk cpu0 R X10 0000000023000045 +20501 clk cpu0 IT (20465) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20501 clk cpu0 R X11 0000000000000001 +20502 clk cpu0 IT (20466) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20502 clk cpu0 R X10 0000000023000046 +20503 clk cpu0 IT (20467) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20503 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000046 +20504 clk cpu0 IT (20468) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20504 clk cpu0 MR1 0370053e:000000f0053e_NS 15 +20504 clk cpu0 R X8 0000000000000015 +20505 clk cpu0 IT (20469) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20505 clk cpu0 R X8 0000000000000016 +20506 clk cpu0 IT (20470) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20506 clk cpu0 MW1 0370053e:000000f0053e_NS 16 +20507 clk cpu0 IT (20471) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20508 clk cpu0 IT (20472) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20508 clk cpu0 MR1 0370053e:000000f0053e_NS 16 +20508 clk cpu0 R X8 0000000000000016 +20509 clk cpu0 IT (20473) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20509 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20509 clk cpu0 R X9 0000000000000038 +20510 clk cpu0 IT (20474) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20510 clk cpu0 R cpsr 820003c5 +20511 clk cpu0 IT (20475) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20511 clk cpu0 R X8 0000000000000001 +20512 clk cpu0 IT (20476) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20513 clk cpu0 IT (20477) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20513 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20513 clk cpu0 R X8 0000000003700730 +20514 clk cpu0 IT (20478) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20514 clk cpu0 MR1 0370053e:000000f0053e_NS 16 +20514 clk cpu0 R X9 0000000000000016 +20515 clk cpu0 IT (20479) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20515 clk cpu0 R X10 0000000000000016 +20516 clk cpu0 IT (20480) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20516 clk cpu0 R X10 0000000000000016 +20517 clk cpu0 IT (20481) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20517 clk cpu0 R X8 0000000003700746 +20518 clk cpu0 IT (20482) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20518 clk cpu0 MR1 03700746:000000f00746_NS 00 +20518 clk cpu0 R X9 0000000000000000 +20519 clk cpu0 IT (20483) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20519 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20519 clk cpu0 R X8 0000000003700600 +20520 clk cpu0 IT (20484) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20520 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000046 +20520 clk cpu0 R X8 0000000023000046 +20521 clk cpu0 IT (20485) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20521 clk cpu0 MW1 23000046:000016240046_NS 00 +20522 clk cpu0 IT (20486) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20522 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20522 clk cpu0 R X8 0000000003700600 +20523 clk cpu0 IT (20487) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20523 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000046 +20523 clk cpu0 R X10 0000000023000046 +20524 clk cpu0 IT (20488) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20524 clk cpu0 R X11 0000000000000001 +20525 clk cpu0 IT (20489) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20525 clk cpu0 R X10 0000000023000047 +20526 clk cpu0 IT (20490) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20526 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000047 +20527 clk cpu0 IT (20491) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20527 clk cpu0 MR1 0370053e:000000f0053e_NS 16 +20527 clk cpu0 R X8 0000000000000016 +20528 clk cpu0 IT (20492) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20528 clk cpu0 R X8 0000000000000017 +20529 clk cpu0 IT (20493) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20529 clk cpu0 MW1 0370053e:000000f0053e_NS 17 +20530 clk cpu0 IT (20494) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20531 clk cpu0 IT (20495) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20531 clk cpu0 MR1 0370053e:000000f0053e_NS 17 +20531 clk cpu0 R X8 0000000000000017 +20532 clk cpu0 IT (20496) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20532 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20532 clk cpu0 R X9 0000000000000038 +20533 clk cpu0 IT (20497) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20533 clk cpu0 R cpsr 820003c5 +20534 clk cpu0 IT (20498) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20534 clk cpu0 R X8 0000000000000001 +20535 clk cpu0 IT (20499) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20536 clk cpu0 IT (20500) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20536 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20536 clk cpu0 R X8 0000000003700730 +20537 clk cpu0 IT (20501) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20537 clk cpu0 MR1 0370053e:000000f0053e_NS 17 +20537 clk cpu0 R X9 0000000000000017 +20538 clk cpu0 IT (20502) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20538 clk cpu0 R X10 0000000000000017 +20539 clk cpu0 IT (20503) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20539 clk cpu0 R X10 0000000000000017 +20540 clk cpu0 IT (20504) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20540 clk cpu0 R X8 0000000003700747 +20541 clk cpu0 IT (20505) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20541 clk cpu0 MR1 03700747:000000f00747_NS 00 +20541 clk cpu0 R X9 0000000000000000 +20542 clk cpu0 IT (20506) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20542 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20542 clk cpu0 R X8 0000000003700600 +20543 clk cpu0 IT (20507) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20543 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000047 +20543 clk cpu0 R X8 0000000023000047 +20544 clk cpu0 IT (20508) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20544 clk cpu0 MW1 23000047:000016240047_NS 00 +20545 clk cpu0 IT (20509) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20545 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20545 clk cpu0 R X8 0000000003700600 +20546 clk cpu0 IT (20510) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20546 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000047 +20546 clk cpu0 R X10 0000000023000047 +20547 clk cpu0 IT (20511) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20547 clk cpu0 R X11 0000000000000001 +20548 clk cpu0 IT (20512) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20548 clk cpu0 R X10 0000000023000048 +20549 clk cpu0 IT (20513) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20549 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000048 +20550 clk cpu0 IT (20514) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20550 clk cpu0 MR1 0370053e:000000f0053e_NS 17 +20550 clk cpu0 R X8 0000000000000017 +20551 clk cpu0 IT (20515) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20551 clk cpu0 R X8 0000000000000018 +20552 clk cpu0 IT (20516) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20552 clk cpu0 MW1 0370053e:000000f0053e_NS 18 +20553 clk cpu0 IT (20517) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20554 clk cpu0 IT (20518) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20554 clk cpu0 MR1 0370053e:000000f0053e_NS 18 +20554 clk cpu0 R X8 0000000000000018 +20555 clk cpu0 IT (20519) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20555 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20555 clk cpu0 R X9 0000000000000038 +20556 clk cpu0 IT (20520) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20556 clk cpu0 R cpsr 820003c5 +20557 clk cpu0 IT (20521) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20557 clk cpu0 R X8 0000000000000001 +20558 clk cpu0 IT (20522) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20559 clk cpu0 IT (20523) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20559 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20559 clk cpu0 R X8 0000000003700730 +20560 clk cpu0 IT (20524) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20560 clk cpu0 MR1 0370053e:000000f0053e_NS 18 +20560 clk cpu0 R X9 0000000000000018 +20561 clk cpu0 IT (20525) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20561 clk cpu0 R X10 0000000000000018 +20562 clk cpu0 IT (20526) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20562 clk cpu0 R X10 0000000000000018 +20563 clk cpu0 IT (20527) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20563 clk cpu0 R X8 0000000003700748 +20564 clk cpu0 IT (20528) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20564 clk cpu0 MR1 03700748:000000f00748_NS a1 +20564 clk cpu0 R X9 00000000000000A1 +20565 clk cpu0 IT (20529) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20565 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20565 clk cpu0 R X8 0000000003700600 +20566 clk cpu0 IT (20530) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20566 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000048 +20566 clk cpu0 R X8 0000000023000048 +20567 clk cpu0 IT (20531) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20567 clk cpu0 MW1 23000048:000016240048_NS a1 +20568 clk cpu0 IT (20532) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20568 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20568 clk cpu0 R X8 0000000003700600 +20569 clk cpu0 IT (20533) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20569 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000048 +20569 clk cpu0 R X10 0000000023000048 +20570 clk cpu0 IT (20534) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20570 clk cpu0 R X11 0000000000000001 +20571 clk cpu0 IT (20535) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20571 clk cpu0 R X10 0000000023000049 +20572 clk cpu0 IT (20536) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20572 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000049 +20573 clk cpu0 IT (20537) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20573 clk cpu0 MR1 0370053e:000000f0053e_NS 18 +20573 clk cpu0 R X8 0000000000000018 +20574 clk cpu0 IT (20538) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20574 clk cpu0 R X8 0000000000000019 +20575 clk cpu0 IT (20539) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20575 clk cpu0 MW1 0370053e:000000f0053e_NS 19 +20576 clk cpu0 IT (20540) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20577 clk cpu0 IT (20541) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20577 clk cpu0 MR1 0370053e:000000f0053e_NS 19 +20577 clk cpu0 R X8 0000000000000019 +20578 clk cpu0 IT (20542) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20578 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20578 clk cpu0 R X9 0000000000000038 +20579 clk cpu0 IT (20543) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20579 clk cpu0 R cpsr 820003c5 +20580 clk cpu0 IT (20544) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20580 clk cpu0 R X8 0000000000000001 +20581 clk cpu0 IT (20545) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20582 clk cpu0 IT (20546) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20582 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20582 clk cpu0 R X8 0000000003700730 +20583 clk cpu0 IT (20547) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20583 clk cpu0 MR1 0370053e:000000f0053e_NS 19 +20583 clk cpu0 R X9 0000000000000019 +20584 clk cpu0 IT (20548) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20584 clk cpu0 R X10 0000000000000019 +20585 clk cpu0 IT (20549) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20585 clk cpu0 R X10 0000000000000019 +20586 clk cpu0 IT (20550) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20586 clk cpu0 R X8 0000000003700749 +20587 clk cpu0 IT (20551) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20587 clk cpu0 MR1 03700749:000000f00749_NS 0a +20587 clk cpu0 R X9 000000000000000A +20588 clk cpu0 IT (20552) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20588 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20588 clk cpu0 R X8 0000000003700600 +20589 clk cpu0 IT (20553) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20589 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000049 +20589 clk cpu0 R X8 0000000023000049 +20590 clk cpu0 IT (20554) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20590 clk cpu0 MW1 23000049:000016240049_NS 0a +20591 clk cpu0 IT (20555) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20591 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20591 clk cpu0 R X8 0000000003700600 +20592 clk cpu0 IT (20556) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20592 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000049 +20592 clk cpu0 R X10 0000000023000049 +20593 clk cpu0 IT (20557) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20593 clk cpu0 R X11 0000000000000001 +20594 clk cpu0 IT (20558) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20594 clk cpu0 R X10 000000002300004A +20595 clk cpu0 IT (20559) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20595 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300004a +20596 clk cpu0 IT (20560) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20596 clk cpu0 MR1 0370053e:000000f0053e_NS 19 +20596 clk cpu0 R X8 0000000000000019 +20597 clk cpu0 IT (20561) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20597 clk cpu0 R X8 000000000000001A +20598 clk cpu0 IT (20562) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20598 clk cpu0 MW1 0370053e:000000f0053e_NS 1a +20599 clk cpu0 IT (20563) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20600 clk cpu0 IT (20564) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20600 clk cpu0 MR1 0370053e:000000f0053e_NS 1a +20600 clk cpu0 R X8 000000000000001A +20601 clk cpu0 IT (20565) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20601 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20601 clk cpu0 R X9 0000000000000038 +20602 clk cpu0 IT (20566) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20602 clk cpu0 R cpsr 820003c5 +20603 clk cpu0 IT (20567) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20603 clk cpu0 R X8 0000000000000001 +20604 clk cpu0 IT (20568) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20605 clk cpu0 IT (20569) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20605 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20605 clk cpu0 R X8 0000000003700730 +20606 clk cpu0 IT (20570) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20606 clk cpu0 MR1 0370053e:000000f0053e_NS 1a +20606 clk cpu0 R X9 000000000000001A +20607 clk cpu0 IT (20571) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20607 clk cpu0 R X10 000000000000001A +20608 clk cpu0 IT (20572) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20608 clk cpu0 R X10 000000000000001A +20609 clk cpu0 IT (20573) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20609 clk cpu0 R X8 000000000370074A +20610 clk cpu0 IT (20574) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20610 clk cpu0 MR1 0370074a:000000f0074a_NS 00 +20610 clk cpu0 R X9 0000000000000000 +20611 clk cpu0 IT (20575) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20611 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20611 clk cpu0 R X8 0000000003700600 +20612 clk cpu0 IT (20576) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20612 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004a +20612 clk cpu0 R X8 000000002300004A +20613 clk cpu0 IT (20577) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20613 clk cpu0 MW1 2300004a:00001624004a_NS 00 +20614 clk cpu0 IT (20578) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20614 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20614 clk cpu0 R X8 0000000003700600 +20615 clk cpu0 IT (20579) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20615 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004a +20615 clk cpu0 R X10 000000002300004A +20616 clk cpu0 IT (20580) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20616 clk cpu0 R X11 0000000000000001 +20617 clk cpu0 IT (20581) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20617 clk cpu0 R X10 000000002300004B +20618 clk cpu0 IT (20582) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20618 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300004b +20619 clk cpu0 IT (20583) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20619 clk cpu0 MR1 0370053e:000000f0053e_NS 1a +20619 clk cpu0 R X8 000000000000001A +20620 clk cpu0 IT (20584) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20620 clk cpu0 R X8 000000000000001B +20621 clk cpu0 IT (20585) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20621 clk cpu0 MW1 0370053e:000000f0053e_NS 1b +20622 clk cpu0 IT (20586) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20623 clk cpu0 IT (20587) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20623 clk cpu0 MR1 0370053e:000000f0053e_NS 1b +20623 clk cpu0 R X8 000000000000001B +20624 clk cpu0 IT (20588) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20624 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20624 clk cpu0 R X9 0000000000000038 +20625 clk cpu0 IT (20589) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20625 clk cpu0 R cpsr 820003c5 +20626 clk cpu0 IT (20590) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20626 clk cpu0 R X8 0000000000000001 +20627 clk cpu0 IT (20591) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20628 clk cpu0 IT (20592) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20628 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20628 clk cpu0 R X8 0000000003700730 +20629 clk cpu0 IT (20593) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20629 clk cpu0 MR1 0370053e:000000f0053e_NS 1b +20629 clk cpu0 R X9 000000000000001B +20630 clk cpu0 IT (20594) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20630 clk cpu0 R X10 000000000000001B +20631 clk cpu0 IT (20595) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20631 clk cpu0 R X10 000000000000001B +20632 clk cpu0 IT (20596) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20632 clk cpu0 R X8 000000000370074B +20633 clk cpu0 IT (20597) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20633 clk cpu0 MR1 0370074b:000000f0074b_NS 08 +20633 clk cpu0 R X9 0000000000000008 +20634 clk cpu0 IT (20598) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20634 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20634 clk cpu0 R X8 0000000003700600 +20635 clk cpu0 IT (20599) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20635 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004b +20635 clk cpu0 R X8 000000002300004B +20636 clk cpu0 IT (20600) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20636 clk cpu0 MW1 2300004b:00001624004b_NS 08 +20637 clk cpu0 IT (20601) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20637 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20637 clk cpu0 R X8 0000000003700600 +20638 clk cpu0 IT (20602) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20638 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004b +20638 clk cpu0 R X10 000000002300004B +20639 clk cpu0 IT (20603) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20639 clk cpu0 R X11 0000000000000001 +20640 clk cpu0 IT (20604) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20640 clk cpu0 R X10 000000002300004C +20641 clk cpu0 IT (20605) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20641 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300004c +20642 clk cpu0 IT (20606) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20642 clk cpu0 MR1 0370053e:000000f0053e_NS 1b +20642 clk cpu0 R X8 000000000000001B +20643 clk cpu0 IT (20607) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20643 clk cpu0 R X8 000000000000001C +20644 clk cpu0 IT (20608) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20644 clk cpu0 MW1 0370053e:000000f0053e_NS 1c +20645 clk cpu0 IT (20609) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20646 clk cpu0 IT (20610) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20646 clk cpu0 MR1 0370053e:000000f0053e_NS 1c +20646 clk cpu0 R X8 000000000000001C +20647 clk cpu0 IT (20611) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20647 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20647 clk cpu0 R X9 0000000000000038 +20648 clk cpu0 IT (20612) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20648 clk cpu0 R cpsr 820003c5 +20649 clk cpu0 IT (20613) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20649 clk cpu0 R X8 0000000000000001 +20650 clk cpu0 IT (20614) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20651 clk cpu0 IT (20615) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20651 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20651 clk cpu0 R X8 0000000003700730 +20652 clk cpu0 IT (20616) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20652 clk cpu0 MR1 0370053e:000000f0053e_NS 1c +20652 clk cpu0 R X9 000000000000001C +20653 clk cpu0 IT (20617) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20653 clk cpu0 R X10 000000000000001C +20654 clk cpu0 IT (20618) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20654 clk cpu0 R X10 000000000000001C +20655 clk cpu0 IT (20619) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20655 clk cpu0 R X8 000000000370074C +20656 clk cpu0 IT (20620) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20656 clk cpu0 MR1 0370074c:000000f0074c_NS 00 +20656 clk cpu0 R X9 0000000000000000 +20657 clk cpu0 IT (20621) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20657 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20657 clk cpu0 R X8 0000000003700600 +20658 clk cpu0 IT (20622) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20658 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004c +20658 clk cpu0 R X8 000000002300004C +20659 clk cpu0 IT (20623) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20659 clk cpu0 MW1 2300004c:00001624004c_NS 00 +20660 clk cpu0 IT (20624) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20660 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20660 clk cpu0 R X8 0000000003700600 +20661 clk cpu0 IT (20625) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20661 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004c +20661 clk cpu0 R X10 000000002300004C +20662 clk cpu0 IT (20626) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20662 clk cpu0 R X11 0000000000000001 +20663 clk cpu0 IT (20627) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20663 clk cpu0 R X10 000000002300004D +20664 clk cpu0 IT (20628) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20664 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300004d +20665 clk cpu0 IT (20629) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20665 clk cpu0 MR1 0370053e:000000f0053e_NS 1c +20665 clk cpu0 R X8 000000000000001C +20666 clk cpu0 IT (20630) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20666 clk cpu0 R X8 000000000000001D +20667 clk cpu0 IT (20631) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20667 clk cpu0 MW1 0370053e:000000f0053e_NS 1d +20668 clk cpu0 IT (20632) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20669 clk cpu0 IT (20633) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20669 clk cpu0 MR1 0370053e:000000f0053e_NS 1d +20669 clk cpu0 R X8 000000000000001D +20670 clk cpu0 IT (20634) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20670 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20670 clk cpu0 R X9 0000000000000038 +20671 clk cpu0 IT (20635) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20671 clk cpu0 R cpsr 820003c5 +20672 clk cpu0 IT (20636) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20672 clk cpu0 R X8 0000000000000001 +20673 clk cpu0 IT (20637) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20674 clk cpu0 IT (20638) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20674 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20674 clk cpu0 R X8 0000000003700730 +20675 clk cpu0 IT (20639) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20675 clk cpu0 MR1 0370053e:000000f0053e_NS 1d +20675 clk cpu0 R X9 000000000000001D +20676 clk cpu0 IT (20640) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20676 clk cpu0 R X10 000000000000001D +20677 clk cpu0 IT (20641) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20677 clk cpu0 R X10 000000000000001D +20678 clk cpu0 IT (20642) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20678 clk cpu0 R X8 000000000370074D +20679 clk cpu0 IT (20643) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20679 clk cpu0 MR1 0370074d:000000f0074d_NS 00 +20679 clk cpu0 R X9 0000000000000000 +20680 clk cpu0 IT (20644) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20680 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20680 clk cpu0 R X8 0000000003700600 +20681 clk cpu0 IT (20645) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20681 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004d +20681 clk cpu0 R X8 000000002300004D +20682 clk cpu0 IT (20646) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20682 clk cpu0 MW1 2300004d:00001624004d_NS 00 +20683 clk cpu0 IT (20647) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20683 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20683 clk cpu0 R X8 0000000003700600 +20684 clk cpu0 IT (20648) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20684 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004d +20684 clk cpu0 R X10 000000002300004D +20685 clk cpu0 IT (20649) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20685 clk cpu0 R X11 0000000000000001 +20686 clk cpu0 IT (20650) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20686 clk cpu0 R X10 000000002300004E +20687 clk cpu0 IT (20651) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20687 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300004e +20688 clk cpu0 IT (20652) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20688 clk cpu0 MR1 0370053e:000000f0053e_NS 1d +20688 clk cpu0 R X8 000000000000001D +20689 clk cpu0 IT (20653) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20689 clk cpu0 R X8 000000000000001E +20690 clk cpu0 IT (20654) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20690 clk cpu0 MW1 0370053e:000000f0053e_NS 1e +20691 clk cpu0 IT (20655) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20692 clk cpu0 IT (20656) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20692 clk cpu0 MR1 0370053e:000000f0053e_NS 1e +20692 clk cpu0 R X8 000000000000001E +20693 clk cpu0 IT (20657) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20693 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20693 clk cpu0 R X9 0000000000000038 +20694 clk cpu0 IT (20658) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20694 clk cpu0 R cpsr 820003c5 +20695 clk cpu0 IT (20659) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20695 clk cpu0 R X8 0000000000000001 +20696 clk cpu0 IT (20660) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20697 clk cpu0 IT (20661) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20697 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20697 clk cpu0 R X8 0000000003700730 +20698 clk cpu0 IT (20662) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20698 clk cpu0 MR1 0370053e:000000f0053e_NS 1e +20698 clk cpu0 R X9 000000000000001E +20699 clk cpu0 IT (20663) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20699 clk cpu0 R X10 000000000000001E +20700 clk cpu0 IT (20664) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20700 clk cpu0 R X10 000000000000001E +20701 clk cpu0 IT (20665) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20701 clk cpu0 R X8 000000000370074E +20702 clk cpu0 IT (20666) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20702 clk cpu0 MR1 0370074e:000000f0074e_NS 00 +20702 clk cpu0 R X9 0000000000000000 +20703 clk cpu0 IT (20667) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20703 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20703 clk cpu0 R X8 0000000003700600 +20704 clk cpu0 IT (20668) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20704 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004e +20704 clk cpu0 R X8 000000002300004E +20705 clk cpu0 IT (20669) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20705 clk cpu0 MW1 2300004e:00001624004e_NS 00 +20706 clk cpu0 IT (20670) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20706 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20706 clk cpu0 R X8 0000000003700600 +20707 clk cpu0 IT (20671) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20707 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004e +20707 clk cpu0 R X10 000000002300004E +20708 clk cpu0 IT (20672) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20708 clk cpu0 R X11 0000000000000001 +20709 clk cpu0 IT (20673) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20709 clk cpu0 R X10 000000002300004F +20710 clk cpu0 IT (20674) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20710 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300004f +20711 clk cpu0 IT (20675) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20711 clk cpu0 MR1 0370053e:000000f0053e_NS 1e +20711 clk cpu0 R X8 000000000000001E +20712 clk cpu0 IT (20676) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20712 clk cpu0 R X8 000000000000001F +20713 clk cpu0 IT (20677) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20713 clk cpu0 MW1 0370053e:000000f0053e_NS 1f +20714 clk cpu0 IT (20678) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20715 clk cpu0 IT (20679) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20715 clk cpu0 MR1 0370053e:000000f0053e_NS 1f +20715 clk cpu0 R X8 000000000000001F +20716 clk cpu0 IT (20680) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20716 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20716 clk cpu0 R X9 0000000000000038 +20717 clk cpu0 IT (20681) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20717 clk cpu0 R cpsr 820003c5 +20718 clk cpu0 IT (20682) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20718 clk cpu0 R X8 0000000000000001 +20719 clk cpu0 IT (20683) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20720 clk cpu0 IT (20684) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20720 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20720 clk cpu0 R X8 0000000003700730 +20721 clk cpu0 IT (20685) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20721 clk cpu0 MR1 0370053e:000000f0053e_NS 1f +20721 clk cpu0 R X9 000000000000001F +20722 clk cpu0 IT (20686) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20722 clk cpu0 R X10 000000000000001F +20723 clk cpu0 IT (20687) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20723 clk cpu0 R X10 000000000000001F +20724 clk cpu0 IT (20688) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20724 clk cpu0 R X8 000000000370074F +20725 clk cpu0 IT (20689) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20725 clk cpu0 MR1 0370074f:000000f0074f_NS 00 +20725 clk cpu0 R X9 0000000000000000 +20726 clk cpu0 IT (20690) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20726 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20726 clk cpu0 R X8 0000000003700600 +20727 clk cpu0 IT (20691) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20727 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004f +20727 clk cpu0 R X8 000000002300004F +20728 clk cpu0 IT (20692) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20728 clk cpu0 MW1 2300004f:00001624004f_NS 00 +20729 clk cpu0 IT (20693) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20729 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20729 clk cpu0 R X8 0000000003700600 +20730 clk cpu0 IT (20694) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20730 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300004f +20730 clk cpu0 R X10 000000002300004F +20731 clk cpu0 IT (20695) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20731 clk cpu0 R X11 0000000000000001 +20732 clk cpu0 IT (20696) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20732 clk cpu0 R X10 0000000023000050 +20733 clk cpu0 IT (20697) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20733 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000050 +20734 clk cpu0 IT (20698) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20734 clk cpu0 MR1 0370053e:000000f0053e_NS 1f +20734 clk cpu0 R X8 000000000000001F +20735 clk cpu0 IT (20699) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20735 clk cpu0 R X8 0000000000000020 +20736 clk cpu0 IT (20700) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20736 clk cpu0 MW1 0370053e:000000f0053e_NS 20 +20737 clk cpu0 IT (20701) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20738 clk cpu0 IT (20702) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20738 clk cpu0 MR1 0370053e:000000f0053e_NS 20 +20738 clk cpu0 R X8 0000000000000020 +20739 clk cpu0 IT (20703) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20739 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20739 clk cpu0 R X9 0000000000000038 +20740 clk cpu0 IT (20704) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20740 clk cpu0 R cpsr 820003c5 +20741 clk cpu0 IT (20705) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20741 clk cpu0 R X8 0000000000000001 +20742 clk cpu0 IT (20706) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20743 clk cpu0 IT (20707) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20743 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20743 clk cpu0 R X8 0000000003700730 +20744 clk cpu0 IT (20708) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20744 clk cpu0 MR1 0370053e:000000f0053e_NS 20 +20744 clk cpu0 R X9 0000000000000020 +20745 clk cpu0 IT (20709) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20745 clk cpu0 R X10 0000000000000020 +20746 clk cpu0 IT (20710) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20746 clk cpu0 R X10 0000000000000020 +20747 clk cpu0 IT (20711) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20747 clk cpu0 R X8 0000000003700750 +20748 clk cpu0 IT (20712) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20748 clk cpu0 MR1 03700750:000000f00750_NS f0 +20748 clk cpu0 R X9 00000000000000F0 +20749 clk cpu0 IT (20713) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20749 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20749 clk cpu0 R X8 0000000003700600 +20750 clk cpu0 IT (20714) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20750 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000050 +20750 clk cpu0 R X8 0000000023000050 +20751 clk cpu0 IT (20715) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20751 clk cpu0 MW1 23000050:000016240050_NS f0 +20752 clk cpu0 IT (20716) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20752 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20752 clk cpu0 R X8 0000000003700600 +20753 clk cpu0 IT (20717) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20753 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000050 +20753 clk cpu0 R X10 0000000023000050 +20754 clk cpu0 IT (20718) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20754 clk cpu0 R X11 0000000000000001 +20755 clk cpu0 IT (20719) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20755 clk cpu0 R X10 0000000023000051 +20756 clk cpu0 IT (20720) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20756 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000051 +20757 clk cpu0 IT (20721) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20757 clk cpu0 MR1 0370053e:000000f0053e_NS 20 +20757 clk cpu0 R X8 0000000000000020 +20758 clk cpu0 IT (20722) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20758 clk cpu0 R X8 0000000000000021 +20759 clk cpu0 IT (20723) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20759 clk cpu0 MW1 0370053e:000000f0053e_NS 21 +20760 clk cpu0 IT (20724) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20761 clk cpu0 IT (20725) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20761 clk cpu0 MR1 0370053e:000000f0053e_NS 21 +20761 clk cpu0 R X8 0000000000000021 +20762 clk cpu0 IT (20726) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20762 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20762 clk cpu0 R X9 0000000000000038 +20763 clk cpu0 IT (20727) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20763 clk cpu0 R cpsr 820003c5 +20764 clk cpu0 IT (20728) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20764 clk cpu0 R X8 0000000000000001 +20765 clk cpu0 IT (20729) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20766 clk cpu0 IT (20730) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20766 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20766 clk cpu0 R X8 0000000003700730 +20767 clk cpu0 IT (20731) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20767 clk cpu0 MR1 0370053e:000000f0053e_NS 21 +20767 clk cpu0 R X9 0000000000000021 +20768 clk cpu0 IT (20732) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20768 clk cpu0 R X10 0000000000000021 +20769 clk cpu0 IT (20733) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20769 clk cpu0 R X10 0000000000000021 +20770 clk cpu0 IT (20734) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20770 clk cpu0 R X8 0000000003700751 +20771 clk cpu0 IT (20735) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20771 clk cpu0 MR1 03700751:000000f00751_NS ff +20771 clk cpu0 R X9 00000000000000FF +20772 clk cpu0 IT (20736) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20772 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20772 clk cpu0 R X8 0000000003700600 +20773 clk cpu0 IT (20737) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20773 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000051 +20773 clk cpu0 R X8 0000000023000051 +20774 clk cpu0 IT (20738) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20774 clk cpu0 MW1 23000051:000016240051_NS ff +20775 clk cpu0 IT (20739) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20775 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20775 clk cpu0 R X8 0000000003700600 +20776 clk cpu0 IT (20740) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20776 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000051 +20776 clk cpu0 R X10 0000000023000051 +20777 clk cpu0 IT (20741) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20777 clk cpu0 R X11 0000000000000001 +20778 clk cpu0 IT (20742) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20778 clk cpu0 R X10 0000000023000052 +20779 clk cpu0 IT (20743) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20779 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000052 +20780 clk cpu0 IT (20744) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20780 clk cpu0 MR1 0370053e:000000f0053e_NS 21 +20780 clk cpu0 R X8 0000000000000021 +20781 clk cpu0 IT (20745) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20781 clk cpu0 R X8 0000000000000022 +20782 clk cpu0 IT (20746) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20782 clk cpu0 MW1 0370053e:000000f0053e_NS 22 +20783 clk cpu0 IT (20747) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20784 clk cpu0 IT (20748) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20784 clk cpu0 MR1 0370053e:000000f0053e_NS 22 +20784 clk cpu0 R X8 0000000000000022 +20785 clk cpu0 IT (20749) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20785 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20785 clk cpu0 R X9 0000000000000038 +20786 clk cpu0 IT (20750) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20786 clk cpu0 R cpsr 820003c5 +20787 clk cpu0 IT (20751) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20787 clk cpu0 R X8 0000000000000001 +20788 clk cpu0 IT (20752) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20789 clk cpu0 IT (20753) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20789 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20789 clk cpu0 R X8 0000000003700730 +20790 clk cpu0 IT (20754) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20790 clk cpu0 MR1 0370053e:000000f0053e_NS 22 +20790 clk cpu0 R X9 0000000000000022 +20791 clk cpu0 IT (20755) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20791 clk cpu0 R X10 0000000000000022 +20792 clk cpu0 IT (20756) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20792 clk cpu0 R X10 0000000000000022 +20793 clk cpu0 IT (20757) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20793 clk cpu0 R X8 0000000003700752 +20794 clk cpu0 IT (20758) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20794 clk cpu0 MR1 03700752:000000f00752_NS 00 +20794 clk cpu0 R X9 0000000000000000 +20795 clk cpu0 IT (20759) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20795 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20795 clk cpu0 R X8 0000000003700600 +20796 clk cpu0 IT (20760) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20796 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000052 +20796 clk cpu0 R X8 0000000023000052 +20797 clk cpu0 IT (20761) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20797 clk cpu0 MW1 23000052:000016240052_NS 00 +20798 clk cpu0 IT (20762) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20798 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20798 clk cpu0 R X8 0000000003700600 +20799 clk cpu0 IT (20763) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20799 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000052 +20799 clk cpu0 R X10 0000000023000052 +20800 clk cpu0 IT (20764) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20800 clk cpu0 R X11 0000000000000001 +20801 clk cpu0 IT (20765) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20801 clk cpu0 R X10 0000000023000053 +20802 clk cpu0 IT (20766) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20802 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000053 +20803 clk cpu0 IT (20767) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20803 clk cpu0 MR1 0370053e:000000f0053e_NS 22 +20803 clk cpu0 R X8 0000000000000022 +20804 clk cpu0 IT (20768) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20804 clk cpu0 R X8 0000000000000023 +20805 clk cpu0 IT (20769) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20805 clk cpu0 MW1 0370053e:000000f0053e_NS 23 +20806 clk cpu0 IT (20770) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20807 clk cpu0 IT (20771) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20807 clk cpu0 MR1 0370053e:000000f0053e_NS 23 +20807 clk cpu0 R X8 0000000000000023 +20808 clk cpu0 IT (20772) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20808 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20808 clk cpu0 R X9 0000000000000038 +20809 clk cpu0 IT (20773) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20809 clk cpu0 R cpsr 820003c5 +20810 clk cpu0 IT (20774) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20810 clk cpu0 R X8 0000000000000001 +20811 clk cpu0 IT (20775) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20812 clk cpu0 IT (20776) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20812 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20812 clk cpu0 R X8 0000000003700730 +20813 clk cpu0 IT (20777) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20813 clk cpu0 MR1 0370053e:000000f0053e_NS 23 +20813 clk cpu0 R X9 0000000000000023 +20814 clk cpu0 IT (20778) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20814 clk cpu0 R X10 0000000000000023 +20815 clk cpu0 IT (20779) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20815 clk cpu0 R X10 0000000000000023 +20816 clk cpu0 IT (20780) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20816 clk cpu0 R X8 0000000003700753 +20817 clk cpu0 IT (20781) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20817 clk cpu0 MR1 03700753:000000f00753_NS 41 +20817 clk cpu0 R X9 0000000000000041 +20818 clk cpu0 IT (20782) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20818 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20818 clk cpu0 R X8 0000000003700600 +20819 clk cpu0 IT (20783) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20819 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000053 +20819 clk cpu0 R X8 0000000023000053 +20820 clk cpu0 IT (20784) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20820 clk cpu0 MW1 23000053:000016240053_NS 41 +20821 clk cpu0 IT (20785) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20821 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20821 clk cpu0 R X8 0000000003700600 +20822 clk cpu0 IT (20786) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20822 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000053 +20822 clk cpu0 R X10 0000000023000053 +20823 clk cpu0 IT (20787) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20823 clk cpu0 R X11 0000000000000001 +20824 clk cpu0 IT (20788) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20824 clk cpu0 R X10 0000000023000054 +20825 clk cpu0 IT (20789) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20825 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000054 +20826 clk cpu0 IT (20790) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20826 clk cpu0 MR1 0370053e:000000f0053e_NS 23 +20826 clk cpu0 R X8 0000000000000023 +20827 clk cpu0 IT (20791) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20827 clk cpu0 R X8 0000000000000024 +20828 clk cpu0 IT (20792) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20828 clk cpu0 MW1 0370053e:000000f0053e_NS 24 +20829 clk cpu0 IT (20793) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20830 clk cpu0 IT (20794) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20830 clk cpu0 MR1 0370053e:000000f0053e_NS 24 +20830 clk cpu0 R X8 0000000000000024 +20831 clk cpu0 IT (20795) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20831 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20831 clk cpu0 R X9 0000000000000038 +20832 clk cpu0 IT (20796) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20832 clk cpu0 R cpsr 820003c5 +20833 clk cpu0 IT (20797) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20833 clk cpu0 R X8 0000000000000001 +20834 clk cpu0 IT (20798) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20835 clk cpu0 IT (20799) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20835 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20835 clk cpu0 R X8 0000000003700730 +20836 clk cpu0 IT (20800) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20836 clk cpu0 MR1 0370053e:000000f0053e_NS 24 +20836 clk cpu0 R X9 0000000000000024 +20837 clk cpu0 IT (20801) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20837 clk cpu0 R X10 0000000000000024 +20838 clk cpu0 IT (20802) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20838 clk cpu0 R X10 0000000000000024 +20839 clk cpu0 IT (20803) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20839 clk cpu0 R X8 0000000003700754 +20840 clk cpu0 IT (20804) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20840 clk cpu0 MR1 03700754:000000f00754_NS 00 +20840 clk cpu0 R X9 0000000000000000 +20841 clk cpu0 IT (20805) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20841 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20841 clk cpu0 R X8 0000000003700600 +20842 clk cpu0 IT (20806) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20842 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000054 +20842 clk cpu0 R X8 0000000023000054 +20843 clk cpu0 IT (20807) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20843 clk cpu0 MW1 23000054:000016240054_NS 00 +20844 clk cpu0 IT (20808) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20844 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20844 clk cpu0 R X8 0000000003700600 +20845 clk cpu0 IT (20809) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20845 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000054 +20845 clk cpu0 R X10 0000000023000054 +20846 clk cpu0 IT (20810) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20846 clk cpu0 R X11 0000000000000001 +20847 clk cpu0 IT (20811) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20847 clk cpu0 R X10 0000000023000055 +20848 clk cpu0 IT (20812) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20848 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000055 +20849 clk cpu0 IT (20813) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20849 clk cpu0 MR1 0370053e:000000f0053e_NS 24 +20849 clk cpu0 R X8 0000000000000024 +20850 clk cpu0 IT (20814) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20850 clk cpu0 R X8 0000000000000025 +20851 clk cpu0 IT (20815) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20851 clk cpu0 MW1 0370053e:000000f0053e_NS 25 +20852 clk cpu0 IT (20816) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20853 clk cpu0 IT (20817) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20853 clk cpu0 MR1 0370053e:000000f0053e_NS 25 +20853 clk cpu0 R X8 0000000000000025 +20854 clk cpu0 IT (20818) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20854 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20854 clk cpu0 R X9 0000000000000038 +20855 clk cpu0 IT (20819) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20855 clk cpu0 R cpsr 820003c5 +20856 clk cpu0 IT (20820) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20856 clk cpu0 R X8 0000000000000001 +20857 clk cpu0 IT (20821) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20858 clk cpu0 IT (20822) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20858 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20858 clk cpu0 R X8 0000000003700730 +20859 clk cpu0 IT (20823) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20859 clk cpu0 MR1 0370053e:000000f0053e_NS 25 +20859 clk cpu0 R X9 0000000000000025 +20860 clk cpu0 IT (20824) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20860 clk cpu0 R X10 0000000000000025 +20861 clk cpu0 IT (20825) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20861 clk cpu0 R X10 0000000000000025 +20862 clk cpu0 IT (20826) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20862 clk cpu0 R X8 0000000003700755 +20863 clk cpu0 IT (20827) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20863 clk cpu0 MR1 03700755:000000f00755_NS 00 +20863 clk cpu0 R X9 0000000000000000 +20864 clk cpu0 IT (20828) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20864 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20864 clk cpu0 R X8 0000000003700600 +20865 clk cpu0 IT (20829) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20865 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000055 +20865 clk cpu0 R X8 0000000023000055 +20866 clk cpu0 IT (20830) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20866 clk cpu0 MW1 23000055:000016240055_NS 00 +20867 clk cpu0 IT (20831) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20867 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20867 clk cpu0 R X8 0000000003700600 +20868 clk cpu0 IT (20832) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20868 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000055 +20868 clk cpu0 R X10 0000000023000055 +20869 clk cpu0 IT (20833) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20869 clk cpu0 R X11 0000000000000001 +20870 clk cpu0 IT (20834) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20870 clk cpu0 R X10 0000000023000056 +20871 clk cpu0 IT (20835) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20871 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000056 +20872 clk cpu0 IT (20836) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20872 clk cpu0 MR1 0370053e:000000f0053e_NS 25 +20872 clk cpu0 R X8 0000000000000025 +20873 clk cpu0 IT (20837) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20873 clk cpu0 R X8 0000000000000026 +20874 clk cpu0 IT (20838) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20874 clk cpu0 MW1 0370053e:000000f0053e_NS 26 +20875 clk cpu0 IT (20839) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20876 clk cpu0 IT (20840) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20876 clk cpu0 MR1 0370053e:000000f0053e_NS 26 +20876 clk cpu0 R X8 0000000000000026 +20877 clk cpu0 IT (20841) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20877 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20877 clk cpu0 R X9 0000000000000038 +20878 clk cpu0 IT (20842) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20878 clk cpu0 R cpsr 820003c5 +20879 clk cpu0 IT (20843) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20879 clk cpu0 R X8 0000000000000001 +20880 clk cpu0 IT (20844) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20881 clk cpu0 IT (20845) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20881 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20881 clk cpu0 R X8 0000000003700730 +20882 clk cpu0 IT (20846) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20882 clk cpu0 MR1 0370053e:000000f0053e_NS 26 +20882 clk cpu0 R X9 0000000000000026 +20883 clk cpu0 IT (20847) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20883 clk cpu0 R X10 0000000000000026 +20884 clk cpu0 IT (20848) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20884 clk cpu0 R X10 0000000000000026 +20885 clk cpu0 IT (20849) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20885 clk cpu0 R X8 0000000003700756 +20886 clk cpu0 IT (20850) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20886 clk cpu0 MR1 03700756:000000f00756_NS 00 +20886 clk cpu0 R X9 0000000000000000 +20887 clk cpu0 IT (20851) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20887 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20887 clk cpu0 R X8 0000000003700600 +20888 clk cpu0 IT (20852) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20888 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000056 +20888 clk cpu0 R X8 0000000023000056 +20889 clk cpu0 IT (20853) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20889 clk cpu0 MW1 23000056:000016240056_NS 00 +20890 clk cpu0 IT (20854) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20890 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20890 clk cpu0 R X8 0000000003700600 +20891 clk cpu0 IT (20855) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20891 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000056 +20891 clk cpu0 R X10 0000000023000056 +20892 clk cpu0 IT (20856) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20892 clk cpu0 R X11 0000000000000001 +20893 clk cpu0 IT (20857) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20893 clk cpu0 R X10 0000000023000057 +20894 clk cpu0 IT (20858) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20894 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000057 +20895 clk cpu0 IT (20859) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20895 clk cpu0 MR1 0370053e:000000f0053e_NS 26 +20895 clk cpu0 R X8 0000000000000026 +20896 clk cpu0 IT (20860) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20896 clk cpu0 R X8 0000000000000027 +20897 clk cpu0 IT (20861) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20897 clk cpu0 MW1 0370053e:000000f0053e_NS 27 +20898 clk cpu0 IT (20862) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20899 clk cpu0 IT (20863) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20899 clk cpu0 MR1 0370053e:000000f0053e_NS 27 +20899 clk cpu0 R X8 0000000000000027 +20900 clk cpu0 IT (20864) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20900 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20900 clk cpu0 R X9 0000000000000038 +20901 clk cpu0 IT (20865) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20901 clk cpu0 R cpsr 820003c5 +20902 clk cpu0 IT (20866) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20902 clk cpu0 R X8 0000000000000001 +20903 clk cpu0 IT (20867) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20904 clk cpu0 IT (20868) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20904 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20904 clk cpu0 R X8 0000000003700730 +20905 clk cpu0 IT (20869) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20905 clk cpu0 MR1 0370053e:000000f0053e_NS 27 +20905 clk cpu0 R X9 0000000000000027 +20906 clk cpu0 IT (20870) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20906 clk cpu0 R X10 0000000000000027 +20907 clk cpu0 IT (20871) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20907 clk cpu0 R X10 0000000000000027 +20908 clk cpu0 IT (20872) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20908 clk cpu0 R X8 0000000003700757 +20909 clk cpu0 IT (20873) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20909 clk cpu0 MR1 03700757:000000f00757_NS 00 +20909 clk cpu0 R X9 0000000000000000 +20910 clk cpu0 IT (20874) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20910 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20910 clk cpu0 R X8 0000000003700600 +20911 clk cpu0 IT (20875) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20911 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000057 +20911 clk cpu0 R X8 0000000023000057 +20912 clk cpu0 IT (20876) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20912 clk cpu0 MW1 23000057:000016240057_NS 00 +20913 clk cpu0 IT (20877) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20913 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20913 clk cpu0 R X8 0000000003700600 +20914 clk cpu0 IT (20878) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20914 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000057 +20914 clk cpu0 R X10 0000000023000057 +20915 clk cpu0 IT (20879) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20915 clk cpu0 R X11 0000000000000001 +20916 clk cpu0 IT (20880) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20916 clk cpu0 R X10 0000000023000058 +20917 clk cpu0 IT (20881) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20917 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000058 +20918 clk cpu0 IT (20882) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20918 clk cpu0 MR1 0370053e:000000f0053e_NS 27 +20918 clk cpu0 R X8 0000000000000027 +20919 clk cpu0 IT (20883) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20919 clk cpu0 R X8 0000000000000028 +20920 clk cpu0 IT (20884) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20920 clk cpu0 MW1 0370053e:000000f0053e_NS 28 +20921 clk cpu0 IT (20885) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20922 clk cpu0 IT (20886) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20922 clk cpu0 MR1 0370053e:000000f0053e_NS 28 +20922 clk cpu0 R X8 0000000000000028 +20923 clk cpu0 IT (20887) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20923 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20923 clk cpu0 R X9 0000000000000038 +20924 clk cpu0 IT (20888) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20924 clk cpu0 R cpsr 820003c5 +20925 clk cpu0 IT (20889) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20925 clk cpu0 R X8 0000000000000001 +20926 clk cpu0 IT (20890) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20927 clk cpu0 IT (20891) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20927 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20927 clk cpu0 R X8 0000000003700730 +20928 clk cpu0 IT (20892) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20928 clk cpu0 MR1 0370053e:000000f0053e_NS 28 +20928 clk cpu0 R X9 0000000000000028 +20929 clk cpu0 IT (20893) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20929 clk cpu0 R X10 0000000000000028 +20930 clk cpu0 IT (20894) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20930 clk cpu0 R X10 0000000000000028 +20931 clk cpu0 IT (20895) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20931 clk cpu0 R X8 0000000003700758 +20932 clk cpu0 IT (20896) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20932 clk cpu0 MR1 03700758:000000f00758_NS 88 +20932 clk cpu0 R X9 0000000000000088 +20933 clk cpu0 IT (20897) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20933 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20933 clk cpu0 R X8 0000000003700600 +20934 clk cpu0 IT (20898) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20934 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000058 +20934 clk cpu0 R X8 0000000023000058 +20935 clk cpu0 IT (20899) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20935 clk cpu0 MW1 23000058:000016240058_NS 88 +20936 clk cpu0 IT (20900) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20936 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20936 clk cpu0 R X8 0000000003700600 +20937 clk cpu0 IT (20901) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20937 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000058 +20937 clk cpu0 R X10 0000000023000058 +20938 clk cpu0 IT (20902) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20938 clk cpu0 R X11 0000000000000001 +20939 clk cpu0 IT (20903) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20939 clk cpu0 R X10 0000000023000059 +20940 clk cpu0 IT (20904) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20940 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000059 +20941 clk cpu0 IT (20905) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20941 clk cpu0 MR1 0370053e:000000f0053e_NS 28 +20941 clk cpu0 R X8 0000000000000028 +20942 clk cpu0 IT (20906) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20942 clk cpu0 R X8 0000000000000029 +20943 clk cpu0 IT (20907) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20943 clk cpu0 MW1 0370053e:000000f0053e_NS 29 +20944 clk cpu0 IT (20908) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20945 clk cpu0 IT (20909) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20945 clk cpu0 MR1 0370053e:000000f0053e_NS 29 +20945 clk cpu0 R X8 0000000000000029 +20946 clk cpu0 IT (20910) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20946 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20946 clk cpu0 R X9 0000000000000038 +20947 clk cpu0 IT (20911) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20947 clk cpu0 R cpsr 820003c5 +20948 clk cpu0 IT (20912) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20948 clk cpu0 R X8 0000000000000001 +20949 clk cpu0 IT (20913) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20950 clk cpu0 IT (20914) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20950 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20950 clk cpu0 R X8 0000000003700730 +20951 clk cpu0 IT (20915) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20951 clk cpu0 MR1 0370053e:000000f0053e_NS 29 +20951 clk cpu0 R X9 0000000000000029 +20952 clk cpu0 IT (20916) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20952 clk cpu0 R X10 0000000000000029 +20953 clk cpu0 IT (20917) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20953 clk cpu0 R X10 0000000000000029 +20954 clk cpu0 IT (20918) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20954 clk cpu0 R X8 0000000003700759 +20955 clk cpu0 IT (20919) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20955 clk cpu0 MR1 03700759:000000f00759_NS 10 +20955 clk cpu0 R X9 0000000000000010 +20956 clk cpu0 IT (20920) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20956 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20956 clk cpu0 R X8 0000000003700600 +20957 clk cpu0 IT (20921) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20957 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000059 +20957 clk cpu0 R X8 0000000023000059 +20958 clk cpu0 IT (20922) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20958 clk cpu0 MW1 23000059:000016240059_NS 10 +20959 clk cpu0 IT (20923) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20959 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20959 clk cpu0 R X8 0000000003700600 +20960 clk cpu0 IT (20924) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20960 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000059 +20960 clk cpu0 R X10 0000000023000059 +20961 clk cpu0 IT (20925) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20961 clk cpu0 R X11 0000000000000001 +20962 clk cpu0 IT (20926) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20962 clk cpu0 R X10 000000002300005A +20963 clk cpu0 IT (20927) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20963 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300005a +20964 clk cpu0 IT (20928) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20964 clk cpu0 MR1 0370053e:000000f0053e_NS 29 +20964 clk cpu0 R X8 0000000000000029 +20965 clk cpu0 IT (20929) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20965 clk cpu0 R X8 000000000000002A +20966 clk cpu0 IT (20930) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20966 clk cpu0 MW1 0370053e:000000f0053e_NS 2a +20967 clk cpu0 IT (20931) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20968 clk cpu0 IT (20932) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20968 clk cpu0 MR1 0370053e:000000f0053e_NS 2a +20968 clk cpu0 R X8 000000000000002A +20969 clk cpu0 IT (20933) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20969 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20969 clk cpu0 R X9 0000000000000038 +20970 clk cpu0 IT (20934) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20970 clk cpu0 R cpsr 820003c5 +20971 clk cpu0 IT (20935) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20971 clk cpu0 R X8 0000000000000001 +20972 clk cpu0 IT (20936) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20973 clk cpu0 IT (20937) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20973 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20973 clk cpu0 R X8 0000000003700730 +20974 clk cpu0 IT (20938) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20974 clk cpu0 MR1 0370053e:000000f0053e_NS 2a +20974 clk cpu0 R X9 000000000000002A +20975 clk cpu0 IT (20939) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20975 clk cpu0 R X10 000000000000002A +20976 clk cpu0 IT (20940) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20976 clk cpu0 R X10 000000000000002A +20977 clk cpu0 IT (20941) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +20977 clk cpu0 R X8 000000000370075A +20978 clk cpu0 IT (20942) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +20978 clk cpu0 MR1 0370075a:000000f0075a_NS 00 +20978 clk cpu0 R X9 0000000000000000 +20979 clk cpu0 IT (20943) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20979 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20979 clk cpu0 R X8 0000000003700600 +20980 clk cpu0 IT (20944) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +20980 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005a +20980 clk cpu0 R X8 000000002300005A +20981 clk cpu0 IT (20945) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +20981 clk cpu0 MW1 2300005a:00001624005a_NS 00 +20982 clk cpu0 IT (20946) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +20982 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +20982 clk cpu0 R X8 0000000003700600 +20983 clk cpu0 IT (20947) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +20983 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005a +20983 clk cpu0 R X10 000000002300005A +20984 clk cpu0 IT (20948) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +20984 clk cpu0 R X11 0000000000000001 +20985 clk cpu0 IT (20949) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +20985 clk cpu0 R X10 000000002300005B +20986 clk cpu0 IT (20950) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +20986 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300005b +20987 clk cpu0 IT (20951) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20987 clk cpu0 MR1 0370053e:000000f0053e_NS 2a +20987 clk cpu0 R X8 000000000000002A +20988 clk cpu0 IT (20952) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +20988 clk cpu0 R X8 000000000000002B +20989 clk cpu0 IT (20953) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +20989 clk cpu0 MW1 0370053e:000000f0053e_NS 2b +20990 clk cpu0 IT (20954) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +20991 clk cpu0 IT (20955) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +20991 clk cpu0 MR1 0370053e:000000f0053e_NS 2b +20991 clk cpu0 R X8 000000000000002B +20992 clk cpu0 IT (20956) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +20992 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +20992 clk cpu0 R X9 0000000000000038 +20993 clk cpu0 IT (20957) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +20993 clk cpu0 R cpsr 820003c5 +20994 clk cpu0 IT (20958) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +20994 clk cpu0 R X8 0000000000000001 +20995 clk cpu0 IT (20959) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +20996 clk cpu0 IT (20960) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +20996 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +20996 clk cpu0 R X8 0000000003700730 +20997 clk cpu0 IT (20961) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +20997 clk cpu0 MR1 0370053e:000000f0053e_NS 2b +20997 clk cpu0 R X9 000000000000002B +20998 clk cpu0 IT (20962) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +20998 clk cpu0 R X10 000000000000002B +20999 clk cpu0 IT (20963) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +20999 clk cpu0 R X10 000000000000002B +21000 clk cpu0 IT (20964) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21000 clk cpu0 R X8 000000000370075B +21001 clk cpu0 IT (20965) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21001 clk cpu0 MR1 0370075b:000000f0075b_NS c0 +21001 clk cpu0 R X9 00000000000000C0 +21002 clk cpu0 IT (20966) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21002 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21002 clk cpu0 R X8 0000000003700600 +21003 clk cpu0 IT (20967) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21003 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005b +21003 clk cpu0 R X8 000000002300005B +21004 clk cpu0 IT (20968) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21004 clk cpu0 MW1 2300005b:00001624005b_NS c0 +21005 clk cpu0 IT (20969) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21005 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21005 clk cpu0 R X8 0000000003700600 +21006 clk cpu0 IT (20970) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21006 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005b +21006 clk cpu0 R X10 000000002300005B +21007 clk cpu0 IT (20971) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21007 clk cpu0 R X11 0000000000000001 +21008 clk cpu0 IT (20972) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21008 clk cpu0 R X10 000000002300005C +21009 clk cpu0 IT (20973) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21009 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300005c +21010 clk cpu0 IT (20974) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21010 clk cpu0 MR1 0370053e:000000f0053e_NS 2b +21010 clk cpu0 R X8 000000000000002B +21011 clk cpu0 IT (20975) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21011 clk cpu0 R X8 000000000000002C +21012 clk cpu0 IT (20976) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21012 clk cpu0 MW1 0370053e:000000f0053e_NS 2c +21013 clk cpu0 IT (20977) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21014 clk cpu0 IT (20978) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21014 clk cpu0 MR1 0370053e:000000f0053e_NS 2c +21014 clk cpu0 R X8 000000000000002C +21015 clk cpu0 IT (20979) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21015 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21015 clk cpu0 R X9 0000000000000038 +21016 clk cpu0 IT (20980) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21016 clk cpu0 R cpsr 820003c5 +21017 clk cpu0 IT (20981) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21017 clk cpu0 R X8 0000000000000001 +21018 clk cpu0 IT (20982) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21019 clk cpu0 IT (20983) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21019 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21019 clk cpu0 R X8 0000000003700730 +21020 clk cpu0 IT (20984) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21020 clk cpu0 MR1 0370053e:000000f0053e_NS 2c +21020 clk cpu0 R X9 000000000000002C +21021 clk cpu0 IT (20985) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21021 clk cpu0 R X10 000000000000002C +21022 clk cpu0 IT (20986) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21022 clk cpu0 R X10 000000000000002C +21023 clk cpu0 IT (20987) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21023 clk cpu0 R X8 000000000370075C +21024 clk cpu0 IT (20988) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21024 clk cpu0 MR1 0370075c:000000f0075c_NS 00 +21024 clk cpu0 R X9 0000000000000000 +21025 clk cpu0 IT (20989) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21025 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21025 clk cpu0 R X8 0000000003700600 +21026 clk cpu0 IT (20990) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21026 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005c +21026 clk cpu0 R X8 000000002300005C +21027 clk cpu0 IT (20991) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21027 clk cpu0 MW1 2300005c:00001624005c_NS 00 +21028 clk cpu0 IT (20992) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21028 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21028 clk cpu0 R X8 0000000003700600 +21029 clk cpu0 IT (20993) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21029 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005c +21029 clk cpu0 R X10 000000002300005C +21030 clk cpu0 IT (20994) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21030 clk cpu0 R X11 0000000000000001 +21031 clk cpu0 IT (20995) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21031 clk cpu0 R X10 000000002300005D +21032 clk cpu0 IT (20996) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21032 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300005d +21033 clk cpu0 IT (20997) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21033 clk cpu0 MR1 0370053e:000000f0053e_NS 2c +21033 clk cpu0 R X8 000000000000002C +21034 clk cpu0 IT (20998) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21034 clk cpu0 R X8 000000000000002D +21035 clk cpu0 IT (20999) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21035 clk cpu0 MW1 0370053e:000000f0053e_NS 2d +21036 clk cpu0 IT (21000) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21037 clk cpu0 IT (21001) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21037 clk cpu0 MR1 0370053e:000000f0053e_NS 2d +21037 clk cpu0 R X8 000000000000002D +21038 clk cpu0 IT (21002) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21038 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21038 clk cpu0 R X9 0000000000000038 +21039 clk cpu0 IT (21003) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21039 clk cpu0 R cpsr 820003c5 +21040 clk cpu0 IT (21004) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21040 clk cpu0 R X8 0000000000000001 +21041 clk cpu0 IT (21005) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21042 clk cpu0 IT (21006) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21042 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21042 clk cpu0 R X8 0000000003700730 +21043 clk cpu0 IT (21007) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21043 clk cpu0 MR1 0370053e:000000f0053e_NS 2d +21043 clk cpu0 R X9 000000000000002D +21044 clk cpu0 IT (21008) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21044 clk cpu0 R X10 000000000000002D +21045 clk cpu0 IT (21009) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21045 clk cpu0 R X10 000000000000002D +21046 clk cpu0 IT (21010) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21046 clk cpu0 R X8 000000000370075D +21047 clk cpu0 IT (21011) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21047 clk cpu0 MR1 0370075d:000000f0075d_NS 00 +21047 clk cpu0 R X9 0000000000000000 +21048 clk cpu0 IT (21012) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21048 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21048 clk cpu0 R X8 0000000003700600 +21049 clk cpu0 IT (21013) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21049 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005d +21049 clk cpu0 R X8 000000002300005D +21050 clk cpu0 IT (21014) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21050 clk cpu0 MW1 2300005d:00001624005d_NS 00 +21051 clk cpu0 IT (21015) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21051 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21051 clk cpu0 R X8 0000000003700600 +21052 clk cpu0 IT (21016) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21052 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005d +21052 clk cpu0 R X10 000000002300005D +21053 clk cpu0 IT (21017) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21053 clk cpu0 R X11 0000000000000001 +21054 clk cpu0 IT (21018) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21054 clk cpu0 R X10 000000002300005E +21055 clk cpu0 IT (21019) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21055 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300005e +21056 clk cpu0 IT (21020) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21056 clk cpu0 MR1 0370053e:000000f0053e_NS 2d +21056 clk cpu0 R X8 000000000000002D +21057 clk cpu0 IT (21021) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21057 clk cpu0 R X8 000000000000002E +21058 clk cpu0 IT (21022) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21058 clk cpu0 MW1 0370053e:000000f0053e_NS 2e +21059 clk cpu0 IT (21023) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21060 clk cpu0 IT (21024) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21060 clk cpu0 MR1 0370053e:000000f0053e_NS 2e +21060 clk cpu0 R X8 000000000000002E +21061 clk cpu0 IT (21025) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21061 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21061 clk cpu0 R X9 0000000000000038 +21062 clk cpu0 IT (21026) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21062 clk cpu0 R cpsr 820003c5 +21063 clk cpu0 IT (21027) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21063 clk cpu0 R X8 0000000000000001 +21064 clk cpu0 IT (21028) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21065 clk cpu0 IT (21029) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21065 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21065 clk cpu0 R X8 0000000003700730 +21066 clk cpu0 IT (21030) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21066 clk cpu0 MR1 0370053e:000000f0053e_NS 2e +21066 clk cpu0 R X9 000000000000002E +21067 clk cpu0 IT (21031) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21067 clk cpu0 R X10 000000000000002E +21068 clk cpu0 IT (21032) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21068 clk cpu0 R X10 000000000000002E +21069 clk cpu0 IT (21033) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21069 clk cpu0 R X8 000000000370075E +21070 clk cpu0 IT (21034) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21070 clk cpu0 MR1 0370075e:000000f0075e_NS 00 +21070 clk cpu0 R X9 0000000000000000 +21071 clk cpu0 IT (21035) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21071 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21071 clk cpu0 R X8 0000000003700600 +21072 clk cpu0 IT (21036) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21072 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005e +21072 clk cpu0 R X8 000000002300005E +21073 clk cpu0 IT (21037) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21073 clk cpu0 MW1 2300005e:00001624005e_NS 00 +21074 clk cpu0 IT (21038) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21074 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21074 clk cpu0 R X8 0000000003700600 +21075 clk cpu0 IT (21039) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21075 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005e +21075 clk cpu0 R X10 000000002300005E +21076 clk cpu0 IT (21040) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21076 clk cpu0 R X11 0000000000000001 +21077 clk cpu0 IT (21041) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21077 clk cpu0 R X10 000000002300005F +21078 clk cpu0 IT (21042) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21078 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300005f +21079 clk cpu0 IT (21043) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21079 clk cpu0 MR1 0370053e:000000f0053e_NS 2e +21079 clk cpu0 R X8 000000000000002E +21080 clk cpu0 IT (21044) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21080 clk cpu0 R X8 000000000000002F +21081 clk cpu0 IT (21045) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21081 clk cpu0 MW1 0370053e:000000f0053e_NS 2f +21082 clk cpu0 IT (21046) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21083 clk cpu0 IT (21047) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21083 clk cpu0 MR1 0370053e:000000f0053e_NS 2f +21083 clk cpu0 R X8 000000000000002F +21084 clk cpu0 IT (21048) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21084 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21084 clk cpu0 R X9 0000000000000038 +21085 clk cpu0 IT (21049) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21085 clk cpu0 R cpsr 820003c5 +21086 clk cpu0 IT (21050) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21086 clk cpu0 R X8 0000000000000001 +21087 clk cpu0 IT (21051) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21088 clk cpu0 IT (21052) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21088 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21088 clk cpu0 R X8 0000000003700730 +21089 clk cpu0 IT (21053) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21089 clk cpu0 MR1 0370053e:000000f0053e_NS 2f +21089 clk cpu0 R X9 000000000000002F +21090 clk cpu0 IT (21054) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21090 clk cpu0 R X10 000000000000002F +21091 clk cpu0 IT (21055) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21091 clk cpu0 R X10 000000000000002F +21092 clk cpu0 IT (21056) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21092 clk cpu0 R X8 000000000370075F +21093 clk cpu0 IT (21057) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21093 clk cpu0 MR1 0370075f:000000f0075f_NS 00 +21093 clk cpu0 R X9 0000000000000000 +21094 clk cpu0 IT (21058) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21094 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21094 clk cpu0 R X8 0000000003700600 +21095 clk cpu0 IT (21059) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21095 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005f +21095 clk cpu0 R X8 000000002300005F +21096 clk cpu0 IT (21060) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21096 clk cpu0 MW1 2300005f:00001624005f_NS 00 +21097 clk cpu0 IT (21061) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21097 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21097 clk cpu0 R X8 0000000003700600 +21098 clk cpu0 IT (21062) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21098 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300005f +21098 clk cpu0 R X10 000000002300005F +21099 clk cpu0 IT (21063) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21099 clk cpu0 R X11 0000000000000001 +21100 clk cpu0 IT (21064) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21100 clk cpu0 R X10 0000000023000060 +21101 clk cpu0 IT (21065) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21101 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000060 +21102 clk cpu0 IT (21066) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21102 clk cpu0 MR1 0370053e:000000f0053e_NS 2f +21102 clk cpu0 R X8 000000000000002F +21103 clk cpu0 IT (21067) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21103 clk cpu0 R X8 0000000000000030 +21104 clk cpu0 IT (21068) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21104 clk cpu0 MW1 0370053e:000000f0053e_NS 30 +21105 clk cpu0 IT (21069) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21106 clk cpu0 IT (21070) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21106 clk cpu0 MR1 0370053e:000000f0053e_NS 30 +21106 clk cpu0 R X8 0000000000000030 +21107 clk cpu0 IT (21071) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21107 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21107 clk cpu0 R X9 0000000000000038 +21108 clk cpu0 IT (21072) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21108 clk cpu0 R cpsr 820003c5 +21109 clk cpu0 IT (21073) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21109 clk cpu0 R X8 0000000000000001 +21110 clk cpu0 IT (21074) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21111 clk cpu0 IT (21075) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21111 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21111 clk cpu0 R X8 0000000003700730 +21112 clk cpu0 IT (21076) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21112 clk cpu0 MR1 0370053e:000000f0053e_NS 30 +21112 clk cpu0 R X9 0000000000000030 +21113 clk cpu0 IT (21077) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21113 clk cpu0 R X10 0000000000000030 +21114 clk cpu0 IT (21078) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21114 clk cpu0 R X10 0000000000000030 +21115 clk cpu0 IT (21079) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21115 clk cpu0 R X8 0000000003700760 +21116 clk cpu0 IT (21080) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21116 clk cpu0 MR1 03700760:000000f00760_NS 00 +21116 clk cpu0 R X9 0000000000000000 +21117 clk cpu0 IT (21081) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21117 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21117 clk cpu0 R X8 0000000003700600 +21118 clk cpu0 IT (21082) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21118 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000060 +21118 clk cpu0 R X8 0000000023000060 +21119 clk cpu0 IT (21083) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21119 clk cpu0 MW1 23000060:000016240060_NS 00 +21120 clk cpu0 IT (21084) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21120 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21120 clk cpu0 R X8 0000000003700600 +21121 clk cpu0 IT (21085) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21121 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000060 +21121 clk cpu0 R X10 0000000023000060 +21122 clk cpu0 IT (21086) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21122 clk cpu0 R X11 0000000000000001 +21123 clk cpu0 IT (21087) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21123 clk cpu0 R X10 0000000023000061 +21124 clk cpu0 IT (21088) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21124 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000061 +21125 clk cpu0 IT (21089) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21125 clk cpu0 MR1 0370053e:000000f0053e_NS 30 +21125 clk cpu0 R X8 0000000000000030 +21126 clk cpu0 IT (21090) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21126 clk cpu0 R X8 0000000000000031 +21127 clk cpu0 IT (21091) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21127 clk cpu0 MW1 0370053e:000000f0053e_NS 31 +21128 clk cpu0 IT (21092) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21129 clk cpu0 IT (21093) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21129 clk cpu0 MR1 0370053e:000000f0053e_NS 31 +21129 clk cpu0 R X8 0000000000000031 +21130 clk cpu0 IT (21094) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21130 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21130 clk cpu0 R X9 0000000000000038 +21131 clk cpu0 IT (21095) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21131 clk cpu0 R cpsr 820003c5 +21132 clk cpu0 IT (21096) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21132 clk cpu0 R X8 0000000000000001 +21133 clk cpu0 IT (21097) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21134 clk cpu0 IT (21098) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21134 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21134 clk cpu0 R X8 0000000003700730 +21135 clk cpu0 IT (21099) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21135 clk cpu0 MR1 0370053e:000000f0053e_NS 31 +21135 clk cpu0 R X9 0000000000000031 +21136 clk cpu0 IT (21100) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21136 clk cpu0 R X10 0000000000000031 +21137 clk cpu0 IT (21101) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21137 clk cpu0 R X10 0000000000000031 +21138 clk cpu0 IT (21102) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21138 clk cpu0 R X8 0000000003700761 +21139 clk cpu0 IT (21103) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21139 clk cpu0 MR1 03700761:000000f00761_NS 00 +21139 clk cpu0 R X9 0000000000000000 +21140 clk cpu0 IT (21104) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21140 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21140 clk cpu0 R X8 0000000003700600 +21141 clk cpu0 IT (21105) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21141 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000061 +21141 clk cpu0 R X8 0000000023000061 +21142 clk cpu0 IT (21106) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21142 clk cpu0 MW1 23000061:000016240061_NS 00 +21143 clk cpu0 IT (21107) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21143 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21143 clk cpu0 R X8 0000000003700600 +21144 clk cpu0 IT (21108) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21144 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000061 +21144 clk cpu0 R X10 0000000023000061 +21145 clk cpu0 IT (21109) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21145 clk cpu0 R X11 0000000000000001 +21146 clk cpu0 IT (21110) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21146 clk cpu0 R X10 0000000023000062 +21147 clk cpu0 IT (21111) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21147 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000062 +21148 clk cpu0 IT (21112) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21148 clk cpu0 MR1 0370053e:000000f0053e_NS 31 +21148 clk cpu0 R X8 0000000000000031 +21149 clk cpu0 IT (21113) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21149 clk cpu0 R X8 0000000000000032 +21150 clk cpu0 IT (21114) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21150 clk cpu0 MW1 0370053e:000000f0053e_NS 32 +21151 clk cpu0 IT (21115) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21152 clk cpu0 IT (21116) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21152 clk cpu0 MR1 0370053e:000000f0053e_NS 32 +21152 clk cpu0 R X8 0000000000000032 +21153 clk cpu0 IT (21117) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21153 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21153 clk cpu0 R X9 0000000000000038 +21154 clk cpu0 IT (21118) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21154 clk cpu0 R cpsr 820003c5 +21155 clk cpu0 IT (21119) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21155 clk cpu0 R X8 0000000000000001 +21156 clk cpu0 IT (21120) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21157 clk cpu0 IT (21121) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21157 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21157 clk cpu0 R X8 0000000003700730 +21158 clk cpu0 IT (21122) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21158 clk cpu0 MR1 0370053e:000000f0053e_NS 32 +21158 clk cpu0 R X9 0000000000000032 +21159 clk cpu0 IT (21123) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21159 clk cpu0 R X10 0000000000000032 +21160 clk cpu0 IT (21124) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21160 clk cpu0 R X10 0000000000000032 +21161 clk cpu0 IT (21125) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21161 clk cpu0 R X8 0000000003700762 +21162 clk cpu0 IT (21126) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21162 clk cpu0 MR1 03700762:000000f00762_NS 00 +21162 clk cpu0 R X9 0000000000000000 +21163 clk cpu0 IT (21127) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21163 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21163 clk cpu0 R X8 0000000003700600 +21164 clk cpu0 IT (21128) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21164 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000062 +21164 clk cpu0 R X8 0000000023000062 +21165 clk cpu0 IT (21129) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21165 clk cpu0 MW1 23000062:000016240062_NS 00 +21166 clk cpu0 IT (21130) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21166 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21166 clk cpu0 R X8 0000000003700600 +21167 clk cpu0 IT (21131) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21167 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000062 +21167 clk cpu0 R X10 0000000023000062 +21168 clk cpu0 IT (21132) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21168 clk cpu0 R X11 0000000000000001 +21169 clk cpu0 IT (21133) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21169 clk cpu0 R X10 0000000023000063 +21170 clk cpu0 IT (21134) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21170 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000063 +21171 clk cpu0 IT (21135) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21171 clk cpu0 MR1 0370053e:000000f0053e_NS 32 +21171 clk cpu0 R X8 0000000000000032 +21172 clk cpu0 IT (21136) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21172 clk cpu0 R X8 0000000000000033 +21173 clk cpu0 IT (21137) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21173 clk cpu0 MW1 0370053e:000000f0053e_NS 33 +21174 clk cpu0 IT (21138) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21175 clk cpu0 IT (21139) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21175 clk cpu0 MR1 0370053e:000000f0053e_NS 33 +21175 clk cpu0 R X8 0000000000000033 +21176 clk cpu0 IT (21140) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21176 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21176 clk cpu0 R X9 0000000000000038 +21177 clk cpu0 IT (21141) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21177 clk cpu0 R cpsr 820003c5 +21178 clk cpu0 IT (21142) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21178 clk cpu0 R X8 0000000000000001 +21179 clk cpu0 IT (21143) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21180 clk cpu0 IT (21144) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21180 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21180 clk cpu0 R X8 0000000003700730 +21181 clk cpu0 IT (21145) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21181 clk cpu0 MR1 0370053e:000000f0053e_NS 33 +21181 clk cpu0 R X9 0000000000000033 +21182 clk cpu0 IT (21146) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21182 clk cpu0 R X10 0000000000000033 +21183 clk cpu0 IT (21147) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21183 clk cpu0 R X10 0000000000000033 +21184 clk cpu0 IT (21148) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21184 clk cpu0 R X8 0000000003700763 +21185 clk cpu0 IT (21149) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21185 clk cpu0 MR1 03700763:000000f00763_NS 00 +21185 clk cpu0 R X9 0000000000000000 +21186 clk cpu0 IT (21150) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21186 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21186 clk cpu0 R X8 0000000003700600 +21187 clk cpu0 IT (21151) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21187 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000063 +21187 clk cpu0 R X8 0000000023000063 +21188 clk cpu0 IT (21152) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21188 clk cpu0 MW1 23000063:000016240063_NS 00 +21189 clk cpu0 IT (21153) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21189 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21189 clk cpu0 R X8 0000000003700600 +21190 clk cpu0 IT (21154) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21190 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000063 +21190 clk cpu0 R X10 0000000023000063 +21191 clk cpu0 IT (21155) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21191 clk cpu0 R X11 0000000000000001 +21192 clk cpu0 IT (21156) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21192 clk cpu0 R X10 0000000023000064 +21193 clk cpu0 IT (21157) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21193 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000064 +21194 clk cpu0 IT (21158) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21194 clk cpu0 MR1 0370053e:000000f0053e_NS 33 +21194 clk cpu0 R X8 0000000000000033 +21195 clk cpu0 IT (21159) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21195 clk cpu0 R X8 0000000000000034 +21196 clk cpu0 IT (21160) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21196 clk cpu0 MW1 0370053e:000000f0053e_NS 34 +21197 clk cpu0 IT (21161) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21198 clk cpu0 IT (21162) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21198 clk cpu0 MR1 0370053e:000000f0053e_NS 34 +21198 clk cpu0 R X8 0000000000000034 +21199 clk cpu0 IT (21163) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21199 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21199 clk cpu0 R X9 0000000000000038 +21200 clk cpu0 IT (21164) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21200 clk cpu0 R cpsr 820003c5 +21201 clk cpu0 IT (21165) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21201 clk cpu0 R X8 0000000000000001 +21202 clk cpu0 IT (21166) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21203 clk cpu0 IT (21167) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21203 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21203 clk cpu0 R X8 0000000003700730 +21204 clk cpu0 IT (21168) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21204 clk cpu0 MR1 0370053e:000000f0053e_NS 34 +21204 clk cpu0 R X9 0000000000000034 +21205 clk cpu0 IT (21169) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21205 clk cpu0 R X10 0000000000000034 +21206 clk cpu0 IT (21170) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21206 clk cpu0 R X10 0000000000000034 +21207 clk cpu0 IT (21171) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21207 clk cpu0 R X8 0000000003700764 +21208 clk cpu0 IT (21172) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21208 clk cpu0 MR1 03700764:000000f00764_NS 00 +21208 clk cpu0 R X9 0000000000000000 +21209 clk cpu0 IT (21173) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21209 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21209 clk cpu0 R X8 0000000003700600 +21210 clk cpu0 IT (21174) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21210 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000064 +21210 clk cpu0 R X8 0000000023000064 +21211 clk cpu0 IT (21175) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21211 clk cpu0 MW1 23000064:000016240064_NS 00 +21212 clk cpu0 IT (21176) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21212 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21212 clk cpu0 R X8 0000000003700600 +21213 clk cpu0 IT (21177) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21213 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000064 +21213 clk cpu0 R X10 0000000023000064 +21214 clk cpu0 IT (21178) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21214 clk cpu0 R X11 0000000000000001 +21215 clk cpu0 IT (21179) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21215 clk cpu0 R X10 0000000023000065 +21216 clk cpu0 IT (21180) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21216 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000065 +21217 clk cpu0 IT (21181) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21217 clk cpu0 MR1 0370053e:000000f0053e_NS 34 +21217 clk cpu0 R X8 0000000000000034 +21218 clk cpu0 IT (21182) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21218 clk cpu0 R X8 0000000000000035 +21219 clk cpu0 IT (21183) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21219 clk cpu0 MW1 0370053e:000000f0053e_NS 35 +21220 clk cpu0 IT (21184) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21221 clk cpu0 IT (21185) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21221 clk cpu0 MR1 0370053e:000000f0053e_NS 35 +21221 clk cpu0 R X8 0000000000000035 +21222 clk cpu0 IT (21186) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21222 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21222 clk cpu0 R X9 0000000000000038 +21223 clk cpu0 IT (21187) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21223 clk cpu0 R cpsr 820003c5 +21224 clk cpu0 IT (21188) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21224 clk cpu0 R X8 0000000000000001 +21225 clk cpu0 IT (21189) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21226 clk cpu0 IT (21190) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21226 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21226 clk cpu0 R X8 0000000003700730 +21227 clk cpu0 IT (21191) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21227 clk cpu0 MR1 0370053e:000000f0053e_NS 35 +21227 clk cpu0 R X9 0000000000000035 +21228 clk cpu0 IT (21192) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21228 clk cpu0 R X10 0000000000000035 +21229 clk cpu0 IT (21193) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21229 clk cpu0 R X10 0000000000000035 +21230 clk cpu0 IT (21194) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21230 clk cpu0 R X8 0000000003700765 +21231 clk cpu0 IT (21195) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21231 clk cpu0 MR1 03700765:000000f00765_NS 00 +21231 clk cpu0 R X9 0000000000000000 +21232 clk cpu0 IT (21196) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21232 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21232 clk cpu0 R X8 0000000003700600 +21233 clk cpu0 IT (21197) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21233 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000065 +21233 clk cpu0 R X8 0000000023000065 +21234 clk cpu0 IT (21198) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21234 clk cpu0 MW1 23000065:000016240065_NS 00 +21235 clk cpu0 IT (21199) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21235 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21235 clk cpu0 R X8 0000000003700600 +21236 clk cpu0 IT (21200) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21236 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000065 +21236 clk cpu0 R X10 0000000023000065 +21237 clk cpu0 IT (21201) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21237 clk cpu0 R X11 0000000000000001 +21238 clk cpu0 IT (21202) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21238 clk cpu0 R X10 0000000023000066 +21239 clk cpu0 IT (21203) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21239 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000066 +21240 clk cpu0 IT (21204) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21240 clk cpu0 MR1 0370053e:000000f0053e_NS 35 +21240 clk cpu0 R X8 0000000000000035 +21241 clk cpu0 IT (21205) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21241 clk cpu0 R X8 0000000000000036 +21242 clk cpu0 IT (21206) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21242 clk cpu0 MW1 0370053e:000000f0053e_NS 36 +21243 clk cpu0 IT (21207) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21244 clk cpu0 IT (21208) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21244 clk cpu0 MR1 0370053e:000000f0053e_NS 36 +21244 clk cpu0 R X8 0000000000000036 +21245 clk cpu0 IT (21209) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21245 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21245 clk cpu0 R X9 0000000000000038 +21246 clk cpu0 IT (21210) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21246 clk cpu0 R cpsr 820003c5 +21247 clk cpu0 IT (21211) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21247 clk cpu0 R X8 0000000000000001 +21248 clk cpu0 IT (21212) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21249 clk cpu0 IT (21213) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21249 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21249 clk cpu0 R X8 0000000003700730 +21250 clk cpu0 IT (21214) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21250 clk cpu0 MR1 0370053e:000000f0053e_NS 36 +21250 clk cpu0 R X9 0000000000000036 +21251 clk cpu0 IT (21215) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21251 clk cpu0 R X10 0000000000000036 +21252 clk cpu0 IT (21216) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21252 clk cpu0 R X10 0000000000000036 +21253 clk cpu0 IT (21217) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21253 clk cpu0 R X8 0000000003700766 +21254 clk cpu0 IT (21218) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21254 clk cpu0 MR1 03700766:000000f00766_NS 00 +21254 clk cpu0 R X9 0000000000000000 +21255 clk cpu0 IT (21219) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21255 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21255 clk cpu0 R X8 0000000003700600 +21256 clk cpu0 IT (21220) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21256 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000066 +21256 clk cpu0 R X8 0000000023000066 +21257 clk cpu0 IT (21221) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21257 clk cpu0 MW1 23000066:000016240066_NS 00 +21258 clk cpu0 IT (21222) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21258 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21258 clk cpu0 R X8 0000000003700600 +21259 clk cpu0 IT (21223) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21259 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000066 +21259 clk cpu0 R X10 0000000023000066 +21260 clk cpu0 IT (21224) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21260 clk cpu0 R X11 0000000000000001 +21261 clk cpu0 IT (21225) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21261 clk cpu0 R X10 0000000023000067 +21262 clk cpu0 IT (21226) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21262 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000067 +21263 clk cpu0 IT (21227) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21263 clk cpu0 MR1 0370053e:000000f0053e_NS 36 +21263 clk cpu0 R X8 0000000000000036 +21264 clk cpu0 IT (21228) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21264 clk cpu0 R X8 0000000000000037 +21265 clk cpu0 IT (21229) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21265 clk cpu0 MW1 0370053e:000000f0053e_NS 37 +21266 clk cpu0 IT (21230) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21267 clk cpu0 IT (21231) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21267 clk cpu0 MR1 0370053e:000000f0053e_NS 37 +21267 clk cpu0 R X8 0000000000000037 +21268 clk cpu0 IT (21232) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21268 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21268 clk cpu0 R X9 0000000000000038 +21269 clk cpu0 IT (21233) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21269 clk cpu0 R cpsr 820003c5 +21270 clk cpu0 IT (21234) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21270 clk cpu0 R X8 0000000000000001 +21271 clk cpu0 IT (21235) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21272 clk cpu0 IT (21236) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21272 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700730 +21272 clk cpu0 R X8 0000000003700730 +21273 clk cpu0 IT (21237) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21273 clk cpu0 MR1 0370053e:000000f0053e_NS 37 +21273 clk cpu0 R X9 0000000000000037 +21274 clk cpu0 IT (21238) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21274 clk cpu0 R X10 0000000000000037 +21275 clk cpu0 IT (21239) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21275 clk cpu0 R X10 0000000000000037 +21276 clk cpu0 IT (21240) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21276 clk cpu0 R X8 0000000003700767 +21277 clk cpu0 IT (21241) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21277 clk cpu0 MR1 03700767:000000f00767_NS 00 +21277 clk cpu0 R X9 0000000000000000 +21278 clk cpu0 IT (21242) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21278 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21278 clk cpu0 R X8 0000000003700600 +21279 clk cpu0 IT (21243) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21279 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000067 +21279 clk cpu0 R X8 0000000023000067 +21280 clk cpu0 IT (21244) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21280 clk cpu0 MW1 23000067:000016240067_NS 00 +21281 clk cpu0 IT (21245) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21281 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21281 clk cpu0 R X8 0000000003700600 +21282 clk cpu0 IT (21246) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21282 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000067 +21282 clk cpu0 R X10 0000000023000067 +21283 clk cpu0 IT (21247) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21283 clk cpu0 R X11 0000000000000001 +21284 clk cpu0 IT (21248) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21284 clk cpu0 R X10 0000000023000068 +21285 clk cpu0 IT (21249) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21285 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000068 +21286 clk cpu0 IT (21250) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21286 clk cpu0 MR1 0370053e:000000f0053e_NS 37 +21286 clk cpu0 R X8 0000000000000037 +21287 clk cpu0 IT (21251) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21287 clk cpu0 R X8 0000000000000038 +21288 clk cpu0 IT (21252) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21288 clk cpu0 MW1 0370053e:000000f0053e_NS 38 +21289 clk cpu0 IT (21253) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21290 clk cpu0 IT (21254) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21290 clk cpu0 MR1 0370053e:000000f0053e_NS 38 +21290 clk cpu0 R X8 0000000000000038 +21291 clk cpu0 IT (21255) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21291 clk cpu0 MR1 0370053f:000000f0053f_NS 38 +21291 clk cpu0 R X9 0000000000000038 +21292 clk cpu0 IT (21256) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21292 clk cpu0 R cpsr 620003c5 +21293 clk cpu0 IT (21257) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21293 clk cpu0 R X8 0000000000000000 +21294 clk cpu0 IS (21258) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21295 clk cpu0 IT (21259) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +21296 clk cpu0 IT (21260) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +21296 clk cpu0 R SP_EL1 0000000003700550 +21297 clk cpu0 IT (21261) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +21298 clk cpu0 IT (21262) 00011b2c:000010011b2c_NS 52800008 O EL1h_n : MOV w8,#0 +21298 clk cpu0 R X8 0000000000000000 +21299 clk cpu0 IT (21263) 00011b30:000010011b30_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21299 clk cpu0 MW2 037005ce:000000f005ce_NS 0000 +21300 clk cpu0 IT (21264) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21300 clk cpu0 MR2 037005ce:000000f005ce_NS 0000 +21300 clk cpu0 R X8 0000000000000000 +21301 clk cpu0 IT (21265) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21301 clk cpu0 R cpsr 820003c5 +21302 clk cpu0 IT (21266) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21302 clk cpu0 R X8 0000000000000001 +21302 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00db ALLOC 0x000010011b40_NS +21302 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 06d0 ALLOC 0x000010011b40_NS +21303 clk cpu0 IT (21267) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21304 clk cpu0 IT (21268) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21304 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21304 clk cpu0 R X8 0000000003700700 +21305 clk cpu0 IT (21269) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21305 clk cpu0 R X9 0000000000000010 +21306 clk cpu0 IT (21270) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21306 clk cpu0 R X8 0000000003700710 +21307 clk cpu0 IT (21271) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21307 clk cpu0 R X9 0000000000000058 +21308 clk cpu0 IT (21272) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21308 clk cpu0 R X8 0000000003700768 +21309 clk cpu0 IT (21273) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21309 clk cpu0 MR2 037005ce:000000f005ce_NS 0000 +21309 clk cpu0 R X10 0000000000000000 +21310 clk cpu0 IT (21274) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21310 clk cpu0 R X9 0000000000000000 +21311 clk cpu0 IT (21275) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21311 clk cpu0 R X8 0000000003700768 +21312 clk cpu0 IT (21276) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21312 clk cpu0 R X10 0000000000000000 +21313 clk cpu0 IT (21277) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21313 clk cpu0 MW1 03700768:000000f00768_NS 00 +21314 clk cpu0 IT (21278) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21314 clk cpu0 MR2 037005ce:000000f005ce_NS 0000 +21314 clk cpu0 R X8 0000000000000000 +21315 clk cpu0 IT (21279) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21315 clk cpu0 R X8 0000000000000001 +21316 clk cpu0 IT (21280) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21316 clk cpu0 MW2 037005ce:000000f005ce_NS 0001 +21317 clk cpu0 IT (21281) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21318 clk cpu0 IT (21282) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21318 clk cpu0 MR2 037005ce:000000f005ce_NS 0001 +21318 clk cpu0 R X8 0000000000000001 +21319 clk cpu0 IT (21283) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21319 clk cpu0 R cpsr 820003c5 +21320 clk cpu0 IT (21284) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21320 clk cpu0 R X8 0000000000000001 +21321 clk cpu0 IT (21285) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21322 clk cpu0 IT (21286) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21322 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21322 clk cpu0 R X8 0000000003700700 +21323 clk cpu0 IT (21287) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21323 clk cpu0 R X9 0000000000000010 +21324 clk cpu0 IT (21288) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21324 clk cpu0 R X8 0000000003700710 +21325 clk cpu0 IT (21289) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21325 clk cpu0 R X9 0000000000000058 +21326 clk cpu0 IT (21290) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21326 clk cpu0 R X8 0000000003700768 +21327 clk cpu0 IT (21291) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21327 clk cpu0 MR2 037005ce:000000f005ce_NS 0001 +21327 clk cpu0 R X10 0000000000000001 +21328 clk cpu0 IT (21292) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21328 clk cpu0 R X9 0000000000000001 +21329 clk cpu0 IT (21293) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21329 clk cpu0 R X8 0000000003700769 +21330 clk cpu0 IT (21294) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21330 clk cpu0 R X10 0000000000000000 +21331 clk cpu0 IT (21295) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21331 clk cpu0 MW1 03700769:000000f00769_NS 00 +21332 clk cpu0 IT (21296) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21332 clk cpu0 MR2 037005ce:000000f005ce_NS 0001 +21332 clk cpu0 R X8 0000000000000001 +21333 clk cpu0 IT (21297) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21333 clk cpu0 R X8 0000000000000002 +21334 clk cpu0 IT (21298) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21334 clk cpu0 MW2 037005ce:000000f005ce_NS 0002 +21335 clk cpu0 IT (21299) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21336 clk cpu0 IT (21300) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21336 clk cpu0 MR2 037005ce:000000f005ce_NS 0002 +21336 clk cpu0 R X8 0000000000000002 +21337 clk cpu0 IT (21301) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21337 clk cpu0 R cpsr 820003c5 +21338 clk cpu0 IT (21302) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21338 clk cpu0 R X8 0000000000000001 +21339 clk cpu0 IT (21303) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21340 clk cpu0 IT (21304) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21340 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21340 clk cpu0 R X8 0000000003700700 +21341 clk cpu0 IT (21305) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21341 clk cpu0 R X9 0000000000000010 +21342 clk cpu0 IT (21306) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21342 clk cpu0 R X8 0000000003700710 +21343 clk cpu0 IT (21307) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21343 clk cpu0 R X9 0000000000000058 +21344 clk cpu0 IT (21308) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21344 clk cpu0 R X8 0000000003700768 +21345 clk cpu0 IT (21309) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21345 clk cpu0 MR2 037005ce:000000f005ce_NS 0002 +21345 clk cpu0 R X10 0000000000000002 +21346 clk cpu0 IT (21310) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21346 clk cpu0 R X9 0000000000000002 +21347 clk cpu0 IT (21311) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21347 clk cpu0 R X8 000000000370076A +21348 clk cpu0 IT (21312) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21348 clk cpu0 R X10 0000000000000000 +21349 clk cpu0 IT (21313) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21349 clk cpu0 MW1 0370076a:000000f0076a_NS 00 +21350 clk cpu0 IT (21314) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21350 clk cpu0 MR2 037005ce:000000f005ce_NS 0002 +21350 clk cpu0 R X8 0000000000000002 +21351 clk cpu0 IT (21315) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21351 clk cpu0 R X8 0000000000000003 +21352 clk cpu0 IT (21316) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21352 clk cpu0 MW2 037005ce:000000f005ce_NS 0003 +21353 clk cpu0 IT (21317) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21354 clk cpu0 IT (21318) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21354 clk cpu0 MR2 037005ce:000000f005ce_NS 0003 +21354 clk cpu0 R X8 0000000000000003 +21355 clk cpu0 IT (21319) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21355 clk cpu0 R cpsr 820003c5 +21356 clk cpu0 IT (21320) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21356 clk cpu0 R X8 0000000000000001 +21357 clk cpu0 IT (21321) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21358 clk cpu0 IT (21322) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21358 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21358 clk cpu0 R X8 0000000003700700 +21359 clk cpu0 IT (21323) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21359 clk cpu0 R X9 0000000000000010 +21360 clk cpu0 IT (21324) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21360 clk cpu0 R X8 0000000003700710 +21361 clk cpu0 IT (21325) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21361 clk cpu0 R X9 0000000000000058 +21362 clk cpu0 IT (21326) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21362 clk cpu0 R X8 0000000003700768 +21363 clk cpu0 IT (21327) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21363 clk cpu0 MR2 037005ce:000000f005ce_NS 0003 +21363 clk cpu0 R X10 0000000000000003 +21364 clk cpu0 IT (21328) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21364 clk cpu0 R X9 0000000000000003 +21365 clk cpu0 IT (21329) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21365 clk cpu0 R X8 000000000370076B +21366 clk cpu0 IT (21330) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21366 clk cpu0 R X10 0000000000000000 +21367 clk cpu0 IT (21331) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21367 clk cpu0 MW1 0370076b:000000f0076b_NS 00 +21368 clk cpu0 IT (21332) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21368 clk cpu0 MR2 037005ce:000000f005ce_NS 0003 +21368 clk cpu0 R X8 0000000000000003 +21369 clk cpu0 IT (21333) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21369 clk cpu0 R X8 0000000000000004 +21370 clk cpu0 IT (21334) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21370 clk cpu0 MW2 037005ce:000000f005ce_NS 0004 +21371 clk cpu0 IT (21335) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21372 clk cpu0 IT (21336) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21372 clk cpu0 MR2 037005ce:000000f005ce_NS 0004 +21372 clk cpu0 R X8 0000000000000004 +21373 clk cpu0 IT (21337) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21373 clk cpu0 R cpsr 820003c5 +21374 clk cpu0 IT (21338) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21374 clk cpu0 R X8 0000000000000001 +21375 clk cpu0 IT (21339) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21376 clk cpu0 IT (21340) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21376 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21376 clk cpu0 R X8 0000000003700700 +21377 clk cpu0 IT (21341) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21377 clk cpu0 R X9 0000000000000010 +21378 clk cpu0 IT (21342) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21378 clk cpu0 R X8 0000000003700710 +21379 clk cpu0 IT (21343) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21379 clk cpu0 R X9 0000000000000058 +21380 clk cpu0 IT (21344) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21380 clk cpu0 R X8 0000000003700768 +21381 clk cpu0 IT (21345) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21381 clk cpu0 MR2 037005ce:000000f005ce_NS 0004 +21381 clk cpu0 R X10 0000000000000004 +21382 clk cpu0 IT (21346) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21382 clk cpu0 R X9 0000000000000004 +21383 clk cpu0 IT (21347) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21383 clk cpu0 R X8 000000000370076C +21384 clk cpu0 IT (21348) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21384 clk cpu0 R X10 0000000000000000 +21385 clk cpu0 IT (21349) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21385 clk cpu0 MW1 0370076c:000000f0076c_NS 00 +21386 clk cpu0 IT (21350) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21386 clk cpu0 MR2 037005ce:000000f005ce_NS 0004 +21386 clk cpu0 R X8 0000000000000004 +21387 clk cpu0 IT (21351) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21387 clk cpu0 R X8 0000000000000005 +21388 clk cpu0 IT (21352) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21388 clk cpu0 MW2 037005ce:000000f005ce_NS 0005 +21389 clk cpu0 IT (21353) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21390 clk cpu0 IT (21354) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21390 clk cpu0 MR2 037005ce:000000f005ce_NS 0005 +21390 clk cpu0 R X8 0000000000000005 +21391 clk cpu0 IT (21355) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21391 clk cpu0 R cpsr 820003c5 +21392 clk cpu0 IT (21356) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21392 clk cpu0 R X8 0000000000000001 +21393 clk cpu0 IT (21357) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21394 clk cpu0 IT (21358) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21394 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21394 clk cpu0 R X8 0000000003700700 +21395 clk cpu0 IT (21359) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21395 clk cpu0 R X9 0000000000000010 +21396 clk cpu0 IT (21360) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21396 clk cpu0 R X8 0000000003700710 +21397 clk cpu0 IT (21361) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21397 clk cpu0 R X9 0000000000000058 +21398 clk cpu0 IT (21362) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21398 clk cpu0 R X8 0000000003700768 +21399 clk cpu0 IT (21363) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21399 clk cpu0 MR2 037005ce:000000f005ce_NS 0005 +21399 clk cpu0 R X10 0000000000000005 +21400 clk cpu0 IT (21364) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21400 clk cpu0 R X9 0000000000000005 +21401 clk cpu0 IT (21365) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21401 clk cpu0 R X8 000000000370076D +21402 clk cpu0 IT (21366) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21402 clk cpu0 R X10 0000000000000000 +21403 clk cpu0 IT (21367) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21403 clk cpu0 MW1 0370076d:000000f0076d_NS 00 +21404 clk cpu0 IT (21368) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21404 clk cpu0 MR2 037005ce:000000f005ce_NS 0005 +21404 clk cpu0 R X8 0000000000000005 +21405 clk cpu0 IT (21369) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21405 clk cpu0 R X8 0000000000000006 +21406 clk cpu0 IT (21370) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21406 clk cpu0 MW2 037005ce:000000f005ce_NS 0006 +21407 clk cpu0 IT (21371) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21408 clk cpu0 IT (21372) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21408 clk cpu0 MR2 037005ce:000000f005ce_NS 0006 +21408 clk cpu0 R X8 0000000000000006 +21409 clk cpu0 IT (21373) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21409 clk cpu0 R cpsr 820003c5 +21410 clk cpu0 IT (21374) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21410 clk cpu0 R X8 0000000000000001 +21411 clk cpu0 IT (21375) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21412 clk cpu0 IT (21376) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21412 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21412 clk cpu0 R X8 0000000003700700 +21413 clk cpu0 IT (21377) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21413 clk cpu0 R X9 0000000000000010 +21414 clk cpu0 IT (21378) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21414 clk cpu0 R X8 0000000003700710 +21415 clk cpu0 IT (21379) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21415 clk cpu0 R X9 0000000000000058 +21416 clk cpu0 IT (21380) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21416 clk cpu0 R X8 0000000003700768 +21417 clk cpu0 IT (21381) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21417 clk cpu0 MR2 037005ce:000000f005ce_NS 0006 +21417 clk cpu0 R X10 0000000000000006 +21418 clk cpu0 IT (21382) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21418 clk cpu0 R X9 0000000000000006 +21419 clk cpu0 IT (21383) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21419 clk cpu0 R X8 000000000370076E +21420 clk cpu0 IT (21384) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21420 clk cpu0 R X10 0000000000000000 +21421 clk cpu0 IT (21385) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21421 clk cpu0 MW1 0370076e:000000f0076e_NS 00 +21422 clk cpu0 IT (21386) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21422 clk cpu0 MR2 037005ce:000000f005ce_NS 0006 +21422 clk cpu0 R X8 0000000000000006 +21423 clk cpu0 IT (21387) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21423 clk cpu0 R X8 0000000000000007 +21424 clk cpu0 IT (21388) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21424 clk cpu0 MW2 037005ce:000000f005ce_NS 0007 +21425 clk cpu0 IT (21389) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21426 clk cpu0 IT (21390) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21426 clk cpu0 MR2 037005ce:000000f005ce_NS 0007 +21426 clk cpu0 R X8 0000000000000007 +21427 clk cpu0 IT (21391) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21427 clk cpu0 R cpsr 820003c5 +21428 clk cpu0 IT (21392) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21428 clk cpu0 R X8 0000000000000001 +21429 clk cpu0 IT (21393) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21430 clk cpu0 IT (21394) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21430 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21430 clk cpu0 R X8 0000000003700700 +21431 clk cpu0 IT (21395) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21431 clk cpu0 R X9 0000000000000010 +21432 clk cpu0 IT (21396) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21432 clk cpu0 R X8 0000000003700710 +21433 clk cpu0 IT (21397) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21433 clk cpu0 R X9 0000000000000058 +21434 clk cpu0 IT (21398) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21434 clk cpu0 R X8 0000000003700768 +21435 clk cpu0 IT (21399) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21435 clk cpu0 MR2 037005ce:000000f005ce_NS 0007 +21435 clk cpu0 R X10 0000000000000007 +21436 clk cpu0 IT (21400) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21436 clk cpu0 R X9 0000000000000007 +21437 clk cpu0 IT (21401) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21437 clk cpu0 R X8 000000000370076F +21438 clk cpu0 IT (21402) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21438 clk cpu0 R X10 0000000000000000 +21439 clk cpu0 IT (21403) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21439 clk cpu0 MW1 0370076f:000000f0076f_NS 00 +21440 clk cpu0 IT (21404) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21440 clk cpu0 MR2 037005ce:000000f005ce_NS 0007 +21440 clk cpu0 R X8 0000000000000007 +21441 clk cpu0 IT (21405) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21441 clk cpu0 R X8 0000000000000008 +21442 clk cpu0 IT (21406) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21442 clk cpu0 MW2 037005ce:000000f005ce_NS 0008 +21443 clk cpu0 IT (21407) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21444 clk cpu0 IT (21408) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21444 clk cpu0 MR2 037005ce:000000f005ce_NS 0008 +21444 clk cpu0 R X8 0000000000000008 +21445 clk cpu0 IT (21409) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21445 clk cpu0 R cpsr 820003c5 +21446 clk cpu0 IT (21410) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21446 clk cpu0 R X8 0000000000000001 +21447 clk cpu0 IT (21411) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21448 clk cpu0 IT (21412) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21448 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21448 clk cpu0 R X8 0000000003700700 +21449 clk cpu0 IT (21413) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21449 clk cpu0 R X9 0000000000000010 +21450 clk cpu0 IT (21414) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21450 clk cpu0 R X8 0000000003700710 +21451 clk cpu0 IT (21415) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21451 clk cpu0 R X9 0000000000000058 +21452 clk cpu0 IT (21416) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21452 clk cpu0 R X8 0000000003700768 +21453 clk cpu0 IT (21417) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21453 clk cpu0 MR2 037005ce:000000f005ce_NS 0008 +21453 clk cpu0 R X10 0000000000000008 +21454 clk cpu0 IT (21418) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21454 clk cpu0 R X9 0000000000000008 +21455 clk cpu0 IT (21419) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21455 clk cpu0 R X8 0000000003700770 +21456 clk cpu0 IT (21420) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21456 clk cpu0 R X10 0000000000000000 +21457 clk cpu0 IT (21421) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21457 clk cpu0 MW1 03700770:000000f00770_NS 00 +21458 clk cpu0 IT (21422) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21458 clk cpu0 MR2 037005ce:000000f005ce_NS 0008 +21458 clk cpu0 R X8 0000000000000008 +21459 clk cpu0 IT (21423) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21459 clk cpu0 R X8 0000000000000009 +21460 clk cpu0 IT (21424) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21460 clk cpu0 MW2 037005ce:000000f005ce_NS 0009 +21461 clk cpu0 IT (21425) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21462 clk cpu0 IT (21426) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21462 clk cpu0 MR2 037005ce:000000f005ce_NS 0009 +21462 clk cpu0 R X8 0000000000000009 +21463 clk cpu0 IT (21427) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21463 clk cpu0 R cpsr 820003c5 +21464 clk cpu0 IT (21428) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21464 clk cpu0 R X8 0000000000000001 +21465 clk cpu0 IT (21429) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21466 clk cpu0 IT (21430) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21466 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21466 clk cpu0 R X8 0000000003700700 +21467 clk cpu0 IT (21431) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21467 clk cpu0 R X9 0000000000000010 +21468 clk cpu0 IT (21432) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21468 clk cpu0 R X8 0000000003700710 +21469 clk cpu0 IT (21433) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21469 clk cpu0 R X9 0000000000000058 +21470 clk cpu0 IT (21434) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21470 clk cpu0 R X8 0000000003700768 +21471 clk cpu0 IT (21435) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21471 clk cpu0 MR2 037005ce:000000f005ce_NS 0009 +21471 clk cpu0 R X10 0000000000000009 +21472 clk cpu0 IT (21436) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21472 clk cpu0 R X9 0000000000000009 +21473 clk cpu0 IT (21437) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21473 clk cpu0 R X8 0000000003700771 +21474 clk cpu0 IT (21438) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21474 clk cpu0 R X10 0000000000000000 +21475 clk cpu0 IT (21439) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21475 clk cpu0 MW1 03700771:000000f00771_NS 00 +21476 clk cpu0 IT (21440) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21476 clk cpu0 MR2 037005ce:000000f005ce_NS 0009 +21476 clk cpu0 R X8 0000000000000009 +21477 clk cpu0 IT (21441) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21477 clk cpu0 R X8 000000000000000A +21478 clk cpu0 IT (21442) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21478 clk cpu0 MW2 037005ce:000000f005ce_NS 000a +21479 clk cpu0 IT (21443) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21480 clk cpu0 IT (21444) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21480 clk cpu0 MR2 037005ce:000000f005ce_NS 000a +21480 clk cpu0 R X8 000000000000000A +21481 clk cpu0 IT (21445) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21481 clk cpu0 R cpsr 820003c5 +21482 clk cpu0 IT (21446) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21482 clk cpu0 R X8 0000000000000001 +21483 clk cpu0 IT (21447) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21484 clk cpu0 IT (21448) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21484 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21484 clk cpu0 R X8 0000000003700700 +21485 clk cpu0 IT (21449) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21485 clk cpu0 R X9 0000000000000010 +21486 clk cpu0 IT (21450) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21486 clk cpu0 R X8 0000000003700710 +21487 clk cpu0 IT (21451) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21487 clk cpu0 R X9 0000000000000058 +21488 clk cpu0 IT (21452) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21488 clk cpu0 R X8 0000000003700768 +21489 clk cpu0 IT (21453) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21489 clk cpu0 MR2 037005ce:000000f005ce_NS 000a +21489 clk cpu0 R X10 000000000000000A +21490 clk cpu0 IT (21454) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21490 clk cpu0 R X9 000000000000000A +21491 clk cpu0 IT (21455) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21491 clk cpu0 R X8 0000000003700772 +21492 clk cpu0 IT (21456) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21492 clk cpu0 R X10 0000000000000000 +21493 clk cpu0 IT (21457) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21493 clk cpu0 MW1 03700772:000000f00772_NS 00 +21494 clk cpu0 IT (21458) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21494 clk cpu0 MR2 037005ce:000000f005ce_NS 000a +21494 clk cpu0 R X8 000000000000000A +21495 clk cpu0 IT (21459) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21495 clk cpu0 R X8 000000000000000B +21496 clk cpu0 IT (21460) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21496 clk cpu0 MW2 037005ce:000000f005ce_NS 000b +21497 clk cpu0 IT (21461) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21498 clk cpu0 IT (21462) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21498 clk cpu0 MR2 037005ce:000000f005ce_NS 000b +21498 clk cpu0 R X8 000000000000000B +21499 clk cpu0 IT (21463) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21499 clk cpu0 R cpsr 820003c5 +21500 clk cpu0 IT (21464) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21500 clk cpu0 R X8 0000000000000001 +21501 clk cpu0 IT (21465) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21502 clk cpu0 IT (21466) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21502 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21502 clk cpu0 R X8 0000000003700700 +21503 clk cpu0 IT (21467) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21503 clk cpu0 R X9 0000000000000010 +21504 clk cpu0 IT (21468) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21504 clk cpu0 R X8 0000000003700710 +21505 clk cpu0 IT (21469) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21505 clk cpu0 R X9 0000000000000058 +21506 clk cpu0 IT (21470) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21506 clk cpu0 R X8 0000000003700768 +21507 clk cpu0 IT (21471) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21507 clk cpu0 MR2 037005ce:000000f005ce_NS 000b +21507 clk cpu0 R X10 000000000000000B +21508 clk cpu0 IT (21472) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21508 clk cpu0 R X9 000000000000000B +21509 clk cpu0 IT (21473) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21509 clk cpu0 R X8 0000000003700773 +21510 clk cpu0 IT (21474) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21510 clk cpu0 R X10 0000000000000000 +21511 clk cpu0 IT (21475) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21511 clk cpu0 MW1 03700773:000000f00773_NS 00 +21512 clk cpu0 IT (21476) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21512 clk cpu0 MR2 037005ce:000000f005ce_NS 000b +21512 clk cpu0 R X8 000000000000000B +21513 clk cpu0 IT (21477) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21513 clk cpu0 R X8 000000000000000C +21514 clk cpu0 IT (21478) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21514 clk cpu0 MW2 037005ce:000000f005ce_NS 000c +21515 clk cpu0 IT (21479) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21516 clk cpu0 IT (21480) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21516 clk cpu0 MR2 037005ce:000000f005ce_NS 000c +21516 clk cpu0 R X8 000000000000000C +21517 clk cpu0 IT (21481) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21517 clk cpu0 R cpsr 820003c5 +21518 clk cpu0 IT (21482) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21518 clk cpu0 R X8 0000000000000001 +21519 clk cpu0 IT (21483) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21520 clk cpu0 IT (21484) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21520 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21520 clk cpu0 R X8 0000000003700700 +21521 clk cpu0 IT (21485) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21521 clk cpu0 R X9 0000000000000010 +21522 clk cpu0 IT (21486) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21522 clk cpu0 R X8 0000000003700710 +21523 clk cpu0 IT (21487) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21523 clk cpu0 R X9 0000000000000058 +21524 clk cpu0 IT (21488) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21524 clk cpu0 R X8 0000000003700768 +21525 clk cpu0 IT (21489) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21525 clk cpu0 MR2 037005ce:000000f005ce_NS 000c +21525 clk cpu0 R X10 000000000000000C +21526 clk cpu0 IT (21490) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21526 clk cpu0 R X9 000000000000000C +21527 clk cpu0 IT (21491) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21527 clk cpu0 R X8 0000000003700774 +21528 clk cpu0 IT (21492) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21528 clk cpu0 R X10 0000000000000000 +21529 clk cpu0 IT (21493) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21529 clk cpu0 MW1 03700774:000000f00774_NS 00 +21530 clk cpu0 IT (21494) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21530 clk cpu0 MR2 037005ce:000000f005ce_NS 000c +21530 clk cpu0 R X8 000000000000000C +21531 clk cpu0 IT (21495) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21531 clk cpu0 R X8 000000000000000D +21532 clk cpu0 IT (21496) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21532 clk cpu0 MW2 037005ce:000000f005ce_NS 000d +21533 clk cpu0 IT (21497) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21534 clk cpu0 IT (21498) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21534 clk cpu0 MR2 037005ce:000000f005ce_NS 000d +21534 clk cpu0 R X8 000000000000000D +21535 clk cpu0 IT (21499) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21535 clk cpu0 R cpsr 820003c5 +21536 clk cpu0 IT (21500) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21536 clk cpu0 R X8 0000000000000001 +21537 clk cpu0 IT (21501) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21538 clk cpu0 IT (21502) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21538 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21538 clk cpu0 R X8 0000000003700700 +21539 clk cpu0 IT (21503) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21539 clk cpu0 R X9 0000000000000010 +21540 clk cpu0 IT (21504) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21540 clk cpu0 R X8 0000000003700710 +21541 clk cpu0 IT (21505) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21541 clk cpu0 R X9 0000000000000058 +21542 clk cpu0 IT (21506) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21542 clk cpu0 R X8 0000000003700768 +21543 clk cpu0 IT (21507) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21543 clk cpu0 MR2 037005ce:000000f005ce_NS 000d +21543 clk cpu0 R X10 000000000000000D +21544 clk cpu0 IT (21508) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21544 clk cpu0 R X9 000000000000000D +21545 clk cpu0 IT (21509) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21545 clk cpu0 R X8 0000000003700775 +21546 clk cpu0 IT (21510) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21546 clk cpu0 R X10 0000000000000000 +21547 clk cpu0 IT (21511) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21547 clk cpu0 MW1 03700775:000000f00775_NS 00 +21548 clk cpu0 IT (21512) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21548 clk cpu0 MR2 037005ce:000000f005ce_NS 000d +21548 clk cpu0 R X8 000000000000000D +21549 clk cpu0 IT (21513) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21549 clk cpu0 R X8 000000000000000E +21550 clk cpu0 IT (21514) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21550 clk cpu0 MW2 037005ce:000000f005ce_NS 000e +21551 clk cpu0 IT (21515) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21552 clk cpu0 IT (21516) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21552 clk cpu0 MR2 037005ce:000000f005ce_NS 000e +21552 clk cpu0 R X8 000000000000000E +21553 clk cpu0 IT (21517) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21553 clk cpu0 R cpsr 820003c5 +21554 clk cpu0 IT (21518) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21554 clk cpu0 R X8 0000000000000001 +21555 clk cpu0 IT (21519) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21556 clk cpu0 IT (21520) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21556 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21556 clk cpu0 R X8 0000000003700700 +21557 clk cpu0 IT (21521) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21557 clk cpu0 R X9 0000000000000010 +21558 clk cpu0 IT (21522) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21558 clk cpu0 R X8 0000000003700710 +21559 clk cpu0 IT (21523) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21559 clk cpu0 R X9 0000000000000058 +21560 clk cpu0 IT (21524) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21560 clk cpu0 R X8 0000000003700768 +21561 clk cpu0 IT (21525) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21561 clk cpu0 MR2 037005ce:000000f005ce_NS 000e +21561 clk cpu0 R X10 000000000000000E +21562 clk cpu0 IT (21526) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21562 clk cpu0 R X9 000000000000000E +21563 clk cpu0 IT (21527) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21563 clk cpu0 R X8 0000000003700776 +21564 clk cpu0 IT (21528) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21564 clk cpu0 R X10 0000000000000000 +21565 clk cpu0 IT (21529) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21565 clk cpu0 MW1 03700776:000000f00776_NS 00 +21566 clk cpu0 IT (21530) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21566 clk cpu0 MR2 037005ce:000000f005ce_NS 000e +21566 clk cpu0 R X8 000000000000000E +21567 clk cpu0 IT (21531) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21567 clk cpu0 R X8 000000000000000F +21568 clk cpu0 IT (21532) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21568 clk cpu0 MW2 037005ce:000000f005ce_NS 000f +21569 clk cpu0 IT (21533) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21570 clk cpu0 IT (21534) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21570 clk cpu0 MR2 037005ce:000000f005ce_NS 000f +21570 clk cpu0 R X8 000000000000000F +21571 clk cpu0 IT (21535) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21571 clk cpu0 R cpsr 820003c5 +21572 clk cpu0 IT (21536) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21572 clk cpu0 R X8 0000000000000001 +21573 clk cpu0 IT (21537) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21574 clk cpu0 IT (21538) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21574 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21574 clk cpu0 R X8 0000000003700700 +21575 clk cpu0 IT (21539) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21575 clk cpu0 R X9 0000000000000010 +21576 clk cpu0 IT (21540) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21576 clk cpu0 R X8 0000000003700710 +21577 clk cpu0 IT (21541) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21577 clk cpu0 R X9 0000000000000058 +21578 clk cpu0 IT (21542) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21578 clk cpu0 R X8 0000000003700768 +21579 clk cpu0 IT (21543) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21579 clk cpu0 MR2 037005ce:000000f005ce_NS 000f +21579 clk cpu0 R X10 000000000000000F +21580 clk cpu0 IT (21544) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21580 clk cpu0 R X9 000000000000000F +21581 clk cpu0 IT (21545) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21581 clk cpu0 R X8 0000000003700777 +21582 clk cpu0 IT (21546) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21582 clk cpu0 R X10 0000000000000000 +21583 clk cpu0 IT (21547) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21583 clk cpu0 MW1 03700777:000000f00777_NS 00 +21584 clk cpu0 IT (21548) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21584 clk cpu0 MR2 037005ce:000000f005ce_NS 000f +21584 clk cpu0 R X8 000000000000000F +21585 clk cpu0 IT (21549) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21585 clk cpu0 R X8 0000000000000010 +21586 clk cpu0 IT (21550) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21586 clk cpu0 MW2 037005ce:000000f005ce_NS 0010 +21587 clk cpu0 IT (21551) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21588 clk cpu0 IT (21552) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21588 clk cpu0 MR2 037005ce:000000f005ce_NS 0010 +21588 clk cpu0 R X8 0000000000000010 +21589 clk cpu0 IT (21553) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21589 clk cpu0 R cpsr 820003c5 +21590 clk cpu0 IT (21554) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21590 clk cpu0 R X8 0000000000000001 +21591 clk cpu0 IT (21555) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21592 clk cpu0 IT (21556) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21592 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21592 clk cpu0 R X8 0000000003700700 +21593 clk cpu0 IT (21557) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21593 clk cpu0 R X9 0000000000000010 +21594 clk cpu0 IT (21558) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21594 clk cpu0 R X8 0000000003700710 +21595 clk cpu0 IT (21559) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21595 clk cpu0 R X9 0000000000000058 +21596 clk cpu0 IT (21560) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21596 clk cpu0 R X8 0000000003700768 +21597 clk cpu0 IT (21561) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21597 clk cpu0 MR2 037005ce:000000f005ce_NS 0010 +21597 clk cpu0 R X10 0000000000000010 +21598 clk cpu0 IT (21562) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21598 clk cpu0 R X9 0000000000000010 +21599 clk cpu0 IT (21563) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21599 clk cpu0 R X8 0000000003700778 +21600 clk cpu0 IT (21564) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21600 clk cpu0 R X10 0000000000000000 +21601 clk cpu0 IT (21565) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21601 clk cpu0 MW1 03700778:000000f00778_NS 00 +21602 clk cpu0 IT (21566) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21602 clk cpu0 MR2 037005ce:000000f005ce_NS 0010 +21602 clk cpu0 R X8 0000000000000010 +21603 clk cpu0 IT (21567) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21603 clk cpu0 R X8 0000000000000011 +21604 clk cpu0 IT (21568) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21604 clk cpu0 MW2 037005ce:000000f005ce_NS 0011 +21605 clk cpu0 IT (21569) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21606 clk cpu0 IT (21570) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21606 clk cpu0 MR2 037005ce:000000f005ce_NS 0011 +21606 clk cpu0 R X8 0000000000000011 +21607 clk cpu0 IT (21571) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21607 clk cpu0 R cpsr 820003c5 +21608 clk cpu0 IT (21572) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21608 clk cpu0 R X8 0000000000000001 +21609 clk cpu0 IT (21573) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21610 clk cpu0 IT (21574) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21610 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21610 clk cpu0 R X8 0000000003700700 +21611 clk cpu0 IT (21575) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21611 clk cpu0 R X9 0000000000000010 +21612 clk cpu0 IT (21576) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21612 clk cpu0 R X8 0000000003700710 +21613 clk cpu0 IT (21577) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21613 clk cpu0 R X9 0000000000000058 +21614 clk cpu0 IT (21578) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21614 clk cpu0 R X8 0000000003700768 +21615 clk cpu0 IT (21579) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21615 clk cpu0 MR2 037005ce:000000f005ce_NS 0011 +21615 clk cpu0 R X10 0000000000000011 +21616 clk cpu0 IT (21580) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21616 clk cpu0 R X9 0000000000000011 +21617 clk cpu0 IT (21581) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21617 clk cpu0 R X8 0000000003700779 +21618 clk cpu0 IT (21582) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21618 clk cpu0 R X10 0000000000000000 +21619 clk cpu0 IT (21583) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21619 clk cpu0 MW1 03700779:000000f00779_NS 00 +21620 clk cpu0 IT (21584) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21620 clk cpu0 MR2 037005ce:000000f005ce_NS 0011 +21620 clk cpu0 R X8 0000000000000011 +21621 clk cpu0 IT (21585) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21621 clk cpu0 R X8 0000000000000012 +21622 clk cpu0 IT (21586) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21622 clk cpu0 MW2 037005ce:000000f005ce_NS 0012 +21623 clk cpu0 IT (21587) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21624 clk cpu0 IT (21588) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21624 clk cpu0 MR2 037005ce:000000f005ce_NS 0012 +21624 clk cpu0 R X8 0000000000000012 +21625 clk cpu0 IT (21589) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21625 clk cpu0 R cpsr 820003c5 +21626 clk cpu0 IT (21590) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21626 clk cpu0 R X8 0000000000000001 +21627 clk cpu0 IT (21591) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21628 clk cpu0 IT (21592) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21628 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21628 clk cpu0 R X8 0000000003700700 +21629 clk cpu0 IT (21593) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21629 clk cpu0 R X9 0000000000000010 +21630 clk cpu0 IT (21594) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21630 clk cpu0 R X8 0000000003700710 +21631 clk cpu0 IT (21595) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21631 clk cpu0 R X9 0000000000000058 +21632 clk cpu0 IT (21596) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21632 clk cpu0 R X8 0000000003700768 +21633 clk cpu0 IT (21597) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21633 clk cpu0 MR2 037005ce:000000f005ce_NS 0012 +21633 clk cpu0 R X10 0000000000000012 +21634 clk cpu0 IT (21598) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21634 clk cpu0 R X9 0000000000000012 +21635 clk cpu0 IT (21599) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21635 clk cpu0 R X8 000000000370077A +21636 clk cpu0 IT (21600) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21636 clk cpu0 R X10 0000000000000000 +21637 clk cpu0 IT (21601) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21637 clk cpu0 MW1 0370077a:000000f0077a_NS 00 +21638 clk cpu0 IT (21602) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21638 clk cpu0 MR2 037005ce:000000f005ce_NS 0012 +21638 clk cpu0 R X8 0000000000000012 +21639 clk cpu0 IT (21603) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21639 clk cpu0 R X8 0000000000000013 +21640 clk cpu0 IT (21604) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21640 clk cpu0 MW2 037005ce:000000f005ce_NS 0013 +21641 clk cpu0 IT (21605) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21642 clk cpu0 IT (21606) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21642 clk cpu0 MR2 037005ce:000000f005ce_NS 0013 +21642 clk cpu0 R X8 0000000000000013 +21643 clk cpu0 IT (21607) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21643 clk cpu0 R cpsr 820003c5 +21644 clk cpu0 IT (21608) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21644 clk cpu0 R X8 0000000000000001 +21645 clk cpu0 IT (21609) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21646 clk cpu0 IT (21610) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21646 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21646 clk cpu0 R X8 0000000003700700 +21647 clk cpu0 IT (21611) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21647 clk cpu0 R X9 0000000000000010 +21648 clk cpu0 IT (21612) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21648 clk cpu0 R X8 0000000003700710 +21649 clk cpu0 IT (21613) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21649 clk cpu0 R X9 0000000000000058 +21650 clk cpu0 IT (21614) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21650 clk cpu0 R X8 0000000003700768 +21651 clk cpu0 IT (21615) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21651 clk cpu0 MR2 037005ce:000000f005ce_NS 0013 +21651 clk cpu0 R X10 0000000000000013 +21652 clk cpu0 IT (21616) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21652 clk cpu0 R X9 0000000000000013 +21653 clk cpu0 IT (21617) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21653 clk cpu0 R X8 000000000370077B +21654 clk cpu0 IT (21618) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21654 clk cpu0 R X10 0000000000000000 +21655 clk cpu0 IT (21619) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21655 clk cpu0 MW1 0370077b:000000f0077b_NS 00 +21656 clk cpu0 IT (21620) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21656 clk cpu0 MR2 037005ce:000000f005ce_NS 0013 +21656 clk cpu0 R X8 0000000000000013 +21657 clk cpu0 IT (21621) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21657 clk cpu0 R X8 0000000000000014 +21658 clk cpu0 IT (21622) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21658 clk cpu0 MW2 037005ce:000000f005ce_NS 0014 +21659 clk cpu0 IT (21623) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21660 clk cpu0 IT (21624) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21660 clk cpu0 MR2 037005ce:000000f005ce_NS 0014 +21660 clk cpu0 R X8 0000000000000014 +21661 clk cpu0 IT (21625) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21661 clk cpu0 R cpsr 820003c5 +21662 clk cpu0 IT (21626) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21662 clk cpu0 R X8 0000000000000001 +21663 clk cpu0 IT (21627) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21664 clk cpu0 IT (21628) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21664 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21664 clk cpu0 R X8 0000000003700700 +21665 clk cpu0 IT (21629) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21665 clk cpu0 R X9 0000000000000010 +21666 clk cpu0 IT (21630) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21666 clk cpu0 R X8 0000000003700710 +21667 clk cpu0 IT (21631) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21667 clk cpu0 R X9 0000000000000058 +21668 clk cpu0 IT (21632) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21668 clk cpu0 R X8 0000000003700768 +21669 clk cpu0 IT (21633) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21669 clk cpu0 MR2 037005ce:000000f005ce_NS 0014 +21669 clk cpu0 R X10 0000000000000014 +21670 clk cpu0 IT (21634) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21670 clk cpu0 R X9 0000000000000014 +21671 clk cpu0 IT (21635) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21671 clk cpu0 R X8 000000000370077C +21672 clk cpu0 IT (21636) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21672 clk cpu0 R X10 0000000000000000 +21673 clk cpu0 IT (21637) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21673 clk cpu0 MW1 0370077c:000000f0077c_NS 00 +21674 clk cpu0 IT (21638) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21674 clk cpu0 MR2 037005ce:000000f005ce_NS 0014 +21674 clk cpu0 R X8 0000000000000014 +21675 clk cpu0 IT (21639) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21675 clk cpu0 R X8 0000000000000015 +21676 clk cpu0 IT (21640) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21676 clk cpu0 MW2 037005ce:000000f005ce_NS 0015 +21677 clk cpu0 IT (21641) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21678 clk cpu0 IT (21642) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21678 clk cpu0 MR2 037005ce:000000f005ce_NS 0015 +21678 clk cpu0 R X8 0000000000000015 +21679 clk cpu0 IT (21643) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21679 clk cpu0 R cpsr 820003c5 +21680 clk cpu0 IT (21644) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21680 clk cpu0 R X8 0000000000000001 +21681 clk cpu0 IT (21645) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21682 clk cpu0 IT (21646) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21682 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21682 clk cpu0 R X8 0000000003700700 +21683 clk cpu0 IT (21647) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21683 clk cpu0 R X9 0000000000000010 +21684 clk cpu0 IT (21648) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21684 clk cpu0 R X8 0000000003700710 +21685 clk cpu0 IT (21649) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21685 clk cpu0 R X9 0000000000000058 +21686 clk cpu0 IT (21650) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21686 clk cpu0 R X8 0000000003700768 +21687 clk cpu0 IT (21651) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21687 clk cpu0 MR2 037005ce:000000f005ce_NS 0015 +21687 clk cpu0 R X10 0000000000000015 +21688 clk cpu0 IT (21652) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21688 clk cpu0 R X9 0000000000000015 +21689 clk cpu0 IT (21653) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21689 clk cpu0 R X8 000000000370077D +21690 clk cpu0 IT (21654) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21690 clk cpu0 R X10 0000000000000000 +21691 clk cpu0 IT (21655) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21691 clk cpu0 MW1 0370077d:000000f0077d_NS 00 +21692 clk cpu0 IT (21656) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21692 clk cpu0 MR2 037005ce:000000f005ce_NS 0015 +21692 clk cpu0 R X8 0000000000000015 +21693 clk cpu0 IT (21657) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21693 clk cpu0 R X8 0000000000000016 +21694 clk cpu0 IT (21658) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21694 clk cpu0 MW2 037005ce:000000f005ce_NS 0016 +21695 clk cpu0 IT (21659) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21696 clk cpu0 IT (21660) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21696 clk cpu0 MR2 037005ce:000000f005ce_NS 0016 +21696 clk cpu0 R X8 0000000000000016 +21697 clk cpu0 IT (21661) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21697 clk cpu0 R cpsr 820003c5 +21698 clk cpu0 IT (21662) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21698 clk cpu0 R X8 0000000000000001 +21699 clk cpu0 IT (21663) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21700 clk cpu0 IT (21664) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21700 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21700 clk cpu0 R X8 0000000003700700 +21701 clk cpu0 IT (21665) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21701 clk cpu0 R X9 0000000000000010 +21702 clk cpu0 IT (21666) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21702 clk cpu0 R X8 0000000003700710 +21703 clk cpu0 IT (21667) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21703 clk cpu0 R X9 0000000000000058 +21704 clk cpu0 IT (21668) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21704 clk cpu0 R X8 0000000003700768 +21705 clk cpu0 IT (21669) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21705 clk cpu0 MR2 037005ce:000000f005ce_NS 0016 +21705 clk cpu0 R X10 0000000000000016 +21706 clk cpu0 IT (21670) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21706 clk cpu0 R X9 0000000000000016 +21707 clk cpu0 IT (21671) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21707 clk cpu0 R X8 000000000370077E +21708 clk cpu0 IT (21672) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21708 clk cpu0 R X10 0000000000000000 +21709 clk cpu0 IT (21673) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21709 clk cpu0 MW1 0370077e:000000f0077e_NS 00 +21710 clk cpu0 IT (21674) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21710 clk cpu0 MR2 037005ce:000000f005ce_NS 0016 +21710 clk cpu0 R X8 0000000000000016 +21711 clk cpu0 IT (21675) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21711 clk cpu0 R X8 0000000000000017 +21712 clk cpu0 IT (21676) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21712 clk cpu0 MW2 037005ce:000000f005ce_NS 0017 +21713 clk cpu0 IT (21677) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21714 clk cpu0 IT (21678) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21714 clk cpu0 MR2 037005ce:000000f005ce_NS 0017 +21714 clk cpu0 R X8 0000000000000017 +21715 clk cpu0 IT (21679) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21715 clk cpu0 R cpsr 820003c5 +21716 clk cpu0 IT (21680) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21716 clk cpu0 R X8 0000000000000001 +21717 clk cpu0 IT (21681) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21718 clk cpu0 IT (21682) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21718 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21718 clk cpu0 R X8 0000000003700700 +21719 clk cpu0 IT (21683) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21719 clk cpu0 R X9 0000000000000010 +21720 clk cpu0 IT (21684) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21720 clk cpu0 R X8 0000000003700710 +21721 clk cpu0 IT (21685) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21721 clk cpu0 R X9 0000000000000058 +21722 clk cpu0 IT (21686) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21722 clk cpu0 R X8 0000000003700768 +21723 clk cpu0 IT (21687) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21723 clk cpu0 MR2 037005ce:000000f005ce_NS 0017 +21723 clk cpu0 R X10 0000000000000017 +21724 clk cpu0 IT (21688) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21724 clk cpu0 R X9 0000000000000017 +21725 clk cpu0 IT (21689) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21725 clk cpu0 R X8 000000000370077F +21726 clk cpu0 IT (21690) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21726 clk cpu0 R X10 0000000000000000 +21727 clk cpu0 IT (21691) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21727 clk cpu0 MW1 0370077f:000000f0077f_NS 00 +21728 clk cpu0 IT (21692) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21728 clk cpu0 MR2 037005ce:000000f005ce_NS 0017 +21728 clk cpu0 R X8 0000000000000017 +21729 clk cpu0 IT (21693) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21729 clk cpu0 R X8 0000000000000018 +21730 clk cpu0 IT (21694) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21730 clk cpu0 MW2 037005ce:000000f005ce_NS 0018 +21731 clk cpu0 IT (21695) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21732 clk cpu0 IT (21696) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21732 clk cpu0 MR2 037005ce:000000f005ce_NS 0018 +21732 clk cpu0 R X8 0000000000000018 +21733 clk cpu0 IT (21697) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21733 clk cpu0 R cpsr 820003c5 +21734 clk cpu0 IT (21698) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21734 clk cpu0 R X8 0000000000000001 +21735 clk cpu0 IT (21699) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21736 clk cpu0 IT (21700) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21736 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21736 clk cpu0 R X8 0000000003700700 +21737 clk cpu0 IT (21701) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21737 clk cpu0 R X9 0000000000000010 +21738 clk cpu0 IT (21702) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21738 clk cpu0 R X8 0000000003700710 +21739 clk cpu0 IT (21703) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21739 clk cpu0 R X9 0000000000000058 +21740 clk cpu0 IT (21704) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21740 clk cpu0 R X8 0000000003700768 +21741 clk cpu0 IT (21705) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21741 clk cpu0 MR2 037005ce:000000f005ce_NS 0018 +21741 clk cpu0 R X10 0000000000000018 +21742 clk cpu0 IT (21706) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21742 clk cpu0 R X9 0000000000000018 +21743 clk cpu0 IT (21707) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21743 clk cpu0 R X8 0000000003700780 +21744 clk cpu0 IT (21708) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21744 clk cpu0 R X10 0000000000000000 +21745 clk cpu0 IT (21709) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21745 clk cpu0 MW1 03700780:000000f00780_NS 00 +21746 clk cpu0 IT (21710) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21746 clk cpu0 MR2 037005ce:000000f005ce_NS 0018 +21746 clk cpu0 R X8 0000000000000018 +21747 clk cpu0 IT (21711) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21747 clk cpu0 R X8 0000000000000019 +21748 clk cpu0 IT (21712) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21748 clk cpu0 MW2 037005ce:000000f005ce_NS 0019 +21749 clk cpu0 IT (21713) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21750 clk cpu0 IT (21714) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21750 clk cpu0 MR2 037005ce:000000f005ce_NS 0019 +21750 clk cpu0 R X8 0000000000000019 +21751 clk cpu0 IT (21715) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21751 clk cpu0 R cpsr 820003c5 +21752 clk cpu0 IT (21716) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21752 clk cpu0 R X8 0000000000000001 +21753 clk cpu0 IT (21717) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21754 clk cpu0 IT (21718) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21754 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21754 clk cpu0 R X8 0000000003700700 +21755 clk cpu0 IT (21719) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21755 clk cpu0 R X9 0000000000000010 +21756 clk cpu0 IT (21720) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21756 clk cpu0 R X8 0000000003700710 +21757 clk cpu0 IT (21721) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21757 clk cpu0 R X9 0000000000000058 +21758 clk cpu0 IT (21722) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21758 clk cpu0 R X8 0000000003700768 +21759 clk cpu0 IT (21723) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21759 clk cpu0 MR2 037005ce:000000f005ce_NS 0019 +21759 clk cpu0 R X10 0000000000000019 +21760 clk cpu0 IT (21724) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21760 clk cpu0 R X9 0000000000000019 +21761 clk cpu0 IT (21725) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21761 clk cpu0 R X8 0000000003700781 +21762 clk cpu0 IT (21726) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21762 clk cpu0 R X10 0000000000000000 +21763 clk cpu0 IT (21727) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21763 clk cpu0 MW1 03700781:000000f00781_NS 00 +21764 clk cpu0 IT (21728) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21764 clk cpu0 MR2 037005ce:000000f005ce_NS 0019 +21764 clk cpu0 R X8 0000000000000019 +21765 clk cpu0 IT (21729) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21765 clk cpu0 R X8 000000000000001A +21766 clk cpu0 IT (21730) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21766 clk cpu0 MW2 037005ce:000000f005ce_NS 001a +21767 clk cpu0 IT (21731) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21768 clk cpu0 IT (21732) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21768 clk cpu0 MR2 037005ce:000000f005ce_NS 001a +21768 clk cpu0 R X8 000000000000001A +21769 clk cpu0 IT (21733) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21769 clk cpu0 R cpsr 820003c5 +21770 clk cpu0 IT (21734) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21770 clk cpu0 R X8 0000000000000001 +21771 clk cpu0 IT (21735) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21772 clk cpu0 IT (21736) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21772 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21772 clk cpu0 R X8 0000000003700700 +21773 clk cpu0 IT (21737) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21773 clk cpu0 R X9 0000000000000010 +21774 clk cpu0 IT (21738) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21774 clk cpu0 R X8 0000000003700710 +21775 clk cpu0 IT (21739) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21775 clk cpu0 R X9 0000000000000058 +21776 clk cpu0 IT (21740) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21776 clk cpu0 R X8 0000000003700768 +21777 clk cpu0 IT (21741) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21777 clk cpu0 MR2 037005ce:000000f005ce_NS 001a +21777 clk cpu0 R X10 000000000000001A +21778 clk cpu0 IT (21742) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21778 clk cpu0 R X9 000000000000001A +21779 clk cpu0 IT (21743) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21779 clk cpu0 R X8 0000000003700782 +21780 clk cpu0 IT (21744) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21780 clk cpu0 R X10 0000000000000000 +21781 clk cpu0 IT (21745) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21781 clk cpu0 MW1 03700782:000000f00782_NS 00 +21782 clk cpu0 IT (21746) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21782 clk cpu0 MR2 037005ce:000000f005ce_NS 001a +21782 clk cpu0 R X8 000000000000001A +21783 clk cpu0 IT (21747) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21783 clk cpu0 R X8 000000000000001B +21784 clk cpu0 IT (21748) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21784 clk cpu0 MW2 037005ce:000000f005ce_NS 001b +21785 clk cpu0 IT (21749) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21786 clk cpu0 IT (21750) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21786 clk cpu0 MR2 037005ce:000000f005ce_NS 001b +21786 clk cpu0 R X8 000000000000001B +21787 clk cpu0 IT (21751) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21787 clk cpu0 R cpsr 820003c5 +21788 clk cpu0 IT (21752) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21788 clk cpu0 R X8 0000000000000001 +21789 clk cpu0 IT (21753) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21790 clk cpu0 IT (21754) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21790 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21790 clk cpu0 R X8 0000000003700700 +21791 clk cpu0 IT (21755) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21791 clk cpu0 R X9 0000000000000010 +21792 clk cpu0 IT (21756) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21792 clk cpu0 R X8 0000000003700710 +21793 clk cpu0 IT (21757) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21793 clk cpu0 R X9 0000000000000058 +21794 clk cpu0 IT (21758) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21794 clk cpu0 R X8 0000000003700768 +21795 clk cpu0 IT (21759) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21795 clk cpu0 MR2 037005ce:000000f005ce_NS 001b +21795 clk cpu0 R X10 000000000000001B +21796 clk cpu0 IT (21760) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21796 clk cpu0 R X9 000000000000001B +21797 clk cpu0 IT (21761) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21797 clk cpu0 R X8 0000000003700783 +21798 clk cpu0 IT (21762) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21798 clk cpu0 R X10 0000000000000000 +21799 clk cpu0 IT (21763) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21799 clk cpu0 MW1 03700783:000000f00783_NS 00 +21800 clk cpu0 IT (21764) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21800 clk cpu0 MR2 037005ce:000000f005ce_NS 001b +21800 clk cpu0 R X8 000000000000001B +21801 clk cpu0 IT (21765) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21801 clk cpu0 R X8 000000000000001C +21802 clk cpu0 IT (21766) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21802 clk cpu0 MW2 037005ce:000000f005ce_NS 001c +21803 clk cpu0 IT (21767) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21804 clk cpu0 IT (21768) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21804 clk cpu0 MR2 037005ce:000000f005ce_NS 001c +21804 clk cpu0 R X8 000000000000001C +21805 clk cpu0 IT (21769) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21805 clk cpu0 R cpsr 820003c5 +21806 clk cpu0 IT (21770) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21806 clk cpu0 R X8 0000000000000001 +21807 clk cpu0 IT (21771) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21808 clk cpu0 IT (21772) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21808 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21808 clk cpu0 R X8 0000000003700700 +21809 clk cpu0 IT (21773) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21809 clk cpu0 R X9 0000000000000010 +21810 clk cpu0 IT (21774) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21810 clk cpu0 R X8 0000000003700710 +21811 clk cpu0 IT (21775) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21811 clk cpu0 R X9 0000000000000058 +21812 clk cpu0 IT (21776) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21812 clk cpu0 R X8 0000000003700768 +21813 clk cpu0 IT (21777) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21813 clk cpu0 MR2 037005ce:000000f005ce_NS 001c +21813 clk cpu0 R X10 000000000000001C +21814 clk cpu0 IT (21778) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21814 clk cpu0 R X9 000000000000001C +21815 clk cpu0 IT (21779) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21815 clk cpu0 R X8 0000000003700784 +21816 clk cpu0 IT (21780) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21816 clk cpu0 R X10 0000000000000000 +21817 clk cpu0 IT (21781) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21817 clk cpu0 MW1 03700784:000000f00784_NS 00 +21818 clk cpu0 IT (21782) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21818 clk cpu0 MR2 037005ce:000000f005ce_NS 001c +21818 clk cpu0 R X8 000000000000001C +21819 clk cpu0 IT (21783) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21819 clk cpu0 R X8 000000000000001D +21820 clk cpu0 IT (21784) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21820 clk cpu0 MW2 037005ce:000000f005ce_NS 001d +21821 clk cpu0 IT (21785) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21822 clk cpu0 IT (21786) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21822 clk cpu0 MR2 037005ce:000000f005ce_NS 001d +21822 clk cpu0 R X8 000000000000001D +21823 clk cpu0 IT (21787) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21823 clk cpu0 R cpsr 820003c5 +21824 clk cpu0 IT (21788) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21824 clk cpu0 R X8 0000000000000001 +21825 clk cpu0 IT (21789) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21826 clk cpu0 IT (21790) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21826 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21826 clk cpu0 R X8 0000000003700700 +21827 clk cpu0 IT (21791) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21827 clk cpu0 R X9 0000000000000010 +21828 clk cpu0 IT (21792) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21828 clk cpu0 R X8 0000000003700710 +21829 clk cpu0 IT (21793) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21829 clk cpu0 R X9 0000000000000058 +21830 clk cpu0 IT (21794) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21830 clk cpu0 R X8 0000000003700768 +21831 clk cpu0 IT (21795) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21831 clk cpu0 MR2 037005ce:000000f005ce_NS 001d +21831 clk cpu0 R X10 000000000000001D +21832 clk cpu0 IT (21796) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21832 clk cpu0 R X9 000000000000001D +21833 clk cpu0 IT (21797) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21833 clk cpu0 R X8 0000000003700785 +21834 clk cpu0 IT (21798) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21834 clk cpu0 R X10 0000000000000000 +21835 clk cpu0 IT (21799) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21835 clk cpu0 MW1 03700785:000000f00785_NS 00 +21836 clk cpu0 IT (21800) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21836 clk cpu0 MR2 037005ce:000000f005ce_NS 001d +21836 clk cpu0 R X8 000000000000001D +21837 clk cpu0 IT (21801) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21837 clk cpu0 R X8 000000000000001E +21838 clk cpu0 IT (21802) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21838 clk cpu0 MW2 037005ce:000000f005ce_NS 001e +21839 clk cpu0 IT (21803) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21840 clk cpu0 IT (21804) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21840 clk cpu0 MR2 037005ce:000000f005ce_NS 001e +21840 clk cpu0 R X8 000000000000001E +21841 clk cpu0 IT (21805) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21841 clk cpu0 R cpsr 820003c5 +21842 clk cpu0 IT (21806) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21842 clk cpu0 R X8 0000000000000001 +21843 clk cpu0 IT (21807) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21844 clk cpu0 IT (21808) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21844 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21844 clk cpu0 R X8 0000000003700700 +21845 clk cpu0 IT (21809) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21845 clk cpu0 R X9 0000000000000010 +21846 clk cpu0 IT (21810) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21846 clk cpu0 R X8 0000000003700710 +21847 clk cpu0 IT (21811) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21847 clk cpu0 R X9 0000000000000058 +21848 clk cpu0 IT (21812) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21848 clk cpu0 R X8 0000000003700768 +21849 clk cpu0 IT (21813) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21849 clk cpu0 MR2 037005ce:000000f005ce_NS 001e +21849 clk cpu0 R X10 000000000000001E +21850 clk cpu0 IT (21814) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21850 clk cpu0 R X9 000000000000001E +21851 clk cpu0 IT (21815) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21851 clk cpu0 R X8 0000000003700786 +21852 clk cpu0 IT (21816) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21852 clk cpu0 R X10 0000000000000000 +21853 clk cpu0 IT (21817) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21853 clk cpu0 MW1 03700786:000000f00786_NS 00 +21854 clk cpu0 IT (21818) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21854 clk cpu0 MR2 037005ce:000000f005ce_NS 001e +21854 clk cpu0 R X8 000000000000001E +21855 clk cpu0 IT (21819) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21855 clk cpu0 R X8 000000000000001F +21856 clk cpu0 IT (21820) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21856 clk cpu0 MW2 037005ce:000000f005ce_NS 001f +21857 clk cpu0 IT (21821) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21858 clk cpu0 IT (21822) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21858 clk cpu0 MR2 037005ce:000000f005ce_NS 001f +21858 clk cpu0 R X8 000000000000001F +21859 clk cpu0 IT (21823) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21859 clk cpu0 R cpsr 820003c5 +21860 clk cpu0 IT (21824) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21860 clk cpu0 R X8 0000000000000001 +21861 clk cpu0 IT (21825) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21862 clk cpu0 IT (21826) 00011b48:000010011b48_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21862 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21862 clk cpu0 R X8 0000000003700700 +21863 clk cpu0 IT (21827) 00011b4c:000010011b4c_NS d2800209 O EL1h_n : MOV x9,#0x10 +21863 clk cpu0 R X9 0000000000000010 +21864 clk cpu0 IT (21828) 00011b50:000010011b50_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21864 clk cpu0 R X8 0000000003700710 +21865 clk cpu0 IT (21829) 00011b54:000010011b54_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21865 clk cpu0 R X9 0000000000000058 +21866 clk cpu0 IT (21830) 00011b58:000010011b58_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21866 clk cpu0 R X8 0000000003700768 +21867 clk cpu0 IT (21831) 00011b5c:000010011b5c_NS 7940ffea O EL1h_n : LDRH w10,[sp,#0x7e] +21867 clk cpu0 MR2 037005ce:000000f005ce_NS 001f +21867 clk cpu0 R X10 000000000000001F +21868 clk cpu0 IT (21832) 00011b60:000010011b60_NS 2a0a03e9 O EL1h_n : MOV w9,w10 +21868 clk cpu0 R X9 000000000000001F +21869 clk cpu0 IT (21833) 00011b64:000010011b64_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21869 clk cpu0 R X8 0000000003700787 +21870 clk cpu0 IT (21834) 00011b68:000010011b68_NS 5280000a O EL1h_n : MOV w10,#0 +21870 clk cpu0 R X10 0000000000000000 +21871 clk cpu0 IT (21835) 00011b6c:000010011b6c_NS 3900010a O EL1h_n : STRB w10,[x8,#0] +21871 clk cpu0 MW1 03700787:000000f00787_NS 00 +21872 clk cpu0 IT (21836) 00011b70:000010011b70_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21872 clk cpu0 MR2 037005ce:000000f005ce_NS 001f +21872 clk cpu0 R X8 000000000000001F +21873 clk cpu0 IT (21837) 00011b74:000010011b74_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21873 clk cpu0 R X8 0000000000000020 +21874 clk cpu0 IT (21838) 00011b78:000010011b78_NS 7900ffe8 O EL1h_n : STRH w8,[sp,#0x7e] +21874 clk cpu0 MW2 037005ce:000000f005ce_NS 0020 +21875 clk cpu0 IT (21839) 00011b7c:000010011b7c_NS 17ffffee O EL1h_n : B 0x11b34 +21876 clk cpu0 IT (21840) 00011b34:000010011b34_NS 7940ffe8 O EL1h_n : LDRH w8,[sp,#0x7e] +21876 clk cpu0 MR2 037005ce:000000f005ce_NS 0020 +21876 clk cpu0 R X8 0000000000000020 +21877 clk cpu0 IT (21841) 00011b38:000010011b38_NS 7100811f O EL1h_n : CMP w8,#0x20 +21877 clk cpu0 R cpsr 620003c5 +21878 clk cpu0 IT (21842) 00011b3c:000010011b3c_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21878 clk cpu0 R X8 0000000000000000 +21879 clk cpu0 IS (21843) 00011b40:000010011b40_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11b48 +21880 clk cpu0 IT (21844) 00011b44:000010011b44_NS 1400000f O EL1h_n : B 0x11b80 +21880 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00dd ALLOC 0x000010011b80_NS +21880 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 06e0 ALLOC 0x000010011b80_NS +21881 clk cpu0 IT (21845) 00011b80:000010011b80_NS f9405fe8 O EL1h_n : LDR x8,[sp,#0xb8] +21881 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +21881 clk cpu0 R X8 0000000003700700 +21882 clk cpu0 IT (21846) 00011b84:000010011b84_NS d2800209 O EL1h_n : MOV x9,#0x10 +21882 clk cpu0 R X9 0000000000000010 +21883 clk cpu0 IT (21847) 00011b88:000010011b88_NS 8b090108 O EL1h_n : ADD x8,x8,x9 +21883 clk cpu0 R X8 0000000003700710 +21884 clk cpu0 IT (21848) 00011b8c:000010011b8c_NS d2800b09 O EL1h_n : MOV x9,#0x58 +21884 clk cpu0 R X9 0000000000000058 +21885 clk cpu0 IT (21849) 00011b90:000010011b90_NS 8b090101 O EL1h_n : ADD x1,x8,x9 +21885 clk cpu0 R X1 0000000003700768 +21886 clk cpu0 IT (21850) 00011b94:000010011b94_NS 9102c3e0 O EL1h_n : ADD x0,sp,#0xb0 +21886 clk cpu0 R X0 0000000003700600 +21887 clk cpu0 IT (21851) 00011b98:000010011b98_NS 52800402 O EL1h_n : MOV w2,#0x20 +21887 clk cpu0 R X2 0000000000000020 +21888 clk cpu0 IT (21852) 00011b9c:000010011b9c_NS 97fffe8f O EL1h_n : BL 0x115d8 +21888 clk cpu0 R X30 0000000000011BA0 +21889 clk cpu0 IT (21853) 000115d8:0000100115d8_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +21889 clk cpu0 R SP_EL1 0000000003700530 +21890 clk cpu0 IT (21854) 000115dc:0000100115dc_NS 52800008 O EL1h_n : MOV w8,#0 +21890 clk cpu0 R X8 0000000000000000 +21891 clk cpu0 IT (21855) 000115e0:0000100115e0_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +21891 clk cpu0 MW8 03700548:000000f00548_NS 00000000_03700600 +21892 clk cpu0 IT (21856) 000115e4:0000100115e4_NS f9000be1 O EL1h_n : STR x1,[sp,#0x10] +21892 clk cpu0 MW8 03700540:000000f00540_NS 00000000_03700768 +21893 clk cpu0 IT (21857) 000115e8:0000100115e8_NS 39003fe2 O EL1h_n : STRB w2,[sp,#0xf] +21893 clk cpu0 MW1 0370053f:000000f0053f_NS 20 +21894 clk cpu0 IT (21858) 000115ec:0000100115ec_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21894 clk cpu0 MW1 0370053e:000000f0053e_NS 00 +21895 clk cpu0 IT (21859) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21895 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +21895 clk cpu0 R X8 0000000000000000 +21896 clk cpu0 IT (21860) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21896 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +21896 clk cpu0 R X9 0000000000000020 +21897 clk cpu0 IT (21861) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21897 clk cpu0 R cpsr 820003c5 +21898 clk cpu0 IT (21862) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21898 clk cpu0 R X8 0000000000000001 +21899 clk cpu0 IT (21863) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21900 clk cpu0 IT (21864) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21900 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +21900 clk cpu0 R X8 0000000003700768 +21901 clk cpu0 IT (21865) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21901 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +21901 clk cpu0 R X9 0000000000000000 +21902 clk cpu0 IT (21866) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21902 clk cpu0 R X10 0000000000000000 +21903 clk cpu0 IT (21867) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21903 clk cpu0 R X10 0000000000000000 +21904 clk cpu0 IT (21868) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21904 clk cpu0 R X8 0000000003700768 +21905 clk cpu0 IT (21869) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21905 clk cpu0 MR1 03700768:000000f00768_NS 00 +21905 clk cpu0 R X9 0000000000000000 +21906 clk cpu0 IT (21870) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21906 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21906 clk cpu0 R X8 0000000003700600 +21907 clk cpu0 IT (21871) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21907 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000068 +21907 clk cpu0 R X8 0000000023000068 +21908 clk cpu0 IT (21872) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21908 clk cpu0 MW1 23000068:000016240068_NS 00 +21909 clk cpu0 IT (21873) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21909 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21909 clk cpu0 R X8 0000000003700600 +21910 clk cpu0 IT (21874) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21910 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000068 +21910 clk cpu0 R X10 0000000023000068 +21911 clk cpu0 IT (21875) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21911 clk cpu0 R X11 0000000000000001 +21912 clk cpu0 IT (21876) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21912 clk cpu0 R X10 0000000023000069 +21913 clk cpu0 IT (21877) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21913 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000069 +21914 clk cpu0 IT (21878) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21914 clk cpu0 MR1 0370053e:000000f0053e_NS 00 +21914 clk cpu0 R X8 0000000000000000 +21915 clk cpu0 IT (21879) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21915 clk cpu0 R X8 0000000000000001 +21916 clk cpu0 IT (21880) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21916 clk cpu0 MW1 0370053e:000000f0053e_NS 01 +21917 clk cpu0 IT (21881) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21918 clk cpu0 IT (21882) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21918 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +21918 clk cpu0 R X8 0000000000000001 +21919 clk cpu0 IT (21883) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21919 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +21919 clk cpu0 R X9 0000000000000020 +21920 clk cpu0 IT (21884) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21920 clk cpu0 R cpsr 820003c5 +21921 clk cpu0 IT (21885) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21921 clk cpu0 R X8 0000000000000001 +21922 clk cpu0 IT (21886) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21923 clk cpu0 IT (21887) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21923 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +21923 clk cpu0 R X8 0000000003700768 +21924 clk cpu0 IT (21888) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21924 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +21924 clk cpu0 R X9 0000000000000001 +21925 clk cpu0 IT (21889) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21925 clk cpu0 R X10 0000000000000001 +21926 clk cpu0 IT (21890) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21926 clk cpu0 R X10 0000000000000001 +21927 clk cpu0 IT (21891) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21927 clk cpu0 R X8 0000000003700769 +21928 clk cpu0 IT (21892) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21928 clk cpu0 MR1 03700769:000000f00769_NS 00 +21928 clk cpu0 R X9 0000000000000000 +21929 clk cpu0 IT (21893) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21929 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21929 clk cpu0 R X8 0000000003700600 +21930 clk cpu0 IT (21894) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21930 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000069 +21930 clk cpu0 R X8 0000000023000069 +21931 clk cpu0 IT (21895) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21931 clk cpu0 MW1 23000069:000016240069_NS 00 +21932 clk cpu0 IT (21896) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21932 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21932 clk cpu0 R X8 0000000003700600 +21933 clk cpu0 IT (21897) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21933 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000069 +21933 clk cpu0 R X10 0000000023000069 +21934 clk cpu0 IT (21898) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21934 clk cpu0 R X11 0000000000000001 +21935 clk cpu0 IT (21899) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21935 clk cpu0 R X10 000000002300006A +21936 clk cpu0 IT (21900) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21936 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300006a +21937 clk cpu0 IT (21901) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21937 clk cpu0 MR1 0370053e:000000f0053e_NS 01 +21937 clk cpu0 R X8 0000000000000001 +21938 clk cpu0 IT (21902) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21938 clk cpu0 R X8 0000000000000002 +21939 clk cpu0 IT (21903) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21939 clk cpu0 MW1 0370053e:000000f0053e_NS 02 +21940 clk cpu0 IT (21904) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21941 clk cpu0 IT (21905) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21941 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +21941 clk cpu0 R X8 0000000000000002 +21942 clk cpu0 IT (21906) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21942 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +21942 clk cpu0 R X9 0000000000000020 +21943 clk cpu0 IT (21907) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21943 clk cpu0 R cpsr 820003c5 +21944 clk cpu0 IT (21908) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21944 clk cpu0 R X8 0000000000000001 +21945 clk cpu0 IT (21909) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21946 clk cpu0 IT (21910) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21946 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +21946 clk cpu0 R X8 0000000003700768 +21947 clk cpu0 IT (21911) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21947 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +21947 clk cpu0 R X9 0000000000000002 +21948 clk cpu0 IT (21912) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21948 clk cpu0 R X10 0000000000000002 +21949 clk cpu0 IT (21913) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21949 clk cpu0 R X10 0000000000000002 +21950 clk cpu0 IT (21914) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21950 clk cpu0 R X8 000000000370076A +21951 clk cpu0 IT (21915) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21951 clk cpu0 MR1 0370076a:000000f0076a_NS 00 +21951 clk cpu0 R X9 0000000000000000 +21952 clk cpu0 IT (21916) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21952 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21952 clk cpu0 R X8 0000000003700600 +21953 clk cpu0 IT (21917) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21953 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006a +21953 clk cpu0 R X8 000000002300006A +21954 clk cpu0 IT (21918) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21954 clk cpu0 MW1 2300006a:00001624006a_NS 00 +21955 clk cpu0 IT (21919) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21955 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21955 clk cpu0 R X8 0000000003700600 +21956 clk cpu0 IT (21920) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21956 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006a +21956 clk cpu0 R X10 000000002300006A +21957 clk cpu0 IT (21921) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21957 clk cpu0 R X11 0000000000000001 +21958 clk cpu0 IT (21922) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21958 clk cpu0 R X10 000000002300006B +21959 clk cpu0 IT (21923) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21959 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300006b +21960 clk cpu0 IT (21924) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21960 clk cpu0 MR1 0370053e:000000f0053e_NS 02 +21960 clk cpu0 R X8 0000000000000002 +21961 clk cpu0 IT (21925) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21961 clk cpu0 R X8 0000000000000003 +21962 clk cpu0 IT (21926) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21962 clk cpu0 MW1 0370053e:000000f0053e_NS 03 +21963 clk cpu0 IT (21927) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21964 clk cpu0 IT (21928) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21964 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +21964 clk cpu0 R X8 0000000000000003 +21965 clk cpu0 IT (21929) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21965 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +21965 clk cpu0 R X9 0000000000000020 +21966 clk cpu0 IT (21930) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21966 clk cpu0 R cpsr 820003c5 +21967 clk cpu0 IT (21931) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21967 clk cpu0 R X8 0000000000000001 +21968 clk cpu0 IT (21932) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21969 clk cpu0 IT (21933) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21969 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +21969 clk cpu0 R X8 0000000003700768 +21970 clk cpu0 IT (21934) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21970 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +21970 clk cpu0 R X9 0000000000000003 +21971 clk cpu0 IT (21935) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21971 clk cpu0 R X10 0000000000000003 +21972 clk cpu0 IT (21936) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21972 clk cpu0 R X10 0000000000000003 +21973 clk cpu0 IT (21937) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21973 clk cpu0 R X8 000000000370076B +21974 clk cpu0 IT (21938) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21974 clk cpu0 MR1 0370076b:000000f0076b_NS 00 +21974 clk cpu0 R X9 0000000000000000 +21975 clk cpu0 IT (21939) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21975 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21975 clk cpu0 R X8 0000000003700600 +21976 clk cpu0 IT (21940) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21976 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006b +21976 clk cpu0 R X8 000000002300006B +21977 clk cpu0 IT (21941) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +21977 clk cpu0 MW1 2300006b:00001624006b_NS 00 +21978 clk cpu0 IT (21942) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21978 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21978 clk cpu0 R X8 0000000003700600 +21979 clk cpu0 IT (21943) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +21979 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006b +21979 clk cpu0 R X10 000000002300006B +21980 clk cpu0 IT (21944) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +21980 clk cpu0 R X11 0000000000000001 +21981 clk cpu0 IT (21945) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +21981 clk cpu0 R X10 000000002300006C +21982 clk cpu0 IT (21946) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +21982 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300006c +21983 clk cpu0 IT (21947) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21983 clk cpu0 MR1 0370053e:000000f0053e_NS 03 +21983 clk cpu0 R X8 0000000000000003 +21984 clk cpu0 IT (21948) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +21984 clk cpu0 R X8 0000000000000004 +21985 clk cpu0 IT (21949) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +21985 clk cpu0 MW1 0370053e:000000f0053e_NS 04 +21986 clk cpu0 IT (21950) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +21987 clk cpu0 IT (21951) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +21987 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +21987 clk cpu0 R X8 0000000000000004 +21988 clk cpu0 IT (21952) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +21988 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +21988 clk cpu0 R X9 0000000000000020 +21989 clk cpu0 IT (21953) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +21989 clk cpu0 R cpsr 820003c5 +21990 clk cpu0 IT (21954) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +21990 clk cpu0 R X8 0000000000000001 +21991 clk cpu0 IT (21955) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +21992 clk cpu0 IT (21956) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +21992 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +21992 clk cpu0 R X8 0000000003700768 +21993 clk cpu0 IT (21957) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +21993 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +21993 clk cpu0 R X9 0000000000000004 +21994 clk cpu0 IT (21958) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +21994 clk cpu0 R X10 0000000000000004 +21995 clk cpu0 IT (21959) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +21995 clk cpu0 R X10 0000000000000004 +21996 clk cpu0 IT (21960) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +21996 clk cpu0 R X8 000000000370076C +21997 clk cpu0 IT (21961) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +21997 clk cpu0 MR1 0370076c:000000f0076c_NS 00 +21997 clk cpu0 R X9 0000000000000000 +21998 clk cpu0 IT (21962) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +21998 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +21998 clk cpu0 R X8 0000000003700600 +21999 clk cpu0 IT (21963) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +21999 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006c +21999 clk cpu0 R X8 000000002300006C +22000 clk cpu0 IT (21964) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22000 clk cpu0 MW1 2300006c:00001624006c_NS 00 +22001 clk cpu0 IT (21965) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22001 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22001 clk cpu0 R X8 0000000003700600 +22002 clk cpu0 IT (21966) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22002 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006c +22002 clk cpu0 R X10 000000002300006C +22003 clk cpu0 IT (21967) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22003 clk cpu0 R X11 0000000000000001 +22004 clk cpu0 IT (21968) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22004 clk cpu0 R X10 000000002300006D +22005 clk cpu0 IT (21969) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22005 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300006d +22006 clk cpu0 IT (21970) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22006 clk cpu0 MR1 0370053e:000000f0053e_NS 04 +22006 clk cpu0 R X8 0000000000000004 +22007 clk cpu0 IT (21971) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22007 clk cpu0 R X8 0000000000000005 +22008 clk cpu0 IT (21972) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22008 clk cpu0 MW1 0370053e:000000f0053e_NS 05 +22009 clk cpu0 IT (21973) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22010 clk cpu0 IT (21974) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22010 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +22010 clk cpu0 R X8 0000000000000005 +22011 clk cpu0 IT (21975) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22011 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22011 clk cpu0 R X9 0000000000000020 +22012 clk cpu0 IT (21976) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22012 clk cpu0 R cpsr 820003c5 +22013 clk cpu0 IT (21977) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22013 clk cpu0 R X8 0000000000000001 +22014 clk cpu0 IT (21978) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22015 clk cpu0 IT (21979) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22015 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22015 clk cpu0 R X8 0000000003700768 +22016 clk cpu0 IT (21980) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22016 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +22016 clk cpu0 R X9 0000000000000005 +22017 clk cpu0 IT (21981) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22017 clk cpu0 R X10 0000000000000005 +22018 clk cpu0 IT (21982) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22018 clk cpu0 R X10 0000000000000005 +22019 clk cpu0 IT (21983) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22019 clk cpu0 R X8 000000000370076D +22020 clk cpu0 IT (21984) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22020 clk cpu0 MR1 0370076d:000000f0076d_NS 00 +22020 clk cpu0 R X9 0000000000000000 +22021 clk cpu0 IT (21985) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22021 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22021 clk cpu0 R X8 0000000003700600 +22022 clk cpu0 IT (21986) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22022 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006d +22022 clk cpu0 R X8 000000002300006D +22023 clk cpu0 IT (21987) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22023 clk cpu0 MW1 2300006d:00001624006d_NS 00 +22024 clk cpu0 IT (21988) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22024 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22024 clk cpu0 R X8 0000000003700600 +22025 clk cpu0 IT (21989) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22025 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006d +22025 clk cpu0 R X10 000000002300006D +22026 clk cpu0 IT (21990) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22026 clk cpu0 R X11 0000000000000001 +22027 clk cpu0 IT (21991) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22027 clk cpu0 R X10 000000002300006E +22028 clk cpu0 IT (21992) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22028 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300006e +22029 clk cpu0 IT (21993) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22029 clk cpu0 MR1 0370053e:000000f0053e_NS 05 +22029 clk cpu0 R X8 0000000000000005 +22030 clk cpu0 IT (21994) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22030 clk cpu0 R X8 0000000000000006 +22031 clk cpu0 IT (21995) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22031 clk cpu0 MW1 0370053e:000000f0053e_NS 06 +22032 clk cpu0 IT (21996) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22033 clk cpu0 IT (21997) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22033 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +22033 clk cpu0 R X8 0000000000000006 +22034 clk cpu0 IT (21998) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22034 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22034 clk cpu0 R X9 0000000000000020 +22035 clk cpu0 IT (21999) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22035 clk cpu0 R cpsr 820003c5 +22036 clk cpu0 IT (22000) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22036 clk cpu0 R X8 0000000000000001 +22037 clk cpu0 IT (22001) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22038 clk cpu0 IT (22002) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22038 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22038 clk cpu0 R X8 0000000003700768 +22039 clk cpu0 IT (22003) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22039 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +22039 clk cpu0 R X9 0000000000000006 +22040 clk cpu0 IT (22004) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22040 clk cpu0 R X10 0000000000000006 +22041 clk cpu0 IT (22005) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22041 clk cpu0 R X10 0000000000000006 +22042 clk cpu0 IT (22006) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22042 clk cpu0 R X8 000000000370076E +22043 clk cpu0 IT (22007) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22043 clk cpu0 MR1 0370076e:000000f0076e_NS 00 +22043 clk cpu0 R X9 0000000000000000 +22044 clk cpu0 IT (22008) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22044 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22044 clk cpu0 R X8 0000000003700600 +22045 clk cpu0 IT (22009) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22045 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006e +22045 clk cpu0 R X8 000000002300006E +22046 clk cpu0 IT (22010) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22046 clk cpu0 MW1 2300006e:00001624006e_NS 00 +22047 clk cpu0 IT (22011) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22047 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22047 clk cpu0 R X8 0000000003700600 +22048 clk cpu0 IT (22012) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22048 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006e +22048 clk cpu0 R X10 000000002300006E +22049 clk cpu0 IT (22013) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22049 clk cpu0 R X11 0000000000000001 +22050 clk cpu0 IT (22014) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22050 clk cpu0 R X10 000000002300006F +22051 clk cpu0 IT (22015) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22051 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300006f +22052 clk cpu0 IT (22016) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22052 clk cpu0 MR1 0370053e:000000f0053e_NS 06 +22052 clk cpu0 R X8 0000000000000006 +22053 clk cpu0 IT (22017) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22053 clk cpu0 R X8 0000000000000007 +22054 clk cpu0 IT (22018) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22054 clk cpu0 MW1 0370053e:000000f0053e_NS 07 +22055 clk cpu0 IT (22019) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22056 clk cpu0 IT (22020) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22056 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +22056 clk cpu0 R X8 0000000000000007 +22057 clk cpu0 IT (22021) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22057 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22057 clk cpu0 R X9 0000000000000020 +22058 clk cpu0 IT (22022) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22058 clk cpu0 R cpsr 820003c5 +22059 clk cpu0 IT (22023) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22059 clk cpu0 R X8 0000000000000001 +22060 clk cpu0 IT (22024) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22061 clk cpu0 IT (22025) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22061 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22061 clk cpu0 R X8 0000000003700768 +22062 clk cpu0 IT (22026) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22062 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +22062 clk cpu0 R X9 0000000000000007 +22063 clk cpu0 IT (22027) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22063 clk cpu0 R X10 0000000000000007 +22064 clk cpu0 IT (22028) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22064 clk cpu0 R X10 0000000000000007 +22065 clk cpu0 IT (22029) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22065 clk cpu0 R X8 000000000370076F +22066 clk cpu0 IT (22030) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22066 clk cpu0 MR1 0370076f:000000f0076f_NS 00 +22066 clk cpu0 R X9 0000000000000000 +22067 clk cpu0 IT (22031) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22067 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22067 clk cpu0 R X8 0000000003700600 +22068 clk cpu0 IT (22032) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22068 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006f +22068 clk cpu0 R X8 000000002300006F +22069 clk cpu0 IT (22033) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22069 clk cpu0 MW1 2300006f:00001624006f_NS 00 +22070 clk cpu0 IT (22034) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22070 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22070 clk cpu0 R X8 0000000003700600 +22071 clk cpu0 IT (22035) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22071 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300006f +22071 clk cpu0 R X10 000000002300006F +22072 clk cpu0 IT (22036) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22072 clk cpu0 R X11 0000000000000001 +22073 clk cpu0 IT (22037) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22073 clk cpu0 R X10 0000000023000070 +22074 clk cpu0 IT (22038) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22074 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000070 +22075 clk cpu0 IT (22039) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22075 clk cpu0 MR1 0370053e:000000f0053e_NS 07 +22075 clk cpu0 R X8 0000000000000007 +22076 clk cpu0 IT (22040) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22076 clk cpu0 R X8 0000000000000008 +22077 clk cpu0 IT (22041) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22077 clk cpu0 MW1 0370053e:000000f0053e_NS 08 +22078 clk cpu0 IT (22042) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22079 clk cpu0 IT (22043) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22079 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +22079 clk cpu0 R X8 0000000000000008 +22080 clk cpu0 IT (22044) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22080 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22080 clk cpu0 R X9 0000000000000020 +22081 clk cpu0 IT (22045) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22081 clk cpu0 R cpsr 820003c5 +22082 clk cpu0 IT (22046) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22082 clk cpu0 R X8 0000000000000001 +22083 clk cpu0 IT (22047) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22084 clk cpu0 IT (22048) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22084 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22084 clk cpu0 R X8 0000000003700768 +22085 clk cpu0 IT (22049) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22085 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +22085 clk cpu0 R X9 0000000000000008 +22086 clk cpu0 IT (22050) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22086 clk cpu0 R X10 0000000000000008 +22087 clk cpu0 IT (22051) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22087 clk cpu0 R X10 0000000000000008 +22088 clk cpu0 IT (22052) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22088 clk cpu0 R X8 0000000003700770 +22089 clk cpu0 IT (22053) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22089 clk cpu0 MR1 03700770:000000f00770_NS 00 +22089 clk cpu0 R X9 0000000000000000 +22090 clk cpu0 IT (22054) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22090 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22090 clk cpu0 R X8 0000000003700600 +22091 clk cpu0 IT (22055) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22091 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000070 +22091 clk cpu0 R X8 0000000023000070 +22092 clk cpu0 IT (22056) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22092 clk cpu0 MW1 23000070:000016240070_NS 00 +22093 clk cpu0 IT (22057) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22093 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22093 clk cpu0 R X8 0000000003700600 +22094 clk cpu0 IT (22058) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22094 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000070 +22094 clk cpu0 R X10 0000000023000070 +22095 clk cpu0 IT (22059) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22095 clk cpu0 R X11 0000000000000001 +22096 clk cpu0 IT (22060) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22096 clk cpu0 R X10 0000000023000071 +22097 clk cpu0 IT (22061) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22097 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000071 +22098 clk cpu0 IT (22062) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22098 clk cpu0 MR1 0370053e:000000f0053e_NS 08 +22098 clk cpu0 R X8 0000000000000008 +22099 clk cpu0 IT (22063) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22099 clk cpu0 R X8 0000000000000009 +22100 clk cpu0 IT (22064) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22100 clk cpu0 MW1 0370053e:000000f0053e_NS 09 +22101 clk cpu0 IT (22065) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22102 clk cpu0 IT (22066) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22102 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +22102 clk cpu0 R X8 0000000000000009 +22103 clk cpu0 IT (22067) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22103 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22103 clk cpu0 R X9 0000000000000020 +22104 clk cpu0 IT (22068) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22104 clk cpu0 R cpsr 820003c5 +22105 clk cpu0 IT (22069) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22105 clk cpu0 R X8 0000000000000001 +22106 clk cpu0 IT (22070) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22107 clk cpu0 IT (22071) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22107 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22107 clk cpu0 R X8 0000000003700768 +22108 clk cpu0 IT (22072) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22108 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +22108 clk cpu0 R X9 0000000000000009 +22109 clk cpu0 IT (22073) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22109 clk cpu0 R X10 0000000000000009 +22110 clk cpu0 IT (22074) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22110 clk cpu0 R X10 0000000000000009 +22111 clk cpu0 IT (22075) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22111 clk cpu0 R X8 0000000003700771 +22112 clk cpu0 IT (22076) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22112 clk cpu0 MR1 03700771:000000f00771_NS 00 +22112 clk cpu0 R X9 0000000000000000 +22113 clk cpu0 IT (22077) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22113 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22113 clk cpu0 R X8 0000000003700600 +22114 clk cpu0 IT (22078) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22114 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000071 +22114 clk cpu0 R X8 0000000023000071 +22115 clk cpu0 IT (22079) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22115 clk cpu0 MW1 23000071:000016240071_NS 00 +22116 clk cpu0 IT (22080) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22116 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22116 clk cpu0 R X8 0000000003700600 +22117 clk cpu0 IT (22081) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22117 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000071 +22117 clk cpu0 R X10 0000000023000071 +22118 clk cpu0 IT (22082) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22118 clk cpu0 R X11 0000000000000001 +22119 clk cpu0 IT (22083) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22119 clk cpu0 R X10 0000000023000072 +22120 clk cpu0 IT (22084) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22120 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000072 +22121 clk cpu0 IT (22085) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22121 clk cpu0 MR1 0370053e:000000f0053e_NS 09 +22121 clk cpu0 R X8 0000000000000009 +22122 clk cpu0 IT (22086) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22122 clk cpu0 R X8 000000000000000A +22123 clk cpu0 IT (22087) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22123 clk cpu0 MW1 0370053e:000000f0053e_NS 0a +22124 clk cpu0 IT (22088) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22125 clk cpu0 IT (22089) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22125 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +22125 clk cpu0 R X8 000000000000000A +22126 clk cpu0 IT (22090) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22126 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22126 clk cpu0 R X9 0000000000000020 +22127 clk cpu0 IT (22091) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22127 clk cpu0 R cpsr 820003c5 +22128 clk cpu0 IT (22092) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22128 clk cpu0 R X8 0000000000000001 +22129 clk cpu0 IT (22093) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22130 clk cpu0 IT (22094) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22130 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22130 clk cpu0 R X8 0000000003700768 +22131 clk cpu0 IT (22095) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22131 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +22131 clk cpu0 R X9 000000000000000A +22132 clk cpu0 IT (22096) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22132 clk cpu0 R X10 000000000000000A +22133 clk cpu0 IT (22097) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22133 clk cpu0 R X10 000000000000000A +22134 clk cpu0 IT (22098) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22134 clk cpu0 R X8 0000000003700772 +22135 clk cpu0 IT (22099) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22135 clk cpu0 MR1 03700772:000000f00772_NS 00 +22135 clk cpu0 R X9 0000000000000000 +22136 clk cpu0 IT (22100) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22136 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22136 clk cpu0 R X8 0000000003700600 +22137 clk cpu0 IT (22101) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22137 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000072 +22137 clk cpu0 R X8 0000000023000072 +22138 clk cpu0 IT (22102) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22138 clk cpu0 MW1 23000072:000016240072_NS 00 +22139 clk cpu0 IT (22103) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22139 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22139 clk cpu0 R X8 0000000003700600 +22140 clk cpu0 IT (22104) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22140 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000072 +22140 clk cpu0 R X10 0000000023000072 +22141 clk cpu0 IT (22105) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22141 clk cpu0 R X11 0000000000000001 +22142 clk cpu0 IT (22106) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22142 clk cpu0 R X10 0000000023000073 +22143 clk cpu0 IT (22107) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22143 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000073 +22144 clk cpu0 IT (22108) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22144 clk cpu0 MR1 0370053e:000000f0053e_NS 0a +22144 clk cpu0 R X8 000000000000000A +22145 clk cpu0 IT (22109) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22145 clk cpu0 R X8 000000000000000B +22146 clk cpu0 IT (22110) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22146 clk cpu0 MW1 0370053e:000000f0053e_NS 0b +22147 clk cpu0 IT (22111) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22148 clk cpu0 IT (22112) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22148 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +22148 clk cpu0 R X8 000000000000000B +22149 clk cpu0 IT (22113) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22149 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22149 clk cpu0 R X9 0000000000000020 +22150 clk cpu0 IT (22114) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22150 clk cpu0 R cpsr 820003c5 +22151 clk cpu0 IT (22115) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22151 clk cpu0 R X8 0000000000000001 +22152 clk cpu0 IT (22116) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22153 clk cpu0 IT (22117) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22153 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22153 clk cpu0 R X8 0000000003700768 +22154 clk cpu0 IT (22118) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22154 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +22154 clk cpu0 R X9 000000000000000B +22155 clk cpu0 IT (22119) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22155 clk cpu0 R X10 000000000000000B +22156 clk cpu0 IT (22120) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22156 clk cpu0 R X10 000000000000000B +22157 clk cpu0 IT (22121) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22157 clk cpu0 R X8 0000000003700773 +22158 clk cpu0 IT (22122) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22158 clk cpu0 MR1 03700773:000000f00773_NS 00 +22158 clk cpu0 R X9 0000000000000000 +22159 clk cpu0 IT (22123) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22159 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22159 clk cpu0 R X8 0000000003700600 +22160 clk cpu0 IT (22124) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22160 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000073 +22160 clk cpu0 R X8 0000000023000073 +22161 clk cpu0 IT (22125) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22161 clk cpu0 MW1 23000073:000016240073_NS 00 +22162 clk cpu0 IT (22126) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22162 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22162 clk cpu0 R X8 0000000003700600 +22163 clk cpu0 IT (22127) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22163 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000073 +22163 clk cpu0 R X10 0000000023000073 +22164 clk cpu0 IT (22128) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22164 clk cpu0 R X11 0000000000000001 +22165 clk cpu0 IT (22129) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22165 clk cpu0 R X10 0000000023000074 +22166 clk cpu0 IT (22130) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22166 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000074 +22167 clk cpu0 IT (22131) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22167 clk cpu0 MR1 0370053e:000000f0053e_NS 0b +22167 clk cpu0 R X8 000000000000000B +22168 clk cpu0 IT (22132) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22168 clk cpu0 R X8 000000000000000C +22169 clk cpu0 IT (22133) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22169 clk cpu0 MW1 0370053e:000000f0053e_NS 0c +22170 clk cpu0 IT (22134) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22171 clk cpu0 IT (22135) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22171 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +22171 clk cpu0 R X8 000000000000000C +22172 clk cpu0 IT (22136) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22172 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22172 clk cpu0 R X9 0000000000000020 +22173 clk cpu0 IT (22137) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22173 clk cpu0 R cpsr 820003c5 +22174 clk cpu0 IT (22138) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22174 clk cpu0 R X8 0000000000000001 +22175 clk cpu0 IT (22139) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22176 clk cpu0 IT (22140) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22176 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22176 clk cpu0 R X8 0000000003700768 +22177 clk cpu0 IT (22141) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22177 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +22177 clk cpu0 R X9 000000000000000C +22178 clk cpu0 IT (22142) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22178 clk cpu0 R X10 000000000000000C +22179 clk cpu0 IT (22143) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22179 clk cpu0 R X10 000000000000000C +22180 clk cpu0 IT (22144) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22180 clk cpu0 R X8 0000000003700774 +22181 clk cpu0 IT (22145) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22181 clk cpu0 MR1 03700774:000000f00774_NS 00 +22181 clk cpu0 R X9 0000000000000000 +22182 clk cpu0 IT (22146) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22182 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22182 clk cpu0 R X8 0000000003700600 +22183 clk cpu0 IT (22147) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22183 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000074 +22183 clk cpu0 R X8 0000000023000074 +22184 clk cpu0 IT (22148) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22184 clk cpu0 MW1 23000074:000016240074_NS 00 +22185 clk cpu0 IT (22149) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22185 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22185 clk cpu0 R X8 0000000003700600 +22186 clk cpu0 IT (22150) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22186 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000074 +22186 clk cpu0 R X10 0000000023000074 +22187 clk cpu0 IT (22151) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22187 clk cpu0 R X11 0000000000000001 +22188 clk cpu0 IT (22152) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22188 clk cpu0 R X10 0000000023000075 +22189 clk cpu0 IT (22153) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22189 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000075 +22190 clk cpu0 IT (22154) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22190 clk cpu0 MR1 0370053e:000000f0053e_NS 0c +22190 clk cpu0 R X8 000000000000000C +22191 clk cpu0 IT (22155) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22191 clk cpu0 R X8 000000000000000D +22192 clk cpu0 IT (22156) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22192 clk cpu0 MW1 0370053e:000000f0053e_NS 0d +22193 clk cpu0 IT (22157) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22194 clk cpu0 IT (22158) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22194 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +22194 clk cpu0 R X8 000000000000000D +22195 clk cpu0 IT (22159) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22195 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22195 clk cpu0 R X9 0000000000000020 +22196 clk cpu0 IT (22160) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22196 clk cpu0 R cpsr 820003c5 +22197 clk cpu0 IT (22161) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22197 clk cpu0 R X8 0000000000000001 +22198 clk cpu0 IT (22162) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22199 clk cpu0 IT (22163) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22199 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22199 clk cpu0 R X8 0000000003700768 +22200 clk cpu0 IT (22164) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22200 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +22200 clk cpu0 R X9 000000000000000D +22201 clk cpu0 IT (22165) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22201 clk cpu0 R X10 000000000000000D +22202 clk cpu0 IT (22166) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22202 clk cpu0 R X10 000000000000000D +22203 clk cpu0 IT (22167) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22203 clk cpu0 R X8 0000000003700775 +22204 clk cpu0 IT (22168) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22204 clk cpu0 MR1 03700775:000000f00775_NS 00 +22204 clk cpu0 R X9 0000000000000000 +22205 clk cpu0 IT (22169) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22205 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22205 clk cpu0 R X8 0000000003700600 +22206 clk cpu0 IT (22170) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22206 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000075 +22206 clk cpu0 R X8 0000000023000075 +22207 clk cpu0 IT (22171) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22207 clk cpu0 MW1 23000075:000016240075_NS 00 +22208 clk cpu0 IT (22172) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22208 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22208 clk cpu0 R X8 0000000003700600 +22209 clk cpu0 IT (22173) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22209 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000075 +22209 clk cpu0 R X10 0000000023000075 +22210 clk cpu0 IT (22174) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22210 clk cpu0 R X11 0000000000000001 +22211 clk cpu0 IT (22175) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22211 clk cpu0 R X10 0000000023000076 +22212 clk cpu0 IT (22176) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22212 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000076 +22213 clk cpu0 IT (22177) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22213 clk cpu0 MR1 0370053e:000000f0053e_NS 0d +22213 clk cpu0 R X8 000000000000000D +22214 clk cpu0 IT (22178) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22214 clk cpu0 R X8 000000000000000E +22215 clk cpu0 IT (22179) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22215 clk cpu0 MW1 0370053e:000000f0053e_NS 0e +22216 clk cpu0 IT (22180) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22217 clk cpu0 IT (22181) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22217 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +22217 clk cpu0 R X8 000000000000000E +22218 clk cpu0 IT (22182) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22218 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22218 clk cpu0 R X9 0000000000000020 +22219 clk cpu0 IT (22183) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22219 clk cpu0 R cpsr 820003c5 +22220 clk cpu0 IT (22184) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22220 clk cpu0 R X8 0000000000000001 +22221 clk cpu0 IT (22185) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22222 clk cpu0 IT (22186) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22222 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22222 clk cpu0 R X8 0000000003700768 +22223 clk cpu0 IT (22187) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22223 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +22223 clk cpu0 R X9 000000000000000E +22224 clk cpu0 IT (22188) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22224 clk cpu0 R X10 000000000000000E +22225 clk cpu0 IT (22189) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22225 clk cpu0 R X10 000000000000000E +22226 clk cpu0 IT (22190) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22226 clk cpu0 R X8 0000000003700776 +22227 clk cpu0 IT (22191) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22227 clk cpu0 MR1 03700776:000000f00776_NS 00 +22227 clk cpu0 R X9 0000000000000000 +22228 clk cpu0 IT (22192) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22228 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22228 clk cpu0 R X8 0000000003700600 +22229 clk cpu0 IT (22193) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22229 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000076 +22229 clk cpu0 R X8 0000000023000076 +22230 clk cpu0 IT (22194) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22230 clk cpu0 MW1 23000076:000016240076_NS 00 +22231 clk cpu0 IT (22195) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22231 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22231 clk cpu0 R X8 0000000003700600 +22232 clk cpu0 IT (22196) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22232 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000076 +22232 clk cpu0 R X10 0000000023000076 +22233 clk cpu0 IT (22197) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22233 clk cpu0 R X11 0000000000000001 +22234 clk cpu0 IT (22198) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22234 clk cpu0 R X10 0000000023000077 +22235 clk cpu0 IT (22199) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22235 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000077 +22236 clk cpu0 IT (22200) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22236 clk cpu0 MR1 0370053e:000000f0053e_NS 0e +22236 clk cpu0 R X8 000000000000000E +22237 clk cpu0 IT (22201) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22237 clk cpu0 R X8 000000000000000F +22238 clk cpu0 IT (22202) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22238 clk cpu0 MW1 0370053e:000000f0053e_NS 0f +22239 clk cpu0 IT (22203) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22240 clk cpu0 IT (22204) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22240 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +22240 clk cpu0 R X8 000000000000000F +22241 clk cpu0 IT (22205) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22241 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22241 clk cpu0 R X9 0000000000000020 +22242 clk cpu0 IT (22206) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22242 clk cpu0 R cpsr 820003c5 +22243 clk cpu0 IT (22207) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22243 clk cpu0 R X8 0000000000000001 +22244 clk cpu0 IT (22208) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22245 clk cpu0 IT (22209) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22245 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22245 clk cpu0 R X8 0000000003700768 +22246 clk cpu0 IT (22210) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22246 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +22246 clk cpu0 R X9 000000000000000F +22247 clk cpu0 IT (22211) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22247 clk cpu0 R X10 000000000000000F +22248 clk cpu0 IT (22212) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22248 clk cpu0 R X10 000000000000000F +22249 clk cpu0 IT (22213) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22249 clk cpu0 R X8 0000000003700777 +22250 clk cpu0 IT (22214) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22250 clk cpu0 MR1 03700777:000000f00777_NS 00 +22250 clk cpu0 R X9 0000000000000000 +22251 clk cpu0 IT (22215) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22251 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22251 clk cpu0 R X8 0000000003700600 +22252 clk cpu0 IT (22216) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22252 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000077 +22252 clk cpu0 R X8 0000000023000077 +22253 clk cpu0 IT (22217) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22253 clk cpu0 MW1 23000077:000016240077_NS 00 +22254 clk cpu0 IT (22218) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22254 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22254 clk cpu0 R X8 0000000003700600 +22255 clk cpu0 IT (22219) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22255 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000077 +22255 clk cpu0 R X10 0000000023000077 +22256 clk cpu0 IT (22220) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22256 clk cpu0 R X11 0000000000000001 +22257 clk cpu0 IT (22221) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22257 clk cpu0 R X10 0000000023000078 +22258 clk cpu0 IT (22222) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22258 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000078 +22259 clk cpu0 IT (22223) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22259 clk cpu0 MR1 0370053e:000000f0053e_NS 0f +22259 clk cpu0 R X8 000000000000000F +22260 clk cpu0 IT (22224) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22260 clk cpu0 R X8 0000000000000010 +22261 clk cpu0 IT (22225) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22261 clk cpu0 MW1 0370053e:000000f0053e_NS 10 +22262 clk cpu0 IT (22226) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22263 clk cpu0 IT (22227) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22263 clk cpu0 MR1 0370053e:000000f0053e_NS 10 +22263 clk cpu0 R X8 0000000000000010 +22264 clk cpu0 IT (22228) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22264 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22264 clk cpu0 R X9 0000000000000020 +22265 clk cpu0 IT (22229) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22265 clk cpu0 R cpsr 820003c5 +22266 clk cpu0 IT (22230) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22266 clk cpu0 R X8 0000000000000001 +22267 clk cpu0 IT (22231) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22268 clk cpu0 IT (22232) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22268 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22268 clk cpu0 R X8 0000000003700768 +22269 clk cpu0 IT (22233) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22269 clk cpu0 MR1 0370053e:000000f0053e_NS 10 +22269 clk cpu0 R X9 0000000000000010 +22270 clk cpu0 IT (22234) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22270 clk cpu0 R X10 0000000000000010 +22271 clk cpu0 IT (22235) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22271 clk cpu0 R X10 0000000000000010 +22272 clk cpu0 IT (22236) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22272 clk cpu0 R X8 0000000003700778 +22273 clk cpu0 IT (22237) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22273 clk cpu0 MR1 03700778:000000f00778_NS 00 +22273 clk cpu0 R X9 0000000000000000 +22274 clk cpu0 IT (22238) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22274 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22274 clk cpu0 R X8 0000000003700600 +22275 clk cpu0 IT (22239) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22275 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000078 +22275 clk cpu0 R X8 0000000023000078 +22276 clk cpu0 IT (22240) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22276 clk cpu0 MW1 23000078:000016240078_NS 00 +22277 clk cpu0 IT (22241) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22277 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22277 clk cpu0 R X8 0000000003700600 +22278 clk cpu0 IT (22242) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22278 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000078 +22278 clk cpu0 R X10 0000000023000078 +22279 clk cpu0 IT (22243) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22279 clk cpu0 R X11 0000000000000001 +22280 clk cpu0 IT (22244) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22280 clk cpu0 R X10 0000000023000079 +22281 clk cpu0 IT (22245) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22281 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000079 +22282 clk cpu0 IT (22246) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22282 clk cpu0 MR1 0370053e:000000f0053e_NS 10 +22282 clk cpu0 R X8 0000000000000010 +22283 clk cpu0 IT (22247) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22283 clk cpu0 R X8 0000000000000011 +22284 clk cpu0 IT (22248) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22284 clk cpu0 MW1 0370053e:000000f0053e_NS 11 +22285 clk cpu0 IT (22249) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22286 clk cpu0 IT (22250) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22286 clk cpu0 MR1 0370053e:000000f0053e_NS 11 +22286 clk cpu0 R X8 0000000000000011 +22287 clk cpu0 IT (22251) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22287 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22287 clk cpu0 R X9 0000000000000020 +22288 clk cpu0 IT (22252) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22288 clk cpu0 R cpsr 820003c5 +22289 clk cpu0 IT (22253) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22289 clk cpu0 R X8 0000000000000001 +22290 clk cpu0 IT (22254) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22291 clk cpu0 IT (22255) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22291 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22291 clk cpu0 R X8 0000000003700768 +22292 clk cpu0 IT (22256) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22292 clk cpu0 MR1 0370053e:000000f0053e_NS 11 +22292 clk cpu0 R X9 0000000000000011 +22293 clk cpu0 IT (22257) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22293 clk cpu0 R X10 0000000000000011 +22294 clk cpu0 IT (22258) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22294 clk cpu0 R X10 0000000000000011 +22295 clk cpu0 IT (22259) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22295 clk cpu0 R X8 0000000003700779 +22296 clk cpu0 IT (22260) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22296 clk cpu0 MR1 03700779:000000f00779_NS 00 +22296 clk cpu0 R X9 0000000000000000 +22297 clk cpu0 IT (22261) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22297 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22297 clk cpu0 R X8 0000000003700600 +22298 clk cpu0 IT (22262) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22298 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000079 +22298 clk cpu0 R X8 0000000023000079 +22299 clk cpu0 IT (22263) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22299 clk cpu0 MW1 23000079:000016240079_NS 00 +22300 clk cpu0 IT (22264) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22300 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22300 clk cpu0 R X8 0000000003700600 +22301 clk cpu0 IT (22265) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22301 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000079 +22301 clk cpu0 R X10 0000000023000079 +22302 clk cpu0 IT (22266) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22302 clk cpu0 R X11 0000000000000001 +22303 clk cpu0 IT (22267) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22303 clk cpu0 R X10 000000002300007A +22304 clk cpu0 IT (22268) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22304 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300007a +22305 clk cpu0 IT (22269) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22305 clk cpu0 MR1 0370053e:000000f0053e_NS 11 +22305 clk cpu0 R X8 0000000000000011 +22306 clk cpu0 IT (22270) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22306 clk cpu0 R X8 0000000000000012 +22307 clk cpu0 IT (22271) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22307 clk cpu0 MW1 0370053e:000000f0053e_NS 12 +22308 clk cpu0 IT (22272) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22309 clk cpu0 IT (22273) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22309 clk cpu0 MR1 0370053e:000000f0053e_NS 12 +22309 clk cpu0 R X8 0000000000000012 +22310 clk cpu0 IT (22274) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22310 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22310 clk cpu0 R X9 0000000000000020 +22311 clk cpu0 IT (22275) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22311 clk cpu0 R cpsr 820003c5 +22312 clk cpu0 IT (22276) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22312 clk cpu0 R X8 0000000000000001 +22313 clk cpu0 IT (22277) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22314 clk cpu0 IT (22278) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22314 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22314 clk cpu0 R X8 0000000003700768 +22315 clk cpu0 IT (22279) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22315 clk cpu0 MR1 0370053e:000000f0053e_NS 12 +22315 clk cpu0 R X9 0000000000000012 +22316 clk cpu0 IT (22280) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22316 clk cpu0 R X10 0000000000000012 +22317 clk cpu0 IT (22281) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22317 clk cpu0 R X10 0000000000000012 +22318 clk cpu0 IT (22282) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22318 clk cpu0 R X8 000000000370077A +22319 clk cpu0 IT (22283) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22319 clk cpu0 MR1 0370077a:000000f0077a_NS 00 +22319 clk cpu0 R X9 0000000000000000 +22320 clk cpu0 IT (22284) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22320 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22320 clk cpu0 R X8 0000000003700600 +22321 clk cpu0 IT (22285) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22321 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007a +22321 clk cpu0 R X8 000000002300007A +22322 clk cpu0 IT (22286) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22322 clk cpu0 MW1 2300007a:00001624007a_NS 00 +22323 clk cpu0 IT (22287) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22323 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22323 clk cpu0 R X8 0000000003700600 +22324 clk cpu0 IT (22288) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22324 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007a +22324 clk cpu0 R X10 000000002300007A +22325 clk cpu0 IT (22289) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22325 clk cpu0 R X11 0000000000000001 +22326 clk cpu0 IT (22290) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22326 clk cpu0 R X10 000000002300007B +22327 clk cpu0 IT (22291) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22327 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300007b +22328 clk cpu0 IT (22292) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22328 clk cpu0 MR1 0370053e:000000f0053e_NS 12 +22328 clk cpu0 R X8 0000000000000012 +22329 clk cpu0 IT (22293) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22329 clk cpu0 R X8 0000000000000013 +22330 clk cpu0 IT (22294) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22330 clk cpu0 MW1 0370053e:000000f0053e_NS 13 +22331 clk cpu0 IT (22295) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22332 clk cpu0 IT (22296) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22332 clk cpu0 MR1 0370053e:000000f0053e_NS 13 +22332 clk cpu0 R X8 0000000000000013 +22333 clk cpu0 IT (22297) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22333 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22333 clk cpu0 R X9 0000000000000020 +22334 clk cpu0 IT (22298) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22334 clk cpu0 R cpsr 820003c5 +22335 clk cpu0 IT (22299) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22335 clk cpu0 R X8 0000000000000001 +22336 clk cpu0 IT (22300) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22337 clk cpu0 IT (22301) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22337 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22337 clk cpu0 R X8 0000000003700768 +22338 clk cpu0 IT (22302) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22338 clk cpu0 MR1 0370053e:000000f0053e_NS 13 +22338 clk cpu0 R X9 0000000000000013 +22339 clk cpu0 IT (22303) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22339 clk cpu0 R X10 0000000000000013 +22340 clk cpu0 IT (22304) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22340 clk cpu0 R X10 0000000000000013 +22341 clk cpu0 IT (22305) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22341 clk cpu0 R X8 000000000370077B +22342 clk cpu0 IT (22306) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22342 clk cpu0 MR1 0370077b:000000f0077b_NS 00 +22342 clk cpu0 R X9 0000000000000000 +22343 clk cpu0 IT (22307) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22343 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22343 clk cpu0 R X8 0000000003700600 +22344 clk cpu0 IT (22308) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22344 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007b +22344 clk cpu0 R X8 000000002300007B +22345 clk cpu0 IT (22309) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22345 clk cpu0 MW1 2300007b:00001624007b_NS 00 +22346 clk cpu0 IT (22310) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22346 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22346 clk cpu0 R X8 0000000003700600 +22347 clk cpu0 IT (22311) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22347 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007b +22347 clk cpu0 R X10 000000002300007B +22348 clk cpu0 IT (22312) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22348 clk cpu0 R X11 0000000000000001 +22349 clk cpu0 IT (22313) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22349 clk cpu0 R X10 000000002300007C +22350 clk cpu0 IT (22314) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22350 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300007c +22351 clk cpu0 IT (22315) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22351 clk cpu0 MR1 0370053e:000000f0053e_NS 13 +22351 clk cpu0 R X8 0000000000000013 +22352 clk cpu0 IT (22316) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22352 clk cpu0 R X8 0000000000000014 +22353 clk cpu0 IT (22317) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22353 clk cpu0 MW1 0370053e:000000f0053e_NS 14 +22354 clk cpu0 IT (22318) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22355 clk cpu0 IT (22319) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22355 clk cpu0 MR1 0370053e:000000f0053e_NS 14 +22355 clk cpu0 R X8 0000000000000014 +22356 clk cpu0 IT (22320) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22356 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22356 clk cpu0 R X9 0000000000000020 +22357 clk cpu0 IT (22321) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22357 clk cpu0 R cpsr 820003c5 +22358 clk cpu0 IT (22322) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22358 clk cpu0 R X8 0000000000000001 +22359 clk cpu0 IT (22323) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22360 clk cpu0 IT (22324) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22360 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22360 clk cpu0 R X8 0000000003700768 +22361 clk cpu0 IT (22325) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22361 clk cpu0 MR1 0370053e:000000f0053e_NS 14 +22361 clk cpu0 R X9 0000000000000014 +22362 clk cpu0 IT (22326) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22362 clk cpu0 R X10 0000000000000014 +22363 clk cpu0 IT (22327) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22363 clk cpu0 R X10 0000000000000014 +22364 clk cpu0 IT (22328) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22364 clk cpu0 R X8 000000000370077C +22365 clk cpu0 IT (22329) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22365 clk cpu0 MR1 0370077c:000000f0077c_NS 00 +22365 clk cpu0 R X9 0000000000000000 +22366 clk cpu0 IT (22330) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22366 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22366 clk cpu0 R X8 0000000003700600 +22367 clk cpu0 IT (22331) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22367 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007c +22367 clk cpu0 R X8 000000002300007C +22368 clk cpu0 IT (22332) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22368 clk cpu0 MW1 2300007c:00001624007c_NS 00 +22369 clk cpu0 IT (22333) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22369 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22369 clk cpu0 R X8 0000000003700600 +22370 clk cpu0 IT (22334) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22370 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007c +22370 clk cpu0 R X10 000000002300007C +22371 clk cpu0 IT (22335) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22371 clk cpu0 R X11 0000000000000001 +22372 clk cpu0 IT (22336) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22372 clk cpu0 R X10 000000002300007D +22373 clk cpu0 IT (22337) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22373 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300007d +22374 clk cpu0 IT (22338) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22374 clk cpu0 MR1 0370053e:000000f0053e_NS 14 +22374 clk cpu0 R X8 0000000000000014 +22375 clk cpu0 IT (22339) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22375 clk cpu0 R X8 0000000000000015 +22376 clk cpu0 IT (22340) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22376 clk cpu0 MW1 0370053e:000000f0053e_NS 15 +22377 clk cpu0 IT (22341) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22378 clk cpu0 IT (22342) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22378 clk cpu0 MR1 0370053e:000000f0053e_NS 15 +22378 clk cpu0 R X8 0000000000000015 +22379 clk cpu0 IT (22343) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22379 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22379 clk cpu0 R X9 0000000000000020 +22380 clk cpu0 IT (22344) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22380 clk cpu0 R cpsr 820003c5 +22381 clk cpu0 IT (22345) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22381 clk cpu0 R X8 0000000000000001 +22382 clk cpu0 IT (22346) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22383 clk cpu0 IT (22347) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22383 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22383 clk cpu0 R X8 0000000003700768 +22384 clk cpu0 IT (22348) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22384 clk cpu0 MR1 0370053e:000000f0053e_NS 15 +22384 clk cpu0 R X9 0000000000000015 +22385 clk cpu0 IT (22349) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22385 clk cpu0 R X10 0000000000000015 +22386 clk cpu0 IT (22350) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22386 clk cpu0 R X10 0000000000000015 +22387 clk cpu0 IT (22351) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22387 clk cpu0 R X8 000000000370077D +22388 clk cpu0 IT (22352) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22388 clk cpu0 MR1 0370077d:000000f0077d_NS 00 +22388 clk cpu0 R X9 0000000000000000 +22389 clk cpu0 IT (22353) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22389 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22389 clk cpu0 R X8 0000000003700600 +22390 clk cpu0 IT (22354) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22390 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007d +22390 clk cpu0 R X8 000000002300007D +22391 clk cpu0 IT (22355) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22391 clk cpu0 MW1 2300007d:00001624007d_NS 00 +22392 clk cpu0 IT (22356) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22392 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22392 clk cpu0 R X8 0000000003700600 +22393 clk cpu0 IT (22357) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22393 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007d +22393 clk cpu0 R X10 000000002300007D +22394 clk cpu0 IT (22358) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22394 clk cpu0 R X11 0000000000000001 +22395 clk cpu0 IT (22359) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22395 clk cpu0 R X10 000000002300007E +22396 clk cpu0 IT (22360) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22396 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300007e +22397 clk cpu0 IT (22361) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22397 clk cpu0 MR1 0370053e:000000f0053e_NS 15 +22397 clk cpu0 R X8 0000000000000015 +22398 clk cpu0 IT (22362) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22398 clk cpu0 R X8 0000000000000016 +22399 clk cpu0 IT (22363) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22399 clk cpu0 MW1 0370053e:000000f0053e_NS 16 +22400 clk cpu0 IT (22364) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22401 clk cpu0 IT (22365) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22401 clk cpu0 MR1 0370053e:000000f0053e_NS 16 +22401 clk cpu0 R X8 0000000000000016 +22402 clk cpu0 IT (22366) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22402 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22402 clk cpu0 R X9 0000000000000020 +22403 clk cpu0 IT (22367) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22403 clk cpu0 R cpsr 820003c5 +22404 clk cpu0 IT (22368) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22404 clk cpu0 R X8 0000000000000001 +22405 clk cpu0 IT (22369) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22406 clk cpu0 IT (22370) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22406 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22406 clk cpu0 R X8 0000000003700768 +22407 clk cpu0 IT (22371) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22407 clk cpu0 MR1 0370053e:000000f0053e_NS 16 +22407 clk cpu0 R X9 0000000000000016 +22408 clk cpu0 IT (22372) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22408 clk cpu0 R X10 0000000000000016 +22409 clk cpu0 IT (22373) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22409 clk cpu0 R X10 0000000000000016 +22410 clk cpu0 IT (22374) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22410 clk cpu0 R X8 000000000370077E +22411 clk cpu0 IT (22375) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22411 clk cpu0 MR1 0370077e:000000f0077e_NS 00 +22411 clk cpu0 R X9 0000000000000000 +22412 clk cpu0 IT (22376) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22412 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22412 clk cpu0 R X8 0000000003700600 +22413 clk cpu0 IT (22377) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22413 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007e +22413 clk cpu0 R X8 000000002300007E +22414 clk cpu0 IT (22378) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22414 clk cpu0 MW1 2300007e:00001624007e_NS 00 +22415 clk cpu0 IT (22379) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22415 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22415 clk cpu0 R X8 0000000003700600 +22416 clk cpu0 IT (22380) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22416 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007e +22416 clk cpu0 R X10 000000002300007E +22417 clk cpu0 IT (22381) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22417 clk cpu0 R X11 0000000000000001 +22418 clk cpu0 IT (22382) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22418 clk cpu0 R X10 000000002300007F +22419 clk cpu0 IT (22383) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22419 clk cpu0 MW8 03700600:000000f00600_NS 00000000_2300007f +22420 clk cpu0 IT (22384) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22420 clk cpu0 MR1 0370053e:000000f0053e_NS 16 +22420 clk cpu0 R X8 0000000000000016 +22421 clk cpu0 IT (22385) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22421 clk cpu0 R X8 0000000000000017 +22422 clk cpu0 IT (22386) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22422 clk cpu0 MW1 0370053e:000000f0053e_NS 17 +22423 clk cpu0 IT (22387) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22424 clk cpu0 IT (22388) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22424 clk cpu0 MR1 0370053e:000000f0053e_NS 17 +22424 clk cpu0 R X8 0000000000000017 +22425 clk cpu0 IT (22389) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22425 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22425 clk cpu0 R X9 0000000000000020 +22426 clk cpu0 IT (22390) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22426 clk cpu0 R cpsr 820003c5 +22427 clk cpu0 IT (22391) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22427 clk cpu0 R X8 0000000000000001 +22428 clk cpu0 IT (22392) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22429 clk cpu0 IT (22393) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22429 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22429 clk cpu0 R X8 0000000003700768 +22430 clk cpu0 IT (22394) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22430 clk cpu0 MR1 0370053e:000000f0053e_NS 17 +22430 clk cpu0 R X9 0000000000000017 +22431 clk cpu0 IT (22395) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22431 clk cpu0 R X10 0000000000000017 +22432 clk cpu0 IT (22396) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22432 clk cpu0 R X10 0000000000000017 +22433 clk cpu0 IT (22397) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22433 clk cpu0 R X8 000000000370077F +22434 clk cpu0 IT (22398) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22434 clk cpu0 MR1 0370077f:000000f0077f_NS 00 +22434 clk cpu0 R X9 0000000000000000 +22435 clk cpu0 IT (22399) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22435 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22435 clk cpu0 R X8 0000000003700600 +22436 clk cpu0 IT (22400) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22436 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007f +22436 clk cpu0 R X8 000000002300007F +22437 clk cpu0 IT (22401) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22437 clk cpu0 MW1 2300007f:00001624007f_NS 00 +22438 clk cpu0 IT (22402) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22438 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22438 clk cpu0 R X8 0000000003700600 +22439 clk cpu0 IT (22403) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22439 clk cpu0 MR8 03700600:000000f00600_NS 00000000_2300007f +22439 clk cpu0 R X10 000000002300007F +22440 clk cpu0 IT (22404) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22440 clk cpu0 R X11 0000000000000001 +22441 clk cpu0 IT (22405) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22441 clk cpu0 R X10 0000000023000080 +22442 clk cpu0 IT (22406) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22442 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000080 +22443 clk cpu0 IT (22407) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22443 clk cpu0 MR1 0370053e:000000f0053e_NS 17 +22443 clk cpu0 R X8 0000000000000017 +22444 clk cpu0 IT (22408) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22444 clk cpu0 R X8 0000000000000018 +22445 clk cpu0 IT (22409) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22445 clk cpu0 MW1 0370053e:000000f0053e_NS 18 +22446 clk cpu0 IT (22410) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22447 clk cpu0 IT (22411) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22447 clk cpu0 MR1 0370053e:000000f0053e_NS 18 +22447 clk cpu0 R X8 0000000000000018 +22448 clk cpu0 IT (22412) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22448 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22448 clk cpu0 R X9 0000000000000020 +22449 clk cpu0 IT (22413) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22449 clk cpu0 R cpsr 820003c5 +22450 clk cpu0 IT (22414) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22450 clk cpu0 R X8 0000000000000001 +22451 clk cpu0 IT (22415) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22452 clk cpu0 IT (22416) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22452 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22452 clk cpu0 R X8 0000000003700768 +22453 clk cpu0 IT (22417) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22453 clk cpu0 MR1 0370053e:000000f0053e_NS 18 +22453 clk cpu0 R X9 0000000000000018 +22454 clk cpu0 IT (22418) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22454 clk cpu0 R X10 0000000000000018 +22455 clk cpu0 IT (22419) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22455 clk cpu0 R X10 0000000000000018 +22456 clk cpu0 IT (22420) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22456 clk cpu0 R X8 0000000003700780 +22457 clk cpu0 IT (22421) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22457 clk cpu0 MR1 03700780:000000f00780_NS 00 +22457 clk cpu0 R X9 0000000000000000 +22458 clk cpu0 IT (22422) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22458 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22458 clk cpu0 R X8 0000000003700600 +22459 clk cpu0 IT (22423) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22459 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000080 +22459 clk cpu0 R X8 0000000023000080 +22460 clk cpu0 IT (22424) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22460 clk cpu0 MW1 23000080:000016240080_NS 00 +22460 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0005 INVAL 0x000001000080_NS +22460 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0005 ALLOC 0x000016240080_NS +22460 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0005 DIRTY 0x000016240080_NS +22460 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 ALLOC 0x000016240080_NS +22460 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 2000 INVAL 0x000016240080_NS +22461 clk cpu0 IT (22425) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22461 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22461 clk cpu0 R X8 0000000003700600 +22462 clk cpu0 IT (22426) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22462 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000080 +22462 clk cpu0 R X10 0000000023000080 +22463 clk cpu0 IT (22427) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22463 clk cpu0 R X11 0000000000000001 +22464 clk cpu0 IT (22428) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22464 clk cpu0 R X10 0000000023000081 +22465 clk cpu0 IT (22429) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22465 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000081 +22466 clk cpu0 IT (22430) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22466 clk cpu0 MR1 0370053e:000000f0053e_NS 18 +22466 clk cpu0 R X8 0000000000000018 +22467 clk cpu0 IT (22431) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22467 clk cpu0 R X8 0000000000000019 +22468 clk cpu0 IT (22432) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22468 clk cpu0 MW1 0370053e:000000f0053e_NS 19 +22469 clk cpu0 IT (22433) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22470 clk cpu0 IT (22434) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22470 clk cpu0 MR1 0370053e:000000f0053e_NS 19 +22470 clk cpu0 R X8 0000000000000019 +22471 clk cpu0 IT (22435) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22471 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22471 clk cpu0 R X9 0000000000000020 +22472 clk cpu0 IT (22436) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22472 clk cpu0 R cpsr 820003c5 +22473 clk cpu0 IT (22437) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22473 clk cpu0 R X8 0000000000000001 +22474 clk cpu0 IT (22438) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22475 clk cpu0 IT (22439) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22475 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22475 clk cpu0 R X8 0000000003700768 +22476 clk cpu0 IT (22440) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22476 clk cpu0 MR1 0370053e:000000f0053e_NS 19 +22476 clk cpu0 R X9 0000000000000019 +22477 clk cpu0 IT (22441) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22477 clk cpu0 R X10 0000000000000019 +22478 clk cpu0 IT (22442) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22478 clk cpu0 R X10 0000000000000019 +22479 clk cpu0 IT (22443) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22479 clk cpu0 R X8 0000000003700781 +22480 clk cpu0 IT (22444) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22480 clk cpu0 MR1 03700781:000000f00781_NS 00 +22480 clk cpu0 R X9 0000000000000000 +22481 clk cpu0 IT (22445) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22481 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22481 clk cpu0 R X8 0000000003700600 +22482 clk cpu0 IT (22446) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22482 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000081 +22482 clk cpu0 R X8 0000000023000081 +22483 clk cpu0 IT (22447) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22483 clk cpu0 MW1 23000081:000016240081_NS 00 +22484 clk cpu0 IT (22448) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22484 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22484 clk cpu0 R X8 0000000003700600 +22485 clk cpu0 IT (22449) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22485 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000081 +22485 clk cpu0 R X10 0000000023000081 +22486 clk cpu0 IT (22450) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22486 clk cpu0 R X11 0000000000000001 +22487 clk cpu0 IT (22451) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22487 clk cpu0 R X10 0000000023000082 +22488 clk cpu0 IT (22452) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22488 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000082 +22489 clk cpu0 IT (22453) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22489 clk cpu0 MR1 0370053e:000000f0053e_NS 19 +22489 clk cpu0 R X8 0000000000000019 +22490 clk cpu0 IT (22454) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22490 clk cpu0 R X8 000000000000001A +22491 clk cpu0 IT (22455) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22491 clk cpu0 MW1 0370053e:000000f0053e_NS 1a +22492 clk cpu0 IT (22456) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22493 clk cpu0 IT (22457) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22493 clk cpu0 MR1 0370053e:000000f0053e_NS 1a +22493 clk cpu0 R X8 000000000000001A +22494 clk cpu0 IT (22458) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22494 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22494 clk cpu0 R X9 0000000000000020 +22495 clk cpu0 IT (22459) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22495 clk cpu0 R cpsr 820003c5 +22496 clk cpu0 IT (22460) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22496 clk cpu0 R X8 0000000000000001 +22497 clk cpu0 IT (22461) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22498 clk cpu0 IT (22462) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22498 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22498 clk cpu0 R X8 0000000003700768 +22499 clk cpu0 IT (22463) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22499 clk cpu0 MR1 0370053e:000000f0053e_NS 1a +22499 clk cpu0 R X9 000000000000001A +22500 clk cpu0 IT (22464) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22500 clk cpu0 R X10 000000000000001A +22501 clk cpu0 IT (22465) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22501 clk cpu0 R X10 000000000000001A +22502 clk cpu0 IT (22466) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22502 clk cpu0 R X8 0000000003700782 +22503 clk cpu0 IT (22467) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22503 clk cpu0 MR1 03700782:000000f00782_NS 00 +22503 clk cpu0 R X9 0000000000000000 +22504 clk cpu0 IT (22468) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22504 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22504 clk cpu0 R X8 0000000003700600 +22505 clk cpu0 IT (22469) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22505 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000082 +22505 clk cpu0 R X8 0000000023000082 +22506 clk cpu0 IT (22470) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22506 clk cpu0 MW1 23000082:000016240082_NS 00 +22507 clk cpu0 IT (22471) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22507 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22507 clk cpu0 R X8 0000000003700600 +22508 clk cpu0 IT (22472) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22508 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000082 +22508 clk cpu0 R X10 0000000023000082 +22509 clk cpu0 IT (22473) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22509 clk cpu0 R X11 0000000000000001 +22510 clk cpu0 IT (22474) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22510 clk cpu0 R X10 0000000023000083 +22511 clk cpu0 IT (22475) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22511 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000083 +22512 clk cpu0 IT (22476) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22512 clk cpu0 MR1 0370053e:000000f0053e_NS 1a +22512 clk cpu0 R X8 000000000000001A +22513 clk cpu0 IT (22477) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22513 clk cpu0 R X8 000000000000001B +22514 clk cpu0 IT (22478) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22514 clk cpu0 MW1 0370053e:000000f0053e_NS 1b +22515 clk cpu0 IT (22479) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22516 clk cpu0 IT (22480) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22516 clk cpu0 MR1 0370053e:000000f0053e_NS 1b +22516 clk cpu0 R X8 000000000000001B +22517 clk cpu0 IT (22481) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22517 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22517 clk cpu0 R X9 0000000000000020 +22518 clk cpu0 IT (22482) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22518 clk cpu0 R cpsr 820003c5 +22519 clk cpu0 IT (22483) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22519 clk cpu0 R X8 0000000000000001 +22520 clk cpu0 IT (22484) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22521 clk cpu0 IT (22485) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22521 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22521 clk cpu0 R X8 0000000003700768 +22522 clk cpu0 IT (22486) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22522 clk cpu0 MR1 0370053e:000000f0053e_NS 1b +22522 clk cpu0 R X9 000000000000001B +22523 clk cpu0 IT (22487) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22523 clk cpu0 R X10 000000000000001B +22524 clk cpu0 IT (22488) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22524 clk cpu0 R X10 000000000000001B +22525 clk cpu0 IT (22489) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22525 clk cpu0 R X8 0000000003700783 +22526 clk cpu0 IT (22490) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22526 clk cpu0 MR1 03700783:000000f00783_NS 00 +22526 clk cpu0 R X9 0000000000000000 +22527 clk cpu0 IT (22491) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22527 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22527 clk cpu0 R X8 0000000003700600 +22528 clk cpu0 IT (22492) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22528 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000083 +22528 clk cpu0 R X8 0000000023000083 +22529 clk cpu0 IT (22493) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22529 clk cpu0 MW1 23000083:000016240083_NS 00 +22530 clk cpu0 IT (22494) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22530 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22530 clk cpu0 R X8 0000000003700600 +22531 clk cpu0 IT (22495) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22531 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000083 +22531 clk cpu0 R X10 0000000023000083 +22532 clk cpu0 IT (22496) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22532 clk cpu0 R X11 0000000000000001 +22533 clk cpu0 IT (22497) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22533 clk cpu0 R X10 0000000023000084 +22534 clk cpu0 IT (22498) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22534 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000084 +22535 clk cpu0 IT (22499) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22535 clk cpu0 MR1 0370053e:000000f0053e_NS 1b +22535 clk cpu0 R X8 000000000000001B +22536 clk cpu0 IT (22500) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22536 clk cpu0 R X8 000000000000001C +22537 clk cpu0 IT (22501) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22537 clk cpu0 MW1 0370053e:000000f0053e_NS 1c +22538 clk cpu0 IT (22502) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22539 clk cpu0 IT (22503) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22539 clk cpu0 MR1 0370053e:000000f0053e_NS 1c +22539 clk cpu0 R X8 000000000000001C +22540 clk cpu0 IT (22504) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22540 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22540 clk cpu0 R X9 0000000000000020 +22541 clk cpu0 IT (22505) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22541 clk cpu0 R cpsr 820003c5 +22542 clk cpu0 IT (22506) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22542 clk cpu0 R X8 0000000000000001 +22543 clk cpu0 IT (22507) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22544 clk cpu0 IT (22508) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22544 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22544 clk cpu0 R X8 0000000003700768 +22545 clk cpu0 IT (22509) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22545 clk cpu0 MR1 0370053e:000000f0053e_NS 1c +22545 clk cpu0 R X9 000000000000001C +22546 clk cpu0 IT (22510) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22546 clk cpu0 R X10 000000000000001C +22547 clk cpu0 IT (22511) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22547 clk cpu0 R X10 000000000000001C +22548 clk cpu0 IT (22512) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22548 clk cpu0 R X8 0000000003700784 +22549 clk cpu0 IT (22513) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22549 clk cpu0 MR1 03700784:000000f00784_NS 00 +22549 clk cpu0 R X9 0000000000000000 +22550 clk cpu0 IT (22514) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22550 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22550 clk cpu0 R X8 0000000003700600 +22551 clk cpu0 IT (22515) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22551 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000084 +22551 clk cpu0 R X8 0000000023000084 +22552 clk cpu0 IT (22516) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22552 clk cpu0 MW1 23000084:000016240084_NS 00 +22553 clk cpu0 IT (22517) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22553 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22553 clk cpu0 R X8 0000000003700600 +22554 clk cpu0 IT (22518) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22554 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000084 +22554 clk cpu0 R X10 0000000023000084 +22555 clk cpu0 IT (22519) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22555 clk cpu0 R X11 0000000000000001 +22556 clk cpu0 IT (22520) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22556 clk cpu0 R X10 0000000023000085 +22557 clk cpu0 IT (22521) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22557 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000085 +22558 clk cpu0 IT (22522) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22558 clk cpu0 MR1 0370053e:000000f0053e_NS 1c +22558 clk cpu0 R X8 000000000000001C +22559 clk cpu0 IT (22523) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22559 clk cpu0 R X8 000000000000001D +22560 clk cpu0 IT (22524) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22560 clk cpu0 MW1 0370053e:000000f0053e_NS 1d +22561 clk cpu0 IT (22525) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22562 clk cpu0 IT (22526) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22562 clk cpu0 MR1 0370053e:000000f0053e_NS 1d +22562 clk cpu0 R X8 000000000000001D +22563 clk cpu0 IT (22527) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22563 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22563 clk cpu0 R X9 0000000000000020 +22564 clk cpu0 IT (22528) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22564 clk cpu0 R cpsr 820003c5 +22565 clk cpu0 IT (22529) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22565 clk cpu0 R X8 0000000000000001 +22566 clk cpu0 IT (22530) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22567 clk cpu0 IT (22531) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22567 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22567 clk cpu0 R X8 0000000003700768 +22568 clk cpu0 IT (22532) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22568 clk cpu0 MR1 0370053e:000000f0053e_NS 1d +22568 clk cpu0 R X9 000000000000001D +22569 clk cpu0 IT (22533) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22569 clk cpu0 R X10 000000000000001D +22570 clk cpu0 IT (22534) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22570 clk cpu0 R X10 000000000000001D +22571 clk cpu0 IT (22535) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22571 clk cpu0 R X8 0000000003700785 +22572 clk cpu0 IT (22536) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22572 clk cpu0 MR1 03700785:000000f00785_NS 00 +22572 clk cpu0 R X9 0000000000000000 +22573 clk cpu0 IT (22537) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22573 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22573 clk cpu0 R X8 0000000003700600 +22574 clk cpu0 IT (22538) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22574 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000085 +22574 clk cpu0 R X8 0000000023000085 +22575 clk cpu0 IT (22539) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22575 clk cpu0 MW1 23000085:000016240085_NS 00 +22576 clk cpu0 IT (22540) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22576 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22576 clk cpu0 R X8 0000000003700600 +22577 clk cpu0 IT (22541) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22577 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000085 +22577 clk cpu0 R X10 0000000023000085 +22578 clk cpu0 IT (22542) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22578 clk cpu0 R X11 0000000000000001 +22579 clk cpu0 IT (22543) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22579 clk cpu0 R X10 0000000023000086 +22580 clk cpu0 IT (22544) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22580 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000086 +22581 clk cpu0 IT (22545) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22581 clk cpu0 MR1 0370053e:000000f0053e_NS 1d +22581 clk cpu0 R X8 000000000000001D +22582 clk cpu0 IT (22546) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22582 clk cpu0 R X8 000000000000001E +22583 clk cpu0 IT (22547) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22583 clk cpu0 MW1 0370053e:000000f0053e_NS 1e +22584 clk cpu0 IT (22548) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22585 clk cpu0 IT (22549) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22585 clk cpu0 MR1 0370053e:000000f0053e_NS 1e +22585 clk cpu0 R X8 000000000000001E +22586 clk cpu0 IT (22550) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22586 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22586 clk cpu0 R X9 0000000000000020 +22587 clk cpu0 IT (22551) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22587 clk cpu0 R cpsr 820003c5 +22588 clk cpu0 IT (22552) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22588 clk cpu0 R X8 0000000000000001 +22589 clk cpu0 IT (22553) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22590 clk cpu0 IT (22554) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22590 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22590 clk cpu0 R X8 0000000003700768 +22591 clk cpu0 IT (22555) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22591 clk cpu0 MR1 0370053e:000000f0053e_NS 1e +22591 clk cpu0 R X9 000000000000001E +22592 clk cpu0 IT (22556) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22592 clk cpu0 R X10 000000000000001E +22593 clk cpu0 IT (22557) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22593 clk cpu0 R X10 000000000000001E +22594 clk cpu0 IT (22558) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22594 clk cpu0 R X8 0000000003700786 +22595 clk cpu0 IT (22559) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22595 clk cpu0 MR1 03700786:000000f00786_NS 00 +22595 clk cpu0 R X9 0000000000000000 +22596 clk cpu0 IT (22560) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22596 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22596 clk cpu0 R X8 0000000003700600 +22597 clk cpu0 IT (22561) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22597 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000086 +22597 clk cpu0 R X8 0000000023000086 +22598 clk cpu0 IT (22562) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22598 clk cpu0 MW1 23000086:000016240086_NS 00 +22599 clk cpu0 IT (22563) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22599 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22599 clk cpu0 R X8 0000000003700600 +22600 clk cpu0 IT (22564) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22600 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000086 +22600 clk cpu0 R X10 0000000023000086 +22601 clk cpu0 IT (22565) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22601 clk cpu0 R X11 0000000000000001 +22602 clk cpu0 IT (22566) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22602 clk cpu0 R X10 0000000023000087 +22603 clk cpu0 IT (22567) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22603 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000087 +22604 clk cpu0 IT (22568) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22604 clk cpu0 MR1 0370053e:000000f0053e_NS 1e +22604 clk cpu0 R X8 000000000000001E +22605 clk cpu0 IT (22569) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22605 clk cpu0 R X8 000000000000001F +22606 clk cpu0 IT (22570) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22606 clk cpu0 MW1 0370053e:000000f0053e_NS 1f +22607 clk cpu0 IT (22571) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22608 clk cpu0 IT (22572) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22608 clk cpu0 MR1 0370053e:000000f0053e_NS 1f +22608 clk cpu0 R X8 000000000000001F +22609 clk cpu0 IT (22573) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22609 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22609 clk cpu0 R X9 0000000000000020 +22610 clk cpu0 IT (22574) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22610 clk cpu0 R cpsr 820003c5 +22611 clk cpu0 IT (22575) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22611 clk cpu0 R X8 0000000000000001 +22612 clk cpu0 IT (22576) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22613 clk cpu0 IT (22577) 00011608:000010011608_NS f9400be8 O EL1h_n : LDR x8,[sp,#0x10] +22613 clk cpu0 MR8 03700540:000000f00540_NS 00000000_03700768 +22613 clk cpu0 R X8 0000000003700768 +22614 clk cpu0 IT (22578) 0001160c:00001001160c_NS 39403be9 O EL1h_n : LDRB w9,[sp,#0xe] +22614 clk cpu0 MR1 0370053e:000000f0053e_NS 1f +22614 clk cpu0 R X9 000000000000001F +22615 clk cpu0 IT (22579) 00011610:000010011610_NS 2a0903ea O EL1h_n : MOV w10,w9 +22615 clk cpu0 R X10 000000000000001F +22616 clk cpu0 IT (22580) 00011614:000010011614_NS 93407d4a O EL1h_n : SXTW x10,w10 +22616 clk cpu0 R X10 000000000000001F +22617 clk cpu0 IT (22581) 00011618:000010011618_NS 8b0a0108 O EL1h_n : ADD x8,x8,x10 +22617 clk cpu0 R X8 0000000003700787 +22618 clk cpu0 IT (22582) 0001161c:00001001161c_NS 39400109 O EL1h_n : LDRB w9,[x8,#0] +22618 clk cpu0 MR1 03700787:000000f00787_NS 00 +22618 clk cpu0 R X9 0000000000000000 +22619 clk cpu0 IT (22583) 00011620:000010011620_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22619 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22619 clk cpu0 R X8 0000000003700600 +22620 clk cpu0 IT (22584) 00011624:000010011624_NS f9400108 O EL1h_n : LDR x8,[x8,#0] +22620 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000087 +22620 clk cpu0 R X8 0000000023000087 +22621 clk cpu0 IT (22585) 00011628:000010011628_NS 39000109 O EL1h_n : STRB w9,[x8,#0] +22621 clk cpu0 MW1 23000087:000016240087_NS 00 +22622 clk cpu0 IT (22586) 0001162c:00001001162c_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22622 clk cpu0 MR8 03700548:000000f00548_NS 00000000_03700600 +22622 clk cpu0 R X8 0000000003700600 +22623 clk cpu0 IT (22587) 00011630:000010011630_NS f940010a O EL1h_n : LDR x10,[x8,#0] +22623 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000087 +22623 clk cpu0 R X10 0000000023000087 +22624 clk cpu0 IT (22588) 00011634:000010011634_NS d280002b O EL1h_n : MOV x11,#1 +22624 clk cpu0 R X11 0000000000000001 +22625 clk cpu0 IT (22589) 00011638:000010011638_NS 8b0b014a O EL1h_n : ADD x10,x10,x11 +22625 clk cpu0 R X10 0000000023000088 +22626 clk cpu0 IT (22590) 0001163c:00001001163c_NS f900010a O EL1h_n : STR x10,[x8,#0] +22626 clk cpu0 MW8 03700600:000000f00600_NS 00000000_23000088 +22627 clk cpu0 IT (22591) 00011640:000010011640_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22627 clk cpu0 MR1 0370053e:000000f0053e_NS 1f +22627 clk cpu0 R X8 000000000000001F +22628 clk cpu0 IT (22592) 00011644:000010011644_NS 11000508 O EL1h_n : ADD w8,w8,#1 +22628 clk cpu0 R X8 0000000000000020 +22629 clk cpu0 IT (22593) 00011648:000010011648_NS 39003be8 O EL1h_n : STRB w8,[sp,#0xe] +22629 clk cpu0 MW1 0370053e:000000f0053e_NS 20 +22630 clk cpu0 IT (22594) 0001164c:00001001164c_NS 17ffffe9 O EL1h_n : B 0x115f0 +22631 clk cpu0 IT (22595) 000115f0:0000100115f0_NS 39403be8 O EL1h_n : LDRB w8,[sp,#0xe] +22631 clk cpu0 MR1 0370053e:000000f0053e_NS 20 +22631 clk cpu0 R X8 0000000000000020 +22632 clk cpu0 IT (22596) 000115f4:0000100115f4_NS 39403fe9 O EL1h_n : LDRB w9,[sp,#0xf] +22632 clk cpu0 MR1 0370053f:000000f0053f_NS 20 +22632 clk cpu0 R X9 0000000000000020 +22633 clk cpu0 IT (22597) 000115f8:0000100115f8_NS 6b09011f O EL1h_n : CMP w8,w9 +22633 clk cpu0 R cpsr 620003c5 +22634 clk cpu0 IT (22598) 000115fc:0000100115fc_NS 1a9fa7e8 O EL1h_n : CSET w8,LT +22634 clk cpu0 R X8 0000000000000000 +22635 clk cpu0 IS (22599) 00011600:000010011600_NS 37000048 O EL1h_n : TBNZ w8,#0,0x11608 +22636 clk cpu0 IT (22600) 00011604:000010011604_NS 14000013 O EL1h_n : B 0x11650 +22637 clk cpu0 IT (22601) 00011650:000010011650_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +22637 clk cpu0 R SP_EL1 0000000003700550 +22638 clk cpu0 IT (22602) 00011654:000010011654_NS d65f03c0 O EL1h_n : RET +22639 clk cpu0 IT (22603) 00011ba0:000010011ba0_NS f9404fe0 O EL1h_n : LDR x0,[sp,#0x98] +22639 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000000 +22639 clk cpu0 R X0 0000000000000000 +22640 clk cpu0 IT (22604) 00011ba4:000010011ba4_NS f9404be1 O EL1h_n : LDR x1,[sp,#0x90] +22640 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000001 +22640 clk cpu0 R X1 0000000000000001 +22641 clk cpu0 IT (22605) 00011ba8:000010011ba8_NS 94024c57 O EL1h_n : BL 0xa4d04 +22641 clk cpu0 R X30 0000000000011BAC +22642 clk cpu0 IT (22606) 000a4d04:0000100a4d04_NS f100041f O EL1h_n : CMP x0,#1 +22642 clk cpu0 R cpsr 820003c5 +22643 clk cpu0 IT (22607) 000a4d08:0000100a4d08_NS 5400006b O EL1h_n : B.LT 0xa4d14 +22644 clk cpu0 IT (22608) 000a4d14:0000100a4d14_NS d28000e0 O EL1h_n : MOV x0,#7 +22644 clk cpu0 R X0 0000000000000007 +22645 clk cpu0 IT (22609) 000a4d18:0000100a4d18_NS f2a005e0 O EL1h_n : MOVK x0,#0x2f,LSL #16 +22645 clk cpu0 R X0 00000000002F0007 +22646 clk cpu0 IT (22610) 000a4d1c:0000100a4d1c_NS aa0103e2 O EL1h_n : MOV x2,x1 +22646 clk cpu0 R X2 0000000000000001 +22647 clk cpu0 IT (22611) 000a4d20:0000100a4d20_NS d40000e1 O EL1h_n : SVC #7 +22647 clk cpu0 E 000a4d20:0000100a4d20_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +22647 clk cpu0 R cpsr 820003c5 +22647 clk cpu0 R PMBIDR_EL1 00000030 +22647 clk cpu0 R ESR_EL1 56000007 +22647 clk cpu0 R SPSR_EL1 820003c5 +22647 clk cpu0 R TRBIDR_EL1 000000000000002b +22647 clk cpu0 R ELR_EL1 00000000000a4d24 +22648 clk cpu0 IT (22612) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +22649 clk cpu0 IT (22613) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +22649 clk cpu0 R SP_EL1 0000000003700450 +22650 clk cpu0 IT (22614) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +22650 clk cpu0 MW8 03700450:000000f00450_NS 00000000_002f0007 +22650 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00000001 +22651 clk cpu0 IT (22615) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +22651 clk cpu0 R X0 0000000056000007 +22652 clk cpu0 IT (22616) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +22652 clk cpu0 R X1 0000000000000015 +22653 clk cpu0 IT (22617) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +22653 clk cpu0 R cpsr 620003c5 +22654 clk cpu0 IT (22618) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +22655 clk cpu0 IT (22619) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +22655 clk cpu0 R X1 0000000000000007 +22656 clk cpu0 IT (22620) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +22656 clk cpu0 R cpsr 220003c5 +22657 clk cpu0 IS (22621) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +22658 clk cpu0 IT (22622) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +22658 clk cpu0 R cpsr 820003c5 +22659 clk cpu0 IS (22623) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +22660 clk cpu0 IT (22624) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +22660 clk cpu0 R cpsr 820003c5 +22661 clk cpu0 IS (22625) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +22662 clk cpu0 IT (22626) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +22662 clk cpu0 R cpsr 620003c5 +22663 clk cpu0 IT (22627) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +22664 clk cpu0 IT (22628) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +22664 clk cpu0 MR8 03700450:000000f00450_NS 00000000_002f0007 +22664 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00000001 +22664 clk cpu0 R X0 00000000002F0007 +22664 clk cpu0 R X1 0000000000000001 +22665 clk cpu0 IT (22629) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +22665 clk cpu0 R SP_EL1 0000000003700550 +22666 clk cpu0 IT (22630) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +22666 clk cpu0 R cpsr 820003c5 +22667 clk cpu0 IT (22631) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +22668 clk cpu0 IT (22632) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +22668 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000020 +22668 clk cpu0 MW8 03700548:000000f00548_NS f800f800_f800f800 +22668 clk cpu0 R SP_EL1 0000000003700540 +22669 clk cpu0 IT (22633) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +22669 clk cpu0 MW8 03700530:000000f00530_NS 00000000_002f0007 +22669 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00000001 +22669 clk cpu0 R SP_EL1 0000000003700530 +22670 clk cpu0 IT (22634) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +22670 clk cpu0 R X5 0000000000000000 +22671 clk cpu0 IT (22635) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +22671 clk cpu0 R X1 0000000000000000 +22672 clk cpu0 IT (22636) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +22672 clk cpu0 R cpsr 820003c5 +22673 clk cpu0 IT (22637) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +22673 clk cpu0 MR8 03700530:000000f00530_NS 00000000_002f0007 +22673 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00000001 +22673 clk cpu0 R SP_EL1 0000000003700540 +22673 clk cpu0 R X0 00000000002F0007 +22673 clk cpu0 R X1 0000000000000001 +22674 clk cpu0 IT (22638) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +22675 clk cpu0 IT (22639) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +22675 clk cpu0 MW8 03700530:000000f00530_NS 00000000_90000000 +22675 clk cpu0 MW8 03700538:000000f00538_NS 03ff8000_03ff8000 +22675 clk cpu0 R SP_EL1 0000000003700530 +22676 clk cpu0 IT (22640) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +22676 clk cpu0 R X6 0000000000000001 +22677 clk cpu0 IT (22641) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +22677 clk cpu0 MW8 03700520:000000f00520_NS 00000000_00000001 +22677 clk cpu0 MW8 03700528:000000f00528_NS 00000000_00000000 +22677 clk cpu0 R SP_EL1 0000000003700520 +22678 clk cpu0 IT (22642) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +22678 clk cpu0 MW8 03700510:000000f00510_NS ffffffff_fe00000f +22678 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00011bac +22678 clk cpu0 R SP_EL1 0000000003700510 +22679 clk cpu0 IT (22643) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +22679 clk cpu0 R X3 0000000000000000 +22680 clk cpu0 IT (22644) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +22680 clk cpu0 R cpsr 820003c5 +22681 clk cpu0 IS (22645) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +22682 clk cpu0 IT (22646) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +22682 clk cpu0 R X3 0000000000000000 +22683 clk cpu0 IT (22647) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +22683 clk cpu0 R cpsr 820003c5 +22684 clk cpu0 IS (22648) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +22685 clk cpu0 IT (22649) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +22685 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +22685 clk cpu0 R X2 0000000000035A00 +22686 clk cpu0 IT (22650) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +22687 clk cpu0 IT (22651) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +22687 clk cpu0 R X3 000000000000005E +22688 clk cpu0 IT (22652) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +22688 clk cpu0 R X3 000000000000005E +22688 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cc INVAL 0x000010011980_NS +22688 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00cc ALLOC 0x000010035980_NS +22689 clk cpu0 IT (22653) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +22689 clk cpu0 R X3 00000000000002F0 +22690 clk cpu0 IT (22654) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +22690 clk cpu0 R X2 0000000000035CF0 +22691 clk cpu0 IT (22655) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +22691 clk cpu0 MR8 00035cf0:000010035cf0_NS 00000000_00036e8c +22691 clk cpu0 R X4 0000000000036E8C +22692 clk cpu0 IT (22656) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +22692 clk cpu0 R cpsr 82000bc5 +22692 clk cpu0 R X30 0000000000035990 +22692 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0175 INVAL 0x00001003ae80_NS +22692 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0175 ALLOC 0x000010036e80_NS +22693 clk cpu0 IT (22657) 00036e8c:000010036e8c_NS d5389b80 O EL1h_n : MRS x0,s3_0_c9_c11_4 +22693 clk cpu0 R cpsr 820003c5 +22693 clk cpu0 R X0 00000000000003FF +22694 clk cpu0 IT (22658) 00036e90:000010036e90_NS f14008bf O EL1h_n : CMP x5,#2,LSL #12 +22694 clk cpu0 R cpsr 820003c5 +22695 clk cpu0 IT (22659) 00036e94:000010036e94_NS 54000041 O EL1h_n : B.NE 0x36e9c +22696 clk cpu0 IT (22660) 00036e9c:000010036e9c_NS d65f03c0 O EL1h_n : RET +22697 clk cpu0 IT (22661) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +22697 clk cpu0 MR8 03700510:000000f00510_NS ffffffff_fe00000f +22697 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00011bac +22697 clk cpu0 R SP_EL1 0000000003700520 +22697 clk cpu0 R X29 FFFFFFFFFE00000F +22697 clk cpu0 R X30 0000000000011BAC +22698 clk cpu0 IT (22662) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +22698 clk cpu0 MR8 03700520:000000f00520_NS 00000000_00000001 +22698 clk cpu0 MR8 03700528:000000f00528_NS 00000000_00000000 +22698 clk cpu0 R SP_EL1 0000000003700530 +22698 clk cpu0 R X2 0000000000000001 +22698 clk cpu0 R X3 0000000000000000 +22699 clk cpu0 IT (22663) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +22699 clk cpu0 MR8 03700530:000000f00530_NS 00000000_90000000 +22699 clk cpu0 MR8 03700538:000000f00538_NS 03ff8000_03ff8000 +22699 clk cpu0 R SP_EL1 0000000003700540 +22699 clk cpu0 R X6 0000000090000000 +22699 clk cpu0 R X7 03FF800003FF8000 +22700 clk cpu0 IT (22664) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +22700 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00000020 +22700 clk cpu0 MR8 03700548:000000f00548_NS f800f800_f800f800 +22700 clk cpu0 R SP_EL1 0000000003700550 +22700 clk cpu0 R X4 0000000000000020 +22700 clk cpu0 R X5 F800F800F800F800 +22701 clk cpu0 IT (22665) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +22701 clk cpu0 R cpsr 820003c5 +22701 clk cpu0 R PMBIDR_EL1 00000030 +22701 clk cpu0 R TRBIDR_EL1 000000000000002b +22702 clk cpu0 IT (22666) 000a4d24:0000100a4d24_NS d65f03c0 O EL1h_n : RET +22703 clk cpu0 IT (22667) 00011bac:000010011bac_NS d2800888 O EL1h_n : MOV x8,#0x44 +22703 clk cpu0 R X8 0000000000000044 +22704 clk cpu0 IT (22668) 00011bb0:000010011bb0_NS 8a080008 O EL1h_n : AND x8,x0,x8 +22704 clk cpu0 R X8 0000000000000044 +22705 clk cpu0 IT (22669) 00011bb4:000010011bb4_NS b5000048 O EL1h_n : CBNZ x8,0x11bbc +22706 clk cpu0 IT (22670) 00011bbc:000010011bbc_NS f94047e0 O EL1h_n : LDR x0,[sp,#0x88] +22706 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_23000010 +22706 clk cpu0 R X0 0000000023000010 +22706 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00df ALLOC 0x000010011bc0_NS +22706 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 06f0 ALLOC 0x000010011bc0_NS +22707 clk cpu0 IT (22671) 00011bc0:000010011bc0_NS f9405be8 O EL1h_n : LDR x8,[sp,#0xb0] +22707 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000088 +22707 clk cpu0 R X8 0000000023000088 +22708 clk cpu0 IT (22672) 00011bc4:000010011bc4_NS f94047e9 O EL1h_n : LDR x9,[sp,#0x88] +22708 clk cpu0 MR8 037005d8:000000f005d8_NS 00000000_23000010 +22708 clk cpu0 R X9 0000000023000010 +22709 clk cpu0 IT (22673) 00011bc8:000010011bc8_NS eb090108 O EL1h_n : SUBS x8,x8,x9 +22709 clk cpu0 R cpsr 220003c5 +22709 clk cpu0 R X8 0000000000000078 +22710 clk cpu0 IT (22674) 00011bcc:000010011bcc_NS 2a0803e1 O EL1h_n : MOV w1,w8 +22710 clk cpu0 R X1 0000000000000078 +22711 clk cpu0 IT (22675) 00011bd0:000010011bd0_NS 97fffd75 O EL1h_n : BL 0x111a4 +22711 clk cpu0 R X30 0000000000011BD4 +22712 clk cpu0 IT (22676) 000111a4:0000100111a4_NS d100c3ff O EL1h_n : SUB sp,sp,#0x30 +22712 clk cpu0 R SP_EL1 0000000003700520 +22713 clk cpu0 IT (22677) 000111a8:0000100111a8_NS f90013fe O EL1h_n : STR x30,[sp,#0x20] +22713 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00011bd4 +22714 clk cpu0 IT (22678) 000111ac:0000100111ac_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +22714 clk cpu0 MW8 03700538:000000f00538_NS 00000000_23000010 +22715 clk cpu0 IT (22679) 000111b0:0000100111b0_NS b90017e1 O EL1h_n : STR w1,[sp,#0x14] +22715 clk cpu0 MW4 03700534:000000f00534_NS 00000078 +22716 clk cpu0 IT (22680) 000111b4:0000100111b4_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22716 clk cpu0 MR8 03700538:000000f00538_NS 00000000_23000010 +22716 clk cpu0 R X8 0000000023000010 +22717 clk cpu0 IT (22681) 000111b8:0000100111b8_NS f90007e8 O EL1h_n : STR x8,[sp,#8] +22717 clk cpu0 MW8 03700528:000000f00528_NS 00000000_23000010 +22718 clk cpu0 IT (22682) 000111bc:0000100111bc_NS f94007e0 O EL1h_n : LDR x0,[sp,#8] +22718 clk cpu0 MR8 03700528:000000f00528_NS 00000000_23000010 +22718 clk cpu0 R X0 0000000023000010 +22719 clk cpu0 IT (22683) 000111c0:0000100111c0_NS b94017e9 O EL1h_n : LDR w9,[sp,#0x14] +22719 clk cpu0 MR4 03700534:000000f00534_NS 00000078 +22719 clk cpu0 R X9 0000000000000078 +22720 clk cpu0 IT (22684) 000111c4:0000100111c4_NS 2a0903e1 O EL1h_n : MOV w1,w9 +22720 clk cpu0 R X1 0000000000000078 +22721 clk cpu0 IT (22685) 000111c8:0000100111c8_NS 9400eb68 O EL1h_n : BL 0x4bf68 +22721 clk cpu0 R X30 00000000000111CC +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 CLEAN 0x000016240000_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000016240000_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070250000_NS +22721 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000a ALLOC 0x000016240000_NS +22721 clk cpu0 TTW ITLB LPAE 1:0 000070250000 0000000070440003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070440000 +22721 clk cpu0 TTW ITLB LPAE 1:1 000070440000 0000000070450003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070450000 +22721 clk cpu0 TTW ITLB LPAE 1:2 000070450000 0000000070460003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000070460000 +22721 clk cpu0 TTW ITLB LPAE 1:3 000070460090 00000000100484c3 : BLOCK ATTRIDX=0 NS=0 AP=3 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000010048000 +22721 clk cpu0 TLB FILL cpu.cpu0.ITLB 16K 0x00048000_NS EL1_n vmid=0:0x0010048000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +22721 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x00048000_NS EL1_n vmid=0:0x0010048000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 INVAL 0x00001004c000_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0001 ALLOC 0x000070440000_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070250000_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x000070450000_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0005 CLEAN 0x000016240080_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0005 INVAL 0x000016240080_NS +22721 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0005 ALLOC 0x000070460080_NS +22721 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01fb ALLOC 0x00001004bf40_NS +22721 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0027 ALLOC 0x000016240080_NS +22721 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0fd1 ALLOC 0x00001004bf40_NS +22722 clk cpu0 IT (22686) 0004bf68:00001004bf68_NS d53b0022 O EL1h_n : MRS x2,CTR_EL0 +22722 clk cpu0 R X2 0000000084448004 +22723 clk cpu0 IT (22687) 0004bf6c:00001004bf6c_NS d3504c45 O EL1h_n : UBFIZ x5,x2,#48,#20 +22723 clk cpu0 R X5 0000000000000004 +22724 clk cpu0 IT (22688) 0004bf70:00001004bf70_NS 910008a5 O EL1h_n : ADD x5,x5,#2 +22724 clk cpu0 R X5 0000000000000006 +22725 clk cpu0 IT (22689) 0004bf74:00001004bf74_NS d2800024 O EL1h_n : MOV x4,#1 +22725 clk cpu0 R X4 0000000000000001 +22726 clk cpu0 IT (22690) 0004bf78:00001004bf78_NS 9ac52082 O EL1h_n : LSL x2,x4,x5 +22726 clk cpu0 R X2 0000000000000040 +22727 clk cpu0 IT (22691) 0004bf7c:00001004bf7c_NS 9ac52424 O EL1h_n : LSR x4,x1,x5 +22727 clk cpu0 R X4 0000000000000001 +22727 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01fc INVAL 0x00001009bf80_NS +22727 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01fc ALLOC 0x00001004bf80_NS +22727 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0fe3 ALLOC 0x00001004bf80_NS +22728 clk cpu0 IT (22692) 0004bf80:00001004bf80_NS 91000484 O EL1h_n : ADD x4,x4,#1 +22728 clk cpu0 R X4 0000000000000002 +22729 clk cpu0 IT (22693) 0004bf84:00001004bf84_NS aa0003e3 O EL1h_n : MOV x3,x0 +22729 clk cpu0 R X3 0000000023000010 +22730 clk cpu0 IT (22694) 0004bf88:00001004bf88_NS d5033f9f O EL1h_n : DSB SY +22731 clk cpu0 IS (22695) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22732 clk cpu0 IT (22696) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22732 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23000010:000016240010_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22732 clk cpu0 R DC CVAC 00000000:23000010 +22732 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 000a CLEAN 0x000016240000_NS +22733 clk cpu0 IT (22697) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22733 clk cpu0 R X3 0000000023000050 +22734 clk cpu0 IT (22698) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22734 clk cpu0 R X4 0000000000000001 +22735 clk cpu0 IT (22699) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22736 clk cpu0 IS (22700) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22737 clk cpu0 IT (22701) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22737 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23000050:000016240050_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22737 clk cpu0 R DC CVAC 00000000:23000050 +22737 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0002 CLEAN 0x000016240040_NS +22738 clk cpu0 IT (22702) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22738 clk cpu0 R X3 0000000023000090 +22739 clk cpu0 IT (22703) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22739 clk cpu0 R X4 0000000000000000 +22740 clk cpu0 IT (22704) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22741 clk cpu0 IT (22705) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22742 clk cpu0 IT (22706) 0004bfa0:00001004bfa0_NS d5033f9f O EL1h_n : DSB SY +22743 clk cpu0 IT (22707) 0004bfa4:00001004bfa4_NS d65f03c0 O EL1h_n : RET +22744 clk cpu0 IT (22708) 000111cc:0000100111cc_NS f94013fe O EL1h_n : LDR x30,[sp,#0x20] +22744 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00011bd4 +22744 clk cpu0 R X30 0000000000011BD4 +22745 clk cpu0 IT (22709) 000111d0:0000100111d0_NS 9100c3ff O EL1h_n : ADD sp,sp,#0x30 +22745 clk cpu0 R SP_EL1 0000000003700550 +22746 clk cpu0 IT (22710) 000111d4:0000100111d4_NS d65f03c0 O EL1h_n : RET +22747 clk cpu0 IT (22711) 00011bd4:000010011bd4_NS f9404fe0 O EL1h_n : LDR x0,[sp,#0x98] +22747 clk cpu0 MR8 037005e8:000000f005e8_NS 00000000_00000000 +22747 clk cpu0 R X0 0000000000000000 +22748 clk cpu0 IT (22712) 00011bd8:000010011bd8_NS f9404be1 O EL1h_n : LDR x1,[sp,#0x90] +22748 clk cpu0 MR8 037005e0:000000f005e0_NS 00000000_00000001 +22748 clk cpu0 R X1 0000000000000001 +22749 clk cpu0 IT (22713) 00011bdc:000010011bdc_NS 94024c16 O EL1h_n : BL 0xa4c34 +22749 clk cpu0 R X30 0000000000011BE0 +22750 clk cpu0 IT (22714) 000a4c34:0000100a4c34_NS f100041f O EL1h_n : CMP x0,#1 +22750 clk cpu0 R cpsr 820003c5 +22751 clk cpu0 IT (22715) 000a4c38:0000100a4c38_NS 5400006b O EL1h_n : B.LT 0xa4c44 +22752 clk cpu0 IT (22716) 000a4c44:0000100a4c44_NS d28000e0 O EL1h_n : MOV x0,#7 +22752 clk cpu0 R X0 0000000000000007 +22753 clk cpu0 IT (22717) 000a4c48:0000100a4c48_NS f2a005a0 O EL1h_n : MOVK x0,#0x2d,LSL #16 +22753 clk cpu0 R X0 00000000002D0007 +22754 clk cpu0 IT (22718) 000a4c4c:0000100a4c4c_NS aa0103e2 O EL1h_n : MOV x2,x1 +22754 clk cpu0 R X2 0000000000000001 +22755 clk cpu0 IT (22719) 000a4c50:0000100a4c50_NS d40000e1 O EL1h_n : SVC #7 +22755 clk cpu0 E 000a4c50:0000100a4c50_NS 00000084 CoreEvent_CURRENT_SPx_SYNC +22755 clk cpu0 R cpsr 820003c5 +22755 clk cpu0 R PMBIDR_EL1 00000030 +22755 clk cpu0 R ESR_EL1 56000007 +22755 clk cpu0 R SPSR_EL1 820003c5 +22755 clk cpu0 R TRBIDR_EL1 000000000000002b +22755 clk cpu0 R ELR_EL1 00000000000a4c54 +22756 clk cpu0 IT (22720) 00035200:000010035200_NS 14000181 O EL1h_n : B 0x35804 +22757 clk cpu0 IT (22721) 00035804:000010035804_NS d10403ff O EL1h_n : SUB sp,sp,#0x100 +22757 clk cpu0 R SP_EL1 0000000003700450 +22758 clk cpu0 IT (22722) 00035808:000010035808_NS a90007e0 O EL1h_n : STP x0,x1,[sp,#0] +22758 clk cpu0 MW8 03700450:000000f00450_NS 00000000_002d0007 +22758 clk cpu0 MW8 03700458:000000f00458_NS 00000000_00000001 +22759 clk cpu0 IT (22723) 0003580c:00001003580c_NS d5385200 O EL1h_n : MRS x0,ESR_EL1 +22759 clk cpu0 R X0 0000000056000007 +22760 clk cpu0 IT (22724) 00035810:000010035810_NS 531a7c01 O EL1h_n : LSR w1,w0,#26 +22760 clk cpu0 R X1 0000000000000015 +22761 clk cpu0 IT (22725) 00035814:000010035814_NS 7100543f O EL1h_n : CMP w1,#0x15 +22761 clk cpu0 R cpsr 620003c5 +22762 clk cpu0 IT (22726) 00035818:000010035818_NS 54000060 O EL1h_n : B.EQ 0x35824 +22763 clk cpu0 IT (22727) 00035824:000010035824_NS 53003c01 O EL1h_n : UXTH w1,w0 +22763 clk cpu0 R X1 0000000000000007 +22764 clk cpu0 IT (22728) 00035828:000010035828_NS 7100143f O EL1h_n : CMP w1,#5 +22764 clk cpu0 R cpsr 220003c5 +22765 clk cpu0 IS (22729) 0003582c:00001003582c_NS 5401572b O EL1h_n : B.LT 0x38310 +22766 clk cpu0 IT (22730) 00035830:000010035830_NS 7100283f O EL1h_n : CMP w1,#0xa +22766 clk cpu0 R cpsr 820003c5 +22767 clk cpu0 IS (22731) 00035834:000010035834_NS 540156ec O EL1h_n : B.GT 0x38310 +22768 clk cpu0 IT (22732) 00035838:000010035838_NS 7100203f O EL1h_n : CMP w1,#8 +22768 clk cpu0 R cpsr 820003c5 +22769 clk cpu0 IS (22733) 0003583c:00001003583c_NS 54015560 O EL1h_n : B.EQ 0x382e8 +22770 clk cpu0 IT (22734) 00035840:000010035840_NS 71001c3f O EL1h_n : CMP w1,#7 +22770 clk cpu0 R cpsr 620003c5 +22771 clk cpu0 IT (22735) 00035844:000010035844_NS 54000180 O EL1h_n : B.EQ 0x35874 +22772 clk cpu0 IT (22736) 00035874:000010035874_NS a94007e0 O EL1h_n : LDP x0,x1,[sp,#0] +22772 clk cpu0 MR8 03700450:000000f00450_NS 00000000_002d0007 +22772 clk cpu0 MR8 03700458:000000f00458_NS 00000000_00000001 +22772 clk cpu0 R X0 00000000002D0007 +22772 clk cpu0 R X1 0000000000000001 +22773 clk cpu0 IT (22737) 00035878:000010035878_NS 910403ff O EL1h_n : ADD sp,sp,#0x100 +22773 clk cpu0 R SP_EL1 0000000003700550 +22774 clk cpu0 IT (22738) 0003587c:00001003587c_NS f103bc3f O EL1h_n : CMP x1,#0xef +22774 clk cpu0 R cpsr 820003c5 +22775 clk cpu0 IT (22739) 00035880:000010035880_NS 54000061 O EL1h_n : B.NE 0x3588c +22776 clk cpu0 IT (22740) 0003588c:00001003588c_NS a9bf17e4 O EL1h_n : STP x4,x5,[sp,#-0x10]! +22776 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00000000 +22776 clk cpu0 MW8 03700548:000000f00548_NS 00000000_00000006 +22776 clk cpu0 R SP_EL1 0000000003700540 +22777 clk cpu0 IT (22741) 00035890:000010035890_NS a9bf07e0 O EL1h_n : STP x0,x1,[sp,#-0x10]! +22777 clk cpu0 MW8 03700530:000000f00530_NS 00000000_002d0007 +22777 clk cpu0 MW8 03700538:000000f00538_NS 00000000_00000001 +22777 clk cpu0 R SP_EL1 0000000003700530 +22778 clk cpu0 IT (22742) 00035894:000010035894_NS d2800005 O EL1h_n : MOV x5,#0 +22778 clk cpu0 R X5 0000000000000000 +22779 clk cpu0 IT (22743) 00035898:000010035898_NS d34d3401 O EL1h_n : UBFIZ x1,x0,#51,#14 +22779 clk cpu0 R X1 0000000000000000 +22780 clk cpu0 IT (22744) 0003589c:00001003589c_NS f100043f O EL1h_n : CMP x1,#1 +22780 clk cpu0 R cpsr 820003c5 +22781 clk cpu0 IT (22745) 000358a0:0000100358a0_NS a8c107e0 O EL1h_n : LDP x0,x1,[sp],#0x10 +22781 clk cpu0 MR8 03700530:000000f00530_NS 00000000_002d0007 +22781 clk cpu0 MR8 03700538:000000f00538_NS 00000000_00000001 +22781 clk cpu0 R SP_EL1 0000000003700540 +22781 clk cpu0 R X0 00000000002D0007 +22781 clk cpu0 R X1 0000000000000001 +22782 clk cpu0 IT (22746) 000358a4:0000100358a4_NS 54000381 O EL1h_n : B.NE 0x35914 +22783 clk cpu0 IT (22747) 00035914:000010035914_NS a9bf1fe6 O EL1h_n : STP x6,x7,[sp,#-0x10]! +22783 clk cpu0 MW8 03700530:000000f00530_NS 00000000_90000000 +22783 clk cpu0 MW8 03700538:000000f00538_NS 03ff8000_03ff8000 +22783 clk cpu0 R SP_EL1 0000000003700530 +22784 clk cpu0 IT (22748) 00035918:000010035918_NS aa0203e6 O EL1h_n : MOV x6,x2 +22784 clk cpu0 R X6 0000000000000001 +22785 clk cpu0 IT (22749) 0003591c:00001003591c_NS a9bf0fe2 O EL1h_n : STP x2,x3,[sp,#-0x10]! +22785 clk cpu0 MW8 03700520:000000f00520_NS 00000000_00000001 +22785 clk cpu0 MW8 03700528:000000f00528_NS 00000000_23000090 +22785 clk cpu0 R SP_EL1 0000000003700520 +22786 clk cpu0 IT (22750) 00035920:000010035920_NS a9bf7bfd O EL1h_n : STP x29,x30,[sp,#-0x10]! +22786 clk cpu0 MW8 03700510:000000f00510_NS ffffffff_fe00000f +22786 clk cpu0 MW8 03700518:000000f00518_NS 00000000_00011be0 +22786 clk cpu0 R SP_EL1 0000000003700510 +22787 clk cpu0 IT (22751) 00035924:000010035924_NS 530e3803 O EL1h_n : UBFIZ w3,w0,#18,#15 +22787 clk cpu0 R X3 0000000000000000 +22788 clk cpu0 IT (22752) 00035928:000010035928_NS 7100047f O EL1h_n : CMP w3,#1 +22788 clk cpu0 R cpsr 820003c5 +22789 clk cpu0 IS (22753) 0003592c:00001003592c_NS 540000c0 O EL1h_n : B.EQ 0x35944 +22790 clk cpu0 IT (22754) 00035930:000010035930_NS 531e7c03 O EL1h_n : LSR w3,w0,#30 +22790 clk cpu0 R X3 0000000000000000 +22791 clk cpu0 IT (22755) 00035934:000010035934_NS f100047f O EL1h_n : CMP x3,#1 +22791 clk cpu0 R cpsr 820003c5 +22792 clk cpu0 IS (22756) 00035938:000010035938_NS 540001e0 O EL1h_n : B.EQ 0x35974 +22793 clk cpu0 IT (22757) 0003593c:00001003593c_NS 580557e2 O EL1h_n : LDR x2,0x40438 +22793 clk cpu0 MR8 00040438:000010040438_NS 00000000_00035a00 +22793 clk cpu0 R X2 0000000000035A00 +22794 clk cpu0 IT (22758) 00035940:000010035940_NS 1400000e O EL1h_n : B 0x35978 +22795 clk cpu0 IT (22759) 00035978:000010035978_NS 530f7803 O EL1h_n : UBFX w3,w0,#15,#16 +22795 clk cpu0 R X3 000000000000005A +22796 clk cpu0 IT (22760) 0003597c:00001003597c_NS 12003863 O EL1h_n : AND w3,w3,#0x7fff +22796 clk cpu0 R X3 000000000000005A +22797 clk cpu0 IT (22761) 00035980:000010035980_NS d37df063 O EL1h_n : LSL x3,x3,#3 +22797 clk cpu0 R X3 00000000000002D0 +22798 clk cpu0 IT (22762) 00035984:000010035984_NS 8b030042 O EL1h_n : ADD x2,x2,x3 +22798 clk cpu0 R X2 0000000000035CD0 +22799 clk cpu0 IT (22763) 00035988:000010035988_NS f9400044 O EL1h_n : LDR x4,[x2,#0] +22799 clk cpu0 MR8 00035cd0:000010035cd0_NS 00000000_00036e1c +22799 clk cpu0 R X4 0000000000036E1C +22800 clk cpu0 IT (22764) 0003598c:00001003598c_NS d63f0080 O EL1h_n : BLR x4 +22800 clk cpu0 R cpsr 82000bc5 +22800 clk cpu0 R X30 0000000000035990 +22801 clk cpu0 IT (22765) 00036e1c:000010036e1c_NS d5389b40 O EL1h_n : MRS x0,s3_0_c9_c11_2 +22801 clk cpu0 R cpsr 820003c5 +22801 clk cpu0 R X0 0000000023002000 +22802 clk cpu0 IT (22766) 00036e20:000010036e20_NS f14008bf O EL1h_n : CMP x5,#2,LSL #12 +22802 clk cpu0 R cpsr 820003c5 +22803 clk cpu0 IT (22767) 00036e24:000010036e24_NS 54000041 O EL1h_n : B.NE 0x36e2c +22804 clk cpu0 IT (22768) 00036e2c:000010036e2c_NS d65f03c0 O EL1h_n : RET +22805 clk cpu0 IT (22769) 00035990:000010035990_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +22805 clk cpu0 MR8 03700510:000000f00510_NS ffffffff_fe00000f +22805 clk cpu0 MR8 03700518:000000f00518_NS 00000000_00011be0 +22805 clk cpu0 R SP_EL1 0000000003700520 +22805 clk cpu0 R X29 FFFFFFFFFE00000F +22805 clk cpu0 R X30 0000000000011BE0 +22806 clk cpu0 IT (22770) 00035994:000010035994_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +22806 clk cpu0 MR8 03700520:000000f00520_NS 00000000_00000001 +22806 clk cpu0 MR8 03700528:000000f00528_NS 00000000_23000090 +22806 clk cpu0 R SP_EL1 0000000003700530 +22806 clk cpu0 R X2 0000000000000001 +22806 clk cpu0 R X3 0000000023000090 +22807 clk cpu0 IT (22771) 00035998:000010035998_NS a8c11fe6 O EL1h_n : LDP x6,x7,[sp],#0x10 +22807 clk cpu0 MR8 03700530:000000f00530_NS 00000000_90000000 +22807 clk cpu0 MR8 03700538:000000f00538_NS 03ff8000_03ff8000 +22807 clk cpu0 R SP_EL1 0000000003700540 +22807 clk cpu0 R X6 0000000090000000 +22807 clk cpu0 R X7 03FF800003FF8000 +22808 clk cpu0 IT (22772) 0003599c:00001003599c_NS a8c117e4 O EL1h_n : LDP x4,x5,[sp],#0x10 +22808 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00000000 +22808 clk cpu0 MR8 03700548:000000f00548_NS 00000000_00000006 +22808 clk cpu0 R SP_EL1 0000000003700550 +22808 clk cpu0 R X4 0000000000000000 +22808 clk cpu0 R X5 0000000000000006 +22809 clk cpu0 IT (22773) 000359a0:0000100359a0_NS d69f03e0 O EL1h_n : ERET +22809 clk cpu0 R cpsr 820003c5 +22809 clk cpu0 R PMBIDR_EL1 00000030 +22809 clk cpu0 R TRBIDR_EL1 000000000000002b +22810 clk cpu0 IT (22774) 000a4c54:0000100a4c54_NS d65f03c0 O EL1h_n : RET +22811 clk cpu0 IT (22775) 00011be0:000010011be0_NS f9405fe9 O EL1h_n : LDR x9,[sp,#0xb8] +22811 clk cpu0 MR8 03700608:000000f00608_NS 00000000_03700700 +22811 clk cpu0 R X9 0000000003700700 +22812 clk cpu0 IT (22776) 00011be4:000010011be4_NS d280020a O EL1h_n : MOV x10,#0x10 +22812 clk cpu0 R X10 0000000000000010 +22813 clk cpu0 IT (22777) 00011be8:000010011be8_NS 8b0a0129 O EL1h_n : ADD x9,x9,x10 +22813 clk cpu0 R X9 0000000003700710 +22814 clk cpu0 IT (22778) 00011bec:000010011bec_NS 79400921 O EL1h_n : LDRH w1,[x9,#4] +22814 clk cpu0 MR2 03700714:000000f00714_NS 0399 +22814 clk cpu0 R X1 0000000000000399 +22815 clk cpu0 IT (22779) 00011bf0:000010011bf0_NS 97fffd6d O EL1h_n : BL 0x111a4 +22815 clk cpu0 R X30 0000000000011BF4 +22816 clk cpu0 IT (22780) 000111a4:0000100111a4_NS d100c3ff O EL1h_n : SUB sp,sp,#0x30 +22816 clk cpu0 R SP_EL1 0000000003700520 +22817 clk cpu0 IT (22781) 000111a8:0000100111a8_NS f90013fe O EL1h_n : STR x30,[sp,#0x20] +22817 clk cpu0 MW8 03700540:000000f00540_NS 00000000_00011bf4 +22818 clk cpu0 IT (22782) 000111ac:0000100111ac_NS f9000fe0 O EL1h_n : STR x0,[sp,#0x18] +22818 clk cpu0 MW8 03700538:000000f00538_NS 00000000_23002000 +22819 clk cpu0 IT (22783) 000111b0:0000100111b0_NS b90017e1 O EL1h_n : STR w1,[sp,#0x14] +22819 clk cpu0 MW4 03700534:000000f00534_NS 00000399 +22820 clk cpu0 IT (22784) 000111b4:0000100111b4_NS f9400fe8 O EL1h_n : LDR x8,[sp,#0x18] +22820 clk cpu0 MR8 03700538:000000f00538_NS 00000000_23002000 +22820 clk cpu0 R X8 0000000023002000 +22821 clk cpu0 IT (22785) 000111b8:0000100111b8_NS f90007e8 O EL1h_n : STR x8,[sp,#8] +22821 clk cpu0 MW8 03700528:000000f00528_NS 00000000_23002000 +22822 clk cpu0 IT (22786) 000111bc:0000100111bc_NS f94007e0 O EL1h_n : LDR x0,[sp,#8] +22822 clk cpu0 MR8 03700528:000000f00528_NS 00000000_23002000 +22822 clk cpu0 R X0 0000000023002000 +22823 clk cpu0 IT (22787) 000111c0:0000100111c0_NS b94017e9 O EL1h_n : LDR w9,[sp,#0x14] +22823 clk cpu0 MR4 03700534:000000f00534_NS 00000399 +22823 clk cpu0 R X9 0000000000000399 +22824 clk cpu0 IT (22788) 000111c4:0000100111c4_NS 2a0903e1 O EL1h_n : MOV w1,w9 +22824 clk cpu0 R X1 0000000000000399 +22825 clk cpu0 IT (22789) 000111c8:0000100111c8_NS 9400eb68 O EL1h_n : BL 0x4bf68 +22825 clk cpu0 R X30 00000000000111CC +22826 clk cpu0 IT (22790) 0004bf68:00001004bf68_NS d53b0022 O EL1h_n : MRS x2,CTR_EL0 +22826 clk cpu0 R X2 0000000084448004 +22827 clk cpu0 IT (22791) 0004bf6c:00001004bf6c_NS d3504c45 O EL1h_n : UBFIZ x5,x2,#48,#20 +22827 clk cpu0 R X5 0000000000000004 +22828 clk cpu0 IT (22792) 0004bf70:00001004bf70_NS 910008a5 O EL1h_n : ADD x5,x5,#2 +22828 clk cpu0 R X5 0000000000000006 +22829 clk cpu0 IT (22793) 0004bf74:00001004bf74_NS d2800024 O EL1h_n : MOV x4,#1 +22829 clk cpu0 R X4 0000000000000001 +22830 clk cpu0 IT (22794) 0004bf78:00001004bf78_NS 9ac52082 O EL1h_n : LSL x2,x4,x5 +22830 clk cpu0 R X2 0000000000000040 +22831 clk cpu0 IT (22795) 0004bf7c:00001004bf7c_NS 9ac52424 O EL1h_n : LSR x4,x1,x5 +22831 clk cpu0 R X4 000000000000000E +22832 clk cpu0 IT (22796) 0004bf80:00001004bf80_NS 91000484 O EL1h_n : ADD x4,x4,#1 +22832 clk cpu0 R X4 000000000000000F +22833 clk cpu0 IT (22797) 0004bf84:00001004bf84_NS aa0003e3 O EL1h_n : MOV x3,x0 +22833 clk cpu0 R X3 0000000023002000 +22834 clk cpu0 IT (22798) 0004bf88:00001004bf88_NS d5033f9f O EL1h_n : DSB SY +22835 clk cpu0 IS (22799) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22836 clk cpu0 IT (22800) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22836 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002000:000016242000_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22836 clk cpu0 R DC CVAC 00000000:23002000 +22836 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 CLEAN 0x000016242000_NS +22837 clk cpu0 IT (22801) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22837 clk cpu0 R X3 0000000023002040 +22838 clk cpu0 IT (22802) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22838 clk cpu0 R X4 000000000000000E +22839 clk cpu0 IT (22803) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22840 clk cpu0 IS (22804) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22841 clk cpu0 IT (22805) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22841 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002040:000016242040_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22841 clk cpu0 R DC CVAC 00000000:23002040 +22841 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0102 CLEAN 0x000016242040_NS +22842 clk cpu0 IT (22806) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22842 clk cpu0 R X3 0000000023002080 +22843 clk cpu0 IT (22807) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22843 clk cpu0 R X4 000000000000000D +22844 clk cpu0 IT (22808) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22845 clk cpu0 IS (22809) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22846 clk cpu0 IT (22810) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22846 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002080:000016242080_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22846 clk cpu0 R DC CVAC 00000000:23002080 +22846 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0105 CLEAN 0x000016242080_NS +22847 clk cpu0 IT (22811) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22847 clk cpu0 R X3 00000000230020C0 +22848 clk cpu0 IT (22812) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22848 clk cpu0 R X4 000000000000000C +22849 clk cpu0 IT (22813) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22850 clk cpu0 IS (22814) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22851 clk cpu0 IT (22815) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22851 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 230020c0:0000162420c0_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22851 clk cpu0 R DC CVAC 00000000:230020c0 +22851 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0831 CLEAN 0x0000162420c0_NS +22852 clk cpu0 IT (22816) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22852 clk cpu0 R X3 0000000023002100 +22853 clk cpu0 IT (22817) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22853 clk cpu0 R X4 000000000000000B +22854 clk cpu0 IT (22818) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22855 clk cpu0 IS (22819) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22856 clk cpu0 IT (22820) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22856 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002100:000016242100_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22856 clk cpu0 R DC CVAC 00000000:23002100 +22856 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0109 CLEAN 0x000016242100_NS +22857 clk cpu0 IT (22821) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22857 clk cpu0 R X3 0000000023002140 +22858 clk cpu0 IT (22822) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22858 clk cpu0 R X4 000000000000000A +22859 clk cpu0 IT (22823) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22860 clk cpu0 IS (22824) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22861 clk cpu0 IT (22825) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22861 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002140:000016242140_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22861 clk cpu0 R DC CVAC 00000000:23002140 +22861 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010a CLEAN 0x000016242140_NS +22862 clk cpu0 IT (22826) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22862 clk cpu0 R X3 0000000023002180 +22863 clk cpu0 IT (22827) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22863 clk cpu0 R X4 0000000000000009 +22864 clk cpu0 IT (22828) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22865 clk cpu0 IS (22829) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22866 clk cpu0 IT (22830) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22866 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002180:000016242180_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22866 clk cpu0 R DC CVAC 00000000:23002180 +22866 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010c CLEAN 0x000016242180_NS +22867 clk cpu0 IT (22831) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22867 clk cpu0 R X3 00000000230021C0 +22868 clk cpu0 IT (22832) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22868 clk cpu0 R X4 0000000000000008 +22869 clk cpu0 IT (22833) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22870 clk cpu0 IS (22834) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22871 clk cpu0 IT (22835) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22871 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 230021c0:0000162421c0_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22871 clk cpu0 R DC CVAC 00000000:230021c0 +22871 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 010e CLEAN 0x0000162421c0_NS +22872 clk cpu0 IT (22836) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22872 clk cpu0 R X3 0000000023002200 +22873 clk cpu0 IT (22837) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22873 clk cpu0 R X4 0000000000000007 +22874 clk cpu0 IT (22838) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22875 clk cpu0 IS (22839) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22876 clk cpu0 IT (22840) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22876 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002200:000016242200_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22876 clk cpu0 R DC CVAC 00000000:23002200 +22876 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0110 CLEAN 0x000016242200_NS +22877 clk cpu0 IT (22841) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22877 clk cpu0 R X3 0000000023002240 +22878 clk cpu0 IT (22842) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22878 clk cpu0 R X4 0000000000000006 +22879 clk cpu0 IT (22843) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22880 clk cpu0 IS (22844) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22881 clk cpu0 IT (22845) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22881 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002240:000016242240_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22881 clk cpu0 R DC CVAC 00000000:23002240 +22881 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0112 CLEAN 0x000016242240_NS +22882 clk cpu0 IT (22846) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22882 clk cpu0 R X3 0000000023002280 +22883 clk cpu0 IT (22847) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22883 clk cpu0 R X4 0000000000000005 +22884 clk cpu0 IT (22848) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22885 clk cpu0 IS (22849) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22886 clk cpu0 IT (22850) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22886 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002280:000016242280_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22886 clk cpu0 R DC CVAC 00000000:23002280 +22886 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0115 CLEAN 0x000016242280_NS +22887 clk cpu0 IT (22851) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22887 clk cpu0 R X3 00000000230022C0 +22888 clk cpu0 IT (22852) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22888 clk cpu0 R X4 0000000000000004 +22889 clk cpu0 IT (22853) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22890 clk cpu0 IS (22854) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22891 clk cpu0 IT (22855) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22891 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 230022c0:0000162422c0_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22891 clk cpu0 R DC CVAC 00000000:230022c0 +22891 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0117 CLEAN 0x0000162422c0_NS +22892 clk cpu0 IT (22856) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22892 clk cpu0 R X3 0000000023002300 +22893 clk cpu0 IT (22857) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22893 clk cpu0 R X4 0000000000000003 +22894 clk cpu0 IT (22858) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22895 clk cpu0 IS (22859) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22896 clk cpu0 IT (22860) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22896 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002300:000016242300_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22896 clk cpu0 R DC CVAC 00000000:23002300 +22896 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0119 CLEAN 0x000016242300_NS +22897 clk cpu0 IT (22861) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22897 clk cpu0 R X3 0000000023002340 +22898 clk cpu0 IT (22862) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22898 clk cpu0 R X4 0000000000000002 +22899 clk cpu0 IT (22863) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22900 clk cpu0 IS (22864) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22901 clk cpu0 IT (22865) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22901 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002340:000016242340_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22901 clk cpu0 R DC CVAC 00000000:23002340 +22901 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 011a CLEAN 0x000016242340_NS +22902 clk cpu0 IT (22866) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22902 clk cpu0 R X3 0000000023002380 +22903 clk cpu0 IT (22867) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22903 clk cpu0 R X4 0000000000000001 +22904 clk cpu0 IT (22868) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22905 clk cpu0 IS (22869) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22906 clk cpu0 IT (22870) 0004bf90:00001004bf90_NS d50b7a23 O EL1h_n : DC CVAC,x3 +22906 clk cpu0 CACHE MAINTENANCE Data cache Clean By MVA to PoC 23002380:000016242380_NS 16K Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate +22906 clk cpu0 R DC CVAC 00000000:23002380 +22906 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 011d CLEAN 0x000016242380_NS +22907 clk cpu0 IT (22871) 0004bf94:00001004bf94_NS 8b020063 O EL1h_n : ADD x3,x3,x2 +22907 clk cpu0 R X3 00000000230023C0 +22908 clk cpu0 IT (22872) 0004bf98:00001004bf98_NS d1000484 O EL1h_n : SUB x4,x4,#1 +22908 clk cpu0 R X4 0000000000000000 +22909 clk cpu0 IT (22873) 0004bf9c:00001004bf9c_NS 17fffffc O EL1h_n : B 0x4bf8c +22910 clk cpu0 IT (22874) 0004bf8c:00001004bf8c_NS b40000a4 O EL1h_n : CBZ x4,0x4bfa0 +22911 clk cpu0 IT (22875) 0004bfa0:00001004bfa0_NS d5033f9f O EL1h_n : DSB SY +22912 clk cpu0 IT (22876) 0004bfa4:00001004bfa4_NS d65f03c0 O EL1h_n : RET +22913 clk cpu0 IT (22877) 000111cc:0000100111cc_NS f94013fe O EL1h_n : LDR x30,[sp,#0x20] +22913 clk cpu0 MR8 03700540:000000f00540_NS 00000000_00011bf4 +22913 clk cpu0 R X30 0000000000011BF4 +22914 clk cpu0 IT (22878) 000111d0:0000100111d0_NS 9100c3ff O EL1h_n : ADD sp,sp,#0x30 +22914 clk cpu0 R SP_EL1 0000000003700550 +22915 clk cpu0 IT (22879) 000111d4:0000100111d4_NS d65f03c0 O EL1h_n : RET +22916 clk cpu0 IT (22880) 00011bf4:000010011bf4_NS f9405be0 O EL1h_n : LDR x0,[sp,#0xb0] +22916 clk cpu0 MR8 03700600:000000f00600_NS 00000000_23000088 +22916 clk cpu0 R X0 0000000023000088 +22917 clk cpu0 IT (22881) 00011bf8:000010011bf8_NS f94063fe O EL1h_n : LDR x30,[sp,#0xc0] +22917 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00011180 +22917 clk cpu0 R X30 0000000000011180 +22918 clk cpu0 IT (22882) 00011bfc:000010011bfc_NS 910343ff O EL1h_n : ADD sp,sp,#0xd0 +22918 clk cpu0 R SP_EL1 0000000003700620 +22919 clk cpu0 IT (22883) 00011c00:000010011c00_NS d65f03c0 O EL1h_n : RET +22920 clk cpu0 IT (22884) 00011180:000010011180_NS f94043e8 O EL1h_n : LDR x8,[sp,#0x80] +22920 clk cpu0 MR8 037006a0:000000f006a0_NS 00000000_03008530 +22920 clk cpu0 R X8 0000000003008530 +22921 clk cpu0 IT (22885) 00011184:000010011184_NS f9000100 O EL1h_n : STR x0,[x8,#0] +22921 clk cpu0 MW8 03008530:000000808530_NS 00000000_23000088 +22922 clk cpu0 IT (22886) 00011188:000010011188_NS 9000000a O EL1h_n : ADRP x10,0x11188 +22922 clk cpu0 R X10 0000000000011000 +22923 clk cpu0 IT (22887) 0001118c:00001001118c_NS 9134314a O EL1h_n : ADD x10,x10,#0xd0c +22923 clk cpu0 R X10 0000000000011D0C +22924 clk cpu0 IT (22888) 00011190:000010011190_NS d63f0140 O EL1h_n : BLR x10 +22924 clk cpu0 R cpsr 82000bc5 +22924 clk cpu0 R X30 0000000000011194 +22924 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00e8 ALLOC 0x000010011d00_NS +22924 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0740 ALLOC 0x000010011d00_NS +22925 clk cpu0 IT (22889) 00011d0c:000010011d0c_NS d10083ff O EL1h_n : SUB sp,sp,#0x20 +22925 clk cpu0 R cpsr 820003c5 +22925 clk cpu0 R SP_EL1 0000000003700600 +22926 clk cpu0 IT (22890) 00011d10:000010011d10_NS f9000bfe O EL1h_n : STR x30,[sp,#0x10] +22926 clk cpu0 MW8 03700610:000000f00610_NS 00000000_00011194 +22927 clk cpu0 IT (22891) 00011d14:000010011d14_NS 52800020 O EL1h_n : MOV w0,#1 +22927 clk cpu0 R X0 0000000000000001 +22928 clk cpu0 IT (22892) 00011d18:000010011d18_NS 52800108 O EL1h_n : MOV w8,#8 +22928 clk cpu0 R X8 0000000000000008 +22929 clk cpu0 IT (22893) 00011d1c:000010011d1c_NS b9000fe0 O EL1h_n : STR w0,[sp,#0xc] +22929 clk cpu0 MW4 0370060c:000000f0060c_NS 00000001 +22930 clk cpu0 IT (22894) 00011d20:000010011d20_NS b9000be8 O EL1h_n : STR w8,[sp,#8] +22930 clk cpu0 MW4 03700608:000000f00608_NS 00000008 +22931 clk cpu0 IT (22895) 00011d24:000010011d24_NS 97fffd44 O EL1h_n : BL 0x11234 +22931 clk cpu0 R X30 0000000000011D28 +22932 clk cpu0 IT (22896) 00011234:000010011234_NS d2a2c480 O EL1h_n : MOV x0,#0x16240000 +22932 clk cpu0 R X0 0000000016240000 +22933 clk cpu0 IT (22897) 00011238:000010011238_NS d65f03c0 O EL1h_n : RET +22934 clk cpu0 IT (22898) 00011d28:000010011d28_NS 97ffffd4 O EL1h_n : BL 0x11c78 +22934 clk cpu0 R X30 0000000000011D2C +22934 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00e2 ALLOC 0x000010011c40_NS +22934 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0710 ALLOC 0x000010011c40_NS +22935 clk cpu0 IT (22899) 00011c78:000010011c78_NS a9bf7bf3 O EL1h_n : STP x19,x30,[sp,#-0x10]! +22935 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_062160a2 +22935 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00011d2c +22935 clk cpu0 R SP_EL1 00000000037005F0 +22936 clk cpu0 IT (22900) 00011c7c:000010011c7c_NS 90018188 O EL1h_n : ADRP x8,0x3041c7c +22936 clk cpu0 R X8 0000000003041000 +22936 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00e4 ALLOC 0x000010011c80_NS +22936 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0720 ALLOC 0x000010011c80_NS +22937 clk cpu0 IT (22901) 00011c80:000010011c80_NS b948f908 O EL1h_n : LDR w8,[x8,#0x8f8] +22937 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +22937 clk cpu0 R X8 0000000000000000 +22938 clk cpu0 IT (22902) 00011c84:000010011c84_NS aa0003e1 O EL1h_n : MOV x1,x0 +22938 clk cpu0 R X1 0000000016240000 +22939 clk cpu0 IT (22903) 00011c88:000010011c88_NS 7100051f O EL1h_n : CMP w8,#1 +22939 clk cpu0 R cpsr 820003c5 +22940 clk cpu0 IS (22904) 00011c8c:000010011c8c_NS 540000e0 O EL1h_n : B.EQ 0x11ca8 +22941 clk cpu0 IS (22905) 00011c90:000010011c90_NS 350001e8 O EL1h_n : CBNZ w8,0x11ccc +22942 clk cpu0 IT (22906) 00011c94:000010011c94_NS b0031028 O EL1h_n : ADRP x8,0x6216c94 +22942 clk cpu0 R X8 0000000006216000 +22943 clk cpu0 IT (22907) 00011c98:000010011c98_NS f9407108 O EL1h_n : LDR x8,[x8,#0xe0] +22943 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +22943 clk cpu0 R X8 0000000013000000 +22944 clk cpu0 IT (22908) 00011c9c:000010011c9c_NS 52822309 O EL1h_n : MOV w9,#0x1118 +22944 clk cpu0 R X9 0000000000001118 +22945 clk cpu0 IT (22909) 00011ca0:000010011ca0_NS 8b090100 O EL1h_n : ADD x0,x8,x9 +22945 clk cpu0 R X0 0000000013001118 +22946 clk cpu0 IT (22910) 00011ca4:000010011ca4_NS 14000009 O EL1h_n : B 0x11cc8 +22946 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00e6 ALLOC 0x000010011cc0_NS +22946 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0730 ALLOC 0x000010011cc0_NS +22947 clk cpu0 IT (22911) 00011cc8:000010011cc8_NS 94024f70 O EL1h_n : BL 0xa5a88 +22947 clk cpu0 R X30 0000000000011CCC +22947 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00d5 ALLOC 0x0000100a5a80_NS +22947 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 16a0 ALLOC 0x0000100a5a80_NS +22948 clk cpu0 IT (22912) 000a5a88:0000100a5a88_NS f9000001 O EL1h_n : STR x1,[x0,#0] +22948 clk cpu0 MW8 13001118:000013001118_NS 00000000_16240000 +22949 clk cpu0 IT (22913) 000a5a8c:0000100a5a8c_NS d65f03c0 O EL1h_n : RET +22950 clk cpu0 IT (22914) 00011ccc:000010011ccc_NS d5033f9f O EL1h_n : DSB SY +22951 clk cpu0 IT (22915) 00011cd0:000010011cd0_NS a8c17bf3 O EL1h_n : LDP x19,x30,[sp],#0x10 +22951 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_062160a2 +22951 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00011d2c +22951 clk cpu0 R SP_EL1 0000000003700600 +22951 clk cpu0 R X19 00000000062160A2 +22951 clk cpu0 R X30 0000000000011D2C +22952 clk cpu0 IT (22916) 00011cd4:000010011cd4_NS d65f03c0 O EL1h_n : RET +22953 clk cpu0 IT (22917) 00011d2c:000010011d2c_NS b9400fe0 O EL1h_n : LDR w0,[sp,#0xc] +22953 clk cpu0 MR4 0370060c:000000f0060c_NS 00000001 +22953 clk cpu0 R X0 0000000000000001 +22954 clk cpu0 IT (22918) 00011d30:000010011d30_NS 97ffffea O EL1h_n : BL 0x11cd8 +22954 clk cpu0 R X30 0000000000011D34 +22955 clk cpu0 IT (22919) 00011cd8:000010011cd8_NS f81f0ffe O EL1h_n : STR x30,[sp,#-0x10]! +22955 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_00011d34 +22955 clk cpu0 R SP_EL1 00000000037005F0 +22956 clk cpu0 IT (22920) 00011cdc:000010011cdc_NS 90018188 O EL1h_n : ADRP x8,0x3041cdc +22956 clk cpu0 R X8 0000000003041000 +22957 clk cpu0 IT (22921) 00011ce0:000010011ce0_NS b948f908 O EL1h_n : LDR w8,[x8,#0x8f8] +22957 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +22957 clk cpu0 R X8 0000000000000000 +22958 clk cpu0 IT (22922) 00011ce4:000010011ce4_NS 34000088 O EL1h_n : CBZ w8,0x11cf4 +22959 clk cpu0 IT (22923) 00011cf4:000010011cf4_NS b0031028 O EL1h_n : ADRP x8,0x6216cf4 +22959 clk cpu0 R X8 0000000006216000 +22960 clk cpu0 IT (22924) 00011cf8:000010011cf8_NS f9407108 O EL1h_n : LDR x8,[x8,#0xe0] +22960 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +22960 clk cpu0 R X8 0000000013000000 +22961 clk cpu0 IT (22925) 00011cfc:000010011cfc_NS b9111500 O EL1h_n : STR w0,[x8,#0x1114] +22961 clk cpu0 TTW DTLB LPAE 1:0 00002c190000 0000000050210003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000050210000 +22961 clk cpu0 TTW DTLB LPAE 1:1 000050210000 0000000060410003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x0000000060410000 +22961 clk cpu0 TTW DTLB LPAE 1:2 000060410088 000000002c1c0003 : TABLE PXN=0 XN=0 AP=0 NS=0 ADDR=0x000000002c1c0000 +22961 clk cpu0 TTW DTLB LPAE 1:3 00002c1c2000 0000000016240463 : BLOCK ATTRIDX=0 NS=1 AP=1 SH=0 AF=1 nG=0 16E=0 PXN=0 XN=0 ADDR=0x0000000016240000 +22961 clk cpu0 MW4 13001114:000013001114_NS 00000001 +22961 clk cpu0 TLB FILL cpu.cpu0.DTLB 16K 0x23000000 EL3_s, nG asid=0:0x0016240000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +22961 clk cpu0 TLB FILL cpu.cpu0.S1TLB 16K 0x23000000 EL3_s, nG asid=0:0x0016240000_NS Normal NonShareable Inner=WriteBackWriteAllocate Outer=WriteBackWriteAllocate xn=0 pxn=0 ContiguousHint=0 +22962 clk cpu0 IT (22926) 00011d00:000010011d00_NS d5033f9f O EL1h_n : DSB SY +22963 clk cpu0 IT (22927) 00011d04:000010011d04_NS f84107fe O EL1h_n : LDR x30,[sp],#0x10 +22963 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_00011d34 +22963 clk cpu0 R SP_EL1 0000000003700600 +22963 clk cpu0 R X30 0000000000011D34 +22964 clk cpu0 IT (22928) 00011d08:000010011d08_NS d65f03c0 O EL1h_n : RET +22965 clk cpu0 IT (22929) 00011d34:000010011d34_NS b9400be0 O EL1h_n : LDR w0,[sp,#8] +22965 clk cpu0 MR4 03700608:000000f00608_NS 00000008 +22965 clk cpu0 R X0 0000000000000008 +22966 clk cpu0 IT (22930) 00011d38:000010011d38_NS b9400be1 O EL1h_n : LDR w1,[sp,#8] +22966 clk cpu0 MR4 03700608:000000f00608_NS 00000008 +22966 clk cpu0 R X1 0000000000000008 +22967 clk cpu0 IT (22931) 00011d3c:000010011d3c_NS 97ffffc1 O EL1h_n : BL 0x11c40 +22967 clk cpu0 R X30 0000000000011D40 +22968 clk cpu0 IT (22932) 00011c40:000010011c40_NS f81e0ff4 O EL1h_n : STR x20,[sp,#-0x20]! +22968 clk cpu0 MW8 037005e0:000000f005e0_NS ff83ff83_ff83ff83 +22968 clk cpu0 R SP_EL1 00000000037005E0 +22969 clk cpu0 IT (22933) 00011c44:000010011c44_NS a9017bf3 O EL1h_n : STP x19,x30,[sp,#0x10] +22969 clk cpu0 MW8 037005f0:000000f005f0_NS 00000000_062160a2 +22969 clk cpu0 MW8 037005f8:000000f005f8_NS 00000000_00011d40 +22970 clk cpu0 IT (22934) 00011c48:000010011c48_NS 2a0103f3 O EL1h_n : MOV w19,w1 +22970 clk cpu0 R X19 0000000000000008 +22971 clk cpu0 IT (22935) 00011c4c:000010011c4c_NS 2a0003f4 O EL1h_n : MOV w20,w0 +22971 clk cpu0 R X20 0000000000000008 +22972 clk cpu0 IT (22936) 00011c50:000010011c50_NS b9000fff O EL1h_n : STR wzr,[sp,#0xc] +22972 clk cpu0 MW4 037005ec:000000f005ec_NS 00000000 +22973 clk cpu0 IT (22937) 00011c54:000010011c54_NS 97ffffec O EL1h_n : BL 0x11c04 +22973 clk cpu0 R X30 0000000000011C58 +22974 clk cpu0 IT (22938) 00011c04:000010011c04_NS b0031028 O EL1h_n : ADRP x8,0x6216c04 +22974 clk cpu0 R X8 0000000006216000 +22975 clk cpu0 IT (22939) 00011c08:000010011c08_NS f9407108 O EL1h_n : LDR x8,[x8,#0xe0] +22975 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +22975 clk cpu0 R X8 0000000013000000 +22976 clk cpu0 IT (22940) 00011c0c:000010011c0c_NS 90018189 O EL1h_n : ADRP x9,0x3041c0c +22976 clk cpu0 R X9 0000000003041000 +22977 clk cpu0 IT (22941) 00011c10:000010011c10_NS b9511500 O EL1h_n : LDR w0,[x8,#0x1114] +22977 clk cpu0 MR4 13001114:000013001114_NS 0002a808 +22977 clk cpu0 R X0 000000000002A808 +22978 clk cpu0 IT (22942) 00011c14:000010011c14_NS b948f928 O EL1h_n : LDR w8,[x9,#0x8f8] +22978 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +22978 clk cpu0 R X8 0000000000000000 +22979 clk cpu0 IT (22943) 00011c18:000010011c18_NS 7100051f O EL1h_n : CMP w8,#1 +22979 clk cpu0 R cpsr 820003c5 +22980 clk cpu0 IT (22944) 00011c1c:000010011c1c_NS 54000041 O EL1h_n : B.NE 0x11c24 +22981 clk cpu0 IT (22945) 00011c24:000010011c24_NS d65f03c0 O EL1h_n : RET +22982 clk cpu0 IT (22946) 00011c58:000010011c58_NS b9000fe0 O EL1h_n : STR w0,[sp,#0xc] +22982 clk cpu0 MW4 037005ec:000000f005ec_NS 0002a808 +22983 clk cpu0 IT (22947) 00011c5c:000010011c5c_NS b9400fe8 O EL1h_n : LDR w8,[sp,#0xc] +22983 clk cpu0 MR4 037005ec:000000f005ec_NS 0002a808 +22983 clk cpu0 R X8 000000000002A808 +22984 clk cpu0 IT (22948) 00011c60:000010011c60_NS 0a130108 O EL1h_n : AND w8,w8,w19 +22984 clk cpu0 R X8 0000000000000008 +22985 clk cpu0 IT (22949) 00011c64:000010011c64_NS 6b14011f O EL1h_n : CMP w8,w20 +22985 clk cpu0 R cpsr 620003c5 +22986 clk cpu0 IS (22950) 00011c68:000010011c68_NS 54ffff61 O EL1h_n : B.NE 0x11c54 +22987 clk cpu0 IT (22951) 00011c6c:000010011c6c_NS a9417bf3 O EL1h_n : LDP x19,x30,[sp,#0x10] +22987 clk cpu0 MR8 037005f0:000000f005f0_NS 00000000_062160a2 +22987 clk cpu0 MR8 037005f8:000000f005f8_NS 00000000_00011d40 +22987 clk cpu0 R X19 00000000062160A2 +22987 clk cpu0 R X30 0000000000011D40 +22988 clk cpu0 IT (22952) 00011c70:000010011c70_NS f84207f4 O EL1h_n : LDR x20,[sp],#0x20 +22988 clk cpu0 MR8 037005e0:000000f005e0_NS ff83ff83_ff83ff83 +22988 clk cpu0 R SP_EL1 0000000003700600 +22988 clk cpu0 R X20 FF83FF83FF83FF83 +22989 clk cpu0 IT (22953) 00011c74:000010011c74_NS d65f03c0 O EL1h_n : RET +22989 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00ea ALLOC 0x000010011d40_NS +22989 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0750 ALLOC 0x000010011d40_NS +22990 clk cpu0 IT (22954) 00011d40:000010011d40_NS f9400bfe O EL1h_n : LDR x30,[sp,#0x10] +22990 clk cpu0 MR8 03700610:000000f00610_NS 00000000_00011194 +22990 clk cpu0 R X30 0000000000011194 +22991 clk cpu0 IT (22955) 00011d44:000010011d44_NS 910083ff O EL1h_n : ADD sp,sp,#0x20 +22991 clk cpu0 R SP_EL1 0000000003700620 +22992 clk cpu0 IT (22956) 00011d48:000010011d48_NS d65f03c0 O EL1h_n : RET +22993 clk cpu0 IT (22957) 00011194:000010011194_NS 914403ff O EL1h_n : ADD sp,sp,#0x100,LSL #12 +22993 clk cpu0 R SP_EL1 0000000003800620 +22994 clk cpu0 IT (22958) 00011198:000010011198_NS 910683ff O EL1h_n : ADD sp,sp,#0x1a0 +22994 clk cpu0 R SP_EL1 00000000038007C0 +22995 clk cpu0 IT (22959) 0001119c:00001001119c_NS a8c17bfc O EL1h_n : LDP x28,x30,[sp],#0x10 +22995 clk cpu0 MR8 038007c0:0000108007c0_NS ff7fff7f_ff7fff7f +22995 clk cpu0 MR8 038007c8:0000108007c8_NS 00000000_0003d808 +22995 clk cpu0 R SP_EL1 00000000038007D0 +22995 clk cpu0 R X28 FF7FFF7FFF7FFF7F +22995 clk cpu0 R X30 000000000003D808 +22996 clk cpu0 IT (22960) 000111a0:0000100111a0_NS d65f03c0 O EL1h_n : RET +22996 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 INVAL 0x000010035800_NS +22996 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c1 ALLOC 0x00001003d800_NS +22997 clk cpu0 IT (22961) 0003d808:00001003d808_NS a8c13bed O EL1h_n : LDP x13,x14,[sp],#0x10 +22997 clk cpu0 MR8 038007d0:0000108007d0_NS 00000000_00000032 +22997 clk cpu0 MR8 038007d8:0000108007d8_NS 00000000_00000000 +22997 clk cpu0 R SP_EL1 00000000038007E0 +22997 clk cpu0 R X13 0000000000000032 +22997 clk cpu0 R X14 0000000000000000 +22998 clk cpu0 IT (22962) 0003d80c:00001003d80c_NS a8c17bfd O EL1h_n : LDP x29,x30,[sp],#0x10 +22998 clk cpu0 MR8 038007e0:0000108007e0_NS ffffffff_fe00000f +22998 clk cpu0 MR8 038007e8:0000108007e8_NS 00000000_0009d850 +22998 clk cpu0 R SP_EL1 00000000038007F0 +22998 clk cpu0 R X29 FFFFFFFFFE00000F +22998 clk cpu0 R X30 000000000009D850 +22999 clk cpu0 IT (22963) 0003d810:00001003d810_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +22999 clk cpu0 MR8 038007f0:0000108007f0_NS 00000000_000a723c +22999 clk cpu0 MR8 038007f8:0000108007f8_NS 00000000_600003c0 +22999 clk cpu0 R SP_EL1 0000000003800800 +22999 clk cpu0 R X2 00000000000A723C +22999 clk cpu0 R X3 00000000600003C0 +23000 clk cpu0 IT (22964) 0003d814:00001003d814_NS d5184022 O EL1h_n : MSR ELR_EL1,x2 +23000 clk cpu0 R ELR_EL1 00000000:000a723c +23001 clk cpu0 IT (22965) 0003d818:00001003d818_NS d5184003 O EL1h_n : MSR SPSR_el1,x3 +23001 clk cpu0 R SPSR_EL1 00000000:600003c0 +23002 clk cpu0 IT (22966) 0003d81c:00001003d81c_NS a8c10fe2 O EL1h_n : LDP x2,x3,[sp],#0x10 +23002 clk cpu0 MR8 03800800:000010800800_NS 00000000_00000001 +23002 clk cpu0 MR8 03800808:000010800808_NS 00000000_00000002 +23002 clk cpu0 R SP_EL1 0000000003800810 +23002 clk cpu0 R X2 0000000000000001 +23002 clk cpu0 R X3 0000000000000002 +23003 clk cpu0 IT (22967) 0003d820:00001003d820_NS d69f03e0 O EL1h_n : ERET +23003 clk cpu0 E 00000000 EL0t 00000019 CoreEvent_ModeChange +23003 clk cpu0 R cpsr 600003c0 +23003 clk cpu0 R PMBIDR_EL1 00000020 +23003 clk cpu0 R TRBIDR_EL1 000000000000002b +23003 clk cpu0 SIGNAL: SIGNAL=DebugReset STATE=N +23003 clk cpu0 SIGNAL: SIGNAL=ResetHold STATE=N +23004 clk cpu0 IT (22968) 000a723c:0000100a723c_NS d65f03c0 O EL0t_n : RET +23004 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 INVAL 0x000010035840_NS +23004 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00c2 ALLOC 0x00001009d840_NS +23005 clk cpu0 IT (22969) 0009d850:00001009d850_NS aa1303e0 O EL0t_n : MOV x0,x19 +23005 clk cpu0 R X0 00000000062160A2 +23006 clk cpu0 IT (22970) 0009d854:00001009d854_NS 97ffec42 O EL0t_n : BL 0x9895c +23006 clk cpu0 R X30 000000000009D858 +23007 clk cpu0 IT (22971) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +23007 clk cpu0 R X8 0000000006216000 +23008 clk cpu0 IT (22972) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +23008 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +23008 clk cpu0 R X8 0000000000000001 +23009 clk cpu0 IT (22973) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +23009 clk cpu0 R cpsr 800003c0 +23010 clk cpu0 IT (22974) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +23011 clk cpu0 IT (22975) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +23012 clk cpu0 IT (22976) 0009d858:00001009d858_NS 97fff6e1 O EL0t_n : BL 0x9b3dc +23012 clk cpu0 R X30 000000000009D85C +23012 clk cpu0 CACHE cpu.cpu0.l1icache LINE 019f INVAL 0x00001009f3c0_NS +23012 clk cpu0 CACHE cpu.cpu0.l1icache LINE 019f ALLOC 0x00001009b3c0_NS +23012 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0cf1 ALLOC 0x00001009b3c0_NS +23013 clk cpu0 IT (22977) 0009b3dc:00001009b3dc_NS a9ba6ffc O EL0t_n : STP x28,x27,[sp,#-0x60]! +23013 clk cpu0 MW8 03045890:000000845890_NS ff7fff7f_ff7fff7f +23013 clk cpu0 MW8 03045898:000000845898_NS 00010001_00010001 +23013 clk cpu0 R SP_EL0 0000000003045890 +23014 clk cpu0 IT (22978) 0009b3e0:00001009b3e0_NS d0017c68 O EL0t_n : ADRP x8,0x30293e0 +23014 clk cpu0 R X8 0000000003029000 +23015 clk cpu0 IT (22979) 0009b3e4:00001009b3e4_NS b9473109 O EL0t_n : LDR w9,[x8,#0x730] +23015 clk cpu0 MR4 03029730:000000829730_NS 00000000 +23015 clk cpu0 R X9 0000000000000000 +23016 clk cpu0 IT (22980) 0009b3e8:00001009b3e8_NS a90167fa O EL0t_n : STP x26,x25,[sp,#0x10] +23016 clk cpu0 MW8 030458a0:0000008458a0_NS ffe000ff_ffe000ff +23016 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_0000003c +23017 clk cpu0 IT (22981) 0009b3ec:00001009b3ec_NS a9025ff8 O EL0t_n : STP x24,x23,[sp,#0x20] +23017 clk cpu0 MW8 030458b0:0000008458b0_NS 00000000_00007c00 +23017 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_00000000 +23018 clk cpu0 IT (22982) 0009b3f0:00001009b3f0_NS a90357f6 O EL0t_n : STP x22,x21,[sp,#0x30] +23018 clk cpu0 MW8 030458c0:0000008458c0_NS 00000000_90000000 +23018 clk cpu0 MW8 030458c8:0000008458c8_NS 00000000_02f00028 +23019 clk cpu0 IT (22983) 0009b3f4:00001009b3f4_NS a9044ff4 O EL0t_n : STP x20,x19,[sp,#0x40] +23019 clk cpu0 MW8 030458d0:0000008458d0_NS ff83ff83_ff83ff83 +23019 clk cpu0 MW8 030458d8:0000008458d8_NS 00000000_062160a2 +23020 clk cpu0 IT (22984) 0009b3f8:00001009b3f8_NS a9057bfd O EL0t_n : STP x29,x30,[sp,#0x50] +23020 clk cpu0 MW8 030458e0:0000008458e0_NS ffffffff_fe00000f +23020 clk cpu0 MW8 030458e8:0000008458e8_NS 00000000_0009d85c +23021 clk cpu0 IT (22985) 0009b3fc:00001009b3fc_NS 34000109 O EL0t_n : CBZ w9,0x9b41c +23021 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01a0 INVAL 0x000010093400_NS +23021 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01a0 ALLOC 0x00001009b400_NS +23021 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0d01 ALLOC 0x00001009b400_NS +23022 clk cpu0 IT (22986) 0009b41c:00001009b41c_NS f0030bc9 O EL0t_n : ADRP x9,0x621641c +23022 clk cpu0 R X9 0000000006216000 +23023 clk cpu0 IT (22987) 0009b420:00001009b420_NS f0030bd9 O EL0t_n : ADRP x25,0x6216420 +23023 clk cpu0 R X25 0000000006216000 +23024 clk cpu0 IT (22988) 0009b424:00001009b424_NS b940f92a O EL0t_n : LDR w10,[x9,#0xf8] +23024 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +23024 clk cpu0 R X10 0000000000000003 +23025 clk cpu0 IT (22989) 0009b428:00001009b428_NS b9405329 O EL0t_n : LDR w9,[x25,#0x50] +23025 clk cpu0 MR4 06216050:000015216050_NS 00000002 +23025 clk cpu0 R X9 0000000000000002 +23026 clk cpu0 IT (22990) 0009b42c:00001009b42c_NS 5280002b O EL0t_n : MOV w11,#1 +23026 clk cpu0 R X11 0000000000000001 +23027 clk cpu0 IT (22991) 0009b430:00001009b430_NS b907310b O EL0t_n : STR w11,[x8,#0x730] +23027 clk cpu0 MW4 03029730:000000829730_NS 00000001 +23028 clk cpu0 IS (22992) 0009b434:00001009b434_NS 3400050a O EL0t_n : CBZ w10,0x9b4d4 +23029 clk cpu0 IS (22993) 0009b438:00001009b438_NS 34fffe49 O EL0t_n : CBZ w9,0x9b400 +23030 clk cpu0 IT (22994) 0009b43c:00001009b43c_NS f0030bda O EL0t_n : ADRP x26,0x621643c +23030 clk cpu0 R X26 0000000006216000 +23030 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01a3 ALLOC 0x00001009b440_NS +23030 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0d11 ALLOC 0x00001009b440_NS +23031 clk cpu0 IT (22995) 0009b440:00001009b440_NS d0fffd94 O EL0t_n : ADRP x20,0x4d440 +23031 clk cpu0 R X20 000000000004D000 +23032 clk cpu0 IT (22996) 0009b444:00001009b444_NS b0fffd95 O EL0t_n : ADRP x21,0x4c444 +23032 clk cpu0 R X21 000000000004C000 +23033 clk cpu0 IT (22997) 0009b448:00001009b448_NS d0fffd96 O EL0t_n : ADRP x22,0x4d448 +23033 clk cpu0 R X22 000000000004D000 +23034 clk cpu0 IT (22998) 0009b44c:00001009b44c_NS d0fffd97 O EL0t_n : ADRP x23,0x4d44c +23034 clk cpu0 R X23 000000000004D000 +23035 clk cpu0 IT (22999) 0009b450:00001009b450_NS d0fffd98 O EL0t_n : ADRP x24,0x4d450 +23035 clk cpu0 R X24 000000000004D000 +23036 clk cpu0 IT (23000) 0009b454:00001009b454_NS aa1f03f3 O EL0t_n : MOV x19,xzr +23036 clk cpu0 R X19 0000000000000000 +23037 clk cpu0 IT (23001) 0009b458:00001009b458_NS 9100d35a O EL0t_n : ADD x26,x26,#0x34 +23037 clk cpu0 R X26 0000000006216034 +23038 clk cpu0 IT (23002) 0009b45c:00001009b45c_NS 91033294 O EL0t_n : ADD x20,x20,#0xcc +23038 clk cpu0 R X20 000000000004D0CC +23039 clk cpu0 IT (23003) 0009b460:00001009b460_NS 913e46b5 O EL0t_n : ADD x21,x21,#0xf91 +23039 clk cpu0 R X21 000000000004CF91 +23040 clk cpu0 IT (23004) 0009b464:00001009b464_NS 9101dad6 O EL0t_n : ADD x22,x22,#0x76 +23040 clk cpu0 R X22 000000000004D076 +23041 clk cpu0 IT (23005) 0009b468:00001009b468_NS 9101b2f7 O EL0t_n : ADD x23,x23,#0x6c +23041 clk cpu0 R X23 000000000004D06C +23042 clk cpu0 IT (23006) 0009b46c:00001009b46c_NS 91020318 O EL0t_n : ADD x24,x24,#0x80 +23042 clk cpu0 R X24 000000000004D080 +23043 clk cpu0 IT (23007) 0009b470:00001009b470_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +23043 clk cpu0 R X0 0000000000000000 +23044 clk cpu0 IT (23008) 0009b474:00001009b474_NS aa1403e1 O EL0t_n : MOV x1,x20 +23044 clk cpu0 R X1 000000000004D0CC +23045 clk cpu0 IT (23009) 0009b478:00001009b478_NS 2a1303e2 O EL0t_n : MOV w2,w19 +23045 clk cpu0 R X2 0000000000000000 +23046 clk cpu0 IT (23010) 0009b47c:00001009b47c_NS 94000414 O EL0t_n : BL 0x9c4cc +23046 clk cpu0 R X30 000000000009B480 +23047 clk cpu0 IT (23011) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +23047 clk cpu0 R SP_EL0 0000000003045800 +23048 clk cpu0 IT (23012) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +23048 clk cpu0 R X8 0000000006216000 +23049 clk cpu0 IT (23013) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +23049 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +23049 clk cpu0 R X8 0000000000000003 +23050 clk cpu0 IT (23014) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +23050 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +23050 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +23051 clk cpu0 IT (23015) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +23051 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000000 +23051 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b480 +23052 clk cpu0 IT (23016) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +23052 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +23052 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +23053 clk cpu0 IT (23017) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +23053 clk cpu0 R cpsr 200003c0 +23054 clk cpu0 IT (23018) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +23054 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +23054 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +23055 clk cpu0 IT (23019) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +23055 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +23055 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +23056 clk cpu0 IT (23020) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +23056 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +23056 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +23057 clk cpu0 IT (23021) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +23057 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +23057 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +23058 clk cpu0 IS (23022) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +23059 clk cpu0 IT (23023) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +23059 clk cpu0 R X20 0000000003008000 +23060 clk cpu0 IT (23024) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +23060 clk cpu0 R X20 0000000003008528 +23061 clk cpu0 IT (23025) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +23061 clk cpu0 R X0 0000000003008528 +23062 clk cpu0 IT (23026) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +23062 clk cpu0 R X19 000000000004D0CC +23063 clk cpu0 IT (23027) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +23063 clk cpu0 R X30 000000000009C510 +23064 clk cpu0 IT (23028) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +23064 clk cpu0 R X8 0000000006216000 +23065 clk cpu0 IT (23029) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +23065 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +23065 clk cpu0 R X8 0000000000000001 +23066 clk cpu0 IT (23030) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +23066 clk cpu0 R cpsr 800003c0 +23067 clk cpu0 IT (23031) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +23068 clk cpu0 IT (23032) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +23069 clk cpu0 IT (23033) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +23069 clk cpu0 R X9 0000000003045800 +23070 clk cpu0 IT (23034) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +23070 clk cpu0 R X8 00000000FFFFFFD0 +23071 clk cpu0 IT (23035) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +23071 clk cpu0 R X10 0000000003045890 +23072 clk cpu0 IT (23036) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +23072 clk cpu0 R X9 0000000003045830 +23073 clk cpu0 IT (23037) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +23073 clk cpu0 R X0 0000000000000000 +23074 clk cpu0 IT (23038) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +23074 clk cpu0 R X1 0000000000000000 +23075 clk cpu0 IT (23039) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +23075 clk cpu0 R X2 0000000000000000 +23076 clk cpu0 IT (23040) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +23076 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +23077 clk cpu0 IT (23041) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +23077 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +23077 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +23078 clk cpu0 IT (23042) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +23079 clk cpu0 IT (23043) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +23079 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +23079 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +23079 clk cpu0 R X8 0000000000000000 +23079 clk cpu0 R X10 0000000003045830 +23080 clk cpu0 IT (23044) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +23080 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +23080 clk cpu0 R X9 0000000003045890 +23081 clk cpu0 IT (23045) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +23081 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +23081 clk cpu0 R X11 00000000FFFFFFD0 +23082 clk cpu0 IT (23046) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +23082 clk cpu0 R X21 0000000000000000 +23083 clk cpu0 IT (23047) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +23083 clk cpu0 R X1 0000000003045830 +23084 clk cpu0 IT (23048) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +23084 clk cpu0 R X0 000000000004D0CC +23085 clk cpu0 IT (23049) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +23085 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +23085 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +23086 clk cpu0 IT (23050) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +23086 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +23087 clk cpu0 IT (23051) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +23087 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +23088 clk cpu0 IT (23052) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +23088 clk cpu0 R X30 000000000009C560 +23089 clk cpu0 IT (23053) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +23089 clk cpu0 R SP_EL0 0000000003045760 +23090 clk cpu0 IT (23054) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +23090 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d0cc +23090 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +23091 clk cpu0 IT (23055) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +23091 clk cpu0 R X19 0000000003045830 +23092 clk cpu0 IT (23056) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +23092 clk cpu0 R X1 000000000004C000 +23093 clk cpu0 IT (23057) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +23093 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +23093 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +23094 clk cpu0 IT (23058) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +23094 clk cpu0 R X20 000000000004D0CC +23095 clk cpu0 IT (23059) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +23095 clk cpu0 R X1 000000000004C00B +23096 clk cpu0 IT (23060) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +23096 clk cpu0 R X0 0000000003045764 +23097 clk cpu0 IT (23061) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +23097 clk cpu0 R X2 000000000000003B +23098 clk cpu0 IT (23062) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +23098 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +23099 clk cpu0 IT (23063) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +23099 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +23099 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216034 +23100 clk cpu0 IT (23064) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +23100 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +23100 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +23101 clk cpu0 IT (23065) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +23101 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +23101 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +23102 clk cpu0 IT (23066) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +23102 clk cpu0 R X30 0000000000092B80 +23103 clk cpu0 IT (23067) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +23103 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +23103 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +23103 clk cpu0 R SP_EL0 0000000003045750 +23104 clk cpu0 IT (23068) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +23104 clk cpu0 R X19 0000000003045764 +23105 clk cpu0 IT (23069) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +23105 clk cpu0 R X30 00000000000104DC +23106 clk cpu0 IT (23070) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +23106 clk cpu0 R cpsr 200003c0 +23107 clk cpu0 IS (23071) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +23108 clk cpu0 IT (23072) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +23108 clk cpu0 R cpsr 400003c0 +23109 clk cpu0 IT (23073) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +23110 clk cpu0 IT (23074) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +23110 clk cpu0 R cpsr 000003c0 +23110 clk cpu0 R X10 0000000000000003 +23111 clk cpu0 IS (23075) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +23112 clk cpu0 IT (23076) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +23112 clk cpu0 R X9 0000000000000020 +23113 clk cpu0 IT (23077) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +23113 clk cpu0 R X8 000000000004C008 +23114 clk cpu0 IT (23078) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +23114 clk cpu0 R cpsr 200003c0 +23115 clk cpu0 IT (23079) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +23115 clk cpu0 R X9 0000000000000008 +23116 clk cpu0 IS (23080) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +23117 clk cpu0 IT (23081) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +23117 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +23117 clk cpu0 R X12 000000000A00000A +23117 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 INVAL 0x000070450000_NS +23117 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0000 ALLOC 0x00001004c000_NS +23118 clk cpu0 IT (23082) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +23118 clk cpu0 R X10 0000000000000018 +23119 clk cpu0 IT (23083) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +23119 clk cpu0 R X11 000000000000003B +23120 clk cpu0 IT (23084) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23120 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +23120 clk cpu0 R X8 000000000004C00C +23120 clk cpu0 R X13 000000006F727245 +23121 clk cpu0 IT (23085) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23121 clk cpu0 R X12 000000000000000A +23122 clk cpu0 IT (23086) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23122 clk cpu0 R X11 0000000000000037 +23123 clk cpu0 IT (23087) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23123 clk cpu0 R cpsr 200003c0 +23124 clk cpu0 IT (23088) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23124 clk cpu0 R X14 0000000072724500 +23125 clk cpu0 IT (23089) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23125 clk cpu0 R X12 000000007272450A +23126 clk cpu0 IT (23090) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23126 clk cpu0 MW4 03045764:000000845764_NS 7272450a +23126 clk cpu0 R X0 0000000003045768 +23127 clk cpu0 IT (23091) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23127 clk cpu0 R X12 000000006F727245 +23128 clk cpu0 IT (23092) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23129 clk cpu0 IT (23093) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23129 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +23129 clk cpu0 R X8 000000000004C010 +23129 clk cpu0 R X13 0000000049203A72 +23130 clk cpu0 IT (23094) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23130 clk cpu0 R X12 000000000000006F +23131 clk cpu0 IT (23095) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23131 clk cpu0 R X11 0000000000000033 +23132 clk cpu0 IT (23096) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23132 clk cpu0 R cpsr 200003c0 +23133 clk cpu0 IT (23097) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23133 clk cpu0 R X14 00000000203A7200 +23134 clk cpu0 IT (23098) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23134 clk cpu0 R X12 00000000203A726F +23135 clk cpu0 IT (23099) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23135 clk cpu0 MW4 03045768:000000845768_NS 203a726f +23135 clk cpu0 R X0 000000000304576C +23136 clk cpu0 IT (23100) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23136 clk cpu0 R X12 0000000049203A72 +23137 clk cpu0 IT (23101) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23138 clk cpu0 IT (23102) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23138 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +23138 clk cpu0 R X8 000000000004C014 +23138 clk cpu0 R X13 0000000067656C6C +23139 clk cpu0 IT (23103) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23139 clk cpu0 R X12 0000000000000049 +23140 clk cpu0 IT (23104) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23140 clk cpu0 R X11 000000000000002F +23141 clk cpu0 IT (23105) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23141 clk cpu0 R cpsr 200003c0 +23142 clk cpu0 IT (23106) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23142 clk cpu0 R X14 00000000656C6C00 +23143 clk cpu0 IT (23107) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23143 clk cpu0 R X12 00000000656C6C49 +23144 clk cpu0 IT (23108) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23144 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +23144 clk cpu0 R X0 0000000003045770 +23145 clk cpu0 IT (23109) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23145 clk cpu0 R X12 0000000067656C6C +23146 clk cpu0 IT (23110) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23147 clk cpu0 IT (23111) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23147 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +23147 clk cpu0 R X8 000000000004C018 +23147 clk cpu0 R X13 0000000066206C61 +23148 clk cpu0 IT (23112) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23148 clk cpu0 R X12 0000000000000067 +23149 clk cpu0 IT (23113) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23149 clk cpu0 R X11 000000000000002B +23150 clk cpu0 IT (23114) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23150 clk cpu0 R cpsr 200003c0 +23151 clk cpu0 IT (23115) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23151 clk cpu0 R X14 00000000206C6100 +23152 clk cpu0 IT (23116) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23152 clk cpu0 R X12 00000000206C6167 +23153 clk cpu0 IT (23117) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23153 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +23153 clk cpu0 R X0 0000000003045774 +23154 clk cpu0 IT (23118) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23154 clk cpu0 R X12 0000000066206C61 +23155 clk cpu0 IT (23119) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23156 clk cpu0 IT (23120) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23156 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +23156 clk cpu0 R X8 000000000004C01C +23156 clk cpu0 R X13 00000000616D726F +23157 clk cpu0 IT (23121) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23157 clk cpu0 R X12 0000000000000066 +23158 clk cpu0 IT (23122) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23158 clk cpu0 R X11 0000000000000027 +23159 clk cpu0 IT (23123) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23159 clk cpu0 R cpsr 200003c0 +23160 clk cpu0 IT (23124) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23160 clk cpu0 R X14 000000006D726F00 +23161 clk cpu0 IT (23125) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23161 clk cpu0 R X12 000000006D726F66 +23162 clk cpu0 IT (23126) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23162 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +23162 clk cpu0 R X0 0000000003045778 +23163 clk cpu0 IT (23127) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23163 clk cpu0 R X12 00000000616D726F +23164 clk cpu0 IT (23128) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23165 clk cpu0 IT (23129) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23165 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +23165 clk cpu0 R X8 000000000004C020 +23165 clk cpu0 R X13 0000000070732074 +23166 clk cpu0 IT (23130) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23166 clk cpu0 R X12 0000000000000061 +23167 clk cpu0 IT (23131) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23167 clk cpu0 R X11 0000000000000023 +23168 clk cpu0 IT (23132) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23168 clk cpu0 R cpsr 200003c0 +23169 clk cpu0 IT (23133) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23169 clk cpu0 R X14 0000000073207400 +23170 clk cpu0 IT (23134) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23170 clk cpu0 R X12 0000000073207461 +23171 clk cpu0 IT (23135) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23171 clk cpu0 MW4 03045778:000000845778_NS 73207461 +23171 clk cpu0 R X0 000000000304577C +23172 clk cpu0 IT (23136) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23172 clk cpu0 R X12 0000000070732074 +23173 clk cpu0 IT (23137) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23174 clk cpu0 IT (23138) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23174 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +23174 clk cpu0 R X8 000000000004C024 +23174 clk cpu0 R X13 0000000066696365 +23175 clk cpu0 IT (23139) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23175 clk cpu0 R X12 0000000000000070 +23176 clk cpu0 IT (23140) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23176 clk cpu0 R X11 000000000000001F +23177 clk cpu0 IT (23141) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23177 clk cpu0 R cpsr 200003c0 +23178 clk cpu0 IT (23142) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23178 clk cpu0 R X14 0000000069636500 +23179 clk cpu0 IT (23143) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23179 clk cpu0 R X12 0000000069636570 +23180 clk cpu0 IT (23144) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23180 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +23180 clk cpu0 R X0 0000000003045780 +23181 clk cpu0 IT (23145) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23181 clk cpu0 R X12 0000000066696365 +23182 clk cpu0 IT (23146) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23183 clk cpu0 IT (23147) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23183 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +23183 clk cpu0 R X8 000000000004C028 +23183 clk cpu0 R X13 0000000020726569 +23184 clk cpu0 IT (23148) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23184 clk cpu0 R X12 0000000000000066 +23185 clk cpu0 IT (23149) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23185 clk cpu0 R X11 000000000000001B +23186 clk cpu0 IT (23150) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23186 clk cpu0 R cpsr 200003c0 +23187 clk cpu0 IT (23151) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23187 clk cpu0 R X14 0000000072656900 +23188 clk cpu0 IT (23152) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23188 clk cpu0 R X12 0000000072656966 +23189 clk cpu0 IT (23153) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23189 clk cpu0 MW4 03045780:000000845780_NS 72656966 +23189 clk cpu0 R X0 0000000003045784 +23190 clk cpu0 IT (23154) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23190 clk cpu0 R X12 0000000020726569 +23191 clk cpu0 IT (23155) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23192 clk cpu0 IT (23156) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23192 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +23192 clk cpu0 R X8 000000000004C02C +23192 clk cpu0 R X13 0000000064657375 +23193 clk cpu0 IT (23157) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23193 clk cpu0 R X12 0000000000000020 +23194 clk cpu0 IT (23158) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23194 clk cpu0 R X11 0000000000000017 +23195 clk cpu0 IT (23159) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23195 clk cpu0 R cpsr 200003c0 +23196 clk cpu0 IT (23160) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23196 clk cpu0 R X14 0000000065737500 +23197 clk cpu0 IT (23161) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23197 clk cpu0 R X12 0000000065737520 +23198 clk cpu0 IT (23162) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23198 clk cpu0 MW4 03045784:000000845784_NS 65737520 +23198 clk cpu0 R X0 0000000003045788 +23199 clk cpu0 IT (23163) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23199 clk cpu0 R X12 0000000064657375 +23200 clk cpu0 IT (23164) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23201 clk cpu0 IT (23165) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23201 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +23201 clk cpu0 R X8 000000000004C030 +23201 clk cpu0 R X13 000000005F27203A +23202 clk cpu0 IT (23166) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23202 clk cpu0 R X12 0000000000000064 +23203 clk cpu0 IT (23167) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23203 clk cpu0 R X11 0000000000000013 +23204 clk cpu0 IT (23168) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23204 clk cpu0 R cpsr 200003c0 +23205 clk cpu0 IT (23169) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23205 clk cpu0 R X14 0000000027203A00 +23206 clk cpu0 IT (23170) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23206 clk cpu0 R X12 0000000027203A64 +23207 clk cpu0 IT (23171) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23207 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +23207 clk cpu0 R X0 000000000304578C +23208 clk cpu0 IT (23172) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23208 clk cpu0 R X12 000000005F27203A +23209 clk cpu0 IT (23173) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23210 clk cpu0 IT (23174) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23210 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +23210 clk cpu0 R X8 000000000004C034 +23210 clk cpu0 R X13 0000000045202E27 +23211 clk cpu0 IT (23175) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23211 clk cpu0 R X12 000000000000005F +23212 clk cpu0 IT (23176) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23212 clk cpu0 R X11 000000000000000F +23213 clk cpu0 IT (23177) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23213 clk cpu0 R cpsr 200003c0 +23214 clk cpu0 IT (23178) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23214 clk cpu0 R X14 00000000202E2700 +23215 clk cpu0 IT (23179) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23215 clk cpu0 R X12 00000000202E275F +23216 clk cpu0 IT (23180) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23216 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +23216 clk cpu0 R X0 0000000003045790 +23217 clk cpu0 IT (23181) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23217 clk cpu0 R X12 0000000045202E27 +23218 clk cpu0 IT (23182) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23219 clk cpu0 IT (23183) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23219 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +23219 clk cpu0 R X8 000000000004C038 +23219 clk cpu0 R X13 000000006E69646E +23220 clk cpu0 IT (23184) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23220 clk cpu0 R X12 0000000000000045 +23221 clk cpu0 IT (23185) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23221 clk cpu0 R X11 000000000000000B +23222 clk cpu0 IT (23186) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23222 clk cpu0 R cpsr 200003c0 +23223 clk cpu0 IT (23187) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23223 clk cpu0 R X14 0000000069646E00 +23224 clk cpu0 IT (23188) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23224 clk cpu0 R X12 0000000069646E45 +23225 clk cpu0 IT (23189) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23225 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +23225 clk cpu0 R X0 0000000003045794 +23226 clk cpu0 IT (23190) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23226 clk cpu0 R X12 000000006E69646E +23227 clk cpu0 IT (23191) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23228 clk cpu0 IT (23192) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23228 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +23228 clk cpu0 R X8 000000000004C03C +23228 clk cpu0 R X13 0000000065542067 +23229 clk cpu0 IT (23193) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23229 clk cpu0 R X12 000000000000006E +23230 clk cpu0 IT (23194) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23230 clk cpu0 R X11 0000000000000007 +23231 clk cpu0 IT (23195) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23231 clk cpu0 R cpsr 200003c0 +23232 clk cpu0 IT (23196) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23232 clk cpu0 R X14 0000000054206700 +23233 clk cpu0 IT (23197) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23233 clk cpu0 R X12 000000005420676E +23234 clk cpu0 IT (23198) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23234 clk cpu0 MW4 03045794:000000845794_NS 5420676e +23234 clk cpu0 R X0 0000000003045798 +23235 clk cpu0 IT (23199) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23235 clk cpu0 R X12 0000000065542067 +23236 clk cpu0 IT (23200) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23237 clk cpu0 IT (23201) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23237 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +23237 clk cpu0 R X8 000000000004C040 +23237 clk cpu0 R X13 000000000A2E7473 +23238 clk cpu0 IT (23202) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23238 clk cpu0 R X12 0000000000000065 +23239 clk cpu0 IT (23203) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23239 clk cpu0 R X11 0000000000000003 +23240 clk cpu0 IT (23204) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23240 clk cpu0 R cpsr 600003c0 +23241 clk cpu0 IT (23205) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23241 clk cpu0 R X14 000000002E747300 +23242 clk cpu0 IT (23206) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23242 clk cpu0 R X12 000000002E747365 +23243 clk cpu0 IT (23207) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23243 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +23243 clk cpu0 R X0 000000000304579C +23244 clk cpu0 IT (23208) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23244 clk cpu0 R X12 000000000A2E7473 +23245 clk cpu0 IS (23209) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23246 clk cpu0 IT (23210) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +23246 clk cpu0 R X2 0000000000000003 +23247 clk cpu0 IT (23211) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +23247 clk cpu0 R X9 0000000000000001 +23248 clk cpu0 IT (23212) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +23248 clk cpu0 R X8 000000000004C03F +23249 clk cpu0 IT (23213) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +23249 clk cpu0 R X1 000000000004C043 +23250 clk cpu0 IT (23214) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +23250 clk cpu0 R cpsr 200003c0 +23251 clk cpu0 IS (23215) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +23252 clk cpu0 IT (23216) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +23252 clk cpu0 MR1 0004c043:00001004c043_NS 0a +23252 clk cpu0 R X8 000000000000000A +23253 clk cpu0 IT (23217) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +23253 clk cpu0 MW1 0304579c:00000084579c_NS 0a +23254 clk cpu0 IS (23218) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +23255 clk cpu0 IT (23219) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +23255 clk cpu0 MR1 0004c044:00001004c044_NS 00 +23255 clk cpu0 R X8 0000000000000000 +23256 clk cpu0 IT (23220) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +23256 clk cpu0 R cpsr 600003c0 +23257 clk cpu0 IT (23221) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +23257 clk cpu0 MW1 0304579d:00000084579d_NS 00 +23258 clk cpu0 IS (23222) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +23259 clk cpu0 IT (23223) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +23259 clk cpu0 MR1 0004c045:00001004c045_NS 00 +23259 clk cpu0 R X8 0000000000000000 +23260 clk cpu0 IT (23224) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +23260 clk cpu0 MW1 0304579e:00000084579e_NS 00 +23261 clk cpu0 IT (23225) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +23262 clk cpu0 IT (23226) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +23262 clk cpu0 R X0 0000000003045764 +23263 clk cpu0 IT (23227) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +23263 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +23263 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +23263 clk cpu0 R SP_EL0 0000000003045760 +23263 clk cpu0 R X19 0000000003045830 +23263 clk cpu0 R X30 0000000000092B80 +23264 clk cpu0 IT (23228) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +23265 clk cpu0 IT (23229) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +23265 clk cpu0 R X22 000000000004C000 +23266 clk cpu0 IT (23230) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +23266 clk cpu0 R X23 000000000004C000 +23267 clk cpu0 IT (23231) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +23267 clk cpu0 R X26 0000000000000000 +23268 clk cpu0 IT (23232) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +23268 clk cpu0 R X21 0000000003029000 +23269 clk cpu0 IT (23233) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +23269 clk cpu0 R X22 000000000004C108 +23270 clk cpu0 IT (23234) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +23270 clk cpu0 R X23 000000000004C129 +23271 clk cpu0 IT (23235) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +23271 clk cpu0 R X24 0000000003041000 +23272 clk cpu0 IT (23236) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +23272 clk cpu0 R X25 0000000006216000 +23273 clk cpu0 IT (23237) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +23274 clk cpu0 IT (23238) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23274 clk cpu0 MR1 0004d0cc:00001004d0cc_NS 0a +23274 clk cpu0 R X8 000000000000000A +23274 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0086 ALLOC 0x00001004d0c0_NS +23274 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1430 ALLOC 0x00001004d0c0_NS +23275 clk cpu0 IT (23239) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23275 clk cpu0 R cpsr 800003c0 +23276 clk cpu0 IS (23240) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23277 clk cpu0 IS (23241) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23278 clk cpu0 IT (23242) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23278 clk cpu0 R cpsr 000003c0 +23279 clk cpu0 IT (23243) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23280 clk cpu0 IT (23244) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23280 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23280 clk cpu0 R X9 0000000013000000 +23281 clk cpu0 IT (23245) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23281 clk cpu0 R X27 000000000004D0CC +23282 clk cpu0 IT (23246) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23282 clk cpu0 R X20 000000000004D0CD +TUBE CPU0: +23283 clk cpu0 IT (23247) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23283 clk cpu0 MW1 13000000:000013000000_NS 0a +23284 clk cpu0 IT (23248) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23284 clk cpu0 MR1 0004d0cd:00001004d0cd_NS 3e +23284 clk cpu0 R X8 000000000000003E +23285 clk cpu0 IT (23249) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23285 clk cpu0 R cpsr 200003c0 +23286 clk cpu0 IS (23250) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23287 clk cpu0 IS (23251) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23288 clk cpu0 IT (23252) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23288 clk cpu0 R cpsr 000003c0 +23289 clk cpu0 IT (23253) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23290 clk cpu0 IT (23254) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23290 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23290 clk cpu0 R X9 0000000013000000 +23291 clk cpu0 IT (23255) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23291 clk cpu0 R X27 000000000004D0CD +23292 clk cpu0 IT (23256) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23292 clk cpu0 R X20 000000000004D0CE +23293 clk cpu0 IT (23257) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23293 clk cpu0 MW1 13000000:000013000000_NS 3e +23294 clk cpu0 IT (23258) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23294 clk cpu0 MR1 0004d0ce:00001004d0ce_NS 3e +23294 clk cpu0 R X8 000000000000003E +23295 clk cpu0 IT (23259) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23295 clk cpu0 R cpsr 200003c0 +23296 clk cpu0 IS (23260) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23297 clk cpu0 IS (23261) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23298 clk cpu0 IT (23262) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23298 clk cpu0 R cpsr 000003c0 +23299 clk cpu0 IT (23263) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23300 clk cpu0 IT (23264) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23300 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23300 clk cpu0 R X9 0000000013000000 +23301 clk cpu0 IT (23265) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23301 clk cpu0 R X27 000000000004D0CE +23302 clk cpu0 IT (23266) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23302 clk cpu0 R X20 000000000004D0CF +23303 clk cpu0 IT (23267) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23303 clk cpu0 MW1 13000000:000013000000_NS 3e +23304 clk cpu0 IT (23268) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23304 clk cpu0 MR1 0004d0cf:00001004d0cf_NS 43 +23304 clk cpu0 R X8 0000000000000043 +23305 clk cpu0 IT (23269) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23305 clk cpu0 R cpsr 200003c0 +23306 clk cpu0 IS (23270) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23307 clk cpu0 IS (23271) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23308 clk cpu0 IT (23272) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23308 clk cpu0 R cpsr 000003c0 +23309 clk cpu0 IT (23273) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23310 clk cpu0 IT (23274) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23310 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23310 clk cpu0 R X9 0000000013000000 +23311 clk cpu0 IT (23275) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23311 clk cpu0 R X27 000000000004D0CF +23312 clk cpu0 IT (23276) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23312 clk cpu0 R X20 000000000004D0D0 +23313 clk cpu0 IT (23277) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23313 clk cpu0 MW1 13000000:000013000000_NS 43 +23314 clk cpu0 IT (23278) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23314 clk cpu0 MR1 0004d0d0:00001004d0d0_NS 50 +23314 clk cpu0 R X8 0000000000000050 +23315 clk cpu0 IT (23279) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23315 clk cpu0 R cpsr 200003c0 +23316 clk cpu0 IS (23280) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23317 clk cpu0 IS (23281) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23318 clk cpu0 IT (23282) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23318 clk cpu0 R cpsr 400003c0 +23319 clk cpu0 IS (23283) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23320 clk cpu0 IT (23284) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +23320 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +23320 clk cpu0 R X8 0000000000000000 +23321 clk cpu0 IT (23285) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +23321 clk cpu0 MR8 0004d0d0:00001004d0d0_NS 3e0a000a_64255550 +23321 clk cpu0 R X0 3E0A000A64255550 +23322 clk cpu0 IT (23286) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +23322 clk cpu0 R cpsr 800003c0 +23323 clk cpu0 IT (23287) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +23324 clk cpu0 IT (23288) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +23324 clk cpu0 R X27 0000000000000000 +23325 clk cpu0 IT (23289) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +23325 clk cpu0 R X28 000000000004D0D0 +23326 clk cpu0 IT (23290) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +23326 clk cpu0 R X8 00000000FFFFFFF8 +23327 clk cpu0 IT (23291) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23327 clk cpu0 R cpsr 000003c0 +23327 clk cpu0 R X9 0000000000000050 +23328 clk cpu0 IS (23292) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23329 clk cpu0 IT (23293) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23329 clk cpu0 R cpsr 200003c0 +23330 clk cpu0 IS (23294) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23331 clk cpu0 IT (23295) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23331 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23331 clk cpu0 R X9 0000000013000000 +23332 clk cpu0 IT (23296) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23332 clk cpu0 R cpsr 800003c0 +23332 clk cpu0 R X8 00000000FFFFFFF9 +23333 clk cpu0 IT (23297) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23333 clk cpu0 MW1 13000000:000013000000_NS 50 +23334 clk cpu0 IT (23298) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23334 clk cpu0 R X0 003E0A000A642555 +23335 clk cpu0 IT (23299) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23336 clk cpu0 IT (23300) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23336 clk cpu0 R cpsr 000003c0 +23336 clk cpu0 R X9 0000000000000055 +23337 clk cpu0 IS (23301) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23338 clk cpu0 IT (23302) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23338 clk cpu0 R cpsr 200003c0 +23339 clk cpu0 IS (23303) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23340 clk cpu0 IT (23304) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23340 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23340 clk cpu0 R X9 0000000013000000 +23341 clk cpu0 IT (23305) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23341 clk cpu0 R cpsr 800003c0 +23341 clk cpu0 R X8 00000000FFFFFFFA +23342 clk cpu0 IT (23306) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23342 clk cpu0 MW1 13000000:000013000000_NS 55 +23343 clk cpu0 IT (23307) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23343 clk cpu0 R X0 00003E0A000A6425 +23344 clk cpu0 IT (23308) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23345 clk cpu0 IT (23309) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23345 clk cpu0 R cpsr 000003c0 +23345 clk cpu0 R X9 0000000000000025 +23346 clk cpu0 IS (23310) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23347 clk cpu0 IT (23311) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23347 clk cpu0 R cpsr 600003c0 +23348 clk cpu0 IT (23312) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23349 clk cpu0 IT (23313) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +23349 clk cpu0 R X8 00000000FFFFFFFA +23350 clk cpu0 IT (23314) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +23350 clk cpu0 R X9 0000000000000001 +23351 clk cpu0 IT (23315) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +23351 clk cpu0 R X9 000000000004D0D1 +23352 clk cpu0 IT (23316) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +23352 clk cpu0 R cpsr 200003c0 +23353 clk cpu0 IT (23317) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +23353 clk cpu0 R X27 000000000004D0D1 +23354 clk cpu0 IT (23318) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +23354 clk cpu0 R X20 000000000004D0D2 +23355 clk cpu0 IT (23319) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +23356 clk cpu0 IT (23320) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23356 clk cpu0 MR1 0004d0d2:00001004d0d2_NS 25 +23356 clk cpu0 R X8 0000000000000025 +23357 clk cpu0 IT (23321) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23357 clk cpu0 R cpsr 600003c0 +23358 clk cpu0 IT (23322) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23359 clk cpu0 IT (23323) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +23359 clk cpu0 MW4 03029734:000000829734_NS 00000000 +23360 clk cpu0 IT (23324) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +23360 clk cpu0 R X27 000000000004D0D2 +23361 clk cpu0 IT (23325) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +23361 clk cpu0 MR1 0004d0d3:00001004d0d3_NS 64 +23361 clk cpu0 R X27 000000000004D0D3 +23361 clk cpu0 R X28 0000000000000064 +23362 clk cpu0 IT (23326) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +23362 clk cpu0 R cpsr 200003c0 +23363 clk cpu0 IS (23327) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +23364 clk cpu0 IT (23328) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +23365 clk cpu0 IT (23329) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +23365 clk cpu0 R X8 000000000000000C +23366 clk cpu0 IT (23330) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +23366 clk cpu0 R cpsr 800003c0 +23367 clk cpu0 IS (23331) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +23368 clk cpu0 IT (23332) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +23368 clk cpu0 R X9 0000000000092CE0 +23369 clk cpu0 IT (23333) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +23369 clk cpu0 MR1 0004c114:00001004c114_NS 0e +23369 clk cpu0 R X10 000000000000000E +23370 clk cpu0 IT (23334) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +23370 clk cpu0 R X9 0000000000092D18 +23371 clk cpu0 IT (23335) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +23371 clk cpu0 R cpsr 800007c0 +23372 clk cpu0 IT (23336) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +23372 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +23372 clk cpu0 R cpsr 800003c0 +23372 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +23373 clk cpu0 IS (23337) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +23374 clk cpu0 IT (23338) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +23374 clk cpu0 R X9 00000000FFFFFFD8 +23375 clk cpu0 IT (23339) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +23375 clk cpu0 R cpsr a00003c0 +23376 clk cpu0 IT (23340) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +23376 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +23377 clk cpu0 IT (23341) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +23377 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017a INVAL 0x0000100a6f40_NS +23377 clk cpu0 CACHE cpu.cpu0.l1icache LINE 017a ALLOC 0x000010092f40_NS +23378 clk cpu0 IT (23342) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +23378 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +23378 clk cpu0 R X9 0000000003045830 +23379 clk cpu0 IT (23343) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +23379 clk cpu0 R X8 0000000003045800 +23380 clk cpu0 IT (23344) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +23381 clk cpu0 IT (23345) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +23381 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000000 +23381 clk cpu0 R X0 0000000000000000 +23382 clk cpu0 IT (23346) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +23382 clk cpu0 R X1 000000000000000A +23383 clk cpu0 IT (23347) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +23383 clk cpu0 R X30 0000000000092D48 +23383 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 INVAL 0x000010011640_NS +23383 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b3 ALLOC 0x000010095640_NS +23384 clk cpu0 IT (23348) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +23384 clk cpu0 R SP_EL0 0000000003045740 +23385 clk cpu0 IT (23349) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +23385 clk cpu0 R X8 3030303030303030 +23386 clk cpu0 IT (23350) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +23386 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +23386 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +23387 clk cpu0 IT (23351) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +23387 clk cpu0 MW4 03045758:000000845758_NS 30303030 +23388 clk cpu0 IT (23352) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +23389 clk cpu0 IT (23353) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +23389 clk cpu0 R X11 0000000000000000 +23390 clk cpu0 IT (23354) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +23390 clk cpu0 R X8 0000000003029000 +23391 clk cpu0 IT (23355) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +23391 clk cpu0 MR4 03029734:000000829734_NS 00000000 +23391 clk cpu0 R X8 0000000000000000 +23392 clk cpu0 IT (23356) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +23392 clk cpu0 R cpsr 600003c0 +23393 clk cpu0 IT (23357) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +23393 clk cpu0 R X8 0000000000000000 +23394 clk cpu0 IT (23358) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +23394 clk cpu0 R cpsr 800003c0 +23395 clk cpu0 IT (23359) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +23396 clk cpu0 IT (23360) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +23396 clk cpu0 R X9 0000000003045748 +23397 clk cpu0 IT (23361) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +23397 clk cpu0 R X10 0000000006216000 +23398 clk cpu0 IT (23362) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +23398 clk cpu0 MR1 03045748:000000845748_NS 30 +23398 clk cpu0 R X8 0000000000000030 +23399 clk cpu0 IT (23363) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +23399 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23399 clk cpu0 R X9 0000000013000000 +23400 clk cpu0 IT (23364) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23400 clk cpu0 MW1 13000000:000013000000_NS 30 +23401 clk cpu0 IT (23365) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +23401 clk cpu0 R SP_EL0 0000000003045760 +23402 clk cpu0 IT (23366) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +23403 clk cpu0 IT (23367) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +23403 clk cpu0 R X20 000000000004D0D4 +23404 clk cpu0 IT (23368) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +23405 clk cpu0 IT (23369) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23405 clk cpu0 MR1 0004d0d4:00001004d0d4_NS 0a +23405 clk cpu0 R X8 000000000000000A +23406 clk cpu0 IT (23370) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23406 clk cpu0 R cpsr 800003c0 +23407 clk cpu0 IS (23371) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23408 clk cpu0 IS (23372) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23409 clk cpu0 IT (23373) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23409 clk cpu0 R cpsr 000003c0 +23410 clk cpu0 IT (23374) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23411 clk cpu0 IT (23375) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23411 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23411 clk cpu0 R X9 0000000013000000 +23412 clk cpu0 IT (23376) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23412 clk cpu0 R X27 000000000004D0D4 +23413 clk cpu0 IT (23377) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23413 clk cpu0 R X20 000000000004D0D5 +TUBE CPU0: >>CPU0 +23414 clk cpu0 IT (23378) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23414 clk cpu0 MW1 13000000:000013000000_NS 0a +23415 clk cpu0 IT (23379) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23415 clk cpu0 MR1 0004d0d5:00001004d0d5_NS 00 +23415 clk cpu0 R X8 0000000000000000 +23416 clk cpu0 IT (23380) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23416 clk cpu0 R cpsr 800003c0 +23417 clk cpu0 IS (23381) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23418 clk cpu0 IT (23382) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23419 clk cpu0 IT (23383) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +23420 clk cpu0 IT (23384) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +23420 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d0cc +23420 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +23420 clk cpu0 R X19 000000000004D0CC +23420 clk cpu0 R X30 000000000009C560 +23421 clk cpu0 IT (23385) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +23421 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +23421 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +23421 clk cpu0 R X20 0000000003008528 +23421 clk cpu0 R X21 0000000000000000 +23422 clk cpu0 IT (23386) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +23422 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +23422 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +23422 clk cpu0 R X22 000000000004D076 +23422 clk cpu0 R X23 000000000004D06C +23423 clk cpu0 IT (23387) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +23423 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +23423 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +23423 clk cpu0 R X24 000000000004D080 +23423 clk cpu0 R X25 0000000006216000 +23424 clk cpu0 IT (23388) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +23424 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +23424 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216034 +23424 clk cpu0 R X26 0000000006216034 +23424 clk cpu0 R X27 0001000100010001 +23425 clk cpu0 IT (23389) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +23425 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +23425 clk cpu0 R X28 FF7FFF7FFF7FFF7F +23426 clk cpu0 IT (23390) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +23426 clk cpu0 R SP_EL0 0000000003045800 +23427 clk cpu0 IT (23391) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +23428 clk cpu0 IT (23392) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +23428 clk cpu0 R X0 0000000000000001 +23429 clk cpu0 IT (23393) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +23429 clk cpu0 R X1 0000000000000000 +23430 clk cpu0 IT (23394) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +23430 clk cpu0 R X2 0000000000000000 +23431 clk cpu0 IT (23395) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +23432 clk cpu0 IT (23396) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +23433 clk cpu0 IT (23397) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +23433 clk cpu0 R X0 0000000003008528 +23434 clk cpu0 IT (23398) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +23434 clk cpu0 R X30 000000000009C57C +23435 clk cpu0 IT (23399) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +23436 clk cpu0 IT (23400) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +23436 clk cpu0 R X8 0000000006216000 +23437 clk cpu0 IT (23401) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +23437 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +23437 clk cpu0 R X8 0000000000000001 +23438 clk cpu0 IT (23402) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +23438 clk cpu0 R cpsr 800003c0 +23439 clk cpu0 IT (23403) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +23440 clk cpu0 IT (23404) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +23441 clk cpu0 IT (23405) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +23441 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000000 +23441 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b480 +23441 clk cpu0 R X19 0000000000000000 +23441 clk cpu0 R X30 000000000009B480 +23442 clk cpu0 IT (23406) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +23442 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +23442 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +23442 clk cpu0 R X20 000000000004D0CC +23442 clk cpu0 R X21 000000000004CF91 +23443 clk cpu0 IT (23407) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +23443 clk cpu0 R SP_EL0 0000000003045890 +23444 clk cpu0 IT (23408) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +23444 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01a5 ALLOC 0x00001009b480_NS +23444 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0d21 ALLOC 0x00001009b480_NS +23445 clk cpu0 IT (23409) 0009b480:00001009b480_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +23445 clk cpu0 R X0 0000000000000000 +23446 clk cpu0 IT (23410) 0009b484:00001009b484_NS aa1503e1 O EL0t_n : MOV x1,x21 +23446 clk cpu0 R X1 000000000004CF91 +23447 clk cpu0 IT (23411) 0009b488:00001009b488_NS 94000411 O EL0t_n : BL 0x9c4cc +23447 clk cpu0 R X30 000000000009B48C +23448 clk cpu0 IT (23412) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +23448 clk cpu0 R SP_EL0 0000000003045800 +23449 clk cpu0 IT (23413) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +23449 clk cpu0 R X8 0000000006216000 +23450 clk cpu0 IT (23414) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +23450 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +23450 clk cpu0 R X8 0000000000000003 +23451 clk cpu0 IT (23415) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +23451 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +23451 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +23452 clk cpu0 IT (23416) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +23452 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000000 +23452 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b48c +23453 clk cpu0 IT (23417) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +23453 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +23453 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +23454 clk cpu0 IT (23418) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +23454 clk cpu0 R cpsr 200003c0 +23455 clk cpu0 IT (23419) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +23455 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +23455 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +23456 clk cpu0 IT (23420) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +23456 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +23456 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +23457 clk cpu0 IT (23421) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +23457 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +23457 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +23458 clk cpu0 IT (23422) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +23458 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +23458 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +23459 clk cpu0 IS (23423) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +23460 clk cpu0 IT (23424) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +23460 clk cpu0 R X20 0000000003008000 +23461 clk cpu0 IT (23425) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +23461 clk cpu0 R X20 0000000003008528 +23462 clk cpu0 IT (23426) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +23462 clk cpu0 R X0 0000000003008528 +23463 clk cpu0 IT (23427) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +23463 clk cpu0 R X19 000000000004CF91 +23464 clk cpu0 IT (23428) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +23464 clk cpu0 R X30 000000000009C510 +23465 clk cpu0 IT (23429) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +23465 clk cpu0 R X8 0000000006216000 +23466 clk cpu0 IT (23430) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +23466 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +23466 clk cpu0 R X8 0000000000000001 +23467 clk cpu0 IT (23431) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +23467 clk cpu0 R cpsr 800003c0 +23468 clk cpu0 IT (23432) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +23469 clk cpu0 IT (23433) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +23470 clk cpu0 IT (23434) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +23470 clk cpu0 R X9 0000000003045800 +23471 clk cpu0 IT (23435) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +23471 clk cpu0 R X8 00000000FFFFFFD0 +23472 clk cpu0 IT (23436) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +23472 clk cpu0 R X10 0000000003045890 +23473 clk cpu0 IT (23437) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +23473 clk cpu0 R X9 0000000003045830 +23474 clk cpu0 IT (23438) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +23474 clk cpu0 R X0 0000000000000000 +23475 clk cpu0 IT (23439) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +23475 clk cpu0 R X1 0000000000000000 +23476 clk cpu0 IT (23440) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +23476 clk cpu0 R X2 0000000000000000 +23477 clk cpu0 IT (23441) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +23477 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +23478 clk cpu0 IT (23442) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +23478 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +23478 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +23479 clk cpu0 IT (23443) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +23480 clk cpu0 IT (23444) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +23480 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +23480 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +23480 clk cpu0 R X8 0000000000000000 +23480 clk cpu0 R X10 0000000003045830 +23481 clk cpu0 IT (23445) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +23481 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +23481 clk cpu0 R X9 0000000003045890 +23482 clk cpu0 IT (23446) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +23482 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +23482 clk cpu0 R X11 00000000FFFFFFD0 +23483 clk cpu0 IT (23447) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +23483 clk cpu0 R X21 0000000000000000 +23484 clk cpu0 IT (23448) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +23484 clk cpu0 R X1 0000000003045830 +23485 clk cpu0 IT (23449) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +23485 clk cpu0 R X0 000000000004CF91 +23486 clk cpu0 IT (23450) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +23486 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +23486 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +23487 clk cpu0 IT (23451) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +23487 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +23488 clk cpu0 IT (23452) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +23488 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +23489 clk cpu0 IT (23453) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +23489 clk cpu0 R X30 000000000009C560 +23490 clk cpu0 IT (23454) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +23490 clk cpu0 R SP_EL0 0000000003045760 +23491 clk cpu0 IT (23455) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +23491 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004cf91 +23491 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +23492 clk cpu0 IT (23456) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +23492 clk cpu0 R X19 0000000003045830 +23493 clk cpu0 IT (23457) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +23493 clk cpu0 R X1 000000000004C000 +23494 clk cpu0 IT (23458) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +23494 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +23494 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +23495 clk cpu0 IT (23459) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +23495 clk cpu0 R X20 000000000004CF91 +23496 clk cpu0 IT (23460) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +23496 clk cpu0 R X1 000000000004C00B +23497 clk cpu0 IT (23461) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +23497 clk cpu0 R X0 0000000003045764 +23498 clk cpu0 IT (23462) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +23498 clk cpu0 R X2 000000000000003B +23499 clk cpu0 IT (23463) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +23499 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +23500 clk cpu0 IT (23464) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +23500 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +23500 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216034 +23501 clk cpu0 IT (23465) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +23501 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +23501 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +23502 clk cpu0 IT (23466) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +23502 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +23502 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +23503 clk cpu0 IT (23467) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +23503 clk cpu0 R X30 0000000000092B80 +23504 clk cpu0 IT (23468) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +23504 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +23504 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +23504 clk cpu0 R SP_EL0 0000000003045750 +23505 clk cpu0 IT (23469) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +23505 clk cpu0 R X19 0000000003045764 +23506 clk cpu0 IT (23470) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +23506 clk cpu0 R X30 00000000000104DC +23507 clk cpu0 IT (23471) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +23507 clk cpu0 R cpsr 200003c0 +23508 clk cpu0 IS (23472) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +23509 clk cpu0 IT (23473) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +23509 clk cpu0 R cpsr 400003c0 +23510 clk cpu0 IT (23474) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +23511 clk cpu0 IT (23475) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +23511 clk cpu0 R cpsr 000003c0 +23511 clk cpu0 R X10 0000000000000003 +23512 clk cpu0 IS (23476) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +23513 clk cpu0 IT (23477) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +23513 clk cpu0 R X9 0000000000000020 +23514 clk cpu0 IT (23478) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +23514 clk cpu0 R X8 000000000004C008 +23515 clk cpu0 IT (23479) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +23515 clk cpu0 R cpsr 200003c0 +23516 clk cpu0 IT (23480) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +23516 clk cpu0 R X9 0000000000000008 +23517 clk cpu0 IS (23481) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +23518 clk cpu0 IT (23482) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +23518 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +23518 clk cpu0 R X12 000000000A00000A +23519 clk cpu0 IT (23483) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +23519 clk cpu0 R X10 0000000000000018 +23520 clk cpu0 IT (23484) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +23520 clk cpu0 R X11 000000000000003B +23521 clk cpu0 IT (23485) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23521 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +23521 clk cpu0 R X8 000000000004C00C +23521 clk cpu0 R X13 000000006F727245 +23522 clk cpu0 IT (23486) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23522 clk cpu0 R X12 000000000000000A +23523 clk cpu0 IT (23487) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23523 clk cpu0 R X11 0000000000000037 +23524 clk cpu0 IT (23488) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23524 clk cpu0 R cpsr 200003c0 +23525 clk cpu0 IT (23489) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23525 clk cpu0 R X14 0000000072724500 +23526 clk cpu0 IT (23490) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23526 clk cpu0 R X12 000000007272450A +23527 clk cpu0 IT (23491) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23527 clk cpu0 MW4 03045764:000000845764_NS 7272450a +23527 clk cpu0 R X0 0000000003045768 +23528 clk cpu0 IT (23492) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23528 clk cpu0 R X12 000000006F727245 +23529 clk cpu0 IT (23493) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23530 clk cpu0 IT (23494) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23530 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +23530 clk cpu0 R X8 000000000004C010 +23530 clk cpu0 R X13 0000000049203A72 +23531 clk cpu0 IT (23495) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23531 clk cpu0 R X12 000000000000006F +23532 clk cpu0 IT (23496) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23532 clk cpu0 R X11 0000000000000033 +23533 clk cpu0 IT (23497) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23533 clk cpu0 R cpsr 200003c0 +23534 clk cpu0 IT (23498) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23534 clk cpu0 R X14 00000000203A7200 +23535 clk cpu0 IT (23499) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23535 clk cpu0 R X12 00000000203A726F +23536 clk cpu0 IT (23500) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23536 clk cpu0 MW4 03045768:000000845768_NS 203a726f +23536 clk cpu0 R X0 000000000304576C +23537 clk cpu0 IT (23501) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23537 clk cpu0 R X12 0000000049203A72 +23538 clk cpu0 IT (23502) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23539 clk cpu0 IT (23503) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23539 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +23539 clk cpu0 R X8 000000000004C014 +23539 clk cpu0 R X13 0000000067656C6C +23540 clk cpu0 IT (23504) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23540 clk cpu0 R X12 0000000000000049 +23541 clk cpu0 IT (23505) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23541 clk cpu0 R X11 000000000000002F +23542 clk cpu0 IT (23506) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23542 clk cpu0 R cpsr 200003c0 +23543 clk cpu0 IT (23507) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23543 clk cpu0 R X14 00000000656C6C00 +23544 clk cpu0 IT (23508) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23544 clk cpu0 R X12 00000000656C6C49 +23545 clk cpu0 IT (23509) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23545 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +23545 clk cpu0 R X0 0000000003045770 +23546 clk cpu0 IT (23510) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23546 clk cpu0 R X12 0000000067656C6C +23547 clk cpu0 IT (23511) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23548 clk cpu0 IT (23512) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23548 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +23548 clk cpu0 R X8 000000000004C018 +23548 clk cpu0 R X13 0000000066206C61 +23549 clk cpu0 IT (23513) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23549 clk cpu0 R X12 0000000000000067 +23550 clk cpu0 IT (23514) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23550 clk cpu0 R X11 000000000000002B +23551 clk cpu0 IT (23515) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23551 clk cpu0 R cpsr 200003c0 +23552 clk cpu0 IT (23516) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23552 clk cpu0 R X14 00000000206C6100 +23553 clk cpu0 IT (23517) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23553 clk cpu0 R X12 00000000206C6167 +23554 clk cpu0 IT (23518) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23554 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +23554 clk cpu0 R X0 0000000003045774 +23555 clk cpu0 IT (23519) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23555 clk cpu0 R X12 0000000066206C61 +23556 clk cpu0 IT (23520) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23557 clk cpu0 IT (23521) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23557 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +23557 clk cpu0 R X8 000000000004C01C +23557 clk cpu0 R X13 00000000616D726F +23558 clk cpu0 IT (23522) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23558 clk cpu0 R X12 0000000000000066 +23559 clk cpu0 IT (23523) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23559 clk cpu0 R X11 0000000000000027 +23560 clk cpu0 IT (23524) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23560 clk cpu0 R cpsr 200003c0 +23561 clk cpu0 IT (23525) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23561 clk cpu0 R X14 000000006D726F00 +23562 clk cpu0 IT (23526) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23562 clk cpu0 R X12 000000006D726F66 +23563 clk cpu0 IT (23527) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23563 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +23563 clk cpu0 R X0 0000000003045778 +23564 clk cpu0 IT (23528) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23564 clk cpu0 R X12 00000000616D726F +23565 clk cpu0 IT (23529) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23566 clk cpu0 IT (23530) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23566 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +23566 clk cpu0 R X8 000000000004C020 +23566 clk cpu0 R X13 0000000070732074 +23567 clk cpu0 IT (23531) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23567 clk cpu0 R X12 0000000000000061 +23568 clk cpu0 IT (23532) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23568 clk cpu0 R X11 0000000000000023 +23569 clk cpu0 IT (23533) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23569 clk cpu0 R cpsr 200003c0 +23570 clk cpu0 IT (23534) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23570 clk cpu0 R X14 0000000073207400 +23571 clk cpu0 IT (23535) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23571 clk cpu0 R X12 0000000073207461 +23572 clk cpu0 IT (23536) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23572 clk cpu0 MW4 03045778:000000845778_NS 73207461 +23572 clk cpu0 R X0 000000000304577C +23573 clk cpu0 IT (23537) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23573 clk cpu0 R X12 0000000070732074 +23574 clk cpu0 IT (23538) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23575 clk cpu0 IT (23539) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23575 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +23575 clk cpu0 R X8 000000000004C024 +23575 clk cpu0 R X13 0000000066696365 +23576 clk cpu0 IT (23540) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23576 clk cpu0 R X12 0000000000000070 +23577 clk cpu0 IT (23541) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23577 clk cpu0 R X11 000000000000001F +23578 clk cpu0 IT (23542) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23578 clk cpu0 R cpsr 200003c0 +23579 clk cpu0 IT (23543) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23579 clk cpu0 R X14 0000000069636500 +23580 clk cpu0 IT (23544) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23580 clk cpu0 R X12 0000000069636570 +23581 clk cpu0 IT (23545) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23581 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +23581 clk cpu0 R X0 0000000003045780 +23582 clk cpu0 IT (23546) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23582 clk cpu0 R X12 0000000066696365 +23583 clk cpu0 IT (23547) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23584 clk cpu0 IT (23548) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23584 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +23584 clk cpu0 R X8 000000000004C028 +23584 clk cpu0 R X13 0000000020726569 +23585 clk cpu0 IT (23549) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23585 clk cpu0 R X12 0000000000000066 +23586 clk cpu0 IT (23550) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23586 clk cpu0 R X11 000000000000001B +23587 clk cpu0 IT (23551) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23587 clk cpu0 R cpsr 200003c0 +23588 clk cpu0 IT (23552) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23588 clk cpu0 R X14 0000000072656900 +23589 clk cpu0 IT (23553) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23589 clk cpu0 R X12 0000000072656966 +23590 clk cpu0 IT (23554) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23590 clk cpu0 MW4 03045780:000000845780_NS 72656966 +23590 clk cpu0 R X0 0000000003045784 +23591 clk cpu0 IT (23555) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23591 clk cpu0 R X12 0000000020726569 +23592 clk cpu0 IT (23556) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23593 clk cpu0 IT (23557) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23593 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +23593 clk cpu0 R X8 000000000004C02C +23593 clk cpu0 R X13 0000000064657375 +23594 clk cpu0 IT (23558) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23594 clk cpu0 R X12 0000000000000020 +23595 clk cpu0 IT (23559) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23595 clk cpu0 R X11 0000000000000017 +23596 clk cpu0 IT (23560) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23596 clk cpu0 R cpsr 200003c0 +23597 clk cpu0 IT (23561) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23597 clk cpu0 R X14 0000000065737500 +23598 clk cpu0 IT (23562) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23598 clk cpu0 R X12 0000000065737520 +23599 clk cpu0 IT (23563) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23599 clk cpu0 MW4 03045784:000000845784_NS 65737520 +23599 clk cpu0 R X0 0000000003045788 +23600 clk cpu0 IT (23564) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23600 clk cpu0 R X12 0000000064657375 +23601 clk cpu0 IT (23565) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23602 clk cpu0 IT (23566) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23602 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +23602 clk cpu0 R X8 000000000004C030 +23602 clk cpu0 R X13 000000005F27203A +23603 clk cpu0 IT (23567) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23603 clk cpu0 R X12 0000000000000064 +23604 clk cpu0 IT (23568) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23604 clk cpu0 R X11 0000000000000013 +23605 clk cpu0 IT (23569) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23605 clk cpu0 R cpsr 200003c0 +23606 clk cpu0 IT (23570) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23606 clk cpu0 R X14 0000000027203A00 +23607 clk cpu0 IT (23571) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23607 clk cpu0 R X12 0000000027203A64 +23608 clk cpu0 IT (23572) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23608 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +23608 clk cpu0 R X0 000000000304578C +23609 clk cpu0 IT (23573) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23609 clk cpu0 R X12 000000005F27203A +23610 clk cpu0 IT (23574) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23611 clk cpu0 IT (23575) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23611 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +23611 clk cpu0 R X8 000000000004C034 +23611 clk cpu0 R X13 0000000045202E27 +23612 clk cpu0 IT (23576) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23612 clk cpu0 R X12 000000000000005F +23613 clk cpu0 IT (23577) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23613 clk cpu0 R X11 000000000000000F +23614 clk cpu0 IT (23578) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23614 clk cpu0 R cpsr 200003c0 +23615 clk cpu0 IT (23579) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23615 clk cpu0 R X14 00000000202E2700 +23616 clk cpu0 IT (23580) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23616 clk cpu0 R X12 00000000202E275F +23617 clk cpu0 IT (23581) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23617 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +23617 clk cpu0 R X0 0000000003045790 +23618 clk cpu0 IT (23582) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23618 clk cpu0 R X12 0000000045202E27 +23619 clk cpu0 IT (23583) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23620 clk cpu0 IT (23584) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23620 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +23620 clk cpu0 R X8 000000000004C038 +23620 clk cpu0 R X13 000000006E69646E +23621 clk cpu0 IT (23585) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23621 clk cpu0 R X12 0000000000000045 +23622 clk cpu0 IT (23586) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23622 clk cpu0 R X11 000000000000000B +23623 clk cpu0 IT (23587) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23623 clk cpu0 R cpsr 200003c0 +23624 clk cpu0 IT (23588) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23624 clk cpu0 R X14 0000000069646E00 +23625 clk cpu0 IT (23589) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23625 clk cpu0 R X12 0000000069646E45 +23626 clk cpu0 IT (23590) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23626 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +23626 clk cpu0 R X0 0000000003045794 +23627 clk cpu0 IT (23591) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23627 clk cpu0 R X12 000000006E69646E +23628 clk cpu0 IT (23592) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23629 clk cpu0 IT (23593) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23629 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +23629 clk cpu0 R X8 000000000004C03C +23629 clk cpu0 R X13 0000000065542067 +23630 clk cpu0 IT (23594) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23630 clk cpu0 R X12 000000000000006E +23631 clk cpu0 IT (23595) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23631 clk cpu0 R X11 0000000000000007 +23632 clk cpu0 IT (23596) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23632 clk cpu0 R cpsr 200003c0 +23633 clk cpu0 IT (23597) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23633 clk cpu0 R X14 0000000054206700 +23634 clk cpu0 IT (23598) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23634 clk cpu0 R X12 000000005420676E +23635 clk cpu0 IT (23599) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23635 clk cpu0 MW4 03045794:000000845794_NS 5420676e +23635 clk cpu0 R X0 0000000003045798 +23636 clk cpu0 IT (23600) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23636 clk cpu0 R X12 0000000065542067 +23637 clk cpu0 IT (23601) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23638 clk cpu0 IT (23602) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +23638 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +23638 clk cpu0 R X8 000000000004C040 +23638 clk cpu0 R X13 000000000A2E7473 +23639 clk cpu0 IT (23603) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +23639 clk cpu0 R X12 0000000000000065 +23640 clk cpu0 IT (23604) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +23640 clk cpu0 R X11 0000000000000003 +23641 clk cpu0 IT (23605) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +23641 clk cpu0 R cpsr 600003c0 +23642 clk cpu0 IT (23606) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +23642 clk cpu0 R X14 000000002E747300 +23643 clk cpu0 IT (23607) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +23643 clk cpu0 R X12 000000002E747365 +23644 clk cpu0 IT (23608) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +23644 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +23644 clk cpu0 R X0 000000000304579C +23645 clk cpu0 IT (23609) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +23645 clk cpu0 R X12 000000000A2E7473 +23646 clk cpu0 IS (23610) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +23647 clk cpu0 IT (23611) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +23647 clk cpu0 R X2 0000000000000003 +23648 clk cpu0 IT (23612) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +23648 clk cpu0 R X9 0000000000000001 +23649 clk cpu0 IT (23613) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +23649 clk cpu0 R X8 000000000004C03F +23650 clk cpu0 IT (23614) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +23650 clk cpu0 R X1 000000000004C043 +23651 clk cpu0 IT (23615) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +23651 clk cpu0 R cpsr 200003c0 +23652 clk cpu0 IS (23616) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +23653 clk cpu0 IT (23617) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +23653 clk cpu0 MR1 0004c043:00001004c043_NS 0a +23653 clk cpu0 R X8 000000000000000A +23654 clk cpu0 IT (23618) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +23654 clk cpu0 MW1 0304579c:00000084579c_NS 0a +23655 clk cpu0 IS (23619) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +23656 clk cpu0 IT (23620) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +23656 clk cpu0 MR1 0004c044:00001004c044_NS 00 +23656 clk cpu0 R X8 0000000000000000 +23657 clk cpu0 IT (23621) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +23657 clk cpu0 R cpsr 600003c0 +23658 clk cpu0 IT (23622) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +23658 clk cpu0 MW1 0304579d:00000084579d_NS 00 +23659 clk cpu0 IS (23623) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +23660 clk cpu0 IT (23624) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +23660 clk cpu0 MR1 0004c045:00001004c045_NS 00 +23660 clk cpu0 R X8 0000000000000000 +23661 clk cpu0 IT (23625) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +23661 clk cpu0 MW1 0304579e:00000084579e_NS 00 +23662 clk cpu0 IT (23626) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +23663 clk cpu0 IT (23627) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +23663 clk cpu0 R X0 0000000003045764 +23664 clk cpu0 IT (23628) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +23664 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +23664 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +23664 clk cpu0 R SP_EL0 0000000003045760 +23664 clk cpu0 R X19 0000000003045830 +23664 clk cpu0 R X30 0000000000092B80 +23665 clk cpu0 IT (23629) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +23666 clk cpu0 IT (23630) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +23666 clk cpu0 R X22 000000000004C000 +23667 clk cpu0 IT (23631) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +23667 clk cpu0 R X23 000000000004C000 +23668 clk cpu0 IT (23632) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +23668 clk cpu0 R X26 0000000000000000 +23669 clk cpu0 IT (23633) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +23669 clk cpu0 R X21 0000000003029000 +23670 clk cpu0 IT (23634) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +23670 clk cpu0 R X22 000000000004C108 +23671 clk cpu0 IT (23635) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +23671 clk cpu0 R X23 000000000004C129 +23672 clk cpu0 IT (23636) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +23672 clk cpu0 R X24 0000000003041000 +23673 clk cpu0 IT (23637) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +23673 clk cpu0 R X25 0000000006216000 +23674 clk cpu0 IT (23638) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +23675 clk cpu0 IT (23639) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23675 clk cpu0 MR1 0004cf91:00001004cf91_NS 3e +23675 clk cpu0 R X8 000000000000003E +23675 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 007c ALLOC 0x00001004cf80_NS +23675 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13e1 ALLOC 0x00001004cf80_NS +23676 clk cpu0 IT (23640) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23676 clk cpu0 R cpsr 200003c0 +23677 clk cpu0 IS (23641) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23678 clk cpu0 IS (23642) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23679 clk cpu0 IT (23643) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23679 clk cpu0 R cpsr 000003c0 +23680 clk cpu0 IT (23644) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23681 clk cpu0 IT (23645) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23681 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23681 clk cpu0 R X9 0000000013000000 +23682 clk cpu0 IT (23646) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23682 clk cpu0 R X27 000000000004CF91 +23683 clk cpu0 IT (23647) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23683 clk cpu0 R X20 000000000004CF92 +23684 clk cpu0 IT (23648) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23684 clk cpu0 MW1 13000000:000013000000_NS 3e +23685 clk cpu0 IT (23649) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23685 clk cpu0 MR1 0004cf92:00001004cf92_NS 3e +23685 clk cpu0 R X8 000000000000003E +23686 clk cpu0 IT (23650) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23686 clk cpu0 R cpsr 200003c0 +23687 clk cpu0 IS (23651) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23688 clk cpu0 IS (23652) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23689 clk cpu0 IT (23653) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23689 clk cpu0 R cpsr 000003c0 +23690 clk cpu0 IT (23654) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23691 clk cpu0 IT (23655) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23691 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23691 clk cpu0 R X9 0000000013000000 +23692 clk cpu0 IT (23656) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23692 clk cpu0 R X27 000000000004CF92 +23693 clk cpu0 IT (23657) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23693 clk cpu0 R X20 000000000004CF93 +23694 clk cpu0 IT (23658) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23694 clk cpu0 MW1 13000000:000013000000_NS 3e +23695 clk cpu0 IT (23659) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23695 clk cpu0 MR1 0004cf93:00001004cf93_NS 2d +23695 clk cpu0 R X8 000000000000002D +23696 clk cpu0 IT (23660) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23696 clk cpu0 R cpsr 200003c0 +23697 clk cpu0 IS (23661) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23698 clk cpu0 IS (23662) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23699 clk cpu0 IT (23663) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23699 clk cpu0 R cpsr 000003c0 +23700 clk cpu0 IT (23664) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23701 clk cpu0 IT (23665) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23701 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23701 clk cpu0 R X9 0000000013000000 +23702 clk cpu0 IT (23666) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23702 clk cpu0 R X27 000000000004CF93 +23703 clk cpu0 IT (23667) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23703 clk cpu0 R X20 000000000004CF94 +23704 clk cpu0 IT (23668) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23704 clk cpu0 MW1 13000000:000013000000_NS 2d +23705 clk cpu0 IT (23669) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23705 clk cpu0 MR1 0004cf94:00001004cf94_NS 2d +23705 clk cpu0 R X8 000000000000002D +23706 clk cpu0 IT (23670) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23706 clk cpu0 R cpsr 200003c0 +23707 clk cpu0 IS (23671) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23708 clk cpu0 IS (23672) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23709 clk cpu0 IT (23673) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23709 clk cpu0 R cpsr 000003c0 +23710 clk cpu0 IT (23674) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23711 clk cpu0 IT (23675) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23711 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23711 clk cpu0 R X9 0000000013000000 +23712 clk cpu0 IT (23676) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23712 clk cpu0 R X27 000000000004CF94 +23713 clk cpu0 IT (23677) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23713 clk cpu0 R X20 000000000004CF95 +23714 clk cpu0 IT (23678) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23714 clk cpu0 MW1 13000000:000013000000_NS 2d +23715 clk cpu0 IT (23679) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23715 clk cpu0 MR1 0004cf95:00001004cf95_NS 2d +23715 clk cpu0 R X8 000000000000002D +23716 clk cpu0 IT (23680) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23716 clk cpu0 R cpsr 200003c0 +23717 clk cpu0 IS (23681) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23718 clk cpu0 IS (23682) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23719 clk cpu0 IT (23683) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23719 clk cpu0 R cpsr 000003c0 +23720 clk cpu0 IT (23684) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23721 clk cpu0 IT (23685) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23721 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23721 clk cpu0 R X9 0000000013000000 +23722 clk cpu0 IT (23686) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23722 clk cpu0 R X27 000000000004CF95 +23723 clk cpu0 IT (23687) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23723 clk cpu0 R X20 000000000004CF96 +23724 clk cpu0 IT (23688) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23724 clk cpu0 MW1 13000000:000013000000_NS 2d +23725 clk cpu0 IT (23689) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23725 clk cpu0 MR1 0004cf96:00001004cf96_NS 2d +23725 clk cpu0 R X8 000000000000002D +23726 clk cpu0 IT (23690) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23726 clk cpu0 R cpsr 200003c0 +23727 clk cpu0 IS (23691) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23728 clk cpu0 IS (23692) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23729 clk cpu0 IT (23693) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23729 clk cpu0 R cpsr 000003c0 +23730 clk cpu0 IT (23694) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23731 clk cpu0 IT (23695) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23731 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23731 clk cpu0 R X9 0000000013000000 +23732 clk cpu0 IT (23696) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23732 clk cpu0 R X27 000000000004CF96 +23733 clk cpu0 IT (23697) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23733 clk cpu0 R X20 000000000004CF97 +23734 clk cpu0 IT (23698) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23734 clk cpu0 MW1 13000000:000013000000_NS 2d +23735 clk cpu0 IT (23699) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23735 clk cpu0 MR1 0004cf97:00001004cf97_NS 2d +23735 clk cpu0 R X8 000000000000002D +23736 clk cpu0 IT (23700) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23736 clk cpu0 R cpsr 200003c0 +23737 clk cpu0 IS (23701) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23738 clk cpu0 IS (23702) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23739 clk cpu0 IT (23703) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23739 clk cpu0 R cpsr 000003c0 +23740 clk cpu0 IT (23704) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23741 clk cpu0 IT (23705) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23741 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23741 clk cpu0 R X9 0000000013000000 +23742 clk cpu0 IT (23706) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +23742 clk cpu0 R X27 000000000004CF97 +23743 clk cpu0 IT (23707) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +23743 clk cpu0 R X20 000000000004CF98 +23744 clk cpu0 IT (23708) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +23744 clk cpu0 MW1 13000000:000013000000_NS 2d +23745 clk cpu0 IT (23709) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23745 clk cpu0 MR1 0004cf98:00001004cf98_NS 2d +23745 clk cpu0 R X8 000000000000002D +23746 clk cpu0 IT (23710) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23746 clk cpu0 R cpsr 200003c0 +23747 clk cpu0 IS (23711) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23748 clk cpu0 IS (23712) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23749 clk cpu0 IT (23713) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +23749 clk cpu0 R cpsr 400003c0 +23750 clk cpu0 IS (23714) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +23751 clk cpu0 IT (23715) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +23751 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +23751 clk cpu0 R X8 0000000000000000 +23752 clk cpu0 IT (23716) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +23752 clk cpu0 MR8 0004cf98:00001004cf98_NS 2d2d2d2d_2d2d2d2d +23752 clk cpu0 R X0 2D2D2D2D2D2D2D2D +23753 clk cpu0 IT (23717) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +23753 clk cpu0 R cpsr 800003c0 +23754 clk cpu0 IT (23718) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +23755 clk cpu0 IT (23719) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +23755 clk cpu0 R X27 0000000000000000 +23756 clk cpu0 IT (23720) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +23756 clk cpu0 R X28 000000000004CF98 +23757 clk cpu0 IT (23721) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +23757 clk cpu0 R X8 00000000FFFFFFF8 +23758 clk cpu0 IT (23722) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23758 clk cpu0 R cpsr 000003c0 +23758 clk cpu0 R X9 000000000000002D +23759 clk cpu0 IS (23723) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23760 clk cpu0 IT (23724) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23760 clk cpu0 R cpsr 200003c0 +23761 clk cpu0 IS (23725) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23762 clk cpu0 IT (23726) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23762 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23762 clk cpu0 R X9 0000000013000000 +23763 clk cpu0 IT (23727) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23763 clk cpu0 R cpsr 800003c0 +23763 clk cpu0 R X8 00000000FFFFFFF9 +23764 clk cpu0 IT (23728) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23764 clk cpu0 MW1 13000000:000013000000_NS 2d +23765 clk cpu0 IT (23729) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23765 clk cpu0 R X0 002D2D2D2D2D2D2D +23766 clk cpu0 IT (23730) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23767 clk cpu0 IT (23731) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23767 clk cpu0 R cpsr 000003c0 +23767 clk cpu0 R X9 000000000000002D +23768 clk cpu0 IS (23732) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23769 clk cpu0 IT (23733) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23769 clk cpu0 R cpsr 200003c0 +23770 clk cpu0 IS (23734) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23771 clk cpu0 IT (23735) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23771 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23771 clk cpu0 R X9 0000000013000000 +23772 clk cpu0 IT (23736) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23772 clk cpu0 R cpsr 800003c0 +23772 clk cpu0 R X8 00000000FFFFFFFA +23773 clk cpu0 IT (23737) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23773 clk cpu0 MW1 13000000:000013000000_NS 2d +23774 clk cpu0 IT (23738) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23774 clk cpu0 R X0 00002D2D2D2D2D2D +23775 clk cpu0 IT (23739) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23776 clk cpu0 IT (23740) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23776 clk cpu0 R cpsr 000003c0 +23776 clk cpu0 R X9 000000000000002D +23777 clk cpu0 IS (23741) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23778 clk cpu0 IT (23742) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23778 clk cpu0 R cpsr 200003c0 +23779 clk cpu0 IS (23743) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23780 clk cpu0 IT (23744) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23780 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23780 clk cpu0 R X9 0000000013000000 +23781 clk cpu0 IT (23745) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23781 clk cpu0 R cpsr 800003c0 +23781 clk cpu0 R X8 00000000FFFFFFFB +23782 clk cpu0 IT (23746) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23782 clk cpu0 MW1 13000000:000013000000_NS 2d +23783 clk cpu0 IT (23747) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23783 clk cpu0 R X0 0000002D2D2D2D2D +23784 clk cpu0 IT (23748) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23785 clk cpu0 IT (23749) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23785 clk cpu0 R cpsr 000003c0 +23785 clk cpu0 R X9 000000000000002D +23786 clk cpu0 IS (23750) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23787 clk cpu0 IT (23751) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23787 clk cpu0 R cpsr 200003c0 +23788 clk cpu0 IS (23752) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23789 clk cpu0 IT (23753) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23789 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23789 clk cpu0 R X9 0000000013000000 +23790 clk cpu0 IT (23754) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23790 clk cpu0 R cpsr 800003c0 +23790 clk cpu0 R X8 00000000FFFFFFFC +23791 clk cpu0 IT (23755) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23791 clk cpu0 MW1 13000000:000013000000_NS 2d +23792 clk cpu0 IT (23756) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23792 clk cpu0 R X0 000000002D2D2D2D +23793 clk cpu0 IT (23757) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23794 clk cpu0 IT (23758) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23794 clk cpu0 R cpsr 000003c0 +23794 clk cpu0 R X9 000000000000002D +23795 clk cpu0 IS (23759) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23796 clk cpu0 IT (23760) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23796 clk cpu0 R cpsr 200003c0 +23797 clk cpu0 IS (23761) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23798 clk cpu0 IT (23762) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23798 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23798 clk cpu0 R X9 0000000013000000 +23799 clk cpu0 IT (23763) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23799 clk cpu0 R cpsr 800003c0 +23799 clk cpu0 R X8 00000000FFFFFFFD +23800 clk cpu0 IT (23764) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23800 clk cpu0 MW1 13000000:000013000000_NS 2d +23801 clk cpu0 IT (23765) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23801 clk cpu0 R X0 00000000002D2D2D +23802 clk cpu0 IT (23766) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23803 clk cpu0 IT (23767) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23803 clk cpu0 R cpsr 000003c0 +23803 clk cpu0 R X9 000000000000002D +23804 clk cpu0 IS (23768) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23805 clk cpu0 IT (23769) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23805 clk cpu0 R cpsr 200003c0 +23806 clk cpu0 IS (23770) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23807 clk cpu0 IT (23771) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23807 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23807 clk cpu0 R X9 0000000013000000 +23808 clk cpu0 IT (23772) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23808 clk cpu0 R cpsr 800003c0 +23808 clk cpu0 R X8 00000000FFFFFFFE +23809 clk cpu0 IT (23773) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23809 clk cpu0 MW1 13000000:000013000000_NS 2d +23810 clk cpu0 IT (23774) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23810 clk cpu0 R X0 0000000000002D2D +23811 clk cpu0 IT (23775) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23812 clk cpu0 IT (23776) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23812 clk cpu0 R cpsr 000003c0 +23812 clk cpu0 R X9 000000000000002D +23813 clk cpu0 IS (23777) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23814 clk cpu0 IT (23778) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23814 clk cpu0 R cpsr 200003c0 +23815 clk cpu0 IS (23779) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23816 clk cpu0 IT (23780) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23816 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23816 clk cpu0 R X9 0000000013000000 +23817 clk cpu0 IT (23781) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23817 clk cpu0 R cpsr 800003c0 +23817 clk cpu0 R X8 00000000FFFFFFFF +23818 clk cpu0 IT (23782) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23818 clk cpu0 MW1 13000000:000013000000_NS 2d +23819 clk cpu0 IT (23783) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23819 clk cpu0 R X0 000000000000002D +23820 clk cpu0 IT (23784) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23821 clk cpu0 IT (23785) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23821 clk cpu0 R cpsr 000003c0 +23821 clk cpu0 R X9 000000000000002D +23822 clk cpu0 IS (23786) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23823 clk cpu0 IT (23787) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23823 clk cpu0 R cpsr 200003c0 +23824 clk cpu0 IS (23788) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23825 clk cpu0 IT (23789) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23825 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23825 clk cpu0 R X9 0000000013000000 +23826 clk cpu0 IT (23790) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23826 clk cpu0 R cpsr 600003c0 +23826 clk cpu0 R X8 0000000000000000 +23827 clk cpu0 IT (23791) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23827 clk cpu0 MW1 13000000:000013000000_NS 2d +23828 clk cpu0 IT (23792) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23828 clk cpu0 R X0 0000000000000000 +23829 clk cpu0 IS (23793) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23830 clk cpu0 IT (23794) 00092c10:000010092c10_NS f8408f80 O EL0t_n : LDR x0,[x28,#8]! +23830 clk cpu0 MR8 0004cfa0:00001004cfa0_NS 2d2d2d2d_2d2d2d2d +23830 clk cpu0 R X0 2D2D2D2D2D2D2D2D +23830 clk cpu0 R X28 000000000004CFA0 +23831 clk cpu0 IT (23795) 00092c14:000010092c14_NS b948fb09 O EL0t_n : LDR w9,[x24,#0x8f8] +23831 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +23831 clk cpu0 R X9 0000000000000000 +23832 clk cpu0 IT (23796) 00092c18:000010092c18_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +23832 clk cpu0 R X8 0000000000000000 +23833 clk cpu0 IT (23797) 00092c1c:000010092c1c_NS 1100211b O EL0t_n : ADD w27,w8,#8 +23833 clk cpu0 R X27 0000000000000008 +23834 clk cpu0 IT (23798) 00092c20:000010092c20_NS 7100053f O EL0t_n : CMP w9,#1 +23834 clk cpu0 R cpsr 800003c0 +23835 clk cpu0 IT (23799) 00092c24:000010092c24_NS 54fffe21 O EL0t_n : B.NE 0x92be8 +23836 clk cpu0 IT (23800) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +23836 clk cpu0 R X8 00000000FFFFFFF8 +23837 clk cpu0 IT (23801) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23837 clk cpu0 R cpsr 000003c0 +23837 clk cpu0 R X9 000000000000002D +23838 clk cpu0 IS (23802) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23839 clk cpu0 IT (23803) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23839 clk cpu0 R cpsr 200003c0 +23840 clk cpu0 IS (23804) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23841 clk cpu0 IT (23805) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23841 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23841 clk cpu0 R X9 0000000013000000 +23842 clk cpu0 IT (23806) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23842 clk cpu0 R cpsr 800003c0 +23842 clk cpu0 R X8 00000000FFFFFFF9 +23843 clk cpu0 IT (23807) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23843 clk cpu0 MW1 13000000:000013000000_NS 2d +23844 clk cpu0 IT (23808) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23844 clk cpu0 R X0 002D2D2D2D2D2D2D +23845 clk cpu0 IT (23809) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23846 clk cpu0 IT (23810) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23846 clk cpu0 R cpsr 000003c0 +23846 clk cpu0 R X9 000000000000002D +23847 clk cpu0 IS (23811) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23848 clk cpu0 IT (23812) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23848 clk cpu0 R cpsr 200003c0 +23849 clk cpu0 IS (23813) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23850 clk cpu0 IT (23814) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23850 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23850 clk cpu0 R X9 0000000013000000 +23851 clk cpu0 IT (23815) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23851 clk cpu0 R cpsr 800003c0 +23851 clk cpu0 R X8 00000000FFFFFFFA +23852 clk cpu0 IT (23816) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23852 clk cpu0 MW1 13000000:000013000000_NS 2d +23853 clk cpu0 IT (23817) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23853 clk cpu0 R X0 00002D2D2D2D2D2D +23854 clk cpu0 IT (23818) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23855 clk cpu0 IT (23819) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23855 clk cpu0 R cpsr 000003c0 +23855 clk cpu0 R X9 000000000000002D +23856 clk cpu0 IS (23820) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23857 clk cpu0 IT (23821) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23857 clk cpu0 R cpsr 200003c0 +23858 clk cpu0 IS (23822) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23859 clk cpu0 IT (23823) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23859 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23859 clk cpu0 R X9 0000000013000000 +23860 clk cpu0 IT (23824) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23860 clk cpu0 R cpsr 800003c0 +23860 clk cpu0 R X8 00000000FFFFFFFB +23861 clk cpu0 IT (23825) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23861 clk cpu0 MW1 13000000:000013000000_NS 2d +23862 clk cpu0 IT (23826) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23862 clk cpu0 R X0 0000002D2D2D2D2D +23863 clk cpu0 IT (23827) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23864 clk cpu0 IT (23828) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23864 clk cpu0 R cpsr 000003c0 +23864 clk cpu0 R X9 000000000000002D +23865 clk cpu0 IS (23829) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23866 clk cpu0 IT (23830) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23866 clk cpu0 R cpsr 200003c0 +23867 clk cpu0 IS (23831) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23868 clk cpu0 IT (23832) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23868 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23868 clk cpu0 R X9 0000000013000000 +23869 clk cpu0 IT (23833) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23869 clk cpu0 R cpsr 800003c0 +23869 clk cpu0 R X8 00000000FFFFFFFC +23870 clk cpu0 IT (23834) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23870 clk cpu0 MW1 13000000:000013000000_NS 2d +23871 clk cpu0 IT (23835) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23871 clk cpu0 R X0 000000002D2D2D2D +23872 clk cpu0 IT (23836) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23873 clk cpu0 IT (23837) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23873 clk cpu0 R cpsr 000003c0 +23873 clk cpu0 R X9 000000000000002D +23874 clk cpu0 IS (23838) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23875 clk cpu0 IT (23839) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23875 clk cpu0 R cpsr 200003c0 +23876 clk cpu0 IS (23840) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23877 clk cpu0 IT (23841) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23877 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23877 clk cpu0 R X9 0000000013000000 +23878 clk cpu0 IT (23842) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23878 clk cpu0 R cpsr 800003c0 +23878 clk cpu0 R X8 00000000FFFFFFFD +23879 clk cpu0 IT (23843) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23879 clk cpu0 MW1 13000000:000013000000_NS 2d +23880 clk cpu0 IT (23844) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23880 clk cpu0 R X0 00000000002D2D2D +23881 clk cpu0 IT (23845) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23882 clk cpu0 IT (23846) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23882 clk cpu0 R cpsr 000003c0 +23882 clk cpu0 R X9 000000000000002D +23883 clk cpu0 IS (23847) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23884 clk cpu0 IT (23848) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23884 clk cpu0 R cpsr 200003c0 +23885 clk cpu0 IS (23849) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23886 clk cpu0 IT (23850) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23886 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23886 clk cpu0 R X9 0000000013000000 +23887 clk cpu0 IT (23851) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23887 clk cpu0 R cpsr 800003c0 +23887 clk cpu0 R X8 00000000FFFFFFFE +23888 clk cpu0 IT (23852) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23888 clk cpu0 MW1 13000000:000013000000_NS 2d +23889 clk cpu0 IT (23853) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23889 clk cpu0 R X0 0000000000002D2D +23890 clk cpu0 IT (23854) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23891 clk cpu0 IT (23855) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23891 clk cpu0 R cpsr 000003c0 +23891 clk cpu0 R X9 000000000000002D +23892 clk cpu0 IS (23856) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23893 clk cpu0 IT (23857) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23893 clk cpu0 R cpsr 200003c0 +23894 clk cpu0 IS (23858) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23895 clk cpu0 IT (23859) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23895 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23895 clk cpu0 R X9 0000000013000000 +23896 clk cpu0 IT (23860) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23896 clk cpu0 R cpsr 800003c0 +23896 clk cpu0 R X8 00000000FFFFFFFF +23897 clk cpu0 IT (23861) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23897 clk cpu0 MW1 13000000:000013000000_NS 2d +23898 clk cpu0 IT (23862) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23898 clk cpu0 R X0 000000000000002D +23899 clk cpu0 IT (23863) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23900 clk cpu0 IT (23864) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23900 clk cpu0 R cpsr 000003c0 +23900 clk cpu0 R X9 000000000000002D +23901 clk cpu0 IS (23865) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23902 clk cpu0 IT (23866) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23902 clk cpu0 R cpsr 200003c0 +23903 clk cpu0 IS (23867) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23904 clk cpu0 IT (23868) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23904 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23904 clk cpu0 R X9 0000000013000000 +23905 clk cpu0 IT (23869) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23905 clk cpu0 R cpsr 600003c0 +23905 clk cpu0 R X8 0000000000000000 +23906 clk cpu0 IT (23870) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23906 clk cpu0 MW1 13000000:000013000000_NS 2d +23907 clk cpu0 IT (23871) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23907 clk cpu0 R X0 0000000000000000 +23908 clk cpu0 IS (23872) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23909 clk cpu0 IT (23873) 00092c10:000010092c10_NS f8408f80 O EL0t_n : LDR x0,[x28,#8]! +23909 clk cpu0 MR8 0004cfa8:00001004cfa8_NS 72656e65_47000a2d +23909 clk cpu0 R X0 72656E6547000A2D +23909 clk cpu0 R X28 000000000004CFA8 +23910 clk cpu0 IT (23874) 00092c14:000010092c14_NS b948fb09 O EL0t_n : LDR w9,[x24,#0x8f8] +23910 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +23910 clk cpu0 R X9 0000000000000000 +23911 clk cpu0 IT (23875) 00092c18:000010092c18_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +23911 clk cpu0 R X8 0000000000000008 +23912 clk cpu0 IT (23876) 00092c1c:000010092c1c_NS 1100211b O EL0t_n : ADD w27,w8,#8 +23912 clk cpu0 R X27 0000000000000010 +23913 clk cpu0 IT (23877) 00092c20:000010092c20_NS 7100053f O EL0t_n : CMP w9,#1 +23913 clk cpu0 R cpsr 800003c0 +23914 clk cpu0 IT (23878) 00092c24:000010092c24_NS 54fffe21 O EL0t_n : B.NE 0x92be8 +23915 clk cpu0 IT (23879) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +23915 clk cpu0 R X8 00000000FFFFFFF8 +23916 clk cpu0 IT (23880) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23916 clk cpu0 R cpsr 000003c0 +23916 clk cpu0 R X9 000000000000002D +23917 clk cpu0 IS (23881) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23918 clk cpu0 IT (23882) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23918 clk cpu0 R cpsr 200003c0 +23919 clk cpu0 IS (23883) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23920 clk cpu0 IT (23884) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23920 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23920 clk cpu0 R X9 0000000013000000 +23921 clk cpu0 IT (23885) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23921 clk cpu0 R cpsr 800003c0 +23921 clk cpu0 R X8 00000000FFFFFFF9 +23922 clk cpu0 IT (23886) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23922 clk cpu0 MW1 13000000:000013000000_NS 2d +23923 clk cpu0 IT (23887) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23923 clk cpu0 R X0 0072656E6547000A +23924 clk cpu0 IT (23888) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23925 clk cpu0 IT (23889) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23925 clk cpu0 R cpsr 000003c0 +23925 clk cpu0 R X9 000000000000000A +23926 clk cpu0 IS (23890) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23927 clk cpu0 IT (23891) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +23927 clk cpu0 R cpsr 800003c0 +23928 clk cpu0 IS (23892) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +23929 clk cpu0 IT (23893) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +23929 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +23929 clk cpu0 R X9 0000000013000000 +23930 clk cpu0 IT (23894) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +23930 clk cpu0 R cpsr 800003c0 +23930 clk cpu0 R X8 00000000FFFFFFFA +TUBE CPU0: >>---------------------- +23931 clk cpu0 IT (23895) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +23931 clk cpu0 MW1 13000000:000013000000_NS 0a +23932 clk cpu0 IT (23896) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +23932 clk cpu0 R X0 000072656E654700 +23933 clk cpu0 IT (23897) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +23934 clk cpu0 IT (23898) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +23934 clk cpu0 R cpsr 400003c0 +23934 clk cpu0 R X9 0000000000000000 +23935 clk cpu0 IT (23899) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +23936 clk cpu0 IT (23900) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +23936 clk cpu0 R X8 000000000000000A +23937 clk cpu0 IT (23901) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +23937 clk cpu0 R X9 0000000000000011 +23938 clk cpu0 IT (23902) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +23938 clk cpu0 R X9 000000000004CFA9 +23939 clk cpu0 IT (23903) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +23939 clk cpu0 R cpsr 000003c0 +23940 clk cpu0 IT (23904) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +23940 clk cpu0 R X27 000000000004CFA9 +23941 clk cpu0 IT (23905) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +23941 clk cpu0 R X20 000000000004CFAA +23942 clk cpu0 IT (23906) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +23943 clk cpu0 IT (23907) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +23943 clk cpu0 MR1 0004cfaa:00001004cfaa_NS 00 +23943 clk cpu0 R X8 0000000000000000 +23944 clk cpu0 IT (23908) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +23944 clk cpu0 R cpsr 800003c0 +23945 clk cpu0 IS (23909) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +23946 clk cpu0 IT (23910) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +23947 clk cpu0 IT (23911) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +23948 clk cpu0 IT (23912) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +23948 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004cf91 +23948 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +23948 clk cpu0 R X19 000000000004CF91 +23948 clk cpu0 R X30 000000000009C560 +23949 clk cpu0 IT (23913) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +23949 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +23949 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +23949 clk cpu0 R X20 0000000003008528 +23949 clk cpu0 R X21 0000000000000000 +23950 clk cpu0 IT (23914) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +23950 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +23950 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +23950 clk cpu0 R X22 000000000004D076 +23950 clk cpu0 R X23 000000000004D06C +23951 clk cpu0 IT (23915) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +23951 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +23951 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +23951 clk cpu0 R X24 000000000004D080 +23951 clk cpu0 R X25 0000000006216000 +23952 clk cpu0 IT (23916) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +23952 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +23952 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216034 +23952 clk cpu0 R X26 0000000006216034 +23952 clk cpu0 R X27 0001000100010001 +23953 clk cpu0 IT (23917) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +23953 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +23953 clk cpu0 R X28 FF7FFF7FFF7FFF7F +23954 clk cpu0 IT (23918) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +23954 clk cpu0 R SP_EL0 0000000003045800 +23955 clk cpu0 IT (23919) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +23956 clk cpu0 IT (23920) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +23956 clk cpu0 R X0 0000000000000001 +23957 clk cpu0 IT (23921) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +23957 clk cpu0 R X1 0000000000000000 +23958 clk cpu0 IT (23922) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +23958 clk cpu0 R X2 0000000000000000 +23959 clk cpu0 IT (23923) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +23960 clk cpu0 IT (23924) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +23961 clk cpu0 IT (23925) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +23961 clk cpu0 R X0 0000000003008528 +23962 clk cpu0 IT (23926) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +23962 clk cpu0 R X30 000000000009C57C +23963 clk cpu0 IT (23927) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +23964 clk cpu0 IT (23928) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +23964 clk cpu0 R X8 0000000006216000 +23965 clk cpu0 IT (23929) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +23965 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +23965 clk cpu0 R X8 0000000000000001 +23966 clk cpu0 IT (23930) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +23966 clk cpu0 R cpsr 800003c0 +23967 clk cpu0 IT (23931) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +23968 clk cpu0 IT (23932) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +23969 clk cpu0 IT (23933) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +23969 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000000 +23969 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b48c +23969 clk cpu0 R X19 0000000000000000 +23969 clk cpu0 R X30 000000000009B48C +23970 clk cpu0 IT (23934) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +23970 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +23970 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +23970 clk cpu0 R X20 000000000004D0CC +23970 clk cpu0 R X21 000000000004CF91 +23971 clk cpu0 IT (23935) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +23971 clk cpu0 R SP_EL0 0000000003045890 +23972 clk cpu0 IT (23936) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +23973 clk cpu0 IT (23937) 0009b48c:00001009b48c_NS b85fc342 O EL0t_n : LDUR w2,[x26,#-4] +23973 clk cpu0 MR4 06216030:000015216030_NS 00000002 +23973 clk cpu0 R X2 0000000000000002 +23973 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 INVAL 0x000016242000_NS +23973 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0101 ALLOC 0x000015216000_NS +23974 clk cpu0 IT (23938) 0009b490:00001009b490_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +23974 clk cpu0 R X0 0000000000000000 +23975 clk cpu0 IT (23939) 0009b494:00001009b494_NS aa1603e1 O EL0t_n : MOV x1,x22 +23975 clk cpu0 R X1 000000000004D076 +23976 clk cpu0 IT (23940) 0009b498:00001009b498_NS 9400040d O EL0t_n : BL 0x9c4cc +23976 clk cpu0 R X30 000000000009B49C +23977 clk cpu0 IT (23941) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +23977 clk cpu0 R SP_EL0 0000000003045800 +23978 clk cpu0 IT (23942) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +23978 clk cpu0 R X8 0000000006216000 +23979 clk cpu0 IT (23943) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +23979 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +23979 clk cpu0 R X8 0000000000000003 +23980 clk cpu0 IT (23944) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +23980 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +23980 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +23981 clk cpu0 IT (23945) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +23981 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000000 +23981 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b49c +23982 clk cpu0 IT (23946) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +23982 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000002 +23982 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +23983 clk cpu0 IT (23947) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +23983 clk cpu0 R cpsr 200003c0 +23984 clk cpu0 IT (23948) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +23984 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +23984 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +23985 clk cpu0 IT (23949) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +23985 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +23985 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +23986 clk cpu0 IT (23950) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +23986 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +23986 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +23987 clk cpu0 IT (23951) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +23987 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +23987 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +23988 clk cpu0 IS (23952) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +23989 clk cpu0 IT (23953) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +23989 clk cpu0 R X20 0000000003008000 +23990 clk cpu0 IT (23954) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +23990 clk cpu0 R X20 0000000003008528 +23991 clk cpu0 IT (23955) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +23991 clk cpu0 R X0 0000000003008528 +23992 clk cpu0 IT (23956) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +23992 clk cpu0 R X19 000000000004D076 +23993 clk cpu0 IT (23957) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +23993 clk cpu0 R X30 000000000009C510 +23994 clk cpu0 IT (23958) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +23994 clk cpu0 R X8 0000000006216000 +23995 clk cpu0 IT (23959) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +23995 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +23995 clk cpu0 R X8 0000000000000001 +23996 clk cpu0 IT (23960) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +23996 clk cpu0 R cpsr 800003c0 +23997 clk cpu0 IT (23961) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +23998 clk cpu0 IT (23962) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +23999 clk cpu0 IT (23963) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +23999 clk cpu0 R X9 0000000003045800 +24000 clk cpu0 IT (23964) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +24000 clk cpu0 R X8 00000000FFFFFFD0 +24001 clk cpu0 IT (23965) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +24001 clk cpu0 R X10 0000000003045890 +24002 clk cpu0 IT (23966) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +24002 clk cpu0 R X9 0000000003045830 +24003 clk cpu0 IT (23967) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +24003 clk cpu0 R X0 0000000000000000 +24004 clk cpu0 IT (23968) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +24004 clk cpu0 R X1 0000000000000000 +24005 clk cpu0 IT (23969) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +24005 clk cpu0 R X2 0000000000000000 +24006 clk cpu0 IT (23970) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +24006 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +24007 clk cpu0 IT (23971) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +24007 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +24007 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +24008 clk cpu0 IT (23972) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +24009 clk cpu0 IT (23973) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +24009 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +24009 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +24009 clk cpu0 R X8 0000000000000000 +24009 clk cpu0 R X10 0000000003045830 +24010 clk cpu0 IT (23974) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +24010 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +24010 clk cpu0 R X9 0000000003045890 +24011 clk cpu0 IT (23975) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +24011 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +24011 clk cpu0 R X11 00000000FFFFFFD0 +24012 clk cpu0 IT (23976) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +24012 clk cpu0 R X21 0000000000000000 +24013 clk cpu0 IT (23977) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +24013 clk cpu0 R X1 0000000003045830 +24014 clk cpu0 IT (23978) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +24014 clk cpu0 R X0 000000000004D076 +24015 clk cpu0 IT (23979) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +24015 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +24015 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +24016 clk cpu0 IT (23980) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +24016 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +24017 clk cpu0 IT (23981) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +24017 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +24018 clk cpu0 IT (23982) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +24018 clk cpu0 R X30 000000000009C560 +24019 clk cpu0 IT (23983) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +24019 clk cpu0 R SP_EL0 0000000003045760 +24020 clk cpu0 IT (23984) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +24020 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d076 +24020 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +24021 clk cpu0 IT (23985) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +24021 clk cpu0 R X19 0000000003045830 +24022 clk cpu0 IT (23986) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +24022 clk cpu0 R X1 000000000004C000 +24023 clk cpu0 IT (23987) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +24023 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +24023 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +24024 clk cpu0 IT (23988) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +24024 clk cpu0 R X20 000000000004D076 +24025 clk cpu0 IT (23989) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +24025 clk cpu0 R X1 000000000004C00B +24026 clk cpu0 IT (23990) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +24026 clk cpu0 R X0 0000000003045764 +24027 clk cpu0 IT (23991) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +24027 clk cpu0 R X2 000000000000003B +24028 clk cpu0 IT (23992) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +24028 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +24029 clk cpu0 IT (23993) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +24029 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +24029 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216034 +24030 clk cpu0 IT (23994) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +24030 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +24030 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +24031 clk cpu0 IT (23995) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +24031 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +24031 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +24032 clk cpu0 IT (23996) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +24032 clk cpu0 R X30 0000000000092B80 +24033 clk cpu0 IT (23997) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +24033 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +24033 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +24033 clk cpu0 R SP_EL0 0000000003045750 +24034 clk cpu0 IT (23998) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +24034 clk cpu0 R X19 0000000003045764 +24035 clk cpu0 IT (23999) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +24035 clk cpu0 R X30 00000000000104DC +24036 clk cpu0 IT (24000) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +24036 clk cpu0 R cpsr 200003c0 +24037 clk cpu0 IS (24001) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +24038 clk cpu0 IT (24002) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +24038 clk cpu0 R cpsr 400003c0 +24039 clk cpu0 IT (24003) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +24040 clk cpu0 IT (24004) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +24040 clk cpu0 R cpsr 000003c0 +24040 clk cpu0 R X10 0000000000000003 +24041 clk cpu0 IS (24005) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +24042 clk cpu0 IT (24006) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +24042 clk cpu0 R X9 0000000000000020 +24043 clk cpu0 IT (24007) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +24043 clk cpu0 R X8 000000000004C008 +24044 clk cpu0 IT (24008) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +24044 clk cpu0 R cpsr 200003c0 +24045 clk cpu0 IT (24009) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +24045 clk cpu0 R X9 0000000000000008 +24046 clk cpu0 IS (24010) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +24047 clk cpu0 IT (24011) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +24047 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +24047 clk cpu0 R X12 000000000A00000A +24048 clk cpu0 IT (24012) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +24048 clk cpu0 R X10 0000000000000018 +24049 clk cpu0 IT (24013) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +24049 clk cpu0 R X11 000000000000003B +24050 clk cpu0 IT (24014) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24050 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +24050 clk cpu0 R X8 000000000004C00C +24050 clk cpu0 R X13 000000006F727245 +24051 clk cpu0 IT (24015) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24051 clk cpu0 R X12 000000000000000A +24052 clk cpu0 IT (24016) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24052 clk cpu0 R X11 0000000000000037 +24053 clk cpu0 IT (24017) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24053 clk cpu0 R cpsr 200003c0 +24054 clk cpu0 IT (24018) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24054 clk cpu0 R X14 0000000072724500 +24055 clk cpu0 IT (24019) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24055 clk cpu0 R X12 000000007272450A +24056 clk cpu0 IT (24020) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24056 clk cpu0 MW4 03045764:000000845764_NS 7272450a +24056 clk cpu0 R X0 0000000003045768 +24057 clk cpu0 IT (24021) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24057 clk cpu0 R X12 000000006F727245 +24058 clk cpu0 IT (24022) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24059 clk cpu0 IT (24023) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24059 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +24059 clk cpu0 R X8 000000000004C010 +24059 clk cpu0 R X13 0000000049203A72 +24060 clk cpu0 IT (24024) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24060 clk cpu0 R X12 000000000000006F +24061 clk cpu0 IT (24025) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24061 clk cpu0 R X11 0000000000000033 +24062 clk cpu0 IT (24026) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24062 clk cpu0 R cpsr 200003c0 +24063 clk cpu0 IT (24027) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24063 clk cpu0 R X14 00000000203A7200 +24064 clk cpu0 IT (24028) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24064 clk cpu0 R X12 00000000203A726F +24065 clk cpu0 IT (24029) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24065 clk cpu0 MW4 03045768:000000845768_NS 203a726f +24065 clk cpu0 R X0 000000000304576C +24066 clk cpu0 IT (24030) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24066 clk cpu0 R X12 0000000049203A72 +24067 clk cpu0 IT (24031) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24068 clk cpu0 IT (24032) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24068 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +24068 clk cpu0 R X8 000000000004C014 +24068 clk cpu0 R X13 0000000067656C6C +24069 clk cpu0 IT (24033) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24069 clk cpu0 R X12 0000000000000049 +24070 clk cpu0 IT (24034) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24070 clk cpu0 R X11 000000000000002F +24071 clk cpu0 IT (24035) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24071 clk cpu0 R cpsr 200003c0 +24072 clk cpu0 IT (24036) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24072 clk cpu0 R X14 00000000656C6C00 +24073 clk cpu0 IT (24037) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24073 clk cpu0 R X12 00000000656C6C49 +24074 clk cpu0 IT (24038) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24074 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +24074 clk cpu0 R X0 0000000003045770 +24075 clk cpu0 IT (24039) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24075 clk cpu0 R X12 0000000067656C6C +24076 clk cpu0 IT (24040) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24077 clk cpu0 IT (24041) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24077 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +24077 clk cpu0 R X8 000000000004C018 +24077 clk cpu0 R X13 0000000066206C61 +24078 clk cpu0 IT (24042) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24078 clk cpu0 R X12 0000000000000067 +24079 clk cpu0 IT (24043) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24079 clk cpu0 R X11 000000000000002B +24080 clk cpu0 IT (24044) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24080 clk cpu0 R cpsr 200003c0 +24081 clk cpu0 IT (24045) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24081 clk cpu0 R X14 00000000206C6100 +24082 clk cpu0 IT (24046) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24082 clk cpu0 R X12 00000000206C6167 +24083 clk cpu0 IT (24047) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24083 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +24083 clk cpu0 R X0 0000000003045774 +24084 clk cpu0 IT (24048) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24084 clk cpu0 R X12 0000000066206C61 +24085 clk cpu0 IT (24049) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24086 clk cpu0 IT (24050) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24086 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +24086 clk cpu0 R X8 000000000004C01C +24086 clk cpu0 R X13 00000000616D726F +24087 clk cpu0 IT (24051) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24087 clk cpu0 R X12 0000000000000066 +24088 clk cpu0 IT (24052) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24088 clk cpu0 R X11 0000000000000027 +24089 clk cpu0 IT (24053) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24089 clk cpu0 R cpsr 200003c0 +24090 clk cpu0 IT (24054) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24090 clk cpu0 R X14 000000006D726F00 +24091 clk cpu0 IT (24055) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24091 clk cpu0 R X12 000000006D726F66 +24092 clk cpu0 IT (24056) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24092 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +24092 clk cpu0 R X0 0000000003045778 +24093 clk cpu0 IT (24057) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24093 clk cpu0 R X12 00000000616D726F +24094 clk cpu0 IT (24058) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24095 clk cpu0 IT (24059) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24095 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +24095 clk cpu0 R X8 000000000004C020 +24095 clk cpu0 R X13 0000000070732074 +24096 clk cpu0 IT (24060) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24096 clk cpu0 R X12 0000000000000061 +24097 clk cpu0 IT (24061) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24097 clk cpu0 R X11 0000000000000023 +24098 clk cpu0 IT (24062) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24098 clk cpu0 R cpsr 200003c0 +24099 clk cpu0 IT (24063) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24099 clk cpu0 R X14 0000000073207400 +24100 clk cpu0 IT (24064) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24100 clk cpu0 R X12 0000000073207461 +24101 clk cpu0 IT (24065) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24101 clk cpu0 MW4 03045778:000000845778_NS 73207461 +24101 clk cpu0 R X0 000000000304577C +24102 clk cpu0 IT (24066) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24102 clk cpu0 R X12 0000000070732074 +24103 clk cpu0 IT (24067) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24104 clk cpu0 IT (24068) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24104 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +24104 clk cpu0 R X8 000000000004C024 +24104 clk cpu0 R X13 0000000066696365 +24105 clk cpu0 IT (24069) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24105 clk cpu0 R X12 0000000000000070 +24106 clk cpu0 IT (24070) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24106 clk cpu0 R X11 000000000000001F +24107 clk cpu0 IT (24071) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24107 clk cpu0 R cpsr 200003c0 +24108 clk cpu0 IT (24072) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24108 clk cpu0 R X14 0000000069636500 +24109 clk cpu0 IT (24073) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24109 clk cpu0 R X12 0000000069636570 +24110 clk cpu0 IT (24074) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24110 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +24110 clk cpu0 R X0 0000000003045780 +24111 clk cpu0 IT (24075) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24111 clk cpu0 R X12 0000000066696365 +24112 clk cpu0 IT (24076) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24113 clk cpu0 IT (24077) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24113 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +24113 clk cpu0 R X8 000000000004C028 +24113 clk cpu0 R X13 0000000020726569 +24114 clk cpu0 IT (24078) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24114 clk cpu0 R X12 0000000000000066 +24115 clk cpu0 IT (24079) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24115 clk cpu0 R X11 000000000000001B +24116 clk cpu0 IT (24080) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24116 clk cpu0 R cpsr 200003c0 +24117 clk cpu0 IT (24081) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24117 clk cpu0 R X14 0000000072656900 +24118 clk cpu0 IT (24082) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24118 clk cpu0 R X12 0000000072656966 +24119 clk cpu0 IT (24083) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24119 clk cpu0 MW4 03045780:000000845780_NS 72656966 +24119 clk cpu0 R X0 0000000003045784 +24120 clk cpu0 IT (24084) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24120 clk cpu0 R X12 0000000020726569 +24121 clk cpu0 IT (24085) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24122 clk cpu0 IT (24086) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24122 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +24122 clk cpu0 R X8 000000000004C02C +24122 clk cpu0 R X13 0000000064657375 +24123 clk cpu0 IT (24087) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24123 clk cpu0 R X12 0000000000000020 +24124 clk cpu0 IT (24088) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24124 clk cpu0 R X11 0000000000000017 +24125 clk cpu0 IT (24089) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24125 clk cpu0 R cpsr 200003c0 +24126 clk cpu0 IT (24090) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24126 clk cpu0 R X14 0000000065737500 +24127 clk cpu0 IT (24091) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24127 clk cpu0 R X12 0000000065737520 +24128 clk cpu0 IT (24092) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24128 clk cpu0 MW4 03045784:000000845784_NS 65737520 +24128 clk cpu0 R X0 0000000003045788 +24129 clk cpu0 IT (24093) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24129 clk cpu0 R X12 0000000064657375 +24130 clk cpu0 IT (24094) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24131 clk cpu0 IT (24095) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24131 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +24131 clk cpu0 R X8 000000000004C030 +24131 clk cpu0 R X13 000000005F27203A +24132 clk cpu0 IT (24096) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24132 clk cpu0 R X12 0000000000000064 +24133 clk cpu0 IT (24097) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24133 clk cpu0 R X11 0000000000000013 +24134 clk cpu0 IT (24098) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24134 clk cpu0 R cpsr 200003c0 +24135 clk cpu0 IT (24099) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24135 clk cpu0 R X14 0000000027203A00 +24136 clk cpu0 IT (24100) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24136 clk cpu0 R X12 0000000027203A64 +24137 clk cpu0 IT (24101) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24137 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +24137 clk cpu0 R X0 000000000304578C +24138 clk cpu0 IT (24102) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24138 clk cpu0 R X12 000000005F27203A +24139 clk cpu0 IT (24103) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24140 clk cpu0 IT (24104) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24140 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +24140 clk cpu0 R X8 000000000004C034 +24140 clk cpu0 R X13 0000000045202E27 +24141 clk cpu0 IT (24105) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24141 clk cpu0 R X12 000000000000005F +24142 clk cpu0 IT (24106) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24142 clk cpu0 R X11 000000000000000F +24143 clk cpu0 IT (24107) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24143 clk cpu0 R cpsr 200003c0 +24144 clk cpu0 IT (24108) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24144 clk cpu0 R X14 00000000202E2700 +24145 clk cpu0 IT (24109) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24145 clk cpu0 R X12 00000000202E275F +24146 clk cpu0 IT (24110) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24146 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +24146 clk cpu0 R X0 0000000003045790 +24147 clk cpu0 IT (24111) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24147 clk cpu0 R X12 0000000045202E27 +24148 clk cpu0 IT (24112) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24149 clk cpu0 IT (24113) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24149 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +24149 clk cpu0 R X8 000000000004C038 +24149 clk cpu0 R X13 000000006E69646E +24150 clk cpu0 IT (24114) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24150 clk cpu0 R X12 0000000000000045 +24151 clk cpu0 IT (24115) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24151 clk cpu0 R X11 000000000000000B +24152 clk cpu0 IT (24116) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24152 clk cpu0 R cpsr 200003c0 +24153 clk cpu0 IT (24117) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24153 clk cpu0 R X14 0000000069646E00 +24154 clk cpu0 IT (24118) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24154 clk cpu0 R X12 0000000069646E45 +24155 clk cpu0 IT (24119) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24155 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +24155 clk cpu0 R X0 0000000003045794 +24156 clk cpu0 IT (24120) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24156 clk cpu0 R X12 000000006E69646E +24157 clk cpu0 IT (24121) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24158 clk cpu0 IT (24122) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24158 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +24158 clk cpu0 R X8 000000000004C03C +24158 clk cpu0 R X13 0000000065542067 +24159 clk cpu0 IT (24123) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24159 clk cpu0 R X12 000000000000006E +24160 clk cpu0 IT (24124) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24160 clk cpu0 R X11 0000000000000007 +24161 clk cpu0 IT (24125) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24161 clk cpu0 R cpsr 200003c0 +24162 clk cpu0 IT (24126) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24162 clk cpu0 R X14 0000000054206700 +24163 clk cpu0 IT (24127) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24163 clk cpu0 R X12 000000005420676E +24164 clk cpu0 IT (24128) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24164 clk cpu0 MW4 03045794:000000845794_NS 5420676e +24164 clk cpu0 R X0 0000000003045798 +24165 clk cpu0 IT (24129) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24165 clk cpu0 R X12 0000000065542067 +24166 clk cpu0 IT (24130) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24167 clk cpu0 IT (24131) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24167 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +24167 clk cpu0 R X8 000000000004C040 +24167 clk cpu0 R X13 000000000A2E7473 +24168 clk cpu0 IT (24132) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24168 clk cpu0 R X12 0000000000000065 +24169 clk cpu0 IT (24133) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24169 clk cpu0 R X11 0000000000000003 +24170 clk cpu0 IT (24134) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24170 clk cpu0 R cpsr 600003c0 +24171 clk cpu0 IT (24135) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24171 clk cpu0 R X14 000000002E747300 +24172 clk cpu0 IT (24136) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24172 clk cpu0 R X12 000000002E747365 +24173 clk cpu0 IT (24137) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24173 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +24173 clk cpu0 R X0 000000000304579C +24174 clk cpu0 IT (24138) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24174 clk cpu0 R X12 000000000A2E7473 +24175 clk cpu0 IS (24139) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24176 clk cpu0 IT (24140) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +24176 clk cpu0 R X2 0000000000000003 +24177 clk cpu0 IT (24141) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +24177 clk cpu0 R X9 0000000000000001 +24178 clk cpu0 IT (24142) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +24178 clk cpu0 R X8 000000000004C03F +24179 clk cpu0 IT (24143) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +24179 clk cpu0 R X1 000000000004C043 +24180 clk cpu0 IT (24144) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +24180 clk cpu0 R cpsr 200003c0 +24181 clk cpu0 IS (24145) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +24182 clk cpu0 IT (24146) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +24182 clk cpu0 MR1 0004c043:00001004c043_NS 0a +24182 clk cpu0 R X8 000000000000000A +24183 clk cpu0 IT (24147) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +24183 clk cpu0 MW1 0304579c:00000084579c_NS 0a +24184 clk cpu0 IS (24148) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +24185 clk cpu0 IT (24149) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +24185 clk cpu0 MR1 0004c044:00001004c044_NS 00 +24185 clk cpu0 R X8 0000000000000000 +24186 clk cpu0 IT (24150) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +24186 clk cpu0 R cpsr 600003c0 +24187 clk cpu0 IT (24151) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +24187 clk cpu0 MW1 0304579d:00000084579d_NS 00 +24188 clk cpu0 IS (24152) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +24189 clk cpu0 IT (24153) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +24189 clk cpu0 MR1 0004c045:00001004c045_NS 00 +24189 clk cpu0 R X8 0000000000000000 +24190 clk cpu0 IT (24154) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +24190 clk cpu0 MW1 0304579e:00000084579e_NS 00 +24191 clk cpu0 IT (24155) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +24192 clk cpu0 IT (24156) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +24192 clk cpu0 R X0 0000000003045764 +24193 clk cpu0 IT (24157) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +24193 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +24193 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +24193 clk cpu0 R SP_EL0 0000000003045760 +24193 clk cpu0 R X19 0000000003045830 +24193 clk cpu0 R X30 0000000000092B80 +24194 clk cpu0 IT (24158) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +24195 clk cpu0 IT (24159) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +24195 clk cpu0 R X22 000000000004C000 +24196 clk cpu0 IT (24160) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +24196 clk cpu0 R X23 000000000004C000 +24197 clk cpu0 IT (24161) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +24197 clk cpu0 R X26 0000000000000000 +24198 clk cpu0 IT (24162) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +24198 clk cpu0 R X21 0000000003029000 +24199 clk cpu0 IT (24163) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +24199 clk cpu0 R X22 000000000004C108 +24200 clk cpu0 IT (24164) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +24200 clk cpu0 R X23 000000000004C129 +24201 clk cpu0 IT (24165) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +24201 clk cpu0 R X24 0000000003041000 +24202 clk cpu0 IT (24166) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +24202 clk cpu0 R X25 0000000006216000 +24203 clk cpu0 IT (24167) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +24204 clk cpu0 IT (24168) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24204 clk cpu0 MR1 0004d076:00001004d076_NS 3e +24204 clk cpu0 R X8 000000000000003E +24204 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0082 ALLOC 0x00001004d040_NS +24204 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1411 ALLOC 0x00001004d040_NS +24205 clk cpu0 IT (24169) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24205 clk cpu0 R cpsr 200003c0 +24206 clk cpu0 IS (24170) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24207 clk cpu0 IS (24171) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24208 clk cpu0 IT (24172) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24208 clk cpu0 R cpsr 000003c0 +24209 clk cpu0 IT (24173) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24210 clk cpu0 IT (24174) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24210 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24210 clk cpu0 R X9 0000000013000000 +24211 clk cpu0 IT (24175) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24211 clk cpu0 R X27 000000000004D076 +24212 clk cpu0 IT (24176) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24212 clk cpu0 R X20 000000000004D077 +24213 clk cpu0 IT (24177) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24213 clk cpu0 MW1 13000000:000013000000_NS 3e +24214 clk cpu0 IT (24178) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24214 clk cpu0 MR1 0004d077:00001004d077_NS 3e +24214 clk cpu0 R X8 000000000000003E +24215 clk cpu0 IT (24179) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24215 clk cpu0 R cpsr 200003c0 +24216 clk cpu0 IS (24180) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24217 clk cpu0 IS (24181) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24218 clk cpu0 IT (24182) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24218 clk cpu0 R cpsr 000003c0 +24219 clk cpu0 IT (24183) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24220 clk cpu0 IT (24184) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24220 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24220 clk cpu0 R X9 0000000013000000 +24221 clk cpu0 IT (24185) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24221 clk cpu0 R X27 000000000004D077 +24222 clk cpu0 IT (24186) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24222 clk cpu0 R X20 000000000004D078 +24223 clk cpu0 IT (24187) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24223 clk cpu0 MW1 13000000:000013000000_NS 3e +24224 clk cpu0 IT (24188) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24224 clk cpu0 MR1 0004d078:00001004d078_NS 50 +24224 clk cpu0 R X8 0000000000000050 +24225 clk cpu0 IT (24189) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24225 clk cpu0 R cpsr 200003c0 +24226 clk cpu0 IS (24190) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24227 clk cpu0 IS (24191) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24228 clk cpu0 IT (24192) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24228 clk cpu0 R cpsr 400003c0 +24229 clk cpu0 IS (24193) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24230 clk cpu0 IT (24194) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +24230 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +24230 clk cpu0 R X8 0000000000000000 +24231 clk cpu0 IT (24195) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +24231 clk cpu0 MR8 0004d078:00001004d078_NS 000a6425_203a5050 +24231 clk cpu0 R X0 000A6425203A5050 +24232 clk cpu0 IT (24196) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +24232 clk cpu0 R cpsr 800003c0 +24233 clk cpu0 IT (24197) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +24234 clk cpu0 IT (24198) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +24234 clk cpu0 R X27 0000000000000000 +24235 clk cpu0 IT (24199) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +24235 clk cpu0 R X28 000000000004D078 +24236 clk cpu0 IT (24200) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +24236 clk cpu0 R X8 00000000FFFFFFF8 +24237 clk cpu0 IT (24201) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24237 clk cpu0 R cpsr 000003c0 +24237 clk cpu0 R X9 0000000000000050 +24238 clk cpu0 IS (24202) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24239 clk cpu0 IT (24203) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24239 clk cpu0 R cpsr 200003c0 +24240 clk cpu0 IS (24204) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24241 clk cpu0 IT (24205) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24241 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24241 clk cpu0 R X9 0000000013000000 +24242 clk cpu0 IT (24206) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +24242 clk cpu0 R cpsr 800003c0 +24242 clk cpu0 R X8 00000000FFFFFFF9 +24243 clk cpu0 IT (24207) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +24243 clk cpu0 MW1 13000000:000013000000_NS 50 +24244 clk cpu0 IT (24208) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +24244 clk cpu0 R X0 00000A6425203A50 +24245 clk cpu0 IT (24209) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +24246 clk cpu0 IT (24210) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24246 clk cpu0 R cpsr 000003c0 +24246 clk cpu0 R X9 0000000000000050 +24247 clk cpu0 IS (24211) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24248 clk cpu0 IT (24212) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24248 clk cpu0 R cpsr 200003c0 +24249 clk cpu0 IS (24213) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24250 clk cpu0 IT (24214) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24250 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24250 clk cpu0 R X9 0000000013000000 +24251 clk cpu0 IT (24215) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +24251 clk cpu0 R cpsr 800003c0 +24251 clk cpu0 R X8 00000000FFFFFFFA +24252 clk cpu0 IT (24216) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +24252 clk cpu0 MW1 13000000:000013000000_NS 50 +24253 clk cpu0 IT (24217) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +24253 clk cpu0 R X0 0000000A6425203A +24254 clk cpu0 IT (24218) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +24255 clk cpu0 IT (24219) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24255 clk cpu0 R cpsr 000003c0 +24255 clk cpu0 R X9 000000000000003A +24256 clk cpu0 IS (24220) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24257 clk cpu0 IT (24221) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24257 clk cpu0 R cpsr 200003c0 +24258 clk cpu0 IS (24222) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24259 clk cpu0 IT (24223) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24259 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24259 clk cpu0 R X9 0000000013000000 +24260 clk cpu0 IT (24224) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +24260 clk cpu0 R cpsr 800003c0 +24260 clk cpu0 R X8 00000000FFFFFFFB +24261 clk cpu0 IT (24225) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +24261 clk cpu0 MW1 13000000:000013000000_NS 3a +24262 clk cpu0 IT (24226) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +24262 clk cpu0 R X0 000000000A642520 +24263 clk cpu0 IT (24227) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +24264 clk cpu0 IT (24228) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24264 clk cpu0 R cpsr 000003c0 +24264 clk cpu0 R X9 0000000000000020 +24265 clk cpu0 IS (24229) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24266 clk cpu0 IT (24230) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24266 clk cpu0 R cpsr 800003c0 +24267 clk cpu0 IS (24231) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24268 clk cpu0 IT (24232) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24268 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24268 clk cpu0 R X9 0000000013000000 +24269 clk cpu0 IT (24233) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +24269 clk cpu0 R cpsr 800003c0 +24269 clk cpu0 R X8 00000000FFFFFFFC +24270 clk cpu0 IT (24234) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +24270 clk cpu0 MW1 13000000:000013000000_NS 20 +24271 clk cpu0 IT (24235) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +24271 clk cpu0 R X0 00000000000A6425 +24272 clk cpu0 IT (24236) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +24273 clk cpu0 IT (24237) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24273 clk cpu0 R cpsr 000003c0 +24273 clk cpu0 R X9 0000000000000025 +24274 clk cpu0 IS (24238) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24275 clk cpu0 IT (24239) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24275 clk cpu0 R cpsr 600003c0 +24276 clk cpu0 IT (24240) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24277 clk cpu0 IT (24241) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +24277 clk cpu0 R X8 00000000FFFFFFFC +24278 clk cpu0 IT (24242) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +24278 clk cpu0 R X9 0000000000000003 +24279 clk cpu0 IT (24243) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +24279 clk cpu0 R X9 000000000004D07B +24280 clk cpu0 IT (24244) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +24280 clk cpu0 R cpsr 200003c0 +24281 clk cpu0 IT (24245) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +24281 clk cpu0 R X27 000000000004D07B +24282 clk cpu0 IT (24246) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +24282 clk cpu0 R X20 000000000004D07C +24283 clk cpu0 IT (24247) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +24284 clk cpu0 IT (24248) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24284 clk cpu0 MR1 0004d07c:00001004d07c_NS 25 +24284 clk cpu0 R X8 0000000000000025 +24285 clk cpu0 IT (24249) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24285 clk cpu0 R cpsr 600003c0 +24286 clk cpu0 IT (24250) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24287 clk cpu0 IT (24251) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +24287 clk cpu0 MW4 03029734:000000829734_NS 00000000 +24288 clk cpu0 IT (24252) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +24288 clk cpu0 R X27 000000000004D07C +24289 clk cpu0 IT (24253) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +24289 clk cpu0 MR1 0004d07d:00001004d07d_NS 64 +24289 clk cpu0 R X27 000000000004D07D +24289 clk cpu0 R X28 0000000000000064 +24290 clk cpu0 IT (24254) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +24290 clk cpu0 R cpsr 200003c0 +24291 clk cpu0 IS (24255) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +24292 clk cpu0 IT (24256) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +24293 clk cpu0 IT (24257) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +24293 clk cpu0 R X8 000000000000000C +24294 clk cpu0 IT (24258) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +24294 clk cpu0 R cpsr 800003c0 +24295 clk cpu0 IS (24259) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +24296 clk cpu0 IT (24260) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +24296 clk cpu0 R X9 0000000000092CE0 +24297 clk cpu0 IT (24261) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +24297 clk cpu0 MR1 0004c114:00001004c114_NS 0e +24297 clk cpu0 R X10 000000000000000E +24298 clk cpu0 IT (24262) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +24298 clk cpu0 R X9 0000000000092D18 +24299 clk cpu0 IT (24263) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +24299 clk cpu0 R cpsr 800007c0 +24300 clk cpu0 IT (24264) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +24300 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +24300 clk cpu0 R cpsr 800003c0 +24300 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +24301 clk cpu0 IS (24265) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +24302 clk cpu0 IT (24266) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +24302 clk cpu0 R X9 00000000FFFFFFD8 +24303 clk cpu0 IT (24267) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +24303 clk cpu0 R cpsr a00003c0 +24304 clk cpu0 IT (24268) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +24304 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +24305 clk cpu0 IT (24269) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +24306 clk cpu0 IT (24270) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +24306 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +24306 clk cpu0 R X9 0000000003045830 +24307 clk cpu0 IT (24271) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +24307 clk cpu0 R X8 0000000003045800 +24308 clk cpu0 IT (24272) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +24309 clk cpu0 IT (24273) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +24309 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000002 +24309 clk cpu0 R X0 0000000000000002 +24310 clk cpu0 IT (24274) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +24310 clk cpu0 R X1 000000000000000A +24311 clk cpu0 IT (24275) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +24311 clk cpu0 R X30 0000000000092D48 +24312 clk cpu0 IT (24276) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +24312 clk cpu0 R SP_EL0 0000000003045740 +24313 clk cpu0 IT (24277) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +24313 clk cpu0 R X8 3030303030303030 +24314 clk cpu0 IT (24278) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +24314 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +24314 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +24315 clk cpu0 IT (24279) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +24315 clk cpu0 MW4 03045758:000000845758_NS 30303030 +24316 clk cpu0 IS (24280) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +24316 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b5 INVAL 0x000010015680 +24316 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00b5 ALLOC 0x000010095680_NS +24317 clk cpu0 IT (24281) 00095680:000010095680_NS aa1f03eb O EL0t_n : MOV x11,xzr +24317 clk cpu0 R X11 0000000000000000 +24318 clk cpu0 IT (24282) 00095684:000010095684_NS 2a0103e8 O EL0t_n : MOV w8,w1 +24318 clk cpu0 R X8 000000000000000A +24319 clk cpu0 IT (24283) 00095688:000010095688_NS 1103dc29 O EL0t_n : ADD w9,w1,#0xf7 +24319 clk cpu0 R X9 0000000000000101 +24320 clk cpu0 IT (24284) 0009568c:00001009568c_NS 910023ea O EL0t_n : ADD x10,sp,#8 +24320 clk cpu0 R X10 0000000003045748 +24321 clk cpu0 IT (24285) 00095690:000010095690_NS 9ac8080c O EL0t_n : UDIV x12,x0,x8 +24321 clk cpu0 R X12 0000000000000000 +24322 clk cpu0 IT (24286) 00095694:000010095694_NS 1b08818d O EL0t_n : MSUB w13,w12,w8,w0 +24322 clk cpu0 R X13 0000000000000002 +24323 clk cpu0 IT (24287) 00095698:000010095698_NS 710025bf O EL0t_n : CMP w13,#9 +24323 clk cpu0 R cpsr 800003c0 +24324 clk cpu0 IT (24288) 0009569c:00001009569c_NS 1a9f812e O EL0t_n : CSEL w14,w9,wzr,HI +24324 clk cpu0 R X14 0000000000000000 +24325 clk cpu0 IT (24289) 000956a0:0000100956a0_NS 0b0d01cd O EL0t_n : ADD w13,w14,w13 +24325 clk cpu0 R X13 0000000000000002 +24326 clk cpu0 IT (24290) 000956a4:0000100956a4_NS 1100c1ad O EL0t_n : ADD w13,w13,#0x30 +24326 clk cpu0 R X13 0000000000000032 +24327 clk cpu0 IT (24291) 000956a8:0000100956a8_NS eb08001f O EL0t_n : CMP x0,x8 +24327 clk cpu0 R cpsr 800003c0 +24328 clk cpu0 IT (24292) 000956ac:0000100956ac_NS 382b694d O EL0t_n : STRB w13,[x10,x11] +24328 clk cpu0 MW1 03045748:000000845748_NS 32 +24329 clk cpu0 IT (24293) 000956b0:0000100956b0_NS 9100056b O EL0t_n : ADD x11,x11,#1 +24329 clk cpu0 R X11 0000000000000001 +24330 clk cpu0 IT (24294) 000956b4:0000100956b4_NS aa0c03e0 O EL0t_n : MOV x0,x12 +24330 clk cpu0 R X0 0000000000000000 +24331 clk cpu0 IS (24295) 000956b8:0000100956b8_NS 54fffec2 O EL0t_n : B.CS 0x95690 +24332 clk cpu0 IT (24296) 000956bc:0000100956bc_NS 14000002 O EL0t_n : B 0x956c4 +24333 clk cpu0 IT (24297) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +24333 clk cpu0 R X8 0000000003029000 +24334 clk cpu0 IT (24298) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +24334 clk cpu0 MR4 03029734:000000829734_NS 00000000 +24334 clk cpu0 R X8 0000000000000000 +24335 clk cpu0 IT (24299) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +24335 clk cpu0 R cpsr 800003c0 +24336 clk cpu0 IT (24300) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +24336 clk cpu0 R X8 0000000000000001 +24337 clk cpu0 IT (24301) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +24337 clk cpu0 R cpsr 600003c0 +24338 clk cpu0 IS (24302) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +24339 clk cpu0 IT (24303) 000956dc:0000100956dc_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +24339 clk cpu0 R X9 0000000003045748 +24340 clk cpu0 IT (24304) 000956e0:0000100956e0_NS 93407d08 O EL0t_n : SXTW x8,w8 +24340 clk cpu0 R X8 0000000000000001 +24341 clk cpu0 IT (24305) 000956e4:0000100956e4_NS d1000529 O EL0t_n : SUB x9,x9,#1 +24341 clk cpu0 R X9 0000000003045747 +24342 clk cpu0 IT (24306) 000956e8:0000100956e8_NS b0030c0a O EL0t_n : ADRP x10,0x62166e8 +24342 clk cpu0 R X10 0000000006216000 +24343 clk cpu0 IT (24307) 000956ec:0000100956ec_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +24343 clk cpu0 MR1 03045748:000000845748_NS 32 +24343 clk cpu0 R X11 0000000000000032 +24344 clk cpu0 IT (24308) 000956f0:0000100956f0_NS f940714c O EL0t_n : LDR x12,[x10,#0xe0] +24344 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24344 clk cpu0 R X12 0000000013000000 +24345 clk cpu0 IT (24309) 000956f4:0000100956f4_NS d1000508 O EL0t_n : SUB x8,x8,#1 +24345 clk cpu0 R X8 0000000000000000 +24346 clk cpu0 IT (24310) 000956f8:0000100956f8_NS f100011f O EL0t_n : CMP x8,#0 +24346 clk cpu0 R cpsr 600003c0 +24347 clk cpu0 IT (24311) 000956fc:0000100956fc_NS 3900018b O EL0t_n : STRB w11,[x12,#0] +24347 clk cpu0 MW1 13000000:000013000000_NS 32 +24348 clk cpu0 IS (24312) 00095700:000010095700_NS 54ffff6c O EL0t_n : B.GT 0x956ec +24349 clk cpu0 IT (24313) 00095704:000010095704_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +24349 clk cpu0 R SP_EL0 0000000003045760 +24350 clk cpu0 IT (24314) 00095708:000010095708_NS d65f03c0 O EL0t_n : RET +24351 clk cpu0 IT (24315) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +24351 clk cpu0 R X20 000000000004D07E +24352 clk cpu0 IT (24316) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +24353 clk cpu0 IT (24317) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24353 clk cpu0 MR1 0004d07e:00001004d07e_NS 0a +24353 clk cpu0 R X8 000000000000000A +24354 clk cpu0 IT (24318) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24354 clk cpu0 R cpsr 800003c0 +24355 clk cpu0 IS (24319) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24356 clk cpu0 IS (24320) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24357 clk cpu0 IT (24321) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24357 clk cpu0 R cpsr 000003c0 +24358 clk cpu0 IT (24322) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24359 clk cpu0 IT (24323) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24359 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24359 clk cpu0 R X9 0000000013000000 +24360 clk cpu0 IT (24324) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24360 clk cpu0 R X27 000000000004D07E +24361 clk cpu0 IT (24325) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24361 clk cpu0 R X20 000000000004D07F +TUBE CPU0: >>PP: 2 +24362 clk cpu0 IT (24326) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24362 clk cpu0 MW1 13000000:000013000000_NS 0a +24363 clk cpu0 IT (24327) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24363 clk cpu0 MR1 0004d07f:00001004d07f_NS 00 +24363 clk cpu0 R X8 0000000000000000 +24364 clk cpu0 IT (24328) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24364 clk cpu0 R cpsr 800003c0 +24365 clk cpu0 IS (24329) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24366 clk cpu0 IT (24330) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24367 clk cpu0 IT (24331) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +24368 clk cpu0 IT (24332) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +24368 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d076 +24368 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +24368 clk cpu0 R X19 000000000004D076 +24368 clk cpu0 R X30 000000000009C560 +24369 clk cpu0 IT (24333) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +24369 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +24369 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +24369 clk cpu0 R X20 0000000003008528 +24369 clk cpu0 R X21 0000000000000000 +24370 clk cpu0 IT (24334) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +24370 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +24370 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +24370 clk cpu0 R X22 000000000004D076 +24370 clk cpu0 R X23 000000000004D06C +24371 clk cpu0 IT (24335) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +24371 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +24371 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +24371 clk cpu0 R X24 000000000004D080 +24371 clk cpu0 R X25 0000000006216000 +24372 clk cpu0 IT (24336) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +24372 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +24372 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216034 +24372 clk cpu0 R X26 0000000006216034 +24372 clk cpu0 R X27 0001000100010001 +24373 clk cpu0 IT (24337) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +24373 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +24373 clk cpu0 R X28 FF7FFF7FFF7FFF7F +24374 clk cpu0 IT (24338) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +24374 clk cpu0 R SP_EL0 0000000003045800 +24375 clk cpu0 IT (24339) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +24376 clk cpu0 IT (24340) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +24376 clk cpu0 R X0 0000000000000001 +24377 clk cpu0 IT (24341) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +24377 clk cpu0 R X1 0000000000000000 +24378 clk cpu0 IT (24342) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +24378 clk cpu0 R X2 0000000000000000 +24379 clk cpu0 IT (24343) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +24380 clk cpu0 IT (24344) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +24381 clk cpu0 IT (24345) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +24381 clk cpu0 R X0 0000000003008528 +24382 clk cpu0 IT (24346) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +24382 clk cpu0 R X30 000000000009C57C +24383 clk cpu0 IT (24347) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +24384 clk cpu0 IT (24348) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +24384 clk cpu0 R X8 0000000006216000 +24385 clk cpu0 IT (24349) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +24385 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +24385 clk cpu0 R X8 0000000000000001 +24386 clk cpu0 IT (24350) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +24386 clk cpu0 R cpsr 800003c0 +24387 clk cpu0 IT (24351) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +24388 clk cpu0 IT (24352) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +24389 clk cpu0 IT (24353) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +24389 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000000 +24389 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b49c +24389 clk cpu0 R X19 0000000000000000 +24389 clk cpu0 R X30 000000000009B49C +24390 clk cpu0 IT (24354) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +24390 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +24390 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +24390 clk cpu0 R X20 000000000004D0CC +24390 clk cpu0 R X21 000000000004CF91 +24391 clk cpu0 IT (24355) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +24391 clk cpu0 R SP_EL0 0000000003045890 +24392 clk cpu0 IT (24356) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +24393 clk cpu0 IT (24357) 0009b49c:00001009b49c_NS b9400342 O EL0t_n : LDR w2,[x26,#0] +24393 clk cpu0 MR4 06216034:000015216034_NS 00000000 +24393 clk cpu0 R X2 0000000000000000 +24394 clk cpu0 IT (24358) 0009b4a0:00001009b4a0_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +24394 clk cpu0 R X0 0000000000000000 +24395 clk cpu0 IT (24359) 0009b4a4:00001009b4a4_NS aa1703e1 O EL0t_n : MOV x1,x23 +24395 clk cpu0 R X1 000000000004D06C +24396 clk cpu0 IT (24360) 0009b4a8:00001009b4a8_NS 94000409 O EL0t_n : BL 0x9c4cc +24396 clk cpu0 R X30 000000000009B4AC +24397 clk cpu0 IT (24361) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +24397 clk cpu0 R SP_EL0 0000000003045800 +24398 clk cpu0 IT (24362) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +24398 clk cpu0 R X8 0000000006216000 +24399 clk cpu0 IT (24363) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +24399 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +24399 clk cpu0 R X8 0000000000000003 +24400 clk cpu0 IT (24364) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +24400 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +24400 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +24401 clk cpu0 IT (24365) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +24401 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000000 +24401 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b4ac +24402 clk cpu0 IT (24366) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +24402 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +24402 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +24403 clk cpu0 IT (24367) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +24403 clk cpu0 R cpsr 200003c0 +24404 clk cpu0 IT (24368) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +24404 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +24404 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +24405 clk cpu0 IT (24369) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +24405 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +24405 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +24406 clk cpu0 IT (24370) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +24406 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +24406 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +24407 clk cpu0 IT (24371) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +24407 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +24407 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +24408 clk cpu0 IS (24372) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +24409 clk cpu0 IT (24373) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +24409 clk cpu0 R X20 0000000003008000 +24410 clk cpu0 IT (24374) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +24410 clk cpu0 R X20 0000000003008528 +24411 clk cpu0 IT (24375) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +24411 clk cpu0 R X0 0000000003008528 +24412 clk cpu0 IT (24376) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +24412 clk cpu0 R X19 000000000004D06C +24413 clk cpu0 IT (24377) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +24413 clk cpu0 R X30 000000000009C510 +24414 clk cpu0 IT (24378) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +24414 clk cpu0 R X8 0000000006216000 +24415 clk cpu0 IT (24379) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +24415 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +24415 clk cpu0 R X8 0000000000000001 +24416 clk cpu0 IT (24380) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +24416 clk cpu0 R cpsr 800003c0 +24417 clk cpu0 IT (24381) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +24418 clk cpu0 IT (24382) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +24419 clk cpu0 IT (24383) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +24419 clk cpu0 R X9 0000000003045800 +24420 clk cpu0 IT (24384) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +24420 clk cpu0 R X8 00000000FFFFFFD0 +24421 clk cpu0 IT (24385) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +24421 clk cpu0 R X10 0000000003045890 +24422 clk cpu0 IT (24386) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +24422 clk cpu0 R X9 0000000003045830 +24423 clk cpu0 IT (24387) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +24423 clk cpu0 R X0 0000000000000000 +24424 clk cpu0 IT (24388) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +24424 clk cpu0 R X1 0000000000000000 +24425 clk cpu0 IT (24389) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +24425 clk cpu0 R X2 0000000000000000 +24426 clk cpu0 IT (24390) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +24426 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +24427 clk cpu0 IT (24391) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +24427 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +24427 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +24428 clk cpu0 IT (24392) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +24429 clk cpu0 IT (24393) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +24429 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +24429 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +24429 clk cpu0 R X8 0000000000000000 +24429 clk cpu0 R X10 0000000003045830 +24430 clk cpu0 IT (24394) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +24430 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +24430 clk cpu0 R X9 0000000003045890 +24431 clk cpu0 IT (24395) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +24431 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +24431 clk cpu0 R X11 00000000FFFFFFD0 +24432 clk cpu0 IT (24396) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +24432 clk cpu0 R X21 0000000000000000 +24433 clk cpu0 IT (24397) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +24433 clk cpu0 R X1 0000000003045830 +24434 clk cpu0 IT (24398) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +24434 clk cpu0 R X0 000000000004D06C +24435 clk cpu0 IT (24399) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +24435 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +24435 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +24436 clk cpu0 IT (24400) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +24436 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +24437 clk cpu0 IT (24401) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +24437 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +24438 clk cpu0 IT (24402) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +24438 clk cpu0 R X30 000000000009C560 +24439 clk cpu0 IT (24403) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +24439 clk cpu0 R SP_EL0 0000000003045760 +24440 clk cpu0 IT (24404) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +24440 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d06c +24440 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +24441 clk cpu0 IT (24405) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +24441 clk cpu0 R X19 0000000003045830 +24442 clk cpu0 IT (24406) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +24442 clk cpu0 R X1 000000000004C000 +24443 clk cpu0 IT (24407) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +24443 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +24443 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +24444 clk cpu0 IT (24408) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +24444 clk cpu0 R X20 000000000004D06C +24445 clk cpu0 IT (24409) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +24445 clk cpu0 R X1 000000000004C00B +24446 clk cpu0 IT (24410) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +24446 clk cpu0 R X0 0000000003045764 +24447 clk cpu0 IT (24411) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +24447 clk cpu0 R X2 000000000000003B +24448 clk cpu0 IT (24412) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +24448 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +24449 clk cpu0 IT (24413) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +24449 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +24449 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216034 +24450 clk cpu0 IT (24414) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +24450 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +24450 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +24451 clk cpu0 IT (24415) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +24451 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +24451 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +24452 clk cpu0 IT (24416) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +24452 clk cpu0 R X30 0000000000092B80 +24453 clk cpu0 IT (24417) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +24453 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +24453 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +24453 clk cpu0 R SP_EL0 0000000003045750 +24454 clk cpu0 IT (24418) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +24454 clk cpu0 R X19 0000000003045764 +24455 clk cpu0 IT (24419) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +24455 clk cpu0 R X30 00000000000104DC +24456 clk cpu0 IT (24420) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +24456 clk cpu0 R cpsr 200003c0 +24457 clk cpu0 IS (24421) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +24458 clk cpu0 IT (24422) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +24458 clk cpu0 R cpsr 400003c0 +24459 clk cpu0 IT (24423) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +24460 clk cpu0 IT (24424) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +24460 clk cpu0 R cpsr 000003c0 +24460 clk cpu0 R X10 0000000000000003 +24461 clk cpu0 IS (24425) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +24462 clk cpu0 IT (24426) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +24462 clk cpu0 R X9 0000000000000020 +24463 clk cpu0 IT (24427) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +24463 clk cpu0 R X8 000000000004C008 +24464 clk cpu0 IT (24428) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +24464 clk cpu0 R cpsr 200003c0 +24465 clk cpu0 IT (24429) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +24465 clk cpu0 R X9 0000000000000008 +24466 clk cpu0 IS (24430) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +24467 clk cpu0 IT (24431) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +24467 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +24467 clk cpu0 R X12 000000000A00000A +24468 clk cpu0 IT (24432) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +24468 clk cpu0 R X10 0000000000000018 +24469 clk cpu0 IT (24433) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +24469 clk cpu0 R X11 000000000000003B +24470 clk cpu0 IT (24434) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24470 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +24470 clk cpu0 R X8 000000000004C00C +24470 clk cpu0 R X13 000000006F727245 +24471 clk cpu0 IT (24435) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24471 clk cpu0 R X12 000000000000000A +24472 clk cpu0 IT (24436) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24472 clk cpu0 R X11 0000000000000037 +24473 clk cpu0 IT (24437) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24473 clk cpu0 R cpsr 200003c0 +24474 clk cpu0 IT (24438) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24474 clk cpu0 R X14 0000000072724500 +24475 clk cpu0 IT (24439) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24475 clk cpu0 R X12 000000007272450A +24476 clk cpu0 IT (24440) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24476 clk cpu0 MW4 03045764:000000845764_NS 7272450a +24476 clk cpu0 R X0 0000000003045768 +24477 clk cpu0 IT (24441) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24477 clk cpu0 R X12 000000006F727245 +24478 clk cpu0 IT (24442) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24479 clk cpu0 IT (24443) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24479 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +24479 clk cpu0 R X8 000000000004C010 +24479 clk cpu0 R X13 0000000049203A72 +24480 clk cpu0 IT (24444) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24480 clk cpu0 R X12 000000000000006F +24481 clk cpu0 IT (24445) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24481 clk cpu0 R X11 0000000000000033 +24482 clk cpu0 IT (24446) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24482 clk cpu0 R cpsr 200003c0 +24483 clk cpu0 IT (24447) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24483 clk cpu0 R X14 00000000203A7200 +24484 clk cpu0 IT (24448) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24484 clk cpu0 R X12 00000000203A726F +24485 clk cpu0 IT (24449) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24485 clk cpu0 MW4 03045768:000000845768_NS 203a726f +24485 clk cpu0 R X0 000000000304576C +24486 clk cpu0 IT (24450) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24486 clk cpu0 R X12 0000000049203A72 +24487 clk cpu0 IT (24451) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24488 clk cpu0 IT (24452) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24488 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +24488 clk cpu0 R X8 000000000004C014 +24488 clk cpu0 R X13 0000000067656C6C +24489 clk cpu0 IT (24453) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24489 clk cpu0 R X12 0000000000000049 +24490 clk cpu0 IT (24454) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24490 clk cpu0 R X11 000000000000002F +24491 clk cpu0 IT (24455) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24491 clk cpu0 R cpsr 200003c0 +24492 clk cpu0 IT (24456) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24492 clk cpu0 R X14 00000000656C6C00 +24493 clk cpu0 IT (24457) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24493 clk cpu0 R X12 00000000656C6C49 +24494 clk cpu0 IT (24458) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24494 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +24494 clk cpu0 R X0 0000000003045770 +24495 clk cpu0 IT (24459) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24495 clk cpu0 R X12 0000000067656C6C +24496 clk cpu0 IT (24460) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24497 clk cpu0 IT (24461) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24497 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +24497 clk cpu0 R X8 000000000004C018 +24497 clk cpu0 R X13 0000000066206C61 +24498 clk cpu0 IT (24462) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24498 clk cpu0 R X12 0000000000000067 +24499 clk cpu0 IT (24463) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24499 clk cpu0 R X11 000000000000002B +24500 clk cpu0 IT (24464) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24500 clk cpu0 R cpsr 200003c0 +24501 clk cpu0 IT (24465) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24501 clk cpu0 R X14 00000000206C6100 +24502 clk cpu0 IT (24466) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24502 clk cpu0 R X12 00000000206C6167 +24503 clk cpu0 IT (24467) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24503 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +24503 clk cpu0 R X0 0000000003045774 +24504 clk cpu0 IT (24468) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24504 clk cpu0 R X12 0000000066206C61 +24505 clk cpu0 IT (24469) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24506 clk cpu0 IT (24470) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24506 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +24506 clk cpu0 R X8 000000000004C01C +24506 clk cpu0 R X13 00000000616D726F +24507 clk cpu0 IT (24471) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24507 clk cpu0 R X12 0000000000000066 +24508 clk cpu0 IT (24472) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24508 clk cpu0 R X11 0000000000000027 +24509 clk cpu0 IT (24473) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24509 clk cpu0 R cpsr 200003c0 +24510 clk cpu0 IT (24474) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24510 clk cpu0 R X14 000000006D726F00 +24511 clk cpu0 IT (24475) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24511 clk cpu0 R X12 000000006D726F66 +24512 clk cpu0 IT (24476) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24512 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +24512 clk cpu0 R X0 0000000003045778 +24513 clk cpu0 IT (24477) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24513 clk cpu0 R X12 00000000616D726F +24514 clk cpu0 IT (24478) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24515 clk cpu0 IT (24479) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24515 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +24515 clk cpu0 R X8 000000000004C020 +24515 clk cpu0 R X13 0000000070732074 +24516 clk cpu0 IT (24480) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24516 clk cpu0 R X12 0000000000000061 +24517 clk cpu0 IT (24481) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24517 clk cpu0 R X11 0000000000000023 +24518 clk cpu0 IT (24482) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24518 clk cpu0 R cpsr 200003c0 +24519 clk cpu0 IT (24483) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24519 clk cpu0 R X14 0000000073207400 +24520 clk cpu0 IT (24484) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24520 clk cpu0 R X12 0000000073207461 +24521 clk cpu0 IT (24485) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24521 clk cpu0 MW4 03045778:000000845778_NS 73207461 +24521 clk cpu0 R X0 000000000304577C +24522 clk cpu0 IT (24486) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24522 clk cpu0 R X12 0000000070732074 +24523 clk cpu0 IT (24487) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24524 clk cpu0 IT (24488) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24524 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +24524 clk cpu0 R X8 000000000004C024 +24524 clk cpu0 R X13 0000000066696365 +24525 clk cpu0 IT (24489) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24525 clk cpu0 R X12 0000000000000070 +24526 clk cpu0 IT (24490) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24526 clk cpu0 R X11 000000000000001F +24527 clk cpu0 IT (24491) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24527 clk cpu0 R cpsr 200003c0 +24528 clk cpu0 IT (24492) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24528 clk cpu0 R X14 0000000069636500 +24529 clk cpu0 IT (24493) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24529 clk cpu0 R X12 0000000069636570 +24530 clk cpu0 IT (24494) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24530 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +24530 clk cpu0 R X0 0000000003045780 +24531 clk cpu0 IT (24495) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24531 clk cpu0 R X12 0000000066696365 +24532 clk cpu0 IT (24496) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24533 clk cpu0 IT (24497) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24533 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +24533 clk cpu0 R X8 000000000004C028 +24533 clk cpu0 R X13 0000000020726569 +24534 clk cpu0 IT (24498) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24534 clk cpu0 R X12 0000000000000066 +24535 clk cpu0 IT (24499) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24535 clk cpu0 R X11 000000000000001B +24536 clk cpu0 IT (24500) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24536 clk cpu0 R cpsr 200003c0 +24537 clk cpu0 IT (24501) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24537 clk cpu0 R X14 0000000072656900 +24538 clk cpu0 IT (24502) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24538 clk cpu0 R X12 0000000072656966 +24539 clk cpu0 IT (24503) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24539 clk cpu0 MW4 03045780:000000845780_NS 72656966 +24539 clk cpu0 R X0 0000000003045784 +24540 clk cpu0 IT (24504) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24540 clk cpu0 R X12 0000000020726569 +24541 clk cpu0 IT (24505) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24542 clk cpu0 IT (24506) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24542 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +24542 clk cpu0 R X8 000000000004C02C +24542 clk cpu0 R X13 0000000064657375 +24543 clk cpu0 IT (24507) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24543 clk cpu0 R X12 0000000000000020 +24544 clk cpu0 IT (24508) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24544 clk cpu0 R X11 0000000000000017 +24545 clk cpu0 IT (24509) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24545 clk cpu0 R cpsr 200003c0 +24546 clk cpu0 IT (24510) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24546 clk cpu0 R X14 0000000065737500 +24547 clk cpu0 IT (24511) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24547 clk cpu0 R X12 0000000065737520 +24548 clk cpu0 IT (24512) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24548 clk cpu0 MW4 03045784:000000845784_NS 65737520 +24548 clk cpu0 R X0 0000000003045788 +24549 clk cpu0 IT (24513) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24549 clk cpu0 R X12 0000000064657375 +24550 clk cpu0 IT (24514) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24551 clk cpu0 IT (24515) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24551 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +24551 clk cpu0 R X8 000000000004C030 +24551 clk cpu0 R X13 000000005F27203A +24552 clk cpu0 IT (24516) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24552 clk cpu0 R X12 0000000000000064 +24553 clk cpu0 IT (24517) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24553 clk cpu0 R X11 0000000000000013 +24554 clk cpu0 IT (24518) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24554 clk cpu0 R cpsr 200003c0 +24555 clk cpu0 IT (24519) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24555 clk cpu0 R X14 0000000027203A00 +24556 clk cpu0 IT (24520) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24556 clk cpu0 R X12 0000000027203A64 +24557 clk cpu0 IT (24521) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24557 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +24557 clk cpu0 R X0 000000000304578C +24558 clk cpu0 IT (24522) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24558 clk cpu0 R X12 000000005F27203A +24559 clk cpu0 IT (24523) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24560 clk cpu0 IT (24524) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24560 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +24560 clk cpu0 R X8 000000000004C034 +24560 clk cpu0 R X13 0000000045202E27 +24561 clk cpu0 IT (24525) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24561 clk cpu0 R X12 000000000000005F +24562 clk cpu0 IT (24526) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24562 clk cpu0 R X11 000000000000000F +24563 clk cpu0 IT (24527) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24563 clk cpu0 R cpsr 200003c0 +24564 clk cpu0 IT (24528) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24564 clk cpu0 R X14 00000000202E2700 +24565 clk cpu0 IT (24529) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24565 clk cpu0 R X12 00000000202E275F +24566 clk cpu0 IT (24530) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24566 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +24566 clk cpu0 R X0 0000000003045790 +24567 clk cpu0 IT (24531) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24567 clk cpu0 R X12 0000000045202E27 +24568 clk cpu0 IT (24532) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24569 clk cpu0 IT (24533) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24569 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +24569 clk cpu0 R X8 000000000004C038 +24569 clk cpu0 R X13 000000006E69646E +24570 clk cpu0 IT (24534) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24570 clk cpu0 R X12 0000000000000045 +24571 clk cpu0 IT (24535) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24571 clk cpu0 R X11 000000000000000B +24572 clk cpu0 IT (24536) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24572 clk cpu0 R cpsr 200003c0 +24573 clk cpu0 IT (24537) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24573 clk cpu0 R X14 0000000069646E00 +24574 clk cpu0 IT (24538) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24574 clk cpu0 R X12 0000000069646E45 +24575 clk cpu0 IT (24539) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24575 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +24575 clk cpu0 R X0 0000000003045794 +24576 clk cpu0 IT (24540) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24576 clk cpu0 R X12 000000006E69646E +24577 clk cpu0 IT (24541) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24578 clk cpu0 IT (24542) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24578 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +24578 clk cpu0 R X8 000000000004C03C +24578 clk cpu0 R X13 0000000065542067 +24579 clk cpu0 IT (24543) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24579 clk cpu0 R X12 000000000000006E +24580 clk cpu0 IT (24544) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24580 clk cpu0 R X11 0000000000000007 +24581 clk cpu0 IT (24545) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24581 clk cpu0 R cpsr 200003c0 +24582 clk cpu0 IT (24546) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24582 clk cpu0 R X14 0000000054206700 +24583 clk cpu0 IT (24547) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24583 clk cpu0 R X12 000000005420676E +24584 clk cpu0 IT (24548) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24584 clk cpu0 MW4 03045794:000000845794_NS 5420676e +24584 clk cpu0 R X0 0000000003045798 +24585 clk cpu0 IT (24549) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24585 clk cpu0 R X12 0000000065542067 +24586 clk cpu0 IT (24550) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24587 clk cpu0 IT (24551) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24587 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +24587 clk cpu0 R X8 000000000004C040 +24587 clk cpu0 R X13 000000000A2E7473 +24588 clk cpu0 IT (24552) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24588 clk cpu0 R X12 0000000000000065 +24589 clk cpu0 IT (24553) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24589 clk cpu0 R X11 0000000000000003 +24590 clk cpu0 IT (24554) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24590 clk cpu0 R cpsr 600003c0 +24591 clk cpu0 IT (24555) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24591 clk cpu0 R X14 000000002E747300 +24592 clk cpu0 IT (24556) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24592 clk cpu0 R X12 000000002E747365 +24593 clk cpu0 IT (24557) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24593 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +24593 clk cpu0 R X0 000000000304579C +24594 clk cpu0 IT (24558) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24594 clk cpu0 R X12 000000000A2E7473 +24595 clk cpu0 IS (24559) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24596 clk cpu0 IT (24560) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +24596 clk cpu0 R X2 0000000000000003 +24597 clk cpu0 IT (24561) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +24597 clk cpu0 R X9 0000000000000001 +24598 clk cpu0 IT (24562) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +24598 clk cpu0 R X8 000000000004C03F +24599 clk cpu0 IT (24563) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +24599 clk cpu0 R X1 000000000004C043 +24600 clk cpu0 IT (24564) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +24600 clk cpu0 R cpsr 200003c0 +24601 clk cpu0 IS (24565) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +24602 clk cpu0 IT (24566) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +24602 clk cpu0 MR1 0004c043:00001004c043_NS 0a +24602 clk cpu0 R X8 000000000000000A +24603 clk cpu0 IT (24567) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +24603 clk cpu0 MW1 0304579c:00000084579c_NS 0a +24604 clk cpu0 IS (24568) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +24605 clk cpu0 IT (24569) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +24605 clk cpu0 MR1 0004c044:00001004c044_NS 00 +24605 clk cpu0 R X8 0000000000000000 +24606 clk cpu0 IT (24570) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +24606 clk cpu0 R cpsr 600003c0 +24607 clk cpu0 IT (24571) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +24607 clk cpu0 MW1 0304579d:00000084579d_NS 00 +24608 clk cpu0 IS (24572) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +24609 clk cpu0 IT (24573) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +24609 clk cpu0 MR1 0004c045:00001004c045_NS 00 +24609 clk cpu0 R X8 0000000000000000 +24610 clk cpu0 IT (24574) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +24610 clk cpu0 MW1 0304579e:00000084579e_NS 00 +24611 clk cpu0 IT (24575) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +24612 clk cpu0 IT (24576) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +24612 clk cpu0 R X0 0000000003045764 +24613 clk cpu0 IT (24577) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +24613 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +24613 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +24613 clk cpu0 R SP_EL0 0000000003045760 +24613 clk cpu0 R X19 0000000003045830 +24613 clk cpu0 R X30 0000000000092B80 +24614 clk cpu0 IT (24578) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +24615 clk cpu0 IT (24579) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +24615 clk cpu0 R X22 000000000004C000 +24616 clk cpu0 IT (24580) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +24616 clk cpu0 R X23 000000000004C000 +24617 clk cpu0 IT (24581) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +24617 clk cpu0 R X26 0000000000000000 +24618 clk cpu0 IT (24582) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +24618 clk cpu0 R X21 0000000003029000 +24619 clk cpu0 IT (24583) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +24619 clk cpu0 R X22 000000000004C108 +24620 clk cpu0 IT (24584) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +24620 clk cpu0 R X23 000000000004C129 +24621 clk cpu0 IT (24585) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +24621 clk cpu0 R X24 0000000003041000 +24622 clk cpu0 IT (24586) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +24622 clk cpu0 R X25 0000000006216000 +24623 clk cpu0 IT (24587) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +24624 clk cpu0 IT (24588) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24624 clk cpu0 MR1 0004d06c:00001004d06c_NS 3e +24624 clk cpu0 R X8 000000000000003E +24625 clk cpu0 IT (24589) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24625 clk cpu0 R cpsr 200003c0 +24626 clk cpu0 IS (24590) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24627 clk cpu0 IS (24591) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24628 clk cpu0 IT (24592) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24628 clk cpu0 R cpsr 000003c0 +24629 clk cpu0 IT (24593) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24630 clk cpu0 IT (24594) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24630 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24630 clk cpu0 R X9 0000000013000000 +24631 clk cpu0 IT (24595) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24631 clk cpu0 R X27 000000000004D06C +24632 clk cpu0 IT (24596) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24632 clk cpu0 R X20 000000000004D06D +24633 clk cpu0 IT (24597) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24633 clk cpu0 MW1 13000000:000013000000_NS 3e +24634 clk cpu0 IT (24598) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24634 clk cpu0 MR1 0004d06d:00001004d06d_NS 3e +24634 clk cpu0 R X8 000000000000003E +24635 clk cpu0 IT (24599) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24635 clk cpu0 R cpsr 200003c0 +24636 clk cpu0 IS (24600) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24637 clk cpu0 IS (24601) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24638 clk cpu0 IT (24602) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24638 clk cpu0 R cpsr 000003c0 +24639 clk cpu0 IT (24603) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24640 clk cpu0 IT (24604) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24640 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24640 clk cpu0 R X9 0000000013000000 +24641 clk cpu0 IT (24605) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24641 clk cpu0 R X27 000000000004D06D +24642 clk cpu0 IT (24606) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24642 clk cpu0 R X20 000000000004D06E +24643 clk cpu0 IT (24607) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24643 clk cpu0 MW1 13000000:000013000000_NS 3e +24644 clk cpu0 IT (24608) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24644 clk cpu0 MR1 0004d06e:00001004d06e_NS 50 +24644 clk cpu0 R X8 0000000000000050 +24645 clk cpu0 IT (24609) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24645 clk cpu0 R cpsr 200003c0 +24646 clk cpu0 IS (24610) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24647 clk cpu0 IS (24611) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24648 clk cpu0 IT (24612) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24648 clk cpu0 R cpsr 000003c0 +24649 clk cpu0 IT (24613) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24650 clk cpu0 IT (24614) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24650 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24650 clk cpu0 R X9 0000000013000000 +24651 clk cpu0 IT (24615) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24651 clk cpu0 R X27 000000000004D06E +24652 clk cpu0 IT (24616) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24652 clk cpu0 R X20 000000000004D06F +24653 clk cpu0 IT (24617) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24653 clk cpu0 MW1 13000000:000013000000_NS 50 +24654 clk cpu0 IT (24618) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24654 clk cpu0 MR1 0004d06f:00001004d06f_NS 46 +24654 clk cpu0 R X8 0000000000000046 +24655 clk cpu0 IT (24619) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24655 clk cpu0 R cpsr 200003c0 +24656 clk cpu0 IS (24620) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24657 clk cpu0 IS (24621) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24658 clk cpu0 IT (24622) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24658 clk cpu0 R cpsr 000003c0 +24659 clk cpu0 IT (24623) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24660 clk cpu0 IT (24624) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24660 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24660 clk cpu0 R X9 0000000013000000 +24661 clk cpu0 IT (24625) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24661 clk cpu0 R X27 000000000004D06F +24662 clk cpu0 IT (24626) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24662 clk cpu0 R X20 000000000004D070 +24663 clk cpu0 IT (24627) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24663 clk cpu0 MW1 13000000:000013000000_NS 46 +24664 clk cpu0 IT (24628) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24664 clk cpu0 MR1 0004d070:00001004d070_NS 3a +24664 clk cpu0 R X8 000000000000003A +24665 clk cpu0 IT (24629) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24665 clk cpu0 R cpsr 200003c0 +24666 clk cpu0 IS (24630) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24667 clk cpu0 IS (24631) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24668 clk cpu0 IT (24632) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24668 clk cpu0 R cpsr 400003c0 +24669 clk cpu0 IS (24633) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24670 clk cpu0 IT (24634) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +24670 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +24670 clk cpu0 R X8 0000000000000000 +24671 clk cpu0 IT (24635) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +24671 clk cpu0 MR8 0004d070:00001004d070_NS 3e3e000a_6425203a +24671 clk cpu0 R X0 3E3E000A6425203A +24672 clk cpu0 IT (24636) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +24672 clk cpu0 R cpsr 800003c0 +24673 clk cpu0 IT (24637) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +24674 clk cpu0 IT (24638) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +24674 clk cpu0 R X27 0000000000000000 +24675 clk cpu0 IT (24639) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +24675 clk cpu0 R X28 000000000004D070 +24676 clk cpu0 IT (24640) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +24676 clk cpu0 R X8 00000000FFFFFFF8 +24677 clk cpu0 IT (24641) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24677 clk cpu0 R cpsr 000003c0 +24677 clk cpu0 R X9 000000000000003A +24678 clk cpu0 IS (24642) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24679 clk cpu0 IT (24643) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24679 clk cpu0 R cpsr 200003c0 +24680 clk cpu0 IS (24644) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24681 clk cpu0 IT (24645) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24681 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24681 clk cpu0 R X9 0000000013000000 +24682 clk cpu0 IT (24646) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +24682 clk cpu0 R cpsr 800003c0 +24682 clk cpu0 R X8 00000000FFFFFFF9 +24683 clk cpu0 IT (24647) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +24683 clk cpu0 MW1 13000000:000013000000_NS 3a +24684 clk cpu0 IT (24648) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +24684 clk cpu0 R X0 003E3E000A642520 +24685 clk cpu0 IT (24649) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +24686 clk cpu0 IT (24650) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24686 clk cpu0 R cpsr 000003c0 +24686 clk cpu0 R X9 0000000000000020 +24687 clk cpu0 IS (24651) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24688 clk cpu0 IT (24652) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24688 clk cpu0 R cpsr 800003c0 +24689 clk cpu0 IS (24653) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24690 clk cpu0 IT (24654) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24690 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24690 clk cpu0 R X9 0000000013000000 +24691 clk cpu0 IT (24655) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +24691 clk cpu0 R cpsr 800003c0 +24691 clk cpu0 R X8 00000000FFFFFFFA +24692 clk cpu0 IT (24656) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +24692 clk cpu0 MW1 13000000:000013000000_NS 20 +24693 clk cpu0 IT (24657) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +24693 clk cpu0 R X0 00003E3E000A6425 +24694 clk cpu0 IT (24658) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +24695 clk cpu0 IT (24659) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +24695 clk cpu0 R cpsr 000003c0 +24695 clk cpu0 R X9 0000000000000025 +24696 clk cpu0 IS (24660) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +24697 clk cpu0 IT (24661) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +24697 clk cpu0 R cpsr 600003c0 +24698 clk cpu0 IT (24662) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +24699 clk cpu0 IT (24663) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +24699 clk cpu0 R X8 00000000FFFFFFFA +24700 clk cpu0 IT (24664) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +24700 clk cpu0 R X9 0000000000000001 +24701 clk cpu0 IT (24665) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +24701 clk cpu0 R X9 000000000004D071 +24702 clk cpu0 IT (24666) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +24702 clk cpu0 R cpsr 200003c0 +24703 clk cpu0 IT (24667) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +24703 clk cpu0 R X27 000000000004D071 +24704 clk cpu0 IT (24668) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +24704 clk cpu0 R X20 000000000004D072 +24705 clk cpu0 IT (24669) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +24706 clk cpu0 IT (24670) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24706 clk cpu0 MR1 0004d072:00001004d072_NS 25 +24706 clk cpu0 R X8 0000000000000025 +24707 clk cpu0 IT (24671) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24707 clk cpu0 R cpsr 600003c0 +24708 clk cpu0 IT (24672) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24709 clk cpu0 IT (24673) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +24709 clk cpu0 MW4 03029734:000000829734_NS 00000000 +24710 clk cpu0 IT (24674) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +24710 clk cpu0 R X27 000000000004D072 +24711 clk cpu0 IT (24675) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +24711 clk cpu0 MR1 0004d073:00001004d073_NS 64 +24711 clk cpu0 R X27 000000000004D073 +24711 clk cpu0 R X28 0000000000000064 +24712 clk cpu0 IT (24676) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +24712 clk cpu0 R cpsr 200003c0 +24713 clk cpu0 IS (24677) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +24714 clk cpu0 IT (24678) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +24715 clk cpu0 IT (24679) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +24715 clk cpu0 R X8 000000000000000C +24716 clk cpu0 IT (24680) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +24716 clk cpu0 R cpsr 800003c0 +24717 clk cpu0 IS (24681) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +24718 clk cpu0 IT (24682) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +24718 clk cpu0 R X9 0000000000092CE0 +24719 clk cpu0 IT (24683) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +24719 clk cpu0 MR1 0004c114:00001004c114_NS 0e +24719 clk cpu0 R X10 000000000000000E +24720 clk cpu0 IT (24684) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +24720 clk cpu0 R X9 0000000000092D18 +24721 clk cpu0 IT (24685) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +24721 clk cpu0 R cpsr 800007c0 +24722 clk cpu0 IT (24686) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +24722 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +24722 clk cpu0 R cpsr 800003c0 +24722 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +24723 clk cpu0 IS (24687) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +24724 clk cpu0 IT (24688) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +24724 clk cpu0 R X9 00000000FFFFFFD8 +24725 clk cpu0 IT (24689) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +24725 clk cpu0 R cpsr a00003c0 +24726 clk cpu0 IT (24690) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +24726 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +24727 clk cpu0 IT (24691) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +24728 clk cpu0 IT (24692) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +24728 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +24728 clk cpu0 R X9 0000000003045830 +24729 clk cpu0 IT (24693) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +24729 clk cpu0 R X8 0000000003045800 +24730 clk cpu0 IT (24694) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +24731 clk cpu0 IT (24695) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +24731 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000000 +24731 clk cpu0 R X0 0000000000000000 +24732 clk cpu0 IT (24696) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +24732 clk cpu0 R X1 000000000000000A +24733 clk cpu0 IT (24697) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +24733 clk cpu0 R X30 0000000000092D48 +24734 clk cpu0 IT (24698) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +24734 clk cpu0 R SP_EL0 0000000003045740 +24735 clk cpu0 IT (24699) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +24735 clk cpu0 R X8 3030303030303030 +24736 clk cpu0 IT (24700) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +24736 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +24736 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +24737 clk cpu0 IT (24701) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +24737 clk cpu0 MW4 03045758:000000845758_NS 30303030 +24738 clk cpu0 IT (24702) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +24739 clk cpu0 IT (24703) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +24739 clk cpu0 R X11 0000000000000000 +24740 clk cpu0 IT (24704) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +24740 clk cpu0 R X8 0000000003029000 +24741 clk cpu0 IT (24705) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +24741 clk cpu0 MR4 03029734:000000829734_NS 00000000 +24741 clk cpu0 R X8 0000000000000000 +24742 clk cpu0 IT (24706) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +24742 clk cpu0 R cpsr 600003c0 +24743 clk cpu0 IT (24707) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +24743 clk cpu0 R X8 0000000000000000 +24744 clk cpu0 IT (24708) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +24744 clk cpu0 R cpsr 800003c0 +24745 clk cpu0 IT (24709) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +24746 clk cpu0 IT (24710) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +24746 clk cpu0 R X9 0000000003045748 +24747 clk cpu0 IT (24711) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +24747 clk cpu0 R X10 0000000006216000 +24748 clk cpu0 IT (24712) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +24748 clk cpu0 MR1 03045748:000000845748_NS 30 +24748 clk cpu0 R X8 0000000000000030 +24749 clk cpu0 IT (24713) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +24749 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24749 clk cpu0 R X9 0000000013000000 +24750 clk cpu0 IT (24714) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24750 clk cpu0 MW1 13000000:000013000000_NS 30 +24751 clk cpu0 IT (24715) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +24751 clk cpu0 R SP_EL0 0000000003045760 +24752 clk cpu0 IT (24716) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +24753 clk cpu0 IT (24717) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +24753 clk cpu0 R X20 000000000004D074 +24754 clk cpu0 IT (24718) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +24755 clk cpu0 IT (24719) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24755 clk cpu0 MR1 0004d074:00001004d074_NS 0a +24755 clk cpu0 R X8 000000000000000A +24756 clk cpu0 IT (24720) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24756 clk cpu0 R cpsr 800003c0 +24757 clk cpu0 IS (24721) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24758 clk cpu0 IS (24722) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24759 clk cpu0 IT (24723) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +24759 clk cpu0 R cpsr 000003c0 +24760 clk cpu0 IT (24724) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +24761 clk cpu0 IT (24725) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +24761 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +24761 clk cpu0 R X9 0000000013000000 +24762 clk cpu0 IT (24726) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +24762 clk cpu0 R X27 000000000004D074 +24763 clk cpu0 IT (24727) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +24763 clk cpu0 R X20 000000000004D075 +TUBE CPU0: >>PF: 0 +24764 clk cpu0 IT (24728) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +24764 clk cpu0 MW1 13000000:000013000000_NS 0a +24765 clk cpu0 IT (24729) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +24765 clk cpu0 MR1 0004d075:00001004d075_NS 00 +24765 clk cpu0 R X8 0000000000000000 +24766 clk cpu0 IT (24730) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +24766 clk cpu0 R cpsr 800003c0 +24767 clk cpu0 IS (24731) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +24768 clk cpu0 IT (24732) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +24769 clk cpu0 IT (24733) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +24770 clk cpu0 IT (24734) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +24770 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d06c +24770 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +24770 clk cpu0 R X19 000000000004D06C +24770 clk cpu0 R X30 000000000009C560 +24771 clk cpu0 IT (24735) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +24771 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +24771 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +24771 clk cpu0 R X20 0000000003008528 +24771 clk cpu0 R X21 0000000000000000 +24772 clk cpu0 IT (24736) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +24772 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +24772 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +24772 clk cpu0 R X22 000000000004D076 +24772 clk cpu0 R X23 000000000004D06C +24773 clk cpu0 IT (24737) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +24773 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +24773 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +24773 clk cpu0 R X24 000000000004D080 +24773 clk cpu0 R X25 0000000006216000 +24774 clk cpu0 IT (24738) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +24774 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +24774 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216034 +24774 clk cpu0 R X26 0000000006216034 +24774 clk cpu0 R X27 0001000100010001 +24775 clk cpu0 IT (24739) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +24775 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +24775 clk cpu0 R X28 FF7FFF7FFF7FFF7F +24776 clk cpu0 IT (24740) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +24776 clk cpu0 R SP_EL0 0000000003045800 +24777 clk cpu0 IT (24741) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +24778 clk cpu0 IT (24742) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +24778 clk cpu0 R X0 0000000000000001 +24779 clk cpu0 IT (24743) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +24779 clk cpu0 R X1 0000000000000000 +24780 clk cpu0 IT (24744) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +24780 clk cpu0 R X2 0000000000000000 +24781 clk cpu0 IT (24745) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +24782 clk cpu0 IT (24746) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +24783 clk cpu0 IT (24747) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +24783 clk cpu0 R X0 0000000003008528 +24784 clk cpu0 IT (24748) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +24784 clk cpu0 R X30 000000000009C57C +24785 clk cpu0 IT (24749) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +24786 clk cpu0 IT (24750) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +24786 clk cpu0 R X8 0000000006216000 +24787 clk cpu0 IT (24751) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +24787 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +24787 clk cpu0 R X8 0000000000000001 +24788 clk cpu0 IT (24752) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +24788 clk cpu0 R cpsr 800003c0 +24789 clk cpu0 IT (24753) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +24790 clk cpu0 IT (24754) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +24791 clk cpu0 IT (24755) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +24791 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000000 +24791 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b4ac +24791 clk cpu0 R X19 0000000000000000 +24791 clk cpu0 R X30 000000000009B4AC +24792 clk cpu0 IT (24756) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +24792 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +24792 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +24792 clk cpu0 R X20 000000000004D0CC +24792 clk cpu0 R X21 000000000004CF91 +24793 clk cpu0 IT (24757) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +24793 clk cpu0 R SP_EL0 0000000003045890 +24794 clk cpu0 IT (24758) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +24795 clk cpu0 IT (24759) 0009b4ac:00001009b4ac_NS b9400742 O EL0t_n : LDR w2,[x26,#4] +24795 clk cpu0 MR4 06216038:000015216038_NS 00000000 +24795 clk cpu0 R X2 0000000000000000 +24796 clk cpu0 IT (24760) 0009b4b0:00001009b4b0_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +24796 clk cpu0 R X0 0000000000000000 +24797 clk cpu0 IT (24761) 0009b4b4:00001009b4b4_NS aa1803e1 O EL0t_n : MOV x1,x24 +24797 clk cpu0 R X1 000000000004D080 +24798 clk cpu0 IT (24762) 0009b4b8:00001009b4b8_NS 94000405 O EL0t_n : BL 0x9c4cc +24798 clk cpu0 R X30 000000000009B4BC +24799 clk cpu0 IT (24763) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +24799 clk cpu0 R SP_EL0 0000000003045800 +24800 clk cpu0 IT (24764) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +24800 clk cpu0 R X8 0000000006216000 +24801 clk cpu0 IT (24765) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +24801 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +24801 clk cpu0 R X8 0000000000000003 +24802 clk cpu0 IT (24766) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +24802 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +24802 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +24803 clk cpu0 IT (24767) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +24803 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000000 +24803 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b4bc +24804 clk cpu0 IT (24768) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +24804 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +24804 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +24805 clk cpu0 IT (24769) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +24805 clk cpu0 R cpsr 200003c0 +24806 clk cpu0 IT (24770) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +24806 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +24806 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +24807 clk cpu0 IT (24771) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +24807 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +24807 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +24808 clk cpu0 IT (24772) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +24808 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +24808 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +24809 clk cpu0 IT (24773) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +24809 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +24809 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +24810 clk cpu0 IS (24774) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +24811 clk cpu0 IT (24775) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +24811 clk cpu0 R X20 0000000003008000 +24812 clk cpu0 IT (24776) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +24812 clk cpu0 R X20 0000000003008528 +24813 clk cpu0 IT (24777) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +24813 clk cpu0 R X0 0000000003008528 +24814 clk cpu0 IT (24778) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +24814 clk cpu0 R X19 000000000004D080 +24815 clk cpu0 IT (24779) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +24815 clk cpu0 R X30 000000000009C510 +24816 clk cpu0 IT (24780) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +24816 clk cpu0 R X8 0000000006216000 +24817 clk cpu0 IT (24781) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +24817 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +24817 clk cpu0 R X8 0000000000000001 +24818 clk cpu0 IT (24782) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +24818 clk cpu0 R cpsr 800003c0 +24819 clk cpu0 IT (24783) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +24820 clk cpu0 IT (24784) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +24821 clk cpu0 IT (24785) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +24821 clk cpu0 R X9 0000000003045800 +24822 clk cpu0 IT (24786) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +24822 clk cpu0 R X8 00000000FFFFFFD0 +24823 clk cpu0 IT (24787) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +24823 clk cpu0 R X10 0000000003045890 +24824 clk cpu0 IT (24788) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +24824 clk cpu0 R X9 0000000003045830 +24825 clk cpu0 IT (24789) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +24825 clk cpu0 R X0 0000000000000000 +24826 clk cpu0 IT (24790) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +24826 clk cpu0 R X1 0000000000000000 +24827 clk cpu0 IT (24791) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +24827 clk cpu0 R X2 0000000000000000 +24828 clk cpu0 IT (24792) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +24828 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +24829 clk cpu0 IT (24793) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +24829 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +24829 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +24830 clk cpu0 IT (24794) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +24831 clk cpu0 IT (24795) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +24831 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +24831 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +24831 clk cpu0 R X8 0000000000000000 +24831 clk cpu0 R X10 0000000003045830 +24832 clk cpu0 IT (24796) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +24832 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +24832 clk cpu0 R X9 0000000003045890 +24833 clk cpu0 IT (24797) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +24833 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +24833 clk cpu0 R X11 00000000FFFFFFD0 +24834 clk cpu0 IT (24798) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +24834 clk cpu0 R X21 0000000000000000 +24835 clk cpu0 IT (24799) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +24835 clk cpu0 R X1 0000000003045830 +24836 clk cpu0 IT (24800) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +24836 clk cpu0 R X0 000000000004D080 +24837 clk cpu0 IT (24801) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +24837 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +24837 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +24838 clk cpu0 IT (24802) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +24838 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +24839 clk cpu0 IT (24803) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +24839 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +24840 clk cpu0 IT (24804) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +24840 clk cpu0 R X30 000000000009C560 +24841 clk cpu0 IT (24805) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +24841 clk cpu0 R SP_EL0 0000000003045760 +24842 clk cpu0 IT (24806) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +24842 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d080 +24842 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +24843 clk cpu0 IT (24807) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +24843 clk cpu0 R X19 0000000003045830 +24844 clk cpu0 IT (24808) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +24844 clk cpu0 R X1 000000000004C000 +24845 clk cpu0 IT (24809) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +24845 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +24845 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +24846 clk cpu0 IT (24810) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +24846 clk cpu0 R X20 000000000004D080 +24847 clk cpu0 IT (24811) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +24847 clk cpu0 R X1 000000000004C00B +24848 clk cpu0 IT (24812) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +24848 clk cpu0 R X0 0000000003045764 +24849 clk cpu0 IT (24813) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +24849 clk cpu0 R X2 000000000000003B +24850 clk cpu0 IT (24814) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +24850 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +24851 clk cpu0 IT (24815) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +24851 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +24851 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216034 +24852 clk cpu0 IT (24816) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +24852 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +24852 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +24853 clk cpu0 IT (24817) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +24853 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +24853 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +24854 clk cpu0 IT (24818) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +24854 clk cpu0 R X30 0000000000092B80 +24855 clk cpu0 IT (24819) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +24855 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +24855 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +24855 clk cpu0 R SP_EL0 0000000003045750 +24856 clk cpu0 IT (24820) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +24856 clk cpu0 R X19 0000000003045764 +24857 clk cpu0 IT (24821) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +24857 clk cpu0 R X30 00000000000104DC +24858 clk cpu0 IT (24822) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +24858 clk cpu0 R cpsr 200003c0 +24859 clk cpu0 IS (24823) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +24860 clk cpu0 IT (24824) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +24860 clk cpu0 R cpsr 400003c0 +24861 clk cpu0 IT (24825) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +24862 clk cpu0 IT (24826) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +24862 clk cpu0 R cpsr 000003c0 +24862 clk cpu0 R X10 0000000000000003 +24863 clk cpu0 IS (24827) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +24864 clk cpu0 IT (24828) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +24864 clk cpu0 R X9 0000000000000020 +24865 clk cpu0 IT (24829) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +24865 clk cpu0 R X8 000000000004C008 +24866 clk cpu0 IT (24830) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +24866 clk cpu0 R cpsr 200003c0 +24867 clk cpu0 IT (24831) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +24867 clk cpu0 R X9 0000000000000008 +24868 clk cpu0 IS (24832) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +24869 clk cpu0 IT (24833) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +24869 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +24869 clk cpu0 R X12 000000000A00000A +24870 clk cpu0 IT (24834) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +24870 clk cpu0 R X10 0000000000000018 +24871 clk cpu0 IT (24835) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +24871 clk cpu0 R X11 000000000000003B +24872 clk cpu0 IT (24836) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24872 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +24872 clk cpu0 R X8 000000000004C00C +24872 clk cpu0 R X13 000000006F727245 +24873 clk cpu0 IT (24837) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24873 clk cpu0 R X12 000000000000000A +24874 clk cpu0 IT (24838) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24874 clk cpu0 R X11 0000000000000037 +24875 clk cpu0 IT (24839) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24875 clk cpu0 R cpsr 200003c0 +24876 clk cpu0 IT (24840) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24876 clk cpu0 R X14 0000000072724500 +24877 clk cpu0 IT (24841) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24877 clk cpu0 R X12 000000007272450A +24878 clk cpu0 IT (24842) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24878 clk cpu0 MW4 03045764:000000845764_NS 7272450a +24878 clk cpu0 R X0 0000000003045768 +24879 clk cpu0 IT (24843) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24879 clk cpu0 R X12 000000006F727245 +24880 clk cpu0 IT (24844) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24881 clk cpu0 IT (24845) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24881 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +24881 clk cpu0 R X8 000000000004C010 +24881 clk cpu0 R X13 0000000049203A72 +24882 clk cpu0 IT (24846) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24882 clk cpu0 R X12 000000000000006F +24883 clk cpu0 IT (24847) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24883 clk cpu0 R X11 0000000000000033 +24884 clk cpu0 IT (24848) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24884 clk cpu0 R cpsr 200003c0 +24885 clk cpu0 IT (24849) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24885 clk cpu0 R X14 00000000203A7200 +24886 clk cpu0 IT (24850) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24886 clk cpu0 R X12 00000000203A726F +24887 clk cpu0 IT (24851) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24887 clk cpu0 MW4 03045768:000000845768_NS 203a726f +24887 clk cpu0 R X0 000000000304576C +24888 clk cpu0 IT (24852) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24888 clk cpu0 R X12 0000000049203A72 +24889 clk cpu0 IT (24853) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24890 clk cpu0 IT (24854) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24890 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +24890 clk cpu0 R X8 000000000004C014 +24890 clk cpu0 R X13 0000000067656C6C +24891 clk cpu0 IT (24855) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24891 clk cpu0 R X12 0000000000000049 +24892 clk cpu0 IT (24856) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24892 clk cpu0 R X11 000000000000002F +24893 clk cpu0 IT (24857) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24893 clk cpu0 R cpsr 200003c0 +24894 clk cpu0 IT (24858) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24894 clk cpu0 R X14 00000000656C6C00 +24895 clk cpu0 IT (24859) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24895 clk cpu0 R X12 00000000656C6C49 +24896 clk cpu0 IT (24860) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24896 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +24896 clk cpu0 R X0 0000000003045770 +24897 clk cpu0 IT (24861) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24897 clk cpu0 R X12 0000000067656C6C +24898 clk cpu0 IT (24862) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24899 clk cpu0 IT (24863) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24899 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +24899 clk cpu0 R X8 000000000004C018 +24899 clk cpu0 R X13 0000000066206C61 +24900 clk cpu0 IT (24864) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24900 clk cpu0 R X12 0000000000000067 +24901 clk cpu0 IT (24865) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24901 clk cpu0 R X11 000000000000002B +24902 clk cpu0 IT (24866) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24902 clk cpu0 R cpsr 200003c0 +24903 clk cpu0 IT (24867) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24903 clk cpu0 R X14 00000000206C6100 +24904 clk cpu0 IT (24868) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24904 clk cpu0 R X12 00000000206C6167 +24905 clk cpu0 IT (24869) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24905 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +24905 clk cpu0 R X0 0000000003045774 +24906 clk cpu0 IT (24870) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24906 clk cpu0 R X12 0000000066206C61 +24907 clk cpu0 IT (24871) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24908 clk cpu0 IT (24872) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24908 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +24908 clk cpu0 R X8 000000000004C01C +24908 clk cpu0 R X13 00000000616D726F +24909 clk cpu0 IT (24873) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24909 clk cpu0 R X12 0000000000000066 +24910 clk cpu0 IT (24874) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24910 clk cpu0 R X11 0000000000000027 +24911 clk cpu0 IT (24875) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24911 clk cpu0 R cpsr 200003c0 +24912 clk cpu0 IT (24876) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24912 clk cpu0 R X14 000000006D726F00 +24913 clk cpu0 IT (24877) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24913 clk cpu0 R X12 000000006D726F66 +24914 clk cpu0 IT (24878) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24914 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +24914 clk cpu0 R X0 0000000003045778 +24915 clk cpu0 IT (24879) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24915 clk cpu0 R X12 00000000616D726F +24916 clk cpu0 IT (24880) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24917 clk cpu0 IT (24881) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24917 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +24917 clk cpu0 R X8 000000000004C020 +24917 clk cpu0 R X13 0000000070732074 +24918 clk cpu0 IT (24882) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24918 clk cpu0 R X12 0000000000000061 +24919 clk cpu0 IT (24883) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24919 clk cpu0 R X11 0000000000000023 +24920 clk cpu0 IT (24884) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24920 clk cpu0 R cpsr 200003c0 +24921 clk cpu0 IT (24885) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24921 clk cpu0 R X14 0000000073207400 +24922 clk cpu0 IT (24886) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24922 clk cpu0 R X12 0000000073207461 +24923 clk cpu0 IT (24887) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24923 clk cpu0 MW4 03045778:000000845778_NS 73207461 +24923 clk cpu0 R X0 000000000304577C +24924 clk cpu0 IT (24888) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24924 clk cpu0 R X12 0000000070732074 +24925 clk cpu0 IT (24889) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24926 clk cpu0 IT (24890) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24926 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +24926 clk cpu0 R X8 000000000004C024 +24926 clk cpu0 R X13 0000000066696365 +24927 clk cpu0 IT (24891) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24927 clk cpu0 R X12 0000000000000070 +24928 clk cpu0 IT (24892) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24928 clk cpu0 R X11 000000000000001F +24929 clk cpu0 IT (24893) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24929 clk cpu0 R cpsr 200003c0 +24930 clk cpu0 IT (24894) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24930 clk cpu0 R X14 0000000069636500 +24931 clk cpu0 IT (24895) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24931 clk cpu0 R X12 0000000069636570 +24932 clk cpu0 IT (24896) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24932 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +24932 clk cpu0 R X0 0000000003045780 +24933 clk cpu0 IT (24897) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24933 clk cpu0 R X12 0000000066696365 +24934 clk cpu0 IT (24898) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24935 clk cpu0 IT (24899) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24935 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +24935 clk cpu0 R X8 000000000004C028 +24935 clk cpu0 R X13 0000000020726569 +24936 clk cpu0 IT (24900) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24936 clk cpu0 R X12 0000000000000066 +24937 clk cpu0 IT (24901) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24937 clk cpu0 R X11 000000000000001B +24938 clk cpu0 IT (24902) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24938 clk cpu0 R cpsr 200003c0 +24939 clk cpu0 IT (24903) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24939 clk cpu0 R X14 0000000072656900 +24940 clk cpu0 IT (24904) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24940 clk cpu0 R X12 0000000072656966 +24941 clk cpu0 IT (24905) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24941 clk cpu0 MW4 03045780:000000845780_NS 72656966 +24941 clk cpu0 R X0 0000000003045784 +24942 clk cpu0 IT (24906) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24942 clk cpu0 R X12 0000000020726569 +24943 clk cpu0 IT (24907) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24944 clk cpu0 IT (24908) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24944 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +24944 clk cpu0 R X8 000000000004C02C +24944 clk cpu0 R X13 0000000064657375 +24945 clk cpu0 IT (24909) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24945 clk cpu0 R X12 0000000000000020 +24946 clk cpu0 IT (24910) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24946 clk cpu0 R X11 0000000000000017 +24947 clk cpu0 IT (24911) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24947 clk cpu0 R cpsr 200003c0 +24948 clk cpu0 IT (24912) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24948 clk cpu0 R X14 0000000065737500 +24949 clk cpu0 IT (24913) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24949 clk cpu0 R X12 0000000065737520 +24950 clk cpu0 IT (24914) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24950 clk cpu0 MW4 03045784:000000845784_NS 65737520 +24950 clk cpu0 R X0 0000000003045788 +24951 clk cpu0 IT (24915) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24951 clk cpu0 R X12 0000000064657375 +24952 clk cpu0 IT (24916) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24953 clk cpu0 IT (24917) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24953 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +24953 clk cpu0 R X8 000000000004C030 +24953 clk cpu0 R X13 000000005F27203A +24954 clk cpu0 IT (24918) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24954 clk cpu0 R X12 0000000000000064 +24955 clk cpu0 IT (24919) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24955 clk cpu0 R X11 0000000000000013 +24956 clk cpu0 IT (24920) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24956 clk cpu0 R cpsr 200003c0 +24957 clk cpu0 IT (24921) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24957 clk cpu0 R X14 0000000027203A00 +24958 clk cpu0 IT (24922) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24958 clk cpu0 R X12 0000000027203A64 +24959 clk cpu0 IT (24923) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24959 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +24959 clk cpu0 R X0 000000000304578C +24960 clk cpu0 IT (24924) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24960 clk cpu0 R X12 000000005F27203A +24961 clk cpu0 IT (24925) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24962 clk cpu0 IT (24926) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24962 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +24962 clk cpu0 R X8 000000000004C034 +24962 clk cpu0 R X13 0000000045202E27 +24963 clk cpu0 IT (24927) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24963 clk cpu0 R X12 000000000000005F +24964 clk cpu0 IT (24928) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24964 clk cpu0 R X11 000000000000000F +24965 clk cpu0 IT (24929) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24965 clk cpu0 R cpsr 200003c0 +24966 clk cpu0 IT (24930) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24966 clk cpu0 R X14 00000000202E2700 +24967 clk cpu0 IT (24931) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24967 clk cpu0 R X12 00000000202E275F +24968 clk cpu0 IT (24932) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24968 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +24968 clk cpu0 R X0 0000000003045790 +24969 clk cpu0 IT (24933) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24969 clk cpu0 R X12 0000000045202E27 +24970 clk cpu0 IT (24934) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24971 clk cpu0 IT (24935) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24971 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +24971 clk cpu0 R X8 000000000004C038 +24971 clk cpu0 R X13 000000006E69646E +24972 clk cpu0 IT (24936) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24972 clk cpu0 R X12 0000000000000045 +24973 clk cpu0 IT (24937) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24973 clk cpu0 R X11 000000000000000B +24974 clk cpu0 IT (24938) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24974 clk cpu0 R cpsr 200003c0 +24975 clk cpu0 IT (24939) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24975 clk cpu0 R X14 0000000069646E00 +24976 clk cpu0 IT (24940) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24976 clk cpu0 R X12 0000000069646E45 +24977 clk cpu0 IT (24941) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24977 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +24977 clk cpu0 R X0 0000000003045794 +24978 clk cpu0 IT (24942) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24978 clk cpu0 R X12 000000006E69646E +24979 clk cpu0 IT (24943) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24980 clk cpu0 IT (24944) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24980 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +24980 clk cpu0 R X8 000000000004C03C +24980 clk cpu0 R X13 0000000065542067 +24981 clk cpu0 IT (24945) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24981 clk cpu0 R X12 000000000000006E +24982 clk cpu0 IT (24946) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24982 clk cpu0 R X11 0000000000000007 +24983 clk cpu0 IT (24947) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24983 clk cpu0 R cpsr 200003c0 +24984 clk cpu0 IT (24948) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24984 clk cpu0 R X14 0000000054206700 +24985 clk cpu0 IT (24949) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24985 clk cpu0 R X12 000000005420676E +24986 clk cpu0 IT (24950) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24986 clk cpu0 MW4 03045794:000000845794_NS 5420676e +24986 clk cpu0 R X0 0000000003045798 +24987 clk cpu0 IT (24951) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24987 clk cpu0 R X12 0000000065542067 +24988 clk cpu0 IT (24952) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24989 clk cpu0 IT (24953) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +24989 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +24989 clk cpu0 R X8 000000000004C040 +24989 clk cpu0 R X13 000000000A2E7473 +24990 clk cpu0 IT (24954) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +24990 clk cpu0 R X12 0000000000000065 +24991 clk cpu0 IT (24955) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +24991 clk cpu0 R X11 0000000000000003 +24992 clk cpu0 IT (24956) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +24992 clk cpu0 R cpsr 600003c0 +24993 clk cpu0 IT (24957) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +24993 clk cpu0 R X14 000000002E747300 +24994 clk cpu0 IT (24958) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +24994 clk cpu0 R X12 000000002E747365 +24995 clk cpu0 IT (24959) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +24995 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +24995 clk cpu0 R X0 000000000304579C +24996 clk cpu0 IT (24960) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +24996 clk cpu0 R X12 000000000A2E7473 +24997 clk cpu0 IS (24961) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +24998 clk cpu0 IT (24962) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +24998 clk cpu0 R X2 0000000000000003 +24999 clk cpu0 IT (24963) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +24999 clk cpu0 R X9 0000000000000001 +25000 clk cpu0 IT (24964) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +25000 clk cpu0 R X8 000000000004C03F +25001 clk cpu0 IT (24965) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +25001 clk cpu0 R X1 000000000004C043 +25002 clk cpu0 IT (24966) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +25002 clk cpu0 R cpsr 200003c0 +25003 clk cpu0 IS (24967) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +25004 clk cpu0 IT (24968) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +25004 clk cpu0 MR1 0004c043:00001004c043_NS 0a +25004 clk cpu0 R X8 000000000000000A +25005 clk cpu0 IT (24969) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +25005 clk cpu0 MW1 0304579c:00000084579c_NS 0a +25006 clk cpu0 IS (24970) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +25007 clk cpu0 IT (24971) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +25007 clk cpu0 MR1 0004c044:00001004c044_NS 00 +25007 clk cpu0 R X8 0000000000000000 +25008 clk cpu0 IT (24972) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +25008 clk cpu0 R cpsr 600003c0 +25009 clk cpu0 IT (24973) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +25009 clk cpu0 MW1 0304579d:00000084579d_NS 00 +25010 clk cpu0 IS (24974) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +25011 clk cpu0 IT (24975) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +25011 clk cpu0 MR1 0004c045:00001004c045_NS 00 +25011 clk cpu0 R X8 0000000000000000 +25012 clk cpu0 IT (24976) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +25012 clk cpu0 MW1 0304579e:00000084579e_NS 00 +25013 clk cpu0 IT (24977) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +25014 clk cpu0 IT (24978) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +25014 clk cpu0 R X0 0000000003045764 +25015 clk cpu0 IT (24979) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +25015 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +25015 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +25015 clk cpu0 R SP_EL0 0000000003045760 +25015 clk cpu0 R X19 0000000003045830 +25015 clk cpu0 R X30 0000000000092B80 +25016 clk cpu0 IT (24980) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +25017 clk cpu0 IT (24981) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +25017 clk cpu0 R X22 000000000004C000 +25018 clk cpu0 IT (24982) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +25018 clk cpu0 R X23 000000000004C000 +25019 clk cpu0 IT (24983) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +25019 clk cpu0 R X26 0000000000000000 +25020 clk cpu0 IT (24984) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +25020 clk cpu0 R X21 0000000003029000 +25021 clk cpu0 IT (24985) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +25021 clk cpu0 R X22 000000000004C108 +25022 clk cpu0 IT (24986) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +25022 clk cpu0 R X23 000000000004C129 +25023 clk cpu0 IT (24987) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +25023 clk cpu0 R X24 0000000003041000 +25024 clk cpu0 IT (24988) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +25024 clk cpu0 R X25 0000000006216000 +25025 clk cpu0 IT (24989) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +25026 clk cpu0 IT (24990) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25026 clk cpu0 MR1 0004d080:00001004d080_NS 3e +25026 clk cpu0 R X8 000000000000003E +25026 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0084 ALLOC 0x00001004d080_NS +25026 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1420 ALLOC 0x00001004d080_NS +25027 clk cpu0 IT (24991) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25027 clk cpu0 R cpsr 200003c0 +25028 clk cpu0 IS (24992) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25029 clk cpu0 IS (24993) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25030 clk cpu0 IT (24994) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25030 clk cpu0 R cpsr 400003c0 +25031 clk cpu0 IS (24995) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25032 clk cpu0 IT (24996) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +25032 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +25032 clk cpu0 R X8 0000000000000000 +25033 clk cpu0 IT (24997) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +25033 clk cpu0 MR8 0004d080:00001004d080_NS 6425203a_53503e3e +25033 clk cpu0 R X0 6425203A53503E3E +25034 clk cpu0 IT (24998) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +25034 clk cpu0 R cpsr 800003c0 +25035 clk cpu0 IT (24999) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +25036 clk cpu0 IT (25000) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +25036 clk cpu0 R X27 0000000000000000 +25037 clk cpu0 IT (25001) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +25037 clk cpu0 R X28 000000000004D080 +25038 clk cpu0 IT (25002) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +25038 clk cpu0 R X8 00000000FFFFFFF8 +25039 clk cpu0 IT (25003) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25039 clk cpu0 R cpsr 000003c0 +25039 clk cpu0 R X9 000000000000003E +25040 clk cpu0 IS (25004) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25041 clk cpu0 IT (25005) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25041 clk cpu0 R cpsr 200003c0 +25042 clk cpu0 IS (25006) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25043 clk cpu0 IT (25007) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25043 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25043 clk cpu0 R X9 0000000013000000 +25044 clk cpu0 IT (25008) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25044 clk cpu0 R cpsr 800003c0 +25044 clk cpu0 R X8 00000000FFFFFFF9 +25045 clk cpu0 IT (25009) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25045 clk cpu0 MW1 13000000:000013000000_NS 3e +25046 clk cpu0 IT (25010) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25046 clk cpu0 R X0 006425203A53503E +25047 clk cpu0 IT (25011) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25048 clk cpu0 IT (25012) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25048 clk cpu0 R cpsr 000003c0 +25048 clk cpu0 R X9 000000000000003E +25049 clk cpu0 IS (25013) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25050 clk cpu0 IT (25014) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25050 clk cpu0 R cpsr 200003c0 +25051 clk cpu0 IS (25015) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25052 clk cpu0 IT (25016) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25052 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25052 clk cpu0 R X9 0000000013000000 +25053 clk cpu0 IT (25017) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25053 clk cpu0 R cpsr 800003c0 +25053 clk cpu0 R X8 00000000FFFFFFFA +25054 clk cpu0 IT (25018) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25054 clk cpu0 MW1 13000000:000013000000_NS 3e +25055 clk cpu0 IT (25019) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25055 clk cpu0 R X0 00006425203A5350 +25056 clk cpu0 IT (25020) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25057 clk cpu0 IT (25021) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25057 clk cpu0 R cpsr 000003c0 +25057 clk cpu0 R X9 0000000000000050 +25058 clk cpu0 IS (25022) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25059 clk cpu0 IT (25023) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25059 clk cpu0 R cpsr 200003c0 +25060 clk cpu0 IS (25024) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25061 clk cpu0 IT (25025) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25061 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25061 clk cpu0 R X9 0000000013000000 +25062 clk cpu0 IT (25026) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25062 clk cpu0 R cpsr 800003c0 +25062 clk cpu0 R X8 00000000FFFFFFFB +25063 clk cpu0 IT (25027) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25063 clk cpu0 MW1 13000000:000013000000_NS 50 +25064 clk cpu0 IT (25028) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25064 clk cpu0 R X0 0000006425203A53 +25065 clk cpu0 IT (25029) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25066 clk cpu0 IT (25030) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25066 clk cpu0 R cpsr 000003c0 +25066 clk cpu0 R X9 0000000000000053 +25067 clk cpu0 IS (25031) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25068 clk cpu0 IT (25032) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25068 clk cpu0 R cpsr 200003c0 +25069 clk cpu0 IS (25033) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25070 clk cpu0 IT (25034) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25070 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25070 clk cpu0 R X9 0000000013000000 +25071 clk cpu0 IT (25035) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25071 clk cpu0 R cpsr 800003c0 +25071 clk cpu0 R X8 00000000FFFFFFFC +25072 clk cpu0 IT (25036) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25072 clk cpu0 MW1 13000000:000013000000_NS 53 +25073 clk cpu0 IT (25037) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25073 clk cpu0 R X0 000000006425203A +25074 clk cpu0 IT (25038) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25075 clk cpu0 IT (25039) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25075 clk cpu0 R cpsr 000003c0 +25075 clk cpu0 R X9 000000000000003A +25076 clk cpu0 IS (25040) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25077 clk cpu0 IT (25041) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25077 clk cpu0 R cpsr 200003c0 +25078 clk cpu0 IS (25042) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25079 clk cpu0 IT (25043) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25079 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25079 clk cpu0 R X9 0000000013000000 +25080 clk cpu0 IT (25044) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25080 clk cpu0 R cpsr 800003c0 +25080 clk cpu0 R X8 00000000FFFFFFFD +25081 clk cpu0 IT (25045) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25081 clk cpu0 MW1 13000000:000013000000_NS 3a +25082 clk cpu0 IT (25046) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25082 clk cpu0 R X0 0000000000642520 +25083 clk cpu0 IT (25047) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25084 clk cpu0 IT (25048) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25084 clk cpu0 R cpsr 000003c0 +25084 clk cpu0 R X9 0000000000000020 +25085 clk cpu0 IS (25049) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25086 clk cpu0 IT (25050) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25086 clk cpu0 R cpsr 800003c0 +25087 clk cpu0 IS (25051) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25088 clk cpu0 IT (25052) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25088 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25088 clk cpu0 R X9 0000000013000000 +25089 clk cpu0 IT (25053) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25089 clk cpu0 R cpsr 800003c0 +25089 clk cpu0 R X8 00000000FFFFFFFE +25090 clk cpu0 IT (25054) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25090 clk cpu0 MW1 13000000:000013000000_NS 20 +25091 clk cpu0 IT (25055) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25091 clk cpu0 R X0 0000000000006425 +25092 clk cpu0 IT (25056) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25093 clk cpu0 IT (25057) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25093 clk cpu0 R cpsr 000003c0 +25093 clk cpu0 R X9 0000000000000025 +25094 clk cpu0 IS (25058) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25095 clk cpu0 IT (25059) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25095 clk cpu0 R cpsr 600003c0 +25096 clk cpu0 IT (25060) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25097 clk cpu0 IT (25061) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +25097 clk cpu0 R X8 00000000FFFFFFFE +25098 clk cpu0 IT (25062) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +25098 clk cpu0 R X9 0000000000000005 +25099 clk cpu0 IT (25063) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +25099 clk cpu0 R X9 000000000004D085 +25100 clk cpu0 IT (25064) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +25100 clk cpu0 R cpsr 200003c0 +25101 clk cpu0 IT (25065) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +25101 clk cpu0 R X27 000000000004D085 +25102 clk cpu0 IT (25066) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +25102 clk cpu0 R X20 000000000004D086 +25103 clk cpu0 IT (25067) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +25104 clk cpu0 IT (25068) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25104 clk cpu0 MR1 0004d086:00001004d086_NS 25 +25104 clk cpu0 R X8 0000000000000025 +25105 clk cpu0 IT (25069) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25105 clk cpu0 R cpsr 600003c0 +25106 clk cpu0 IT (25070) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25107 clk cpu0 IT (25071) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +25107 clk cpu0 MW4 03029734:000000829734_NS 00000000 +25108 clk cpu0 IT (25072) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +25108 clk cpu0 R X27 000000000004D086 +25109 clk cpu0 IT (25073) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +25109 clk cpu0 MR1 0004d087:00001004d087_NS 64 +25109 clk cpu0 R X27 000000000004D087 +25109 clk cpu0 R X28 0000000000000064 +25110 clk cpu0 IT (25074) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +25110 clk cpu0 R cpsr 200003c0 +25111 clk cpu0 IS (25075) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +25112 clk cpu0 IT (25076) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +25113 clk cpu0 IT (25077) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +25113 clk cpu0 R X8 000000000000000C +25114 clk cpu0 IT (25078) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +25114 clk cpu0 R cpsr 800003c0 +25115 clk cpu0 IS (25079) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +25116 clk cpu0 IT (25080) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +25116 clk cpu0 R X9 0000000000092CE0 +25117 clk cpu0 IT (25081) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +25117 clk cpu0 MR1 0004c114:00001004c114_NS 0e +25117 clk cpu0 R X10 000000000000000E +25118 clk cpu0 IT (25082) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +25118 clk cpu0 R X9 0000000000092D18 +25119 clk cpu0 IT (25083) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +25119 clk cpu0 R cpsr 800007c0 +25120 clk cpu0 IT (25084) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +25120 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +25120 clk cpu0 R cpsr 800003c0 +25120 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +25121 clk cpu0 IS (25085) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +25122 clk cpu0 IT (25086) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +25122 clk cpu0 R X9 00000000FFFFFFD8 +25123 clk cpu0 IT (25087) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +25123 clk cpu0 R cpsr a00003c0 +25124 clk cpu0 IT (25088) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +25124 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +25125 clk cpu0 IT (25089) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +25126 clk cpu0 IT (25090) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +25126 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +25126 clk cpu0 R X9 0000000003045830 +25127 clk cpu0 IT (25091) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +25127 clk cpu0 R X8 0000000003045800 +25128 clk cpu0 IT (25092) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +25129 clk cpu0 IT (25093) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +25129 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000000 +25129 clk cpu0 R X0 0000000000000000 +25130 clk cpu0 IT (25094) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +25130 clk cpu0 R X1 000000000000000A +25131 clk cpu0 IT (25095) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +25131 clk cpu0 R X30 0000000000092D48 +25132 clk cpu0 IT (25096) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +25132 clk cpu0 R SP_EL0 0000000003045740 +25133 clk cpu0 IT (25097) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +25133 clk cpu0 R X8 3030303030303030 +25134 clk cpu0 IT (25098) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +25134 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +25134 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +25135 clk cpu0 IT (25099) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +25135 clk cpu0 MW4 03045758:000000845758_NS 30303030 +25136 clk cpu0 IT (25100) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +25137 clk cpu0 IT (25101) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +25137 clk cpu0 R X11 0000000000000000 +25138 clk cpu0 IT (25102) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +25138 clk cpu0 R X8 0000000003029000 +25139 clk cpu0 IT (25103) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +25139 clk cpu0 MR4 03029734:000000829734_NS 00000000 +25139 clk cpu0 R X8 0000000000000000 +25140 clk cpu0 IT (25104) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +25140 clk cpu0 R cpsr 600003c0 +25141 clk cpu0 IT (25105) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +25141 clk cpu0 R X8 0000000000000000 +25142 clk cpu0 IT (25106) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +25142 clk cpu0 R cpsr 800003c0 +25143 clk cpu0 IT (25107) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +25144 clk cpu0 IT (25108) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +25144 clk cpu0 R X9 0000000003045748 +25145 clk cpu0 IT (25109) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +25145 clk cpu0 R X10 0000000006216000 +25146 clk cpu0 IT (25110) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +25146 clk cpu0 MR1 03045748:000000845748_NS 30 +25146 clk cpu0 R X8 0000000000000030 +25147 clk cpu0 IT (25111) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +25147 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25147 clk cpu0 R X9 0000000013000000 +25148 clk cpu0 IT (25112) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25148 clk cpu0 MW1 13000000:000013000000_NS 30 +25149 clk cpu0 IT (25113) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +25149 clk cpu0 R SP_EL0 0000000003045760 +25150 clk cpu0 IT (25114) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +25151 clk cpu0 IT (25115) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +25151 clk cpu0 R X20 000000000004D088 +25152 clk cpu0 IT (25116) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +25153 clk cpu0 IT (25117) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25153 clk cpu0 MR1 0004d088:00001004d088_NS 0a +25153 clk cpu0 R X8 000000000000000A +25154 clk cpu0 IT (25118) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25154 clk cpu0 R cpsr 800003c0 +25155 clk cpu0 IS (25119) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25156 clk cpu0 IS (25120) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25157 clk cpu0 IT (25121) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25157 clk cpu0 R cpsr 400003c0 +25158 clk cpu0 IS (25122) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25159 clk cpu0 IT (25123) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +25159 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +25159 clk cpu0 R X8 0000000000000000 +25160 clk cpu0 IT (25124) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +25160 clk cpu0 MR8 0004d088:00001004d088_NS 4b535f47_534d000a +25160 clk cpu0 R X0 4B535F47534D000A +25161 clk cpu0 IT (25125) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +25161 clk cpu0 R cpsr 800003c0 +25162 clk cpu0 IT (25126) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +25163 clk cpu0 IT (25127) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +25163 clk cpu0 R X27 0000000000000000 +25164 clk cpu0 IT (25128) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +25164 clk cpu0 R X28 000000000004D088 +25165 clk cpu0 IT (25129) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +25165 clk cpu0 R X8 00000000FFFFFFF8 +25166 clk cpu0 IT (25130) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25166 clk cpu0 R cpsr 000003c0 +25166 clk cpu0 R X9 000000000000000A +25167 clk cpu0 IS (25131) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25168 clk cpu0 IT (25132) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25168 clk cpu0 R cpsr 800003c0 +25169 clk cpu0 IS (25133) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25170 clk cpu0 IT (25134) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25170 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25170 clk cpu0 R X9 0000000013000000 +25171 clk cpu0 IT (25135) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25171 clk cpu0 R cpsr 800003c0 +25171 clk cpu0 R X8 00000000FFFFFFF9 +TUBE CPU0: >>PS: 0 +25172 clk cpu0 IT (25136) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25172 clk cpu0 MW1 13000000:000013000000_NS 0a +25173 clk cpu0 IT (25137) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25173 clk cpu0 R X0 004B535F47534D00 +25174 clk cpu0 IT (25138) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25175 clk cpu0 IT (25139) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25175 clk cpu0 R cpsr 400003c0 +25175 clk cpu0 R X9 0000000000000000 +25176 clk cpu0 IT (25140) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25177 clk cpu0 IT (25141) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +25177 clk cpu0 R X8 00000000FFFFFFF9 +25178 clk cpu0 IT (25142) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +25178 clk cpu0 R X9 0000000000000000 +25179 clk cpu0 IT (25143) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +25179 clk cpu0 R X9 000000000004D088 +25180 clk cpu0 IT (25144) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +25180 clk cpu0 R cpsr 200003c0 +25181 clk cpu0 IT (25145) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +25181 clk cpu0 R X27 000000000004D088 +25182 clk cpu0 IT (25146) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +25182 clk cpu0 R X20 000000000004D089 +25183 clk cpu0 IT (25147) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +25184 clk cpu0 IT (25148) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25184 clk cpu0 MR1 0004d089:00001004d089_NS 00 +25184 clk cpu0 R X8 0000000000000000 +25185 clk cpu0 IT (25149) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25185 clk cpu0 R cpsr 800003c0 +25186 clk cpu0 IS (25150) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25187 clk cpu0 IT (25151) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25188 clk cpu0 IT (25152) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +25189 clk cpu0 IT (25153) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +25189 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d080 +25189 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +25189 clk cpu0 R X19 000000000004D080 +25189 clk cpu0 R X30 000000000009C560 +25190 clk cpu0 IT (25154) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +25190 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +25190 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +25190 clk cpu0 R X20 0000000003008528 +25190 clk cpu0 R X21 0000000000000000 +25191 clk cpu0 IT (25155) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +25191 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +25191 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +25191 clk cpu0 R X22 000000000004D076 +25191 clk cpu0 R X23 000000000004D06C +25192 clk cpu0 IT (25156) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +25192 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +25192 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +25192 clk cpu0 R X24 000000000004D080 +25192 clk cpu0 R X25 0000000006216000 +25193 clk cpu0 IT (25157) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +25193 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +25193 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216034 +25193 clk cpu0 R X26 0000000006216034 +25193 clk cpu0 R X27 0001000100010001 +25194 clk cpu0 IT (25158) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +25194 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +25194 clk cpu0 R X28 FF7FFF7FFF7FFF7F +25195 clk cpu0 IT (25159) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +25195 clk cpu0 R SP_EL0 0000000003045800 +25196 clk cpu0 IT (25160) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +25197 clk cpu0 IT (25161) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +25197 clk cpu0 R X0 0000000000000001 +25198 clk cpu0 IT (25162) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +25198 clk cpu0 R X1 0000000000000000 +25199 clk cpu0 IT (25163) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +25199 clk cpu0 R X2 0000000000000000 +25200 clk cpu0 IT (25164) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +25201 clk cpu0 IT (25165) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +25202 clk cpu0 IT (25166) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +25202 clk cpu0 R X0 0000000003008528 +25203 clk cpu0 IT (25167) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +25203 clk cpu0 R X30 000000000009C57C +25204 clk cpu0 IT (25168) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +25205 clk cpu0 IT (25169) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +25205 clk cpu0 R X8 0000000006216000 +25206 clk cpu0 IT (25170) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +25206 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +25206 clk cpu0 R X8 0000000000000001 +25207 clk cpu0 IT (25171) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +25207 clk cpu0 R cpsr 800003c0 +25208 clk cpu0 IT (25172) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +25209 clk cpu0 IT (25173) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +25210 clk cpu0 IT (25174) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +25210 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000000 +25210 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b4bc +25210 clk cpu0 R X19 0000000000000000 +25210 clk cpu0 R X30 000000000009B4BC +25211 clk cpu0 IT (25175) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +25211 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +25211 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +25211 clk cpu0 R X20 000000000004D0CC +25211 clk cpu0 R X21 000000000004CF91 +25212 clk cpu0 IT (25176) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +25212 clk cpu0 R SP_EL0 0000000003045890 +25213 clk cpu0 IT (25177) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +25214 clk cpu0 IT (25178) 0009b4bc:00001009b4bc_NS b9405328 O EL0t_n : LDR w8,[x25,#0x50] +25214 clk cpu0 MR4 06216050:000015216050_NS 00000002 +25214 clk cpu0 R X8 0000000000000002 +25214 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01a6 INVAL 0x0000100974c0_NS +25214 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01a6 ALLOC 0x00001009b4c0_NS +25214 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0d31 ALLOC 0x00001009b4c0_NS +25215 clk cpu0 IT (25179) 0009b4c0:00001009b4c0_NS 91000673 O EL0t_n : ADD x19,x19,#1 +25215 clk cpu0 R X19 0000000000000001 +25216 clk cpu0 IT (25180) 0009b4c4:00001009b4c4_NS 9100335a O EL0t_n : ADD x26,x26,#0xc +25216 clk cpu0 R X26 0000000006216040 +25217 clk cpu0 IT (25181) 0009b4c8:00001009b4c8_NS eb08027f O EL0t_n : CMP x19,x8 +25217 clk cpu0 R cpsr 800003c0 +25218 clk cpu0 IT (25182) 0009b4cc:00001009b4cc_NS 54fffd23 O EL0t_n : B.CC 0x9b470 +25219 clk cpu0 IT (25183) 0009b470:00001009b470_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +25219 clk cpu0 R X0 0000000000000000 +25220 clk cpu0 IT (25184) 0009b474:00001009b474_NS aa1403e1 O EL0t_n : MOV x1,x20 +25220 clk cpu0 R X1 000000000004D0CC +25221 clk cpu0 IT (25185) 0009b478:00001009b478_NS 2a1303e2 O EL0t_n : MOV w2,w19 +25221 clk cpu0 R X2 0000000000000001 +25222 clk cpu0 IT (25186) 0009b47c:00001009b47c_NS 94000414 O EL0t_n : BL 0x9c4cc +25222 clk cpu0 R X30 000000000009B480 +25223 clk cpu0 IT (25187) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +25223 clk cpu0 R SP_EL0 0000000003045800 +25224 clk cpu0 IT (25188) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +25224 clk cpu0 R X8 0000000006216000 +25225 clk cpu0 IT (25189) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +25225 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +25225 clk cpu0 R X8 0000000000000003 +25226 clk cpu0 IT (25190) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +25226 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +25226 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +25227 clk cpu0 IT (25191) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +25227 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000001 +25227 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b480 +25228 clk cpu0 IT (25192) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +25228 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000001 +25228 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +25229 clk cpu0 IT (25193) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +25229 clk cpu0 R cpsr 200003c0 +25230 clk cpu0 IT (25194) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +25230 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +25230 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +25231 clk cpu0 IT (25195) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +25231 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +25231 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +25232 clk cpu0 IT (25196) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +25232 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +25232 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +25233 clk cpu0 IT (25197) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +25233 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +25233 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +25234 clk cpu0 IS (25198) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +25235 clk cpu0 IT (25199) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +25235 clk cpu0 R X20 0000000003008000 +25236 clk cpu0 IT (25200) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +25236 clk cpu0 R X20 0000000003008528 +25237 clk cpu0 IT (25201) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +25237 clk cpu0 R X0 0000000003008528 +25238 clk cpu0 IT (25202) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +25238 clk cpu0 R X19 000000000004D0CC +25239 clk cpu0 IT (25203) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +25239 clk cpu0 R X30 000000000009C510 +25240 clk cpu0 IT (25204) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +25240 clk cpu0 R X8 0000000006216000 +25241 clk cpu0 IT (25205) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +25241 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +25241 clk cpu0 R X8 0000000000000001 +25242 clk cpu0 IT (25206) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +25242 clk cpu0 R cpsr 800003c0 +25243 clk cpu0 IT (25207) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +25244 clk cpu0 IT (25208) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +25245 clk cpu0 IT (25209) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +25245 clk cpu0 R X9 0000000003045800 +25246 clk cpu0 IT (25210) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +25246 clk cpu0 R X8 00000000FFFFFFD0 +25247 clk cpu0 IT (25211) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +25247 clk cpu0 R X10 0000000003045890 +25248 clk cpu0 IT (25212) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +25248 clk cpu0 R X9 0000000003045830 +25249 clk cpu0 IT (25213) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +25249 clk cpu0 R X0 0000000000000000 +25250 clk cpu0 IT (25214) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +25250 clk cpu0 R X1 0000000000000000 +25251 clk cpu0 IT (25215) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +25251 clk cpu0 R X2 0000000000000000 +25252 clk cpu0 IT (25216) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +25252 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +25253 clk cpu0 IT (25217) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +25253 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +25253 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +25254 clk cpu0 IT (25218) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +25255 clk cpu0 IT (25219) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +25255 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +25255 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +25255 clk cpu0 R X8 0000000000000000 +25255 clk cpu0 R X10 0000000003045830 +25256 clk cpu0 IT (25220) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +25256 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +25256 clk cpu0 R X9 0000000003045890 +25257 clk cpu0 IT (25221) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +25257 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +25257 clk cpu0 R X11 00000000FFFFFFD0 +25258 clk cpu0 IT (25222) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +25258 clk cpu0 R X21 0000000000000000 +25259 clk cpu0 IT (25223) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +25259 clk cpu0 R X1 0000000003045830 +25260 clk cpu0 IT (25224) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +25260 clk cpu0 R X0 000000000004D0CC +25261 clk cpu0 IT (25225) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +25261 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +25261 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +25262 clk cpu0 IT (25226) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +25262 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +25263 clk cpu0 IT (25227) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +25263 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +25264 clk cpu0 IT (25228) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +25264 clk cpu0 R X30 000000000009C560 +25265 clk cpu0 IT (25229) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +25265 clk cpu0 R SP_EL0 0000000003045760 +25266 clk cpu0 IT (25230) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +25266 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d0cc +25266 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +25267 clk cpu0 IT (25231) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +25267 clk cpu0 R X19 0000000003045830 +25268 clk cpu0 IT (25232) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +25268 clk cpu0 R X1 000000000004C000 +25269 clk cpu0 IT (25233) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +25269 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +25269 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +25270 clk cpu0 IT (25234) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +25270 clk cpu0 R X20 000000000004D0CC +25271 clk cpu0 IT (25235) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +25271 clk cpu0 R X1 000000000004C00B +25272 clk cpu0 IT (25236) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +25272 clk cpu0 R X0 0000000003045764 +25273 clk cpu0 IT (25237) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +25273 clk cpu0 R X2 000000000000003B +25274 clk cpu0 IT (25238) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +25274 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +25275 clk cpu0 IT (25239) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +25275 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +25275 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216040 +25276 clk cpu0 IT (25240) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +25276 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +25276 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +25277 clk cpu0 IT (25241) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +25277 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +25277 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +25278 clk cpu0 IT (25242) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +25278 clk cpu0 R X30 0000000000092B80 +25279 clk cpu0 IT (25243) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +25279 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +25279 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +25279 clk cpu0 R SP_EL0 0000000003045750 +25280 clk cpu0 IT (25244) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +25280 clk cpu0 R X19 0000000003045764 +25281 clk cpu0 IT (25245) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +25281 clk cpu0 R X30 00000000000104DC +25282 clk cpu0 IT (25246) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +25282 clk cpu0 R cpsr 200003c0 +25283 clk cpu0 IS (25247) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +25284 clk cpu0 IT (25248) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +25284 clk cpu0 R cpsr 400003c0 +25285 clk cpu0 IT (25249) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +25286 clk cpu0 IT (25250) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +25286 clk cpu0 R cpsr 000003c0 +25286 clk cpu0 R X10 0000000000000003 +25287 clk cpu0 IS (25251) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +25288 clk cpu0 IT (25252) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +25288 clk cpu0 R X9 0000000000000020 +25289 clk cpu0 IT (25253) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +25289 clk cpu0 R X8 000000000004C008 +25290 clk cpu0 IT (25254) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +25290 clk cpu0 R cpsr 200003c0 +25291 clk cpu0 IT (25255) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +25291 clk cpu0 R X9 0000000000000008 +25292 clk cpu0 IS (25256) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +25293 clk cpu0 IT (25257) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +25293 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +25293 clk cpu0 R X12 000000000A00000A +25294 clk cpu0 IT (25258) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +25294 clk cpu0 R X10 0000000000000018 +25295 clk cpu0 IT (25259) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +25295 clk cpu0 R X11 000000000000003B +25296 clk cpu0 IT (25260) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25296 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +25296 clk cpu0 R X8 000000000004C00C +25296 clk cpu0 R X13 000000006F727245 +25297 clk cpu0 IT (25261) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25297 clk cpu0 R X12 000000000000000A +25298 clk cpu0 IT (25262) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25298 clk cpu0 R X11 0000000000000037 +25299 clk cpu0 IT (25263) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25299 clk cpu0 R cpsr 200003c0 +25300 clk cpu0 IT (25264) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25300 clk cpu0 R X14 0000000072724500 +25301 clk cpu0 IT (25265) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25301 clk cpu0 R X12 000000007272450A +25302 clk cpu0 IT (25266) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25302 clk cpu0 MW4 03045764:000000845764_NS 7272450a +25302 clk cpu0 R X0 0000000003045768 +25303 clk cpu0 IT (25267) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25303 clk cpu0 R X12 000000006F727245 +25304 clk cpu0 IT (25268) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25305 clk cpu0 IT (25269) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25305 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +25305 clk cpu0 R X8 000000000004C010 +25305 clk cpu0 R X13 0000000049203A72 +25306 clk cpu0 IT (25270) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25306 clk cpu0 R X12 000000000000006F +25307 clk cpu0 IT (25271) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25307 clk cpu0 R X11 0000000000000033 +25308 clk cpu0 IT (25272) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25308 clk cpu0 R cpsr 200003c0 +25309 clk cpu0 IT (25273) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25309 clk cpu0 R X14 00000000203A7200 +25310 clk cpu0 IT (25274) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25310 clk cpu0 R X12 00000000203A726F +25311 clk cpu0 IT (25275) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25311 clk cpu0 MW4 03045768:000000845768_NS 203a726f +25311 clk cpu0 R X0 000000000304576C +25312 clk cpu0 IT (25276) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25312 clk cpu0 R X12 0000000049203A72 +25313 clk cpu0 IT (25277) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25314 clk cpu0 IT (25278) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25314 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +25314 clk cpu0 R X8 000000000004C014 +25314 clk cpu0 R X13 0000000067656C6C +25315 clk cpu0 IT (25279) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25315 clk cpu0 R X12 0000000000000049 +25316 clk cpu0 IT (25280) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25316 clk cpu0 R X11 000000000000002F +25317 clk cpu0 IT (25281) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25317 clk cpu0 R cpsr 200003c0 +25318 clk cpu0 IT (25282) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25318 clk cpu0 R X14 00000000656C6C00 +25319 clk cpu0 IT (25283) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25319 clk cpu0 R X12 00000000656C6C49 +25320 clk cpu0 IT (25284) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25320 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +25320 clk cpu0 R X0 0000000003045770 +25321 clk cpu0 IT (25285) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25321 clk cpu0 R X12 0000000067656C6C +25322 clk cpu0 IT (25286) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25323 clk cpu0 IT (25287) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25323 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +25323 clk cpu0 R X8 000000000004C018 +25323 clk cpu0 R X13 0000000066206C61 +25324 clk cpu0 IT (25288) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25324 clk cpu0 R X12 0000000000000067 +25325 clk cpu0 IT (25289) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25325 clk cpu0 R X11 000000000000002B +25326 clk cpu0 IT (25290) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25326 clk cpu0 R cpsr 200003c0 +25327 clk cpu0 IT (25291) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25327 clk cpu0 R X14 00000000206C6100 +25328 clk cpu0 IT (25292) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25328 clk cpu0 R X12 00000000206C6167 +25329 clk cpu0 IT (25293) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25329 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +25329 clk cpu0 R X0 0000000003045774 +25330 clk cpu0 IT (25294) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25330 clk cpu0 R X12 0000000066206C61 +25331 clk cpu0 IT (25295) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25332 clk cpu0 IT (25296) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25332 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +25332 clk cpu0 R X8 000000000004C01C +25332 clk cpu0 R X13 00000000616D726F +25333 clk cpu0 IT (25297) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25333 clk cpu0 R X12 0000000000000066 +25334 clk cpu0 IT (25298) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25334 clk cpu0 R X11 0000000000000027 +25335 clk cpu0 IT (25299) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25335 clk cpu0 R cpsr 200003c0 +25336 clk cpu0 IT (25300) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25336 clk cpu0 R X14 000000006D726F00 +25337 clk cpu0 IT (25301) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25337 clk cpu0 R X12 000000006D726F66 +25338 clk cpu0 IT (25302) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25338 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +25338 clk cpu0 R X0 0000000003045778 +25339 clk cpu0 IT (25303) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25339 clk cpu0 R X12 00000000616D726F +25340 clk cpu0 IT (25304) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25341 clk cpu0 IT (25305) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25341 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +25341 clk cpu0 R X8 000000000004C020 +25341 clk cpu0 R X13 0000000070732074 +25342 clk cpu0 IT (25306) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25342 clk cpu0 R X12 0000000000000061 +25343 clk cpu0 IT (25307) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25343 clk cpu0 R X11 0000000000000023 +25344 clk cpu0 IT (25308) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25344 clk cpu0 R cpsr 200003c0 +25345 clk cpu0 IT (25309) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25345 clk cpu0 R X14 0000000073207400 +25346 clk cpu0 IT (25310) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25346 clk cpu0 R X12 0000000073207461 +25347 clk cpu0 IT (25311) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25347 clk cpu0 MW4 03045778:000000845778_NS 73207461 +25347 clk cpu0 R X0 000000000304577C +25348 clk cpu0 IT (25312) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25348 clk cpu0 R X12 0000000070732074 +25349 clk cpu0 IT (25313) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25350 clk cpu0 IT (25314) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25350 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +25350 clk cpu0 R X8 000000000004C024 +25350 clk cpu0 R X13 0000000066696365 +25351 clk cpu0 IT (25315) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25351 clk cpu0 R X12 0000000000000070 +25352 clk cpu0 IT (25316) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25352 clk cpu0 R X11 000000000000001F +25353 clk cpu0 IT (25317) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25353 clk cpu0 R cpsr 200003c0 +25354 clk cpu0 IT (25318) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25354 clk cpu0 R X14 0000000069636500 +25355 clk cpu0 IT (25319) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25355 clk cpu0 R X12 0000000069636570 +25356 clk cpu0 IT (25320) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25356 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +25356 clk cpu0 R X0 0000000003045780 +25357 clk cpu0 IT (25321) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25357 clk cpu0 R X12 0000000066696365 +25358 clk cpu0 IT (25322) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25359 clk cpu0 IT (25323) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25359 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +25359 clk cpu0 R X8 000000000004C028 +25359 clk cpu0 R X13 0000000020726569 +25360 clk cpu0 IT (25324) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25360 clk cpu0 R X12 0000000000000066 +25361 clk cpu0 IT (25325) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25361 clk cpu0 R X11 000000000000001B +25362 clk cpu0 IT (25326) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25362 clk cpu0 R cpsr 200003c0 +25363 clk cpu0 IT (25327) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25363 clk cpu0 R X14 0000000072656900 +25364 clk cpu0 IT (25328) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25364 clk cpu0 R X12 0000000072656966 +25365 clk cpu0 IT (25329) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25365 clk cpu0 MW4 03045780:000000845780_NS 72656966 +25365 clk cpu0 R X0 0000000003045784 +25366 clk cpu0 IT (25330) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25366 clk cpu0 R X12 0000000020726569 +25367 clk cpu0 IT (25331) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25368 clk cpu0 IT (25332) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25368 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +25368 clk cpu0 R X8 000000000004C02C +25368 clk cpu0 R X13 0000000064657375 +25369 clk cpu0 IT (25333) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25369 clk cpu0 R X12 0000000000000020 +25370 clk cpu0 IT (25334) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25370 clk cpu0 R X11 0000000000000017 +25371 clk cpu0 IT (25335) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25371 clk cpu0 R cpsr 200003c0 +25372 clk cpu0 IT (25336) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25372 clk cpu0 R X14 0000000065737500 +25373 clk cpu0 IT (25337) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25373 clk cpu0 R X12 0000000065737520 +25374 clk cpu0 IT (25338) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25374 clk cpu0 MW4 03045784:000000845784_NS 65737520 +25374 clk cpu0 R X0 0000000003045788 +25375 clk cpu0 IT (25339) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25375 clk cpu0 R X12 0000000064657375 +25376 clk cpu0 IT (25340) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25377 clk cpu0 IT (25341) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25377 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +25377 clk cpu0 R X8 000000000004C030 +25377 clk cpu0 R X13 000000005F27203A +25378 clk cpu0 IT (25342) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25378 clk cpu0 R X12 0000000000000064 +25379 clk cpu0 IT (25343) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25379 clk cpu0 R X11 0000000000000013 +25380 clk cpu0 IT (25344) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25380 clk cpu0 R cpsr 200003c0 +25381 clk cpu0 IT (25345) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25381 clk cpu0 R X14 0000000027203A00 +25382 clk cpu0 IT (25346) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25382 clk cpu0 R X12 0000000027203A64 +25383 clk cpu0 IT (25347) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25383 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +25383 clk cpu0 R X0 000000000304578C +25384 clk cpu0 IT (25348) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25384 clk cpu0 R X12 000000005F27203A +25385 clk cpu0 IT (25349) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25386 clk cpu0 IT (25350) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25386 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +25386 clk cpu0 R X8 000000000004C034 +25386 clk cpu0 R X13 0000000045202E27 +25387 clk cpu0 IT (25351) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25387 clk cpu0 R X12 000000000000005F +25388 clk cpu0 IT (25352) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25388 clk cpu0 R X11 000000000000000F +25389 clk cpu0 IT (25353) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25389 clk cpu0 R cpsr 200003c0 +25390 clk cpu0 IT (25354) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25390 clk cpu0 R X14 00000000202E2700 +25391 clk cpu0 IT (25355) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25391 clk cpu0 R X12 00000000202E275F +25392 clk cpu0 IT (25356) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25392 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +25392 clk cpu0 R X0 0000000003045790 +25393 clk cpu0 IT (25357) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25393 clk cpu0 R X12 0000000045202E27 +25394 clk cpu0 IT (25358) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25395 clk cpu0 IT (25359) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25395 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +25395 clk cpu0 R X8 000000000004C038 +25395 clk cpu0 R X13 000000006E69646E +25396 clk cpu0 IT (25360) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25396 clk cpu0 R X12 0000000000000045 +25397 clk cpu0 IT (25361) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25397 clk cpu0 R X11 000000000000000B +25398 clk cpu0 IT (25362) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25398 clk cpu0 R cpsr 200003c0 +25399 clk cpu0 IT (25363) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25399 clk cpu0 R X14 0000000069646E00 +25400 clk cpu0 IT (25364) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25400 clk cpu0 R X12 0000000069646E45 +25401 clk cpu0 IT (25365) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25401 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +25401 clk cpu0 R X0 0000000003045794 +25402 clk cpu0 IT (25366) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25402 clk cpu0 R X12 000000006E69646E +25403 clk cpu0 IT (25367) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25404 clk cpu0 IT (25368) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25404 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +25404 clk cpu0 R X8 000000000004C03C +25404 clk cpu0 R X13 0000000065542067 +25405 clk cpu0 IT (25369) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25405 clk cpu0 R X12 000000000000006E +25406 clk cpu0 IT (25370) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25406 clk cpu0 R X11 0000000000000007 +25407 clk cpu0 IT (25371) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25407 clk cpu0 R cpsr 200003c0 +25408 clk cpu0 IT (25372) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25408 clk cpu0 R X14 0000000054206700 +25409 clk cpu0 IT (25373) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25409 clk cpu0 R X12 000000005420676E +25410 clk cpu0 IT (25374) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25410 clk cpu0 MW4 03045794:000000845794_NS 5420676e +25410 clk cpu0 R X0 0000000003045798 +25411 clk cpu0 IT (25375) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25411 clk cpu0 R X12 0000000065542067 +25412 clk cpu0 IT (25376) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25413 clk cpu0 IT (25377) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25413 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +25413 clk cpu0 R X8 000000000004C040 +25413 clk cpu0 R X13 000000000A2E7473 +25414 clk cpu0 IT (25378) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25414 clk cpu0 R X12 0000000000000065 +25415 clk cpu0 IT (25379) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25415 clk cpu0 R X11 0000000000000003 +25416 clk cpu0 IT (25380) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25416 clk cpu0 R cpsr 600003c0 +25417 clk cpu0 IT (25381) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25417 clk cpu0 R X14 000000002E747300 +25418 clk cpu0 IT (25382) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25418 clk cpu0 R X12 000000002E747365 +25419 clk cpu0 IT (25383) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25419 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +25419 clk cpu0 R X0 000000000304579C +25420 clk cpu0 IT (25384) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25420 clk cpu0 R X12 000000000A2E7473 +25421 clk cpu0 IS (25385) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25422 clk cpu0 IT (25386) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +25422 clk cpu0 R X2 0000000000000003 +25423 clk cpu0 IT (25387) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +25423 clk cpu0 R X9 0000000000000001 +25424 clk cpu0 IT (25388) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +25424 clk cpu0 R X8 000000000004C03F +25425 clk cpu0 IT (25389) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +25425 clk cpu0 R X1 000000000004C043 +25426 clk cpu0 IT (25390) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +25426 clk cpu0 R cpsr 200003c0 +25427 clk cpu0 IS (25391) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +25428 clk cpu0 IT (25392) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +25428 clk cpu0 MR1 0004c043:00001004c043_NS 0a +25428 clk cpu0 R X8 000000000000000A +25429 clk cpu0 IT (25393) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +25429 clk cpu0 MW1 0304579c:00000084579c_NS 0a +25430 clk cpu0 IS (25394) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +25431 clk cpu0 IT (25395) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +25431 clk cpu0 MR1 0004c044:00001004c044_NS 00 +25431 clk cpu0 R X8 0000000000000000 +25432 clk cpu0 IT (25396) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +25432 clk cpu0 R cpsr 600003c0 +25433 clk cpu0 IT (25397) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +25433 clk cpu0 MW1 0304579d:00000084579d_NS 00 +25434 clk cpu0 IS (25398) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +25435 clk cpu0 IT (25399) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +25435 clk cpu0 MR1 0004c045:00001004c045_NS 00 +25435 clk cpu0 R X8 0000000000000000 +25436 clk cpu0 IT (25400) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +25436 clk cpu0 MW1 0304579e:00000084579e_NS 00 +25437 clk cpu0 IT (25401) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +25438 clk cpu0 IT (25402) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +25438 clk cpu0 R X0 0000000003045764 +25439 clk cpu0 IT (25403) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +25439 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +25439 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +25439 clk cpu0 R SP_EL0 0000000003045760 +25439 clk cpu0 R X19 0000000003045830 +25439 clk cpu0 R X30 0000000000092B80 +25440 clk cpu0 IT (25404) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +25441 clk cpu0 IT (25405) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +25441 clk cpu0 R X22 000000000004C000 +25442 clk cpu0 IT (25406) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +25442 clk cpu0 R X23 000000000004C000 +25443 clk cpu0 IT (25407) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +25443 clk cpu0 R X26 0000000000000000 +25444 clk cpu0 IT (25408) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +25444 clk cpu0 R X21 0000000003029000 +25445 clk cpu0 IT (25409) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +25445 clk cpu0 R X22 000000000004C108 +25446 clk cpu0 IT (25410) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +25446 clk cpu0 R X23 000000000004C129 +25447 clk cpu0 IT (25411) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +25447 clk cpu0 R X24 0000000003041000 +25448 clk cpu0 IT (25412) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +25448 clk cpu0 R X25 0000000006216000 +25449 clk cpu0 IT (25413) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +25450 clk cpu0 IT (25414) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25450 clk cpu0 MR1 0004d0cc:00001004d0cc_NS 0a +25450 clk cpu0 R X8 000000000000000A +25451 clk cpu0 IT (25415) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25451 clk cpu0 R cpsr 800003c0 +25452 clk cpu0 IS (25416) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25453 clk cpu0 IS (25417) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25454 clk cpu0 IT (25418) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25454 clk cpu0 R cpsr 000003c0 +25455 clk cpu0 IT (25419) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25456 clk cpu0 IT (25420) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25456 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25456 clk cpu0 R X9 0000000013000000 +25457 clk cpu0 IT (25421) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25457 clk cpu0 R X27 000000000004D0CC +25458 clk cpu0 IT (25422) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25458 clk cpu0 R X20 000000000004D0CD +TUBE CPU0: +25459 clk cpu0 IT (25423) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25459 clk cpu0 MW1 13000000:000013000000_NS 0a +25460 clk cpu0 IT (25424) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25460 clk cpu0 MR1 0004d0cd:00001004d0cd_NS 3e +25460 clk cpu0 R X8 000000000000003E +25461 clk cpu0 IT (25425) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25461 clk cpu0 R cpsr 200003c0 +25462 clk cpu0 IS (25426) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25463 clk cpu0 IS (25427) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25464 clk cpu0 IT (25428) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25464 clk cpu0 R cpsr 000003c0 +25465 clk cpu0 IT (25429) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25466 clk cpu0 IT (25430) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25466 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25466 clk cpu0 R X9 0000000013000000 +25467 clk cpu0 IT (25431) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25467 clk cpu0 R X27 000000000004D0CD +25468 clk cpu0 IT (25432) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25468 clk cpu0 R X20 000000000004D0CE +25469 clk cpu0 IT (25433) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25469 clk cpu0 MW1 13000000:000013000000_NS 3e +25470 clk cpu0 IT (25434) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25470 clk cpu0 MR1 0004d0ce:00001004d0ce_NS 3e +25470 clk cpu0 R X8 000000000000003E +25471 clk cpu0 IT (25435) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25471 clk cpu0 R cpsr 200003c0 +25472 clk cpu0 IS (25436) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25473 clk cpu0 IS (25437) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25474 clk cpu0 IT (25438) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25474 clk cpu0 R cpsr 000003c0 +25475 clk cpu0 IT (25439) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25476 clk cpu0 IT (25440) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25476 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25476 clk cpu0 R X9 0000000013000000 +25477 clk cpu0 IT (25441) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25477 clk cpu0 R X27 000000000004D0CE +25478 clk cpu0 IT (25442) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25478 clk cpu0 R X20 000000000004D0CF +25479 clk cpu0 IT (25443) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25479 clk cpu0 MW1 13000000:000013000000_NS 3e +25480 clk cpu0 IT (25444) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25480 clk cpu0 MR1 0004d0cf:00001004d0cf_NS 43 +25480 clk cpu0 R X8 0000000000000043 +25481 clk cpu0 IT (25445) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25481 clk cpu0 R cpsr 200003c0 +25482 clk cpu0 IS (25446) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25483 clk cpu0 IS (25447) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25484 clk cpu0 IT (25448) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25484 clk cpu0 R cpsr 000003c0 +25485 clk cpu0 IT (25449) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25486 clk cpu0 IT (25450) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25486 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25486 clk cpu0 R X9 0000000013000000 +25487 clk cpu0 IT (25451) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25487 clk cpu0 R X27 000000000004D0CF +25488 clk cpu0 IT (25452) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25488 clk cpu0 R X20 000000000004D0D0 +25489 clk cpu0 IT (25453) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25489 clk cpu0 MW1 13000000:000013000000_NS 43 +25490 clk cpu0 IT (25454) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25490 clk cpu0 MR1 0004d0d0:00001004d0d0_NS 50 +25490 clk cpu0 R X8 0000000000000050 +25491 clk cpu0 IT (25455) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25491 clk cpu0 R cpsr 200003c0 +25492 clk cpu0 IS (25456) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25493 clk cpu0 IS (25457) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25494 clk cpu0 IT (25458) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25494 clk cpu0 R cpsr 400003c0 +25495 clk cpu0 IS (25459) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25496 clk cpu0 IT (25460) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +25496 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +25496 clk cpu0 R X8 0000000000000000 +25497 clk cpu0 IT (25461) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +25497 clk cpu0 MR8 0004d0d0:00001004d0d0_NS 3e0a000a_64255550 +25497 clk cpu0 R X0 3E0A000A64255550 +25498 clk cpu0 IT (25462) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +25498 clk cpu0 R cpsr 800003c0 +25499 clk cpu0 IT (25463) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +25500 clk cpu0 IT (25464) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +25500 clk cpu0 R X27 0000000000000000 +25501 clk cpu0 IT (25465) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +25501 clk cpu0 R X28 000000000004D0D0 +25502 clk cpu0 IT (25466) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +25502 clk cpu0 R X8 00000000FFFFFFF8 +25503 clk cpu0 IT (25467) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25503 clk cpu0 R cpsr 000003c0 +25503 clk cpu0 R X9 0000000000000050 +25504 clk cpu0 IS (25468) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25505 clk cpu0 IT (25469) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25505 clk cpu0 R cpsr 200003c0 +25506 clk cpu0 IS (25470) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25507 clk cpu0 IT (25471) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25507 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25507 clk cpu0 R X9 0000000013000000 +25508 clk cpu0 IT (25472) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25508 clk cpu0 R cpsr 800003c0 +25508 clk cpu0 R X8 00000000FFFFFFF9 +25509 clk cpu0 IT (25473) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25509 clk cpu0 MW1 13000000:000013000000_NS 50 +25510 clk cpu0 IT (25474) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25510 clk cpu0 R X0 003E0A000A642555 +25511 clk cpu0 IT (25475) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25512 clk cpu0 IT (25476) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25512 clk cpu0 R cpsr 000003c0 +25512 clk cpu0 R X9 0000000000000055 +25513 clk cpu0 IS (25477) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25514 clk cpu0 IT (25478) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25514 clk cpu0 R cpsr 200003c0 +25515 clk cpu0 IS (25479) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25516 clk cpu0 IT (25480) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25516 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25516 clk cpu0 R X9 0000000013000000 +25517 clk cpu0 IT (25481) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25517 clk cpu0 R cpsr 800003c0 +25517 clk cpu0 R X8 00000000FFFFFFFA +25518 clk cpu0 IT (25482) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25518 clk cpu0 MW1 13000000:000013000000_NS 55 +25519 clk cpu0 IT (25483) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25519 clk cpu0 R X0 00003E0A000A6425 +25520 clk cpu0 IT (25484) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25521 clk cpu0 IT (25485) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25521 clk cpu0 R cpsr 000003c0 +25521 clk cpu0 R X9 0000000000000025 +25522 clk cpu0 IS (25486) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25523 clk cpu0 IT (25487) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25523 clk cpu0 R cpsr 600003c0 +25524 clk cpu0 IT (25488) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25525 clk cpu0 IT (25489) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +25525 clk cpu0 R X8 00000000FFFFFFFA +25526 clk cpu0 IT (25490) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +25526 clk cpu0 R X9 0000000000000001 +25527 clk cpu0 IT (25491) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +25527 clk cpu0 R X9 000000000004D0D1 +25528 clk cpu0 IT (25492) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +25528 clk cpu0 R cpsr 200003c0 +25529 clk cpu0 IT (25493) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +25529 clk cpu0 R X27 000000000004D0D1 +25530 clk cpu0 IT (25494) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +25530 clk cpu0 R X20 000000000004D0D2 +25531 clk cpu0 IT (25495) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +25532 clk cpu0 IT (25496) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25532 clk cpu0 MR1 0004d0d2:00001004d0d2_NS 25 +25532 clk cpu0 R X8 0000000000000025 +25533 clk cpu0 IT (25497) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25533 clk cpu0 R cpsr 600003c0 +25534 clk cpu0 IT (25498) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25535 clk cpu0 IT (25499) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +25535 clk cpu0 MW4 03029734:000000829734_NS 00000000 +25536 clk cpu0 IT (25500) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +25536 clk cpu0 R X27 000000000004D0D2 +25537 clk cpu0 IT (25501) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +25537 clk cpu0 MR1 0004d0d3:00001004d0d3_NS 64 +25537 clk cpu0 R X27 000000000004D0D3 +25537 clk cpu0 R X28 0000000000000064 +25538 clk cpu0 IT (25502) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +25538 clk cpu0 R cpsr 200003c0 +25539 clk cpu0 IS (25503) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +25540 clk cpu0 IT (25504) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +25541 clk cpu0 IT (25505) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +25541 clk cpu0 R X8 000000000000000C +25542 clk cpu0 IT (25506) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +25542 clk cpu0 R cpsr 800003c0 +25543 clk cpu0 IS (25507) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +25544 clk cpu0 IT (25508) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +25544 clk cpu0 R X9 0000000000092CE0 +25545 clk cpu0 IT (25509) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +25545 clk cpu0 MR1 0004c114:00001004c114_NS 0e +25545 clk cpu0 R X10 000000000000000E +25546 clk cpu0 IT (25510) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +25546 clk cpu0 R X9 0000000000092D18 +25547 clk cpu0 IT (25511) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +25547 clk cpu0 R cpsr 800007c0 +25548 clk cpu0 IT (25512) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +25548 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +25548 clk cpu0 R cpsr 800003c0 +25548 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +25549 clk cpu0 IS (25513) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +25550 clk cpu0 IT (25514) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +25550 clk cpu0 R X9 00000000FFFFFFD8 +25551 clk cpu0 IT (25515) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +25551 clk cpu0 R cpsr a00003c0 +25552 clk cpu0 IT (25516) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +25552 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +25553 clk cpu0 IT (25517) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +25554 clk cpu0 IT (25518) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +25554 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +25554 clk cpu0 R X9 0000000003045830 +25555 clk cpu0 IT (25519) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +25555 clk cpu0 R X8 0000000003045800 +25556 clk cpu0 IT (25520) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +25557 clk cpu0 IT (25521) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +25557 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000001 +25557 clk cpu0 R X0 0000000000000001 +25558 clk cpu0 IT (25522) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +25558 clk cpu0 R X1 000000000000000A +25559 clk cpu0 IT (25523) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +25559 clk cpu0 R X30 0000000000092D48 +25560 clk cpu0 IT (25524) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +25560 clk cpu0 R SP_EL0 0000000003045740 +25561 clk cpu0 IT (25525) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +25561 clk cpu0 R X8 3030303030303030 +25562 clk cpu0 IT (25526) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +25562 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +25562 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +25563 clk cpu0 IT (25527) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +25563 clk cpu0 MW4 03045758:000000845758_NS 30303030 +25564 clk cpu0 IS (25528) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +25565 clk cpu0 IT (25529) 00095680:000010095680_NS aa1f03eb O EL0t_n : MOV x11,xzr +25565 clk cpu0 R X11 0000000000000000 +25566 clk cpu0 IT (25530) 00095684:000010095684_NS 2a0103e8 O EL0t_n : MOV w8,w1 +25566 clk cpu0 R X8 000000000000000A +25567 clk cpu0 IT (25531) 00095688:000010095688_NS 1103dc29 O EL0t_n : ADD w9,w1,#0xf7 +25567 clk cpu0 R X9 0000000000000101 +25568 clk cpu0 IT (25532) 0009568c:00001009568c_NS 910023ea O EL0t_n : ADD x10,sp,#8 +25568 clk cpu0 R X10 0000000003045748 +25569 clk cpu0 IT (25533) 00095690:000010095690_NS 9ac8080c O EL0t_n : UDIV x12,x0,x8 +25569 clk cpu0 R X12 0000000000000000 +25570 clk cpu0 IT (25534) 00095694:000010095694_NS 1b08818d O EL0t_n : MSUB w13,w12,w8,w0 +25570 clk cpu0 R X13 0000000000000001 +25571 clk cpu0 IT (25535) 00095698:000010095698_NS 710025bf O EL0t_n : CMP w13,#9 +25571 clk cpu0 R cpsr 800003c0 +25572 clk cpu0 IT (25536) 0009569c:00001009569c_NS 1a9f812e O EL0t_n : CSEL w14,w9,wzr,HI +25572 clk cpu0 R X14 0000000000000000 +25573 clk cpu0 IT (25537) 000956a0:0000100956a0_NS 0b0d01cd O EL0t_n : ADD w13,w14,w13 +25573 clk cpu0 R X13 0000000000000001 +25574 clk cpu0 IT (25538) 000956a4:0000100956a4_NS 1100c1ad O EL0t_n : ADD w13,w13,#0x30 +25574 clk cpu0 R X13 0000000000000031 +25575 clk cpu0 IT (25539) 000956a8:0000100956a8_NS eb08001f O EL0t_n : CMP x0,x8 +25575 clk cpu0 R cpsr 800003c0 +25576 clk cpu0 IT (25540) 000956ac:0000100956ac_NS 382b694d O EL0t_n : STRB w13,[x10,x11] +25576 clk cpu0 MW1 03045748:000000845748_NS 31 +25577 clk cpu0 IT (25541) 000956b0:0000100956b0_NS 9100056b O EL0t_n : ADD x11,x11,#1 +25577 clk cpu0 R X11 0000000000000001 +25578 clk cpu0 IT (25542) 000956b4:0000100956b4_NS aa0c03e0 O EL0t_n : MOV x0,x12 +25578 clk cpu0 R X0 0000000000000000 +25579 clk cpu0 IS (25543) 000956b8:0000100956b8_NS 54fffec2 O EL0t_n : B.CS 0x95690 +25580 clk cpu0 IT (25544) 000956bc:0000100956bc_NS 14000002 O EL0t_n : B 0x956c4 +25581 clk cpu0 IT (25545) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +25581 clk cpu0 R X8 0000000003029000 +25582 clk cpu0 IT (25546) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +25582 clk cpu0 MR4 03029734:000000829734_NS 00000000 +25582 clk cpu0 R X8 0000000000000000 +25583 clk cpu0 IT (25547) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +25583 clk cpu0 R cpsr 800003c0 +25584 clk cpu0 IT (25548) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +25584 clk cpu0 R X8 0000000000000001 +25585 clk cpu0 IT (25549) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +25585 clk cpu0 R cpsr 600003c0 +25586 clk cpu0 IS (25550) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +25587 clk cpu0 IT (25551) 000956dc:0000100956dc_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +25587 clk cpu0 R X9 0000000003045748 +25588 clk cpu0 IT (25552) 000956e0:0000100956e0_NS 93407d08 O EL0t_n : SXTW x8,w8 +25588 clk cpu0 R X8 0000000000000001 +25589 clk cpu0 IT (25553) 000956e4:0000100956e4_NS d1000529 O EL0t_n : SUB x9,x9,#1 +25589 clk cpu0 R X9 0000000003045747 +25590 clk cpu0 IT (25554) 000956e8:0000100956e8_NS b0030c0a O EL0t_n : ADRP x10,0x62166e8 +25590 clk cpu0 R X10 0000000006216000 +25591 clk cpu0 IT (25555) 000956ec:0000100956ec_NS 3868692b O EL0t_n : LDRB w11,[x9,x8] +25591 clk cpu0 MR1 03045748:000000845748_NS 31 +25591 clk cpu0 R X11 0000000000000031 +25592 clk cpu0 IT (25556) 000956f0:0000100956f0_NS f940714c O EL0t_n : LDR x12,[x10,#0xe0] +25592 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25592 clk cpu0 R X12 0000000013000000 +25593 clk cpu0 IT (25557) 000956f4:0000100956f4_NS d1000508 O EL0t_n : SUB x8,x8,#1 +25593 clk cpu0 R X8 0000000000000000 +25594 clk cpu0 IT (25558) 000956f8:0000100956f8_NS f100011f O EL0t_n : CMP x8,#0 +25594 clk cpu0 R cpsr 600003c0 +25595 clk cpu0 IT (25559) 000956fc:0000100956fc_NS 3900018b O EL0t_n : STRB w11,[x12,#0] +25595 clk cpu0 MW1 13000000:000013000000_NS 31 +25596 clk cpu0 IS (25560) 00095700:000010095700_NS 54ffff6c O EL0t_n : B.GT 0x956ec +25597 clk cpu0 IT (25561) 00095704:000010095704_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +25597 clk cpu0 R SP_EL0 0000000003045760 +25598 clk cpu0 IT (25562) 00095708:000010095708_NS d65f03c0 O EL0t_n : RET +25599 clk cpu0 IT (25563) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +25599 clk cpu0 R X20 000000000004D0D4 +25600 clk cpu0 IT (25564) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +25601 clk cpu0 IT (25565) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25601 clk cpu0 MR1 0004d0d4:00001004d0d4_NS 0a +25601 clk cpu0 R X8 000000000000000A +25602 clk cpu0 IT (25566) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25602 clk cpu0 R cpsr 800003c0 +25603 clk cpu0 IS (25567) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25604 clk cpu0 IS (25568) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25605 clk cpu0 IT (25569) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25605 clk cpu0 R cpsr 000003c0 +25606 clk cpu0 IT (25570) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25607 clk cpu0 IT (25571) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25607 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25607 clk cpu0 R X9 0000000013000000 +25608 clk cpu0 IT (25572) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25608 clk cpu0 R X27 000000000004D0D4 +25609 clk cpu0 IT (25573) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25609 clk cpu0 R X20 000000000004D0D5 +TUBE CPU0: >>CPU1 +25610 clk cpu0 IT (25574) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25610 clk cpu0 MW1 13000000:000013000000_NS 0a +25611 clk cpu0 IT (25575) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25611 clk cpu0 MR1 0004d0d5:00001004d0d5_NS 00 +25611 clk cpu0 R X8 0000000000000000 +25612 clk cpu0 IT (25576) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25612 clk cpu0 R cpsr 800003c0 +25613 clk cpu0 IS (25577) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25614 clk cpu0 IT (25578) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25615 clk cpu0 IT (25579) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +25616 clk cpu0 IT (25580) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +25616 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d0cc +25616 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +25616 clk cpu0 R X19 000000000004D0CC +25616 clk cpu0 R X30 000000000009C560 +25617 clk cpu0 IT (25581) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +25617 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +25617 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +25617 clk cpu0 R X20 0000000003008528 +25617 clk cpu0 R X21 0000000000000000 +25618 clk cpu0 IT (25582) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +25618 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +25618 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +25618 clk cpu0 R X22 000000000004D076 +25618 clk cpu0 R X23 000000000004D06C +25619 clk cpu0 IT (25583) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +25619 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +25619 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +25619 clk cpu0 R X24 000000000004D080 +25619 clk cpu0 R X25 0000000006216000 +25620 clk cpu0 IT (25584) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +25620 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +25620 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216040 +25620 clk cpu0 R X26 0000000006216040 +25620 clk cpu0 R X27 0001000100010001 +25621 clk cpu0 IT (25585) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +25621 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +25621 clk cpu0 R X28 FF7FFF7FFF7FFF7F +25622 clk cpu0 IT (25586) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +25622 clk cpu0 R SP_EL0 0000000003045800 +25623 clk cpu0 IT (25587) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +25624 clk cpu0 IT (25588) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +25624 clk cpu0 R X0 0000000000000001 +25625 clk cpu0 IT (25589) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +25625 clk cpu0 R X1 0000000000000000 +25626 clk cpu0 IT (25590) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +25626 clk cpu0 R X2 0000000000000000 +25627 clk cpu0 IT (25591) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +25628 clk cpu0 IT (25592) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +25629 clk cpu0 IT (25593) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +25629 clk cpu0 R X0 0000000003008528 +25630 clk cpu0 IT (25594) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +25630 clk cpu0 R X30 000000000009C57C +25631 clk cpu0 IT (25595) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +25632 clk cpu0 IT (25596) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +25632 clk cpu0 R X8 0000000006216000 +25633 clk cpu0 IT (25597) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +25633 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +25633 clk cpu0 R X8 0000000000000001 +25634 clk cpu0 IT (25598) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +25634 clk cpu0 R cpsr 800003c0 +25635 clk cpu0 IT (25599) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +25636 clk cpu0 IT (25600) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +25637 clk cpu0 IT (25601) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +25637 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000001 +25637 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b480 +25637 clk cpu0 R X19 0000000000000001 +25637 clk cpu0 R X30 000000000009B480 +25638 clk cpu0 IT (25602) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +25638 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +25638 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +25638 clk cpu0 R X20 000000000004D0CC +25638 clk cpu0 R X21 000000000004CF91 +25639 clk cpu0 IT (25603) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +25639 clk cpu0 R SP_EL0 0000000003045890 +25640 clk cpu0 IT (25604) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +25641 clk cpu0 IT (25605) 0009b480:00001009b480_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +25641 clk cpu0 R X0 0000000000000000 +25642 clk cpu0 IT (25606) 0009b484:00001009b484_NS aa1503e1 O EL0t_n : MOV x1,x21 +25642 clk cpu0 R X1 000000000004CF91 +25643 clk cpu0 IT (25607) 0009b488:00001009b488_NS 94000411 O EL0t_n : BL 0x9c4cc +25643 clk cpu0 R X30 000000000009B48C +25644 clk cpu0 IT (25608) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +25644 clk cpu0 R SP_EL0 0000000003045800 +25645 clk cpu0 IT (25609) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +25645 clk cpu0 R X8 0000000006216000 +25646 clk cpu0 IT (25610) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +25646 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +25646 clk cpu0 R X8 0000000000000003 +25647 clk cpu0 IT (25611) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +25647 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +25647 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +25648 clk cpu0 IT (25612) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +25648 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000001 +25648 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b48c +25649 clk cpu0 IT (25613) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +25649 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +25649 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +25650 clk cpu0 IT (25614) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +25650 clk cpu0 R cpsr 200003c0 +25651 clk cpu0 IT (25615) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +25651 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +25651 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +25652 clk cpu0 IT (25616) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +25652 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +25652 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +25653 clk cpu0 IT (25617) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +25653 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +25653 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +25654 clk cpu0 IT (25618) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +25654 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +25654 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +25655 clk cpu0 IS (25619) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +25656 clk cpu0 IT (25620) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +25656 clk cpu0 R X20 0000000003008000 +25657 clk cpu0 IT (25621) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +25657 clk cpu0 R X20 0000000003008528 +25658 clk cpu0 IT (25622) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +25658 clk cpu0 R X0 0000000003008528 +25659 clk cpu0 IT (25623) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +25659 clk cpu0 R X19 000000000004CF91 +25660 clk cpu0 IT (25624) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +25660 clk cpu0 R X30 000000000009C510 +25661 clk cpu0 IT (25625) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +25661 clk cpu0 R X8 0000000006216000 +25662 clk cpu0 IT (25626) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +25662 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +25662 clk cpu0 R X8 0000000000000001 +25663 clk cpu0 IT (25627) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +25663 clk cpu0 R cpsr 800003c0 +25664 clk cpu0 IT (25628) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +25665 clk cpu0 IT (25629) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +25666 clk cpu0 IT (25630) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +25666 clk cpu0 R X9 0000000003045800 +25667 clk cpu0 IT (25631) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +25667 clk cpu0 R X8 00000000FFFFFFD0 +25668 clk cpu0 IT (25632) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +25668 clk cpu0 R X10 0000000003045890 +25669 clk cpu0 IT (25633) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +25669 clk cpu0 R X9 0000000003045830 +25670 clk cpu0 IT (25634) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +25670 clk cpu0 R X0 0000000000000000 +25671 clk cpu0 IT (25635) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +25671 clk cpu0 R X1 0000000000000000 +25672 clk cpu0 IT (25636) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +25672 clk cpu0 R X2 0000000000000000 +25673 clk cpu0 IT (25637) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +25673 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +25674 clk cpu0 IT (25638) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +25674 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +25674 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +25675 clk cpu0 IT (25639) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +25676 clk cpu0 IT (25640) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +25676 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +25676 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +25676 clk cpu0 R X8 0000000000000000 +25676 clk cpu0 R X10 0000000003045830 +25677 clk cpu0 IT (25641) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +25677 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +25677 clk cpu0 R X9 0000000003045890 +25678 clk cpu0 IT (25642) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +25678 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +25678 clk cpu0 R X11 00000000FFFFFFD0 +25679 clk cpu0 IT (25643) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +25679 clk cpu0 R X21 0000000000000000 +25680 clk cpu0 IT (25644) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +25680 clk cpu0 R X1 0000000003045830 +25681 clk cpu0 IT (25645) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +25681 clk cpu0 R X0 000000000004CF91 +25682 clk cpu0 IT (25646) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +25682 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +25682 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +25683 clk cpu0 IT (25647) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +25683 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +25684 clk cpu0 IT (25648) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +25684 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +25685 clk cpu0 IT (25649) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +25685 clk cpu0 R X30 000000000009C560 +25686 clk cpu0 IT (25650) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +25686 clk cpu0 R SP_EL0 0000000003045760 +25687 clk cpu0 IT (25651) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +25687 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004cf91 +25687 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +25688 clk cpu0 IT (25652) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +25688 clk cpu0 R X19 0000000003045830 +25689 clk cpu0 IT (25653) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +25689 clk cpu0 R X1 000000000004C000 +25690 clk cpu0 IT (25654) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +25690 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +25690 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +25691 clk cpu0 IT (25655) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +25691 clk cpu0 R X20 000000000004CF91 +25692 clk cpu0 IT (25656) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +25692 clk cpu0 R X1 000000000004C00B +25693 clk cpu0 IT (25657) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +25693 clk cpu0 R X0 0000000003045764 +25694 clk cpu0 IT (25658) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +25694 clk cpu0 R X2 000000000000003B +25695 clk cpu0 IT (25659) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +25695 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +25696 clk cpu0 IT (25660) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +25696 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +25696 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216040 +25697 clk cpu0 IT (25661) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +25697 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +25697 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +25698 clk cpu0 IT (25662) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +25698 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +25698 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +25699 clk cpu0 IT (25663) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +25699 clk cpu0 R X30 0000000000092B80 +25700 clk cpu0 IT (25664) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +25700 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +25700 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +25700 clk cpu0 R SP_EL0 0000000003045750 +25701 clk cpu0 IT (25665) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +25701 clk cpu0 R X19 0000000003045764 +25702 clk cpu0 IT (25666) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +25702 clk cpu0 R X30 00000000000104DC +25703 clk cpu0 IT (25667) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +25703 clk cpu0 R cpsr 200003c0 +25704 clk cpu0 IS (25668) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +25705 clk cpu0 IT (25669) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +25705 clk cpu0 R cpsr 400003c0 +25706 clk cpu0 IT (25670) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +25707 clk cpu0 IT (25671) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +25707 clk cpu0 R cpsr 000003c0 +25707 clk cpu0 R X10 0000000000000003 +25708 clk cpu0 IS (25672) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +25709 clk cpu0 IT (25673) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +25709 clk cpu0 R X9 0000000000000020 +25710 clk cpu0 IT (25674) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +25710 clk cpu0 R X8 000000000004C008 +25711 clk cpu0 IT (25675) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +25711 clk cpu0 R cpsr 200003c0 +25712 clk cpu0 IT (25676) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +25712 clk cpu0 R X9 0000000000000008 +25713 clk cpu0 IS (25677) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +25714 clk cpu0 IT (25678) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +25714 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +25714 clk cpu0 R X12 000000000A00000A +25715 clk cpu0 IT (25679) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +25715 clk cpu0 R X10 0000000000000018 +25716 clk cpu0 IT (25680) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +25716 clk cpu0 R X11 000000000000003B +25717 clk cpu0 IT (25681) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25717 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +25717 clk cpu0 R X8 000000000004C00C +25717 clk cpu0 R X13 000000006F727245 +25718 clk cpu0 IT (25682) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25718 clk cpu0 R X12 000000000000000A +25719 clk cpu0 IT (25683) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25719 clk cpu0 R X11 0000000000000037 +25720 clk cpu0 IT (25684) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25720 clk cpu0 R cpsr 200003c0 +25721 clk cpu0 IT (25685) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25721 clk cpu0 R X14 0000000072724500 +25722 clk cpu0 IT (25686) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25722 clk cpu0 R X12 000000007272450A +25723 clk cpu0 IT (25687) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25723 clk cpu0 MW4 03045764:000000845764_NS 7272450a +25723 clk cpu0 R X0 0000000003045768 +25724 clk cpu0 IT (25688) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25724 clk cpu0 R X12 000000006F727245 +25725 clk cpu0 IT (25689) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25726 clk cpu0 IT (25690) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25726 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +25726 clk cpu0 R X8 000000000004C010 +25726 clk cpu0 R X13 0000000049203A72 +25727 clk cpu0 IT (25691) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25727 clk cpu0 R X12 000000000000006F +25728 clk cpu0 IT (25692) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25728 clk cpu0 R X11 0000000000000033 +25729 clk cpu0 IT (25693) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25729 clk cpu0 R cpsr 200003c0 +25730 clk cpu0 IT (25694) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25730 clk cpu0 R X14 00000000203A7200 +25731 clk cpu0 IT (25695) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25731 clk cpu0 R X12 00000000203A726F +25732 clk cpu0 IT (25696) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25732 clk cpu0 MW4 03045768:000000845768_NS 203a726f +25732 clk cpu0 R X0 000000000304576C +25733 clk cpu0 IT (25697) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25733 clk cpu0 R X12 0000000049203A72 +25734 clk cpu0 IT (25698) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25735 clk cpu0 IT (25699) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25735 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +25735 clk cpu0 R X8 000000000004C014 +25735 clk cpu0 R X13 0000000067656C6C +25736 clk cpu0 IT (25700) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25736 clk cpu0 R X12 0000000000000049 +25737 clk cpu0 IT (25701) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25737 clk cpu0 R X11 000000000000002F +25738 clk cpu0 IT (25702) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25738 clk cpu0 R cpsr 200003c0 +25739 clk cpu0 IT (25703) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25739 clk cpu0 R X14 00000000656C6C00 +25740 clk cpu0 IT (25704) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25740 clk cpu0 R X12 00000000656C6C49 +25741 clk cpu0 IT (25705) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25741 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +25741 clk cpu0 R X0 0000000003045770 +25742 clk cpu0 IT (25706) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25742 clk cpu0 R X12 0000000067656C6C +25743 clk cpu0 IT (25707) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25744 clk cpu0 IT (25708) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25744 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +25744 clk cpu0 R X8 000000000004C018 +25744 clk cpu0 R X13 0000000066206C61 +25745 clk cpu0 IT (25709) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25745 clk cpu0 R X12 0000000000000067 +25746 clk cpu0 IT (25710) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25746 clk cpu0 R X11 000000000000002B +25747 clk cpu0 IT (25711) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25747 clk cpu0 R cpsr 200003c0 +25748 clk cpu0 IT (25712) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25748 clk cpu0 R X14 00000000206C6100 +25749 clk cpu0 IT (25713) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25749 clk cpu0 R X12 00000000206C6167 +25750 clk cpu0 IT (25714) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25750 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +25750 clk cpu0 R X0 0000000003045774 +25751 clk cpu0 IT (25715) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25751 clk cpu0 R X12 0000000066206C61 +25752 clk cpu0 IT (25716) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25753 clk cpu0 IT (25717) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25753 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +25753 clk cpu0 R X8 000000000004C01C +25753 clk cpu0 R X13 00000000616D726F +25754 clk cpu0 IT (25718) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25754 clk cpu0 R X12 0000000000000066 +25755 clk cpu0 IT (25719) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25755 clk cpu0 R X11 0000000000000027 +25756 clk cpu0 IT (25720) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25756 clk cpu0 R cpsr 200003c0 +25757 clk cpu0 IT (25721) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25757 clk cpu0 R X14 000000006D726F00 +25758 clk cpu0 IT (25722) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25758 clk cpu0 R X12 000000006D726F66 +25759 clk cpu0 IT (25723) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25759 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +25759 clk cpu0 R X0 0000000003045778 +25760 clk cpu0 IT (25724) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25760 clk cpu0 R X12 00000000616D726F +25761 clk cpu0 IT (25725) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25762 clk cpu0 IT (25726) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25762 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +25762 clk cpu0 R X8 000000000004C020 +25762 clk cpu0 R X13 0000000070732074 +25763 clk cpu0 IT (25727) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25763 clk cpu0 R X12 0000000000000061 +25764 clk cpu0 IT (25728) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25764 clk cpu0 R X11 0000000000000023 +25765 clk cpu0 IT (25729) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25765 clk cpu0 R cpsr 200003c0 +25766 clk cpu0 IT (25730) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25766 clk cpu0 R X14 0000000073207400 +25767 clk cpu0 IT (25731) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25767 clk cpu0 R X12 0000000073207461 +25768 clk cpu0 IT (25732) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25768 clk cpu0 MW4 03045778:000000845778_NS 73207461 +25768 clk cpu0 R X0 000000000304577C +25769 clk cpu0 IT (25733) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25769 clk cpu0 R X12 0000000070732074 +25770 clk cpu0 IT (25734) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25771 clk cpu0 IT (25735) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25771 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +25771 clk cpu0 R X8 000000000004C024 +25771 clk cpu0 R X13 0000000066696365 +25772 clk cpu0 IT (25736) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25772 clk cpu0 R X12 0000000000000070 +25773 clk cpu0 IT (25737) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25773 clk cpu0 R X11 000000000000001F +25774 clk cpu0 IT (25738) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25774 clk cpu0 R cpsr 200003c0 +25775 clk cpu0 IT (25739) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25775 clk cpu0 R X14 0000000069636500 +25776 clk cpu0 IT (25740) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25776 clk cpu0 R X12 0000000069636570 +25777 clk cpu0 IT (25741) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25777 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +25777 clk cpu0 R X0 0000000003045780 +25778 clk cpu0 IT (25742) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25778 clk cpu0 R X12 0000000066696365 +25779 clk cpu0 IT (25743) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25780 clk cpu0 IT (25744) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25780 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +25780 clk cpu0 R X8 000000000004C028 +25780 clk cpu0 R X13 0000000020726569 +25781 clk cpu0 IT (25745) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25781 clk cpu0 R X12 0000000000000066 +25782 clk cpu0 IT (25746) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25782 clk cpu0 R X11 000000000000001B +25783 clk cpu0 IT (25747) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25783 clk cpu0 R cpsr 200003c0 +25784 clk cpu0 IT (25748) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25784 clk cpu0 R X14 0000000072656900 +25785 clk cpu0 IT (25749) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25785 clk cpu0 R X12 0000000072656966 +25786 clk cpu0 IT (25750) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25786 clk cpu0 MW4 03045780:000000845780_NS 72656966 +25786 clk cpu0 R X0 0000000003045784 +25787 clk cpu0 IT (25751) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25787 clk cpu0 R X12 0000000020726569 +25788 clk cpu0 IT (25752) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25789 clk cpu0 IT (25753) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25789 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +25789 clk cpu0 R X8 000000000004C02C +25789 clk cpu0 R X13 0000000064657375 +25790 clk cpu0 IT (25754) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25790 clk cpu0 R X12 0000000000000020 +25791 clk cpu0 IT (25755) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25791 clk cpu0 R X11 0000000000000017 +25792 clk cpu0 IT (25756) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25792 clk cpu0 R cpsr 200003c0 +25793 clk cpu0 IT (25757) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25793 clk cpu0 R X14 0000000065737500 +25794 clk cpu0 IT (25758) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25794 clk cpu0 R X12 0000000065737520 +25795 clk cpu0 IT (25759) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25795 clk cpu0 MW4 03045784:000000845784_NS 65737520 +25795 clk cpu0 R X0 0000000003045788 +25796 clk cpu0 IT (25760) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25796 clk cpu0 R X12 0000000064657375 +25797 clk cpu0 IT (25761) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25798 clk cpu0 IT (25762) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25798 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +25798 clk cpu0 R X8 000000000004C030 +25798 clk cpu0 R X13 000000005F27203A +25799 clk cpu0 IT (25763) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25799 clk cpu0 R X12 0000000000000064 +25800 clk cpu0 IT (25764) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25800 clk cpu0 R X11 0000000000000013 +25801 clk cpu0 IT (25765) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25801 clk cpu0 R cpsr 200003c0 +25802 clk cpu0 IT (25766) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25802 clk cpu0 R X14 0000000027203A00 +25803 clk cpu0 IT (25767) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25803 clk cpu0 R X12 0000000027203A64 +25804 clk cpu0 IT (25768) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25804 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +25804 clk cpu0 R X0 000000000304578C +25805 clk cpu0 IT (25769) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25805 clk cpu0 R X12 000000005F27203A +25806 clk cpu0 IT (25770) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25807 clk cpu0 IT (25771) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25807 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +25807 clk cpu0 R X8 000000000004C034 +25807 clk cpu0 R X13 0000000045202E27 +25808 clk cpu0 IT (25772) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25808 clk cpu0 R X12 000000000000005F +25809 clk cpu0 IT (25773) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25809 clk cpu0 R X11 000000000000000F +25810 clk cpu0 IT (25774) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25810 clk cpu0 R cpsr 200003c0 +25811 clk cpu0 IT (25775) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25811 clk cpu0 R X14 00000000202E2700 +25812 clk cpu0 IT (25776) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25812 clk cpu0 R X12 00000000202E275F +25813 clk cpu0 IT (25777) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25813 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +25813 clk cpu0 R X0 0000000003045790 +25814 clk cpu0 IT (25778) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25814 clk cpu0 R X12 0000000045202E27 +25815 clk cpu0 IT (25779) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25816 clk cpu0 IT (25780) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25816 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +25816 clk cpu0 R X8 000000000004C038 +25816 clk cpu0 R X13 000000006E69646E +25817 clk cpu0 IT (25781) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25817 clk cpu0 R X12 0000000000000045 +25818 clk cpu0 IT (25782) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25818 clk cpu0 R X11 000000000000000B +25819 clk cpu0 IT (25783) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25819 clk cpu0 R cpsr 200003c0 +25820 clk cpu0 IT (25784) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25820 clk cpu0 R X14 0000000069646E00 +25821 clk cpu0 IT (25785) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25821 clk cpu0 R X12 0000000069646E45 +25822 clk cpu0 IT (25786) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25822 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +25822 clk cpu0 R X0 0000000003045794 +25823 clk cpu0 IT (25787) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25823 clk cpu0 R X12 000000006E69646E +25824 clk cpu0 IT (25788) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25825 clk cpu0 IT (25789) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25825 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +25825 clk cpu0 R X8 000000000004C03C +25825 clk cpu0 R X13 0000000065542067 +25826 clk cpu0 IT (25790) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25826 clk cpu0 R X12 000000000000006E +25827 clk cpu0 IT (25791) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25827 clk cpu0 R X11 0000000000000007 +25828 clk cpu0 IT (25792) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25828 clk cpu0 R cpsr 200003c0 +25829 clk cpu0 IT (25793) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25829 clk cpu0 R X14 0000000054206700 +25830 clk cpu0 IT (25794) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25830 clk cpu0 R X12 000000005420676E +25831 clk cpu0 IT (25795) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25831 clk cpu0 MW4 03045794:000000845794_NS 5420676e +25831 clk cpu0 R X0 0000000003045798 +25832 clk cpu0 IT (25796) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25832 clk cpu0 R X12 0000000065542067 +25833 clk cpu0 IT (25797) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25834 clk cpu0 IT (25798) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +25834 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +25834 clk cpu0 R X8 000000000004C040 +25834 clk cpu0 R X13 000000000A2E7473 +25835 clk cpu0 IT (25799) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +25835 clk cpu0 R X12 0000000000000065 +25836 clk cpu0 IT (25800) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +25836 clk cpu0 R X11 0000000000000003 +25837 clk cpu0 IT (25801) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +25837 clk cpu0 R cpsr 600003c0 +25838 clk cpu0 IT (25802) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +25838 clk cpu0 R X14 000000002E747300 +25839 clk cpu0 IT (25803) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +25839 clk cpu0 R X12 000000002E747365 +25840 clk cpu0 IT (25804) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +25840 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +25840 clk cpu0 R X0 000000000304579C +25841 clk cpu0 IT (25805) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +25841 clk cpu0 R X12 000000000A2E7473 +25842 clk cpu0 IS (25806) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +25843 clk cpu0 IT (25807) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +25843 clk cpu0 R X2 0000000000000003 +25844 clk cpu0 IT (25808) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +25844 clk cpu0 R X9 0000000000000001 +25845 clk cpu0 IT (25809) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +25845 clk cpu0 R X8 000000000004C03F +25846 clk cpu0 IT (25810) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +25846 clk cpu0 R X1 000000000004C043 +25847 clk cpu0 IT (25811) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +25847 clk cpu0 R cpsr 200003c0 +25848 clk cpu0 IS (25812) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +25849 clk cpu0 IT (25813) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +25849 clk cpu0 MR1 0004c043:00001004c043_NS 0a +25849 clk cpu0 R X8 000000000000000A +25850 clk cpu0 IT (25814) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +25850 clk cpu0 MW1 0304579c:00000084579c_NS 0a +25851 clk cpu0 IS (25815) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +25852 clk cpu0 IT (25816) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +25852 clk cpu0 MR1 0004c044:00001004c044_NS 00 +25852 clk cpu0 R X8 0000000000000000 +25853 clk cpu0 IT (25817) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +25853 clk cpu0 R cpsr 600003c0 +25854 clk cpu0 IT (25818) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +25854 clk cpu0 MW1 0304579d:00000084579d_NS 00 +25855 clk cpu0 IS (25819) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +25856 clk cpu0 IT (25820) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +25856 clk cpu0 MR1 0004c045:00001004c045_NS 00 +25856 clk cpu0 R X8 0000000000000000 +25857 clk cpu0 IT (25821) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +25857 clk cpu0 MW1 0304579e:00000084579e_NS 00 +25858 clk cpu0 IT (25822) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +25859 clk cpu0 IT (25823) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +25859 clk cpu0 R X0 0000000003045764 +25860 clk cpu0 IT (25824) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +25860 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +25860 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +25860 clk cpu0 R SP_EL0 0000000003045760 +25860 clk cpu0 R X19 0000000003045830 +25860 clk cpu0 R X30 0000000000092B80 +25861 clk cpu0 IT (25825) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +25862 clk cpu0 IT (25826) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +25862 clk cpu0 R X22 000000000004C000 +25863 clk cpu0 IT (25827) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +25863 clk cpu0 R X23 000000000004C000 +25864 clk cpu0 IT (25828) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +25864 clk cpu0 R X26 0000000000000000 +25865 clk cpu0 IT (25829) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +25865 clk cpu0 R X21 0000000003029000 +25866 clk cpu0 IT (25830) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +25866 clk cpu0 R X22 000000000004C108 +25867 clk cpu0 IT (25831) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +25867 clk cpu0 R X23 000000000004C129 +25868 clk cpu0 IT (25832) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +25868 clk cpu0 R X24 0000000003041000 +25869 clk cpu0 IT (25833) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +25869 clk cpu0 R X25 0000000006216000 +25870 clk cpu0 IT (25834) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +25871 clk cpu0 IT (25835) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25871 clk cpu0 MR1 0004cf91:00001004cf91_NS 3e +25871 clk cpu0 R X8 000000000000003E +25872 clk cpu0 IT (25836) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25872 clk cpu0 R cpsr 200003c0 +25873 clk cpu0 IS (25837) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25874 clk cpu0 IS (25838) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25875 clk cpu0 IT (25839) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25875 clk cpu0 R cpsr 000003c0 +25876 clk cpu0 IT (25840) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25877 clk cpu0 IT (25841) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25877 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25877 clk cpu0 R X9 0000000013000000 +25878 clk cpu0 IT (25842) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25878 clk cpu0 R X27 000000000004CF91 +25879 clk cpu0 IT (25843) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25879 clk cpu0 R X20 000000000004CF92 +25880 clk cpu0 IT (25844) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25880 clk cpu0 MW1 13000000:000013000000_NS 3e +25881 clk cpu0 IT (25845) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25881 clk cpu0 MR1 0004cf92:00001004cf92_NS 3e +25881 clk cpu0 R X8 000000000000003E +25882 clk cpu0 IT (25846) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25882 clk cpu0 R cpsr 200003c0 +25883 clk cpu0 IS (25847) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25884 clk cpu0 IS (25848) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25885 clk cpu0 IT (25849) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25885 clk cpu0 R cpsr 000003c0 +25886 clk cpu0 IT (25850) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25887 clk cpu0 IT (25851) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25887 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25887 clk cpu0 R X9 0000000013000000 +25888 clk cpu0 IT (25852) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25888 clk cpu0 R X27 000000000004CF92 +25889 clk cpu0 IT (25853) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25889 clk cpu0 R X20 000000000004CF93 +25890 clk cpu0 IT (25854) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25890 clk cpu0 MW1 13000000:000013000000_NS 3e +25891 clk cpu0 IT (25855) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25891 clk cpu0 MR1 0004cf93:00001004cf93_NS 2d +25891 clk cpu0 R X8 000000000000002D +25892 clk cpu0 IT (25856) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25892 clk cpu0 R cpsr 200003c0 +25893 clk cpu0 IS (25857) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25894 clk cpu0 IS (25858) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25895 clk cpu0 IT (25859) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25895 clk cpu0 R cpsr 000003c0 +25896 clk cpu0 IT (25860) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25897 clk cpu0 IT (25861) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25897 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25897 clk cpu0 R X9 0000000013000000 +25898 clk cpu0 IT (25862) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25898 clk cpu0 R X27 000000000004CF93 +25899 clk cpu0 IT (25863) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25899 clk cpu0 R X20 000000000004CF94 +25900 clk cpu0 IT (25864) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25900 clk cpu0 MW1 13000000:000013000000_NS 2d +25901 clk cpu0 IT (25865) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25901 clk cpu0 MR1 0004cf94:00001004cf94_NS 2d +25901 clk cpu0 R X8 000000000000002D +25902 clk cpu0 IT (25866) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25902 clk cpu0 R cpsr 200003c0 +25903 clk cpu0 IS (25867) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25904 clk cpu0 IS (25868) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25905 clk cpu0 IT (25869) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25905 clk cpu0 R cpsr 000003c0 +25906 clk cpu0 IT (25870) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25907 clk cpu0 IT (25871) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25907 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25907 clk cpu0 R X9 0000000013000000 +25908 clk cpu0 IT (25872) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25908 clk cpu0 R X27 000000000004CF94 +25909 clk cpu0 IT (25873) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25909 clk cpu0 R X20 000000000004CF95 +25910 clk cpu0 IT (25874) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25910 clk cpu0 MW1 13000000:000013000000_NS 2d +25911 clk cpu0 IT (25875) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25911 clk cpu0 MR1 0004cf95:00001004cf95_NS 2d +25911 clk cpu0 R X8 000000000000002D +25912 clk cpu0 IT (25876) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25912 clk cpu0 R cpsr 200003c0 +25913 clk cpu0 IS (25877) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25914 clk cpu0 IS (25878) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25915 clk cpu0 IT (25879) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25915 clk cpu0 R cpsr 000003c0 +25916 clk cpu0 IT (25880) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25917 clk cpu0 IT (25881) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25917 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25917 clk cpu0 R X9 0000000013000000 +25918 clk cpu0 IT (25882) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25918 clk cpu0 R X27 000000000004CF95 +25919 clk cpu0 IT (25883) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25919 clk cpu0 R X20 000000000004CF96 +25920 clk cpu0 IT (25884) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25920 clk cpu0 MW1 13000000:000013000000_NS 2d +25921 clk cpu0 IT (25885) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25921 clk cpu0 MR1 0004cf96:00001004cf96_NS 2d +25921 clk cpu0 R X8 000000000000002D +25922 clk cpu0 IT (25886) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25922 clk cpu0 R cpsr 200003c0 +25923 clk cpu0 IS (25887) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25924 clk cpu0 IS (25888) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25925 clk cpu0 IT (25889) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25925 clk cpu0 R cpsr 000003c0 +25926 clk cpu0 IT (25890) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25927 clk cpu0 IT (25891) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25927 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25927 clk cpu0 R X9 0000000013000000 +25928 clk cpu0 IT (25892) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25928 clk cpu0 R X27 000000000004CF96 +25929 clk cpu0 IT (25893) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25929 clk cpu0 R X20 000000000004CF97 +25930 clk cpu0 IT (25894) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25930 clk cpu0 MW1 13000000:000013000000_NS 2d +25931 clk cpu0 IT (25895) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25931 clk cpu0 MR1 0004cf97:00001004cf97_NS 2d +25931 clk cpu0 R X8 000000000000002D +25932 clk cpu0 IT (25896) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25932 clk cpu0 R cpsr 200003c0 +25933 clk cpu0 IS (25897) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25934 clk cpu0 IS (25898) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25935 clk cpu0 IT (25899) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25935 clk cpu0 R cpsr 000003c0 +25936 clk cpu0 IT (25900) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25937 clk cpu0 IT (25901) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25937 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25937 clk cpu0 R X9 0000000013000000 +25938 clk cpu0 IT (25902) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +25938 clk cpu0 R X27 000000000004CF97 +25939 clk cpu0 IT (25903) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +25939 clk cpu0 R X20 000000000004CF98 +25940 clk cpu0 IT (25904) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +25940 clk cpu0 MW1 13000000:000013000000_NS 2d +25941 clk cpu0 IT (25905) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +25941 clk cpu0 MR1 0004cf98:00001004cf98_NS 2d +25941 clk cpu0 R X8 000000000000002D +25942 clk cpu0 IT (25906) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +25942 clk cpu0 R cpsr 200003c0 +25943 clk cpu0 IS (25907) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +25944 clk cpu0 IS (25908) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +25945 clk cpu0 IT (25909) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +25945 clk cpu0 R cpsr 400003c0 +25946 clk cpu0 IS (25910) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +25947 clk cpu0 IT (25911) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +25947 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +25947 clk cpu0 R X8 0000000000000000 +25948 clk cpu0 IT (25912) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +25948 clk cpu0 MR8 0004cf98:00001004cf98_NS 2d2d2d2d_2d2d2d2d +25948 clk cpu0 R X0 2D2D2D2D2D2D2D2D +25949 clk cpu0 IT (25913) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +25949 clk cpu0 R cpsr 800003c0 +25950 clk cpu0 IT (25914) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +25951 clk cpu0 IT (25915) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +25951 clk cpu0 R X27 0000000000000000 +25952 clk cpu0 IT (25916) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +25952 clk cpu0 R X28 000000000004CF98 +25953 clk cpu0 IT (25917) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +25953 clk cpu0 R X8 00000000FFFFFFF8 +25954 clk cpu0 IT (25918) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25954 clk cpu0 R cpsr 000003c0 +25954 clk cpu0 R X9 000000000000002D +25955 clk cpu0 IS (25919) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25956 clk cpu0 IT (25920) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25956 clk cpu0 R cpsr 200003c0 +25957 clk cpu0 IS (25921) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25958 clk cpu0 IT (25922) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25958 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25958 clk cpu0 R X9 0000000013000000 +25959 clk cpu0 IT (25923) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25959 clk cpu0 R cpsr 800003c0 +25959 clk cpu0 R X8 00000000FFFFFFF9 +25960 clk cpu0 IT (25924) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25960 clk cpu0 MW1 13000000:000013000000_NS 2d +25961 clk cpu0 IT (25925) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25961 clk cpu0 R X0 002D2D2D2D2D2D2D +25962 clk cpu0 IT (25926) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25963 clk cpu0 IT (25927) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25963 clk cpu0 R cpsr 000003c0 +25963 clk cpu0 R X9 000000000000002D +25964 clk cpu0 IS (25928) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25965 clk cpu0 IT (25929) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25965 clk cpu0 R cpsr 200003c0 +25966 clk cpu0 IS (25930) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25967 clk cpu0 IT (25931) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25967 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25967 clk cpu0 R X9 0000000013000000 +25968 clk cpu0 IT (25932) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25968 clk cpu0 R cpsr 800003c0 +25968 clk cpu0 R X8 00000000FFFFFFFA +25969 clk cpu0 IT (25933) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25969 clk cpu0 MW1 13000000:000013000000_NS 2d +25970 clk cpu0 IT (25934) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25970 clk cpu0 R X0 00002D2D2D2D2D2D +25971 clk cpu0 IT (25935) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25972 clk cpu0 IT (25936) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25972 clk cpu0 R cpsr 000003c0 +25972 clk cpu0 R X9 000000000000002D +25973 clk cpu0 IS (25937) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25974 clk cpu0 IT (25938) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25974 clk cpu0 R cpsr 200003c0 +25975 clk cpu0 IS (25939) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25976 clk cpu0 IT (25940) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25976 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25976 clk cpu0 R X9 0000000013000000 +25977 clk cpu0 IT (25941) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25977 clk cpu0 R cpsr 800003c0 +25977 clk cpu0 R X8 00000000FFFFFFFB +25978 clk cpu0 IT (25942) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25978 clk cpu0 MW1 13000000:000013000000_NS 2d +25979 clk cpu0 IT (25943) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25979 clk cpu0 R X0 0000002D2D2D2D2D +25980 clk cpu0 IT (25944) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25981 clk cpu0 IT (25945) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25981 clk cpu0 R cpsr 000003c0 +25981 clk cpu0 R X9 000000000000002D +25982 clk cpu0 IS (25946) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25983 clk cpu0 IT (25947) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25983 clk cpu0 R cpsr 200003c0 +25984 clk cpu0 IS (25948) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25985 clk cpu0 IT (25949) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25985 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25985 clk cpu0 R X9 0000000013000000 +25986 clk cpu0 IT (25950) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25986 clk cpu0 R cpsr 800003c0 +25986 clk cpu0 R X8 00000000FFFFFFFC +25987 clk cpu0 IT (25951) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25987 clk cpu0 MW1 13000000:000013000000_NS 2d +25988 clk cpu0 IT (25952) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25988 clk cpu0 R X0 000000002D2D2D2D +25989 clk cpu0 IT (25953) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25990 clk cpu0 IT (25954) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25990 clk cpu0 R cpsr 000003c0 +25990 clk cpu0 R X9 000000000000002D +25991 clk cpu0 IS (25955) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +25992 clk cpu0 IT (25956) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +25992 clk cpu0 R cpsr 200003c0 +25993 clk cpu0 IS (25957) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +25994 clk cpu0 IT (25958) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +25994 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +25994 clk cpu0 R X9 0000000013000000 +25995 clk cpu0 IT (25959) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +25995 clk cpu0 R cpsr 800003c0 +25995 clk cpu0 R X8 00000000FFFFFFFD +25996 clk cpu0 IT (25960) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +25996 clk cpu0 MW1 13000000:000013000000_NS 2d +25997 clk cpu0 IT (25961) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +25997 clk cpu0 R X0 00000000002D2D2D +25998 clk cpu0 IT (25962) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +25999 clk cpu0 IT (25963) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +25999 clk cpu0 R cpsr 000003c0 +25999 clk cpu0 R X9 000000000000002D +26000 clk cpu0 IS (25964) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26001 clk cpu0 IT (25965) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26001 clk cpu0 R cpsr 200003c0 +26002 clk cpu0 IS (25966) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26003 clk cpu0 IT (25967) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26003 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26003 clk cpu0 R X9 0000000013000000 +26004 clk cpu0 IT (25968) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26004 clk cpu0 R cpsr 800003c0 +26004 clk cpu0 R X8 00000000FFFFFFFE +26005 clk cpu0 IT (25969) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26005 clk cpu0 MW1 13000000:000013000000_NS 2d +26006 clk cpu0 IT (25970) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26006 clk cpu0 R X0 0000000000002D2D +26007 clk cpu0 IT (25971) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26008 clk cpu0 IT (25972) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26008 clk cpu0 R cpsr 000003c0 +26008 clk cpu0 R X9 000000000000002D +26009 clk cpu0 IS (25973) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26010 clk cpu0 IT (25974) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26010 clk cpu0 R cpsr 200003c0 +26011 clk cpu0 IS (25975) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26012 clk cpu0 IT (25976) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26012 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26012 clk cpu0 R X9 0000000013000000 +26013 clk cpu0 IT (25977) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26013 clk cpu0 R cpsr 800003c0 +26013 clk cpu0 R X8 00000000FFFFFFFF +26014 clk cpu0 IT (25978) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26014 clk cpu0 MW1 13000000:000013000000_NS 2d +26015 clk cpu0 IT (25979) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26015 clk cpu0 R X0 000000000000002D +26016 clk cpu0 IT (25980) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26017 clk cpu0 IT (25981) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26017 clk cpu0 R cpsr 000003c0 +26017 clk cpu0 R X9 000000000000002D +26018 clk cpu0 IS (25982) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26019 clk cpu0 IT (25983) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26019 clk cpu0 R cpsr 200003c0 +26020 clk cpu0 IS (25984) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26021 clk cpu0 IT (25985) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26021 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26021 clk cpu0 R X9 0000000013000000 +26022 clk cpu0 IT (25986) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26022 clk cpu0 R cpsr 600003c0 +26022 clk cpu0 R X8 0000000000000000 +26023 clk cpu0 IT (25987) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26023 clk cpu0 MW1 13000000:000013000000_NS 2d +26024 clk cpu0 IT (25988) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26024 clk cpu0 R X0 0000000000000000 +26025 clk cpu0 IS (25989) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26026 clk cpu0 IT (25990) 00092c10:000010092c10_NS f8408f80 O EL0t_n : LDR x0,[x28,#8]! +26026 clk cpu0 MR8 0004cfa0:00001004cfa0_NS 2d2d2d2d_2d2d2d2d +26026 clk cpu0 R X0 2D2D2D2D2D2D2D2D +26026 clk cpu0 R X28 000000000004CFA0 +26027 clk cpu0 IT (25991) 00092c14:000010092c14_NS b948fb09 O EL0t_n : LDR w9,[x24,#0x8f8] +26027 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +26027 clk cpu0 R X9 0000000000000000 +26028 clk cpu0 IT (25992) 00092c18:000010092c18_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +26028 clk cpu0 R X8 0000000000000000 +26029 clk cpu0 IT (25993) 00092c1c:000010092c1c_NS 1100211b O EL0t_n : ADD w27,w8,#8 +26029 clk cpu0 R X27 0000000000000008 +26030 clk cpu0 IT (25994) 00092c20:000010092c20_NS 7100053f O EL0t_n : CMP w9,#1 +26030 clk cpu0 R cpsr 800003c0 +26031 clk cpu0 IT (25995) 00092c24:000010092c24_NS 54fffe21 O EL0t_n : B.NE 0x92be8 +26032 clk cpu0 IT (25996) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +26032 clk cpu0 R X8 00000000FFFFFFF8 +26033 clk cpu0 IT (25997) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26033 clk cpu0 R cpsr 000003c0 +26033 clk cpu0 R X9 000000000000002D +26034 clk cpu0 IS (25998) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26035 clk cpu0 IT (25999) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26035 clk cpu0 R cpsr 200003c0 +26036 clk cpu0 IS (26000) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26037 clk cpu0 IT (26001) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26037 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26037 clk cpu0 R X9 0000000013000000 +26038 clk cpu0 IT (26002) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26038 clk cpu0 R cpsr 800003c0 +26038 clk cpu0 R X8 00000000FFFFFFF9 +26039 clk cpu0 IT (26003) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26039 clk cpu0 MW1 13000000:000013000000_NS 2d +26040 clk cpu0 IT (26004) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26040 clk cpu0 R X0 002D2D2D2D2D2D2D +26041 clk cpu0 IT (26005) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26042 clk cpu0 IT (26006) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26042 clk cpu0 R cpsr 000003c0 +26042 clk cpu0 R X9 000000000000002D +26043 clk cpu0 IS (26007) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26044 clk cpu0 IT (26008) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26044 clk cpu0 R cpsr 200003c0 +26045 clk cpu0 IS (26009) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26046 clk cpu0 IT (26010) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26046 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26046 clk cpu0 R X9 0000000013000000 +26047 clk cpu0 IT (26011) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26047 clk cpu0 R cpsr 800003c0 +26047 clk cpu0 R X8 00000000FFFFFFFA +26048 clk cpu0 IT (26012) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26048 clk cpu0 MW1 13000000:000013000000_NS 2d +26049 clk cpu0 IT (26013) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26049 clk cpu0 R X0 00002D2D2D2D2D2D +26050 clk cpu0 IT (26014) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26051 clk cpu0 IT (26015) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26051 clk cpu0 R cpsr 000003c0 +26051 clk cpu0 R X9 000000000000002D +26052 clk cpu0 IS (26016) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26053 clk cpu0 IT (26017) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26053 clk cpu0 R cpsr 200003c0 +26054 clk cpu0 IS (26018) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26055 clk cpu0 IT (26019) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26055 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26055 clk cpu0 R X9 0000000013000000 +26056 clk cpu0 IT (26020) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26056 clk cpu0 R cpsr 800003c0 +26056 clk cpu0 R X8 00000000FFFFFFFB +26057 clk cpu0 IT (26021) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26057 clk cpu0 MW1 13000000:000013000000_NS 2d +26058 clk cpu0 IT (26022) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26058 clk cpu0 R X0 0000002D2D2D2D2D +26059 clk cpu0 IT (26023) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26060 clk cpu0 IT (26024) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26060 clk cpu0 R cpsr 000003c0 +26060 clk cpu0 R X9 000000000000002D +26061 clk cpu0 IS (26025) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26062 clk cpu0 IT (26026) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26062 clk cpu0 R cpsr 200003c0 +26063 clk cpu0 IS (26027) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26064 clk cpu0 IT (26028) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26064 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26064 clk cpu0 R X9 0000000013000000 +26065 clk cpu0 IT (26029) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26065 clk cpu0 R cpsr 800003c0 +26065 clk cpu0 R X8 00000000FFFFFFFC +26066 clk cpu0 IT (26030) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26066 clk cpu0 MW1 13000000:000013000000_NS 2d +26067 clk cpu0 IT (26031) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26067 clk cpu0 R X0 000000002D2D2D2D +26068 clk cpu0 IT (26032) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26069 clk cpu0 IT (26033) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26069 clk cpu0 R cpsr 000003c0 +26069 clk cpu0 R X9 000000000000002D +26070 clk cpu0 IS (26034) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26071 clk cpu0 IT (26035) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26071 clk cpu0 R cpsr 200003c0 +26072 clk cpu0 IS (26036) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26073 clk cpu0 IT (26037) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26073 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26073 clk cpu0 R X9 0000000013000000 +26074 clk cpu0 IT (26038) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26074 clk cpu0 R cpsr 800003c0 +26074 clk cpu0 R X8 00000000FFFFFFFD +26075 clk cpu0 IT (26039) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26075 clk cpu0 MW1 13000000:000013000000_NS 2d +26076 clk cpu0 IT (26040) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26076 clk cpu0 R X0 00000000002D2D2D +26077 clk cpu0 IT (26041) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26078 clk cpu0 IT (26042) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26078 clk cpu0 R cpsr 000003c0 +26078 clk cpu0 R X9 000000000000002D +26079 clk cpu0 IS (26043) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26080 clk cpu0 IT (26044) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26080 clk cpu0 R cpsr 200003c0 +26081 clk cpu0 IS (26045) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26082 clk cpu0 IT (26046) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26082 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26082 clk cpu0 R X9 0000000013000000 +26083 clk cpu0 IT (26047) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26083 clk cpu0 R cpsr 800003c0 +26083 clk cpu0 R X8 00000000FFFFFFFE +26084 clk cpu0 IT (26048) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26084 clk cpu0 MW1 13000000:000013000000_NS 2d +26085 clk cpu0 IT (26049) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26085 clk cpu0 R X0 0000000000002D2D +26086 clk cpu0 IT (26050) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26087 clk cpu0 IT (26051) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26087 clk cpu0 R cpsr 000003c0 +26087 clk cpu0 R X9 000000000000002D +26088 clk cpu0 IS (26052) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26089 clk cpu0 IT (26053) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26089 clk cpu0 R cpsr 200003c0 +26090 clk cpu0 IS (26054) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26091 clk cpu0 IT (26055) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26091 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26091 clk cpu0 R X9 0000000013000000 +26092 clk cpu0 IT (26056) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26092 clk cpu0 R cpsr 800003c0 +26092 clk cpu0 R X8 00000000FFFFFFFF +26093 clk cpu0 IT (26057) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26093 clk cpu0 MW1 13000000:000013000000_NS 2d +26094 clk cpu0 IT (26058) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26094 clk cpu0 R X0 000000000000002D +26095 clk cpu0 IT (26059) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26096 clk cpu0 IT (26060) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26096 clk cpu0 R cpsr 000003c0 +26096 clk cpu0 R X9 000000000000002D +26097 clk cpu0 IS (26061) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26098 clk cpu0 IT (26062) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26098 clk cpu0 R cpsr 200003c0 +26099 clk cpu0 IS (26063) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26100 clk cpu0 IT (26064) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26100 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26100 clk cpu0 R X9 0000000013000000 +26101 clk cpu0 IT (26065) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26101 clk cpu0 R cpsr 600003c0 +26101 clk cpu0 R X8 0000000000000000 +26102 clk cpu0 IT (26066) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26102 clk cpu0 MW1 13000000:000013000000_NS 2d +26103 clk cpu0 IT (26067) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26103 clk cpu0 R X0 0000000000000000 +26104 clk cpu0 IS (26068) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26105 clk cpu0 IT (26069) 00092c10:000010092c10_NS f8408f80 O EL0t_n : LDR x0,[x28,#8]! +26105 clk cpu0 MR8 0004cfa8:00001004cfa8_NS 72656e65_47000a2d +26105 clk cpu0 R X0 72656E6547000A2D +26105 clk cpu0 R X28 000000000004CFA8 +26106 clk cpu0 IT (26070) 00092c14:000010092c14_NS b948fb09 O EL0t_n : LDR w9,[x24,#0x8f8] +26106 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +26106 clk cpu0 R X9 0000000000000000 +26107 clk cpu0 IT (26071) 00092c18:000010092c18_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +26107 clk cpu0 R X8 0000000000000008 +26108 clk cpu0 IT (26072) 00092c1c:000010092c1c_NS 1100211b O EL0t_n : ADD w27,w8,#8 +26108 clk cpu0 R X27 0000000000000010 +26109 clk cpu0 IT (26073) 00092c20:000010092c20_NS 7100053f O EL0t_n : CMP w9,#1 +26109 clk cpu0 R cpsr 800003c0 +26110 clk cpu0 IT (26074) 00092c24:000010092c24_NS 54fffe21 O EL0t_n : B.NE 0x92be8 +26111 clk cpu0 IT (26075) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +26111 clk cpu0 R X8 00000000FFFFFFF8 +26112 clk cpu0 IT (26076) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26112 clk cpu0 R cpsr 000003c0 +26112 clk cpu0 R X9 000000000000002D +26113 clk cpu0 IS (26077) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26114 clk cpu0 IT (26078) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26114 clk cpu0 R cpsr 200003c0 +26115 clk cpu0 IS (26079) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26116 clk cpu0 IT (26080) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26116 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26116 clk cpu0 R X9 0000000013000000 +26117 clk cpu0 IT (26081) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26117 clk cpu0 R cpsr 800003c0 +26117 clk cpu0 R X8 00000000FFFFFFF9 +26118 clk cpu0 IT (26082) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26118 clk cpu0 MW1 13000000:000013000000_NS 2d +26119 clk cpu0 IT (26083) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26119 clk cpu0 R X0 0072656E6547000A +26120 clk cpu0 IT (26084) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26121 clk cpu0 IT (26085) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26121 clk cpu0 R cpsr 000003c0 +26121 clk cpu0 R X9 000000000000000A +26122 clk cpu0 IS (26086) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26123 clk cpu0 IT (26087) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26123 clk cpu0 R cpsr 800003c0 +26124 clk cpu0 IS (26088) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26125 clk cpu0 IT (26089) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26125 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26125 clk cpu0 R X9 0000000013000000 +26126 clk cpu0 IT (26090) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26126 clk cpu0 R cpsr 800003c0 +26126 clk cpu0 R X8 00000000FFFFFFFA +TUBE CPU0: >>---------------------- +26127 clk cpu0 IT (26091) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26127 clk cpu0 MW1 13000000:000013000000_NS 0a +26128 clk cpu0 IT (26092) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26128 clk cpu0 R X0 000072656E654700 +26129 clk cpu0 IT (26093) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26130 clk cpu0 IT (26094) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26130 clk cpu0 R cpsr 400003c0 +26130 clk cpu0 R X9 0000000000000000 +26131 clk cpu0 IT (26095) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26132 clk cpu0 IT (26096) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +26132 clk cpu0 R X8 000000000000000A +26133 clk cpu0 IT (26097) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +26133 clk cpu0 R X9 0000000000000011 +26134 clk cpu0 IT (26098) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +26134 clk cpu0 R X9 000000000004CFA9 +26135 clk cpu0 IT (26099) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +26135 clk cpu0 R cpsr 000003c0 +26136 clk cpu0 IT (26100) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +26136 clk cpu0 R X27 000000000004CFA9 +26137 clk cpu0 IT (26101) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +26137 clk cpu0 R X20 000000000004CFAA +26138 clk cpu0 IT (26102) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +26139 clk cpu0 IT (26103) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26139 clk cpu0 MR1 0004cfaa:00001004cfaa_NS 00 +26139 clk cpu0 R X8 0000000000000000 +26140 clk cpu0 IT (26104) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26140 clk cpu0 R cpsr 800003c0 +26141 clk cpu0 IS (26105) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26142 clk cpu0 IT (26106) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26143 clk cpu0 IT (26107) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +26144 clk cpu0 IT (26108) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +26144 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004cf91 +26144 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +26144 clk cpu0 R X19 000000000004CF91 +26144 clk cpu0 R X30 000000000009C560 +26145 clk cpu0 IT (26109) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +26145 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +26145 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +26145 clk cpu0 R X20 0000000003008528 +26145 clk cpu0 R X21 0000000000000000 +26146 clk cpu0 IT (26110) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +26146 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +26146 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +26146 clk cpu0 R X22 000000000004D076 +26146 clk cpu0 R X23 000000000004D06C +26147 clk cpu0 IT (26111) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +26147 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +26147 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +26147 clk cpu0 R X24 000000000004D080 +26147 clk cpu0 R X25 0000000006216000 +26148 clk cpu0 IT (26112) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +26148 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +26148 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216040 +26148 clk cpu0 R X26 0000000006216040 +26148 clk cpu0 R X27 0001000100010001 +26149 clk cpu0 IT (26113) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +26149 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +26149 clk cpu0 R X28 FF7FFF7FFF7FFF7F +26150 clk cpu0 IT (26114) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +26150 clk cpu0 R SP_EL0 0000000003045800 +26151 clk cpu0 IT (26115) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +26152 clk cpu0 IT (26116) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +26152 clk cpu0 R X0 0000000000000001 +26153 clk cpu0 IT (26117) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +26153 clk cpu0 R X1 0000000000000000 +26154 clk cpu0 IT (26118) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +26154 clk cpu0 R X2 0000000000000000 +26155 clk cpu0 IT (26119) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +26156 clk cpu0 IT (26120) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +26157 clk cpu0 IT (26121) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +26157 clk cpu0 R X0 0000000003008528 +26158 clk cpu0 IT (26122) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +26158 clk cpu0 R X30 000000000009C57C +26159 clk cpu0 IT (26123) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +26160 clk cpu0 IT (26124) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +26160 clk cpu0 R X8 0000000006216000 +26161 clk cpu0 IT (26125) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +26161 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +26161 clk cpu0 R X8 0000000000000001 +26162 clk cpu0 IT (26126) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +26162 clk cpu0 R cpsr 800003c0 +26163 clk cpu0 IT (26127) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +26164 clk cpu0 IT (26128) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +26165 clk cpu0 IT (26129) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +26165 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000001 +26165 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b48c +26165 clk cpu0 R X19 0000000000000001 +26165 clk cpu0 R X30 000000000009B48C +26166 clk cpu0 IT (26130) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +26166 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +26166 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +26166 clk cpu0 R X20 000000000004D0CC +26166 clk cpu0 R X21 000000000004CF91 +26167 clk cpu0 IT (26131) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +26167 clk cpu0 R SP_EL0 0000000003045890 +26168 clk cpu0 IT (26132) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +26169 clk cpu0 IT (26133) 0009b48c:00001009b48c_NS b85fc342 O EL0t_n : LDUR w2,[x26,#-4] +26169 clk cpu0 MR4 0621603c:00001521603c_NS 00000000 +26169 clk cpu0 R X2 0000000000000000 +26170 clk cpu0 IT (26134) 0009b490:00001009b490_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +26170 clk cpu0 R X0 0000000000000000 +26171 clk cpu0 IT (26135) 0009b494:00001009b494_NS aa1603e1 O EL0t_n : MOV x1,x22 +26171 clk cpu0 R X1 000000000004D076 +26172 clk cpu0 IT (26136) 0009b498:00001009b498_NS 9400040d O EL0t_n : BL 0x9c4cc +26172 clk cpu0 R X30 000000000009B49C +26173 clk cpu0 IT (26137) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +26173 clk cpu0 R SP_EL0 0000000003045800 +26174 clk cpu0 IT (26138) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +26174 clk cpu0 R X8 0000000006216000 +26175 clk cpu0 IT (26139) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +26175 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +26175 clk cpu0 R X8 0000000000000003 +26176 clk cpu0 IT (26140) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +26176 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +26176 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +26177 clk cpu0 IT (26141) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +26177 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000001 +26177 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b49c +26178 clk cpu0 IT (26142) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +26178 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +26178 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +26179 clk cpu0 IT (26143) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +26179 clk cpu0 R cpsr 200003c0 +26180 clk cpu0 IT (26144) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +26180 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +26180 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +26181 clk cpu0 IT (26145) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +26181 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +26181 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +26182 clk cpu0 IT (26146) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +26182 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +26182 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +26183 clk cpu0 IT (26147) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +26183 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +26183 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +26184 clk cpu0 IS (26148) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +26185 clk cpu0 IT (26149) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +26185 clk cpu0 R X20 0000000003008000 +26186 clk cpu0 IT (26150) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +26186 clk cpu0 R X20 0000000003008528 +26187 clk cpu0 IT (26151) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +26187 clk cpu0 R X0 0000000003008528 +26188 clk cpu0 IT (26152) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +26188 clk cpu0 R X19 000000000004D076 +26189 clk cpu0 IT (26153) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +26189 clk cpu0 R X30 000000000009C510 +26190 clk cpu0 IT (26154) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +26190 clk cpu0 R X8 0000000006216000 +26191 clk cpu0 IT (26155) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +26191 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +26191 clk cpu0 R X8 0000000000000001 +26192 clk cpu0 IT (26156) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +26192 clk cpu0 R cpsr 800003c0 +26193 clk cpu0 IT (26157) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +26194 clk cpu0 IT (26158) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +26195 clk cpu0 IT (26159) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +26195 clk cpu0 R X9 0000000003045800 +26196 clk cpu0 IT (26160) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +26196 clk cpu0 R X8 00000000FFFFFFD0 +26197 clk cpu0 IT (26161) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +26197 clk cpu0 R X10 0000000003045890 +26198 clk cpu0 IT (26162) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +26198 clk cpu0 R X9 0000000003045830 +26199 clk cpu0 IT (26163) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +26199 clk cpu0 R X0 0000000000000000 +26200 clk cpu0 IT (26164) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +26200 clk cpu0 R X1 0000000000000000 +26201 clk cpu0 IT (26165) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +26201 clk cpu0 R X2 0000000000000000 +26202 clk cpu0 IT (26166) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +26202 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +26203 clk cpu0 IT (26167) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +26203 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +26203 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +26204 clk cpu0 IT (26168) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +26205 clk cpu0 IT (26169) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +26205 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +26205 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +26205 clk cpu0 R X8 0000000000000000 +26205 clk cpu0 R X10 0000000003045830 +26206 clk cpu0 IT (26170) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +26206 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +26206 clk cpu0 R X9 0000000003045890 +26207 clk cpu0 IT (26171) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +26207 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +26207 clk cpu0 R X11 00000000FFFFFFD0 +26208 clk cpu0 IT (26172) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +26208 clk cpu0 R X21 0000000000000000 +26209 clk cpu0 IT (26173) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +26209 clk cpu0 R X1 0000000003045830 +26210 clk cpu0 IT (26174) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +26210 clk cpu0 R X0 000000000004D076 +26211 clk cpu0 IT (26175) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +26211 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +26211 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +26212 clk cpu0 IT (26176) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +26212 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +26213 clk cpu0 IT (26177) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +26213 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +26214 clk cpu0 IT (26178) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +26214 clk cpu0 R X30 000000000009C560 +26215 clk cpu0 IT (26179) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +26215 clk cpu0 R SP_EL0 0000000003045760 +26216 clk cpu0 IT (26180) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +26216 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d076 +26216 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +26217 clk cpu0 IT (26181) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +26217 clk cpu0 R X19 0000000003045830 +26218 clk cpu0 IT (26182) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +26218 clk cpu0 R X1 000000000004C000 +26219 clk cpu0 IT (26183) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +26219 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +26219 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +26220 clk cpu0 IT (26184) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +26220 clk cpu0 R X20 000000000004D076 +26221 clk cpu0 IT (26185) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +26221 clk cpu0 R X1 000000000004C00B +26222 clk cpu0 IT (26186) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +26222 clk cpu0 R X0 0000000003045764 +26223 clk cpu0 IT (26187) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +26223 clk cpu0 R X2 000000000000003B +26224 clk cpu0 IT (26188) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +26224 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +26225 clk cpu0 IT (26189) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +26225 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +26225 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216040 +26226 clk cpu0 IT (26190) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +26226 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +26226 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +26227 clk cpu0 IT (26191) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +26227 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +26227 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +26228 clk cpu0 IT (26192) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +26228 clk cpu0 R X30 0000000000092B80 +26229 clk cpu0 IT (26193) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +26229 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +26229 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +26229 clk cpu0 R SP_EL0 0000000003045750 +26230 clk cpu0 IT (26194) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +26230 clk cpu0 R X19 0000000003045764 +26231 clk cpu0 IT (26195) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +26231 clk cpu0 R X30 00000000000104DC +26232 clk cpu0 IT (26196) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +26232 clk cpu0 R cpsr 200003c0 +26233 clk cpu0 IS (26197) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +26234 clk cpu0 IT (26198) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +26234 clk cpu0 R cpsr 400003c0 +26235 clk cpu0 IT (26199) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +26236 clk cpu0 IT (26200) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +26236 clk cpu0 R cpsr 000003c0 +26236 clk cpu0 R X10 0000000000000003 +26237 clk cpu0 IS (26201) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +26238 clk cpu0 IT (26202) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +26238 clk cpu0 R X9 0000000000000020 +26239 clk cpu0 IT (26203) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +26239 clk cpu0 R X8 000000000004C008 +26240 clk cpu0 IT (26204) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +26240 clk cpu0 R cpsr 200003c0 +26241 clk cpu0 IT (26205) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +26241 clk cpu0 R X9 0000000000000008 +26242 clk cpu0 IS (26206) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +26243 clk cpu0 IT (26207) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +26243 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +26243 clk cpu0 R X12 000000000A00000A +26244 clk cpu0 IT (26208) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +26244 clk cpu0 R X10 0000000000000018 +26245 clk cpu0 IT (26209) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +26245 clk cpu0 R X11 000000000000003B +26246 clk cpu0 IT (26210) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26246 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +26246 clk cpu0 R X8 000000000004C00C +26246 clk cpu0 R X13 000000006F727245 +26247 clk cpu0 IT (26211) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26247 clk cpu0 R X12 000000000000000A +26248 clk cpu0 IT (26212) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26248 clk cpu0 R X11 0000000000000037 +26249 clk cpu0 IT (26213) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26249 clk cpu0 R cpsr 200003c0 +26250 clk cpu0 IT (26214) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26250 clk cpu0 R X14 0000000072724500 +26251 clk cpu0 IT (26215) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26251 clk cpu0 R X12 000000007272450A +26252 clk cpu0 IT (26216) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26252 clk cpu0 MW4 03045764:000000845764_NS 7272450a +26252 clk cpu0 R X0 0000000003045768 +26253 clk cpu0 IT (26217) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26253 clk cpu0 R X12 000000006F727245 +26254 clk cpu0 IT (26218) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26255 clk cpu0 IT (26219) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26255 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +26255 clk cpu0 R X8 000000000004C010 +26255 clk cpu0 R X13 0000000049203A72 +26256 clk cpu0 IT (26220) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26256 clk cpu0 R X12 000000000000006F +26257 clk cpu0 IT (26221) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26257 clk cpu0 R X11 0000000000000033 +26258 clk cpu0 IT (26222) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26258 clk cpu0 R cpsr 200003c0 +26259 clk cpu0 IT (26223) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26259 clk cpu0 R X14 00000000203A7200 +26260 clk cpu0 IT (26224) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26260 clk cpu0 R X12 00000000203A726F +26261 clk cpu0 IT (26225) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26261 clk cpu0 MW4 03045768:000000845768_NS 203a726f +26261 clk cpu0 R X0 000000000304576C +26262 clk cpu0 IT (26226) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26262 clk cpu0 R X12 0000000049203A72 +26263 clk cpu0 IT (26227) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26264 clk cpu0 IT (26228) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26264 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +26264 clk cpu0 R X8 000000000004C014 +26264 clk cpu0 R X13 0000000067656C6C +26265 clk cpu0 IT (26229) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26265 clk cpu0 R X12 0000000000000049 +26266 clk cpu0 IT (26230) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26266 clk cpu0 R X11 000000000000002F +26267 clk cpu0 IT (26231) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26267 clk cpu0 R cpsr 200003c0 +26268 clk cpu0 IT (26232) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26268 clk cpu0 R X14 00000000656C6C00 +26269 clk cpu0 IT (26233) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26269 clk cpu0 R X12 00000000656C6C49 +26270 clk cpu0 IT (26234) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26270 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +26270 clk cpu0 R X0 0000000003045770 +26271 clk cpu0 IT (26235) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26271 clk cpu0 R X12 0000000067656C6C +26272 clk cpu0 IT (26236) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26273 clk cpu0 IT (26237) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26273 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +26273 clk cpu0 R X8 000000000004C018 +26273 clk cpu0 R X13 0000000066206C61 +26274 clk cpu0 IT (26238) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26274 clk cpu0 R X12 0000000000000067 +26275 clk cpu0 IT (26239) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26275 clk cpu0 R X11 000000000000002B +26276 clk cpu0 IT (26240) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26276 clk cpu0 R cpsr 200003c0 +26277 clk cpu0 IT (26241) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26277 clk cpu0 R X14 00000000206C6100 +26278 clk cpu0 IT (26242) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26278 clk cpu0 R X12 00000000206C6167 +26279 clk cpu0 IT (26243) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26279 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +26279 clk cpu0 R X0 0000000003045774 +26280 clk cpu0 IT (26244) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26280 clk cpu0 R X12 0000000066206C61 +26281 clk cpu0 IT (26245) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26282 clk cpu0 IT (26246) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26282 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +26282 clk cpu0 R X8 000000000004C01C +26282 clk cpu0 R X13 00000000616D726F +26283 clk cpu0 IT (26247) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26283 clk cpu0 R X12 0000000000000066 +26284 clk cpu0 IT (26248) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26284 clk cpu0 R X11 0000000000000027 +26285 clk cpu0 IT (26249) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26285 clk cpu0 R cpsr 200003c0 +26286 clk cpu0 IT (26250) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26286 clk cpu0 R X14 000000006D726F00 +26287 clk cpu0 IT (26251) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26287 clk cpu0 R X12 000000006D726F66 +26288 clk cpu0 IT (26252) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26288 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +26288 clk cpu0 R X0 0000000003045778 +26289 clk cpu0 IT (26253) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26289 clk cpu0 R X12 00000000616D726F +26290 clk cpu0 IT (26254) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26291 clk cpu0 IT (26255) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26291 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +26291 clk cpu0 R X8 000000000004C020 +26291 clk cpu0 R X13 0000000070732074 +26292 clk cpu0 IT (26256) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26292 clk cpu0 R X12 0000000000000061 +26293 clk cpu0 IT (26257) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26293 clk cpu0 R X11 0000000000000023 +26294 clk cpu0 IT (26258) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26294 clk cpu0 R cpsr 200003c0 +26295 clk cpu0 IT (26259) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26295 clk cpu0 R X14 0000000073207400 +26296 clk cpu0 IT (26260) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26296 clk cpu0 R X12 0000000073207461 +26297 clk cpu0 IT (26261) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26297 clk cpu0 MW4 03045778:000000845778_NS 73207461 +26297 clk cpu0 R X0 000000000304577C +26298 clk cpu0 IT (26262) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26298 clk cpu0 R X12 0000000070732074 +26299 clk cpu0 IT (26263) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26300 clk cpu0 IT (26264) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26300 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +26300 clk cpu0 R X8 000000000004C024 +26300 clk cpu0 R X13 0000000066696365 +26301 clk cpu0 IT (26265) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26301 clk cpu0 R X12 0000000000000070 +26302 clk cpu0 IT (26266) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26302 clk cpu0 R X11 000000000000001F +26303 clk cpu0 IT (26267) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26303 clk cpu0 R cpsr 200003c0 +26304 clk cpu0 IT (26268) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26304 clk cpu0 R X14 0000000069636500 +26305 clk cpu0 IT (26269) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26305 clk cpu0 R X12 0000000069636570 +26306 clk cpu0 IT (26270) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26306 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +26306 clk cpu0 R X0 0000000003045780 +26307 clk cpu0 IT (26271) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26307 clk cpu0 R X12 0000000066696365 +26308 clk cpu0 IT (26272) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26309 clk cpu0 IT (26273) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26309 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +26309 clk cpu0 R X8 000000000004C028 +26309 clk cpu0 R X13 0000000020726569 +26310 clk cpu0 IT (26274) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26310 clk cpu0 R X12 0000000000000066 +26311 clk cpu0 IT (26275) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26311 clk cpu0 R X11 000000000000001B +26312 clk cpu0 IT (26276) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26312 clk cpu0 R cpsr 200003c0 +26313 clk cpu0 IT (26277) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26313 clk cpu0 R X14 0000000072656900 +26314 clk cpu0 IT (26278) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26314 clk cpu0 R X12 0000000072656966 +26315 clk cpu0 IT (26279) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26315 clk cpu0 MW4 03045780:000000845780_NS 72656966 +26315 clk cpu0 R X0 0000000003045784 +26316 clk cpu0 IT (26280) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26316 clk cpu0 R X12 0000000020726569 +26317 clk cpu0 IT (26281) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26318 clk cpu0 IT (26282) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26318 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +26318 clk cpu0 R X8 000000000004C02C +26318 clk cpu0 R X13 0000000064657375 +26319 clk cpu0 IT (26283) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26319 clk cpu0 R X12 0000000000000020 +26320 clk cpu0 IT (26284) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26320 clk cpu0 R X11 0000000000000017 +26321 clk cpu0 IT (26285) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26321 clk cpu0 R cpsr 200003c0 +26322 clk cpu0 IT (26286) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26322 clk cpu0 R X14 0000000065737500 +26323 clk cpu0 IT (26287) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26323 clk cpu0 R X12 0000000065737520 +26324 clk cpu0 IT (26288) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26324 clk cpu0 MW4 03045784:000000845784_NS 65737520 +26324 clk cpu0 R X0 0000000003045788 +26325 clk cpu0 IT (26289) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26325 clk cpu0 R X12 0000000064657375 +26326 clk cpu0 IT (26290) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26327 clk cpu0 IT (26291) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26327 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +26327 clk cpu0 R X8 000000000004C030 +26327 clk cpu0 R X13 000000005F27203A +26328 clk cpu0 IT (26292) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26328 clk cpu0 R X12 0000000000000064 +26329 clk cpu0 IT (26293) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26329 clk cpu0 R X11 0000000000000013 +26330 clk cpu0 IT (26294) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26330 clk cpu0 R cpsr 200003c0 +26331 clk cpu0 IT (26295) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26331 clk cpu0 R X14 0000000027203A00 +26332 clk cpu0 IT (26296) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26332 clk cpu0 R X12 0000000027203A64 +26333 clk cpu0 IT (26297) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26333 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +26333 clk cpu0 R X0 000000000304578C +26334 clk cpu0 IT (26298) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26334 clk cpu0 R X12 000000005F27203A +26335 clk cpu0 IT (26299) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26336 clk cpu0 IT (26300) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26336 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +26336 clk cpu0 R X8 000000000004C034 +26336 clk cpu0 R X13 0000000045202E27 +26337 clk cpu0 IT (26301) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26337 clk cpu0 R X12 000000000000005F +26338 clk cpu0 IT (26302) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26338 clk cpu0 R X11 000000000000000F +26339 clk cpu0 IT (26303) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26339 clk cpu0 R cpsr 200003c0 +26340 clk cpu0 IT (26304) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26340 clk cpu0 R X14 00000000202E2700 +26341 clk cpu0 IT (26305) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26341 clk cpu0 R X12 00000000202E275F +26342 clk cpu0 IT (26306) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26342 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +26342 clk cpu0 R X0 0000000003045790 +26343 clk cpu0 IT (26307) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26343 clk cpu0 R X12 0000000045202E27 +26344 clk cpu0 IT (26308) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26345 clk cpu0 IT (26309) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26345 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +26345 clk cpu0 R X8 000000000004C038 +26345 clk cpu0 R X13 000000006E69646E +26346 clk cpu0 IT (26310) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26346 clk cpu0 R X12 0000000000000045 +26347 clk cpu0 IT (26311) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26347 clk cpu0 R X11 000000000000000B +26348 clk cpu0 IT (26312) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26348 clk cpu0 R cpsr 200003c0 +26349 clk cpu0 IT (26313) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26349 clk cpu0 R X14 0000000069646E00 +26350 clk cpu0 IT (26314) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26350 clk cpu0 R X12 0000000069646E45 +26351 clk cpu0 IT (26315) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26351 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +26351 clk cpu0 R X0 0000000003045794 +26352 clk cpu0 IT (26316) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26352 clk cpu0 R X12 000000006E69646E +26353 clk cpu0 IT (26317) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26354 clk cpu0 IT (26318) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26354 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +26354 clk cpu0 R X8 000000000004C03C +26354 clk cpu0 R X13 0000000065542067 +26355 clk cpu0 IT (26319) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26355 clk cpu0 R X12 000000000000006E +26356 clk cpu0 IT (26320) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26356 clk cpu0 R X11 0000000000000007 +26357 clk cpu0 IT (26321) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26357 clk cpu0 R cpsr 200003c0 +26358 clk cpu0 IT (26322) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26358 clk cpu0 R X14 0000000054206700 +26359 clk cpu0 IT (26323) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26359 clk cpu0 R X12 000000005420676E +26360 clk cpu0 IT (26324) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26360 clk cpu0 MW4 03045794:000000845794_NS 5420676e +26360 clk cpu0 R X0 0000000003045798 +26361 clk cpu0 IT (26325) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26361 clk cpu0 R X12 0000000065542067 +26362 clk cpu0 IT (26326) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26363 clk cpu0 IT (26327) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26363 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +26363 clk cpu0 R X8 000000000004C040 +26363 clk cpu0 R X13 000000000A2E7473 +26364 clk cpu0 IT (26328) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26364 clk cpu0 R X12 0000000000000065 +26365 clk cpu0 IT (26329) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26365 clk cpu0 R X11 0000000000000003 +26366 clk cpu0 IT (26330) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26366 clk cpu0 R cpsr 600003c0 +26367 clk cpu0 IT (26331) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26367 clk cpu0 R X14 000000002E747300 +26368 clk cpu0 IT (26332) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26368 clk cpu0 R X12 000000002E747365 +26369 clk cpu0 IT (26333) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26369 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +26369 clk cpu0 R X0 000000000304579C +26370 clk cpu0 IT (26334) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26370 clk cpu0 R X12 000000000A2E7473 +26371 clk cpu0 IS (26335) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26372 clk cpu0 IT (26336) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +26372 clk cpu0 R X2 0000000000000003 +26373 clk cpu0 IT (26337) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +26373 clk cpu0 R X9 0000000000000001 +26374 clk cpu0 IT (26338) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +26374 clk cpu0 R X8 000000000004C03F +26375 clk cpu0 IT (26339) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +26375 clk cpu0 R X1 000000000004C043 +26376 clk cpu0 IT (26340) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +26376 clk cpu0 R cpsr 200003c0 +26377 clk cpu0 IS (26341) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +26378 clk cpu0 IT (26342) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +26378 clk cpu0 MR1 0004c043:00001004c043_NS 0a +26378 clk cpu0 R X8 000000000000000A +26379 clk cpu0 IT (26343) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +26379 clk cpu0 MW1 0304579c:00000084579c_NS 0a +26380 clk cpu0 IS (26344) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +26381 clk cpu0 IT (26345) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +26381 clk cpu0 MR1 0004c044:00001004c044_NS 00 +26381 clk cpu0 R X8 0000000000000000 +26382 clk cpu0 IT (26346) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +26382 clk cpu0 R cpsr 600003c0 +26383 clk cpu0 IT (26347) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +26383 clk cpu0 MW1 0304579d:00000084579d_NS 00 +26384 clk cpu0 IS (26348) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +26385 clk cpu0 IT (26349) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +26385 clk cpu0 MR1 0004c045:00001004c045_NS 00 +26385 clk cpu0 R X8 0000000000000000 +26386 clk cpu0 IT (26350) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +26386 clk cpu0 MW1 0304579e:00000084579e_NS 00 +26387 clk cpu0 IT (26351) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +26388 clk cpu0 IT (26352) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +26388 clk cpu0 R X0 0000000003045764 +26389 clk cpu0 IT (26353) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +26389 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +26389 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +26389 clk cpu0 R SP_EL0 0000000003045760 +26389 clk cpu0 R X19 0000000003045830 +26389 clk cpu0 R X30 0000000000092B80 +26390 clk cpu0 IT (26354) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +26391 clk cpu0 IT (26355) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +26391 clk cpu0 R X22 000000000004C000 +26392 clk cpu0 IT (26356) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +26392 clk cpu0 R X23 000000000004C000 +26393 clk cpu0 IT (26357) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +26393 clk cpu0 R X26 0000000000000000 +26394 clk cpu0 IT (26358) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +26394 clk cpu0 R X21 0000000003029000 +26395 clk cpu0 IT (26359) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +26395 clk cpu0 R X22 000000000004C108 +26396 clk cpu0 IT (26360) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +26396 clk cpu0 R X23 000000000004C129 +26397 clk cpu0 IT (26361) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +26397 clk cpu0 R X24 0000000003041000 +26398 clk cpu0 IT (26362) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +26398 clk cpu0 R X25 0000000006216000 +26399 clk cpu0 IT (26363) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +26400 clk cpu0 IT (26364) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26400 clk cpu0 MR1 0004d076:00001004d076_NS 3e +26400 clk cpu0 R X8 000000000000003E +26401 clk cpu0 IT (26365) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26401 clk cpu0 R cpsr 200003c0 +26402 clk cpu0 IS (26366) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26403 clk cpu0 IS (26367) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26404 clk cpu0 IT (26368) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26404 clk cpu0 R cpsr 000003c0 +26405 clk cpu0 IT (26369) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26406 clk cpu0 IT (26370) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26406 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26406 clk cpu0 R X9 0000000013000000 +26407 clk cpu0 IT (26371) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26407 clk cpu0 R X27 000000000004D076 +26408 clk cpu0 IT (26372) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26408 clk cpu0 R X20 000000000004D077 +26409 clk cpu0 IT (26373) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26409 clk cpu0 MW1 13000000:000013000000_NS 3e +26410 clk cpu0 IT (26374) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26410 clk cpu0 MR1 0004d077:00001004d077_NS 3e +26410 clk cpu0 R X8 000000000000003E +26411 clk cpu0 IT (26375) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26411 clk cpu0 R cpsr 200003c0 +26412 clk cpu0 IS (26376) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26413 clk cpu0 IS (26377) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26414 clk cpu0 IT (26378) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26414 clk cpu0 R cpsr 000003c0 +26415 clk cpu0 IT (26379) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26416 clk cpu0 IT (26380) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26416 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26416 clk cpu0 R X9 0000000013000000 +26417 clk cpu0 IT (26381) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26417 clk cpu0 R X27 000000000004D077 +26418 clk cpu0 IT (26382) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26418 clk cpu0 R X20 000000000004D078 +26419 clk cpu0 IT (26383) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26419 clk cpu0 MW1 13000000:000013000000_NS 3e +26420 clk cpu0 IT (26384) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26420 clk cpu0 MR1 0004d078:00001004d078_NS 50 +26420 clk cpu0 R X8 0000000000000050 +26421 clk cpu0 IT (26385) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26421 clk cpu0 R cpsr 200003c0 +26422 clk cpu0 IS (26386) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26423 clk cpu0 IS (26387) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26424 clk cpu0 IT (26388) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26424 clk cpu0 R cpsr 400003c0 +26425 clk cpu0 IS (26389) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26426 clk cpu0 IT (26390) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +26426 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +26426 clk cpu0 R X8 0000000000000000 +26427 clk cpu0 IT (26391) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +26427 clk cpu0 MR8 0004d078:00001004d078_NS 000a6425_203a5050 +26427 clk cpu0 R X0 000A6425203A5050 +26428 clk cpu0 IT (26392) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +26428 clk cpu0 R cpsr 800003c0 +26429 clk cpu0 IT (26393) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +26430 clk cpu0 IT (26394) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +26430 clk cpu0 R X27 0000000000000000 +26431 clk cpu0 IT (26395) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +26431 clk cpu0 R X28 000000000004D078 +26432 clk cpu0 IT (26396) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +26432 clk cpu0 R X8 00000000FFFFFFF8 +26433 clk cpu0 IT (26397) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26433 clk cpu0 R cpsr 000003c0 +26433 clk cpu0 R X9 0000000000000050 +26434 clk cpu0 IS (26398) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26435 clk cpu0 IT (26399) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26435 clk cpu0 R cpsr 200003c0 +26436 clk cpu0 IS (26400) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26437 clk cpu0 IT (26401) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26437 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26437 clk cpu0 R X9 0000000013000000 +26438 clk cpu0 IT (26402) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26438 clk cpu0 R cpsr 800003c0 +26438 clk cpu0 R X8 00000000FFFFFFF9 +26439 clk cpu0 IT (26403) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26439 clk cpu0 MW1 13000000:000013000000_NS 50 +26440 clk cpu0 IT (26404) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26440 clk cpu0 R X0 00000A6425203A50 +26441 clk cpu0 IT (26405) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26442 clk cpu0 IT (26406) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26442 clk cpu0 R cpsr 000003c0 +26442 clk cpu0 R X9 0000000000000050 +26443 clk cpu0 IS (26407) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26444 clk cpu0 IT (26408) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26444 clk cpu0 R cpsr 200003c0 +26445 clk cpu0 IS (26409) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26446 clk cpu0 IT (26410) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26446 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26446 clk cpu0 R X9 0000000013000000 +26447 clk cpu0 IT (26411) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26447 clk cpu0 R cpsr 800003c0 +26447 clk cpu0 R X8 00000000FFFFFFFA +26448 clk cpu0 IT (26412) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26448 clk cpu0 MW1 13000000:000013000000_NS 50 +26449 clk cpu0 IT (26413) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26449 clk cpu0 R X0 0000000A6425203A +26450 clk cpu0 IT (26414) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26451 clk cpu0 IT (26415) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26451 clk cpu0 R cpsr 000003c0 +26451 clk cpu0 R X9 000000000000003A +26452 clk cpu0 IS (26416) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26453 clk cpu0 IT (26417) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26453 clk cpu0 R cpsr 200003c0 +26454 clk cpu0 IS (26418) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26455 clk cpu0 IT (26419) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26455 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26455 clk cpu0 R X9 0000000013000000 +26456 clk cpu0 IT (26420) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26456 clk cpu0 R cpsr 800003c0 +26456 clk cpu0 R X8 00000000FFFFFFFB +26457 clk cpu0 IT (26421) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26457 clk cpu0 MW1 13000000:000013000000_NS 3a +26458 clk cpu0 IT (26422) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26458 clk cpu0 R X0 000000000A642520 +26459 clk cpu0 IT (26423) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26460 clk cpu0 IT (26424) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26460 clk cpu0 R cpsr 000003c0 +26460 clk cpu0 R X9 0000000000000020 +26461 clk cpu0 IS (26425) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26462 clk cpu0 IT (26426) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26462 clk cpu0 R cpsr 800003c0 +26463 clk cpu0 IS (26427) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26464 clk cpu0 IT (26428) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26464 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26464 clk cpu0 R X9 0000000013000000 +26465 clk cpu0 IT (26429) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26465 clk cpu0 R cpsr 800003c0 +26465 clk cpu0 R X8 00000000FFFFFFFC +26466 clk cpu0 IT (26430) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26466 clk cpu0 MW1 13000000:000013000000_NS 20 +26467 clk cpu0 IT (26431) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26467 clk cpu0 R X0 00000000000A6425 +26468 clk cpu0 IT (26432) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26469 clk cpu0 IT (26433) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26469 clk cpu0 R cpsr 000003c0 +26469 clk cpu0 R X9 0000000000000025 +26470 clk cpu0 IS (26434) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26471 clk cpu0 IT (26435) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26471 clk cpu0 R cpsr 600003c0 +26472 clk cpu0 IT (26436) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26473 clk cpu0 IT (26437) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +26473 clk cpu0 R X8 00000000FFFFFFFC +26474 clk cpu0 IT (26438) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +26474 clk cpu0 R X9 0000000000000003 +26475 clk cpu0 IT (26439) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +26475 clk cpu0 R X9 000000000004D07B +26476 clk cpu0 IT (26440) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +26476 clk cpu0 R cpsr 200003c0 +26477 clk cpu0 IT (26441) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +26477 clk cpu0 R X27 000000000004D07B +26478 clk cpu0 IT (26442) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +26478 clk cpu0 R X20 000000000004D07C +26479 clk cpu0 IT (26443) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +26480 clk cpu0 IT (26444) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26480 clk cpu0 MR1 0004d07c:00001004d07c_NS 25 +26480 clk cpu0 R X8 0000000000000025 +26481 clk cpu0 IT (26445) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26481 clk cpu0 R cpsr 600003c0 +26482 clk cpu0 IT (26446) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26483 clk cpu0 IT (26447) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +26483 clk cpu0 MW4 03029734:000000829734_NS 00000000 +26484 clk cpu0 IT (26448) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +26484 clk cpu0 R X27 000000000004D07C +26485 clk cpu0 IT (26449) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +26485 clk cpu0 MR1 0004d07d:00001004d07d_NS 64 +26485 clk cpu0 R X27 000000000004D07D +26485 clk cpu0 R X28 0000000000000064 +26486 clk cpu0 IT (26450) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +26486 clk cpu0 R cpsr 200003c0 +26487 clk cpu0 IS (26451) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +26488 clk cpu0 IT (26452) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +26489 clk cpu0 IT (26453) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +26489 clk cpu0 R X8 000000000000000C +26490 clk cpu0 IT (26454) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +26490 clk cpu0 R cpsr 800003c0 +26491 clk cpu0 IS (26455) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +26492 clk cpu0 IT (26456) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +26492 clk cpu0 R X9 0000000000092CE0 +26493 clk cpu0 IT (26457) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +26493 clk cpu0 MR1 0004c114:00001004c114_NS 0e +26493 clk cpu0 R X10 000000000000000E +26494 clk cpu0 IT (26458) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +26494 clk cpu0 R X9 0000000000092D18 +26495 clk cpu0 IT (26459) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +26495 clk cpu0 R cpsr 800007c0 +26496 clk cpu0 IT (26460) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +26496 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +26496 clk cpu0 R cpsr 800003c0 +26496 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +26497 clk cpu0 IS (26461) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +26498 clk cpu0 IT (26462) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +26498 clk cpu0 R X9 00000000FFFFFFD8 +26499 clk cpu0 IT (26463) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +26499 clk cpu0 R cpsr a00003c0 +26500 clk cpu0 IT (26464) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +26500 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +26501 clk cpu0 IT (26465) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +26502 clk cpu0 IT (26466) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +26502 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +26502 clk cpu0 R X9 0000000003045830 +26503 clk cpu0 IT (26467) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +26503 clk cpu0 R X8 0000000003045800 +26504 clk cpu0 IT (26468) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +26505 clk cpu0 IT (26469) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +26505 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000000 +26505 clk cpu0 R X0 0000000000000000 +26506 clk cpu0 IT (26470) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +26506 clk cpu0 R X1 000000000000000A +26507 clk cpu0 IT (26471) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +26507 clk cpu0 R X30 0000000000092D48 +26508 clk cpu0 IT (26472) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +26508 clk cpu0 R SP_EL0 0000000003045740 +26509 clk cpu0 IT (26473) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +26509 clk cpu0 R X8 3030303030303030 +26510 clk cpu0 IT (26474) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +26510 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +26510 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +26511 clk cpu0 IT (26475) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +26511 clk cpu0 MW4 03045758:000000845758_NS 30303030 +26512 clk cpu0 IT (26476) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +26513 clk cpu0 IT (26477) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +26513 clk cpu0 R X11 0000000000000000 +26514 clk cpu0 IT (26478) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +26514 clk cpu0 R X8 0000000003029000 +26515 clk cpu0 IT (26479) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +26515 clk cpu0 MR4 03029734:000000829734_NS 00000000 +26515 clk cpu0 R X8 0000000000000000 +26516 clk cpu0 IT (26480) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +26516 clk cpu0 R cpsr 600003c0 +26517 clk cpu0 IT (26481) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +26517 clk cpu0 R X8 0000000000000000 +26518 clk cpu0 IT (26482) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +26518 clk cpu0 R cpsr 800003c0 +26519 clk cpu0 IT (26483) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +26520 clk cpu0 IT (26484) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +26520 clk cpu0 R X9 0000000003045748 +26521 clk cpu0 IT (26485) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +26521 clk cpu0 R X10 0000000006216000 +26522 clk cpu0 IT (26486) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +26522 clk cpu0 MR1 03045748:000000845748_NS 30 +26522 clk cpu0 R X8 0000000000000030 +26523 clk cpu0 IT (26487) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +26523 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26523 clk cpu0 R X9 0000000013000000 +26524 clk cpu0 IT (26488) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26524 clk cpu0 MW1 13000000:000013000000_NS 30 +26525 clk cpu0 IT (26489) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +26525 clk cpu0 R SP_EL0 0000000003045760 +26526 clk cpu0 IT (26490) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +26527 clk cpu0 IT (26491) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +26527 clk cpu0 R X20 000000000004D07E +26528 clk cpu0 IT (26492) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +26529 clk cpu0 IT (26493) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26529 clk cpu0 MR1 0004d07e:00001004d07e_NS 0a +26529 clk cpu0 R X8 000000000000000A +26530 clk cpu0 IT (26494) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26530 clk cpu0 R cpsr 800003c0 +26531 clk cpu0 IS (26495) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26532 clk cpu0 IS (26496) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26533 clk cpu0 IT (26497) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26533 clk cpu0 R cpsr 000003c0 +26534 clk cpu0 IT (26498) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26535 clk cpu0 IT (26499) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26535 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26535 clk cpu0 R X9 0000000013000000 +26536 clk cpu0 IT (26500) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26536 clk cpu0 R X27 000000000004D07E +26537 clk cpu0 IT (26501) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26537 clk cpu0 R X20 000000000004D07F +TUBE CPU0: >>PP: 0 +26538 clk cpu0 IT (26502) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26538 clk cpu0 MW1 13000000:000013000000_NS 0a +26539 clk cpu0 IT (26503) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26539 clk cpu0 MR1 0004d07f:00001004d07f_NS 00 +26539 clk cpu0 R X8 0000000000000000 +26540 clk cpu0 IT (26504) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26540 clk cpu0 R cpsr 800003c0 +26541 clk cpu0 IS (26505) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26542 clk cpu0 IT (26506) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26543 clk cpu0 IT (26507) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +26544 clk cpu0 IT (26508) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +26544 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d076 +26544 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +26544 clk cpu0 R X19 000000000004D076 +26544 clk cpu0 R X30 000000000009C560 +26545 clk cpu0 IT (26509) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +26545 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +26545 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +26545 clk cpu0 R X20 0000000003008528 +26545 clk cpu0 R X21 0000000000000000 +26546 clk cpu0 IT (26510) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +26546 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +26546 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +26546 clk cpu0 R X22 000000000004D076 +26546 clk cpu0 R X23 000000000004D06C +26547 clk cpu0 IT (26511) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +26547 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +26547 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +26547 clk cpu0 R X24 000000000004D080 +26547 clk cpu0 R X25 0000000006216000 +26548 clk cpu0 IT (26512) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +26548 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +26548 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216040 +26548 clk cpu0 R X26 0000000006216040 +26548 clk cpu0 R X27 0001000100010001 +26549 clk cpu0 IT (26513) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +26549 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +26549 clk cpu0 R X28 FF7FFF7FFF7FFF7F +26550 clk cpu0 IT (26514) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +26550 clk cpu0 R SP_EL0 0000000003045800 +26551 clk cpu0 IT (26515) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +26552 clk cpu0 IT (26516) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +26552 clk cpu0 R X0 0000000000000001 +26553 clk cpu0 IT (26517) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +26553 clk cpu0 R X1 0000000000000000 +26554 clk cpu0 IT (26518) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +26554 clk cpu0 R X2 0000000000000000 +26555 clk cpu0 IT (26519) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +26556 clk cpu0 IT (26520) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +26557 clk cpu0 IT (26521) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +26557 clk cpu0 R X0 0000000003008528 +26558 clk cpu0 IT (26522) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +26558 clk cpu0 R X30 000000000009C57C +26559 clk cpu0 IT (26523) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +26560 clk cpu0 IT (26524) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +26560 clk cpu0 R X8 0000000006216000 +26561 clk cpu0 IT (26525) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +26561 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +26561 clk cpu0 R X8 0000000000000001 +26562 clk cpu0 IT (26526) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +26562 clk cpu0 R cpsr 800003c0 +26563 clk cpu0 IT (26527) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +26564 clk cpu0 IT (26528) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +26565 clk cpu0 IT (26529) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +26565 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000001 +26565 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b49c +26565 clk cpu0 R X19 0000000000000001 +26565 clk cpu0 R X30 000000000009B49C +26566 clk cpu0 IT (26530) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +26566 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +26566 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +26566 clk cpu0 R X20 000000000004D0CC +26566 clk cpu0 R X21 000000000004CF91 +26567 clk cpu0 IT (26531) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +26567 clk cpu0 R SP_EL0 0000000003045890 +26568 clk cpu0 IT (26532) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +26569 clk cpu0 IT (26533) 0009b49c:00001009b49c_NS b9400342 O EL0t_n : LDR w2,[x26,#0] +26569 clk cpu0 MR4 06216040:000015216040_NS 00000000 +26569 clk cpu0 R X2 0000000000000000 +26570 clk cpu0 IT (26534) 0009b4a0:00001009b4a0_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +26570 clk cpu0 R X0 0000000000000000 +26571 clk cpu0 IT (26535) 0009b4a4:00001009b4a4_NS aa1703e1 O EL0t_n : MOV x1,x23 +26571 clk cpu0 R X1 000000000004D06C +26572 clk cpu0 IT (26536) 0009b4a8:00001009b4a8_NS 94000409 O EL0t_n : BL 0x9c4cc +26572 clk cpu0 R X30 000000000009B4AC +26573 clk cpu0 IT (26537) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +26573 clk cpu0 R SP_EL0 0000000003045800 +26574 clk cpu0 IT (26538) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +26574 clk cpu0 R X8 0000000006216000 +26575 clk cpu0 IT (26539) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +26575 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +26575 clk cpu0 R X8 0000000000000003 +26576 clk cpu0 IT (26540) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +26576 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +26576 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +26577 clk cpu0 IT (26541) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +26577 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000001 +26577 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b4ac +26578 clk cpu0 IT (26542) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +26578 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +26578 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +26579 clk cpu0 IT (26543) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +26579 clk cpu0 R cpsr 200003c0 +26580 clk cpu0 IT (26544) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +26580 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +26580 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +26581 clk cpu0 IT (26545) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +26581 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +26581 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +26582 clk cpu0 IT (26546) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +26582 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +26582 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +26583 clk cpu0 IT (26547) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +26583 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +26583 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +26584 clk cpu0 IS (26548) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +26585 clk cpu0 IT (26549) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +26585 clk cpu0 R X20 0000000003008000 +26586 clk cpu0 IT (26550) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +26586 clk cpu0 R X20 0000000003008528 +26587 clk cpu0 IT (26551) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +26587 clk cpu0 R X0 0000000003008528 +26588 clk cpu0 IT (26552) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +26588 clk cpu0 R X19 000000000004D06C +26589 clk cpu0 IT (26553) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +26589 clk cpu0 R X30 000000000009C510 +26590 clk cpu0 IT (26554) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +26590 clk cpu0 R X8 0000000006216000 +26591 clk cpu0 IT (26555) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +26591 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +26591 clk cpu0 R X8 0000000000000001 +26592 clk cpu0 IT (26556) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +26592 clk cpu0 R cpsr 800003c0 +26593 clk cpu0 IT (26557) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +26594 clk cpu0 IT (26558) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +26595 clk cpu0 IT (26559) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +26595 clk cpu0 R X9 0000000003045800 +26596 clk cpu0 IT (26560) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +26596 clk cpu0 R X8 00000000FFFFFFD0 +26597 clk cpu0 IT (26561) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +26597 clk cpu0 R X10 0000000003045890 +26598 clk cpu0 IT (26562) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +26598 clk cpu0 R X9 0000000003045830 +26599 clk cpu0 IT (26563) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +26599 clk cpu0 R X0 0000000000000000 +26600 clk cpu0 IT (26564) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +26600 clk cpu0 R X1 0000000000000000 +26601 clk cpu0 IT (26565) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +26601 clk cpu0 R X2 0000000000000000 +26602 clk cpu0 IT (26566) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +26602 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +26603 clk cpu0 IT (26567) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +26603 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +26603 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +26604 clk cpu0 IT (26568) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +26605 clk cpu0 IT (26569) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +26605 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +26605 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +26605 clk cpu0 R X8 0000000000000000 +26605 clk cpu0 R X10 0000000003045830 +26606 clk cpu0 IT (26570) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +26606 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +26606 clk cpu0 R X9 0000000003045890 +26607 clk cpu0 IT (26571) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +26607 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +26607 clk cpu0 R X11 00000000FFFFFFD0 +26608 clk cpu0 IT (26572) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +26608 clk cpu0 R X21 0000000000000000 +26609 clk cpu0 IT (26573) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +26609 clk cpu0 R X1 0000000003045830 +26610 clk cpu0 IT (26574) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +26610 clk cpu0 R X0 000000000004D06C +26611 clk cpu0 IT (26575) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +26611 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +26611 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +26612 clk cpu0 IT (26576) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +26612 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +26613 clk cpu0 IT (26577) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +26613 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +26614 clk cpu0 IT (26578) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +26614 clk cpu0 R X30 000000000009C560 +26615 clk cpu0 IT (26579) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +26615 clk cpu0 R SP_EL0 0000000003045760 +26616 clk cpu0 IT (26580) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +26616 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d06c +26616 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +26617 clk cpu0 IT (26581) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +26617 clk cpu0 R X19 0000000003045830 +26618 clk cpu0 IT (26582) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +26618 clk cpu0 R X1 000000000004C000 +26619 clk cpu0 IT (26583) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +26619 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +26619 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +26620 clk cpu0 IT (26584) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +26620 clk cpu0 R X20 000000000004D06C +26621 clk cpu0 IT (26585) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +26621 clk cpu0 R X1 000000000004C00B +26622 clk cpu0 IT (26586) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +26622 clk cpu0 R X0 0000000003045764 +26623 clk cpu0 IT (26587) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +26623 clk cpu0 R X2 000000000000003B +26624 clk cpu0 IT (26588) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +26624 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +26625 clk cpu0 IT (26589) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +26625 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +26625 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216040 +26626 clk cpu0 IT (26590) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +26626 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +26626 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +26627 clk cpu0 IT (26591) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +26627 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +26627 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +26628 clk cpu0 IT (26592) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +26628 clk cpu0 R X30 0000000000092B80 +26629 clk cpu0 IT (26593) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +26629 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +26629 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +26629 clk cpu0 R SP_EL0 0000000003045750 +26630 clk cpu0 IT (26594) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +26630 clk cpu0 R X19 0000000003045764 +26631 clk cpu0 IT (26595) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +26631 clk cpu0 R X30 00000000000104DC +26632 clk cpu0 IT (26596) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +26632 clk cpu0 R cpsr 200003c0 +26633 clk cpu0 IS (26597) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +26634 clk cpu0 IT (26598) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +26634 clk cpu0 R cpsr 400003c0 +26635 clk cpu0 IT (26599) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +26636 clk cpu0 IT (26600) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +26636 clk cpu0 R cpsr 000003c0 +26636 clk cpu0 R X10 0000000000000003 +26637 clk cpu0 IS (26601) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +26638 clk cpu0 IT (26602) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +26638 clk cpu0 R X9 0000000000000020 +26639 clk cpu0 IT (26603) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +26639 clk cpu0 R X8 000000000004C008 +26640 clk cpu0 IT (26604) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +26640 clk cpu0 R cpsr 200003c0 +26641 clk cpu0 IT (26605) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +26641 clk cpu0 R X9 0000000000000008 +26642 clk cpu0 IS (26606) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +26643 clk cpu0 IT (26607) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +26643 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +26643 clk cpu0 R X12 000000000A00000A +26644 clk cpu0 IT (26608) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +26644 clk cpu0 R X10 0000000000000018 +26645 clk cpu0 IT (26609) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +26645 clk cpu0 R X11 000000000000003B +26646 clk cpu0 IT (26610) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26646 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +26646 clk cpu0 R X8 000000000004C00C +26646 clk cpu0 R X13 000000006F727245 +26647 clk cpu0 IT (26611) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26647 clk cpu0 R X12 000000000000000A +26648 clk cpu0 IT (26612) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26648 clk cpu0 R X11 0000000000000037 +26649 clk cpu0 IT (26613) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26649 clk cpu0 R cpsr 200003c0 +26650 clk cpu0 IT (26614) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26650 clk cpu0 R X14 0000000072724500 +26651 clk cpu0 IT (26615) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26651 clk cpu0 R X12 000000007272450A +26652 clk cpu0 IT (26616) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26652 clk cpu0 MW4 03045764:000000845764_NS 7272450a +26652 clk cpu0 R X0 0000000003045768 +26653 clk cpu0 IT (26617) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26653 clk cpu0 R X12 000000006F727245 +26654 clk cpu0 IT (26618) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26655 clk cpu0 IT (26619) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26655 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +26655 clk cpu0 R X8 000000000004C010 +26655 clk cpu0 R X13 0000000049203A72 +26656 clk cpu0 IT (26620) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26656 clk cpu0 R X12 000000000000006F +26657 clk cpu0 IT (26621) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26657 clk cpu0 R X11 0000000000000033 +26658 clk cpu0 IT (26622) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26658 clk cpu0 R cpsr 200003c0 +26659 clk cpu0 IT (26623) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26659 clk cpu0 R X14 00000000203A7200 +26660 clk cpu0 IT (26624) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26660 clk cpu0 R X12 00000000203A726F +26661 clk cpu0 IT (26625) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26661 clk cpu0 MW4 03045768:000000845768_NS 203a726f +26661 clk cpu0 R X0 000000000304576C +26662 clk cpu0 IT (26626) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26662 clk cpu0 R X12 0000000049203A72 +26663 clk cpu0 IT (26627) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26664 clk cpu0 IT (26628) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26664 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +26664 clk cpu0 R X8 000000000004C014 +26664 clk cpu0 R X13 0000000067656C6C +26665 clk cpu0 IT (26629) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26665 clk cpu0 R X12 0000000000000049 +26666 clk cpu0 IT (26630) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26666 clk cpu0 R X11 000000000000002F +26667 clk cpu0 IT (26631) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26667 clk cpu0 R cpsr 200003c0 +26668 clk cpu0 IT (26632) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26668 clk cpu0 R X14 00000000656C6C00 +26669 clk cpu0 IT (26633) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26669 clk cpu0 R X12 00000000656C6C49 +26670 clk cpu0 IT (26634) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26670 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +26670 clk cpu0 R X0 0000000003045770 +26671 clk cpu0 IT (26635) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26671 clk cpu0 R X12 0000000067656C6C +26672 clk cpu0 IT (26636) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26673 clk cpu0 IT (26637) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26673 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +26673 clk cpu0 R X8 000000000004C018 +26673 clk cpu0 R X13 0000000066206C61 +26674 clk cpu0 IT (26638) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26674 clk cpu0 R X12 0000000000000067 +26675 clk cpu0 IT (26639) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26675 clk cpu0 R X11 000000000000002B +26676 clk cpu0 IT (26640) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26676 clk cpu0 R cpsr 200003c0 +26677 clk cpu0 IT (26641) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26677 clk cpu0 R X14 00000000206C6100 +26678 clk cpu0 IT (26642) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26678 clk cpu0 R X12 00000000206C6167 +26679 clk cpu0 IT (26643) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26679 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +26679 clk cpu0 R X0 0000000003045774 +26680 clk cpu0 IT (26644) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26680 clk cpu0 R X12 0000000066206C61 +26681 clk cpu0 IT (26645) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26682 clk cpu0 IT (26646) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26682 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +26682 clk cpu0 R X8 000000000004C01C +26682 clk cpu0 R X13 00000000616D726F +26683 clk cpu0 IT (26647) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26683 clk cpu0 R X12 0000000000000066 +26684 clk cpu0 IT (26648) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26684 clk cpu0 R X11 0000000000000027 +26685 clk cpu0 IT (26649) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26685 clk cpu0 R cpsr 200003c0 +26686 clk cpu0 IT (26650) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26686 clk cpu0 R X14 000000006D726F00 +26687 clk cpu0 IT (26651) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26687 clk cpu0 R X12 000000006D726F66 +26688 clk cpu0 IT (26652) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26688 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +26688 clk cpu0 R X0 0000000003045778 +26689 clk cpu0 IT (26653) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26689 clk cpu0 R X12 00000000616D726F +26690 clk cpu0 IT (26654) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26691 clk cpu0 IT (26655) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26691 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +26691 clk cpu0 R X8 000000000004C020 +26691 clk cpu0 R X13 0000000070732074 +26692 clk cpu0 IT (26656) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26692 clk cpu0 R X12 0000000000000061 +26693 clk cpu0 IT (26657) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26693 clk cpu0 R X11 0000000000000023 +26694 clk cpu0 IT (26658) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26694 clk cpu0 R cpsr 200003c0 +26695 clk cpu0 IT (26659) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26695 clk cpu0 R X14 0000000073207400 +26696 clk cpu0 IT (26660) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26696 clk cpu0 R X12 0000000073207461 +26697 clk cpu0 IT (26661) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26697 clk cpu0 MW4 03045778:000000845778_NS 73207461 +26697 clk cpu0 R X0 000000000304577C +26698 clk cpu0 IT (26662) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26698 clk cpu0 R X12 0000000070732074 +26699 clk cpu0 IT (26663) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26700 clk cpu0 IT (26664) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26700 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +26700 clk cpu0 R X8 000000000004C024 +26700 clk cpu0 R X13 0000000066696365 +26701 clk cpu0 IT (26665) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26701 clk cpu0 R X12 0000000000000070 +26702 clk cpu0 IT (26666) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26702 clk cpu0 R X11 000000000000001F +26703 clk cpu0 IT (26667) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26703 clk cpu0 R cpsr 200003c0 +26704 clk cpu0 IT (26668) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26704 clk cpu0 R X14 0000000069636500 +26705 clk cpu0 IT (26669) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26705 clk cpu0 R X12 0000000069636570 +26706 clk cpu0 IT (26670) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26706 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +26706 clk cpu0 R X0 0000000003045780 +26707 clk cpu0 IT (26671) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26707 clk cpu0 R X12 0000000066696365 +26708 clk cpu0 IT (26672) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26709 clk cpu0 IT (26673) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26709 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +26709 clk cpu0 R X8 000000000004C028 +26709 clk cpu0 R X13 0000000020726569 +26710 clk cpu0 IT (26674) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26710 clk cpu0 R X12 0000000000000066 +26711 clk cpu0 IT (26675) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26711 clk cpu0 R X11 000000000000001B +26712 clk cpu0 IT (26676) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26712 clk cpu0 R cpsr 200003c0 +26713 clk cpu0 IT (26677) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26713 clk cpu0 R X14 0000000072656900 +26714 clk cpu0 IT (26678) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26714 clk cpu0 R X12 0000000072656966 +26715 clk cpu0 IT (26679) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26715 clk cpu0 MW4 03045780:000000845780_NS 72656966 +26715 clk cpu0 R X0 0000000003045784 +26716 clk cpu0 IT (26680) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26716 clk cpu0 R X12 0000000020726569 +26717 clk cpu0 IT (26681) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26718 clk cpu0 IT (26682) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26718 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +26718 clk cpu0 R X8 000000000004C02C +26718 clk cpu0 R X13 0000000064657375 +26719 clk cpu0 IT (26683) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26719 clk cpu0 R X12 0000000000000020 +26720 clk cpu0 IT (26684) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26720 clk cpu0 R X11 0000000000000017 +26721 clk cpu0 IT (26685) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26721 clk cpu0 R cpsr 200003c0 +26722 clk cpu0 IT (26686) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26722 clk cpu0 R X14 0000000065737500 +26723 clk cpu0 IT (26687) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26723 clk cpu0 R X12 0000000065737520 +26724 clk cpu0 IT (26688) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26724 clk cpu0 MW4 03045784:000000845784_NS 65737520 +26724 clk cpu0 R X0 0000000003045788 +26725 clk cpu0 IT (26689) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26725 clk cpu0 R X12 0000000064657375 +26726 clk cpu0 IT (26690) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26727 clk cpu0 IT (26691) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26727 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +26727 clk cpu0 R X8 000000000004C030 +26727 clk cpu0 R X13 000000005F27203A +26728 clk cpu0 IT (26692) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26728 clk cpu0 R X12 0000000000000064 +26729 clk cpu0 IT (26693) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26729 clk cpu0 R X11 0000000000000013 +26730 clk cpu0 IT (26694) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26730 clk cpu0 R cpsr 200003c0 +26731 clk cpu0 IT (26695) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26731 clk cpu0 R X14 0000000027203A00 +26732 clk cpu0 IT (26696) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26732 clk cpu0 R X12 0000000027203A64 +26733 clk cpu0 IT (26697) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26733 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +26733 clk cpu0 R X0 000000000304578C +26734 clk cpu0 IT (26698) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26734 clk cpu0 R X12 000000005F27203A +26735 clk cpu0 IT (26699) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26736 clk cpu0 IT (26700) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26736 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +26736 clk cpu0 R X8 000000000004C034 +26736 clk cpu0 R X13 0000000045202E27 +26737 clk cpu0 IT (26701) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26737 clk cpu0 R X12 000000000000005F +26738 clk cpu0 IT (26702) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26738 clk cpu0 R X11 000000000000000F +26739 clk cpu0 IT (26703) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26739 clk cpu0 R cpsr 200003c0 +26740 clk cpu0 IT (26704) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26740 clk cpu0 R X14 00000000202E2700 +26741 clk cpu0 IT (26705) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26741 clk cpu0 R X12 00000000202E275F +26742 clk cpu0 IT (26706) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26742 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +26742 clk cpu0 R X0 0000000003045790 +26743 clk cpu0 IT (26707) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26743 clk cpu0 R X12 0000000045202E27 +26744 clk cpu0 IT (26708) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26745 clk cpu0 IT (26709) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26745 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +26745 clk cpu0 R X8 000000000004C038 +26745 clk cpu0 R X13 000000006E69646E +26746 clk cpu0 IT (26710) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26746 clk cpu0 R X12 0000000000000045 +26747 clk cpu0 IT (26711) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26747 clk cpu0 R X11 000000000000000B +26748 clk cpu0 IT (26712) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26748 clk cpu0 R cpsr 200003c0 +26749 clk cpu0 IT (26713) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26749 clk cpu0 R X14 0000000069646E00 +26750 clk cpu0 IT (26714) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26750 clk cpu0 R X12 0000000069646E45 +26751 clk cpu0 IT (26715) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26751 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +26751 clk cpu0 R X0 0000000003045794 +26752 clk cpu0 IT (26716) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26752 clk cpu0 R X12 000000006E69646E +26753 clk cpu0 IT (26717) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26754 clk cpu0 IT (26718) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26754 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +26754 clk cpu0 R X8 000000000004C03C +26754 clk cpu0 R X13 0000000065542067 +26755 clk cpu0 IT (26719) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26755 clk cpu0 R X12 000000000000006E +26756 clk cpu0 IT (26720) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26756 clk cpu0 R X11 0000000000000007 +26757 clk cpu0 IT (26721) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26757 clk cpu0 R cpsr 200003c0 +26758 clk cpu0 IT (26722) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26758 clk cpu0 R X14 0000000054206700 +26759 clk cpu0 IT (26723) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26759 clk cpu0 R X12 000000005420676E +26760 clk cpu0 IT (26724) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26760 clk cpu0 MW4 03045794:000000845794_NS 5420676e +26760 clk cpu0 R X0 0000000003045798 +26761 clk cpu0 IT (26725) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26761 clk cpu0 R X12 0000000065542067 +26762 clk cpu0 IT (26726) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26763 clk cpu0 IT (26727) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +26763 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +26763 clk cpu0 R X8 000000000004C040 +26763 clk cpu0 R X13 000000000A2E7473 +26764 clk cpu0 IT (26728) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +26764 clk cpu0 R X12 0000000000000065 +26765 clk cpu0 IT (26729) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +26765 clk cpu0 R X11 0000000000000003 +26766 clk cpu0 IT (26730) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +26766 clk cpu0 R cpsr 600003c0 +26767 clk cpu0 IT (26731) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +26767 clk cpu0 R X14 000000002E747300 +26768 clk cpu0 IT (26732) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +26768 clk cpu0 R X12 000000002E747365 +26769 clk cpu0 IT (26733) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +26769 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +26769 clk cpu0 R X0 000000000304579C +26770 clk cpu0 IT (26734) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +26770 clk cpu0 R X12 000000000A2E7473 +26771 clk cpu0 IS (26735) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +26772 clk cpu0 IT (26736) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +26772 clk cpu0 R X2 0000000000000003 +26773 clk cpu0 IT (26737) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +26773 clk cpu0 R X9 0000000000000001 +26774 clk cpu0 IT (26738) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +26774 clk cpu0 R X8 000000000004C03F +26775 clk cpu0 IT (26739) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +26775 clk cpu0 R X1 000000000004C043 +26776 clk cpu0 IT (26740) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +26776 clk cpu0 R cpsr 200003c0 +26777 clk cpu0 IS (26741) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +26778 clk cpu0 IT (26742) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +26778 clk cpu0 MR1 0004c043:00001004c043_NS 0a +26778 clk cpu0 R X8 000000000000000A +26779 clk cpu0 IT (26743) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +26779 clk cpu0 MW1 0304579c:00000084579c_NS 0a +26780 clk cpu0 IS (26744) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +26781 clk cpu0 IT (26745) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +26781 clk cpu0 MR1 0004c044:00001004c044_NS 00 +26781 clk cpu0 R X8 0000000000000000 +26782 clk cpu0 IT (26746) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +26782 clk cpu0 R cpsr 600003c0 +26783 clk cpu0 IT (26747) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +26783 clk cpu0 MW1 0304579d:00000084579d_NS 00 +26784 clk cpu0 IS (26748) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +26785 clk cpu0 IT (26749) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +26785 clk cpu0 MR1 0004c045:00001004c045_NS 00 +26785 clk cpu0 R X8 0000000000000000 +26786 clk cpu0 IT (26750) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +26786 clk cpu0 MW1 0304579e:00000084579e_NS 00 +26787 clk cpu0 IT (26751) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +26788 clk cpu0 IT (26752) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +26788 clk cpu0 R X0 0000000003045764 +26789 clk cpu0 IT (26753) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +26789 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +26789 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +26789 clk cpu0 R SP_EL0 0000000003045760 +26789 clk cpu0 R X19 0000000003045830 +26789 clk cpu0 R X30 0000000000092B80 +26790 clk cpu0 IT (26754) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +26791 clk cpu0 IT (26755) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +26791 clk cpu0 R X22 000000000004C000 +26792 clk cpu0 IT (26756) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +26792 clk cpu0 R X23 000000000004C000 +26793 clk cpu0 IT (26757) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +26793 clk cpu0 R X26 0000000000000000 +26794 clk cpu0 IT (26758) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +26794 clk cpu0 R X21 0000000003029000 +26795 clk cpu0 IT (26759) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +26795 clk cpu0 R X22 000000000004C108 +26796 clk cpu0 IT (26760) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +26796 clk cpu0 R X23 000000000004C129 +26797 clk cpu0 IT (26761) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +26797 clk cpu0 R X24 0000000003041000 +26798 clk cpu0 IT (26762) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +26798 clk cpu0 R X25 0000000006216000 +26799 clk cpu0 IT (26763) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +26800 clk cpu0 IT (26764) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26800 clk cpu0 MR1 0004d06c:00001004d06c_NS 3e +26800 clk cpu0 R X8 000000000000003E +26801 clk cpu0 IT (26765) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26801 clk cpu0 R cpsr 200003c0 +26802 clk cpu0 IS (26766) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26803 clk cpu0 IS (26767) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26804 clk cpu0 IT (26768) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26804 clk cpu0 R cpsr 000003c0 +26805 clk cpu0 IT (26769) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26806 clk cpu0 IT (26770) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26806 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26806 clk cpu0 R X9 0000000013000000 +26807 clk cpu0 IT (26771) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26807 clk cpu0 R X27 000000000004D06C +26808 clk cpu0 IT (26772) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26808 clk cpu0 R X20 000000000004D06D +26809 clk cpu0 IT (26773) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26809 clk cpu0 MW1 13000000:000013000000_NS 3e +26810 clk cpu0 IT (26774) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26810 clk cpu0 MR1 0004d06d:00001004d06d_NS 3e +26810 clk cpu0 R X8 000000000000003E +26811 clk cpu0 IT (26775) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26811 clk cpu0 R cpsr 200003c0 +26812 clk cpu0 IS (26776) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26813 clk cpu0 IS (26777) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26814 clk cpu0 IT (26778) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26814 clk cpu0 R cpsr 000003c0 +26815 clk cpu0 IT (26779) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26816 clk cpu0 IT (26780) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26816 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26816 clk cpu0 R X9 0000000013000000 +26817 clk cpu0 IT (26781) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26817 clk cpu0 R X27 000000000004D06D +26818 clk cpu0 IT (26782) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26818 clk cpu0 R X20 000000000004D06E +26819 clk cpu0 IT (26783) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26819 clk cpu0 MW1 13000000:000013000000_NS 3e +26820 clk cpu0 IT (26784) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26820 clk cpu0 MR1 0004d06e:00001004d06e_NS 50 +26820 clk cpu0 R X8 0000000000000050 +26821 clk cpu0 IT (26785) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26821 clk cpu0 R cpsr 200003c0 +26822 clk cpu0 IS (26786) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26823 clk cpu0 IS (26787) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26824 clk cpu0 IT (26788) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26824 clk cpu0 R cpsr 000003c0 +26825 clk cpu0 IT (26789) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26826 clk cpu0 IT (26790) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26826 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26826 clk cpu0 R X9 0000000013000000 +26827 clk cpu0 IT (26791) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26827 clk cpu0 R X27 000000000004D06E +26828 clk cpu0 IT (26792) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26828 clk cpu0 R X20 000000000004D06F +26829 clk cpu0 IT (26793) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26829 clk cpu0 MW1 13000000:000013000000_NS 50 +26830 clk cpu0 IT (26794) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26830 clk cpu0 MR1 0004d06f:00001004d06f_NS 46 +26830 clk cpu0 R X8 0000000000000046 +26831 clk cpu0 IT (26795) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26831 clk cpu0 R cpsr 200003c0 +26832 clk cpu0 IS (26796) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26833 clk cpu0 IS (26797) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26834 clk cpu0 IT (26798) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26834 clk cpu0 R cpsr 000003c0 +26835 clk cpu0 IT (26799) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26836 clk cpu0 IT (26800) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26836 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26836 clk cpu0 R X9 0000000013000000 +26837 clk cpu0 IT (26801) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26837 clk cpu0 R X27 000000000004D06F +26838 clk cpu0 IT (26802) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26838 clk cpu0 R X20 000000000004D070 +26839 clk cpu0 IT (26803) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26839 clk cpu0 MW1 13000000:000013000000_NS 46 +26840 clk cpu0 IT (26804) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26840 clk cpu0 MR1 0004d070:00001004d070_NS 3a +26840 clk cpu0 R X8 000000000000003A +26841 clk cpu0 IT (26805) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26841 clk cpu0 R cpsr 200003c0 +26842 clk cpu0 IS (26806) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26843 clk cpu0 IS (26807) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26844 clk cpu0 IT (26808) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26844 clk cpu0 R cpsr 400003c0 +26845 clk cpu0 IS (26809) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26846 clk cpu0 IT (26810) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +26846 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +26846 clk cpu0 R X8 0000000000000000 +26847 clk cpu0 IT (26811) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +26847 clk cpu0 MR8 0004d070:00001004d070_NS 3e3e000a_6425203a +26847 clk cpu0 R X0 3E3E000A6425203A +26848 clk cpu0 IT (26812) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +26848 clk cpu0 R cpsr 800003c0 +26849 clk cpu0 IT (26813) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +26850 clk cpu0 IT (26814) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +26850 clk cpu0 R X27 0000000000000000 +26851 clk cpu0 IT (26815) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +26851 clk cpu0 R X28 000000000004D070 +26852 clk cpu0 IT (26816) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +26852 clk cpu0 R X8 00000000FFFFFFF8 +26853 clk cpu0 IT (26817) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26853 clk cpu0 R cpsr 000003c0 +26853 clk cpu0 R X9 000000000000003A +26854 clk cpu0 IS (26818) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26855 clk cpu0 IT (26819) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26855 clk cpu0 R cpsr 200003c0 +26856 clk cpu0 IS (26820) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26857 clk cpu0 IT (26821) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26857 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26857 clk cpu0 R X9 0000000013000000 +26858 clk cpu0 IT (26822) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26858 clk cpu0 R cpsr 800003c0 +26858 clk cpu0 R X8 00000000FFFFFFF9 +26859 clk cpu0 IT (26823) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26859 clk cpu0 MW1 13000000:000013000000_NS 3a +26860 clk cpu0 IT (26824) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26860 clk cpu0 R X0 003E3E000A642520 +26861 clk cpu0 IT (26825) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26862 clk cpu0 IT (26826) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26862 clk cpu0 R cpsr 000003c0 +26862 clk cpu0 R X9 0000000000000020 +26863 clk cpu0 IS (26827) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26864 clk cpu0 IT (26828) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26864 clk cpu0 R cpsr 800003c0 +26865 clk cpu0 IS (26829) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26866 clk cpu0 IT (26830) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26866 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26866 clk cpu0 R X9 0000000013000000 +26867 clk cpu0 IT (26831) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +26867 clk cpu0 R cpsr 800003c0 +26867 clk cpu0 R X8 00000000FFFFFFFA +26868 clk cpu0 IT (26832) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +26868 clk cpu0 MW1 13000000:000013000000_NS 20 +26869 clk cpu0 IT (26833) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +26869 clk cpu0 R X0 00003E3E000A6425 +26870 clk cpu0 IT (26834) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +26871 clk cpu0 IT (26835) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +26871 clk cpu0 R cpsr 000003c0 +26871 clk cpu0 R X9 0000000000000025 +26872 clk cpu0 IS (26836) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +26873 clk cpu0 IT (26837) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +26873 clk cpu0 R cpsr 600003c0 +26874 clk cpu0 IT (26838) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +26875 clk cpu0 IT (26839) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +26875 clk cpu0 R X8 00000000FFFFFFFA +26876 clk cpu0 IT (26840) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +26876 clk cpu0 R X9 0000000000000001 +26877 clk cpu0 IT (26841) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +26877 clk cpu0 R X9 000000000004D071 +26878 clk cpu0 IT (26842) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +26878 clk cpu0 R cpsr 200003c0 +26879 clk cpu0 IT (26843) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +26879 clk cpu0 R X27 000000000004D071 +26880 clk cpu0 IT (26844) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +26880 clk cpu0 R X20 000000000004D072 +26881 clk cpu0 IT (26845) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +26882 clk cpu0 IT (26846) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26882 clk cpu0 MR1 0004d072:00001004d072_NS 25 +26882 clk cpu0 R X8 0000000000000025 +26883 clk cpu0 IT (26847) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26883 clk cpu0 R cpsr 600003c0 +26884 clk cpu0 IT (26848) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26885 clk cpu0 IT (26849) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +26885 clk cpu0 MW4 03029734:000000829734_NS 00000000 +26886 clk cpu0 IT (26850) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +26886 clk cpu0 R X27 000000000004D072 +26887 clk cpu0 IT (26851) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +26887 clk cpu0 MR1 0004d073:00001004d073_NS 64 +26887 clk cpu0 R X27 000000000004D073 +26887 clk cpu0 R X28 0000000000000064 +26888 clk cpu0 IT (26852) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +26888 clk cpu0 R cpsr 200003c0 +26889 clk cpu0 IS (26853) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +26890 clk cpu0 IT (26854) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +26891 clk cpu0 IT (26855) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +26891 clk cpu0 R X8 000000000000000C +26892 clk cpu0 IT (26856) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +26892 clk cpu0 R cpsr 800003c0 +26893 clk cpu0 IS (26857) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +26894 clk cpu0 IT (26858) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +26894 clk cpu0 R X9 0000000000092CE0 +26895 clk cpu0 IT (26859) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +26895 clk cpu0 MR1 0004c114:00001004c114_NS 0e +26895 clk cpu0 R X10 000000000000000E +26896 clk cpu0 IT (26860) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +26896 clk cpu0 R X9 0000000000092D18 +26897 clk cpu0 IT (26861) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +26897 clk cpu0 R cpsr 800007c0 +26898 clk cpu0 IT (26862) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +26898 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +26898 clk cpu0 R cpsr 800003c0 +26898 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +26899 clk cpu0 IS (26863) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +26900 clk cpu0 IT (26864) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +26900 clk cpu0 R X9 00000000FFFFFFD8 +26901 clk cpu0 IT (26865) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +26901 clk cpu0 R cpsr a00003c0 +26902 clk cpu0 IT (26866) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +26902 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +26903 clk cpu0 IT (26867) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +26904 clk cpu0 IT (26868) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +26904 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +26904 clk cpu0 R X9 0000000003045830 +26905 clk cpu0 IT (26869) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +26905 clk cpu0 R X8 0000000003045800 +26906 clk cpu0 IT (26870) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +26907 clk cpu0 IT (26871) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +26907 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000000 +26907 clk cpu0 R X0 0000000000000000 +26908 clk cpu0 IT (26872) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +26908 clk cpu0 R X1 000000000000000A +26909 clk cpu0 IT (26873) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +26909 clk cpu0 R X30 0000000000092D48 +26910 clk cpu0 IT (26874) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +26910 clk cpu0 R SP_EL0 0000000003045740 +26911 clk cpu0 IT (26875) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +26911 clk cpu0 R X8 3030303030303030 +26912 clk cpu0 IT (26876) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +26912 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +26912 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +26913 clk cpu0 IT (26877) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +26913 clk cpu0 MW4 03045758:000000845758_NS 30303030 +26914 clk cpu0 IT (26878) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +26915 clk cpu0 IT (26879) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +26915 clk cpu0 R X11 0000000000000000 +26916 clk cpu0 IT (26880) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +26916 clk cpu0 R X8 0000000003029000 +26917 clk cpu0 IT (26881) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +26917 clk cpu0 MR4 03029734:000000829734_NS 00000000 +26917 clk cpu0 R X8 0000000000000000 +26918 clk cpu0 IT (26882) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +26918 clk cpu0 R cpsr 600003c0 +26919 clk cpu0 IT (26883) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +26919 clk cpu0 R X8 0000000000000000 +26920 clk cpu0 IT (26884) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +26920 clk cpu0 R cpsr 800003c0 +26921 clk cpu0 IT (26885) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +26922 clk cpu0 IT (26886) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +26922 clk cpu0 R X9 0000000003045748 +26923 clk cpu0 IT (26887) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +26923 clk cpu0 R X10 0000000006216000 +26924 clk cpu0 IT (26888) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +26924 clk cpu0 MR1 03045748:000000845748_NS 30 +26924 clk cpu0 R X8 0000000000000030 +26925 clk cpu0 IT (26889) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +26925 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26925 clk cpu0 R X9 0000000013000000 +26926 clk cpu0 IT (26890) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26926 clk cpu0 MW1 13000000:000013000000_NS 30 +26927 clk cpu0 IT (26891) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +26927 clk cpu0 R SP_EL0 0000000003045760 +26928 clk cpu0 IT (26892) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +26929 clk cpu0 IT (26893) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +26929 clk cpu0 R X20 000000000004D074 +26930 clk cpu0 IT (26894) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +26931 clk cpu0 IT (26895) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26931 clk cpu0 MR1 0004d074:00001004d074_NS 0a +26931 clk cpu0 R X8 000000000000000A +26932 clk cpu0 IT (26896) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26932 clk cpu0 R cpsr 800003c0 +26933 clk cpu0 IS (26897) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26934 clk cpu0 IS (26898) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26935 clk cpu0 IT (26899) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +26935 clk cpu0 R cpsr 000003c0 +26936 clk cpu0 IT (26900) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +26937 clk cpu0 IT (26901) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +26937 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +26937 clk cpu0 R X9 0000000013000000 +26938 clk cpu0 IT (26902) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +26938 clk cpu0 R X27 000000000004D074 +26939 clk cpu0 IT (26903) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +26939 clk cpu0 R X20 000000000004D075 +TUBE CPU0: >>PF: 0 +26940 clk cpu0 IT (26904) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +26940 clk cpu0 MW1 13000000:000013000000_NS 0a +26941 clk cpu0 IT (26905) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +26941 clk cpu0 MR1 0004d075:00001004d075_NS 00 +26941 clk cpu0 R X8 0000000000000000 +26942 clk cpu0 IT (26906) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +26942 clk cpu0 R cpsr 800003c0 +26943 clk cpu0 IS (26907) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +26944 clk cpu0 IT (26908) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +26945 clk cpu0 IT (26909) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +26946 clk cpu0 IT (26910) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +26946 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d06c +26946 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +26946 clk cpu0 R X19 000000000004D06C +26946 clk cpu0 R X30 000000000009C560 +26947 clk cpu0 IT (26911) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +26947 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +26947 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +26947 clk cpu0 R X20 0000000003008528 +26947 clk cpu0 R X21 0000000000000000 +26948 clk cpu0 IT (26912) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +26948 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +26948 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +26948 clk cpu0 R X22 000000000004D076 +26948 clk cpu0 R X23 000000000004D06C +26949 clk cpu0 IT (26913) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +26949 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +26949 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +26949 clk cpu0 R X24 000000000004D080 +26949 clk cpu0 R X25 0000000006216000 +26950 clk cpu0 IT (26914) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +26950 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +26950 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216040 +26950 clk cpu0 R X26 0000000006216040 +26950 clk cpu0 R X27 0001000100010001 +26951 clk cpu0 IT (26915) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +26951 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +26951 clk cpu0 R X28 FF7FFF7FFF7FFF7F +26952 clk cpu0 IT (26916) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +26952 clk cpu0 R SP_EL0 0000000003045800 +26953 clk cpu0 IT (26917) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +26954 clk cpu0 IT (26918) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +26954 clk cpu0 R X0 0000000000000001 +26955 clk cpu0 IT (26919) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +26955 clk cpu0 R X1 0000000000000000 +26956 clk cpu0 IT (26920) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +26956 clk cpu0 R X2 0000000000000000 +26957 clk cpu0 IT (26921) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +26958 clk cpu0 IT (26922) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +26959 clk cpu0 IT (26923) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +26959 clk cpu0 R X0 0000000003008528 +26960 clk cpu0 IT (26924) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +26960 clk cpu0 R X30 000000000009C57C +26961 clk cpu0 IT (26925) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +26962 clk cpu0 IT (26926) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +26962 clk cpu0 R X8 0000000006216000 +26963 clk cpu0 IT (26927) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +26963 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +26963 clk cpu0 R X8 0000000000000001 +26964 clk cpu0 IT (26928) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +26964 clk cpu0 R cpsr 800003c0 +26965 clk cpu0 IT (26929) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +26966 clk cpu0 IT (26930) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +26967 clk cpu0 IT (26931) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +26967 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000001 +26967 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b4ac +26967 clk cpu0 R X19 0000000000000001 +26967 clk cpu0 R X30 000000000009B4AC +26968 clk cpu0 IT (26932) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +26968 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +26968 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +26968 clk cpu0 R X20 000000000004D0CC +26968 clk cpu0 R X21 000000000004CF91 +26969 clk cpu0 IT (26933) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +26969 clk cpu0 R SP_EL0 0000000003045890 +26970 clk cpu0 IT (26934) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +26971 clk cpu0 IT (26935) 0009b4ac:00001009b4ac_NS b9400742 O EL0t_n : LDR w2,[x26,#4] +26971 clk cpu0 MR4 06216044:000015216044_NS 00000000 +26971 clk cpu0 R X2 0000000000000000 +26972 clk cpu0 IT (26936) 0009b4b0:00001009b4b0_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +26972 clk cpu0 R X0 0000000000000000 +26973 clk cpu0 IT (26937) 0009b4b4:00001009b4b4_NS aa1803e1 O EL0t_n : MOV x1,x24 +26973 clk cpu0 R X1 000000000004D080 +26974 clk cpu0 IT (26938) 0009b4b8:00001009b4b8_NS 94000405 O EL0t_n : BL 0x9c4cc +26974 clk cpu0 R X30 000000000009B4BC +26975 clk cpu0 IT (26939) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +26975 clk cpu0 R SP_EL0 0000000003045800 +26976 clk cpu0 IT (26940) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +26976 clk cpu0 R X8 0000000006216000 +26977 clk cpu0 IT (26941) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +26977 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +26977 clk cpu0 R X8 0000000000000003 +26978 clk cpu0 IT (26942) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +26978 clk cpu0 MW8 03045870:000000845870_NS 00000000_0004cf91 +26978 clk cpu0 MW8 03045878:000000845878_NS 00000000_0004d0cc +26979 clk cpu0 IT (26943) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +26979 clk cpu0 MW8 03045880:000000845880_NS 00000000_00000001 +26979 clk cpu0 MW8 03045888:000000845888_NS 00000000_0009b4bc +26980 clk cpu0 IT (26944) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +26980 clk cpu0 MW8 03045800:000000845800_NS 00000000_00000000 +26980 clk cpu0 MW8 03045808:000000845808_NS 00000000_00000002 +26981 clk cpu0 IT (26945) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +26981 clk cpu0 R cpsr 200003c0 +26982 clk cpu0 IT (26946) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +26982 clk cpu0 MW8 03045810:000000845810_NS 00000000_00000000 +26982 clk cpu0 MW8 03045818:000000845818_NS 00000000_00000006 +26983 clk cpu0 IT (26947) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +26983 clk cpu0 MW8 03045820:000000845820_NS 00000000_90000000 +26983 clk cpu0 MW8 03045828:000000845828_NS 03ff8000_03ff8000 +26984 clk cpu0 IT (26948) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +26984 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +26984 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000000 +26985 clk cpu0 IT (26949) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +26985 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +26985 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000000 +26986 clk cpu0 IS (26950) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +26987 clk cpu0 IT (26951) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +26987 clk cpu0 R X20 0000000003008000 +26988 clk cpu0 IT (26952) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +26988 clk cpu0 R X20 0000000003008528 +26989 clk cpu0 IT (26953) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +26989 clk cpu0 R X0 0000000003008528 +26990 clk cpu0 IT (26954) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +26990 clk cpu0 R X19 000000000004D080 +26991 clk cpu0 IT (26955) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +26991 clk cpu0 R X30 000000000009C510 +26992 clk cpu0 IT (26956) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +26992 clk cpu0 R X8 0000000006216000 +26993 clk cpu0 IT (26957) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +26993 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +26993 clk cpu0 R X8 0000000000000001 +26994 clk cpu0 IT (26958) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +26994 clk cpu0 R cpsr 800003c0 +26995 clk cpu0 IT (26959) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +26996 clk cpu0 IT (26960) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +26997 clk cpu0 IT (26961) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +26997 clk cpu0 R X9 0000000003045800 +26998 clk cpu0 IT (26962) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +26998 clk cpu0 R X8 00000000FFFFFFD0 +26999 clk cpu0 IT (26963) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +26999 clk cpu0 R X10 0000000003045890 +27000 clk cpu0 IT (26964) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +27000 clk cpu0 R X9 0000000003045830 +27001 clk cpu0 IT (26965) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +27001 clk cpu0 R X0 0000000000000000 +27002 clk cpu0 IT (26966) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +27002 clk cpu0 R X1 0000000000000000 +27003 clk cpu0 IT (26967) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +27003 clk cpu0 R X2 0000000000000000 +27004 clk cpu0 IT (26968) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +27004 clk cpu0 MW8 03045868:000000845868_NS 00000000_ffffffd0 +27005 clk cpu0 IT (26969) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +27005 clk cpu0 MW8 03045850:000000845850_NS 00000000_03045890 +27005 clk cpu0 MW8 03045858:000000845858_NS 00000000_03045830 +27006 clk cpu0 IT (26970) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +27007 clk cpu0 IT (26971) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +27007 clk cpu0 MR8 03045858:000000845858_NS 00000000_03045830 +27007 clk cpu0 MR8 03045860:000000845860_NS 00000000_00000000 +27007 clk cpu0 R X8 0000000000000000 +27007 clk cpu0 R X10 0000000003045830 +27008 clk cpu0 IT (26972) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +27008 clk cpu0 MR8 03045850:000000845850_NS 00000000_03045890 +27008 clk cpu0 R X9 0000000003045890 +27009 clk cpu0 IT (26973) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +27009 clk cpu0 MR8 03045868:000000845868_NS 00000000_ffffffd0 +27009 clk cpu0 R X11 00000000FFFFFFD0 +27010 clk cpu0 IT (26974) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +27010 clk cpu0 R X21 0000000000000000 +27011 clk cpu0 IT (26975) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +27011 clk cpu0 R X1 0000000003045830 +27012 clk cpu0 IT (26976) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +27012 clk cpu0 R X0 000000000004D080 +27013 clk cpu0 IT (26977) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +27013 clk cpu0 MW8 03045838:000000845838_NS 00000000_03045830 +27013 clk cpu0 MW8 03045840:000000845840_NS 00000000_00000000 +27014 clk cpu0 IT (26978) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +27014 clk cpu0 MW8 03045830:000000845830_NS 00000000_03045890 +27015 clk cpu0 IT (26979) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +27015 clk cpu0 MW8 03045848:000000845848_NS 00000000_ffffffd0 +27016 clk cpu0 IT (26980) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +27016 clk cpu0 R X30 000000000009C560 +27017 clk cpu0 IT (26981) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +27017 clk cpu0 R SP_EL0 0000000003045760 +27018 clk cpu0 IT (26982) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +27018 clk cpu0 MW8 030457f0:0000008457f0_NS 00000000_0004d080 +27018 clk cpu0 MW8 030457f8:0000008457f8_NS 00000000_0009c560 +27019 clk cpu0 IT (26983) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +27019 clk cpu0 R X19 0000000003045830 +27020 clk cpu0 IT (26984) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +27020 clk cpu0 R X1 000000000004C000 +27021 clk cpu0 IT (26985) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +27021 clk cpu0 MW8 030457e0:0000008457e0_NS 00000000_00000000 +27021 clk cpu0 MW8 030457e8:0000008457e8_NS 00000000_03008528 +27022 clk cpu0 IT (26986) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +27022 clk cpu0 R X20 000000000004D080 +27023 clk cpu0 IT (26987) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +27023 clk cpu0 R X1 000000000004C00B +27024 clk cpu0 IT (26988) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +27024 clk cpu0 R X0 0000000003045764 +27025 clk cpu0 IT (26989) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +27025 clk cpu0 R X2 000000000000003B +27026 clk cpu0 IT (26990) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +27026 clk cpu0 MW8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +27027 clk cpu0 IT (26991) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +27027 clk cpu0 MW8 030457b0:0000008457b0_NS 00010001_00010001 +27027 clk cpu0 MW8 030457b8:0000008457b8_NS 00000000_06216040 +27028 clk cpu0 IT (26992) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +27028 clk cpu0 MW8 030457c0:0000008457c0_NS 00000000_06216000 +27028 clk cpu0 MW8 030457c8:0000008457c8_NS 00000000_0004d080 +27029 clk cpu0 IT (26993) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +27029 clk cpu0 MW8 030457d0:0000008457d0_NS 00000000_0004d06c +27029 clk cpu0 MW8 030457d8:0000008457d8_NS 00000000_0004d076 +27030 clk cpu0 IT (26994) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +27030 clk cpu0 R X30 0000000000092B80 +27031 clk cpu0 IT (26995) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +27031 clk cpu0 MW8 03045750:000000845750_NS 00000000_03045830 +27031 clk cpu0 MW8 03045758:000000845758_NS 00000000_00092b80 +27031 clk cpu0 R SP_EL0 0000000003045750 +27032 clk cpu0 IT (26996) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +27032 clk cpu0 R X19 0000000003045764 +27033 clk cpu0 IT (26997) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +27033 clk cpu0 R X30 00000000000104DC +27034 clk cpu0 IT (26998) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +27034 clk cpu0 R cpsr 200003c0 +27035 clk cpu0 IS (26999) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +27036 clk cpu0 IT (27000) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +27036 clk cpu0 R cpsr 400003c0 +27037 clk cpu0 IT (27001) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +27038 clk cpu0 IT (27002) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +27038 clk cpu0 R cpsr 000003c0 +27038 clk cpu0 R X10 0000000000000003 +27039 clk cpu0 IS (27003) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +27040 clk cpu0 IT (27004) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +27040 clk cpu0 R X9 0000000000000020 +27041 clk cpu0 IT (27005) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +27041 clk cpu0 R X8 000000000004C008 +27042 clk cpu0 IT (27006) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +27042 clk cpu0 R cpsr 200003c0 +27043 clk cpu0 IT (27007) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +27043 clk cpu0 R X9 0000000000000008 +27044 clk cpu0 IS (27008) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +27045 clk cpu0 IT (27009) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +27045 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +27045 clk cpu0 R X12 000000000A00000A +27046 clk cpu0 IT (27010) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +27046 clk cpu0 R X10 0000000000000018 +27047 clk cpu0 IT (27011) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +27047 clk cpu0 R X11 000000000000003B +27048 clk cpu0 IT (27012) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27048 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +27048 clk cpu0 R X8 000000000004C00C +27048 clk cpu0 R X13 000000006F727245 +27049 clk cpu0 IT (27013) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27049 clk cpu0 R X12 000000000000000A +27050 clk cpu0 IT (27014) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27050 clk cpu0 R X11 0000000000000037 +27051 clk cpu0 IT (27015) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27051 clk cpu0 R cpsr 200003c0 +27052 clk cpu0 IT (27016) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27052 clk cpu0 R X14 0000000072724500 +27053 clk cpu0 IT (27017) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27053 clk cpu0 R X12 000000007272450A +27054 clk cpu0 IT (27018) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27054 clk cpu0 MW4 03045764:000000845764_NS 7272450a +27054 clk cpu0 R X0 0000000003045768 +27055 clk cpu0 IT (27019) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27055 clk cpu0 R X12 000000006F727245 +27056 clk cpu0 IT (27020) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27057 clk cpu0 IT (27021) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27057 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +27057 clk cpu0 R X8 000000000004C010 +27057 clk cpu0 R X13 0000000049203A72 +27058 clk cpu0 IT (27022) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27058 clk cpu0 R X12 000000000000006F +27059 clk cpu0 IT (27023) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27059 clk cpu0 R X11 0000000000000033 +27060 clk cpu0 IT (27024) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27060 clk cpu0 R cpsr 200003c0 +27061 clk cpu0 IT (27025) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27061 clk cpu0 R X14 00000000203A7200 +27062 clk cpu0 IT (27026) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27062 clk cpu0 R X12 00000000203A726F +27063 clk cpu0 IT (27027) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27063 clk cpu0 MW4 03045768:000000845768_NS 203a726f +27063 clk cpu0 R X0 000000000304576C +27064 clk cpu0 IT (27028) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27064 clk cpu0 R X12 0000000049203A72 +27065 clk cpu0 IT (27029) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27066 clk cpu0 IT (27030) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27066 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +27066 clk cpu0 R X8 000000000004C014 +27066 clk cpu0 R X13 0000000067656C6C +27067 clk cpu0 IT (27031) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27067 clk cpu0 R X12 0000000000000049 +27068 clk cpu0 IT (27032) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27068 clk cpu0 R X11 000000000000002F +27069 clk cpu0 IT (27033) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27069 clk cpu0 R cpsr 200003c0 +27070 clk cpu0 IT (27034) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27070 clk cpu0 R X14 00000000656C6C00 +27071 clk cpu0 IT (27035) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27071 clk cpu0 R X12 00000000656C6C49 +27072 clk cpu0 IT (27036) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27072 clk cpu0 MW4 0304576c:00000084576c_NS 656c6c49 +27072 clk cpu0 R X0 0000000003045770 +27073 clk cpu0 IT (27037) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27073 clk cpu0 R X12 0000000067656C6C +27074 clk cpu0 IT (27038) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27075 clk cpu0 IT (27039) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27075 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +27075 clk cpu0 R X8 000000000004C018 +27075 clk cpu0 R X13 0000000066206C61 +27076 clk cpu0 IT (27040) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27076 clk cpu0 R X12 0000000000000067 +27077 clk cpu0 IT (27041) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27077 clk cpu0 R X11 000000000000002B +27078 clk cpu0 IT (27042) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27078 clk cpu0 R cpsr 200003c0 +27079 clk cpu0 IT (27043) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27079 clk cpu0 R X14 00000000206C6100 +27080 clk cpu0 IT (27044) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27080 clk cpu0 R X12 00000000206C6167 +27081 clk cpu0 IT (27045) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27081 clk cpu0 MW4 03045770:000000845770_NS 206c6167 +27081 clk cpu0 R X0 0000000003045774 +27082 clk cpu0 IT (27046) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27082 clk cpu0 R X12 0000000066206C61 +27083 clk cpu0 IT (27047) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27084 clk cpu0 IT (27048) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27084 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +27084 clk cpu0 R X8 000000000004C01C +27084 clk cpu0 R X13 00000000616D726F +27085 clk cpu0 IT (27049) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27085 clk cpu0 R X12 0000000000000066 +27086 clk cpu0 IT (27050) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27086 clk cpu0 R X11 0000000000000027 +27087 clk cpu0 IT (27051) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27087 clk cpu0 R cpsr 200003c0 +27088 clk cpu0 IT (27052) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27088 clk cpu0 R X14 000000006D726F00 +27089 clk cpu0 IT (27053) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27089 clk cpu0 R X12 000000006D726F66 +27090 clk cpu0 IT (27054) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27090 clk cpu0 MW4 03045774:000000845774_NS 6d726f66 +27090 clk cpu0 R X0 0000000003045778 +27091 clk cpu0 IT (27055) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27091 clk cpu0 R X12 00000000616D726F +27092 clk cpu0 IT (27056) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27093 clk cpu0 IT (27057) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27093 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +27093 clk cpu0 R X8 000000000004C020 +27093 clk cpu0 R X13 0000000070732074 +27094 clk cpu0 IT (27058) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27094 clk cpu0 R X12 0000000000000061 +27095 clk cpu0 IT (27059) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27095 clk cpu0 R X11 0000000000000023 +27096 clk cpu0 IT (27060) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27096 clk cpu0 R cpsr 200003c0 +27097 clk cpu0 IT (27061) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27097 clk cpu0 R X14 0000000073207400 +27098 clk cpu0 IT (27062) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27098 clk cpu0 R X12 0000000073207461 +27099 clk cpu0 IT (27063) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27099 clk cpu0 MW4 03045778:000000845778_NS 73207461 +27099 clk cpu0 R X0 000000000304577C +27100 clk cpu0 IT (27064) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27100 clk cpu0 R X12 0000000070732074 +27101 clk cpu0 IT (27065) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27102 clk cpu0 IT (27066) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27102 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +27102 clk cpu0 R X8 000000000004C024 +27102 clk cpu0 R X13 0000000066696365 +27103 clk cpu0 IT (27067) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27103 clk cpu0 R X12 0000000000000070 +27104 clk cpu0 IT (27068) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27104 clk cpu0 R X11 000000000000001F +27105 clk cpu0 IT (27069) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27105 clk cpu0 R cpsr 200003c0 +27106 clk cpu0 IT (27070) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27106 clk cpu0 R X14 0000000069636500 +27107 clk cpu0 IT (27071) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27107 clk cpu0 R X12 0000000069636570 +27108 clk cpu0 IT (27072) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27108 clk cpu0 MW4 0304577c:00000084577c_NS 69636570 +27108 clk cpu0 R X0 0000000003045780 +27109 clk cpu0 IT (27073) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27109 clk cpu0 R X12 0000000066696365 +27110 clk cpu0 IT (27074) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27111 clk cpu0 IT (27075) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27111 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +27111 clk cpu0 R X8 000000000004C028 +27111 clk cpu0 R X13 0000000020726569 +27112 clk cpu0 IT (27076) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27112 clk cpu0 R X12 0000000000000066 +27113 clk cpu0 IT (27077) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27113 clk cpu0 R X11 000000000000001B +27114 clk cpu0 IT (27078) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27114 clk cpu0 R cpsr 200003c0 +27115 clk cpu0 IT (27079) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27115 clk cpu0 R X14 0000000072656900 +27116 clk cpu0 IT (27080) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27116 clk cpu0 R X12 0000000072656966 +27117 clk cpu0 IT (27081) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27117 clk cpu0 MW4 03045780:000000845780_NS 72656966 +27117 clk cpu0 R X0 0000000003045784 +27118 clk cpu0 IT (27082) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27118 clk cpu0 R X12 0000000020726569 +27119 clk cpu0 IT (27083) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27120 clk cpu0 IT (27084) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27120 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +27120 clk cpu0 R X8 000000000004C02C +27120 clk cpu0 R X13 0000000064657375 +27121 clk cpu0 IT (27085) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27121 clk cpu0 R X12 0000000000000020 +27122 clk cpu0 IT (27086) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27122 clk cpu0 R X11 0000000000000017 +27123 clk cpu0 IT (27087) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27123 clk cpu0 R cpsr 200003c0 +27124 clk cpu0 IT (27088) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27124 clk cpu0 R X14 0000000065737500 +27125 clk cpu0 IT (27089) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27125 clk cpu0 R X12 0000000065737520 +27126 clk cpu0 IT (27090) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27126 clk cpu0 MW4 03045784:000000845784_NS 65737520 +27126 clk cpu0 R X0 0000000003045788 +27127 clk cpu0 IT (27091) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27127 clk cpu0 R X12 0000000064657375 +27128 clk cpu0 IT (27092) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27129 clk cpu0 IT (27093) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27129 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +27129 clk cpu0 R X8 000000000004C030 +27129 clk cpu0 R X13 000000005F27203A +27130 clk cpu0 IT (27094) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27130 clk cpu0 R X12 0000000000000064 +27131 clk cpu0 IT (27095) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27131 clk cpu0 R X11 0000000000000013 +27132 clk cpu0 IT (27096) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27132 clk cpu0 R cpsr 200003c0 +27133 clk cpu0 IT (27097) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27133 clk cpu0 R X14 0000000027203A00 +27134 clk cpu0 IT (27098) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27134 clk cpu0 R X12 0000000027203A64 +27135 clk cpu0 IT (27099) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27135 clk cpu0 MW4 03045788:000000845788_NS 27203a64 +27135 clk cpu0 R X0 000000000304578C +27136 clk cpu0 IT (27100) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27136 clk cpu0 R X12 000000005F27203A +27137 clk cpu0 IT (27101) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27138 clk cpu0 IT (27102) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27138 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +27138 clk cpu0 R X8 000000000004C034 +27138 clk cpu0 R X13 0000000045202E27 +27139 clk cpu0 IT (27103) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27139 clk cpu0 R X12 000000000000005F +27140 clk cpu0 IT (27104) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27140 clk cpu0 R X11 000000000000000F +27141 clk cpu0 IT (27105) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27141 clk cpu0 R cpsr 200003c0 +27142 clk cpu0 IT (27106) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27142 clk cpu0 R X14 00000000202E2700 +27143 clk cpu0 IT (27107) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27143 clk cpu0 R X12 00000000202E275F +27144 clk cpu0 IT (27108) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27144 clk cpu0 MW4 0304578c:00000084578c_NS 202e275f +27144 clk cpu0 R X0 0000000003045790 +27145 clk cpu0 IT (27109) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27145 clk cpu0 R X12 0000000045202E27 +27146 clk cpu0 IT (27110) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27147 clk cpu0 IT (27111) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27147 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +27147 clk cpu0 R X8 000000000004C038 +27147 clk cpu0 R X13 000000006E69646E +27148 clk cpu0 IT (27112) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27148 clk cpu0 R X12 0000000000000045 +27149 clk cpu0 IT (27113) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27149 clk cpu0 R X11 000000000000000B +27150 clk cpu0 IT (27114) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27150 clk cpu0 R cpsr 200003c0 +27151 clk cpu0 IT (27115) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27151 clk cpu0 R X14 0000000069646E00 +27152 clk cpu0 IT (27116) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27152 clk cpu0 R X12 0000000069646E45 +27153 clk cpu0 IT (27117) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27153 clk cpu0 MW4 03045790:000000845790_NS 69646e45 +27153 clk cpu0 R X0 0000000003045794 +27154 clk cpu0 IT (27118) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27154 clk cpu0 R X12 000000006E69646E +27155 clk cpu0 IT (27119) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27156 clk cpu0 IT (27120) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27156 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +27156 clk cpu0 R X8 000000000004C03C +27156 clk cpu0 R X13 0000000065542067 +27157 clk cpu0 IT (27121) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27157 clk cpu0 R X12 000000000000006E +27158 clk cpu0 IT (27122) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27158 clk cpu0 R X11 0000000000000007 +27159 clk cpu0 IT (27123) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27159 clk cpu0 R cpsr 200003c0 +27160 clk cpu0 IT (27124) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27160 clk cpu0 R X14 0000000054206700 +27161 clk cpu0 IT (27125) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27161 clk cpu0 R X12 000000005420676E +27162 clk cpu0 IT (27126) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27162 clk cpu0 MW4 03045794:000000845794_NS 5420676e +27162 clk cpu0 R X0 0000000003045798 +27163 clk cpu0 IT (27127) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27163 clk cpu0 R X12 0000000065542067 +27164 clk cpu0 IT (27128) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27165 clk cpu0 IT (27129) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27165 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +27165 clk cpu0 R X8 000000000004C040 +27165 clk cpu0 R X13 000000000A2E7473 +27166 clk cpu0 IT (27130) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27166 clk cpu0 R X12 0000000000000065 +27167 clk cpu0 IT (27131) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27167 clk cpu0 R X11 0000000000000003 +27168 clk cpu0 IT (27132) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27168 clk cpu0 R cpsr 600003c0 +27169 clk cpu0 IT (27133) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27169 clk cpu0 R X14 000000002E747300 +27170 clk cpu0 IT (27134) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27170 clk cpu0 R X12 000000002E747365 +27171 clk cpu0 IT (27135) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27171 clk cpu0 MW4 03045798:000000845798_NS 2e747365 +27171 clk cpu0 R X0 000000000304579C +27172 clk cpu0 IT (27136) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27172 clk cpu0 R X12 000000000A2E7473 +27173 clk cpu0 IS (27137) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27174 clk cpu0 IT (27138) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +27174 clk cpu0 R X2 0000000000000003 +27175 clk cpu0 IT (27139) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +27175 clk cpu0 R X9 0000000000000001 +27176 clk cpu0 IT (27140) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +27176 clk cpu0 R X8 000000000004C03F +27177 clk cpu0 IT (27141) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +27177 clk cpu0 R X1 000000000004C043 +27178 clk cpu0 IT (27142) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +27178 clk cpu0 R cpsr 200003c0 +27179 clk cpu0 IS (27143) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +27180 clk cpu0 IT (27144) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +27180 clk cpu0 MR1 0004c043:00001004c043_NS 0a +27180 clk cpu0 R X8 000000000000000A +27181 clk cpu0 IT (27145) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +27181 clk cpu0 MW1 0304579c:00000084579c_NS 0a +27182 clk cpu0 IS (27146) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +27183 clk cpu0 IT (27147) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +27183 clk cpu0 MR1 0004c044:00001004c044_NS 00 +27183 clk cpu0 R X8 0000000000000000 +27184 clk cpu0 IT (27148) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +27184 clk cpu0 R cpsr 600003c0 +27185 clk cpu0 IT (27149) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +27185 clk cpu0 MW1 0304579d:00000084579d_NS 00 +27186 clk cpu0 IS (27150) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +27187 clk cpu0 IT (27151) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +27187 clk cpu0 MR1 0004c045:00001004c045_NS 00 +27187 clk cpu0 R X8 0000000000000000 +27188 clk cpu0 IT (27152) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +27188 clk cpu0 MW1 0304579e:00000084579e_NS 00 +27189 clk cpu0 IT (27153) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +27190 clk cpu0 IT (27154) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +27190 clk cpu0 R X0 0000000003045764 +27191 clk cpu0 IT (27155) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +27191 clk cpu0 MR8 03045750:000000845750_NS 00000000_03045830 +27191 clk cpu0 MR8 03045758:000000845758_NS 00000000_00092b80 +27191 clk cpu0 R SP_EL0 0000000003045760 +27191 clk cpu0 R X19 0000000003045830 +27191 clk cpu0 R X30 0000000000092B80 +27192 clk cpu0 IT (27156) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +27193 clk cpu0 IT (27157) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +27193 clk cpu0 R X22 000000000004C000 +27194 clk cpu0 IT (27158) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +27194 clk cpu0 R X23 000000000004C000 +27195 clk cpu0 IT (27159) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +27195 clk cpu0 R X26 0000000000000000 +27196 clk cpu0 IT (27160) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +27196 clk cpu0 R X21 0000000003029000 +27197 clk cpu0 IT (27161) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +27197 clk cpu0 R X22 000000000004C108 +27198 clk cpu0 IT (27162) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +27198 clk cpu0 R X23 000000000004C129 +27199 clk cpu0 IT (27163) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +27199 clk cpu0 R X24 0000000003041000 +27200 clk cpu0 IT (27164) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +27200 clk cpu0 R X25 0000000006216000 +27201 clk cpu0 IT (27165) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +27202 clk cpu0 IT (27166) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27202 clk cpu0 MR1 0004d080:00001004d080_NS 3e +27202 clk cpu0 R X8 000000000000003E +27203 clk cpu0 IT (27167) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27203 clk cpu0 R cpsr 200003c0 +27204 clk cpu0 IS (27168) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27205 clk cpu0 IS (27169) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27206 clk cpu0 IT (27170) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27206 clk cpu0 R cpsr 400003c0 +27207 clk cpu0 IS (27171) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27208 clk cpu0 IT (27172) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +27208 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +27208 clk cpu0 R X8 0000000000000000 +27209 clk cpu0 IT (27173) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +27209 clk cpu0 MR8 0004d080:00001004d080_NS 6425203a_53503e3e +27209 clk cpu0 R X0 6425203A53503E3E +27210 clk cpu0 IT (27174) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +27210 clk cpu0 R cpsr 800003c0 +27211 clk cpu0 IT (27175) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +27212 clk cpu0 IT (27176) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +27212 clk cpu0 R X27 0000000000000000 +27213 clk cpu0 IT (27177) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +27213 clk cpu0 R X28 000000000004D080 +27214 clk cpu0 IT (27178) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +27214 clk cpu0 R X8 00000000FFFFFFF8 +27215 clk cpu0 IT (27179) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27215 clk cpu0 R cpsr 000003c0 +27215 clk cpu0 R X9 000000000000003E +27216 clk cpu0 IS (27180) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27217 clk cpu0 IT (27181) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27217 clk cpu0 R cpsr 200003c0 +27218 clk cpu0 IS (27182) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27219 clk cpu0 IT (27183) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27219 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27219 clk cpu0 R X9 0000000013000000 +27220 clk cpu0 IT (27184) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27220 clk cpu0 R cpsr 800003c0 +27220 clk cpu0 R X8 00000000FFFFFFF9 +27221 clk cpu0 IT (27185) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27221 clk cpu0 MW1 13000000:000013000000_NS 3e +27222 clk cpu0 IT (27186) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27222 clk cpu0 R X0 006425203A53503E +27223 clk cpu0 IT (27187) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27224 clk cpu0 IT (27188) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27224 clk cpu0 R cpsr 000003c0 +27224 clk cpu0 R X9 000000000000003E +27225 clk cpu0 IS (27189) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27226 clk cpu0 IT (27190) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27226 clk cpu0 R cpsr 200003c0 +27227 clk cpu0 IS (27191) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27228 clk cpu0 IT (27192) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27228 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27228 clk cpu0 R X9 0000000013000000 +27229 clk cpu0 IT (27193) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27229 clk cpu0 R cpsr 800003c0 +27229 clk cpu0 R X8 00000000FFFFFFFA +27230 clk cpu0 IT (27194) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27230 clk cpu0 MW1 13000000:000013000000_NS 3e +27231 clk cpu0 IT (27195) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27231 clk cpu0 R X0 00006425203A5350 +27232 clk cpu0 IT (27196) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27233 clk cpu0 IT (27197) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27233 clk cpu0 R cpsr 000003c0 +27233 clk cpu0 R X9 0000000000000050 +27234 clk cpu0 IS (27198) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27235 clk cpu0 IT (27199) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27235 clk cpu0 R cpsr 200003c0 +27236 clk cpu0 IS (27200) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27237 clk cpu0 IT (27201) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27237 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27237 clk cpu0 R X9 0000000013000000 +27238 clk cpu0 IT (27202) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27238 clk cpu0 R cpsr 800003c0 +27238 clk cpu0 R X8 00000000FFFFFFFB +27239 clk cpu0 IT (27203) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27239 clk cpu0 MW1 13000000:000013000000_NS 50 +27240 clk cpu0 IT (27204) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27240 clk cpu0 R X0 0000006425203A53 +27241 clk cpu0 IT (27205) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27242 clk cpu0 IT (27206) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27242 clk cpu0 R cpsr 000003c0 +27242 clk cpu0 R X9 0000000000000053 +27243 clk cpu0 IS (27207) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27244 clk cpu0 IT (27208) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27244 clk cpu0 R cpsr 200003c0 +27245 clk cpu0 IS (27209) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27246 clk cpu0 IT (27210) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27246 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27246 clk cpu0 R X9 0000000013000000 +27247 clk cpu0 IT (27211) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27247 clk cpu0 R cpsr 800003c0 +27247 clk cpu0 R X8 00000000FFFFFFFC +27248 clk cpu0 IT (27212) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27248 clk cpu0 MW1 13000000:000013000000_NS 53 +27249 clk cpu0 IT (27213) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27249 clk cpu0 R X0 000000006425203A +27250 clk cpu0 IT (27214) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27251 clk cpu0 IT (27215) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27251 clk cpu0 R cpsr 000003c0 +27251 clk cpu0 R X9 000000000000003A +27252 clk cpu0 IS (27216) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27253 clk cpu0 IT (27217) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27253 clk cpu0 R cpsr 200003c0 +27254 clk cpu0 IS (27218) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27255 clk cpu0 IT (27219) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27255 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27255 clk cpu0 R X9 0000000013000000 +27256 clk cpu0 IT (27220) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27256 clk cpu0 R cpsr 800003c0 +27256 clk cpu0 R X8 00000000FFFFFFFD +27257 clk cpu0 IT (27221) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27257 clk cpu0 MW1 13000000:000013000000_NS 3a +27258 clk cpu0 IT (27222) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27258 clk cpu0 R X0 0000000000642520 +27259 clk cpu0 IT (27223) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27260 clk cpu0 IT (27224) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27260 clk cpu0 R cpsr 000003c0 +27260 clk cpu0 R X9 0000000000000020 +27261 clk cpu0 IS (27225) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27262 clk cpu0 IT (27226) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27262 clk cpu0 R cpsr 800003c0 +27263 clk cpu0 IS (27227) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27264 clk cpu0 IT (27228) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27264 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27264 clk cpu0 R X9 0000000013000000 +27265 clk cpu0 IT (27229) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27265 clk cpu0 R cpsr 800003c0 +27265 clk cpu0 R X8 00000000FFFFFFFE +27266 clk cpu0 IT (27230) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27266 clk cpu0 MW1 13000000:000013000000_NS 20 +27267 clk cpu0 IT (27231) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27267 clk cpu0 R X0 0000000000006425 +27268 clk cpu0 IT (27232) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27269 clk cpu0 IT (27233) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27269 clk cpu0 R cpsr 000003c0 +27269 clk cpu0 R X9 0000000000000025 +27270 clk cpu0 IS (27234) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27271 clk cpu0 IT (27235) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27271 clk cpu0 R cpsr 600003c0 +27272 clk cpu0 IT (27236) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27273 clk cpu0 IT (27237) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +27273 clk cpu0 R X8 00000000FFFFFFFE +27274 clk cpu0 IT (27238) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +27274 clk cpu0 R X9 0000000000000005 +27275 clk cpu0 IT (27239) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +27275 clk cpu0 R X9 000000000004D085 +27276 clk cpu0 IT (27240) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +27276 clk cpu0 R cpsr 200003c0 +27277 clk cpu0 IT (27241) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +27277 clk cpu0 R X27 000000000004D085 +27278 clk cpu0 IT (27242) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +27278 clk cpu0 R X20 000000000004D086 +27279 clk cpu0 IT (27243) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +27280 clk cpu0 IT (27244) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27280 clk cpu0 MR1 0004d086:00001004d086_NS 25 +27280 clk cpu0 R X8 0000000000000025 +27281 clk cpu0 IT (27245) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27281 clk cpu0 R cpsr 600003c0 +27282 clk cpu0 IT (27246) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27283 clk cpu0 IT (27247) 00092c30:000010092c30_NS b90736bf O EL0t_n : STR wzr,[x21,#0x734] +27283 clk cpu0 MW4 03029734:000000829734_NS 00000000 +27284 clk cpu0 IT (27248) 00092c34:000010092c34_NS aa1403fb O EL0t_n : MOV x27,x20 +27284 clk cpu0 R X27 000000000004D086 +27285 clk cpu0 IT (27249) 00092c38:000010092c38_NS 38401f7c O EL0t_n : LDRB w28,[x27,#1]! +27285 clk cpu0 MR1 0004d087:00001004d087_NS 64 +27285 clk cpu0 R X27 000000000004D087 +27285 clk cpu0 R X28 0000000000000064 +27286 clk cpu0 IT (27250) 00092c3c:000010092c3c_NS 7100c39f O EL0t_n : CMP w28,#0x30 +27286 clk cpu0 R cpsr 200003c0 +27287 clk cpu0 IS (27251) 00092c40:000010092c40_NS 54000060 O EL0t_n : B.EQ 0x92c4c +27288 clk cpu0 IT (27252) 00092c44:000010092c44_NS 3500041c O EL0t_n : CBNZ w28,0x92cc4 +27289 clk cpu0 IT (27253) 00092cc4:000010092cc4_NS 51016388 O EL0t_n : SUB w8,w28,#0x58 +27289 clk cpu0 R X8 000000000000000C +27290 clk cpu0 IT (27254) 00092cc8:000010092cc8_NS 7100811f O EL0t_n : CMP w8,#0x20 +27290 clk cpu0 R cpsr 800003c0 +27291 clk cpu0 IS (27255) 00092ccc:000010092ccc_NS 54000b48 O EL0t_n : B.HI 0x92e34 +27292 clk cpu0 IT (27256) 00092cd0:000010092cd0_NS 10000089 O EL0t_n : ADR x9,0x92ce0 +27292 clk cpu0 R X9 0000000000092CE0 +27293 clk cpu0 IT (27257) 00092cd4:000010092cd4_NS 38686aca O EL0t_n : LDRB w10,[x22,x8] +27293 clk cpu0 MR1 0004c114:00001004c114_NS 0e +27293 clk cpu0 R X10 000000000000000E +27294 clk cpu0 IT (27258) 00092cd8:000010092cd8_NS 8b0a0929 O EL0t_n : ADD x9,x9,x10,LSL #2 +27294 clk cpu0 R X9 0000000000092D18 +27295 clk cpu0 IT (27259) 00092cdc:000010092cdc_NS d61f0120 O EL0t_n : BR x9 +27295 clk cpu0 R cpsr 800007c0 +27296 clk cpu0 IT (27260) 00092d18:000010092d18_NS b9801a68 O EL0t_n : LDRSW x8,[x19,#0x18] +27296 clk cpu0 MR4 03045848:000000845848_NS ffffffd0 +27296 clk cpu0 R cpsr 800003c0 +27296 clk cpu0 R X8 FFFFFFFFFFFFFFD0 +27297 clk cpu0 IS (27261) 00092d1c:000010092d1c_NS 36f800a8 O EL0t_n : TBZ w8,#31,0x92d30 +27298 clk cpu0 IT (27262) 00092d20:000010092d20_NS 11002109 O EL0t_n : ADD w9,w8,#8 +27298 clk cpu0 R X9 00000000FFFFFFD8 +27299 clk cpu0 IT (27263) 00092d24:000010092d24_NS 7100013f O EL0t_n : CMP w9,#0 +27299 clk cpu0 R cpsr a00003c0 +27300 clk cpu0 IT (27264) 00092d28:000010092d28_NS b9001a69 O EL0t_n : STR w9,[x19,#0x18] +27300 clk cpu0 MW4 03045848:000000845848_NS ffffffd8 +27301 clk cpu0 IT (27265) 00092d2c:000010092d2c_NS 5400112d O EL0t_n : B.LE 0x92f50 +27302 clk cpu0 IT (27266) 00092f50:000010092f50_NS f9400669 O EL0t_n : LDR x9,[x19,#8] +27302 clk cpu0 MR8 03045838:000000845838_NS 00000000_03045830 +27302 clk cpu0 R X9 0000000003045830 +27303 clk cpu0 IT (27267) 00092f54:000010092f54_NS 8b080128 O EL0t_n : ADD x8,x9,x8 +27303 clk cpu0 R X8 0000000003045800 +27304 clk cpu0 IT (27268) 00092f58:000010092f58_NS 17ffff79 O EL0t_n : B 0x92d3c +27305 clk cpu0 IT (27269) 00092d3c:000010092d3c_NS f9400100 O EL0t_n : LDR x0,[x8,#0] +27305 clk cpu0 MR8 03045800:000000845800_NS 00000000_00000000 +27305 clk cpu0 R X0 0000000000000000 +27306 clk cpu0 IT (27270) 00092d40:000010092d40_NS 52800141 O EL0t_n : MOV w1,#0xa +27306 clk cpu0 R X1 000000000000000A +27307 clk cpu0 IT (27271) 00092d44:000010092d44_NS 94000a4a O EL0t_n : BL 0x9566c +27307 clk cpu0 R X30 0000000000092D48 +27308 clk cpu0 IT (27272) 0009566c:00001009566c_NS d10083ff O EL0t_n : SUB sp,sp,#0x20 +27308 clk cpu0 R SP_EL0 0000000003045740 +27309 clk cpu0 IT (27273) 00095670:000010095670_NS b204c7e8 O EL0t_n : ORR x8,xzr,#0x3030303030303030 +27309 clk cpu0 R X8 3030303030303030 +27310 clk cpu0 IT (27274) 00095674:000010095674_NS a900a3e8 O EL0t_n : STP x8,x8,[sp,#8] +27310 clk cpu0 MW8 03045748:000000845748_NS 30303030_30303030 +27310 clk cpu0 MW8 03045750:000000845750_NS 30303030_30303030 +27311 clk cpu0 IT (27275) 00095678:000010095678_NS b9001be8 O EL0t_n : STR w8,[sp,#0x18] +27311 clk cpu0 MW4 03045758:000000845758_NS 30303030 +27312 clk cpu0 IT (27276) 0009567c:00001009567c_NS b4000220 O EL0t_n : CBZ x0,0x956c0 +27313 clk cpu0 IT (27277) 000956c0:0000100956c0_NS 2a1f03eb O EL0t_n : MOV w11,wzr +27313 clk cpu0 R X11 0000000000000000 +27314 clk cpu0 IT (27278) 000956c4:0000100956c4_NS 90017ca8 O EL0t_n : ADRP x8,0x30296c4 +27314 clk cpu0 R X8 0000000003029000 +27315 clk cpu0 IT (27279) 000956c8:0000100956c8_NS b9473508 O EL0t_n : LDR w8,[x8,#0x734] +27315 clk cpu0 MR4 03029734:000000829734_NS 00000000 +27315 clk cpu0 R X8 0000000000000000 +27316 clk cpu0 IT (27280) 000956cc:0000100956cc_NS 6b0b011f O EL0t_n : CMP w8,w11 +27316 clk cpu0 R cpsr 600003c0 +27317 clk cpu0 IT (27281) 000956d0:0000100956d0_NS 1a8bc108 O EL0t_n : CSEL w8,w8,w11,GT +27317 clk cpu0 R X8 0000000000000000 +27318 clk cpu0 IT (27282) 000956d4:0000100956d4_NS 7100051f O EL0t_n : CMP w8,#1 +27318 clk cpu0 R cpsr 800003c0 +27319 clk cpu0 IT (27283) 000956d8:0000100956d8_NS 540001ab O EL0t_n : B.LT 0x9570c +27320 clk cpu0 IT (27284) 0009570c:00001009570c_NS 910023e9 O EL0t_n : ADD x9,sp,#8 +27320 clk cpu0 R X9 0000000003045748 +27321 clk cpu0 IT (27285) 00095710:000010095710_NS b0030c0a O EL0t_n : ADRP x10,0x6216710 +27321 clk cpu0 R X10 0000000006216000 +27322 clk cpu0 IT (27286) 00095714:000010095714_NS 38684928 O EL0t_n : LDRB w8,[x9,w8,UXTW] +27322 clk cpu0 MR1 03045748:000000845748_NS 30 +27322 clk cpu0 R X8 0000000000000030 +27323 clk cpu0 IT (27287) 00095718:000010095718_NS f9407149 O EL0t_n : LDR x9,[x10,#0xe0] +27323 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27323 clk cpu0 R X9 0000000013000000 +27324 clk cpu0 IT (27288) 0009571c:00001009571c_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +27324 clk cpu0 MW1 13000000:000013000000_NS 30 +27325 clk cpu0 IT (27289) 00095720:000010095720_NS 910083ff O EL0t_n : ADD sp,sp,#0x20 +27325 clk cpu0 R SP_EL0 0000000003045760 +27326 clk cpu0 IT (27290) 00095724:000010095724_NS d65f03c0 O EL0t_n : RET +27327 clk cpu0 IT (27291) 00092d48:000010092d48_NS 91000774 O EL0t_n : ADD x20,x27,#1 +27327 clk cpu0 R X20 000000000004D088 +27328 clk cpu0 IT (27292) 00092d4c:000010092d4c_NS 17ffff9a O EL0t_n : B 0x92bb4 +27329 clk cpu0 IT (27293) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27329 clk cpu0 MR1 0004d088:00001004d088_NS 0a +27329 clk cpu0 R X8 000000000000000A +27330 clk cpu0 IT (27294) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27330 clk cpu0 R cpsr 800003c0 +27331 clk cpu0 IS (27295) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27332 clk cpu0 IS (27296) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27333 clk cpu0 IT (27297) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27333 clk cpu0 R cpsr 400003c0 +27334 clk cpu0 IS (27298) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27335 clk cpu0 IT (27299) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +27335 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +27335 clk cpu0 R X8 0000000000000000 +27336 clk cpu0 IT (27300) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +27336 clk cpu0 MR8 0004d088:00001004d088_NS 4b535f47_534d000a +27336 clk cpu0 R X0 4B535F47534D000A +27337 clk cpu0 IT (27301) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +27337 clk cpu0 R cpsr 800003c0 +27338 clk cpu0 IT (27302) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +27339 clk cpu0 IT (27303) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +27339 clk cpu0 R X27 0000000000000000 +27340 clk cpu0 IT (27304) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +27340 clk cpu0 R X28 000000000004D088 +27341 clk cpu0 IT (27305) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +27341 clk cpu0 R X8 00000000FFFFFFF8 +27342 clk cpu0 IT (27306) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27342 clk cpu0 R cpsr 000003c0 +27342 clk cpu0 R X9 000000000000000A +27343 clk cpu0 IS (27307) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27344 clk cpu0 IT (27308) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27344 clk cpu0 R cpsr 800003c0 +27345 clk cpu0 IS (27309) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27346 clk cpu0 IT (27310) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27346 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27346 clk cpu0 R X9 0000000013000000 +27347 clk cpu0 IT (27311) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27347 clk cpu0 R cpsr 800003c0 +27347 clk cpu0 R X8 00000000FFFFFFF9 +TUBE CPU0: >>PS: 0 +27348 clk cpu0 IT (27312) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27348 clk cpu0 MW1 13000000:000013000000_NS 0a +27349 clk cpu0 IT (27313) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27349 clk cpu0 R X0 004B535F47534D00 +27350 clk cpu0 IT (27314) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27351 clk cpu0 IT (27315) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27351 clk cpu0 R cpsr 400003c0 +27351 clk cpu0 R X9 0000000000000000 +27352 clk cpu0 IT (27316) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27353 clk cpu0 IT (27317) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +27353 clk cpu0 R X8 00000000FFFFFFF9 +27354 clk cpu0 IT (27318) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +27354 clk cpu0 R X9 0000000000000000 +27355 clk cpu0 IT (27319) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +27355 clk cpu0 R X9 000000000004D088 +27356 clk cpu0 IT (27320) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +27356 clk cpu0 R cpsr 200003c0 +27357 clk cpu0 IT (27321) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +27357 clk cpu0 R X27 000000000004D088 +27358 clk cpu0 IT (27322) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +27358 clk cpu0 R X20 000000000004D089 +27359 clk cpu0 IT (27323) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +27360 clk cpu0 IT (27324) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27360 clk cpu0 MR1 0004d089:00001004d089_NS 00 +27360 clk cpu0 R X8 0000000000000000 +27361 clk cpu0 IT (27325) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27361 clk cpu0 R cpsr 800003c0 +27362 clk cpu0 IS (27326) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27363 clk cpu0 IT (27327) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27364 clk cpu0 IT (27328) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +27365 clk cpu0 IT (27329) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +27365 clk cpu0 MR8 030457f0:0000008457f0_NS 00000000_0004d080 +27365 clk cpu0 MR8 030457f8:0000008457f8_NS 00000000_0009c560 +27365 clk cpu0 R X19 000000000004D080 +27365 clk cpu0 R X30 000000000009C560 +27366 clk cpu0 IT (27330) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +27366 clk cpu0 MR8 030457e0:0000008457e0_NS 00000000_00000000 +27366 clk cpu0 MR8 030457e8:0000008457e8_NS 00000000_03008528 +27366 clk cpu0 R X20 0000000003008528 +27366 clk cpu0 R X21 0000000000000000 +27367 clk cpu0 IT (27331) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +27367 clk cpu0 MR8 030457d0:0000008457d0_NS 00000000_0004d06c +27367 clk cpu0 MR8 030457d8:0000008457d8_NS 00000000_0004d076 +27367 clk cpu0 R X22 000000000004D076 +27367 clk cpu0 R X23 000000000004D06C +27368 clk cpu0 IT (27332) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +27368 clk cpu0 MR8 030457c0:0000008457c0_NS 00000000_06216000 +27368 clk cpu0 MR8 030457c8:0000008457c8_NS 00000000_0004d080 +27368 clk cpu0 R X24 000000000004D080 +27368 clk cpu0 R X25 0000000006216000 +27369 clk cpu0 IT (27333) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +27369 clk cpu0 MR8 030457b0:0000008457b0_NS 00010001_00010001 +27369 clk cpu0 MR8 030457b8:0000008457b8_NS 00000000_06216040 +27369 clk cpu0 R X26 0000000006216040 +27369 clk cpu0 R X27 0001000100010001 +27370 clk cpu0 IT (27334) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +27370 clk cpu0 MR8 030457a0:0000008457a0_NS ff7fff7f_ff7fff7f +27370 clk cpu0 R X28 FF7FFF7FFF7FFF7F +27371 clk cpu0 IT (27335) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +27371 clk cpu0 R SP_EL0 0000000003045800 +27372 clk cpu0 IT (27336) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +27373 clk cpu0 IT (27337) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +27373 clk cpu0 R X0 0000000000000001 +27374 clk cpu0 IT (27338) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +27374 clk cpu0 R X1 0000000000000000 +27375 clk cpu0 IT (27339) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +27375 clk cpu0 R X2 0000000000000000 +27376 clk cpu0 IT (27340) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +27377 clk cpu0 IT (27341) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +27378 clk cpu0 IT (27342) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +27378 clk cpu0 R X0 0000000003008528 +27379 clk cpu0 IT (27343) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +27379 clk cpu0 R X30 000000000009C57C +27380 clk cpu0 IT (27344) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +27381 clk cpu0 IT (27345) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +27381 clk cpu0 R X8 0000000006216000 +27382 clk cpu0 IT (27346) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +27382 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27382 clk cpu0 R X8 0000000000000001 +27383 clk cpu0 IT (27347) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +27383 clk cpu0 R cpsr 800003c0 +27384 clk cpu0 IT (27348) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +27385 clk cpu0 IT (27349) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +27386 clk cpu0 IT (27350) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +27386 clk cpu0 MR8 03045880:000000845880_NS 00000000_00000001 +27386 clk cpu0 MR8 03045888:000000845888_NS 00000000_0009b4bc +27386 clk cpu0 R X19 0000000000000001 +27386 clk cpu0 R X30 000000000009B4BC +27387 clk cpu0 IT (27351) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +27387 clk cpu0 MR8 03045870:000000845870_NS 00000000_0004cf91 +27387 clk cpu0 MR8 03045878:000000845878_NS 00000000_0004d0cc +27387 clk cpu0 R X20 000000000004D0CC +27387 clk cpu0 R X21 000000000004CF91 +27388 clk cpu0 IT (27352) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +27388 clk cpu0 R SP_EL0 0000000003045890 +27389 clk cpu0 IT (27353) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +27390 clk cpu0 IT (27354) 0009b4bc:00001009b4bc_NS b9405328 O EL0t_n : LDR w8,[x25,#0x50] +27390 clk cpu0 MR4 06216050:000015216050_NS 00000002 +27390 clk cpu0 R X8 0000000000000002 +27391 clk cpu0 IT (27355) 0009b4c0:00001009b4c0_NS 91000673 O EL0t_n : ADD x19,x19,#1 +27391 clk cpu0 R X19 0000000000000002 +27392 clk cpu0 IT (27356) 0009b4c4:00001009b4c4_NS 9100335a O EL0t_n : ADD x26,x26,#0xc +27392 clk cpu0 R X26 000000000621604C +27393 clk cpu0 IT (27357) 0009b4c8:00001009b4c8_NS eb08027f O EL0t_n : CMP x19,x8 +27393 clk cpu0 R cpsr 600003c0 +27394 clk cpu0 IS (27358) 0009b4cc:00001009b4cc_NS 54fffd23 O EL0t_n : B.CC 0x9b470 +27395 clk cpu0 IT (27359) 0009b4d0:00001009b4d0_NS 17ffffcc O EL0t_n : B 0x9b400 +27396 clk cpu0 IT (27360) 0009b400:00001009b400_NS a9457bfd O EL0t_n : LDP x29,x30,[sp,#0x50] +27396 clk cpu0 MR8 030458e0:0000008458e0_NS ffffffff_fe00000f +27396 clk cpu0 MR8 030458e8:0000008458e8_NS 00000000_0009d85c +27396 clk cpu0 R X29 FFFFFFFFFE00000F +27396 clk cpu0 R X30 000000000009D85C +27397 clk cpu0 IT (27361) 0009b404:00001009b404_NS a9444ff4 O EL0t_n : LDP x20,x19,[sp,#0x40] +27397 clk cpu0 MR8 030458d0:0000008458d0_NS ff83ff83_ff83ff83 +27397 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_062160a2 +27397 clk cpu0 R X19 00000000062160A2 +27397 clk cpu0 R X20 FF83FF83FF83FF83 +27398 clk cpu0 IT (27362) 0009b408:00001009b408_NS a94357f6 O EL0t_n : LDP x22,x21,[sp,#0x30] +27398 clk cpu0 MR8 030458c0:0000008458c0_NS 00000000_90000000 +27398 clk cpu0 MR8 030458c8:0000008458c8_NS 00000000_02f00028 +27398 clk cpu0 R X21 0000000002F00028 +27398 clk cpu0 R X22 0000000090000000 +27399 clk cpu0 IT (27363) 0009b40c:00001009b40c_NS a9425ff8 O EL0t_n : LDP x24,x23,[sp,#0x20] +27399 clk cpu0 MR8 030458b0:0000008458b0_NS 00000000_00007c00 +27399 clk cpu0 MR8 030458b8:0000008458b8_NS 00000000_00000000 +27399 clk cpu0 R X23 0000000000000000 +27399 clk cpu0 R X24 0000000000007C00 +27400 clk cpu0 IT (27364) 0009b410:00001009b410_NS a94167fa O EL0t_n : LDP x26,x25,[sp,#0x10] +27400 clk cpu0 MR8 030458a0:0000008458a0_NS ffe000ff_ffe000ff +27400 clk cpu0 MR8 030458a8:0000008458a8_NS 00000000_0000003c +27400 clk cpu0 R X25 000000000000003C +27400 clk cpu0 R X26 FFE000FFFFE000FF +27401 clk cpu0 IT (27365) 0009b414:00001009b414_NS a8c66ffc O EL0t_n : LDP x28,x27,[sp],#0x60 +27401 clk cpu0 MR8 03045890:000000845890_NS ff7fff7f_ff7fff7f +27401 clk cpu0 MR8 03045898:000000845898_NS 00010001_00010001 +27401 clk cpu0 R SP_EL0 00000000030458F0 +27401 clk cpu0 R X27 0001000100010001 +27401 clk cpu0 R X28 FF7FFF7FFF7FFF7F +27402 clk cpu0 IT (27366) 0009b418:00001009b418_NS d65f03c0 O EL0t_n : RET +27403 clk cpu0 IT (27367) 0009d85c:00001009d85c_NS aa1303e0 O EL0t_n : MOV x0,x19 +27403 clk cpu0 R X0 00000000062160A2 +27404 clk cpu0 IT (27368) 0009d860:00001009d860_NS 97fff876 O EL0t_n : BL 0x9ba38 +27404 clk cpu0 R X30 000000000009D864 +27405 clk cpu0 IT (27369) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +27406 clk cpu0 IT (27370) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +27406 clk cpu0 R X8 0000000006216000 +27407 clk cpu0 IT (27371) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +27407 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27407 clk cpu0 R X8 0000000000000001 +27408 clk cpu0 IT (27372) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +27408 clk cpu0 R cpsr 800003c0 +27409 clk cpu0 IT (27373) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +27410 clk cpu0 IT (27374) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +27411 clk cpu0 IT (27375) 0009d864:00001009d864_NS 97ffe95a O EL0t_n : BL 0x97dcc +27411 clk cpu0 R X30 000000000009D868 +27411 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01ef ALLOC 0x000010097dc0_NS +27411 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1f70 ALLOC 0x000010097dc0_NS +27412 clk cpu0 IT (27376) 00097dcc:000010097dcc_NS f81f0ffe O EL0t_n : STR x30,[sp,#-0x10]! +27412 clk cpu0 MW8 030458e0:0000008458e0_NS 00000000_0009d868 +27412 clk cpu0 R SP_EL0 00000000030458E0 +27413 clk cpu0 IT (27377) 00097dd0:000010097dd0_NS d0017c88 O EL0t_n : ADRP x8,0x3029dd0 +27413 clk cpu0 R X8 0000000003029000 +27414 clk cpu0 IT (27378) 00097dd4:000010097dd4_NS b9473109 O EL0t_n : LDR w9,[x8,#0x730] +27414 clk cpu0 MR4 03029730:000000829730_NS 00000001 +27414 clk cpu0 R X9 0000000000000001 +27415 clk cpu0 IT (27379) 00097dd8:000010097dd8_NS 7100053f O EL0t_n : CMP w9,#1 +27415 clk cpu0 R cpsr 600003c0 +27416 clk cpu0 IS (27380) 00097ddc:000010097ddc_NS 540001e1 O EL0t_n : B.NE 0x97e18 +27417 clk cpu0 IT (27381) 00097de0:000010097de0_NS f0030be9 O EL0t_n : ADRP x9,0x6216de0 +27417 clk cpu0 R X9 0000000006216000 +27418 clk cpu0 IT (27382) 00097de4:000010097de4_NS b9804929 O EL0t_n : LDRSW x9,[x9,#0x48] +27418 clk cpu0 MR4 06216048:000015216048_NS 00000004 +27418 clk cpu0 R X9 0000000000000004 +27419 clk cpu0 IT (27383) 00097de8:000010097de8_NS 5280004a O EL0t_n : MOV w10,#2 +27419 clk cpu0 R X10 0000000000000002 +27420 clk cpu0 IT (27384) 00097dec:000010097dec_NS b907310a O EL0t_n : STR w10,[x8,#0x730] +27420 clk cpu0 MW4 03029730:000000829730_NS 00000002 +27421 clk cpu0 IT (27385) 00097df0:000010097df0_NS 7100113f O EL0t_n : CMP w9,#4 +27421 clk cpu0 R cpsr 600003c0 +27422 clk cpu0 IS (27386) 00097df4:000010097df4_NS 540000a8 O EL0t_n : B.HI 0x97e08 +27423 clk cpu0 IT (27387) 00097df8:000010097df8_NS b0fffda8 O EL0t_n : ADRP x8,0x4cdf8 +27423 clk cpu0 R X8 000000000004C000 +27424 clk cpu0 IT (27388) 00097dfc:000010097dfc_NS 91018108 O EL0t_n : ADD x8,x8,#0x60 +27424 clk cpu0 R X8 000000000004C060 +27424 clk cpu0 CACHE cpu.cpu0.l1icache LINE 01f1 ALLOC 0x000010097e00_NS +27424 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1f80 ALLOC 0x000010097e00_NS +27425 clk cpu0 IT (27389) 00097e00:000010097e00_NS f8697901 O EL0t_n : LDR x1,[x8,x9,LSL #3] +27425 clk cpu0 MR8 0004c080:00001004c080_NS 00000000_0004cf7a +27425 clk cpu0 R X1 000000000004CF7A +27425 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0004 INVAL 0x000070450080_NS +27425 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0004 ALLOC 0x00001004c080_NS +27425 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1023 ALLOC 0x00001004c080_NS +27426 clk cpu0 IT (27390) 00097e04:000010097e04_NS 14000003 O EL0t_n : B 0x97e10 +27427 clk cpu0 IT (27391) 00097e10:000010097e10_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +27427 clk cpu0 R X0 0000000000000000 +27428 clk cpu0 IT (27392) 00097e14:000010097e14_NS 940011ae O EL0t_n : BL 0x9c4cc +27428 clk cpu0 R X30 0000000000097E18 +27429 clk cpu0 IT (27393) 0009c4cc:00001009c4cc_NS d10243ff O EL0t_n : SUB sp,sp,#0x90 +27429 clk cpu0 R SP_EL0 0000000003045850 +27430 clk cpu0 IT (27394) 0009c4d0:00001009c4d0_NS d0030bc8 O EL0t_n : ADRP x8,0x62164d0 +27430 clk cpu0 R X8 0000000006216000 +27431 clk cpu0 IT (27395) 0009c4d4:00001009c4d4_NS b940f908 O EL0t_n : LDR w8,[x8,#0xf8] +27431 clk cpu0 MR4 062160f8:0000152160f8_NS 00000003 +27431 clk cpu0 R X8 0000000000000003 +27432 clk cpu0 IT (27396) 0009c4d8:00001009c4d8_NS a90753f5 O EL0t_n : STP x21,x20,[sp,#0x70] +27432 clk cpu0 MW8 030458c0:0000008458c0_NS 00000000_02f00028 +27432 clk cpu0 MW8 030458c8:0000008458c8_NS ff83ff83_ff83ff83 +27433 clk cpu0 IT (27397) 0009c4dc:00001009c4dc_NS a9087bf3 O EL0t_n : STP x19,x30,[sp,#0x80] +27433 clk cpu0 MW8 030458d0:0000008458d0_NS 00000000_062160a2 +27433 clk cpu0 MW8 030458d8:0000008458d8_NS 00000000_00097e18 +27434 clk cpu0 IT (27398) 0009c4e0:00001009c4e0_NS a9000fe2 O EL0t_n : STP x2,x3,[sp,#0] +27434 clk cpu0 MW8 03045850:000000845850_NS 00000000_00000000 +27434 clk cpu0 MW8 03045858:000000845858_NS 00000000_00000002 +27435 clk cpu0 IT (27399) 0009c4e4:00001009c4e4_NS 6b00011f O EL0t_n : CMP w8,w0 +27435 clk cpu0 R cpsr 200003c0 +27436 clk cpu0 IT (27400) 0009c4e8:00001009c4e8_NS a90117e4 O EL0t_n : STP x4,x5,[sp,#0x10] +27436 clk cpu0 MW8 03045860:000000845860_NS 00000000_00000000 +27436 clk cpu0 MW8 03045868:000000845868_NS 00000000_00000006 +27437 clk cpu0 IT (27401) 0009c4ec:00001009c4ec_NS a9021fe6 O EL0t_n : STP x6,x7,[sp,#0x20] +27437 clk cpu0 MW8 03045870:000000845870_NS 00000000_90000000 +27437 clk cpu0 MW8 03045878:000000845878_NS 03ff8000_03ff8000 +27438 clk cpu0 IT (27402) 0009c4f0:00001009c4f0_NS a9067fff O EL0t_n : STP xzr,xzr,[sp,#0x60] +27438 clk cpu0 MW8 030458b0:0000008458b0_NS 00000000_00000000 +27438 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_00000000 +27439 clk cpu0 IT (27403) 0009c4f4:00001009c4f4_NS a9057fff O EL0t_n : STP xzr,xzr,[sp,#0x50] +27439 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_00000000 +27439 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_00000000 +27440 clk cpu0 IS (27404) 0009c4f8:00001009c4f8_NS 54000423 O EL0t_n : B.CC 0x9c57c +27441 clk cpu0 IT (27405) 0009c4fc:00001009c4fc_NS 90017b74 O EL0t_n : ADRP x20,0x30084fc +27441 clk cpu0 R X20 0000000003008000 +27442 clk cpu0 IT (27406) 0009c500:00001009c500_NS 9114a294 O EL0t_n : ADD x20,x20,#0x528 +27442 clk cpu0 R X20 0000000003008528 +27443 clk cpu0 IT (27407) 0009c504:00001009c504_NS aa1403e0 O EL0t_n : MOV x0,x20 +27443 clk cpu0 R X0 0000000003008528 +27444 clk cpu0 IT (27408) 0009c508:00001009c508_NS aa0103f3 O EL0t_n : MOV x19,x1 +27444 clk cpu0 R X19 000000000004CF7A +27445 clk cpu0 IT (27409) 0009c50c:00001009c50c_NS 97fff114 O EL0t_n : BL 0x9895c +27445 clk cpu0 R X30 000000000009C510 +27446 clk cpu0 IT (27410) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +27446 clk cpu0 R X8 0000000006216000 +27447 clk cpu0 IT (27411) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +27447 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27447 clk cpu0 R X8 0000000000000001 +27448 clk cpu0 IT (27412) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +27448 clk cpu0 R cpsr 800003c0 +27449 clk cpu0 IT (27413) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +27450 clk cpu0 IT (27414) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +27451 clk cpu0 IT (27415) 0009c510:00001009c510_NS 910003e9 O EL0t_n : MOV x9,sp +27451 clk cpu0 R X9 0000000003045850 +27452 clk cpu0 IT (27416) 0009c514:00001009c514_NS 128005e8 O EL0t_n : MOV w8,#0xffffffd0 +27452 clk cpu0 R X8 00000000FFFFFFD0 +27453 clk cpu0 IT (27417) 0009c518:00001009c518_NS 910243ea O EL0t_n : ADD x10,sp,#0x90 +27453 clk cpu0 R X10 00000000030458E0 +27454 clk cpu0 IT (27418) 0009c51c:00001009c51c_NS 9100c129 O EL0t_n : ADD x9,x9,#0x30 +27454 clk cpu0 R X9 0000000003045880 +27455 clk cpu0 IT (27419) 0009c520:00001009c520_NS 2a1f03e0 O EL0t_n : MOV w0,wzr +27455 clk cpu0 R X0 0000000000000000 +27456 clk cpu0 IT (27420) 0009c524:00001009c524_NS 2a1f03e1 O EL0t_n : MOV w1,wzr +27456 clk cpu0 R X1 0000000000000000 +27457 clk cpu0 IT (27421) 0009c528:00001009c528_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +27457 clk cpu0 R X2 0000000000000000 +27458 clk cpu0 IT (27422) 0009c52c:00001009c52c_NS f90037e8 O EL0t_n : STR x8,[sp,#0x68] +27458 clk cpu0 MW8 030458b8:0000008458b8_NS 00000000_ffffffd0 +27459 clk cpu0 IT (27423) 0009c530:00001009c530_NS a90527ea O EL0t_n : STP x10,x9,[sp,#0x50] +27459 clk cpu0 MW8 030458a0:0000008458a0_NS 00000000_030458e0 +27459 clk cpu0 MW8 030458a8:0000008458a8_NS 00000000_03045880 +27460 clk cpu0 IT (27424) 0009c534:00001009c534_NS d503201f O EL0t_n : NOP +27461 clk cpu0 IT (27425) 0009c538:00001009c538_NS a945a3ea O EL0t_n : LDP x10,x8,[sp,#0x58] +27461 clk cpu0 MR8 030458a8:0000008458a8_NS 00000000_03045880 +27461 clk cpu0 MR8 030458b0:0000008458b0_NS 00000000_00000000 +27461 clk cpu0 R X8 0000000000000000 +27461 clk cpu0 R X10 0000000003045880 +27462 clk cpu0 IT (27426) 0009c53c:00001009c53c_NS f9402be9 O EL0t_n : LDR x9,[sp,#0x50] +27462 clk cpu0 MR8 030458a0:0000008458a0_NS 00000000_030458e0 +27462 clk cpu0 R X9 00000000030458E0 +27463 clk cpu0 IT (27427) 0009c540:00001009c540_NS f94037eb O EL0t_n : LDR x11,[sp,#0x68] +27463 clk cpu0 MR8 030458b8:0000008458b8_NS 00000000_ffffffd0 +27463 clk cpu0 R X11 00000000FFFFFFD0 +27464 clk cpu0 IT (27428) 0009c544:00001009c544_NS 2a0003f5 O EL0t_n : MOV w21,w0 +27464 clk cpu0 R X21 0000000000000000 +27465 clk cpu0 IT (27429) 0009c548:00001009c548_NS 9100c3e1 O EL0t_n : ADD x1,sp,#0x30 +27465 clk cpu0 R X1 0000000003045880 +27466 clk cpu0 IT (27430) 0009c54c:00001009c54c_NS aa1303e0 O EL0t_n : MOV x0,x19 +27466 clk cpu0 R X0 000000000004CF7A +27467 clk cpu0 IT (27431) 0009c550:00001009c550_NS a903a3ea O EL0t_n : STP x10,x8,[sp,#0x38] +27467 clk cpu0 MW8 03045888:000000845888_NS 00000000_03045880 +27467 clk cpu0 MW8 03045890:000000845890_NS 00000000_00000000 +27468 clk cpu0 IT (27432) 0009c554:00001009c554_NS f9001be9 O EL0t_n : STR x9,[sp,#0x30] +27468 clk cpu0 MW8 03045880:000000845880_NS 00000000_030458e0 +27469 clk cpu0 IT (27433) 0009c558:00001009c558_NS f90027eb O EL0t_n : STR x11,[sp,#0x48] +27469 clk cpu0 MW8 03045898:000000845898_NS 00000000_ffffffd0 +27470 clk cpu0 IT (27434) 0009c55c:00001009c55c_NS 97ffd97b O EL0t_n : BL 0x92b48 +27470 clk cpu0 R X30 000000000009C560 +27471 clk cpu0 IT (27435) 00092b48:000010092b48_NS d10283ff O EL0t_n : SUB sp,sp,#0xa0 +27471 clk cpu0 R SP_EL0 00000000030457B0 +27472 clk cpu0 IT (27436) 00092b4c:000010092b4c_NS a9097bf3 O EL0t_n : STP x19,x30,[sp,#0x90] +27472 clk cpu0 MW8 03045840:000000845840_NS 00000000_0004cf7a +27472 clk cpu0 MW8 03045848:000000845848_NS 00000000_0009c560 +27473 clk cpu0 IT (27437) 00092b50:000010092b50_NS aa0103f3 O EL0t_n : MOV x19,x1 +27473 clk cpu0 R X19 0000000003045880 +27474 clk cpu0 IT (27438) 00092b54:000010092b54_NS d0fffdc1 O EL0t_n : ADRP x1,0x4cb54 +27474 clk cpu0 R X1 000000000004C000 +27475 clk cpu0 IT (27439) 00092b58:000010092b58_NS a90853f5 O EL0t_n : STP x21,x20,[sp,#0x80] +27475 clk cpu0 MW8 03045830:000000845830_NS 00000000_00000000 +27475 clk cpu0 MW8 03045838:000000845838_NS 00000000_03008528 +27476 clk cpu0 IT (27440) 00092b5c:000010092b5c_NS aa0003f4 O EL0t_n : MOV x20,x0 +27476 clk cpu0 R X20 000000000004CF7A +27477 clk cpu0 IT (27441) 00092b60:000010092b60_NS 91002c21 O EL0t_n : ADD x1,x1,#0xb +27477 clk cpu0 R X1 000000000004C00B +27478 clk cpu0 IT (27442) 00092b64:000010092b64_NS 910013e0 O EL0t_n : ADD x0,sp,#4 +27478 clk cpu0 R X0 00000000030457B4 +27479 clk cpu0 IT (27443) 00092b68:000010092b68_NS 52800762 O EL0t_n : MOV w2,#0x3b +27479 clk cpu0 R X2 000000000000003B +27480 clk cpu0 IT (27444) 00092b6c:000010092b6c_NS f90023fc O EL0t_n : STR x28,[sp,#0x40] +27480 clk cpu0 MW8 030457f0:0000008457f0_NS ff7fff7f_ff7fff7f +27481 clk cpu0 IT (27445) 00092b70:000010092b70_NS a9056bfb O EL0t_n : STP x27,x26,[sp,#0x50] +27481 clk cpu0 MW8 03045800:000000845800_NS 00010001_00010001 +27481 clk cpu0 MW8 03045808:000000845808_NS ffe000ff_ffe000ff +27482 clk cpu0 IT (27446) 00092b74:000010092b74_NS a90663f9 O EL0t_n : STP x25,x24,[sp,#0x60] +27482 clk cpu0 MW8 03045810:000000845810_NS 00000000_0000003c +27482 clk cpu0 MW8 03045818:000000845818_NS 00000000_00007c00 +27483 clk cpu0 IT (27447) 00092b78:000010092b78_NS a9075bf7 O EL0t_n : STP x23,x22,[sp,#0x70] +27483 clk cpu0 MW8 03045820:000000845820_NS 00000000_00000000 +27483 clk cpu0 MW8 03045828:000000845828_NS 00000000_90000000 +27484 clk cpu0 IT (27448) 00092b7c:000010092b7c_NS 97fdf655 O EL0t_n : BL 0x104d0 +27484 clk cpu0 R X30 0000000000092B80 +27485 clk cpu0 IT (27449) 000104d0:0000100104d0_NS a9bf7bf3 O EL0t_n : STP x19,x30,[sp,#-0x10]! +27485 clk cpu0 MW8 030457a0:0000008457a0_NS 00000000_03045880 +27485 clk cpu0 MW8 030457a8:0000008457a8_NS 00000000_00092b80 +27485 clk cpu0 R SP_EL0 00000000030457A0 +27486 clk cpu0 IT (27450) 000104d4:0000100104d4_NS aa0003f3 O EL0t_n : MOV x19,x0 +27486 clk cpu0 R X19 00000000030457B4 +27487 clk cpu0 IT (27451) 000104d8:0000100104d8_NS 9400002b O EL0t_n : BL 0x10584 +27487 clk cpu0 R X30 00000000000104DC +27488 clk cpu0 IT (27452) 00010584:000010010584_NS f100105f O EL0t_n : CMP x2,#4 +27488 clk cpu0 R cpsr 200003c0 +27489 clk cpu0 IS (27453) 00010588:000010010588_NS 54000643 O EL0t_n : B.CC 0x10650 +27490 clk cpu0 IT (27454) 0001058c:00001001058c_NS f240041f O EL0t_n : TST x0,#3 +27490 clk cpu0 R cpsr 400003c0 +27491 clk cpu0 IT (27455) 00010590:000010010590_NS 54000320 O EL0t_n : B.EQ 0x105f4 +27492 clk cpu0 IT (27456) 000105f4:0000100105f4_NS 7200042a O EL0t_n : ANDS w10,w1,#3 +27492 clk cpu0 R cpsr 000003c0 +27492 clk cpu0 R X10 0000000000000003 +27493 clk cpu0 IS (27457) 000105f8:0000100105f8_NS 54000440 O EL0t_n : B.EQ 0x10680 +27494 clk cpu0 IT (27458) 000105fc:0000100105fc_NS 52800409 O EL0t_n : MOV w9,#0x20 +27494 clk cpu0 R X9 0000000000000020 +27495 clk cpu0 IT (27459) 00010600:000010010600_NS cb0a0028 O EL0t_n : SUB x8,x1,x10 +27495 clk cpu0 R X8 000000000004C008 +27496 clk cpu0 IT (27460) 00010604:000010010604_NS f100105f O EL0t_n : CMP x2,#4 +27496 clk cpu0 R cpsr 200003c0 +27497 clk cpu0 IT (27461) 00010608:000010010608_NS 4b0a0d29 O EL0t_n : SUB w9,w9,w10,LSL #3 +27497 clk cpu0 R X9 0000000000000008 +27498 clk cpu0 IS (27462) 0001060c:00001001060c_NS 540001c3 O EL0t_n : B.CC 0x10644 +27499 clk cpu0 IT (27463) 00010610:000010010610_NS b940010c O EL0t_n : LDR w12,[x8,#0] +27499 clk cpu0 MR4 0004c008:00001004c008_NS 0a00000a +27499 clk cpu0 R X12 000000000A00000A +27500 clk cpu0 IT (27464) 00010614:000010010614_NS 531d714a O EL0t_n : UBFIZ w10,w10,#3,#29 +27500 clk cpu0 R X10 0000000000000018 +27501 clk cpu0 IT (27465) 00010618:000010010618_NS aa0203eb O EL0t_n : MOV x11,x2 +27501 clk cpu0 R X11 000000000000003B +27502 clk cpu0 IT (27466) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27502 clk cpu0 MR4 0004c00c:00001004c00c_NS 6f727245 +27502 clk cpu0 R X8 000000000004C00C +27502 clk cpu0 R X13 000000006F727245 +27503 clk cpu0 IT (27467) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27503 clk cpu0 R X12 000000000000000A +27504 clk cpu0 IT (27468) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27504 clk cpu0 R X11 0000000000000037 +27505 clk cpu0 IT (27469) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27505 clk cpu0 R cpsr 200003c0 +27506 clk cpu0 IT (27470) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27506 clk cpu0 R X14 0000000072724500 +27507 clk cpu0 IT (27471) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27507 clk cpu0 R X12 000000007272450A +27508 clk cpu0 IT (27472) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27508 clk cpu0 MW4 030457b4:0000008457b4_NS 7272450a +27508 clk cpu0 R X0 00000000030457B8 +27509 clk cpu0 IT (27473) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27509 clk cpu0 R X12 000000006F727245 +27510 clk cpu0 IT (27474) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27511 clk cpu0 IT (27475) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27511 clk cpu0 MR4 0004c010:00001004c010_NS 49203a72 +27511 clk cpu0 R X8 000000000004C010 +27511 clk cpu0 R X13 0000000049203A72 +27512 clk cpu0 IT (27476) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27512 clk cpu0 R X12 000000000000006F +27513 clk cpu0 IT (27477) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27513 clk cpu0 R X11 0000000000000033 +27514 clk cpu0 IT (27478) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27514 clk cpu0 R cpsr 200003c0 +27515 clk cpu0 IT (27479) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27515 clk cpu0 R X14 00000000203A7200 +27516 clk cpu0 IT (27480) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27516 clk cpu0 R X12 00000000203A726F +27517 clk cpu0 IT (27481) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27517 clk cpu0 MW4 030457b8:0000008457b8_NS 203a726f +27517 clk cpu0 R X0 00000000030457BC +27518 clk cpu0 IT (27482) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27518 clk cpu0 R X12 0000000049203A72 +27519 clk cpu0 IT (27483) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27520 clk cpu0 IT (27484) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27520 clk cpu0 MR4 0004c014:00001004c014_NS 67656c6c +27520 clk cpu0 R X8 000000000004C014 +27520 clk cpu0 R X13 0000000067656C6C +27521 clk cpu0 IT (27485) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27521 clk cpu0 R X12 0000000000000049 +27522 clk cpu0 IT (27486) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27522 clk cpu0 R X11 000000000000002F +27523 clk cpu0 IT (27487) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27523 clk cpu0 R cpsr 200003c0 +27524 clk cpu0 IT (27488) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27524 clk cpu0 R X14 00000000656C6C00 +27525 clk cpu0 IT (27489) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27525 clk cpu0 R X12 00000000656C6C49 +27526 clk cpu0 IT (27490) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27526 clk cpu0 MW4 030457bc:0000008457bc_NS 656c6c49 +27526 clk cpu0 R X0 00000000030457C0 +27527 clk cpu0 IT (27491) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27527 clk cpu0 R X12 0000000067656C6C +27528 clk cpu0 IT (27492) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27529 clk cpu0 IT (27493) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27529 clk cpu0 MR4 0004c018:00001004c018_NS 66206c61 +27529 clk cpu0 R X8 000000000004C018 +27529 clk cpu0 R X13 0000000066206C61 +27530 clk cpu0 IT (27494) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27530 clk cpu0 R X12 0000000000000067 +27531 clk cpu0 IT (27495) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27531 clk cpu0 R X11 000000000000002B +27532 clk cpu0 IT (27496) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27532 clk cpu0 R cpsr 200003c0 +27533 clk cpu0 IT (27497) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27533 clk cpu0 R X14 00000000206C6100 +27534 clk cpu0 IT (27498) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27534 clk cpu0 R X12 00000000206C6167 +27535 clk cpu0 IT (27499) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27535 clk cpu0 MW4 030457c0:0000008457c0_NS 206c6167 +27535 clk cpu0 R X0 00000000030457C4 +27536 clk cpu0 IT (27500) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27536 clk cpu0 R X12 0000000066206C61 +27537 clk cpu0 IT (27501) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27538 clk cpu0 IT (27502) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27538 clk cpu0 MR4 0004c01c:00001004c01c_NS 616d726f +27538 clk cpu0 R X8 000000000004C01C +27538 clk cpu0 R X13 00000000616D726F +27539 clk cpu0 IT (27503) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27539 clk cpu0 R X12 0000000000000066 +27540 clk cpu0 IT (27504) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27540 clk cpu0 R X11 0000000000000027 +27541 clk cpu0 IT (27505) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27541 clk cpu0 R cpsr 200003c0 +27542 clk cpu0 IT (27506) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27542 clk cpu0 R X14 000000006D726F00 +27543 clk cpu0 IT (27507) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27543 clk cpu0 R X12 000000006D726F66 +27544 clk cpu0 IT (27508) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27544 clk cpu0 MW4 030457c4:0000008457c4_NS 6d726f66 +27544 clk cpu0 R X0 00000000030457C8 +27545 clk cpu0 IT (27509) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27545 clk cpu0 R X12 00000000616D726F +27546 clk cpu0 IT (27510) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27547 clk cpu0 IT (27511) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27547 clk cpu0 MR4 0004c020:00001004c020_NS 70732074 +27547 clk cpu0 R X8 000000000004C020 +27547 clk cpu0 R X13 0000000070732074 +27548 clk cpu0 IT (27512) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27548 clk cpu0 R X12 0000000000000061 +27549 clk cpu0 IT (27513) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27549 clk cpu0 R X11 0000000000000023 +27550 clk cpu0 IT (27514) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27550 clk cpu0 R cpsr 200003c0 +27551 clk cpu0 IT (27515) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27551 clk cpu0 R X14 0000000073207400 +27552 clk cpu0 IT (27516) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27552 clk cpu0 R X12 0000000073207461 +27553 clk cpu0 IT (27517) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27553 clk cpu0 MW4 030457c8:0000008457c8_NS 73207461 +27553 clk cpu0 R X0 00000000030457CC +27554 clk cpu0 IT (27518) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27554 clk cpu0 R X12 0000000070732074 +27555 clk cpu0 IT (27519) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27556 clk cpu0 IT (27520) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27556 clk cpu0 MR4 0004c024:00001004c024_NS 66696365 +27556 clk cpu0 R X8 000000000004C024 +27556 clk cpu0 R X13 0000000066696365 +27557 clk cpu0 IT (27521) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27557 clk cpu0 R X12 0000000000000070 +27558 clk cpu0 IT (27522) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27558 clk cpu0 R X11 000000000000001F +27559 clk cpu0 IT (27523) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27559 clk cpu0 R cpsr 200003c0 +27560 clk cpu0 IT (27524) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27560 clk cpu0 R X14 0000000069636500 +27561 clk cpu0 IT (27525) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27561 clk cpu0 R X12 0000000069636570 +27562 clk cpu0 IT (27526) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27562 clk cpu0 MW4 030457cc:0000008457cc_NS 69636570 +27562 clk cpu0 R X0 00000000030457D0 +27563 clk cpu0 IT (27527) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27563 clk cpu0 R X12 0000000066696365 +27564 clk cpu0 IT (27528) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27565 clk cpu0 IT (27529) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27565 clk cpu0 MR4 0004c028:00001004c028_NS 20726569 +27565 clk cpu0 R X8 000000000004C028 +27565 clk cpu0 R X13 0000000020726569 +27566 clk cpu0 IT (27530) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27566 clk cpu0 R X12 0000000000000066 +27567 clk cpu0 IT (27531) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27567 clk cpu0 R X11 000000000000001B +27568 clk cpu0 IT (27532) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27568 clk cpu0 R cpsr 200003c0 +27569 clk cpu0 IT (27533) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27569 clk cpu0 R X14 0000000072656900 +27570 clk cpu0 IT (27534) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27570 clk cpu0 R X12 0000000072656966 +27571 clk cpu0 IT (27535) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27571 clk cpu0 MW4 030457d0:0000008457d0_NS 72656966 +27571 clk cpu0 R X0 00000000030457D4 +27572 clk cpu0 IT (27536) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27572 clk cpu0 R X12 0000000020726569 +27573 clk cpu0 IT (27537) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27574 clk cpu0 IT (27538) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27574 clk cpu0 MR4 0004c02c:00001004c02c_NS 64657375 +27574 clk cpu0 R X8 000000000004C02C +27574 clk cpu0 R X13 0000000064657375 +27575 clk cpu0 IT (27539) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27575 clk cpu0 R X12 0000000000000020 +27576 clk cpu0 IT (27540) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27576 clk cpu0 R X11 0000000000000017 +27577 clk cpu0 IT (27541) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27577 clk cpu0 R cpsr 200003c0 +27578 clk cpu0 IT (27542) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27578 clk cpu0 R X14 0000000065737500 +27579 clk cpu0 IT (27543) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27579 clk cpu0 R X12 0000000065737520 +27580 clk cpu0 IT (27544) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27580 clk cpu0 MW4 030457d4:0000008457d4_NS 65737520 +27580 clk cpu0 R X0 00000000030457D8 +27581 clk cpu0 IT (27545) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27581 clk cpu0 R X12 0000000064657375 +27582 clk cpu0 IT (27546) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27583 clk cpu0 IT (27547) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27583 clk cpu0 MR4 0004c030:00001004c030_NS 5f27203a +27583 clk cpu0 R X8 000000000004C030 +27583 clk cpu0 R X13 000000005F27203A +27584 clk cpu0 IT (27548) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27584 clk cpu0 R X12 0000000000000064 +27585 clk cpu0 IT (27549) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27585 clk cpu0 R X11 0000000000000013 +27586 clk cpu0 IT (27550) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27586 clk cpu0 R cpsr 200003c0 +27587 clk cpu0 IT (27551) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27587 clk cpu0 R X14 0000000027203A00 +27588 clk cpu0 IT (27552) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27588 clk cpu0 R X12 0000000027203A64 +27589 clk cpu0 IT (27553) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27589 clk cpu0 MW4 030457d8:0000008457d8_NS 27203a64 +27589 clk cpu0 R X0 00000000030457DC +27590 clk cpu0 IT (27554) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27590 clk cpu0 R X12 000000005F27203A +27591 clk cpu0 IT (27555) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27592 clk cpu0 IT (27556) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27592 clk cpu0 MR4 0004c034:00001004c034_NS 45202e27 +27592 clk cpu0 R X8 000000000004C034 +27592 clk cpu0 R X13 0000000045202E27 +27593 clk cpu0 IT (27557) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27593 clk cpu0 R X12 000000000000005F +27594 clk cpu0 IT (27558) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27594 clk cpu0 R X11 000000000000000F +27595 clk cpu0 IT (27559) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27595 clk cpu0 R cpsr 200003c0 +27596 clk cpu0 IT (27560) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27596 clk cpu0 R X14 00000000202E2700 +27597 clk cpu0 IT (27561) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27597 clk cpu0 R X12 00000000202E275F +27598 clk cpu0 IT (27562) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27598 clk cpu0 MW4 030457dc:0000008457dc_NS 202e275f +27598 clk cpu0 R X0 00000000030457E0 +27599 clk cpu0 IT (27563) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27599 clk cpu0 R X12 0000000045202E27 +27600 clk cpu0 IT (27564) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27601 clk cpu0 IT (27565) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27601 clk cpu0 MR4 0004c038:00001004c038_NS 6e69646e +27601 clk cpu0 R X8 000000000004C038 +27601 clk cpu0 R X13 000000006E69646E +27602 clk cpu0 IT (27566) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27602 clk cpu0 R X12 0000000000000045 +27603 clk cpu0 IT (27567) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27603 clk cpu0 R X11 000000000000000B +27604 clk cpu0 IT (27568) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27604 clk cpu0 R cpsr 200003c0 +27605 clk cpu0 IT (27569) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27605 clk cpu0 R X14 0000000069646E00 +27606 clk cpu0 IT (27570) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27606 clk cpu0 R X12 0000000069646E45 +27607 clk cpu0 IT (27571) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27607 clk cpu0 MW4 030457e0:0000008457e0_NS 69646e45 +27607 clk cpu0 R X0 00000000030457E4 +27608 clk cpu0 IT (27572) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27608 clk cpu0 R X12 000000006E69646E +27609 clk cpu0 IT (27573) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27610 clk cpu0 IT (27574) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27610 clk cpu0 MR4 0004c03c:00001004c03c_NS 65542067 +27610 clk cpu0 R X8 000000000004C03C +27610 clk cpu0 R X13 0000000065542067 +27611 clk cpu0 IT (27575) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27611 clk cpu0 R X12 000000000000006E +27612 clk cpu0 IT (27576) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27612 clk cpu0 R X11 0000000000000007 +27613 clk cpu0 IT (27577) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27613 clk cpu0 R cpsr 200003c0 +27614 clk cpu0 IT (27578) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27614 clk cpu0 R X14 0000000054206700 +27615 clk cpu0 IT (27579) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27615 clk cpu0 R X12 000000005420676E +27616 clk cpu0 IT (27580) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27616 clk cpu0 MW4 030457e4:0000008457e4_NS 5420676e +27616 clk cpu0 R X0 00000000030457E8 +27617 clk cpu0 IT (27581) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27617 clk cpu0 R X12 0000000065542067 +27618 clk cpu0 IT (27582) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27619 clk cpu0 IT (27583) 0001061c:00001001061c_NS b8404d0d O EL0t_n : LDR w13,[x8,#4]! +27619 clk cpu0 MR4 0004c040:00001004c040_NS 0a2e7473 +27619 clk cpu0 R X8 000000000004C040 +27619 clk cpu0 R X13 000000000A2E7473 +27620 clk cpu0 IT (27584) 00010620:000010010620_NS 1aca258c O EL0t_n : LSR w12,w12,w10 +27620 clk cpu0 R X12 0000000000000065 +27621 clk cpu0 IT (27585) 00010624:000010010624_NS d100116b O EL0t_n : SUB x11,x11,#4 +27621 clk cpu0 R X11 0000000000000003 +27622 clk cpu0 IT (27586) 00010628:000010010628_NS f1000d7f O EL0t_n : CMP x11,#3 +27622 clk cpu0 R cpsr 600003c0 +27623 clk cpu0 IT (27587) 0001062c:00001001062c_NS 1ac921ae O EL0t_n : LSL w14,w13,w9 +27623 clk cpu0 R X14 000000002E747300 +27624 clk cpu0 IT (27588) 00010630:000010010630_NS 2a0c01cc O EL0t_n : ORR w12,w14,w12 +27624 clk cpu0 R X12 000000002E747365 +27625 clk cpu0 IT (27589) 00010634:000010010634_NS b800440c O EL0t_n : STR w12,[x0],#4 +27625 clk cpu0 MW4 030457e8:0000008457e8_NS 2e747365 +27625 clk cpu0 R X0 00000000030457EC +27626 clk cpu0 IT (27590) 00010638:000010010638_NS 2a0d03ec O EL0t_n : MOV w12,w13 +27626 clk cpu0 R X12 000000000A2E7473 +27627 clk cpu0 IS (27591) 0001063c:00001001063c_NS 54ffff08 O EL0t_n : B.HI 0x1061c +27628 clk cpu0 IT (27592) 00010640:000010010640_NS 92400442 O EL0t_n : AND x2,x2,#3 +27628 clk cpu0 R X2 0000000000000003 +27629 clk cpu0 IT (27593) 00010644:000010010644_NS 53037d29 O EL0t_n : LSR w9,w9,#3 +27629 clk cpu0 R X9 0000000000000001 +27630 clk cpu0 IT (27594) 00010648:000010010648_NS cb090108 O EL0t_n : SUB x8,x8,x9 +27630 clk cpu0 R X8 000000000004C03F +27631 clk cpu0 IT (27595) 0001064c:00001001064c_NS 91001101 O EL0t_n : ADD x1,x8,#4 +27631 clk cpu0 R X1 000000000004C043 +27632 clk cpu0 IT (27596) 00010650:000010010650_NS 7100045f O EL0t_n : CMP w2,#1 +27632 clk cpu0 R cpsr 200003c0 +27633 clk cpu0 IS (27597) 00010654:000010010654_NS 5400014b O EL0t_n : B.LT 0x1067c +27634 clk cpu0 IT (27598) 00010658:000010010658_NS 39400028 O EL0t_n : LDRB w8,[x1,#0] +27634 clk cpu0 MR1 0004c043:00001004c043_NS 0a +27634 clk cpu0 R X8 000000000000000A +27635 clk cpu0 IT (27599) 0001065c:00001001065c_NS 39000008 O EL0t_n : STRB w8,[x0,#0] +27635 clk cpu0 MW1 030457ec:0000008457ec_NS 0a +27636 clk cpu0 IS (27600) 00010660:000010010660_NS 540000e0 O EL0t_n : B.EQ 0x1067c +27637 clk cpu0 IT (27601) 00010664:000010010664_NS 39400428 O EL0t_n : LDRB w8,[x1,#1] +27637 clk cpu0 MR1 0004c044:00001004c044_NS 00 +27637 clk cpu0 R X8 0000000000000000 +27638 clk cpu0 IT (27602) 00010668:000010010668_NS 71000c5f O EL0t_n : CMP w2,#3 +27638 clk cpu0 R cpsr 600003c0 +27639 clk cpu0 IT (27603) 0001066c:00001001066c_NS 39000408 O EL0t_n : STRB w8,[x0,#1] +27639 clk cpu0 MW1 030457ed:0000008457ed_NS 00 +27640 clk cpu0 IS (27604) 00010670:000010010670_NS 5400006b O EL0t_n : B.LT 0x1067c +27641 clk cpu0 IT (27605) 00010674:000010010674_NS 39400828 O EL0t_n : LDRB w8,[x1,#2] +27641 clk cpu0 MR1 0004c045:00001004c045_NS 00 +27641 clk cpu0 R X8 0000000000000000 +27642 clk cpu0 IT (27606) 00010678:000010010678_NS 39000808 O EL0t_n : STRB w8,[x0,#2] +27642 clk cpu0 MW1 030457ee:0000008457ee_NS 00 +27643 clk cpu0 IT (27607) 0001067c:00001001067c_NS d65f03c0 O EL0t_n : RET +27644 clk cpu0 IT (27608) 000104dc:0000100104dc_NS aa1303e0 O EL0t_n : MOV x0,x19 +27644 clk cpu0 R X0 00000000030457B4 +27645 clk cpu0 IT (27609) 000104e0:0000100104e0_NS a8c17bf3 O EL0t_n : LDP x19,x30,[sp],#0x10 +27645 clk cpu0 MR8 030457a0:0000008457a0_NS 00000000_03045880 +27645 clk cpu0 MR8 030457a8:0000008457a8_NS 00000000_00092b80 +27645 clk cpu0 R SP_EL0 00000000030457B0 +27645 clk cpu0 R X19 0000000003045880 +27645 clk cpu0 R X30 0000000000092B80 +27646 clk cpu0 IT (27610) 000104e4:0000100104e4_NS d65f03c0 O EL0t_n : RET +27647 clk cpu0 IT (27611) 00092b80:000010092b80_NS d0fffdd6 O EL0t_n : ADRP x22,0x4cb80 +27647 clk cpu0 R X22 000000000004C000 +27648 clk cpu0 IT (27612) 00092b84:000010092b84_NS d0fffdd7 O EL0t_n : ADRP x23,0x4cb84 +27648 clk cpu0 R X23 000000000004C000 +27649 clk cpu0 IT (27613) 00092b88:000010092b88_NS 2a1f03fa O EL0t_n : MOV w26,wzr +27649 clk cpu0 R X26 0000000000000000 +27650 clk cpu0 IT (27614) 00092b8c:000010092b8c_NS f0017cb5 O EL0t_n : ADRP x21,0x3029b8c +27650 clk cpu0 R X21 0000000003029000 +27651 clk cpu0 IT (27615) 00092b90:000010092b90_NS 910422d6 O EL0t_n : ADD x22,x22,#0x108 +27651 clk cpu0 R X22 000000000004C108 +27652 clk cpu0 IT (27616) 00092b94:000010092b94_NS 9104a6f7 O EL0t_n : ADD x23,x23,#0x129 +27652 clk cpu0 R X23 000000000004C129 +27653 clk cpu0 IT (27617) 00092b98:000010092b98_NS f0017d78 O EL0t_n : ADRP x24,0x3041b98 +27653 clk cpu0 R X24 0000000003041000 +27654 clk cpu0 IT (27618) 00092b9c:000010092b9c_NS 90030c39 O EL0t_n : ADRP x25,0x6216b9c +27654 clk cpu0 R X25 0000000006216000 +27655 clk cpu0 IT (27619) 00092ba0:000010092ba0_NS 14000005 O EL0t_n : B 0x92bb4 +27656 clk cpu0 IT (27620) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27656 clk cpu0 MR1 0004cf7a:00001004cf7a_NS 0a +27656 clk cpu0 R X8 000000000000000A +27656 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 007b ALLOC 0x00001004cf40_NS +27656 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 13d1 ALLOC 0x00001004cf40_NS +27657 clk cpu0 IT (27621) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27657 clk cpu0 R cpsr 800003c0 +27658 clk cpu0 IS (27622) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27659 clk cpu0 IS (27623) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27660 clk cpu0 IT (27624) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27660 clk cpu0 R cpsr 000003c0 +27661 clk cpu0 IT (27625) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27662 clk cpu0 IT (27626) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27662 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27662 clk cpu0 R X9 0000000013000000 +27663 clk cpu0 IT (27627) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +27663 clk cpu0 R X27 000000000004CF7A +27664 clk cpu0 IT (27628) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +27664 clk cpu0 R X20 000000000004CF7B +TUBE CPU0: +27665 clk cpu0 IT (27629) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +27665 clk cpu0 MW1 13000000:000013000000_NS 0a +27666 clk cpu0 IT (27630) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27666 clk cpu0 MR1 0004cf7b:00001004cf7b_NS 2a +27666 clk cpu0 R X8 000000000000002A +27667 clk cpu0 IT (27631) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27667 clk cpu0 R cpsr 200003c0 +27668 clk cpu0 IS (27632) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27669 clk cpu0 IS (27633) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27670 clk cpu0 IT (27634) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27670 clk cpu0 R cpsr 000003c0 +27671 clk cpu0 IT (27635) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27672 clk cpu0 IT (27636) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27672 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27672 clk cpu0 R X9 0000000013000000 +27673 clk cpu0 IT (27637) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +27673 clk cpu0 R X27 000000000004CF7B +27674 clk cpu0 IT (27638) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +27674 clk cpu0 R X20 000000000004CF7C +27675 clk cpu0 IT (27639) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +27675 clk cpu0 MW1 13000000:000013000000_NS 2a +27676 clk cpu0 IT (27640) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27676 clk cpu0 MR1 0004cf7c:00001004cf7c_NS 2a +27676 clk cpu0 R X8 000000000000002A +27677 clk cpu0 IT (27641) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27677 clk cpu0 R cpsr 200003c0 +27678 clk cpu0 IS (27642) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27679 clk cpu0 IS (27643) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27680 clk cpu0 IT (27644) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27680 clk cpu0 R cpsr 000003c0 +27681 clk cpu0 IT (27645) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27682 clk cpu0 IT (27646) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27682 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27682 clk cpu0 R X9 0000000013000000 +27683 clk cpu0 IT (27647) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +27683 clk cpu0 R X27 000000000004CF7C +27684 clk cpu0 IT (27648) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +27684 clk cpu0 R X20 000000000004CF7D +27685 clk cpu0 IT (27649) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +27685 clk cpu0 MW1 13000000:000013000000_NS 2a +27686 clk cpu0 IT (27650) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27686 clk cpu0 MR1 0004cf7d:00001004cf7d_NS 20 +27686 clk cpu0 R X8 0000000000000020 +27687 clk cpu0 IT (27651) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27687 clk cpu0 R cpsr 800003c0 +27688 clk cpu0 IS (27652) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27689 clk cpu0 IS (27653) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27690 clk cpu0 IT (27654) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27690 clk cpu0 R cpsr 000003c0 +27691 clk cpu0 IT (27655) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27692 clk cpu0 IT (27656) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27692 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27692 clk cpu0 R X9 0000000013000000 +27693 clk cpu0 IT (27657) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +27693 clk cpu0 R X27 000000000004CF7D +27694 clk cpu0 IT (27658) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +27694 clk cpu0 R X20 000000000004CF7E +27695 clk cpu0 IT (27659) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +27695 clk cpu0 MW1 13000000:000013000000_NS 20 +27696 clk cpu0 IT (27660) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27696 clk cpu0 MR1 0004cf7e:00001004cf7e_NS 54 +27696 clk cpu0 R X8 0000000000000054 +27697 clk cpu0 IT (27661) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27697 clk cpu0 R cpsr 200003c0 +27698 clk cpu0 IS (27662) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27699 clk cpu0 IS (27663) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27700 clk cpu0 IT (27664) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27700 clk cpu0 R cpsr 000003c0 +27701 clk cpu0 IT (27665) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27702 clk cpu0 IT (27666) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27702 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27702 clk cpu0 R X9 0000000013000000 +27703 clk cpu0 IT (27667) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +27703 clk cpu0 R X27 000000000004CF7E +27704 clk cpu0 IT (27668) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +27704 clk cpu0 R X20 000000000004CF7F +27705 clk cpu0 IT (27669) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +27705 clk cpu0 MW1 13000000:000013000000_NS 54 +27706 clk cpu0 IT (27670) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27706 clk cpu0 MR1 0004cf7f:00001004cf7f_NS 45 +27706 clk cpu0 R X8 0000000000000045 +27707 clk cpu0 IT (27671) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27707 clk cpu0 R cpsr 200003c0 +27708 clk cpu0 IS (27672) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27709 clk cpu0 IS (27673) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27710 clk cpu0 IT (27674) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27710 clk cpu0 R cpsr 000003c0 +27711 clk cpu0 IT (27675) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27712 clk cpu0 IT (27676) 00092ba4:000010092ba4_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27712 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27712 clk cpu0 R X9 0000000013000000 +27713 clk cpu0 IT (27677) 00092ba8:000010092ba8_NS aa1403fb O EL0t_n : MOV x27,x20 +27713 clk cpu0 R X27 000000000004CF7F +27714 clk cpu0 IT (27678) 00092bac:000010092bac_NS 91000694 O EL0t_n : ADD x20,x20,#1 +27714 clk cpu0 R X20 000000000004CF80 +27715 clk cpu0 IT (27679) 00092bb0:000010092bb0_NS 39000128 O EL0t_n : STRB w8,[x9,#0] +27715 clk cpu0 MW1 13000000:000013000000_NS 45 +27716 clk cpu0 IT (27680) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27716 clk cpu0 MR1 0004cf80:00001004cf80_NS 53 +27716 clk cpu0 R X8 0000000000000053 +27717 clk cpu0 IT (27681) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27717 clk cpu0 R cpsr 200003c0 +27718 clk cpu0 IS (27682) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27719 clk cpu0 IS (27683) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27720 clk cpu0 IT (27684) 00092bc4:000010092bc4_NS f2400a9f O EL0t_n : TST x20,#7 +27720 clk cpu0 R cpsr 400003c0 +27721 clk cpu0 IS (27685) 00092bc8:000010092bc8_NS 54fffee1 O EL0t_n : B.NE 0x92ba4 +27722 clk cpu0 IT (27686) 00092bcc:000010092bcc_NS b948fb08 O EL0t_n : LDR w8,[x24,#0x8f8] +27722 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +27722 clk cpu0 R X8 0000000000000000 +27723 clk cpu0 IT (27687) 00092bd0:000010092bd0_NS f9400280 O EL0t_n : LDR x0,[x20,#0] +27723 clk cpu0 MR8 0004cf80:00001004cf80_NS 45535341_50205453 +27723 clk cpu0 R X0 4553534150205453 +27724 clk cpu0 IT (27688) 00092bd4:000010092bd4_NS 7100051f O EL0t_n : CMP w8,#1 +27724 clk cpu0 R cpsr 800003c0 +27725 clk cpu0 IT (27689) 00092bd8:000010092bd8_NS 54000041 O EL0t_n : B.NE 0x92be0 +27726 clk cpu0 IT (27690) 00092be0:000010092be0_NS 2a1f03fb O EL0t_n : MOV w27,wzr +27726 clk cpu0 R X27 0000000000000000 +27727 clk cpu0 IT (27691) 00092be4:000010092be4_NS aa1403fc O EL0t_n : MOV x28,x20 +27727 clk cpu0 R X28 000000000004CF80 +27728 clk cpu0 IT (27692) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +27728 clk cpu0 R X8 00000000FFFFFFF8 +27729 clk cpu0 IT (27693) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27729 clk cpu0 R cpsr 000003c0 +27729 clk cpu0 R X9 0000000000000053 +27730 clk cpu0 IS (27694) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27731 clk cpu0 IT (27695) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27731 clk cpu0 R cpsr 200003c0 +27732 clk cpu0 IS (27696) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27733 clk cpu0 IT (27697) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27733 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27733 clk cpu0 R X9 0000000013000000 +27734 clk cpu0 IT (27698) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27734 clk cpu0 R cpsr 800003c0 +27734 clk cpu0 R X8 00000000FFFFFFF9 +27735 clk cpu0 IT (27699) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27735 clk cpu0 MW1 13000000:000013000000_NS 53 +27736 clk cpu0 IT (27700) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27736 clk cpu0 R X0 0045535341502054 +27737 clk cpu0 IT (27701) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27738 clk cpu0 IT (27702) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27738 clk cpu0 R cpsr 000003c0 +27738 clk cpu0 R X9 0000000000000054 +27739 clk cpu0 IS (27703) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27740 clk cpu0 IT (27704) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27740 clk cpu0 R cpsr 200003c0 +27741 clk cpu0 IS (27705) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27742 clk cpu0 IT (27706) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27742 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27742 clk cpu0 R X9 0000000013000000 +27743 clk cpu0 IT (27707) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27743 clk cpu0 R cpsr 800003c0 +27743 clk cpu0 R X8 00000000FFFFFFFA +27744 clk cpu0 IT (27708) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27744 clk cpu0 MW1 13000000:000013000000_NS 54 +27745 clk cpu0 IT (27709) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27745 clk cpu0 R X0 0000455353415020 +27746 clk cpu0 IT (27710) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27747 clk cpu0 IT (27711) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27747 clk cpu0 R cpsr 000003c0 +27747 clk cpu0 R X9 0000000000000020 +27748 clk cpu0 IS (27712) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27749 clk cpu0 IT (27713) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27749 clk cpu0 R cpsr 800003c0 +27750 clk cpu0 IS (27714) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27751 clk cpu0 IT (27715) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27751 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27751 clk cpu0 R X9 0000000013000000 +27752 clk cpu0 IT (27716) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27752 clk cpu0 R cpsr 800003c0 +27752 clk cpu0 R X8 00000000FFFFFFFB +27753 clk cpu0 IT (27717) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27753 clk cpu0 MW1 13000000:000013000000_NS 20 +27754 clk cpu0 IT (27718) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27754 clk cpu0 R X0 0000004553534150 +27755 clk cpu0 IT (27719) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27756 clk cpu0 IT (27720) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27756 clk cpu0 R cpsr 000003c0 +27756 clk cpu0 R X9 0000000000000050 +27757 clk cpu0 IS (27721) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27758 clk cpu0 IT (27722) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27758 clk cpu0 R cpsr 200003c0 +27759 clk cpu0 IS (27723) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27760 clk cpu0 IT (27724) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27760 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27760 clk cpu0 R X9 0000000013000000 +27761 clk cpu0 IT (27725) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27761 clk cpu0 R cpsr 800003c0 +27761 clk cpu0 R X8 00000000FFFFFFFC +27762 clk cpu0 IT (27726) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27762 clk cpu0 MW1 13000000:000013000000_NS 50 +27763 clk cpu0 IT (27727) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27763 clk cpu0 R X0 0000000045535341 +27764 clk cpu0 IT (27728) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27765 clk cpu0 IT (27729) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27765 clk cpu0 R cpsr 000003c0 +27765 clk cpu0 R X9 0000000000000041 +27766 clk cpu0 IS (27730) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27767 clk cpu0 IT (27731) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27767 clk cpu0 R cpsr 200003c0 +27768 clk cpu0 IS (27732) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27769 clk cpu0 IT (27733) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27769 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27769 clk cpu0 R X9 0000000013000000 +27770 clk cpu0 IT (27734) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27770 clk cpu0 R cpsr 800003c0 +27770 clk cpu0 R X8 00000000FFFFFFFD +27771 clk cpu0 IT (27735) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27771 clk cpu0 MW1 13000000:000013000000_NS 41 +27772 clk cpu0 IT (27736) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27772 clk cpu0 R X0 0000000000455353 +27773 clk cpu0 IT (27737) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27774 clk cpu0 IT (27738) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27774 clk cpu0 R cpsr 000003c0 +27774 clk cpu0 R X9 0000000000000053 +27775 clk cpu0 IS (27739) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27776 clk cpu0 IT (27740) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27776 clk cpu0 R cpsr 200003c0 +27777 clk cpu0 IS (27741) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27778 clk cpu0 IT (27742) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27778 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27778 clk cpu0 R X9 0000000013000000 +27779 clk cpu0 IT (27743) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27779 clk cpu0 R cpsr 800003c0 +27779 clk cpu0 R X8 00000000FFFFFFFE +27780 clk cpu0 IT (27744) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27780 clk cpu0 MW1 13000000:000013000000_NS 53 +27781 clk cpu0 IT (27745) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27781 clk cpu0 R X0 0000000000004553 +27782 clk cpu0 IT (27746) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27783 clk cpu0 IT (27747) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27783 clk cpu0 R cpsr 000003c0 +27783 clk cpu0 R X9 0000000000000053 +27784 clk cpu0 IS (27748) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27785 clk cpu0 IT (27749) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27785 clk cpu0 R cpsr 200003c0 +27786 clk cpu0 IS (27750) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27787 clk cpu0 IT (27751) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27787 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27787 clk cpu0 R X9 0000000013000000 +27788 clk cpu0 IT (27752) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27788 clk cpu0 R cpsr 800003c0 +27788 clk cpu0 R X8 00000000FFFFFFFF +27789 clk cpu0 IT (27753) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27789 clk cpu0 MW1 13000000:000013000000_NS 53 +27790 clk cpu0 IT (27754) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27790 clk cpu0 R X0 0000000000000045 +27791 clk cpu0 IT (27755) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27792 clk cpu0 IT (27756) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27792 clk cpu0 R cpsr 000003c0 +27792 clk cpu0 R X9 0000000000000045 +27793 clk cpu0 IS (27757) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27794 clk cpu0 IT (27758) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27794 clk cpu0 R cpsr 200003c0 +27795 clk cpu0 IS (27759) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27796 clk cpu0 IT (27760) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27796 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27796 clk cpu0 R X9 0000000013000000 +27797 clk cpu0 IT (27761) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27797 clk cpu0 R cpsr 600003c0 +27797 clk cpu0 R X8 0000000000000000 +27798 clk cpu0 IT (27762) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27798 clk cpu0 MW1 13000000:000013000000_NS 45 +27799 clk cpu0 IT (27763) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27799 clk cpu0 R X0 0000000000000000 +27800 clk cpu0 IS (27764) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27801 clk cpu0 IT (27765) 00092c10:000010092c10_NS f8408f80 O EL0t_n : LDR x0,[x28,#8]! +27801 clk cpu0 MR8 0004cf88:00001004cf88_NS 0a2a2a20_4b4f2044 +27801 clk cpu0 R X0 0A2A2A204B4F2044 +27801 clk cpu0 R X28 000000000004CF88 +27802 clk cpu0 IT (27766) 00092c14:000010092c14_NS b948fb09 O EL0t_n : LDR w9,[x24,#0x8f8] +27802 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +27802 clk cpu0 R X9 0000000000000000 +27803 clk cpu0 IT (27767) 00092c18:000010092c18_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +27803 clk cpu0 R X8 0000000000000000 +27804 clk cpu0 IT (27768) 00092c1c:000010092c1c_NS 1100211b O EL0t_n : ADD w27,w8,#8 +27804 clk cpu0 R X27 0000000000000008 +27805 clk cpu0 IT (27769) 00092c20:000010092c20_NS 7100053f O EL0t_n : CMP w9,#1 +27805 clk cpu0 R cpsr 800003c0 +27806 clk cpu0 IT (27770) 00092c24:000010092c24_NS 54fffe21 O EL0t_n : B.NE 0x92be8 +27807 clk cpu0 IT (27771) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +27807 clk cpu0 R X8 00000000FFFFFFF8 +27808 clk cpu0 IT (27772) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27808 clk cpu0 R cpsr 000003c0 +27808 clk cpu0 R X9 0000000000000044 +27809 clk cpu0 IS (27773) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27810 clk cpu0 IT (27774) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27810 clk cpu0 R cpsr 200003c0 +27811 clk cpu0 IS (27775) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27812 clk cpu0 IT (27776) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27812 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27812 clk cpu0 R X9 0000000013000000 +27813 clk cpu0 IT (27777) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27813 clk cpu0 R cpsr 800003c0 +27813 clk cpu0 R X8 00000000FFFFFFF9 +27814 clk cpu0 IT (27778) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27814 clk cpu0 MW1 13000000:000013000000_NS 44 +27815 clk cpu0 IT (27779) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27815 clk cpu0 R X0 000A2A2A204B4F20 +27816 clk cpu0 IT (27780) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27817 clk cpu0 IT (27781) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27817 clk cpu0 R cpsr 000003c0 +27817 clk cpu0 R X9 0000000000000020 +27818 clk cpu0 IS (27782) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27819 clk cpu0 IT (27783) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27819 clk cpu0 R cpsr 800003c0 +27820 clk cpu0 IS (27784) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27821 clk cpu0 IT (27785) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27821 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27821 clk cpu0 R X9 0000000013000000 +27822 clk cpu0 IT (27786) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27822 clk cpu0 R cpsr 800003c0 +27822 clk cpu0 R X8 00000000FFFFFFFA +27823 clk cpu0 IT (27787) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27823 clk cpu0 MW1 13000000:000013000000_NS 20 +27824 clk cpu0 IT (27788) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27824 clk cpu0 R X0 00000A2A2A204B4F +27825 clk cpu0 IT (27789) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27826 clk cpu0 IT (27790) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27826 clk cpu0 R cpsr 000003c0 +27826 clk cpu0 R X9 000000000000004F +27827 clk cpu0 IS (27791) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27828 clk cpu0 IT (27792) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27828 clk cpu0 R cpsr 200003c0 +27829 clk cpu0 IS (27793) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27830 clk cpu0 IT (27794) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27830 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27830 clk cpu0 R X9 0000000013000000 +27831 clk cpu0 IT (27795) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27831 clk cpu0 R cpsr 800003c0 +27831 clk cpu0 R X8 00000000FFFFFFFB +27832 clk cpu0 IT (27796) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27832 clk cpu0 MW1 13000000:000013000000_NS 4f +27833 clk cpu0 IT (27797) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27833 clk cpu0 R X0 0000000A2A2A204B +27834 clk cpu0 IT (27798) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27835 clk cpu0 IT (27799) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27835 clk cpu0 R cpsr 000003c0 +27835 clk cpu0 R X9 000000000000004B +27836 clk cpu0 IS (27800) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27837 clk cpu0 IT (27801) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27837 clk cpu0 R cpsr 200003c0 +27838 clk cpu0 IS (27802) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27839 clk cpu0 IT (27803) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27839 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27839 clk cpu0 R X9 0000000013000000 +27840 clk cpu0 IT (27804) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27840 clk cpu0 R cpsr 800003c0 +27840 clk cpu0 R X8 00000000FFFFFFFC +27841 clk cpu0 IT (27805) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27841 clk cpu0 MW1 13000000:000013000000_NS 4b +27842 clk cpu0 IT (27806) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27842 clk cpu0 R X0 000000000A2A2A20 +27843 clk cpu0 IT (27807) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27844 clk cpu0 IT (27808) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27844 clk cpu0 R cpsr 000003c0 +27844 clk cpu0 R X9 0000000000000020 +27845 clk cpu0 IS (27809) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27846 clk cpu0 IT (27810) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27846 clk cpu0 R cpsr 800003c0 +27847 clk cpu0 IS (27811) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27848 clk cpu0 IT (27812) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27848 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27848 clk cpu0 R X9 0000000013000000 +27849 clk cpu0 IT (27813) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27849 clk cpu0 R cpsr 800003c0 +27849 clk cpu0 R X8 00000000FFFFFFFD +27850 clk cpu0 IT (27814) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27850 clk cpu0 MW1 13000000:000013000000_NS 20 +27851 clk cpu0 IT (27815) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27851 clk cpu0 R X0 00000000000A2A2A +27852 clk cpu0 IT (27816) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27853 clk cpu0 IT (27817) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27853 clk cpu0 R cpsr 000003c0 +27853 clk cpu0 R X9 000000000000002A +27854 clk cpu0 IS (27818) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27855 clk cpu0 IT (27819) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27855 clk cpu0 R cpsr 200003c0 +27856 clk cpu0 IS (27820) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27857 clk cpu0 IT (27821) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27857 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27857 clk cpu0 R X9 0000000013000000 +27858 clk cpu0 IT (27822) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27858 clk cpu0 R cpsr 800003c0 +27858 clk cpu0 R X8 00000000FFFFFFFE +27859 clk cpu0 IT (27823) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27859 clk cpu0 MW1 13000000:000013000000_NS 2a +27860 clk cpu0 IT (27824) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27860 clk cpu0 R X0 0000000000000A2A +27861 clk cpu0 IT (27825) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27862 clk cpu0 IT (27826) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27862 clk cpu0 R cpsr 000003c0 +27862 clk cpu0 R X9 000000000000002A +27863 clk cpu0 IS (27827) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27864 clk cpu0 IT (27828) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27864 clk cpu0 R cpsr 200003c0 +27865 clk cpu0 IS (27829) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27866 clk cpu0 IT (27830) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27866 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27866 clk cpu0 R X9 0000000013000000 +27867 clk cpu0 IT (27831) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27867 clk cpu0 R cpsr 800003c0 +27867 clk cpu0 R X8 00000000FFFFFFFF +27868 clk cpu0 IT (27832) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27868 clk cpu0 MW1 13000000:000013000000_NS 2a +27869 clk cpu0 IT (27833) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27869 clk cpu0 R X0 000000000000000A +27870 clk cpu0 IT (27834) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27871 clk cpu0 IT (27835) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27871 clk cpu0 R cpsr 000003c0 +27871 clk cpu0 R X9 000000000000000A +27872 clk cpu0 IS (27836) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27873 clk cpu0 IT (27837) 00092bf4:000010092bf4_NS 7100953f O EL0t_n : CMP w9,#0x25 +27873 clk cpu0 R cpsr 800003c0 +27874 clk cpu0 IS (27838) 00092bf8:000010092bf8_NS 540004e0 O EL0t_n : B.EQ 0x92c94 +27875 clk cpu0 IT (27839) 00092bfc:000010092bfc_NS f9407329 O EL0t_n : LDR x9,[x25,#0xe0] +27875 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +27875 clk cpu0 R X9 0000000013000000 +27876 clk cpu0 IT (27840) 00092c00:000010092c00_NS 31000508 O EL0t_n : ADDS w8,w8,#1 +27876 clk cpu0 R cpsr 600003c0 +27876 clk cpu0 R X8 0000000000000000 +TUBE CPU0: ** TEST PASSED OK ** +27877 clk cpu0 IT (27841) 00092c04:000010092c04_NS 39000120 O EL0t_n : STRB w0,[x9,#0] +27877 clk cpu0 MW1 13000000:000013000000_NS 0a +27878 clk cpu0 IT (27842) 00092c08:000010092c08_NS d348fc00 O EL0t_n : LSR x0,x0,#8 +27878 clk cpu0 R X0 0000000000000000 +27879 clk cpu0 IS (27843) 00092c0c:000010092c0c_NS 54ffff03 O EL0t_n : B.CC 0x92bec +27880 clk cpu0 IT (27844) 00092c10:000010092c10_NS f8408f80 O EL0t_n : LDR x0,[x28,#8]! +27880 clk cpu0 MR8 0004cf90:00001004cf90_NS 2d2d2d2d_2d3e3e00 +27880 clk cpu0 R X0 2D2D2D2D2D3E3E00 +27880 clk cpu0 R X28 000000000004CF90 +27881 clk cpu0 IT (27845) 00092c14:000010092c14_NS b948fb09 O EL0t_n : LDR w9,[x24,#0x8f8] +27881 clk cpu0 MR4 030418f8:0000008418f8_NS 00000000 +27881 clk cpu0 R X9 0000000000000000 +27882 clk cpu0 IT (27846) 00092c18:000010092c18_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +27882 clk cpu0 R X8 0000000000000008 +27883 clk cpu0 IT (27847) 00092c1c:000010092c1c_NS 1100211b O EL0t_n : ADD w27,w8,#8 +27883 clk cpu0 R X27 0000000000000010 +27884 clk cpu0 IT (27848) 00092c20:000010092c20_NS 7100053f O EL0t_n : CMP w9,#1 +27884 clk cpu0 R cpsr 800003c0 +27885 clk cpu0 IT (27849) 00092c24:000010092c24_NS 54fffe21 O EL0t_n : B.NE 0x92be8 +27886 clk cpu0 IT (27850) 00092be8:000010092be8_NS 128000e8 O EL0t_n : MOV w8,#0xfffffff8 +27886 clk cpu0 R X8 00000000FFFFFFF8 +27887 clk cpu0 IT (27851) 00092bec:000010092bec_NS 72001c09 O EL0t_n : ANDS w9,w0,#0xff +27887 clk cpu0 R cpsr 400003c0 +27887 clk cpu0 R X9 0000000000000000 +27888 clk cpu0 IT (27852) 00092bf0:000010092bf0_NS 54000520 O EL0t_n : B.EQ 0x92c94 +27889 clk cpu0 IT (27853) 00092c94:000010092c94_NS 0b080368 O EL0t_n : ADD w8,w27,w8 +27889 clk cpu0 R X8 0000000000000008 +27890 clk cpu0 IT (27854) 00092c98:000010092c98_NS 11001d09 O EL0t_n : ADD w9,w8,#7 +27890 clk cpu0 R X9 000000000000000F +27891 clk cpu0 IT (27855) 00092c9c:000010092c9c_NS 8b090289 O EL0t_n : ADD x9,x20,x9 +27891 clk cpu0 R X9 000000000004CF8F +27892 clk cpu0 IT (27856) 00092ca0:000010092ca0_NS 3100211f O EL0t_n : CMN w8,#8 +27892 clk cpu0 R cpsr 000003c0 +27893 clk cpu0 IT (27857) 00092ca4:000010092ca4_NS 9a89029b O EL0t_n : CSEL x27,x20,x9,EQ +27893 clk cpu0 R X27 000000000004CF8F +27894 clk cpu0 IT (27858) 00092ca8:000010092ca8_NS 91000774 O EL0t_n : ADD x20,x27,#1 +27894 clk cpu0 R X20 000000000004CF90 +27895 clk cpu0 IT (27859) 00092cac:000010092cac_NS 17ffffc2 O EL0t_n : B 0x92bb4 +27896 clk cpu0 IT (27860) 00092bb4:000010092bb4_NS 39400288 O EL0t_n : LDRB w8,[x20,#0] +27896 clk cpu0 MR1 0004cf90:00001004cf90_NS 00 +27896 clk cpu0 R X8 0000000000000000 +27897 clk cpu0 IT (27861) 00092bb8:000010092bb8_NS 7100951f O EL0t_n : CMP w8,#0x25 +27897 clk cpu0 R cpsr 800003c0 +27898 clk cpu0 IS (27862) 00092bbc:000010092bbc_NS 540003a0 O EL0t_n : B.EQ 0x92c30 +27899 clk cpu0 IT (27863) 00092bc0:000010092bc0_NS 34001ec8 O EL0t_n : CBZ w8,0x92f98 +27900 clk cpu0 IT (27864) 00092f98:000010092f98_NS d5033f9f O EL0t_n : DSB SY +27901 clk cpu0 IT (27865) 00092f9c:000010092f9c_NS a9497bf3 O EL0t_n : LDP x19,x30,[sp,#0x90] +27901 clk cpu0 MR8 03045840:000000845840_NS 00000000_0004cf7a +27901 clk cpu0 MR8 03045848:000000845848_NS 00000000_0009c560 +27901 clk cpu0 R X19 000000000004CF7A +27901 clk cpu0 R X30 000000000009C560 +27902 clk cpu0 IT (27866) 00092fa0:000010092fa0_NS a94853f5 O EL0t_n : LDP x21,x20,[sp,#0x80] +27902 clk cpu0 MR8 03045830:000000845830_NS 00000000_00000000 +27902 clk cpu0 MR8 03045838:000000845838_NS 00000000_03008528 +27902 clk cpu0 R X20 0000000003008528 +27902 clk cpu0 R X21 0000000000000000 +27903 clk cpu0 IT (27867) 00092fa4:000010092fa4_NS a9475bf7 O EL0t_n : LDP x23,x22,[sp,#0x70] +27903 clk cpu0 MR8 03045820:000000845820_NS 00000000_00000000 +27903 clk cpu0 MR8 03045828:000000845828_NS 00000000_90000000 +27903 clk cpu0 R X22 0000000090000000 +27903 clk cpu0 R X23 0000000000000000 +27904 clk cpu0 IT (27868) 00092fa8:000010092fa8_NS a94663f9 O EL0t_n : LDP x25,x24,[sp,#0x60] +27904 clk cpu0 MR8 03045810:000000845810_NS 00000000_0000003c +27904 clk cpu0 MR8 03045818:000000845818_NS 00000000_00007c00 +27904 clk cpu0 R X24 0000000000007C00 +27904 clk cpu0 R X25 000000000000003C +27905 clk cpu0 IT (27869) 00092fac:000010092fac_NS a9456bfb O EL0t_n : LDP x27,x26,[sp,#0x50] +27905 clk cpu0 MR8 03045800:000000845800_NS 00010001_00010001 +27905 clk cpu0 MR8 03045808:000000845808_NS ffe000ff_ffe000ff +27905 clk cpu0 R X26 FFE000FFFFE000FF +27905 clk cpu0 R X27 0001000100010001 +27906 clk cpu0 IT (27870) 00092fb0:000010092fb0_NS f94023fc O EL0t_n : LDR x28,[sp,#0x40] +27906 clk cpu0 MR8 030457f0:0000008457f0_NS ff7fff7f_ff7fff7f +27906 clk cpu0 R X28 FF7FFF7FFF7FFF7F +27907 clk cpu0 IT (27871) 00092fb4:000010092fb4_NS 910283ff O EL0t_n : ADD sp,sp,#0xa0 +27907 clk cpu0 R SP_EL0 0000000003045850 +27908 clk cpu0 IT (27872) 00092fb8:000010092fb8_NS d65f03c0 O EL0t_n : RET +27909 clk cpu0 IT (27873) 0009c560:00001009c560_NS 52800020 O EL0t_n : MOV w0,#1 +27909 clk cpu0 R X0 0000000000000001 +27910 clk cpu0 IT (27874) 0009c564:00001009c564_NS 2a1503e1 O EL0t_n : MOV w1,w21 +27910 clk cpu0 R X1 0000000000000000 +27911 clk cpu0 IT (27875) 0009c568:00001009c568_NS 2a1f03e2 O EL0t_n : MOV w2,wzr +27911 clk cpu0 R X2 0000000000000000 +27912 clk cpu0 IT (27876) 0009c56c:00001009c56c_NS d503201f O EL0t_n : NOP +27913 clk cpu0 IT (27877) 0009c570:00001009c570_NS d5033f9f O EL0t_n : DSB SY +27914 clk cpu0 IT (27878) 0009c574:00001009c574_NS aa1403e0 O EL0t_n : MOV x0,x20 +27914 clk cpu0 R X0 0000000003008528 +27915 clk cpu0 IT (27879) 0009c578:00001009c578_NS 97fffd30 O EL0t_n : BL 0x9ba38 +27915 clk cpu0 R X30 000000000009C57C +27916 clk cpu0 IT (27880) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +27917 clk cpu0 IT (27881) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +27917 clk cpu0 R X8 0000000006216000 +27918 clk cpu0 IT (27882) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +27918 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27918 clk cpu0 R X8 0000000000000001 +27919 clk cpu0 IT (27883) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +27919 clk cpu0 R cpsr 800003c0 +27920 clk cpu0 IT (27884) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +27921 clk cpu0 IT (27885) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +27922 clk cpu0 IT (27886) 0009c57c:00001009c57c_NS a9487bf3 O EL0t_n : LDP x19,x30,[sp,#0x80] +27922 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_062160a2 +27922 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_00097e18 +27922 clk cpu0 R X19 00000000062160A2 +27922 clk cpu0 R X30 0000000000097E18 +27923 clk cpu0 IT (27887) 0009c580:00001009c580_NS a94753f5 O EL0t_n : LDP x21,x20,[sp,#0x70] +27923 clk cpu0 MR8 030458c0:0000008458c0_NS 00000000_02f00028 +27923 clk cpu0 MR8 030458c8:0000008458c8_NS ff83ff83_ff83ff83 +27923 clk cpu0 R X20 FF83FF83FF83FF83 +27923 clk cpu0 R X21 0000000002F00028 +27924 clk cpu0 IT (27888) 0009c584:00001009c584_NS 910243ff O EL0t_n : ADD sp,sp,#0x90 +27924 clk cpu0 R SP_EL0 00000000030458E0 +27925 clk cpu0 IT (27889) 0009c588:00001009c588_NS d65f03c0 O EL0t_n : RET +27926 clk cpu0 IT (27890) 00097e18:000010097e18_NS f0030be0 O EL0t_n : ADRP x0,0x6216e18 +27926 clk cpu0 R X0 0000000006216000 +27927 clk cpu0 IT (27891) 00097e1c:000010097e1c_NS 91013000 O EL0t_n : ADD x0,x0,#0x4c +27927 clk cpu0 R X0 000000000621604C +27928 clk cpu0 IT (27892) 00097e20:000010097e20_NS b8415401 O EL0t_n : LDR w1,[x0],#0x15 +27928 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27928 clk cpu0 R X0 0000000006216061 +27928 clk cpu0 R X1 0000000000000001 +27929 clk cpu0 IT (27893) 00097e24:000010097e24_NS 94001554 O EL0t_n : BL 0x9d374 +27929 clk cpu0 R X30 0000000000097E28 +27930 clk cpu0 IT (27894) 0009d374:00001009d374_NS f81e0ff4 O EL0t_n : STR x20,[sp,#-0x20]! +27930 clk cpu0 MW8 030458c0:0000008458c0_NS ff83ff83_ff83ff83 +27930 clk cpu0 R SP_EL0 00000000030458C0 +27931 clk cpu0 IT (27895) 0009d378:00001009d378_NS a9017bf3 O EL0t_n : STP x19,x30,[sp,#0x10] +27931 clk cpu0 MW8 030458d0:0000008458d0_NS 00000000_062160a2 +27931 clk cpu0 MW8 030458d8:0000008458d8_NS 00000000_00097e28 +27932 clk cpu0 IT (27896) 0009d37c:00001009d37c_NS 2a0103f4 O EL0t_n : MOV w20,w1 +27932 clk cpu0 R X20 0000000000000001 +27933 clk cpu0 IT (27897) 0009d380:00001009d380_NS aa0003f3 O EL0t_n : MOV x19,x0 +27933 clk cpu0 R X19 0000000006216061 +27934 clk cpu0 IT (27898) 0009d384:00001009d384_NS 940027b7 O EL0t_n : BL 0xa7260 +27934 clk cpu0 R X30 000000000009D388 +27935 clk cpu0 IT (27899) 000a7260:0000100a7260_NS d53bd060 O EL0t_n : MRS x0,TPIDRRO_EL0 +27935 clk cpu0 R X0 0000000000000000 +27936 clk cpu0 IT (27900) 000a7264:0000100a7264_NS d61f03c0 O EL0t_n : BR x30 +27936 clk cpu0 R cpsr 800007c0 +27937 clk cpu0 IT (27901) 0009d388:00001009d388_NS b9000fe0 O EL0t_n : STR w0,[sp,#0xc] +27937 clk cpu0 MW4 030458cc:0000008458cc_NS 00000000 +27937 clk cpu0 R cpsr 800003c0 +27938 clk cpu0 IT (27902) 0009d38c:00001009d38c_NS b9400fe8 O EL0t_n : LDR w8,[sp,#0xc] +27938 clk cpu0 MR4 030458cc:0000008458cc_NS 00000000 +27938 clk cpu0 R X8 0000000000000000 +27939 clk cpu0 IT (27903) 0009d390:00001009d390_NS 91000e69 O EL0t_n : ADD x9,x19,#3 +27939 clk cpu0 R X9 0000000006216064 +27940 clk cpu0 IT (27904) 0009d394:00001009d394_NS 38686928 O EL0t_n : LDRB w8,[x9,x8] +27940 clk cpu0 MR1 06216064:000015216064_NS 00 +27940 clk cpu0 R X8 0000000000000000 +27941 clk cpu0 IT (27905) 0009d398:00001009d398_NS b9400fea O EL0t_n : LDR w10,[sp,#0xc] +27941 clk cpu0 MR4 030458cc:0000008458cc_NS 00000000 +27941 clk cpu0 R X10 0000000000000000 +27942 clk cpu0 IT (27906) 0009d39c:00001009d39c_NS 2a2803e8 O EL0t_n : MVN w8,w8 +27942 clk cpu0 R X8 00000000FFFFFFFF +27943 clk cpu0 IT (27907) 0009d3a0:00001009d3a0_NS 382a6928 O EL0t_n : STRB w8,[x9,x10] +27943 clk cpu0 MW1 06216064:000015216064_NS ff +27943 clk cpu0 CACHE cpu.cpu0.l1dcache LINE 0103 DIRTY 0x000015216040_NS +27943 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1810 CLEAN 0x000015216040_NS +27943 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 1810 INVAL 0x000015216040_NS +27944 clk cpu0 IT (27908) 0009d3a4:00001009d3a4_NS d5033f9f O EL0t_n : DSB SY +27945 clk cpu0 IT (27909) 0009d3a8:00001009d3a8_NS aa1303e0 O EL0t_n : MOV x0,x19 +27945 clk cpu0 R X0 0000000006216061 +27946 clk cpu0 IT (27910) 0009d3ac:00001009d3ac_NS 97ffed6c O EL0t_n : BL 0x9895c +27946 clk cpu0 R X30 000000000009D3B0 +27947 clk cpu0 IT (27911) 0009895c:00001009895c_NS d0030be8 O EL0t_n : ADRP x8,0x621695c +27947 clk cpu0 R X8 0000000006216000 +27948 clk cpu0 IT (27912) 00098960:000010098960_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +27948 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27948 clk cpu0 R X8 0000000000000001 +27949 clk cpu0 IT (27913) 00098964:000010098964_NS 7100091f O EL0t_n : CMP w8,#2 +27949 clk cpu0 R cpsr 800003c0 +27950 clk cpu0 IT (27914) 00098968:000010098968_NS 54000043 O EL0t_n : B.CC 0x98970 +27951 clk cpu0 IT (27915) 00098970:000010098970_NS d65f03c0 O EL0t_n : RET +27952 clk cpu0 IT (27916) 0009d3b0:00001009d3b0_NS 39400668 O EL0t_n : LDRB w8,[x19,#1] +27952 clk cpu0 MR1 06216062:000015216062_NS 00 +27952 clk cpu0 R X8 0000000000000000 +27953 clk cpu0 IT (27917) 0009d3b4:00001009d3b4_NS 11000508 O EL0t_n : ADD w8,w8,#1 +27953 clk cpu0 R X8 0000000000000001 +27954 clk cpu0 IT (27918) 0009d3b8:00001009d3b8_NS 39000668 O EL0t_n : STRB w8,[x19,#1] +27954 clk cpu0 MW1 06216062:000015216062_NS 01 +27955 clk cpu0 IT (27919) 0009d3bc:00001009d3bc_NS 39400668 O EL0t_n : LDRB w8,[x19,#1] +27955 clk cpu0 MR1 06216062:000015216062_NS 01 +27955 clk cpu0 R X8 0000000000000001 +27956 clk cpu0 IT (27920) 0009d3c0:00001009d3c0_NS 6b14011f O EL0t_n : CMP w8,w20 +27956 clk cpu0 R cpsr 600003c0 +27957 clk cpu0 IS (27921) 0009d3c4:00001009d3c4_NS 540002c1 O EL0t_n : B.NE 0x9d41c +27958 clk cpu0 IT (27922) 0009d3c8:00001009d3c8_NS 3900067f O EL0t_n : STRB wzr,[x19,#1] +27958 clk cpu0 MW1 06216062:000015216062_NS 00 +27959 clk cpu0 IT (27923) 0009d3cc:00001009d3cc_NS b9000bff O EL0t_n : STR wzr,[sp,#8] +27959 clk cpu0 MW4 030458c8:0000008458c8_NS 00000000 +27960 clk cpu0 IT (27924) 0009d3d0:00001009d3d0_NS b0030bc8 O EL0t_n : ADRP x8,0x62163d0 +27960 clk cpu0 R X8 0000000006216000 +27961 clk cpu0 IT (27925) 0009d3d4:00001009d3d4_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +27961 clk cpu0 MR4 030458c8:0000008458c8_NS 00000000 +27961 clk cpu0 R X9 0000000000000000 +27962 clk cpu0 IT (27926) 0009d3d8:00001009d3d8_NS b9404d0a O EL0t_n : LDR w10,[x8,#0x4c] +27962 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27962 clk cpu0 R X10 0000000000000001 +27963 clk cpu0 IT (27927) 0009d3dc:00001009d3dc_NS 6b0a013f O EL0t_n : CMP w9,w10 +27963 clk cpu0 R cpsr 800003c0 +27964 clk cpu0 IS (27928) 0009d3e0:00001009d3e0_NS 54000142 O EL0t_n : B.CS 0x9d408 +27965 clk cpu0 IT (27929) 0009d3e4:00001009d3e4_NS b9400fe9 O EL0t_n : LDR w9,[sp,#0xc] +27965 clk cpu0 MR4 030458cc:0000008458cc_NS 00000000 +27965 clk cpu0 R X9 0000000000000000 +27966 clk cpu0 IT (27930) 0009d3e8:00001009d3e8_NS 91000e6a O EL0t_n : ADD x10,x19,#3 +27966 clk cpu0 R X10 0000000006216064 +27967 clk cpu0 IT (27931) 0009d3ec:00001009d3ec_NS 38696949 O EL0t_n : LDRB w9,[x10,x9] +27967 clk cpu0 MR1 06216064:000015216064_NS ff +27967 clk cpu0 R X9 00000000000000FF +27968 clk cpu0 IT (27932) 0009d3f0:00001009d3f0_NS b9400beb O EL0t_n : LDR w11,[sp,#8] +27968 clk cpu0 MR4 030458c8:0000008458c8_NS 00000000 +27968 clk cpu0 R X11 0000000000000000 +27969 clk cpu0 IT (27933) 0009d3f4:00001009d3f4_NS 382b6949 O EL0t_n : STRB w9,[x10,x11] +27969 clk cpu0 MW1 06216064:000015216064_NS ff +27970 clk cpu0 IT (27934) 0009d3f8:00001009d3f8_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +27970 clk cpu0 MR4 030458c8:0000008458c8_NS 00000000 +27970 clk cpu0 R X9 0000000000000000 +27971 clk cpu0 IT (27935) 0009d3fc:00001009d3fc_NS 11000529 O EL0t_n : ADD w9,w9,#1 +27971 clk cpu0 R X9 0000000000000001 +27971 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 INVAL 0x000010035400_NS +27971 clk cpu0 CACHE cpu.cpu0.l1icache LINE 00a1 ALLOC 0x00001009d400_NS +27972 clk cpu0 IT (27936) 0009d400:00001009d400_NS b9000be9 O EL0t_n : STR w9,[sp,#8] +27972 clk cpu0 MW4 030458c8:0000008458c8_NS 00000001 +27973 clk cpu0 IT (27937) 0009d404:00001009d404_NS 17fffff4 O EL0t_n : B 0x9d3d4 +27974 clk cpu0 IT (27938) 0009d3d4:00001009d3d4_NS b9400be9 O EL0t_n : LDR w9,[sp,#8] +27974 clk cpu0 MR4 030458c8:0000008458c8_NS 00000001 +27974 clk cpu0 R X9 0000000000000001 +27975 clk cpu0 IT (27939) 0009d3d8:00001009d3d8_NS b9404d0a O EL0t_n : LDR w10,[x8,#0x4c] +27975 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27975 clk cpu0 R X10 0000000000000001 +27976 clk cpu0 IT (27940) 0009d3dc:00001009d3dc_NS 6b0a013f O EL0t_n : CMP w9,w10 +27976 clk cpu0 R cpsr 600003c0 +27977 clk cpu0 IT (27941) 0009d3e0:00001009d3e0_NS 54000142 O EL0t_n : B.CS 0x9d408 +27978 clk cpu0 IT (27942) 0009d408:00001009d408_NS d5033fbf O EL0t_n : DMB SY +27979 clk cpu0 IT (27943) 0009d40c:00001009d40c_NS b9400fe8 O EL0t_n : LDR w8,[sp,#0xc] +27979 clk cpu0 MR4 030458cc:0000008458cc_NS 00000000 +27979 clk cpu0 R X8 0000000000000000 +27980 clk cpu0 IT (27944) 0009d410:00001009d410_NS 8b080268 O EL0t_n : ADD x8,x19,x8 +27980 clk cpu0 R X8 0000000006216061 +27981 clk cpu0 IT (27945) 0009d414:00001009d414_NS 39400d08 O EL0t_n : LDRB w8,[x8,#3] +27981 clk cpu0 MR1 06216064:000015216064_NS ff +27981 clk cpu0 R X8 00000000000000FF +27982 clk cpu0 IT (27946) 0009d418:00001009d418_NS 39000a68 O EL0t_n : STRB w8,[x19,#2] +27982 clk cpu0 MW1 06216063:000015216063_NS ff +27983 clk cpu0 IT (27947) 0009d41c:00001009d41c_NS d5033f9f O EL0t_n : DSB SY +27984 clk cpu0 IT (27948) 0009d420:00001009d420_NS aa1303e0 O EL0t_n : MOV x0,x19 +27984 clk cpu0 R X0 0000000006216061 +27985 clk cpu0 IT (27949) 0009d424:00001009d424_NS 97fff985 O EL0t_n : BL 0x9ba38 +27985 clk cpu0 R X30 000000000009D428 +27986 clk cpu0 IT (27950) 0009ba38:00001009ba38_NS d5033fbf O EL0t_n : DMB SY +27987 clk cpu0 IT (27951) 0009ba3c:00001009ba3c_NS f0030bc8 O EL0t_n : ADRP x8,0x6216a3c +27987 clk cpu0 R X8 0000000006216000 +27988 clk cpu0 IT (27952) 0009ba40:00001009ba40_NS b9404d08 O EL0t_n : LDR w8,[x8,#0x4c] +27988 clk cpu0 MR4 0621604c:00001521604c_NS 00000001 +27988 clk cpu0 R X8 0000000000000001 +27989 clk cpu0 IT (27953) 0009ba44:00001009ba44_NS 7100091f O EL0t_n : CMP w8,#2 +27989 clk cpu0 R cpsr 800003c0 +27990 clk cpu0 IT (27954) 0009ba48:00001009ba48_NS 54000083 O EL0t_n : B.CC 0x9ba58 +27991 clk cpu0 IT (27955) 0009ba58:00001009ba58_NS d65f03c0 O EL0t_n : RET +27992 clk cpu0 IT (27956) 0009d428:00001009d428_NS 39400a68 O EL0t_n : LDRB w8,[x19,#2] +27992 clk cpu0 MR1 06216063:000015216063_NS ff +27992 clk cpu0 R X8 00000000000000FF +27993 clk cpu0 IT (27957) 0009d42c:00001009d42c_NS b9400fe9 O EL0t_n : LDR w9,[sp,#0xc] +27993 clk cpu0 MR4 030458cc:0000008458cc_NS 00000000 +27993 clk cpu0 R X9 0000000000000000 +27994 clk cpu0 IT (27958) 0009d430:00001009d430_NS 8b090269 O EL0t_n : ADD x9,x19,x9 +27994 clk cpu0 R X9 0000000006216061 +27995 clk cpu0 IT (27959) 0009d434:00001009d434_NS 39400d29 O EL0t_n : LDRB w9,[x9,#3] +27995 clk cpu0 MR1 06216064:000015216064_NS ff +27995 clk cpu0 R X9 00000000000000FF +27996 clk cpu0 IT (27960) 0009d438:00001009d438_NS 6b09011f O EL0t_n : CMP w8,w9 +27996 clk cpu0 R cpsr 600003c0 +27997 clk cpu0 IT (27961) 0009d43c:00001009d43c_NS 54000060 O EL0t_n : B.EQ 0x9d448 +27998 clk cpu0 IT (27962) 0009d448:00001009d448_NS d5033fbf O EL0t_n : DMB SY +27999 clk cpu0 IT (27963) 0009d44c:00001009d44c_NS a9417bf3 O EL0t_n : LDP x19,x30,[sp,#0x10] +27999 clk cpu0 MR8 030458d0:0000008458d0_NS 00000000_062160a2 +27999 clk cpu0 MR8 030458d8:0000008458d8_NS 00000000_00097e28 +27999 clk cpu0 R X19 00000000062160A2 +27999 clk cpu0 R X30 0000000000097E28 +28000 clk cpu0 IT (27964) 0009d450:00001009d450_NS f84207f4 O EL0t_n : LDR x20,[sp],#0x20 +28000 clk cpu0 MR8 030458c0:0000008458c0_NS ff83ff83_ff83ff83 +28000 clk cpu0 R SP_EL0 00000000030458E0 +28000 clk cpu0 R X20 FF83FF83FF83FF83 +28001 clk cpu0 IT (27965) 0009d454:00001009d454_NS d65f03c0 O EL0t_n : RET +28002 clk cpu0 IT (27966) 00097e28:000010097e28_NS 97ffe090 O EL0t_n : BL 0x90068 +28002 clk cpu0 R X30 0000000000097E2C +28002 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0002 INVAL 0x00001009c040 +28002 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0002 ALLOC 0x000010090040_NS +28002 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 001a ALLOC 0x000010090040_NS +28003 clk cpu0 IT (27967) 00090068:000010090068_NS d65f03c0 O EL0t_n : RET +28004 clk cpu0 IT (27968) 00097e2c:000010097e2c_NS f84107fe O EL0t_n : LDR x30,[sp],#0x10 +28004 clk cpu0 MR8 030458e0:0000008458e0_NS 00000000_0009d868 +28004 clk cpu0 R SP_EL0 00000000030458F0 +28004 clk cpu0 R X30 000000000009D868 +28005 clk cpu0 IT (27969) 00097e30:000010097e30_NS 17ffe0a8 O EL0t_n : B 0x900d0 +28005 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0007 INVAL 0x0000100380c0_NS +28005 clk cpu0 CACHE cpu.cpu0.l1icache LINE 0007 ALLOC 0x0000100900c0_NS +28005 clk cpu0 CACHE Validation_ARMAEMv9AMPCT.cpu.l2_cache LINE 0033 ALLOC 0x0000100900c0_NS +28006 clk cpu0 IT (27970) 000900d0:0000100900d0_NS d0030c28 O EL0t_n : ADRP x8,0x62160d0 +28006 clk cpu0 R X8 0000000006216000 +28007 clk cpu0 IT (27971) 000900d4:0000100900d4_NS f9407108 O EL0t_n : LDR x8,[x8,#0xe0] +28007 clk cpu0 MR8 062160e0:0000152160e0_NS 00000000_13000000 +28007 clk cpu0 R X8 0000000013000000 +28008 clk cpu0 IT (27972) 000900d8:0000100900d8_NS 52800089 O EL0t_n : MOV w9,#4 +28008 clk cpu0 R X9 0000000000000004 diff --git a/decoder/tests/snapshots-ete/002-ack_test_scr/trace.ini b/decoder/tests/snapshots-ete/002-ack_test_scr/trace.ini new file mode 100644 index 000000000000..ea6642325904 --- /dev/null +++ b/decoder/tests/snapshots-ete/002-ack_test_scr/trace.ini @@ -0,0 +1,15 @@ +[trace_buffers] +buffers=buffer1, + +[buffer1] +name=ETB_1 +file=session1.bin +format=source_data + + +[source_buffers] +ETE_0_s1=ETB_1 + +[core_trace_sources] +cpu_0=ETE_0_s1 + diff --git a/decoder/tests/snapshots-ete/ete-bc-instr/ETE_0_s1.ini b/decoder/tests/snapshots-ete/ete-bc-instr/ETE_0_s1.ini new file mode 100644 index 000000000000..62661c101024 --- /dev/null +++ b/decoder/tests/snapshots-ete/ete-bc-instr/ETE_0_s1.ini @@ -0,0 +1,15 @@ +[device] +name=ETE_0_s1 +class=trace_source +type=ETE + + +[regs] +TRCCONFIGR=0x8001 +TRCTRACEIDR=0x1 +TRCDEVARCH=0x47715a13 +TRCIDR0=0x2881cea1 +TRCIDR1=0x4100fff0 +TRCIDR2=0xd0001088 +TRCIDR8=0x0 + diff --git a/decoder/tests/snapshots-ete/ete-bc-instr/bindir_64/OTHERS_exec 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+address=0x01000000 +length=0x1e988 + +[dump3] +file=bindir_64/VAL_NON_DET_CODE_exec +address=0x00010000 +length=0x1f318 + +[dump4] +file=bindir_64/TEST_NON_DET_CODE_exec +address=0x00050000 +length=0x48 + diff --git a/decoder/tests/snapshots-ete/ete-bc-instr/session1.bin b/decoder/tests/snapshots-ete/ete-bc-instr/session1.bin new file mode 100644 index 0000000000000000000000000000000000000000..47dc6e6484b4b15ed8661468b4726723d121ac3b GIT binary patch literal 33 fcmZQzfP)4`29_qJTpk9)+q2Z9*%)rm$^mi!Kb-~Y literal 0 HcmV?d00001 diff --git a/decoder/tests/snapshots-ete/ete-bc-instr/snapshot.ini b/decoder/tests/snapshots-ete/ete-bc-instr/snapshot.ini new file mode 100644 index 000000000000..fae7cd11a4b4 --- /dev/null +++ b/decoder/tests/snapshots-ete/ete-bc-instr/snapshot.ini @@ -0,0 +1,11 @@ +[snapshot] +version=1.0 +description=checker_metadata.ini + +[device_list] +device0=cpu_0.ini +device1=ETE_0_s1.ini + +[trace] +metadata=trace.ini + diff --git a/decoder/tests/snapshots-ete/ete-bc-instr/trace.ini b/decoder/tests/snapshots-ete/ete-bc-instr/trace.ini new file mode 100644 index 000000000000..7e95dab0e5b0 --- /dev/null +++ b/decoder/tests/snapshots-ete/ete-bc-instr/trace.ini @@ -0,0 +1,15 @@ +[trace_buffers] +buffers=buffer1 + +[buffer1] +name=ETB_1 +file=session1.bin +format=source_data + + +[source_buffers] +ETE_0_s1=ETB_1 + +[core_trace_sources] +cpu_0=ETE_0_s1 + diff --git a/decoder/tests/snapshots-ete/ete-ite-instr/ETE_0_s1.ini b/decoder/tests/snapshots-ete/ete-ite-instr/ETE_0_s1.ini new file mode 100644 index 000000000000..23947f3904cc --- /dev/null +++ b/decoder/tests/snapshots-ete/ete-ite-instr/ETE_0_s1.ini @@ -0,0 +1,15 @@ +[device] +name=ETE_0_s1 +class=trace_source +type=ETE + + +[regs] +TRCCONFIGR=0x8001 +TRCTRACEIDR=0x1 +TRCDEVARCH=0x47735a13 +TRCIDR0=0x28c1cea1 +TRCIDR1=0x4100fff0 +TRCIDR2=0xd0001088 +TRCIDR8=0x0 + diff --git a/decoder/tests/snapshots-ete/ete-ite-instr/ETE_0_s2.ini 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a/decoder/tests/snapshots-ete/ete_spec_3/snapshot.ini b/decoder/tests/snapshots-ete/ete_spec_3/snapshot.ini new file mode 100644 index 000000000000..fae7cd11a4b4 --- /dev/null +++ b/decoder/tests/snapshots-ete/ete_spec_3/snapshot.ini @@ -0,0 +1,11 @@ +[snapshot] +version=1.0 +description=checker_metadata.ini + +[device_list] +device0=cpu_0.ini +device1=ETE_0_s1.ini + +[trace] +metadata=trace.ini + diff --git a/decoder/tests/snapshots-ete/ete_spec_3/trace.ini b/decoder/tests/snapshots-ete/ete_spec_3/trace.ini new file mode 100644 index 000000000000..7e95dab0e5b0 --- /dev/null +++ b/decoder/tests/snapshots-ete/ete_spec_3/trace.ini @@ -0,0 +1,15 @@ +[trace_buffers] +buffers=buffer1 + +[buffer1] +name=ETB_1 +file=session1.bin +format=source_data + + +[source_buffers] +ETE_0_s1=ETB_1 + +[core_trace_sources] +cpu_0=ETE_0_s1 + diff --git a/decoder/tests/snapshots-ete/event_test/ETE_0_s1.ini b/decoder/tests/snapshots-ete/event_test/ETE_0_s1.ini new file mode 100644 index 000000000000..7ab3d254c836 --- /dev/null +++ b/decoder/tests/snapshots-ete/event_test/ETE_0_s1.ini @@ -0,0 +1,15 @@ +[device] +name=ETE_0_s1 +class=trace_source +type=ETE + + +[regs] +TRCCONFIGR=0x0 +TRCTRACEIDR=0x1 +TRCDEVARCH=0x47705a13 +TRCIDR0=0x2801cea1 +TRCIDR1=0x4100fff0 +TRCIDR2=0xd0001088 +TRCIDR8=0x0 + diff --git a/decoder/tests/snapshots-ete/event_test/cpu_0.ini b/decoder/tests/snapshots-ete/event_test/cpu_0.ini new file mode 100644 index 000000000000..bbb5f35240ce --- /dev/null +++ b/decoder/tests/snapshots-ete/event_test/cpu_0.ini @@ -0,0 +1,22 @@ +[device] +name=cpu_0 +class=core +type=Cortex-A53 + +[regs] +PC(size:64)=0xFFFFFFC000081000 +SP(size:64)=0 +SCTLR_EL1=0x1007 +CPSR=0x1C5 + + +[dump1] +file=bindir_64/OTHERS_exec +address=0x00010000 +length=0x67460 + +[dump2] +file=bindir_64/VAL_NON_DET_CODE_exec +address=0x00090000 +length=0x18a5c + diff --git a/decoder/tests/snapshots-ete/event_test/session1.bin b/decoder/tests/snapshots-ete/event_test/session1.bin new file mode 100644 index 0000000000000000000000000000000000000000..9d7082721bd549a81c24aadffb1617b7326575de GIT binary patch literal 13 McmZQzfP;oY00Djg@&Et; literal 0 HcmV?d00001 diff --git a/decoder/tests/snapshots-ete/event_test/snapshot.ini b/decoder/tests/snapshots-ete/event_test/snapshot.ini new file mode 100644 index 000000000000..fae7cd11a4b4 --- /dev/null +++ b/decoder/tests/snapshots-ete/event_test/snapshot.ini @@ -0,0 +1,11 @@ +[snapshot] +version=1.0 +description=checker_metadata.ini + +[device_list] +device0=cpu_0.ini +device1=ETE_0_s1.ini + +[trace] +metadata=trace.ini + diff --git a/decoder/tests/snapshots-ete/event_test/trace.ini b/decoder/tests/snapshots-ete/event_test/trace.ini new file mode 100644 index 000000000000..68a318ae17ad --- /dev/null +++ b/decoder/tests/snapshots-ete/event_test/trace.ini @@ -0,0 +1,14 @@ +[trace_buffers] +buffers=buffer1 + +[buffer1] +name=ETB_1 +file=session1.bin +format=source_data + +[source_buffers] +ETE_0_s1=ETB_1 + +[core_trace_sources] +cpu_0=ETE_0_s1 + diff --git a/decoder/tests/snapshots-ete/infrastructure/README-TEST-NOTES.txt b/decoder/tests/snapshots-ete/infrastructure/README-TEST-NOTES.txt new file mode 100644 index 000000000000..afacd231a92f --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/README-TEST-NOTES.txt @@ -0,0 +1,9 @@ +ETE Test Snapshot. +------------------ + +This test snapshot is an ETMv4 sourced trace snapshot, with the device files altered +from ETMv4 to ETE. This is to test the infrastructure of creating and running an ETE +decoder, not the new packet types etc. + +Running this on the library may will cause errors on ERET packets unless the debug define +is set to ignore EREI (ETE_TRACE_ERET_AS_IGNORE in trc_pkt_proc_etmv4i_impl.cpp) diff --git a/decoder/tests/snapshots-ete/infrastructure/cpu_0.ini b/decoder/tests/snapshots-ete/infrastructure/cpu_0.ini new file mode 100644 index 000000000000..957ccd4739ec --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/cpu_0.ini @@ -0,0 +1,16 @@ +[device] +name=cpu_0 +class=core +type=Cortex-A53 + +[regs] +PC(size:64)=0xFFFFFFC000081000 +SP(size:64)=0 +SCTLR_EL1=0x1007 +CPSR=0x1C5 + +[dump1] +file=kernel_dump.bin +address=0xFFFFFFC000081000 +length=0x00050000 + diff --git a/decoder/tests/snapshots-ete/infrastructure/cpu_1.ini b/decoder/tests/snapshots-ete/infrastructure/cpu_1.ini new file mode 100644 index 000000000000..fc9e7c9ea7dd --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/cpu_1.ini @@ -0,0 +1,16 @@ +[device] +name=cpu_1 +class=core +type=Cortex-A53 + +[regs] +PC(size:64)=0xFFFFFFC000081000 +SP(size:64)=0 +SCTLR_EL1=0x1007 +CPSR=0x1C5 + +[dump1] +file=kernel_dump.bin +address=0xFFFFFFC000081000 +length=0x00050000 + diff --git a/decoder/tests/snapshots-ete/infrastructure/cpu_2.ini b/decoder/tests/snapshots-ete/infrastructure/cpu_2.ini new file mode 100644 index 000000000000..d2e7f20e6883 --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/cpu_2.ini @@ -0,0 +1,16 @@ +[device] +name=cpu_2 +class=core +type=Cortex-A53 + +[regs] +PC(size:64)=0xFFFFFFC000081000 +SP(size:64)=0 +SCTLR_EL1=0x1007 +CPSR=0x1C5 + +[dump1] +file=kernel_dump.bin +address=0xFFFFFFC000081000 +length=0x00050000 + diff --git a/decoder/tests/snapshots-ete/infrastructure/cpu_3.ini b/decoder/tests/snapshots-ete/infrastructure/cpu_3.ini new file mode 100644 index 000000000000..ef5a6f11a049 --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/cpu_3.ini @@ -0,0 +1,16 @@ +[device] +name=cpu_3 +class=core +type=Cortex-A53 + +[regs] +PC(size:64)=0xFFFFFFC000081000 +SP(size:64)=0 +SCTLR_EL1=0x1007 +CPSR=0x1C5 + +[dump1] +file=kernel_dump.bin +address=0xFFFFFFC000081000 +length=0x00050000 + diff --git a/decoder/tests/snapshots-ete/infrastructure/cpu_4.ini b/decoder/tests/snapshots-ete/infrastructure/cpu_4.ini new file mode 100644 index 000000000000..66221127fb6f --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/cpu_4.ini @@ -0,0 +1,16 @@ +[device] +name=cpu_4 +class=core +type=Cortex-A57 + +[regs] +PC(size:64)=0xFFFFFFC000081000 +SP(size:64)=0 +SCTLR_EL1=0x1007 +CPSR=0x1C5 + +[dump1] +file=kernel_dump.bin +address=0xFFFFFFC000081000 +length=0x00050000 + diff --git a/decoder/tests/snapshots-ete/infrastructure/cpu_5.ini b/decoder/tests/snapshots-ete/infrastructure/cpu_5.ini new file mode 100644 index 000000000000..78a877766f4c --- /dev/null +++ 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000000000000..492d8660e7c8 --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/device_10.ini @@ -0,0 +1,14 @@ +[device] +name=ETM_4 +class=trace_source +type=ETE + +[regs] +TRCCONFIGR(0x004)=0x000000C1 +TRCTRACEIDR(0x010)=0x00000014 +TRCAUTHSTATUS(0x3EE)=0x000000CC +TRCIDR0(0x078)=0x28000EA1 +TRCIDR1(0x079)=0x4100FFF0 +TRCIDR2(0x07A)=0x00000488 +TRCIDR8(0x060)=0x00000000 +TRCDEVARCH(0x3EF)=0x47705A13 \ No newline at end of file diff --git a/decoder/tests/snapshots-ete/infrastructure/device_11.ini b/decoder/tests/snapshots-ete/infrastructure/device_11.ini new file mode 100644 index 000000000000..66858574c4bc --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/device_11.ini @@ -0,0 +1,14 @@ +[device] +name=ETM_5 +class=trace_source +type=ETE + +[regs] +TRCCONFIGR(0x004)=0x000000C1 +TRCTRACEIDR(0x010)=0x00000015 +TRCAUTHSTATUS(0x3EE)=0x000000CC +TRCIDR0(0x078)=0x28000EA1 +TRCIDR1(0x079)=0x4100FFF0 +TRCIDR2(0x07A)=0x00000488 +TRCIDR8(0x060)=0x00000000 +TRCDEVARCH(0x3EF)=0x47705A13 diff --git a/decoder/tests/snapshots-ete/infrastructure/device_12.ini b/decoder/tests/snapshots-ete/infrastructure/device_12.ini new file mode 100644 index 000000000000..b6cc8a3492cc --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/device_12.ini @@ -0,0 +1,7 @@ +[device] +name=STM_12 +class=trace_source +type=STM + +[regs] +STMTCSR(0x3A0)=0x00A00005 diff --git a/decoder/tests/snapshots-ete/infrastructure/device_6.ini b/decoder/tests/snapshots-ete/infrastructure/device_6.ini new file mode 100644 index 000000000000..002a84a4a586 --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/device_6.ini @@ -0,0 +1,14 @@ +[device] +name=ETM_0 +class=trace_source +type=ETE + +[regs] +TRCCONFIGR(0x004)=0x000000C1 +TRCTRACEIDR(0x010)=0x00000010 +TRCAUTHSTATUS(0x3EE)=0x000000CC +TRCIDR0(0x078)=0x28000EA1 +TRCIDR1(0x079)=0x4100FFF0 +TRCIDR2(0x07A)=0x00000488 +TRCIDR8(0x060)=0x00000000 +TRCDEVARCH(0x3EF)=0x47705A13 \ No newline at end of file diff --git a/decoder/tests/snapshots-ete/infrastructure/device_7.ini b/decoder/tests/snapshots-ete/infrastructure/device_7.ini new file mode 100644 index 000000000000..ab640d3f7ff0 --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/device_7.ini @@ -0,0 +1,15 @@ +[device] +name=ETM_1 +class=trace_source +type=ETE + +[regs] +TRCCONFIGR(0x004)=0x000000C1 +TRCTRACEIDR(0x010)=0x00000011 +TRCAUTHSTATUS(0x3EE)=0x000000CC +TRCIDR0(0x078)=0x28000EA1 +TRCIDR1(0x079)=0x4100FFF0 +TRCIDR2(0x07A)=0x00000488 +TRCIDR8(0x060)=0x00000000 +TRCDEVARCH(0x3EF)=0x47705A13 + diff --git a/decoder/tests/snapshots-ete/infrastructure/device_8.ini b/decoder/tests/snapshots-ete/infrastructure/device_8.ini new file mode 100644 index 000000000000..b7c34b17f10d --- /dev/null +++ b/decoder/tests/snapshots-ete/infrastructure/device_8.ini @@ -0,0 +1,14 @@ +[device] +name=ETM_2 +class=trace_source +type=ETE + +[regs] +TRCCONFIGR(0x004)=0x000000C1 +TRCTRACEIDR(0x010)=0x00000012 +TRCAUTHSTATUS(0x3EE)=0x000000CC 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literal 3140 zcma);ZERCj7{|}O9eraXo!hc*otCO0_<}RWWSB5nXT)TYz~V42&WydtfCeLiA`;nd znZ%?u(U>sh3zUR}o!G==f+ohy&csM!jNXmm8;&7iz#V*;%&`rv|8t(*a+=b`4>xIh zPk-lm{?Gq;&Z%NYr>fZ3c+O9SSXJz5^<&ssNVKpkOD>k!^*pZ#5Ill?b;=O3i1N5{s3#tQDjYn z)yvAjD&TFqiM8*rVFthofEAFeKv#r6Jj%boQOX{z4tk%pw|Bd^SB zLgwY-+N%`HuKwKG+nyX$@`|h?mWjMtq4yQ!HNiZ{%f%Brh_(7t!}KFBKl1X+y!;uB zK2ccllce{rf(5;2q~7IH?{I`z1E=!G^|8WAHU~M&)UHT+iZS6S#>cl3Yt2`NS%tXN zzI%5;?^IXXckG+R^={3hcNqKL_P0;!EqaY=@0EGgGm)3hjZTWC=KK78+o9wYsm=Dc z+P9&0V$GYmKC)}KQDMbXR6CjhokfmGD8O^g(6p;RU_JEooo-rN#AjbA?Kun zYt0nP%=P?vxs<#jjpQSHp4>oQjFn0sC7vhNz;u33-ayRu42WMN)^E_L8~zq^&h})u ziCAlH<$BVt-MGR^ULha+4%QLO6VWTSr^XwJ^|>C+ISYOSL(G%UULNXW4;kj=7l-6p#?!)w`p*KXz&Zy>sE63-xrNo-WjLRCmRy@qZsn zn8kQPtaL=|)wUjIg(te`SrJD(cRDK)_`lst(RKPr1Lmk&TQNsFi<>uN`#5%hom(>i0 zs9!C#^unYBi0!5v*owf7wD$>NRbp4i_{(mRHC40|!`#iTFTf-ic^;^jT2#{AM3i8Yw9 zs~7i$^MCl_*xoWZV})ivK(jF|`wr3e1Zi-1Z8T^8*!p`F{Uewk9+{1~xXo{Q$3X~SU1zJ&I+{+g4?8W@kJeM8NQ*Wh^PoqN+z?iI2IxC@9o zj$H$xTQ3v374YyXitmff`E~18a*ZtXIkA>z-Mz*iB-Y-pXx_WmA%zt`N3+uIO>sx5 zmv) +Idx:47; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13fcc:[0x13fd0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:47; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13ff4:[0x13ff8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:47; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x141e0:[0x141f0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:48; ID:0; [0x9a 0x00 0x04 0x04 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00040800 (31:0); +Idx:53; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:53; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40800:[0x4081c] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:53; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:54; ID:0; [0x9a 0x4b 0x39 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A732C (31:0); +Idx:59; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:61; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:59; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:61; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa732c:[0xa7330] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:62; ID:0; [0x9a 0x25 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000094 (31:0); +Idx:67; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:67; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000094:[0x10000a0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:67; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10000a8:[0x10000ac] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:67; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10000b8:[0x10000c0] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:67; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b090:[0x9b0a4] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:67; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:68; ID:0; [0x9a 0x29 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B0A4 (31:0); +Idx:73; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:73; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0a4:[0x9b0ac] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:73; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:74; ID:0; [0x95 0x2b ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B0AC (31:0) ~[0xAC] +Idx:76; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:76; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0ac:[0x9b0d4] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:76; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0d4:[0x9b0f0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:76; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b158:[0x9b168] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:76; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b168:[0x9b180] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:76; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:77; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:77; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:77; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:77; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:78; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:81; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:81; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:81; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:81; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:81; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:82; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:82; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:82; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:82; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:83; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:83; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:84; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:84; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:84; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:84; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:85; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:85; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:86; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:91; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:91; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:92; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:97; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:97; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:97; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:97; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:98; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:98; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:98; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:98; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:99; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:99; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:99; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:99; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:100; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:101; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:102; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:103; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:104; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:107; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:108; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:109; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:111; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:112; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:113; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:114; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:115; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:116; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:117; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:118; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:119; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:120; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:122; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:123; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:124; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:125; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:127; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:128; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:129; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:130; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:131; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:132; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:133; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:134; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:135; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:136; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:137; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:140; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:141; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:143; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:144; ID:0; [0x95 0xe0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B180 (31:0) ~[0x1B180] +Idx:147; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b180:[0x9b1a8] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b124:[0x9b144] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:148; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:148; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b144:[0x9b158] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:149; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:150; ID:0; [0x9a 0x30 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010000C0 (31:0); +Idx:155; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:155; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10000c0:[0x1000108] num_i(18) last_sz(4) (ISA=A64) E BR b+link ) +Idx:155; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:155; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:156; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:156; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:156; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:156; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:157; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:162; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:163; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:164; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:165; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:166; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:167; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:172; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:172; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:173; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:178; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:179; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:180; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:181; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:182; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:183; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:184; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:185; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:186; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:187; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:188; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:189; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:190; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:191; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:192; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:193; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:194; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:195; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:195; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:195; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:195; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:196; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:197; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:198; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:199; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:200; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:201; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:202; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:203; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:204; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:205; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:206; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:207; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:208; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:209; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:210; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:211; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:212; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:213; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:214; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:215; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:216; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:217; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:218; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:219; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:220; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:221; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:222; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:223; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:224; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:225; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:226; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:227; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:228; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:229; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:230; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:231; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:232; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:233; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:234; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:235; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:236; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:237; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:238; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:239; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:240; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:241; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:242; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:243; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:244; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:245; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:246; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:247; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:248; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:251; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:252; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:254; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:255; ID:0; [0x9a 0x42 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000108 (31:0); +Idx:260; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:262; ID:0; [0x95 0x4a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000128 (31:0) ~[0x128] +Idx:260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000108:[0x1000128] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:260; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000128; excep num (0x03) ) +Idx:264; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:266; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:271; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:264; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:272; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:273; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:278; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:279; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:281; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:282; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:287; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:288; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:290; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:291; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:292; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:293; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:298; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:299; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:299; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:300; ID:0; [0x9a 0x4b 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100012C (31:0); +Idx:305; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:307; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:305; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100012c:[0x1000170] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:308; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:313; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:314; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:316; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:317; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:318; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:319; ID:0; [0x9a 0x5c 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000170 (31:0); +Idx:324; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000170:[0x10001bc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:325; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:326; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:327; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:328; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:329; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:330; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:331; ID:0; [0x9a 0x6f 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010001BC (31:0); +Idx:336; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10001bc:[0x1000208] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:337; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:338; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:339; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:340; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:341; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:342; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:342; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:343; ID:0; [0x9a 0x02 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000208 (31:0); +Idx:348; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000208:[0x100024c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:349; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:350; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:350; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:350; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:351; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:352; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:353; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:354; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:354; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:355; ID:0; [0x9a 0x13 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100024C (31:0); +Idx:360; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100024c:[0x1000278] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:361; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:362; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:367; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:368; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:369; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:370; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:370; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:370; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:370; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:371; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:371; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:372; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:377; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:378; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:383; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:384; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:385; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:386; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:387; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:388; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:389; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:390; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:391; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:392; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:393; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:394; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:395; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:396; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:397; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:398; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:399; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:400; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:401; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:402; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:403; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:404; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:405; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:406; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:407; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:408; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:409; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:410; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:411; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:412; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:413; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:414; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:415; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:416; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:417; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:418; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:419; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:420; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:421; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:422; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:423; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:424; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:425; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:426; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:427; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:428; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:429; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:430; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:431; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:432; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:433; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:434; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:435; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:436; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:437; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:438; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:439; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:440; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:441; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:442; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:443; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:444; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:445; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:446; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:447; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:448; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:449; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:450; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:451; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:452; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:453; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:456; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:457; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:459; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:460; ID:0; [0x9a 0x1e 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000278 (31:0); +Idx:465; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:467; ID:0; [0x95 0x26 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000298 (31:0) ~[0x98] +Idx:465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000278:[0x1000298] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:465; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000298; excep num (0x03) ) +Idx:469; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:471; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:476; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:469; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:477; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:478; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:483; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:484; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:486; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:487; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:492; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:493; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:495; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:496; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:497; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:498; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:503; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:504; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:504; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:505; ID:0; [0x9a 0x27 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100029C (31:0); +Idx:510; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:512; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:510; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100029c:[0x10002e0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:513; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:518; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:519; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:521; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:522; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:523; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:524; ID:0; [0x9a 0x38 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010002E0 (31:0); +Idx:529; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10002e0:[0x100032c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:530; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:531; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:532; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:533; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:534; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:535; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:536; ID:0; [0x9a 0x4b 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100032C (31:0); +Idx:541; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100032c:[0x1000378] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:542; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:543; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:544; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:545; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:546; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:547; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:547; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:548; ID:0; [0x9a 0x5e 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000378 (31:0); +Idx:553; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000378:[0x10003bc] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:554; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:555; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:556; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:557; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:558; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:559; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:560; ID:0; [0x9a 0x6f 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010003BC (31:0); +Idx:565; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10003bc:[0x10003e8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:566; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:567; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:572; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:573; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:574; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:575; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:576; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:577; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:582; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:583; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:588; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:589; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:590; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:591; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:591; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:591; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:591; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:592; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:593; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:594; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:595; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:595; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:595; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:595; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:596; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:597; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:598; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:599; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:600; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:601; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:602; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:603; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:604; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:605; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:606; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:607; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:608; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:609; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:610; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:611; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:612; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:613; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:614; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:615; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:616; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:617; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:618; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:619; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:620; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:621; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:622; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:623; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:624; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:625; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:626; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:627; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:628; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:629; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:630; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:631; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:632; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:633; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:634; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:635; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:636; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:637; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:638; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:639; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:640; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:641; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:642; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:643; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:644; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:645; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:646; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:647; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:648; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:649; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:650; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:651; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:652; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:653; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:654; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:655; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:656; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:657; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:658; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:661; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:662; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:664; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:665; ID:0; [0x9a 0x7a 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010003E8 (31:0); +Idx:670; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:672; ID:0; [0x95 0x82 0x02 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000408 (31:0) ~[0x408] +Idx:670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10003e8:[0x1000408] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:670; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000408; excep num (0x03) ) +Idx:675; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:677; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:682; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:675; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:683; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:684; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:689; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:690; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:692; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:693; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:698; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:699; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:701; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:702; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:703; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:704; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:709; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:710; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:710; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:711; ID:0; [0x9a 0x03 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100040C (31:0); +Idx:716; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:718; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:716; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100040c:[0x1000450] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:719; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:724; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:725; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:727; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:728; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:729; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:730; ID:0; [0x9a 0x14 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000450 (31:0); +Idx:735; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000450:[0x100049c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:736; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:737; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:737; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:737; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:738; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:739; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:740; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:740; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:741; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:741; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:742; ID:0; [0x9a 0x27 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100049C (31:0); +Idx:747; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:747; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100049c:[0x10004e8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:747; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:747; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:748; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:749; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:750; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:751; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:751; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:751; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:751; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:752; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:752; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:753; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:753; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:754; ID:0; [0x9a 0x3a 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010004E8 (31:0); +Idx:759; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10004e8:[0x100052c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:760; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:761; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:762; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:763; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:764; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:764; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:765; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:766; ID:0; [0x9a 0x4b 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100052C (31:0); +Idx:771; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100052c:[0x1000558] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:772; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:773; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:778; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:779; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:780; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:781; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:782; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:782; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:783; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:788; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:788; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:789; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:794; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:795; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:796; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:797; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:798; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:799; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:800; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:801; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:802; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:803; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:804; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:805; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:806; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:807; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:808; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:809; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:810; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:811; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:812; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:813; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:814; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:815; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:816; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:817; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:818; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:819; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:820; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:821; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:822; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:823; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:824; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:825; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:826; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:827; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:828; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:829; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:830; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:831; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:832; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:833; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:834; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:835; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:836; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:837; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:838; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:839; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:840; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:841; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:842; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:843; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:844; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:845; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:846; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:847; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:848; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:849; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:850; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:851; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:852; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:853; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:854; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:855; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:856; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:857; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:858; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:859; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:860; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:861; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:862; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:863; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:864; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:865; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:868; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:869; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:871; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:872; ID:0; [0x9a 0x56 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000558 (31:0); +Idx:877; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:879; ID:0; [0x95 0x5e ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000578 (31:0) ~[0x178] +Idx:877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000558:[0x1000578] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:877; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000578; excep num (0x03) ) +Idx:881; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:883; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:888; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:881; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:889; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:890; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:895; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:896; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:898; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:899; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:904; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:905; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:907; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:908; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:908; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:909; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:909; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:910; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:915; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:916; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:916; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:917; ID:0; [0x9a 0x5f 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100057C (31:0); +Idx:922; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:924; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:922; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100057c:[0x10005c0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:925; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:930; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:931; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:933; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:934; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:934; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:935; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:935; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:936; ID:0; [0x9a 0x70 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010005C0 (31:0); +Idx:941; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10005c0:[0x100060c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:942; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:943; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:944; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:945; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:946; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:947; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:947; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:948; ID:0; [0x9a 0x03 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100060C (31:0); +Idx:953; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100060c:[0x1000658] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:954; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:955; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:956; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:957; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:958; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:959; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:960; ID:0; [0x9a 0x16 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000658 (31:0); +Idx:965; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000658:[0x100069c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:966; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:967; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:968; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:969; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:970; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:971; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:972; ID:0; [0x9a 0x27 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100069C (31:0); +Idx:977; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100069c:[0x10006c8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:978; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:979; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:984; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:985; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:986; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:987; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:988; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:989; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:994; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:994; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:995; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1000; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1001; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1001; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1001; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1001; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1002; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1003; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1004; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1005; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1005; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1005; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1005; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1006; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1007; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1008; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1008; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1008; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1008; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1009; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1009; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1009; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1009; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1010; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1011; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1012; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1013; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1014; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1015; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1016; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1017; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1018; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1019; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1020; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1021; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1022; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1023; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1024; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1025; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1025; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1025; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1025; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1026; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1027; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1028; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1029; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1030; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1031; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1032; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1033; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1034; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1035; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1036; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1037; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1038; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1039; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1040; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1041; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1042; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1043; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1044; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1045; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1046; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1047; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1048; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1049; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1050; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1051; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1052; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1053; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1054; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1055; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1056; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1057; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1058; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1059; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1060; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1061; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1062; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1063; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1064; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1065; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1066; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1067; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1068; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1069; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1070; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1071; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1074; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1075; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1077; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1078; ID:0; [0x9a 0x32 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010006C8 (31:0); +Idx:1083; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1085; ID:0; [0x95 0x3a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010006E8 (31:0) ~[0xE8] +Idx:1083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10006c8:[0x10006e8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1083; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10006e8; excep num (0x03) ) +Idx:1087; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1089; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1094; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1087; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1095; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1096; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1101; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1102; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1104; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1105; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1110; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1111; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1113; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1114; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1115; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1116; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1121; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1122; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1122; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1123; ID:0; [0x9a 0x3b 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010006EC (31:0); +Idx:1128; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1130; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1128; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10006ec:[0x1000730] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1131; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1136; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1137; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1139; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1140; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1141; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1142; ID:0; [0x9a 0x4c 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000730 (31:0); +Idx:1147; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000730:[0x100077c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1148; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1149; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1150; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1151; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1151; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1151; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1151; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1152; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1152; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1153; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1153; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1154; ID:0; [0x9a 0x5f 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100077C (31:0); +Idx:1159; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100077c:[0x10007c8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1160; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1161; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1162; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1163; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1164; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1164; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1165; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1166; ID:0; [0x9a 0x72 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010007C8 (31:0); +Idx:1171; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10007c8:[0x100080c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1172; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1173; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1174; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1175; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1176; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1177; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1177; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1178; ID:0; [0x9a 0x03 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100080C (31:0); +Idx:1183; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100080c:[0x1000838] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1184; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1185; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1190; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1191; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1192; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1193; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1194; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1195; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1200; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1201; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1206; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1207; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1208; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1209; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1210; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1211; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1212; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1213; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1214; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1215; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1216; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1217; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1218; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1219; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1220; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1221; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1222; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1223; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1224; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1225; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1226; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1227; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1228; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1229; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1230; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1231; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1232; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1233; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1234; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1235; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1236; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1237; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1238; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1239; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1240; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1241; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1242; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1243; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1244; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1245; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1246; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1247; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1248; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1249; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1250; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1251; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1252; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1253; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1254; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1255; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1256; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1257; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1258; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1259; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1260; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1261; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1262; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1263; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1264; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1265; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1266; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1267; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1268; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1269; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1270; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1271; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1272; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1273; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1274; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1275; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1276; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1277; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1280; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1281; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1283; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1284; ID:0; [0x9a 0x0e 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000838 (31:0); +Idx:1289; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1291; ID:0; [0x95 0x16 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000858 (31:0) ~[0x58] +Idx:1289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000838:[0x1000858] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1289; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000858; excep num (0x03) ) +Idx:1293; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1295; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1300; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1293; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1301; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1302; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1307; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1308; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1310; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1311; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1316; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1317; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1319; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1319; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1319; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1319; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1320; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1321; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1321; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1322; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1327; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1327; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1328; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1328; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1329; ID:0; [0x9a 0x17 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100085C (31:0); +Idx:1334; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1336; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1334; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100085c:[0x10008a0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1337; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1342; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1342; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1342; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1343; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1345; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1346; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1346; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1347; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1348; ID:0; [0x9a 0x28 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010008A0 (31:0); +Idx:1353; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10008a0:[0x10008ec] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1354; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1355; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1355; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1355; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1356; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1357; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1357; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1357; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1357; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1358; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1358; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1359; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1359; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1360; ID:0; [0x9a 0x3b 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010008EC (31:0); +Idx:1365; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10008ec:[0x1000938] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1366; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1367; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1368; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1369; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1370; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1370; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1371; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1371; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1372; ID:0; [0x9a 0x4e 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000938 (31:0); +Idx:1377; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000938:[0x100097c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1378; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1379; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1380; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1381; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1382; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1383; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1384; ID:0; [0x9a 0x5f 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100097C (31:0); +Idx:1389; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100097c:[0x10009a8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1390; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1391; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1396; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1397; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1398; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1399; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1400; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1401; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1406; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1407; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1412; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1413; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1414; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1415; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1416; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1417; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1418; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1419; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1420; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1421; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1422; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1423; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1424; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1425; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1426; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1427; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1428; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1429; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1430; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1431; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1432; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1433; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1434; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1435; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1436; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1437; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1438; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1439; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1440; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1441; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1442; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1443; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1444; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1445; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1446; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1447; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1448; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1449; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1450; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1451; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1452; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1453; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1454; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1455; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1456; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1457; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1458; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1459; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1460; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1461; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1462; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1463; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1464; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1465; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1466; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1467; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1468; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1469; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1470; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1471; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1472; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1473; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1474; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1475; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1476; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1477; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1478; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1479; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1480; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1481; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1482; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1483; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1484; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1487; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1488; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1490; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1491; ID:0; [0x9a 0x6a 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010009A8 (31:0); +Idx:1496; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1498; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010009C8 (31:0) ~[0x1C8] +Idx:1496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10009a8:[0x10009c8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1496; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10009c8; excep num (0x03) ) +Idx:1500; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1502; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1507; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1500; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1508; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1509; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1514; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1515; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1517; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1518; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1523; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1524; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1526; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1527; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1528; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1529; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1534; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1535; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1535; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1536; ID:0; [0x9a 0x73 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010009CC (31:0); +Idx:1541; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1543; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1541; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10009cc:[0x1000a10] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1544; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1549; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1550; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1552; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1553; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1554; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1555; ID:0; [0x9a 0x04 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000A10 (31:0); +Idx:1560; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000a10:[0x1000a5c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1561; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1562; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1563; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1564; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1565; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1566; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1567; ID:0; [0x9a 0x17 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000A5C (31:0); +Idx:1572; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000a5c:[0x1000aa8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1573; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1574; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1575; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1576; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1577; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1578; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1579; ID:0; [0x9a 0x2a 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000AA8 (31:0); +Idx:1584; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000aa8:[0x1000aec] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1585; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1586; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1587; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1588; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1589; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1590; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1591; ID:0; [0x9a 0x3b 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000AEC (31:0); +Idx:1596; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000aec:[0x1000b18] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1597; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1598; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1603; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1604; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1605; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1606; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1607; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1608; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1613; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1614; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1619; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1620; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1621; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1622; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1623; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1624; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1625; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1626; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1627; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1628; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1629; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1630; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1631; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1632; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1633; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1634; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1635; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1636; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1637; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1638; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1639; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1640; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1641; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1642; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1643; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1644; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1645; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1646; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1647; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1648; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1649; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1650; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1651; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1652; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1653; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1654; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1655; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1656; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1657; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1658; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1659; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1660; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1661; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1662; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1663; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1664; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1665; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1666; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1667; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1668; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1669; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1670; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1671; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1672; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1673; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1674; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1675; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1676; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1677; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1678; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1679; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1680; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1681; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1682; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1683; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1684; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1685; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1686; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1687; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1688; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1689; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1690; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1691; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1694; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1695; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1697; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1698; ID:0; [0x9a 0x46 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000B18 (31:0); +Idx:1703; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1705; ID:0; [0x95 0x4e ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000B38 (31:0) ~[0x138] +Idx:1703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000b18:[0x1000b38] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1703; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000b38; excep num (0x03) ) +Idx:1707; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1709; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1714; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1707; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1715; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1716; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1721; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1722; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1724; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1725; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1730; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1730; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1730; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1731; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1733; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1734; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1735; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1736; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1741; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1741; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1742; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1742; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1742; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1742; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1743; ID:0; [0x9a 0x4f 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000B3C (31:0); +Idx:1748; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1750; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1748; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000b3c:[0x1000b80] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1751; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1756; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1756; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1756; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1757; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1759; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1760; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1760; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1761; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1762; ID:0; [0x9a 0x60 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000B80 (31:0); +Idx:1767; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000b80:[0x1000bcc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1768; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1769; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1770; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1771; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1772; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1773; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1774; ID:0; [0x9a 0x73 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000BCC (31:0); +Idx:1779; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000bcc:[0x1000c18] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1780; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1781; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1782; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1783; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1783; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1783; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1783; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1784; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1784; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1785; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1786; ID:0; [0x9a 0x06 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000C18 (31:0); +Idx:1791; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000c18:[0x1000c5c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1792; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1793; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1794; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1795; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1796; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1797; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1798; ID:0; [0x9a 0x17 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000C5C (31:0); +Idx:1803; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000c5c:[0x1000c88] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1804; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1805; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1810; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1811; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1812; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1813; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1814; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1815; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1820; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1821; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1826; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1827; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1828; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1829; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1830; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1831; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1832; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1833; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1834; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1835; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1836; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1837; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1838; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1839; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1840; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1841; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1842; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1843; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1844; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1845; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1846; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1847; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1848; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1849; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1850; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1851; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1852; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1853; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1854; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1855; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1856; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1857; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1858; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1859; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1860; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1861; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1862; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1863; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1864; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1865; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1866; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1867; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1868; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1869; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1870; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1871; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1872; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1873; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1874; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1875; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1876; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1877; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1878; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1879; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1880; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1881; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1882; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1883; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1884; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1885; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1886; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1887; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1888; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1889; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1890; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1891; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1892; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1893; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1894; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1895; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1896; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1897; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1898; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1901; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1902; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1904; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1905; ID:0; [0x9a 0x22 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000C88 (31:0); +Idx:1910; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1912; ID:0; [0x95 0x2a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000CA8 (31:0) ~[0xA8] +Idx:1910; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000c88:[0x1000ca8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1910; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000ca8; excep num (0x03) ) +Idx:1914; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1916; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1921; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1914; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1922; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1923; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1928; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1929; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1931; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1932; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1937; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1938; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1940; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1941; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1942; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1943; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1948; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1948; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1949; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1949; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1950; ID:0; [0x9a 0x2b 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000CAC (31:0); +Idx:1955; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1957; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1955; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:1957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000cac:[0x1000cf0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1958; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1963; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1964; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1966; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1967; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1968; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1969; ID:0; [0x9a 0x3c 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000CF0 (31:0); +Idx:1974; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000cf0:[0x1000d3c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1975; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1976; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1977; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1978; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1979; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1979; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1980; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1981; ID:0; [0x9a 0x4f 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000D3C (31:0); +Idx:1986; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000d3c:[0x1000d88] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1987; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1988; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1989; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1990; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1991; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1992; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1992; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1993; ID:0; [0x9a 0x62 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000D88 (31:0); +Idx:1998; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000d88:[0x1000dcc] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1999; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2000; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2001; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2002; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2003; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2004; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2005; ID:0; [0x9a 0x73 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000DCC (31:0); +Idx:2010; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000dcc:[0x1000df8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2011; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2012; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2017; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2018; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2019; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2020; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2021; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2022; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2027; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2028; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2033; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2034; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2035; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2036; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2037; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2038; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2039; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2040; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2041; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2042; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2043; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2044; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2045; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2046; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2047; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2048; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2049; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2050; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2051; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2052; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2053; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2054; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2055; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2056; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2057; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2058; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2059; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2060; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2061; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2062; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2063; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2064; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2065; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2066; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2067; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2068; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2069; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2070; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2071; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2072; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2073; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2074; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2075; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2076; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2077; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2078; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2079; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2080; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2081; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2082; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2083; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2084; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2085; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2086; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2087; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2088; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2089; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2090; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2091; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2092; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2093; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2094; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2095; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2096; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2097; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2098; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2099; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2100; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2101; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2102; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2103; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2104; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2105; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2108; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2109; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2111; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2112; ID:0; [0x9a 0x7e 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000DF8 (31:0); +Idx:2117; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2119; ID:0; [0x95 0x86 0x07 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000E18 (31:0) ~[0xE18] +Idx:2117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000df8:[0x1000e18] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2117; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000e18; excep num (0x03) ) +Idx:2122; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2124; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2129; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2122; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2130; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2131; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2136; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2137; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2139; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2140; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2145; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2146; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2148; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2148; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2148; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2148; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2149; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2150; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2150; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2151; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2156; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2156; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2157; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2157; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2157; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2157; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2158; ID:0; [0x9a 0x07 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000E1C (31:0); +Idx:2163; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2165; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2163; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000e1c:[0x1000e60] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2166; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2171; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2172; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2174; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2174; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2174; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2174; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2175; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2176; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2177; ID:0; [0x9a 0x18 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000E60 (31:0); +Idx:2182; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000e60:[0x1000eac] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2183; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2184; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2185; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2186; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2187; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2188; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2189; ID:0; [0x9a 0x2b 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000EAC (31:0); +Idx:2194; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000eac:[0x1000ef8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2195; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2196; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2197; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2198; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2199; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2200; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2201; ID:0; [0x9a 0x3e 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000EF8 (31:0); +Idx:2206; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000ef8:[0x1000f3c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2207; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2208; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2209; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2210; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2211; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2212; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2213; ID:0; [0x9a 0x4f 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000F3C (31:0); +Idx:2218; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000f3c:[0x1000f68] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2219; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2220; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2225; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2226; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2227; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2228; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2229; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2230; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2235; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2236; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2241; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2242; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2243; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2244; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2245; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2246; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2247; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2248; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2249; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2250; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2251; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2252; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2253; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2254; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2255; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2256; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2257; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2258; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2259; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2260; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2261; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2262; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2263; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2264; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2265; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2266; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2267; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2268; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2269; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2270; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2271; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2272; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2273; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2274; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2275; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2276; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2277; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2278; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2279; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2280; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2281; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2282; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2283; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2284; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2284; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2284; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2284; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2285; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2285; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2285; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2285; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2286; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2287; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2288; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2288; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2288; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2288; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2289; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2290; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2291; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2292; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2293; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2294; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2295; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2296; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2297; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2298; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2299; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2300; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2301; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2302; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2302; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2302; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2302; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2303; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2304; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2305; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2306; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2307; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2308; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2309; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2310; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2311; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2312; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2313; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2314; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2317; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2318; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2320; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2321; ID:0; [0x9a 0x5a 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000F68 (31:0); +Idx:2326; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2328; ID:0; [0x95 0x62 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000F88 (31:0) ~[0x188] +Idx:2326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000f68:[0x1000f88] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2326; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000f88; excep num (0x03) ) +Idx:2330; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2332; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2337; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2330; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2337; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2337; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2337; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2338; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2339; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2344; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2345; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2347; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2347; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2348; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2353; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2354; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2356; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2357; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2357; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2358; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2358; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2359; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2364; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2364; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2365; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2365; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2366; ID:0; [0x9a 0x63 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000F8C (31:0); +Idx:2371; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2373; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2371; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2373; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000f8c:[0x1000fd0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2373; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2373; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2374; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2379; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2380; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2382; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2383; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2384; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2385; ID:0; [0x9a 0x74 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000FD0 (31:0); +Idx:2390; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000fd0:[0x100101c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2391; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2392; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2393; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2394; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2395; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2396; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2397; ID:0; [0x9a 0x07 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100101C (31:0); +Idx:2402; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100101c:[0x1001068] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2403; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2404; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2405; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2406; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2407; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2408; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2409; ID:0; [0x9a 0x1a 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001068 (31:0); +Idx:2414; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001068:[0x10010ac] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2415; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2416; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2417; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2418; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2419; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2420; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2421; ID:0; [0x9a 0x2b 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010010AC (31:0); +Idx:2426; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10010ac:[0x10010d8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2427; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2428; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2433; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2434; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2435; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2436; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2437; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2438; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2443; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2444; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2449; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2450; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2451; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2452; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2453; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2454; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2455; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2456; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2457; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2458; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2459; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2460; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2461; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2462; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2463; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2464; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2465; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2466; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2467; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2468; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2469; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2470; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2471; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2472; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2473; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2474; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2475; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2476; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2477; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2478; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2479; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2480; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2481; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2482; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2483; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2484; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2485; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2486; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2487; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2488; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2489; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2490; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2491; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2492; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2493; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2494; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2495; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2496; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2497; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2498; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2499; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2500; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2501; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2502; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2503; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2504; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2505; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2506; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2507; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2508; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2509; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2510; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2511; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2512; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2513; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2514; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2515; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2516; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2517; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2518; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2519; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2520; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2521; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2522; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2525; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2526; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2528; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2529; ID:0; [0x9a 0x36 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010010D8 (31:0); +Idx:2534; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2536; ID:0; [0x95 0x3e ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010010F8 (31:0) ~[0xF8] +Idx:2534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10010d8:[0x10010f8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2534; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10010f8; excep num (0x03) ) +Idx:2538; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2540; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2545; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2538; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2546; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2547; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2552; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2553; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2555; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2556; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2561; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2562; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2564; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2565; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2566; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2567; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2572; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2573; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2573; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2574; ID:0; [0x9a 0x3f 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010010FC (31:0); +Idx:2579; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2581; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2579; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10010fc:[0x1001140] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2582; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2587; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2587; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2587; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2588; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2590; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2591; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2591; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2592; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2593; ID:0; [0x9a 0x50 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001140 (31:0); +Idx:2598; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001140:[0x100118c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2599; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2600; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2601; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2602; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2603; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2604; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2605; ID:0; [0x9a 0x63 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100118C (31:0); +Idx:2610; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100118c:[0x10011d8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2611; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2612; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2613; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2614; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2615; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2616; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2617; ID:0; [0x9a 0x76 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010011D8 (31:0); +Idx:2622; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10011d8:[0x100121c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2623; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2624; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2625; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2626; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2627; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2628; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2629; ID:0; [0x9a 0x07 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100121C (31:0); +Idx:2634; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100121c:[0x1001248] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2635; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2636; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2641; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2642; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2643; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2644; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2645; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2646; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2651; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2652; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2657; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2658; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2659; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2660; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2661; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2662; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2663; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2664; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2665; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2666; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2667; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2668; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2669; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2670; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2671; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2672; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2673; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2674; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2675; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2676; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2677; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2678; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2679; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2680; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2681; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2682; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2683; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2684; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2685; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2686; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2687; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2688; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2689; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2690; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2691; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2692; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2693; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2694; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2695; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2696; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2697; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2698; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2699; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2700; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2701; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2702; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2703; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2704; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2705; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2706; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2707; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2707; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2707; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2707; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2708; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2709; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2710; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2711; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2712; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2713; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2714; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2715; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2716; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2717; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2718; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2719; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2720; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2721; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2722; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2723; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2724; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2725; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2726; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2727; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2728; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2729; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2730; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2733; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2734; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2736; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2736; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2737; ID:0; [0x9a 0x12 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001248 (31:0); +Idx:2742; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2744; ID:0; [0x95 0x1a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001268 (31:0) ~[0x68] +Idx:2742; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001248:[0x1001268] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2742; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001268; excep num (0x03) ) +Idx:2746; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2748; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2753; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2746; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2753; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2753; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2753; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2754; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2754; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2755; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2760; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2760; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2760; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2760; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2761; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2763; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2764; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2769; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2770; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2772; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2773; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2774; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2775; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2780; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2781; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2781; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2782; ID:0; [0x9a 0x1b 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100126C (31:0); +Idx:2787; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2789; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2787; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100126c:[0x10012b0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2790; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2795; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2796; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2798; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2799; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2800; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2801; ID:0; [0x9a 0x2c 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010012B0 (31:0); +Idx:2806; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10012b0:[0x10012fc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2807; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2808; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2809; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2810; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2811; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2812; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2813; ID:0; [0x9a 0x3f 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010012FC (31:0); +Idx:2818; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10012fc:[0x1001348] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2819; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2820; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2821; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2822; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2823; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2824; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2825; ID:0; [0x9a 0x52 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001348 (31:0); +Idx:2830; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001348:[0x100138c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2831; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2832; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2833; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2834; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2835; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2836; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2837; ID:0; [0x9a 0x63 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100138C (31:0); +Idx:2842; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100138c:[0x10013b8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2843; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2844; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2849; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2850; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2851; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2852; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2853; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2854; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2859; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2860; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2865; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2866; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2867; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2868; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2869; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2870; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2871; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2872; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2873; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2874; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2875; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2876; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2877; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2878; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2879; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2880; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2881; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2882; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2883; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2884; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2885; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2886; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2887; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2888; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2889; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2890; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2891; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2892; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2893; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2894; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2895; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2896; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2897; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2898; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2899; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2899; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2899; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2899; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2900; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2901; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2902; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2903; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2904; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2905; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2906; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2907; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2908; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2908; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2908; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2908; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2909; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2909; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2909; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2909; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2910; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2910; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2910; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2910; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2911; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2912; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2913; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2913; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2913; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2913; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2914; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2914; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2914; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2914; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2915; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2916; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2917; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2918; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2919; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2920; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2921; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2922; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2923; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2924; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2925; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2926; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2927; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2928; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2929; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2930; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2931; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2932; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2933; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2934; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2934; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2934; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2934; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2935; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2935; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2935; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2935; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2936; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2937; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2938; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2941; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2942; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2944; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2945; ID:0; [0x9a 0x6e 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010013B8 (31:0); +Idx:2950; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2952; ID:0; [0x95 0x76 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010013D8 (31:0) ~[0x1D8] +Idx:2950; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10013b8:[0x10013d8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2950; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10013d8; excep num (0x03) ) +Idx:2954; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2956; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2961; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2954; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2962; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2963; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2968; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2969; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2971; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2972; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2977; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2978; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2980; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2981; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2982; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2983; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2988; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2989; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2989; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2990; ID:0; [0x9a 0x77 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010013DC (31:0); +Idx:2995; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2997; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2995; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:2997; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10013dc:[0x1001420] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2997; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2997; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2998; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:3003; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3004; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3006; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3007; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3008; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3008; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3009; ID:0; [0x9a 0x08 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001420 (31:0); +Idx:3014; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001420:[0x100146c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3015; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3016; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3017; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3018; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3019; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3020; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3021; ID:0; [0x9a 0x1b 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100146C (31:0); +Idx:3026; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100146c:[0x10014b8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3027; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3028; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3029; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3030; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3031; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3032; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3033; ID:0; [0x9a 0x2e 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010014B8 (31:0); +Idx:3038; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10014b8:[0x10014fc] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3039; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3040; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3041; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3042; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3043; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3044; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3045; ID:0; [0x9a 0x3f 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010014FC (31:0); +Idx:3050; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10014fc:[0x1001528] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3051; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3052; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:3057; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3058; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3059; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3060; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3061; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3062; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3067; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3068; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3073; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3074; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3075; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3076; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3077; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3078; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3079; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3080; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3081; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3082; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3083; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3084; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3085; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3086; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3087; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3088; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3089; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3090; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3091; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3092; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3093; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3094; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3095; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3096; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3097; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3098; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3099; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3100; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3101; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3102; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3103; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3104; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3105; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3105; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3105; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3105; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3106; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3107; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3108; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3109; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3110; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3111; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3112; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3113; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3114; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3115; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3116; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3117; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3118; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3119; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3120; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3121; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3122; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3123; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3124; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3125; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3126; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3127; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3128; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3129; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3130; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3131; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3132; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3133; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3134; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3135; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3136; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3137; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3138; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3139; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3140; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3141; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3142; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3142; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3142; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3142; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3143; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3144; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3144; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3144; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3144; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3145; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3146; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3149; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3150; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3152; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3152; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3153; ID:0; [0x9a 0x4a 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001528 (31:0); +Idx:3158; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:3160; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001548 (31:0) ~[0x148] +Idx:3158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001528:[0x1001548] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:3158; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001548; excep num (0x03) ) +Idx:3162; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:3164; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:3169; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3162; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3170; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:3171; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:3176; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3177; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:3179; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3180; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:3185; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3186; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3188; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3189; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3190; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3191; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:3196; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:3196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3197; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:3197; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:3198; ID:0; [0x9a 0x53 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100154C (31:0); +Idx:3203; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:3205; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3203; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100154c:[0x1001590] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3206; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:3211; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3212; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3214; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3215; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3216; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3217; ID:0; [0x9a 0x64 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001590 (31:0); +Idx:3222; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001590:[0x10015dc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3223; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3224; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3225; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3226; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3227; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3228; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3229; ID:0; [0x9a 0x77 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010015DC (31:0); +Idx:3234; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10015dc:[0x1001628] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3235; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3236; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3237; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3238; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3239; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3240; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3241; ID:0; [0x9a 0x0a 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001628 (31:0); +Idx:3246; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001628:[0x100166c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3247; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3248; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3249; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3250; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3251; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3252; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3253; ID:0; [0x9a 0x1b 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100166C (31:0); +Idx:3258; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100166c:[0x1001674] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad40:[0x9ad5c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3259; ID:0; [0x9a 0x57 0x56 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009AD5C (31:0); +Idx:3264; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad5c:[0x9ad64] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3265; ID:0; [0x95 0x59 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AD64 (31:0) ~[0x164] +Idx:3267; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad64:[0x9ad84] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad84:[0x9ada4] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ada4:[0x9adcc] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3268; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9adcc:[0x9adec] num_i(8) last_sz(4) (ISA=A64) E iBR ) +Idx:3269; ID:0; [0x95 0xb5 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AED4 (31:0) ~[0x1AED4] +Idx:3272; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aed4:[0x9aedc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aedc:[0x9aef4] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3273; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3274; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3277; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3278; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3279; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3280; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3281; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3282; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3287; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3288; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3293; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3294; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3295; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3296; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3297; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3298; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3299; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3300; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3301; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3304; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3305; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3306; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3308; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3309; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3310; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3311; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3312; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3313; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3314; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3315; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3315; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3315; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3315; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3316; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3317; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3318; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3319; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3321; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3321; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3321; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3321; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3321; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3322; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3323; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3323; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3323; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3323; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3324; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3326; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3327; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3327; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3327; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3327; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3328; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3329; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3330; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3331; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3331; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3331; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3331; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3332; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3333; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3333; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3333; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3333; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3333; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3334; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3335; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3338; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3339; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3341; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3342; ID:0; [0x95 0xbd 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AEF4 (31:0) ~[0x1AEF4] +Idx:3345; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aef4:[0x9aef8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9af10:[0x9af40] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afa0:[0x9afb0] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3346; ID:0; [0x95 0x6c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AFB0 (31:0) ~[0x1B0] +Idx:3348; ID:0; [0xdd ]; I_ATOM_F4 : Atom format 4.; NNNN +Idx:3348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb0:[0x9afb8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb8:[0x9afbc] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afbc:[0x9afc4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afc4:[0x9afcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3349; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:3349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afcc:[0x9afdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b01c:[0x9b028] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3350; ID:0; [0x95 0x8a 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B028 (31:0) ~[0x1B028] +Idx:3353; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b028:[0x9b044] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3354; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3354; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3355; ID:0; [0x9a 0x1d 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001674 (31:0); +Idx:3360; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001674:[0x100167c] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3361; ID:0; [0x9a 0x0a 0x43 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00098628 (31:0); +Idx:3366; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3367; ID:0; [0x9a 0x1f 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100167C (31:0); +Idx:3372; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3372; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100167c:[0x1001688] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3372; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001688:[0x1001690] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3372; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b090:[0x9b0a4] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3372; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3373; ID:0; [0x9a 0x29 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B0A4 (31:0); +Idx:3378; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0a4:[0x9b0ac] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3379; ID:0; [0x95 0x2b ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B0AC (31:0) ~[0xAC] +Idx:3381; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:3381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0ac:[0x9b0d4] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0d4:[0x9b0f0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b158:[0x9b168] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b168:[0x9b180] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3382; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3383; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3386; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3387; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3388; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3389; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3390; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3391; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3396; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3397; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3402; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3403; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3404; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3405; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3406; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3407; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3408; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3409; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3412; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3413; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3414; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3416; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3417; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3418; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3419; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3420; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3421; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3422; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3423; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3424; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3425; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3427; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3428; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3429; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3430; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3432; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3433; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3434; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3435; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3436; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3437; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3438; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3439; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3440; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3441; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3442; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3445; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3446; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3448; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3449; ID:0; [0x95 0xe0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B180 (31:0) ~[0x1B180] +Idx:3452; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:3452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b180:[0x9b1a8] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b124:[0x9b144] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:3452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3453; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b144:[0x9b158] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3454; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3455; ID:0; [0x9a 0x24 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001690 (31:0); +Idx:3460; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:3462; ID:0; [0x95 0x36 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010016D8 (31:0) ~[0xD8] +Idx:3460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001690:[0x10016d8] num_i(18) last_sz(4) (ISA=A64) E --- ) +Idx:3460; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10016d8; excep num (0x02) ) +Idx:3464; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:3466; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:3471; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3464; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3472; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:3473; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:3478; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3479; ID:0; [0xd9 ]; I_ATOM_F2 : Atom format 2.; EN +Idx:3479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3480; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:3482; ID:0; [0x95 0xdf 0x87 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00010F7C (31:0) ~[0x10F7C] +Idx:3480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f60:[0x10f7c] num_i(7) last_sz(4) (ISA=A64) E --- ) +Idx:3480; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10f7c; excep num (0x02) ) +Idx:3485; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:3486; ID:0; [0x82 0x36 0x0b 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????010016D8 (31:0); Ctxt: AArch64,EL0, NS; +Idx:3492; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3485; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:3486; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10016d8:[0x1001704] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3493; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3494; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:3499; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3500; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3501; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3502; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3503; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3504; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3509; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3510; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3515; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3516; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3517; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3518; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3519; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3520; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3521; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3522; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3523; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3524; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3525; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3526; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3527; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3528; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3529; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3530; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3531; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3532; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3532; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3532; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3532; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3533; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3534; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3535; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3536; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3536; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3536; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3536; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3537; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3538; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3538; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3538; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3538; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3539; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3540; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3540; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3540; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3540; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3541; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3542; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3543; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3544; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3544; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3544; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3544; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3545; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3546; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3547; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3547; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3547; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3547; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3548; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3549; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3550; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3550; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3550; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3550; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3551; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3552; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3553; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3554; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3555; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3556; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3557; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3558; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3559; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3560; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3561; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3562; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3563; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3564; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3565; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3566; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3567; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3568; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3569; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3570; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3571; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3572; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3573; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3574; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3575; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3576; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3577; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3578; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3579; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3579; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3579; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3579; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3580; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3581; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3582; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3583; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3583; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3583; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3583; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3584; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3585; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3585; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3585; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3585; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3586; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3587; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3590; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3591; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3593; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3594; ID:0; [0x9a 0x41 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001704 (31:0); +Idx:3599; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:3601; ID:0; [0x95 0x49 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001724 (31:0) ~[0x124] +Idx:3599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001704:[0x1001724] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:3599; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001724; excep num (0x03) ) +Idx:3603; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:3604; ID:0; [0x82 0x4a 0x0b 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????01001728 (31:0); Ctxt: AArch64,EL0, NS; +Idx:3610; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3603; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:3604; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001728:[0x100176c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3611; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:3616; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3617; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3619; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3620; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3621; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3622; ID:0; [0x9a 0x5b 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100176C (31:0); +Idx:3627; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100176c:[0x10017b8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3628; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3629; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3630; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3631; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3632; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3633; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3634; ID:0; [0x9a 0x6e 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010017B8 (31:0); +Idx:3639; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10017b8:[0x1001804] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3640; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3641; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3642; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3643; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3644; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3645; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3646; ID:0; [0x9a 0x01 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001804 (31:0); +Idx:3651; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001804:[0x1001848] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3652; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3653; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3654; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3655; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3656; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3657; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3658; ID:0; [0x9a 0x12 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001848 (31:0); +Idx:3663; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001848:[0x1001850] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad40:[0x9ad5c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3664; ID:0; [0x9a 0x57 0x56 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009AD5C (31:0); +Idx:3669; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad5c:[0x9ad64] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3670; ID:0; [0x95 0x59 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AD64 (31:0) ~[0x164] +Idx:3672; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad64:[0x9ad84] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad84:[0x9ada4] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ada4:[0x9adcc] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3673; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9adcc:[0x9adec] num_i(8) last_sz(4) (ISA=A64) E iBR ) +Idx:3674; ID:0; [0x95 0xb5 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AED4 (31:0) ~[0x1AED4] +Idx:3677; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aed4:[0x9aedc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aedc:[0x9aef4] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3678; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3679; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3682; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3683; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3684; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3685; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3686; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3687; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3692; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3693; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3698; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3699; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3700; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3701; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3702; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3703; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3704; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3705; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3706; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3709; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3710; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3711; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3713; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3714; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3715; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3716; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3717; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3718; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3719; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3720; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3721; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3722; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3723; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3724; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3726; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3727; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3728; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3729; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3731; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3732; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3732; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3732; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3732; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3733; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3734; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3735; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3736; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3736; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3736; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3736; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3737; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3737; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3737; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3737; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3738; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3739; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3740; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3743; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3744; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3746; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3747; ID:0; [0x95 0xbd 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AEF4 (31:0) ~[0x1AEF4] +Idx:3750; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aef4:[0x9aef8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9af10:[0x9af40] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afa0:[0x9afb0] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3751; ID:0; [0x95 0x6c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AFB0 (31:0) ~[0x1B0] +Idx:3753; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3753; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb0:[0x9afb8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3753; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb8:[0x9afbc] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3753; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afbc:[0x9afc4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3754; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:3754; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afc4:[0x9afcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3754; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b01c:[0x9b028] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3754; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3754; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3755; ID:0; [0x95 0x8a 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B028 (31:0) ~[0x1B028] +Idx:3758; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3758; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b028:[0x9b044] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3759; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3760; ID:0; [0x9a 0x14 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001850 (31:0); +Idx:3765; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:3765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001850:[0x1001854] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001878:[0x1001880] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3766; ID:0; [0x9a 0x0a 0x43 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00098628 (31:0); +Idx:3771; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3771; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3772; ID:0; [0x9a 0x20 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001880 (31:0); +Idx:3777; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001880:[0x100188c] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100188c:[0x1001894] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3778; ID:0; [0x91 ]; I_ADDR_MATCH : Exact Address Match., [1]; Addr=0x????????00098628 (31:0); +Idx:3779; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3780; ID:0; [0x9a 0x25 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001894 (31:0); +Idx:3785; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001894:[0x10018a0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10018a0:[0x10018a8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b090:[0x9b0a4] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3786; ID:0; [0x9a 0x29 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B0A4 (31:0); +Idx:3791; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0a4:[0x9b0ac] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3792; ID:0; [0x95 0x2b ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B0AC (31:0) ~[0xAC] +Idx:3794; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:3794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0ac:[0x9b0d4] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0d4:[0x9b0f0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b158:[0x9b168] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b168:[0x9b180] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3795; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3796; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3799; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3800; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3801; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3802; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3803; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3804; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3809; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3810; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3815; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3816; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3817; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3818; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3819; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3820; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3821; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3822; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3825; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3826; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3827; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3829; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3830; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3831; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3832; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3833; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3834; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3835; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3836; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3837; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3838; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3840; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3841; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3842; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3843; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3845; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3846; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3847; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3848; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3849; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3850; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3851; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3852; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3853; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3854; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3855; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3858; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3859; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3861; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3862; ID:0; [0x95 0xe0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B180 (31:0) ~[0x1B180] +Idx:3865; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:3865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b180:[0x9b1a8] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b124:[0x9b144] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:3865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3866; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b144:[0x9b158] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3867; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3868; ID:0; [0x9a 0x2a 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010018A8 (31:0); +Idx:3873; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:3875; ID:0; [0x95 0x3c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010018F0 (31:0) ~[0xF0] +Idx:3873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10018a8:[0x10018f0] num_i(18) last_sz(4) (ISA=A64) E --- ) +Idx:3873; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10018f0; excep num (0x02) ) +Idx:3877; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:3879; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:3884; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3877; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3885; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:3886; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:3891; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3892; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:3892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3893; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:3895; ID:0; [0x95 0xed 0x87 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00010FB4 (31:0) ~[0x10FB4] +Idx:3893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb0:[0x10fb4] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:3893; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10fb4; excep num (0x03) ) +Idx:3898; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:3899; ID:0; [0x82 0x6d 0x07 0x01 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????00010FB4 (31:0); Ctxt: AArch64,EL1, NS; +Idx:3905; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3898; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:3899; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb4:[0x10fb8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fe0:[0x10ff4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3906; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1132c:[0x1134c] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:3906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3907; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11384:[0x11390] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:3907; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:3908; ID:0; [0x9a 0x3c 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010018F0 (31:0); +Idx:3913; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:3915; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3913; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:3915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10018f0:[0x100191c] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3916; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3917; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:3922; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3923; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3924; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3925; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3926; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3927; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3932; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3933; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3938; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3938; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3938; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3938; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3939; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3940; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3941; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3942; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3943; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3944; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3945; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3946; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3947; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3947; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3947; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3947; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3948; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3948; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3948; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3948; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3949; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3950; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3950; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3950; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3950; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3951; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3952; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3952; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3952; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3952; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3953; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3954; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3954; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3954; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3954; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3955; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3956; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3956; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3956; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3956; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3957; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3958; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3959; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3960; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3960; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3960; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3960; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3961; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3962; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3963; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3964; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3965; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3966; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3967; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3968; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3969; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3970; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3971; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3972; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3973; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3974; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3975; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3975; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3975; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3975; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3976; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3977; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3978; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3979; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3979; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3979; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3979; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3980; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3981; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3982; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3983; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3984; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3985; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3986; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3987; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3988; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3989; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3990; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3991; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3992; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3992; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3992; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3992; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3993; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3993; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3993; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3993; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3994; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3994; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3994; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3994; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3995; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3995; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3995; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3995; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3995; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3996; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3997; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:4000; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4001; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:4003; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4004; ID:0; [0x9a 0x47 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100191C (31:0); +Idx:4009; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4011; ID:0; [0x95 0x4f ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0100193C (31:0) ~[0x13C] +Idx:4009; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100191c:[0x100193c] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:4009; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x100193c; excep num (0x03) ) +Idx:4013; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4015; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4020; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4013; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4021; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4022; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4027; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4028; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:4030; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4031; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4036; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4037; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4039; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4040; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4041; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4042; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:4047; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:4047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4048; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4048; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4049; ID:0; [0x9a 0x50 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001940 (31:0); +Idx:4054; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:4056; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4054; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001940:[0x1001984] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4057; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4062; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4063; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4065; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4066; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4067; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4068; ID:0; [0x9a 0x61 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001984 (31:0); +Idx:4073; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001984:[0x10019d0] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4074; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4075; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4076; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4077; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4078; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4079; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4080; ID:0; [0x9a 0x74 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010019D0 (31:0); +Idx:4085; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10019d0:[0x1001a1c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4086; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4087; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4088; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4089; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4090; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4091; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4092; ID:0; [0x9a 0x07 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001A1C (31:0); +Idx:4097; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a1c:[0x1001a60] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4098; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4099; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4100; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4101; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4102; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4103; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4104; ID:0; [0x9a 0x18 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001A60 (31:0); +Idx:4109; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4111; ID:0; [0x95 0x1c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001A70 (31:0) ~[0x70] +Idx:4109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a60:[0x1001a70] num_i(4) last_sz(4) (ISA=A64) E --- ) +Idx:4109; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001a70; excep num (0x02) ) +Idx:4113; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4115; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4120; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4113; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4121; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4122; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4127; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4128; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:4128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4129; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4131; ID:0; [0x95 0xed 0x87 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00010FB4 (31:0) ~[0x10FB4] +Idx:4129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb0:[0x10fb4] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4129; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10fb4; excep num (0x03) ) +Idx:4134; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4135; ID:0; [0x82 0x6d 0x07 0x01 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????00010FB4 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4141; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4134; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4135; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb4:[0x10fb8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fe0:[0x10ff4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4142; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4142; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1132c:[0x1134c] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:4142; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4142; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4143; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11384:[0x11390] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4143; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4144; ID:0; [0x9a 0x1c 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001A70 (31:0); +Idx:4149; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:4151; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4153; ID:0; [0x95 0x1d ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001A74 (31:0) ~[0x74] +Idx:4149; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4151; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a70:[0x1001a74] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4151; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001a74; excep num (0x02) ) +Idx:4155; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4157; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4162; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4155; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4163; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4163; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4164; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4169; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4170; ID:0; [0xc3 ]; I_ATOM_F6 : Atom format 6.; EEEEEEE +Idx:4170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb8:[0x10fc4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4171; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:4173; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4174; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4179; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4180; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4182; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4183; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4184; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4185; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:4190; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4191; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4193; ID:0; [0x95 0x60 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011380 (31:0) ~[0x180] +Idx:4191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1137c:[0x11380] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4191; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x11380; excep num (0x03) ) +Idx:4195; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4196; ID:0; [0x82 0x1d 0x0d 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????01001A74 (31:0); Ctxt: AArch64,EL0, NS; +Idx:4202; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4195; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4196; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a74:[0x1001aa0] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4203; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4204; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:4209; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4210; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4211; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:4212; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4213; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4214; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:4219; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4220; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:4225; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4226; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4227; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4228; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4229; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4230; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4231; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4232; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4233; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4234; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4235; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4236; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4237; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4238; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4239; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4240; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4241; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4242; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4243; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4244; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4245; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4246; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4247; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4248; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4249; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4250; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4251; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4252; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4253; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4254; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4255; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4256; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4257; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4258; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4259; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4260; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4261; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4262; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4263; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4264; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4265; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4266; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4267; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4268; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4269; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4270; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4271; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4272; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4273; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4274; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4275; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4276; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4277; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4278; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4279; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4280; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4281; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4282; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4283; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4284; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:4287; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4288; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:4290; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4291; ID:0; [0x9a 0x28 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001AA0 (31:0); +Idx:4296; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4298; ID:0; [0x95 0x30 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001AC0 (31:0) ~[0xC0] +Idx:4296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001aa0:[0x1001ac0] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:4296; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001ac0; excep num (0x03) ) +Idx:4300; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4301; ID:0; [0x82 0x31 0x0d 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????01001AC4 (31:0); Ctxt: AArch64,EL0, NS; +Idx:4307; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4300; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4301; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001ac4:[0x1001b08] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4308; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4313; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4314; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4316; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4317; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4318; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4319; ID:0; [0x9a 0x42 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001B08 (31:0); +Idx:4324; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001b08:[0x1001b54] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4325; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4326; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4327; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4328; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4329; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4330; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4331; ID:0; [0x9a 0x55 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001B54 (31:0); +Idx:4336; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001b54:[0x1001ba0] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4337; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4338; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4339; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4340; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4341; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4342; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4342; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4343; ID:0; [0x9a 0x68 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BA0 (31:0); +Idx:4348; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001ba0:[0x1001be4] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4349; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4350; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4350; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4350; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4351; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4352; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4353; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4354; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4354; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4355; ID:0; [0x9a 0x79 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BE4 (31:0); +Idx:4360; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4362; ID:0; [0x95 0x7a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001BE8 (31:0) ~[0x1E8] +Idx:4360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001be4:[0x1001be8] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4360; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001be8; excep num (0x02) ) +Idx:4364; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4366; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4371; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4364; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4371; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4371; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4371; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4372; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4372; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4372; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4373; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4378; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4379; ID:0; [0xc3 ]; I_ATOM_F6 : Atom format 6.; EEEEEEE +Idx:4379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb8:[0x10fc4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4380; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:4382; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4383; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4388; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4389; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4391; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4392; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4393; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4394; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:4399; ID:0; [0xdf ]; I_ATOM_F4 : Atom format 4.; ENEN +Idx:4399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11384:[0x11390] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4400; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4402; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????000113A0 (31:0) ~[0x1A0] +Idx:4400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11390:[0x113a0] num_i(4) last_sz(4) (ISA=A64) E --- ) +Idx:4400; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x113a0; excep num (0x03) ) +Idx:4404; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4405; ID:0; [0x82 0x68 0x09 0x01 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????000113A0 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4411; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4404; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4405; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4411; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4412; ID:0; [0x9a 0x7a 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BE8 (31:0); +Idx:4417; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:4419; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4417; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001be8:[0x1001bf0] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad40:[0x9ad5c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4420; ID:0; [0x9a 0x57 0x56 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009AD5C (31:0); +Idx:4425; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad5c:[0x9ad64] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4426; ID:0; [0x95 0x59 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AD64 (31:0) ~[0x164] +Idx:4428; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad64:[0x9ad84] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:4428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad84:[0x9ada4] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:4428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ada4:[0x9adcc] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4429; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9adcc:[0x9adec] num_i(8) last_sz(4) (ISA=A64) E iBR ) +Idx:4430; ID:0; [0x95 0xb5 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AED4 (31:0) ~[0x1AED4] +Idx:4433; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:4433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aed4:[0x9aedc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aedc:[0x9aef4] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4434; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4435; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:4438; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4439; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4440; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:4441; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4442; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4443; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:4448; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4449; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:4454; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4455; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4456; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4457; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4458; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4459; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4460; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4461; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:4462; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:4465; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4466; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4467; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:4469; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4470; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4471; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4472; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4473; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4474; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4475; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4476; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4477; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:4477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4478; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4479; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:4480; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:4482; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4483; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:4483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4484; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4485; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:4487; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4488; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4489; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4490; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4491; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4492; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4493; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4494; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4495; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4496; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:4499; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4500; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:4502; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4503; ID:0; [0x95 0xbd 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AEF4 (31:0) ~[0x1AEF4] +Idx:4506; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aef4:[0x9aef8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9af10:[0x9af40] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afa0:[0x9afb0] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4507; ID:0; [0x95 0x6c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AFB0 (31:0) ~[0x1B0] +Idx:4509; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb0:[0x9afb8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb8:[0x9afbc] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afbc:[0x9afc4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4510; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afc4:[0x9afcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b01c:[0x9b028] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4511; ID:0; [0x95 0x8a 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B028 (31:0) ~[0x1B028] +Idx:4514; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b028:[0x9b044] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4515; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4516; ID:0; [0x9a 0x7c 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BF0 (31:0); +Idx:4521; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:4521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001bf0:[0x1001bf4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001c18:[0x1001c1c] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001c40:[0x1001c44] num_i(1) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d7cc:[0x9d7d8] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4522; ID:0; [0x9a 0x76 0x6b 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009D7D8 (31:0); +Idx:4527; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d7d8:[0x9d80c] num_i(13) last_sz(4) (ISA=A64) E BR ) +Idx:4527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d854:[0x9d86c] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d398:[0x9d3ac] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4528; ID:0; [0x95 0xeb 0xe9 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D3AC (31:0) ~[0x1D3AC] +Idx:4531; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3ac:[0x9d3d4] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4532; ID:0; [0x95 0x75 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D3D4 (31:0) ~[0x1D4] +Idx:4534; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3d4:[0x9d3ec] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3ec:[0x9d408] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d408:[0x9d42c] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4535; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3f8:[0x9d408] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d42c:[0x9d44c] num_i(8) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4536; ID:0; [0x95 0x93 0xea ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D44C (31:0) ~[0x1D44C] +Idx:4539; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d44c:[0x9d464] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d46c:[0x9d47c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4540; ID:0; [0x95 0x9b 0xec ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D86C (31:0) ~[0x1D86C] +Idx:4543; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d86c:[0x9d874] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4544; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4546; ID:0; [0x9a 0x4b 0x39 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A732C (31:0); +Idx:4544; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7328:[0xa732c] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4544; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xa732c; excep num (0x02) ) +Idx:4551; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4553; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4558; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4551; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4559; ID:0; [0xdd ]; I_ATOM_F4 : Atom format 4.; NNNN +Idx:4559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de70:[0x3de78] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de78:[0x3de80] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de80:[0x3de88] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4560; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de88:[0x3de90] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x407d4:[0x407e4] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x407e4:[0x40800] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4561; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x137a0:[0x13840] num_i(40) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4562; ID:0; [0x9a 0x10 0x1c 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013840 (31:0); +Idx:4567; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13840:[0x13848] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9856c:[0x98578] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4568; ID:0; [0x95 0x12 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00013848 (31:0) ~[0x48] +Idx:4570; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13848:[0x13854] num_i(3) last_sz(4) (ISA=A64) E iBR b+link ) +Idx:4571; ID:0; [0x95 0xe7 0xa1 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0001439C (31:0) ~[0x1439C] +Idx:4574; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1439c:[0x143a4] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4575; ID:0; [0x95 0x95 0x9c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00013854 (31:0) ~[0x13854] +Idx:4578; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13854:[0x13864] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14340:[0x14350] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14dac:[0x14dc4] num_i(6) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4579; ID:0; [0x95 0xd4 0xa1 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00014350 (31:0) ~[0x14350] +Idx:4582; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14350:[0x14360] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4583; ID:0; [0x95 0x99 0x9c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00013864 (31:0) ~[0x13864] +Idx:4586; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13864:[0x13870] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4587; ID:0; [0x9a 0x0a 0x43 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00098628 (31:0); +Idx:4592; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4593; ID:0; [0x9a 0x1c 0x1c 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013870 (31:0); +Idx:4598; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13870:[0x1388c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9876c:[0x98778] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98794:[0x987a0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x987b0:[0x987bc] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4599; ID:0; [0x95 0x23 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0001388C (31:0) ~[0x8C] +Idx:4601; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1388c:[0x138e0] num_i(21) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x144fc:[0x14568] num_i(27) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4602; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????00098628 (31:0); +Idx:4603; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4604; ID:0; [0x9a 0x5a 0x22 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014568 (31:0); +Idx:4609; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14568:[0x14580] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4610; ID:0; [0x91 ]; I_ADDR_MATCH : Exact Address Match., [1]; Addr=0x????????00098628 (31:0); +Idx:4611; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4612; ID:0; [0x9a 0x60 0x22 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014580 (31:0); +Idx:4617; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14580:[0x14598] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4618; ID:0; [0x91 ]; I_ADDR_MATCH : Exact Address Match., [1]; Addr=0x????????00098628 (31:0); +Idx:4619; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4620; ID:0; [0x9a 0x66 0x22 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014598 (31:0); +Idx:4625; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14598:[0x145b4] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9876c:[0x98778] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98794:[0x987a0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x987b0:[0x987bc] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4626; ID:0; [0x95 0x6d ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????000145B4 (31:0) ~[0x1B4] +Idx:4628; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x145b4:[0x14610] num_i(23) last_sz(4) (ISA=A64) E BR ) +Idx:4628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14614:[0x14624] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14624:[0x14628] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4629; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14630:[0x14640] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14644:[0x1464c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14658:[0x14680] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4630; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:4630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14680:[0x14684] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14690:[0x146a8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146ac:[0x146c8] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa6fc4:[0xa6fd8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7010:[0xa7018] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4631; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4633; ID:0; [0x9a 0x11 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A7044 (31:0); +Idx:4631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7030:[0xa7044] num_i(5) last_sz(4) (ISA=A64) E --- ) +Idx:4631; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xa7044; excep num (0x02) ) +Idx:4638; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4643; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4644; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4645; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38874:[0x38884] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3888c:[0x388a8] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38914:[0x38930] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38944:[0x38960] num_i(7) last_sz(4) (ISA=A64) E iBR b+link ) +Idx:4646; ID:0; [0x95 0xb0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0C0 (31:0) ~[0x1B0C0] +Idx:4649; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4651; ID:0; [0x95 0x31 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0C4 (31:0) ~[0xC4] +Idx:4649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0c0:[0x3b0c4] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4649; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x3b0c4; excep num (0x03) ) +Idx:4653; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4654; ID:0; [0x82 0x31 0x58 0x03 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????0003B0C4 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4660; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4653; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4654; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0c4:[0x3b0c8] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4661; ID:0; [0x95 0xd8 0xc4 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00038960 (31:0) ~[0x18960] +Idx:4664; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38960:[0x38974] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x389a0:[0x389a4] num_i(1) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4664; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4665; ID:0; [0x9a 0x11 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A7044 (31:0); +Idx:4670; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7044:[0xa704c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4671; ID:0; [0x9a 0x32 0x23 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000146C8 (31:0); +Idx:4676; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:4676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146c8:[0x146d0] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146d0:[0x146d4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146ec:[0x146f4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146f8:[0x14714] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa713c:[0xa7150] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4677; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7188:[0xa7190] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4678; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4680; ID:0; [0x9a 0x79 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A71E4 (31:0); +Idx:4678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa71d0:[0xa71e4] num_i(5) last_sz(4) (ISA=A64) E --- ) +Idx:4678; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xa71e4; excep num (0x02) ) +Idx:4685; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4690; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4691; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4692; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38874:[0x38884] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3888c:[0x388a8] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38914:[0x38930] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38944:[0x38960] num_i(7) last_sz(4) (ISA=A64) E iBR b+link ) +Idx:4693; ID:0; [0x95 0xb2 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0C8 (31:0) ~[0x1B0C8] +Idx:4696; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0c8:[0x3b0d4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0d4:[0x3b0dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0e4:[0x3b0ec] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4697; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4699; ID:0; [0x95 0x3c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0F0 (31:0) ~[0xF0] +Idx:4697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0ec:[0x3b0f0] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4697; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x3b0f0; excep num (0x02) ) +Idx:4701; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4702; ID:0; [0x82 0x3c 0x58 0x03 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????0003B0F0 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4708; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4701; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4702; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; CTXTID=0x4300; ) +Idx:4708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0f0:[0x3b0f4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b12c:[0x3b130] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4709; ID:0; [0x95 0xd8 0xc4 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00038960 (31:0) ~[0x18960] +Idx:4712; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38960:[0x38974] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x389a0:[0x389a4] num_i(1) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4712; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4713; ID:0; [0x9a 0x79 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A71E4 (31:0); +Idx:4718; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa71e4:[0xa71ec] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4719; ID:0; [0x9a 0x45 0x23 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014714 (31:0); +Idx:4724; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14714:[0x14720] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4725; ID:0; [0x95 0xb8 0x9c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????000138E0 (31:0) ~[0x138E0] +Idx:4728; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x138e0:[0x138f8] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x138f8:[0x138fc] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13910:[0x1392c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4729; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b6f4:[0x9b708] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b708:[0x9b710] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b760:[0x9b774] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4730; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4732; ID:0; [0x9a 0x10 0x78 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F040 (31:0); +Idx:4730; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f038:[0x9f040] num_i(2) last_sz(4) (ISA=A64) E --- ) +Idx:4730; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x9f040; excep num (0x02) ) +Idx:4737; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4742; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4742; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4742; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4742; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4743; ID:0; [0xd5 ]; I_ATOM_F5 : Atom format 5.; NNNNN +Idx:4743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38848:[0x38850] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38850:[0x38858] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4744; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4744; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38858:[0x38860] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4744; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38860:[0x38868] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4744; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b198:[0x3b1ac] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4744; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b7cc:[0x9b7e0] num_i(5) last_sz(4) (ISA=A64) E iBR ) +Idx:4745; ID:0; [0x9a 0x20 0x7c 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F880 (31:0); +Idx:4750; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f880:[0x9f888] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4751; ID:0; [0x9a 0x6b 0x58 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0003B1AC (31:0); +Idx:4756; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4756; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b1ac:[0x3b1b4] num_i(2) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4756; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4757; ID:0; [0x9a 0x10 0x78 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F040 (31:0); +Idx:4762; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4762; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f040:[0x9f048] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4763; ID:0; [0x9a 0x4b 0x1c 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0001392C (31:0); +Idx:4768; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:4768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1392c:[0x1398c] num_i(24) last_sz(4) (ISA=A64) N BR ) +Idx:4768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1398c:[0x13990] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13ff8:[0x14008] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14008:[0x1400c] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14048:[0x14058] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4769; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14058:[0x1405c] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14078:[0x14088] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14094:[0x140ac] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4770; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4770; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4770; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4770; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4771; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:4776; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4777; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4778; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:4779; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4780; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4781; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:4786; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4786; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4787; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:4792; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4793; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4794; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4795; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4796; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4797; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4798; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4799; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4800; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4801; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4802; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4803; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4804; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4805; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4806; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4807; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4808; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4809; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4810; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4811; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4812; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:4815; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4816; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:4818; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4819; ID:0; [0x9a 0x2b 0x20 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000140AC (31:0); +Idx:4824; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x140ac:[0x140d0] num_i(9) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9db4c:[0x9db68] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9db68:[0x9db70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4825; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9dbd0:[0x9dbec] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4826; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4828; ID:0; [0x9a 0x14 0x78 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F050 (31:0); +Idx:4826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f048:[0x9f050] num_i(2) last_sz(4) (ISA=A64) E --- ) +Idx:4826; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x9f050; excep num (0x02) ) +Idx:4833; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4838; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4839; ID:0; [0xd5 ]; I_ATOM_F5 : Atom format 5.; NNNNN +Idx:4839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38848:[0x38850] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38850:[0x38858] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4840; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38858:[0x38860] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38860:[0x38868] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38868:[0x38870] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4841; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b1b4:[0x3b1cc] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9dc4c:[0x9dc64] num_i(6) last_sz(4) (ISA=A64) E iBR ) +Idx:4842; ID:0; [0x9a 0x6c 0x08 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A11B0 (31:0); +Idx:4842; ID:2; OCSD_GEN_TRC_ELEM_EO_TRACE() +ID:0 END OF TRACE DATA +Trace Packet Lister : Trace buffer done, processed 4847 bytes. diff --git a/decoder/tests/snapshots-ete/trace_file_cid_vmid/rs_entry.bin b/decoder/tests/snapshots-ete/trace_file_cid_vmid/rs_entry.bin new file mode 100644 index 0000000000000000000000000000000000000000..7e59171b6d2e58e2eae9f72ef9140027902ed2ee GIT binary patch literal 264850 zcmeI5F>D>#b%rUeHkLNZTHf6xN}^&56$C=tEM!Lu5HN!<2@3^KA=oTfsMtaU0W(+? zDpU}G;&1^KDz?}{1q&4_WLq0762V}hf(xj4g@6c%fDi_YEmWvrp+bdCo`IV0P<2gKkv-^=lpl(-TCM8lOspxJ~{I4(XW5--kfa@yghPc^3U9n5q0plq31(yr+bXgaqjrB$Mbrb2KFp%5KkMt({lNVlZ`n`yB~TarsMoSbZ>Mj4(Z{`FUodb!+ZRmG$CGSd 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3140 zcma);ZERCj7{|}O9eraXo!hc*otCO0_<}RWWSB5nXT)TYz~V42&WydtfCeLiA`;nd znZ%?u(U>sh3zUR}o!G==f+ohy&csM!jNXmm8;&7iz#V*;%&`rv|8t(*a+=b`4>xIh zPk-lm{?Gq;&Z%NYr>fZ3c+O9SSXJz5^<&ssNVKpkOD>k!^*pZ#5Ill?b;=O3i1N5{s3#tQDjYn z)yvAjD&TFqiM8*rVFthofEAFeKv#r6Jj%boQOX{z4tk%pw|Bd^SB zLgwY-+N%`HuKwKG+nyX$@`|h?mWjMtq4yQ!HNiZ{%f%Brh_(7t!}KFBKl1X+y!;uB zK2ccllce{rf(5;2q~7IH?{I`z1E=!G^|8WAHU~M&)UHT+iZS6S#>cl3Yt2`NS%tXN zzI%5;?^IXXckG+R^={3hcNqKL_P0;!EqaY=@0EGgGm)3hjZTWC=KK78+o9wYsm=Dc z+P9&0V$GYmKC)}KQDMbXR6CjhokfmGD8O^g(6p;RU_JEooo-rN#AjbA?Kun zYt0nP%=P?vxs<#jjpQSHp4>oQjFn0sC7vhNz;u33-ayRu42WMN)^E_L8~zq^&h})u ziCAlH<$BVt-MGR^ULha+4%QLO6VWTSr^XwJ^|>C+ISYOSL(G%UULNXW4;kj=7l-6p#?!)w`p*KXz&Zy>sE63-xrNo-WjLRCmRy@qZsn zn8kQPtaL=|)wUjIg(te`SrJD(cRDK)_`lst(RKPr1Lmk&TQNsFi<>uN`#5%hom(>i0 zs9!C#^unYBi0!5v*owf7wD$>NRbp4i_{(mRHC40|!`#iTFTf-ic^;^jT2#{AM3i8Yw9 zs~7i$^MCl_*xoWZV})ivK(jF|`wr3e1Zi-1Z8T^8*!p`F{Uewk9+{1~xXo{Q$3X~SU1zJ&I+{+g4?8W@kJeM8NQ*Wh^PoqN+z?iI2IxC@9o zj$H$xTQ3v374YyXitmff`E~18a*ZtXIkA>z-Mz*iB-Y-pXx_WmA%zt`N3+uIO>sx5 zmv) +Idx:43; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13fcc:[0x13fd0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:43; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13ff4:[0x13ff8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:43; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x141e0:[0x141f0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:44; ID:0; [0x9a 0x00 0x04 0x04 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00040800 (31:0); +Idx:49; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:49; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40800:[0x4081c] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:49; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:50; ID:0; [0x9a 0x4b 0x39 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A732C (31:0); +Idx:55; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:57; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:55; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:57; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa732c:[0xa7330] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:58; ID:0; [0x9a 0x25 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000094 (31:0); +Idx:63; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:63; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000094:[0x10000a0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:63; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10000a8:[0x10000ac] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:63; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10000b8:[0x10000c0] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:63; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b090:[0x9b0a4] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:63; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:64; ID:0; [0x9a 0x29 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B0A4 (31:0); +Idx:69; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:69; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0a4:[0x9b0ac] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:69; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:70; ID:0; [0x95 0x2b ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B0AC (31:0) ~[0xAC] +Idx:72; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:72; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0ac:[0x9b0d4] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:72; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0d4:[0x9b0f0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:72; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b158:[0x9b168] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:72; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b168:[0x9b180] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:72; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:73; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:73; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:73; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:73; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:74; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:77; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:77; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:77; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:77; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:77; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:78; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:78; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:78; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:78; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:79; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:79; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:80; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:80; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:80; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:80; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:81; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:81; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:82; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:87; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:87; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:88; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:93; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:93; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:93; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:93; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:94; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:94; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:94; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:94; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:95; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:95; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:95; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:95; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:96; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:96; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:96; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:96; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:97; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:97; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:97; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:97; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:98; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:98; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:98; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:98; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:99; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:99; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:99; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:99; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:100; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:103; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:104; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:105; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:107; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:108; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:109; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:110; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:111; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:112; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:113; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:114; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:115; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:116; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:118; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:119; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:120; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:121; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:123; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:124; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:125; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:126; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:127; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:128; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:129; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:130; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:131; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:132; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:133; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:136; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:137; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:139; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:140; ID:0; [0x95 0xe0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B180 (31:0) ~[0x1B180] +Idx:143; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b180:[0x9b1a8] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b124:[0x9b144] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:144; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:144; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b144:[0x9b158] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:145; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:146; ID:0; [0x9a 0x30 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010000C0 (31:0); +Idx:151; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:151; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10000c0:[0x1000108] num_i(18) last_sz(4) (ISA=A64) E BR b+link ) +Idx:151; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:151; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:152; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:152; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:152; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:152; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:153; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:158; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:159; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:160; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:161; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:162; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:162; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:163; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:168; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:168; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:169; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:174; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:174; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:174; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:174; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:175; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:176; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:176; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:177; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:177; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:177; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:177; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:178; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:179; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:180; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:181; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:182; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:183; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:184; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:185; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:186; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:187; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:188; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:189; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:190; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:191; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:191; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:192; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:193; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:194; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:195; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:195; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:195; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:195; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:196; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:197; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:197; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:198; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:199; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:200; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:200; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:201; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:202; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:203; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:204; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:205; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:206; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:207; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:208; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:209; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:210; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:211; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:212; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:213; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:214; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:215; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:216; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:217; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:218; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:219; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:220; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:221; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:222; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:223; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:224; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:225; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:226; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:227; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:228; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:229; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:230; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:231; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:232; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:233; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:234; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:235; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:236; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:237; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:238; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:239; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:240; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:241; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:242; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:243; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:244; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:247; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:248; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:250; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:251; ID:0; [0x9a 0x42 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000108 (31:0); +Idx:256; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:258; ID:0; [0x95 0x4a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000128 (31:0) ~[0x128] +Idx:256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000108:[0x1000128] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:256; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000128; excep num (0x03) ) +Idx:260; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:262; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:267; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:260; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:268; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:269; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:274; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:275; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:277; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:278; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:283; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:284; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:286; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:287; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:288; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:288; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:289; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:294; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:295; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:295; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:296; ID:0; [0x9a 0x4b 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100012C (31:0); +Idx:301; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:303; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:301; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100012c:[0x1000170] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:304; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:309; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:310; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:312; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:313; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:314; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:315; ID:0; [0x9a 0x5c 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000170 (31:0); +Idx:320; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000170:[0x10001bc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:321; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:322; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:323; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:324; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:325; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:325; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:326; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:327; ID:0; [0x9a 0x6f 0x00 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010001BC (31:0); +Idx:332; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10001bc:[0x1000208] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:333; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:334; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:335; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:336; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:337; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:337; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:338; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:339; ID:0; [0x9a 0x02 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000208 (31:0); +Idx:344; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000208:[0x100024c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:345; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:346; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:346; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:346; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:347; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:348; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:349; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:350; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:350; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:351; ID:0; [0x9a 0x13 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100024C (31:0); +Idx:356; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100024c:[0x1000278] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:357; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:357; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:357; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:357; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:358; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:363; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:363; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:363; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:363; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:363; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:364; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:364; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:364; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:364; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:365; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:366; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:367; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:368; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:373; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:373; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:374; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:379; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:380; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:380; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:380; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:380; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:381; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:381; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:382; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:383; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:384; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:385; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:386; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:387; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:388; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:389; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:390; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:391; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:392; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:393; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:394; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:395; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:396; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:397; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:397; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:398; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:399; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:400; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:401; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:402; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:403; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:404; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:405; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:405; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:406; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:406; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:407; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:408; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:409; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:410; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:411; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:412; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:413; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:414; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:415; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:416; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:417; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:418; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:419; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:420; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:421; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:422; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:423; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:424; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:425; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:426; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:427; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:428; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:429; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:430; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:431; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:432; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:433; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:434; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:435; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:436; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:437; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:438; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:439; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:440; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:441; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:442; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:443; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:444; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:445; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:446; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:447; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:448; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:449; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:452; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:453; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:455; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:456; ID:0; [0x9a 0x1e 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000278 (31:0); +Idx:461; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:463; ID:0; [0x95 0x26 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000298 (31:0) ~[0x98] +Idx:461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000278:[0x1000298] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:461; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000298; excep num (0x03) ) +Idx:465; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:467; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:472; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:465; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:473; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:474; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:479; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:480; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:482; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:483; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:488; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:489; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:491; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:492; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:493; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:494; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:499; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:500; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:500; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:501; ID:0; [0x9a 0x27 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100029C (31:0); +Idx:506; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:508; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:506; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100029c:[0x10002e0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:509; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:514; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:515; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:517; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:518; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:519; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:520; ID:0; [0x9a 0x38 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010002E0 (31:0); +Idx:525; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10002e0:[0x100032c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:526; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:527; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:528; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:529; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:530; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:531; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:532; ID:0; [0x9a 0x4b 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100032C (31:0); +Idx:537; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100032c:[0x1000378] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:538; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:539; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:540; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:541; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:542; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:543; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:544; ID:0; [0x9a 0x5e 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000378 (31:0); +Idx:549; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000378:[0x10003bc] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:550; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:551; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:552; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:553; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:554; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:555; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:556; ID:0; [0x9a 0x6f 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010003BC (31:0); +Idx:561; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10003bc:[0x10003e8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:562; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:563; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:568; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:569; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:570; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:571; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:572; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:573; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:578; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:579; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:584; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:585; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:585; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:585; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:585; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:586; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:587; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:587; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:587; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:587; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:588; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:589; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:590; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:590; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:591; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:591; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:591; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:591; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:592; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:593; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:594; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:595; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:595; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:595; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:595; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:596; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:597; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:598; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:599; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:600; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:601; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:602; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:603; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:604; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:604; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:605; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:606; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:607; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:608; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:609; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:610; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:611; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:612; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:613; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:614; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:614; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:615; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:616; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:617; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:618; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:619; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:620; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:621; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:622; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:623; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:624; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:625; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:626; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:627; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:628; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:629; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:630; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:631; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:632; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:633; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:634; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:635; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:636; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:637; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:638; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:639; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:640; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:641; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:642; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:643; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:644; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:645; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:646; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:647; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:648; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:649; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:650; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:651; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:652; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:653; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:654; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:657; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:658; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:660; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:661; ID:0; [0x9a 0x7a 0x01 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010003E8 (31:0); +Idx:666; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:668; ID:0; [0x95 0x82 0x02 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000408 (31:0) ~[0x408] +Idx:666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10003e8:[0x1000408] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:666; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000408; excep num (0x03) ) +Idx:671; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:673; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:678; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:671; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:679; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:680; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:685; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:686; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:688; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:689; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:694; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:695; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:697; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:698; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:699; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:700; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:705; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:706; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:706; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:707; ID:0; [0x9a 0x03 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100040C (31:0); +Idx:712; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:714; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:712; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100040c:[0x1000450] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:715; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:720; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:721; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:723; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:724; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:725; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:726; ID:0; [0x9a 0x14 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000450 (31:0); +Idx:731; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000450:[0x100049c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:732; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:733; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:734; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:735; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:736; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:736; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:737; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:737; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:738; ID:0; [0x9a 0x27 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100049C (31:0); +Idx:743; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100049c:[0x10004e8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:743; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:744; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:745; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:745; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:745; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:746; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:747; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:747; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:747; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:747; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:748; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:748; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:749; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:750; ID:0; [0x9a 0x3a 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010004E8 (31:0); +Idx:755; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:755; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10004e8:[0x100052c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:755; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:755; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:756; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:757; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:757; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:757; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:758; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:759; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:760; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:760; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:761; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:762; ID:0; [0x9a 0x4b 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100052C (31:0); +Idx:767; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100052c:[0x1000558] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:768; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:769; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:774; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:775; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:776; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:777; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:778; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:778; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:779; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:784; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:784; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:785; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:790; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:791; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:792; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:793; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:794; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:795; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:796; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:797; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:798; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:799; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:800; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:801; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:802; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:803; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:804; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:805; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:806; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:807; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:808; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:809; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:810; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:811; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:812; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:813; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:814; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:815; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:816; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:817; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:818; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:819; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:820; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:821; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:822; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:823; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:824; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:825; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:826; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:827; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:828; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:829; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:830; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:831; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:832; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:833; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:834; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:835; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:836; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:837; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:838; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:839; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:840; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:841; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:842; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:843; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:844; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:845; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:846; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:847; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:848; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:849; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:850; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:851; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:852; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:853; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:854; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:855; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:856; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:857; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:858; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:859; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:860; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:861; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:864; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:865; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:867; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:868; ID:0; [0x9a 0x56 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000558 (31:0); +Idx:873; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:875; ID:0; [0x95 0x5e ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000578 (31:0) ~[0x178] +Idx:873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000558:[0x1000578] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:873; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000578; excep num (0x03) ) +Idx:877; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:879; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:884; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:877; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:885; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:886; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:891; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:892; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:894; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:895; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:900; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:901; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:903; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:904; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:905; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:906; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:911; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:912; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:912; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:913; ID:0; [0x9a 0x5f 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100057C (31:0); +Idx:918; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:920; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:918; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100057c:[0x10005c0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:921; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:926; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:927; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:929; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:930; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:931; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:932; ID:0; [0x9a 0x70 0x02 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010005C0 (31:0); +Idx:937; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10005c0:[0x100060c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:938; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:939; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:940; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:941; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:942; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:943; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:944; ID:0; [0x9a 0x03 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100060C (31:0); +Idx:949; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100060c:[0x1000658] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:950; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:951; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:952; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:953; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:954; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:954; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:955; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:956; ID:0; [0x9a 0x16 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000658 (31:0); +Idx:961; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000658:[0x100069c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:962; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:963; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:964; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:965; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:966; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:967; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:968; ID:0; [0x9a 0x27 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100069C (31:0); +Idx:973; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100069c:[0x10006c8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:974; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:975; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:980; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:981; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:982; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:983; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:984; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:985; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:990; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:991; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:996; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:997; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:997; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:997; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:997; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:998; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:999; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:999; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:999; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:999; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1000; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1001; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1001; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1001; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1001; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1002; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1003; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1004; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1005; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1005; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1005; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1005; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1006; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1007; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1008; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1008; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1008; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1008; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1009; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1009; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1009; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1009; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1010; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1011; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1011; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1012; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1013; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1014; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1015; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1016; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1017; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1018; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1018; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1019; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1019; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1020; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1020; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1021; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1021; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1022; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1023; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1024; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1025; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1025; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1025; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1025; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1026; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1027; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1028; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1029; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1030; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1031; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1032; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1033; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1034; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1035; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1036; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1037; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1038; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1039; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1040; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1041; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1042; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1043; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1044; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1045; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1046; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1047; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1048; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1049; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1050; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1051; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1052; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1053; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1054; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1055; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1056; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1057; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1058; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1059; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1060; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1061; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1062; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1063; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1064; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1065; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1066; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1067; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1070; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1071; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1073; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1074; ID:0; [0x9a 0x32 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010006C8 (31:0); +Idx:1079; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1081; ID:0; [0x95 0x3a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010006E8 (31:0) ~[0xE8] +Idx:1079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10006c8:[0x10006e8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1079; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10006e8; excep num (0x03) ) +Idx:1083; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1085; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1090; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1083; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:1090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1091; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1092; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1097; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1098; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1100; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1101; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1106; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1107; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1109; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1110; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1111; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1112; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1117; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1118; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1118; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1119; ID:0; [0x9a 0x3b 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010006EC (31:0); +Idx:1124; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1126; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1124; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:1126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10006ec:[0x1000730] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1127; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1132; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1133; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1135; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1136; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1137; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1138; ID:0; [0x9a 0x4c 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000730 (31:0); +Idx:1143; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000730:[0x100077c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1143; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1144; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1145; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1146; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1147; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1148; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1148; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1149; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1149; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1150; ID:0; [0x9a 0x5f 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100077C (31:0); +Idx:1155; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1155; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100077c:[0x10007c8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1155; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1155; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1156; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1157; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1157; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1157; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1158; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1159; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1160; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1160; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1161; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1162; ID:0; [0x9a 0x72 0x03 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010007C8 (31:0); +Idx:1167; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1167; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10007c8:[0x100080c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1167; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1167; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1168; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1169; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1170; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1171; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1172; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1172; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1173; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1173; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1174; ID:0; [0x9a 0x03 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100080C (31:0); +Idx:1179; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100080c:[0x1000838] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1180; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1181; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1186; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1187; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1188; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1188; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1189; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1189; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1190; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1191; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1196; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1197; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1202; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1203; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1203; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1204; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1205; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1206; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1207; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1208; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1209; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1210; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1211; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1212; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1213; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1213; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1214; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1215; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1216; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1216; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1217; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1217; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1218; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1219; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1219; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1220; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1221; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1222; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1223; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1224; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1225; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1226; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1227; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1228; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1229; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1230; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1231; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1232; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1233; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1234; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1235; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1236; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1237; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1238; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1239; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1240; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1241; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1242; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1243; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1244; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1245; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1246; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1247; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1248; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1249; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1250; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1251; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1252; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1253; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1254; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1255; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1256; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1257; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1258; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1259; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1260; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1261; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1262; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1263; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1264; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1265; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1266; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1267; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1268; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1269; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1270; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1271; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1272; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1273; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1276; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1277; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1279; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1280; ID:0; [0x9a 0x0e 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000838 (31:0); +Idx:1285; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1287; ID:0; [0x95 0x16 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000858 (31:0) ~[0x58] +Idx:1285; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000838:[0x1000858] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1285; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000858; excep num (0x03) ) +Idx:1289; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1291; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1296; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1289; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:1296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1297; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1298; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1303; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1304; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1306; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1307; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1312; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1313; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1315; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1315; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1315; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1315; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1316; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1317; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1318; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1323; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1323; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1324; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1324; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1325; ID:0; [0x9a 0x17 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100085C (31:0); +Idx:1330; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1332; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1330; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:1332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100085c:[0x10008a0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1333; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1338; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1339; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1341; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1342; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1342; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1343; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1344; ID:0; [0x9a 0x28 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010008A0 (31:0); +Idx:1349; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10008a0:[0x10008ec] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1350; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1351; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1351; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1351; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1352; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1353; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1354; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1354; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1355; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1355; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1356; ID:0; [0x9a 0x3b 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010008EC (31:0); +Idx:1361; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10008ec:[0x1000938] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1362; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1363; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1363; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1363; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1364; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1365; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1365; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1366; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1366; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1367; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1368; ID:0; [0x9a 0x4e 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000938 (31:0); +Idx:1373; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1373; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000938:[0x100097c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1373; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1373; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1374; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1375; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1376; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1377; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1378; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1379; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1380; ID:0; [0x9a 0x5f 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100097C (31:0); +Idx:1385; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100097c:[0x10009a8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1386; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1387; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1392; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1393; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1393; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1394; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1394; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1395; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1396; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1397; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1402; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1403; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1408; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1409; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1410; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1411; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1411; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1412; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1413; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1414; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1415; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1416; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1417; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1418; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1419; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1420; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1421; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1422; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1423; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1424; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1425; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1426; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1426; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1427; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1427; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1428; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1429; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1430; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1431; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1432; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1433; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1434; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1435; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1436; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1437; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1438; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1439; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1440; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1440; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1441; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1442; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1442; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1443; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1443; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1444; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1445; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1446; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1447; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1448; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1449; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1450; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1451; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1452; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1453; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1454; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1455; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1456; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1457; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1458; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1459; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1460; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1461; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1462; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1463; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1464; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1465; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1466; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1467; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1468; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1469; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1470; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1471; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1472; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1473; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1474; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1475; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1476; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1477; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1478; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1479; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1480; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1483; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1484; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1486; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1487; ID:0; [0x9a 0x6a 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010009A8 (31:0); +Idx:1492; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1494; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010009C8 (31:0) ~[0x1C8] +Idx:1492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10009a8:[0x10009c8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1492; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10009c8; excep num (0x03) ) +Idx:1496; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1498; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1503; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1496; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:1503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1504; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1505; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1510; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1511; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1513; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1514; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1519; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1520; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1522; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1523; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1524; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1525; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1530; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1531; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1531; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1532; ID:0; [0x9a 0x73 0x04 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010009CC (31:0); +Idx:1537; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1539; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1537; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:1539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10009cc:[0x1000a10] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1540; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1545; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1546; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1548; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1549; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1550; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1550; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1551; ID:0; [0x9a 0x04 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000A10 (31:0); +Idx:1556; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000a10:[0x1000a5c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1557; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1558; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1559; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1560; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1561; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1562; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1563; ID:0; [0x9a 0x17 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000A5C (31:0); +Idx:1568; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000a5c:[0x1000aa8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1569; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1570; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1571; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1572; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1573; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1574; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1575; ID:0; [0x9a 0x2a 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000AA8 (31:0); +Idx:1580; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000aa8:[0x1000aec] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1581; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1582; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1583; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1584; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1584; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1585; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1585; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1586; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1587; ID:0; [0x9a 0x3b 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000AEC (31:0); +Idx:1592; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000aec:[0x1000b18] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1592; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1593; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1593; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1594; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1599; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1600; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1601; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1601; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1602; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1602; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1603; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1603; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1604; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1609; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1609; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1610; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1615; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1616; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1617; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1618; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1619; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1619; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1620; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1621; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1622; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1623; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1624; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1625; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1626; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1627; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1628; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1629; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1630; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1631; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1632; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1632; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1633; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1633; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1634; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1634; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1635; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1636; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1636; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1637; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1638; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1639; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1640; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1641; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1642; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1642; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1643; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1643; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1644; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1644; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1645; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1646; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1646; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1647; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1648; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1648; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1649; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1650; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1650; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1651; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1652; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1653; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1654; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1655; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1656; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1657; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1658; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1659; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1660; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1661; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1662; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1663; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1664; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1665; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1666; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1667; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1668; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1669; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1670; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1671; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1672; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1673; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1674; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1675; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1676; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1677; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1678; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1679; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1680; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1681; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1682; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1683; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1684; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1685; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1686; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1687; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1690; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1691; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1693; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1694; ID:0; [0x9a 0x46 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000B18 (31:0); +Idx:1699; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1701; ID:0; [0x95 0x4e ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000B38 (31:0) ~[0x138] +Idx:1699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000b18:[0x1000b38] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1699; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000b38; excep num (0x03) ) +Idx:1703; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1705; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1710; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1703; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:1710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1711; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1712; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1717; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1718; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1720; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1721; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1726; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1727; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1729; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1730; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1730; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1731; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1732; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1737; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1737; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1738; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1738; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1739; ID:0; [0x9a 0x4f 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000B3C (31:0); +Idx:1744; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1746; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1744; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:1746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000b3c:[0x1000b80] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1747; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1752; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1752; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1752; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1753; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1755; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1755; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1755; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1755; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1756; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1756; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1757; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1757; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1758; ID:0; [0x9a 0x60 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000B80 (31:0); +Idx:1763; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000b80:[0x1000bcc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1763; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1764; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1765; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1766; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1767; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1768; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1769; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1770; ID:0; [0x9a 0x73 0x05 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000BCC (31:0); +Idx:1775; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000bcc:[0x1000c18] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1776; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1777; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1778; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1779; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1779; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1780; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1780; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1781; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1782; ID:0; [0x9a 0x06 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000C18 (31:0); +Idx:1787; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1787; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000c18:[0x1000c5c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1787; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1787; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1788; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1789; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1790; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1791; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1792; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1793; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1794; ID:0; [0x9a 0x17 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000C5C (31:0); +Idx:1799; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000c5c:[0x1000c88] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:1800; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1801; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:1806; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:1806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1807; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1808; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:1809; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1809; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:1810; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1810; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1811; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:1816; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1817; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:1822; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:1822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1823; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1823; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1824; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1824; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1825; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1826; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1827; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1828; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1829; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:1829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:1830; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1831; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1832; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1833; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1834; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1835; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1836; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1837; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1838; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1839; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1840; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1840; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1841; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1842; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1843; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1844; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1845; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1846; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1847; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1848; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1849; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1850; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1851; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1851; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1852; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1852; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1853; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1853; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1854; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1855; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1856; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1856; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1857; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1858; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1858; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1859; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1859; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1860; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1860; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1861; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1862; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1863; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1864; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1865; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1866; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1867; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1868; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1869; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1870; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1871; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:1871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1872; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1873; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1874; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1875; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1876; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1877; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1878; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1879; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:1879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1880; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1881; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1882; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1883; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1884; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1885; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1886; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1887; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:1887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1888; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:1888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1889; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1890; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1891; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:1891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:1891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1892; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:1892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:1892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:1893; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1894; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:1897; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1898; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:1900; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1901; ID:0; [0x9a 0x22 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000C88 (31:0); +Idx:1906; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:1908; ID:0; [0x95 0x2a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000CA8 (31:0) ~[0xA8] +Idx:1906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000c88:[0x1000ca8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:1906; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000ca8; excep num (0x03) ) +Idx:1910; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:1912; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:1917; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1910; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:1917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:1917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:1918; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:1919; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:1924; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:1924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1925; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:1927; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1928; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1933; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1934; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1936; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1937; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1938; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1938; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1939; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:1944; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:1944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:1945; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:1945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:1945; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:1946; ID:0; [0x9a 0x2b 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000CAC (31:0); +Idx:1951; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:1953; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1951; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:1953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000cac:[0x1000cf0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1954; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:1959; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1960; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:1962; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1963; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1964; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1965; ID:0; [0x9a 0x3c 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000CF0 (31:0); +Idx:1970; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000cf0:[0x1000d3c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1971; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1972; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1973; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1974; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1975; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1975; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1976; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1977; ID:0; [0x9a 0x4f 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000D3C (31:0); +Idx:1982; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000d3c:[0x1000d88] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1983; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1984; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1985; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1986; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1987; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:1988; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1989; ID:0; [0x9a 0x62 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000D88 (31:0); +Idx:1994; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:1994; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000d88:[0x1000dcc] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1994; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1994; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:1995; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:1996; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:1996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:1996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:1997; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:1998; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:1998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:1998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:1998; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:1999; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:1999; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2000; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2000; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2001; ID:0; [0x9a 0x73 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000DCC (31:0); +Idx:2006; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000dcc:[0x1000df8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2006; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2007; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2007; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2008; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2013; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2013; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2014; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2015; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2016; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2017; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2018; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2023; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2024; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2029; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2029; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2030; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2030; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2031; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2031; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2032; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2033; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2033; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2034; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2035; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2036; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2037; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2038; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2039; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2040; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2041; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2041; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2042; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2042; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2043; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2044; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2045; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2045; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2046; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2047; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2048; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2048; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2049; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2049; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2050; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2050; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2051; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2051; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2052; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2053; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2054; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2055; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2056; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2057; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2058; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2059; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2059; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2060; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2060; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2061; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2062; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2063; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2064; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2064; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2065; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2065; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2066; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2066; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2067; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2067; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2068; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2068; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2069; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2070; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2071; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2072; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2073; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2074; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2075; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2076; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2077; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2078; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2079; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2080; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2081; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2082; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2083; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2084; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2085; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2086; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2087; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2088; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2089; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2090; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2091; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2092; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2093; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2094; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2095; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2096; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2097; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2098; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2099; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2100; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2101; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2104; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2105; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2107; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2108; ID:0; [0x9a 0x7e 0x06 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000DF8 (31:0); +Idx:2113; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2115; ID:0; [0x95 0x86 0x07 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000E18 (31:0) ~[0xE18] +Idx:2113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000df8:[0x1000e18] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2113; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000e18; excep num (0x03) ) +Idx:2118; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2120; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2125; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2118; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:2125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2126; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2127; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2132; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2133; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2135; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2136; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2141; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2142; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2144; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2144; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2144; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2144; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2145; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2146; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2146; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2147; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2152; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2152; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2153; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2153; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2153; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2153; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2154; ID:0; [0x9a 0x07 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000E1C (31:0); +Idx:2159; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2161; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2159; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:2161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000e1c:[0x1000e60] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2161; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2162; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2167; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2167; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2167; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2168; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2170; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2170; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2171; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2171; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2172; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2172; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2173; ID:0; [0x9a 0x18 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000E60 (31:0); +Idx:2178; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000e60:[0x1000eac] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2179; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2180; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2181; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2182; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2182; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2183; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2183; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2184; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2185; ID:0; [0x9a 0x2b 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000EAC (31:0); +Idx:2190; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000eac:[0x1000ef8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2190; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2191; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2192; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2193; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2194; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2194; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2195; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2195; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2196; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2196; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2197; ID:0; [0x9a 0x3e 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000EF8 (31:0); +Idx:2202; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000ef8:[0x1000f3c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2202; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2203; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2204; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2204; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2205; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2206; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2207; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2208; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2209; ID:0; [0x9a 0x4f 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000F3C (31:0); +Idx:2214; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000f3c:[0x1000f68] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2214; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2215; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2216; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2221; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2222; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2223; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2224; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2225; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2226; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2231; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2232; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2237; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2238; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2239; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2240; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2241; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2242; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2243; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2244; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2245; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2246; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2247; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2248; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2249; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2250; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2251; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2252; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2253; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2254; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2255; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2256; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2257; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2258; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2259; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2260; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2261; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2262; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2263; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2264; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2265; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2266; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2267; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2268; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2269; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2270; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2271; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2272; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2273; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2274; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2275; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2276; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2277; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2278; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2279; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2280; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2280; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2281; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2281; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2282; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2282; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2283; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2284; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2284; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2284; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2284; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2285; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2285; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2285; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2285; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2286; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2287; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2287; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2288; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2288; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2288; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2288; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2289; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2290; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2291; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2292; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2293; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2294; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2295; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2296; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2297; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2297; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2298; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2298; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2299; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2299; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2300; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2301; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2302; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2302; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2302; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2302; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2303; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2304; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2305; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2306; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2307; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2308; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2309; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2310; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2313; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2314; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2316; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2316; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2317; ID:0; [0x9a 0x5a 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000F68 (31:0); +Idx:2322; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2324; ID:0; [0x95 0x62 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01000F88 (31:0) ~[0x188] +Idx:2322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000f68:[0x1000f88] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2322; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1000f88; excep num (0x03) ) +Idx:2326; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2328; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2333; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2326; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:2333; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2333; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2333; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2334; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2335; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2340; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2340; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2341; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2343; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2343; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2344; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2349; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2350; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2352; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2352; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2353; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2353; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2354; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2354; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2355; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2360; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2360; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2361; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2361; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2361; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2362; ID:0; [0x9a 0x63 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000F8C (31:0); +Idx:2367; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2369; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2367; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:2369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000f8c:[0x1000fd0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2369; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2370; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2375; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2376; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2378; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2379; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2379; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2380; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2380; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2381; ID:0; [0x9a 0x74 0x07 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01000FD0 (31:0); +Idx:2386; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1000fd0:[0x100101c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2387; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2388; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2389; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2390; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2390; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2391; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2391; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2392; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2393; ID:0; [0x9a 0x07 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100101C (31:0); +Idx:2398; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100101c:[0x1001068] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2399; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2400; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2401; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2402; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2403; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2404; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2405; ID:0; [0x9a 0x1a 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001068 (31:0); +Idx:2410; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001068:[0x10010ac] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2410; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2411; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2412; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2413; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2414; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2415; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2416; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2417; ID:0; [0x9a 0x2b 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010010AC (31:0); +Idx:2422; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10010ac:[0x10010d8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2422; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2423; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2424; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2429; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2430; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2431; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2432; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2433; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2434; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2439; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2439; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2440; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2445; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2445; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2446; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2446; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2447; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2447; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2448; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2449; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2450; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2451; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2452; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2453; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2454; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2455; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2456; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2457; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2458; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2458; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2459; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2459; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2460; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2460; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2461; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2462; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2463; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2463; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2464; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2464; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2465; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2466; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2467; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2468; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2469; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2470; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2471; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2472; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2473; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2474; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2475; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2476; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2477; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2477; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2478; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2479; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2480; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2481; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2481; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2482; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2482; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2483; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2484; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2485; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2486; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2487; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2488; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2489; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2490; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2491; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2492; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2492; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2493; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2493; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2494; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2494; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2495; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2496; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2497; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2498; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2499; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2500; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2500; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2501; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2501; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2502; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2503; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2503; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2504; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2504; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2505; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2506; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2507; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2507; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2508; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2508; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2509; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2509; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2510; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2511; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2512; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2513; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2514; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2515; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2516; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2517; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2518; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2521; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2522; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2524; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2525; ID:0; [0x9a 0x36 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010010D8 (31:0); +Idx:2530; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2532; ID:0; [0x95 0x3e ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010010F8 (31:0) ~[0xF8] +Idx:2530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10010d8:[0x10010f8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2530; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10010f8; excep num (0x03) ) +Idx:2534; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2536; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2541; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2534; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:2541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2542; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2543; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2548; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2549; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2551; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2552; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2557; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2558; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2560; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2561; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2562; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2563; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2568; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2569; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2569; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2570; ID:0; [0x9a 0x3f 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010010FC (31:0); +Idx:2575; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2577; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2575; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:2577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10010fc:[0x1001140] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2578; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2583; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2583; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2583; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2584; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2586; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2587; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2587; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2588; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2589; ID:0; [0x9a 0x50 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001140 (31:0); +Idx:2594; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001140:[0x100118c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2595; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2596; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2596; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2597; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2598; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2598; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2599; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2600; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2600; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2601; ID:0; [0x9a 0x63 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100118C (31:0); +Idx:2606; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100118c:[0x10011d8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2607; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2608; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2608; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2609; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2610; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2610; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2611; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2611; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2612; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2613; ID:0; [0x9a 0x76 0x08 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010011D8 (31:0); +Idx:2618; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10011d8:[0x100121c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2618; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2619; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2620; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2620; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2621; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2622; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2622; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2623; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2624; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2625; ID:0; [0x9a 0x07 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100121C (31:0); +Idx:2630; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100121c:[0x1001248] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2630; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2631; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2631; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2632; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2637; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2638; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2638; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2639; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2640; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2641; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2642; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2647; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2648; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2653; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2654; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2654; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2655; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2655; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2656; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2657; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2657; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2658; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2658; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2659; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2660; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2661; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2661; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2662; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2662; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2663; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2663; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2664; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2664; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2665; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2666; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2667; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2667; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2668; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2669; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2670; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2670; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2671; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2671; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2672; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2673; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2674; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2675; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2675; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2676; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2676; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2677; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2677; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2678; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2679; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2680; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2681; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2682; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2683; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2683; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2684; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2684; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2685; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2685; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2686; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2687; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2688; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2689; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2689; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2690; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2690; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2691; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2691; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2692; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2693; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2694; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2695; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2696; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2697; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2698; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2699; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2700; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2701; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2702; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2702; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2703; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2703; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2704; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2705; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2706; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2707; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2707; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2707; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2707; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2708; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2709; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2710; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2711; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2712; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2713; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2714; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2715; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2716; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2717; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2718; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2719; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2720; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2721; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2721; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2722; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2723; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2724; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2725; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2726; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2729; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2730; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2732; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2732; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2733; ID:0; [0x9a 0x12 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001248 (31:0); +Idx:2738; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2740; ID:0; [0x95 0x1a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001268 (31:0) ~[0x68] +Idx:2738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001248:[0x1001268] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2738; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001268; excep num (0x03) ) +Idx:2742; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2744; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2749; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2742; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:2749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2750; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2751; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2756; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2756; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2756; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2756; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2757; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2759; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2759; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2760; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2765; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2766; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2768; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2768; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2769; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2769; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2770; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2770; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2771; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2776; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2777; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2777; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2777; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2778; ID:0; [0x9a 0x1b 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100126C (31:0); +Idx:2783; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2785; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2783; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:2785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100126c:[0x10012b0] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2785; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2786; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2791; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2792; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2794; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2795; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2796; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2797; ID:0; [0x9a 0x2c 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010012B0 (31:0); +Idx:2802; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10012b0:[0x10012fc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2803; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2804; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2805; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2806; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2807; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2808; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2808; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2809; ID:0; [0x9a 0x3f 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010012FC (31:0); +Idx:2814; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10012fc:[0x1001348] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2815; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2816; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2817; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2818; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2818; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2819; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2819; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2820; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2821; ID:0; [0x9a 0x52 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001348 (31:0); +Idx:2826; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001348:[0x100138c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2827; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:2828; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2829; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:2830; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2831; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2832; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2833; ID:0; [0x9a 0x63 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100138C (31:0); +Idx:2838; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:2838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100138c:[0x10013b8] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:2839; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2839; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2840; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:2845; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2846; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2847; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:2848; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:2849; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2850; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:2855; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2855; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2856; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:2861; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:2861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2862; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2863; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2864; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:2864; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:2865; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2865; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2866; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2866; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2867; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2867; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2868; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2868; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2869; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2870; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2870; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2871; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2871; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2872; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2872; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2873; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2873; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2874; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2874; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2875; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2875; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2876; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2876; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2877; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2877; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2878; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2878; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2879; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2879; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2880; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2881; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2882; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2882; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2883; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2883; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2884; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2884; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2885; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2885; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2886; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2886; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2887; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2888; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2889; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2890; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2890; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2891; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2891; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2892; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2892; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2893; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2893; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2894; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2894; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2895; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2895; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2896; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2896; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2897; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2897; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2898; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2898; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2899; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2899; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2899; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2899; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2900; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2900; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2901; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2902; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2903; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2904; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2904; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2905; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2905; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2906; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2906; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2907; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2907; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2908; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2908; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2908; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2908; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2909; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2909; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2909; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2909; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2910; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2910; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2910; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2910; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2911; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2912; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2913; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2913; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2913; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2913; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2914; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:2914; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2914; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2914; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2915; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2915; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2916; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2916; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2917; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2917; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2918; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2919; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2920; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2921; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2922; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:2922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2923; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2923; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2924; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2924; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2925; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2925; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2926; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2926; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2927; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2927; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2928; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2929; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2929; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2930; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:2930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2930; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2931; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:2931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:2931; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:2932; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:2932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:2932; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:2933; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2933; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2934; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:2937; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2938; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:2940; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2941; ID:0; [0x9a 0x6e 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010013B8 (31:0); +Idx:2946; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:2948; ID:0; [0x95 0x76 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010013D8 (31:0) ~[0x1D8] +Idx:2946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10013b8:[0x10013d8] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:2946; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10013d8; excep num (0x03) ) +Idx:2950; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:2952; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:2957; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2950; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:2957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:2957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:2958; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:2959; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:2964; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:2964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2965; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:2967; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2968; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2973; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:2974; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:2976; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:2976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:2976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:2976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:2977; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:2978; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:2978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2979; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:2984; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:2984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:2985; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:2985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:2985; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:2986; ID:0; [0x9a 0x77 0x09 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010013DC (31:0); +Idx:2991; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:2993; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:2991; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:2993; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10013dc:[0x1001420] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2993; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2993; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:2994; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:2999; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:2999; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:2999; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3000; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3002; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3002; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3003; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3003; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3004; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3004; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3005; ID:0; [0x9a 0x08 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001420 (31:0); +Idx:3010; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001420:[0x100146c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3010; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3011; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3012; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3012; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3013; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3014; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3014; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3015; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3015; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3016; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3017; ID:0; [0x9a 0x1b 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100146C (31:0); +Idx:3022; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100146c:[0x10014b8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3022; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3023; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3024; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3024; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3025; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3026; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3027; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3027; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3028; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3028; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3029; ID:0; [0x9a 0x2e 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010014B8 (31:0); +Idx:3034; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10014b8:[0x10014fc] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3034; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3035; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3036; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3037; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3038; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3038; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3039; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3039; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3040; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3040; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3041; ID:0; [0x9a 0x3f 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010014FC (31:0); +Idx:3046; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10014fc:[0x1001528] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3046; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3047; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3047; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3048; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:3053; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3053; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3054; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3054; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3055; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3055; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3056; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3056; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3057; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3057; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3058; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3063; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3064; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3069; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3070; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3070; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3071; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3072; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3072; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3073; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3074; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3075; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3076; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3076; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3077; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3077; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3078; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3078; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3079; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3079; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3080; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3080; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3081; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3082; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3082; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3083; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3084; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3084; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3085; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3086; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3087; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3088; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3088; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3089; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3089; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3090; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3090; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3091; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3091; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3092; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3092; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3093; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3094; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3094; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3095; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3096; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3096; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3097; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3098; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3099; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3100; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3100; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3101; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3101; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3102; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3102; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3103; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3103; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3104; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3104; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3105; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3105; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3105; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3105; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3106; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3106; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3107; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3107; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3108; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3108; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3109; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3109; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3110; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3110; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3111; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3111; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3112; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3112; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3113; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3113; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3114; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3114; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3115; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3115; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3116; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3117; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3118; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3118; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3119; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3119; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3120; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3120; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3121; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3121; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3122; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3122; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3123; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3124; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3125; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3126; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3126; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3127; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3127; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3128; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3128; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3129; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3129; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3130; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3130; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3131; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3131; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3132; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3132; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3133; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3133; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3134; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3134; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3135; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3135; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3136; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3136; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3137; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3138; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3139; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3140; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3140; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3141; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3141; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3142; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3145; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3145; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3146; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3148; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3148; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3149; ID:0; [0x9a 0x4a 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001528 (31:0); +Idx:3154; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:3156; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001548 (31:0) ~[0x148] +Idx:3154; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001528:[0x1001548] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:3154; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001548; excep num (0x03) ) +Idx:3158; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:3160; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:3165; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3158; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:3165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3166; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:3167; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:3172; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3172; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3172; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3172; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3173; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:3175; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3176; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:3181; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3181; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3182; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3184; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3184; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3185; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3185; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3186; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3187; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:3192; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:3192; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3193; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3193; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:3193; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:3194; ID:0; [0x9a 0x53 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100154C (31:0); +Idx:3199; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:3201; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3199; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:3201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100154c:[0x1001590] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3201; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3202; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:3207; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3208; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3210; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3210; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3211; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3211; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3212; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3212; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3213; ID:0; [0x9a 0x64 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001590 (31:0); +Idx:3218; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001590:[0x10015dc] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3218; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3219; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3220; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3220; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3221; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3222; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3223; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3224; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3225; ID:0; [0x9a 0x77 0x0a 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010015DC (31:0); +Idx:3230; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10015dc:[0x1001628] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3231; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3232; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3233; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3234; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3235; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3236; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3237; ID:0; [0x9a 0x0a 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001628 (31:0); +Idx:3242; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001628:[0x100166c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3243; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3244; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3245; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3246; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3247; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3248; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3249; ID:0; [0x9a 0x1b 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100166C (31:0); +Idx:3254; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100166c:[0x1001674] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad40:[0x9ad5c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3255; ID:0; [0x9a 0x57 0x56 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009AD5C (31:0); +Idx:3260; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad5c:[0x9ad64] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3261; ID:0; [0x95 0x59 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AD64 (31:0) ~[0x164] +Idx:3263; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad64:[0x9ad84] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad84:[0x9ada4] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ada4:[0x9adcc] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3264; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9adcc:[0x9adec] num_i(8) last_sz(4) (ISA=A64) E iBR ) +Idx:3265; ID:0; [0x95 0xb5 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AED4 (31:0) ~[0x1AED4] +Idx:3268; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aed4:[0x9aedc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aedc:[0x9aef4] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3269; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3270; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3273; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3274; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3275; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3276; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3277; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3278; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3283; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3284; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3289; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3289; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3290; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3290; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3291; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3291; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3292; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3293; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3293; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3294; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3294; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3295; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3295; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3296; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3296; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3297; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3300; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3300; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3301; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3301; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3302; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3304; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3304; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3305; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3305; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3306; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3306; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3307; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3307; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3308; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3308; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3309; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3310; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3310; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3311; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3311; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3312; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3313; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3314; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3315; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3317; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3317; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3318; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3318; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3319; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3319; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3319; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3319; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3320; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3322; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3323; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3323; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3323; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3323; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3324; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3325; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3325; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3325; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3325; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3326; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3327; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3327; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3327; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3327; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3328; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3328; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3329; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3329; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3330; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3330; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3331; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3334; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3335; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3337; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3337; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3338; ID:0; [0x95 0xbd 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AEF4 (31:0) ~[0x1AEF4] +Idx:3341; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:3341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aef4:[0x9aef8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9af10:[0x9af40] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afa0:[0x9afb0] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3341; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3342; ID:0; [0x95 0x6c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AFB0 (31:0) ~[0x1B0] +Idx:3344; ID:0; [0xdd ]; I_ATOM_F4 : Atom format 4.; NNNN +Idx:3344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb0:[0x9afb8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb8:[0x9afbc] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afbc:[0x9afc4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afc4:[0x9afcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3345; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afcc:[0x9afdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b01c:[0x9b028] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3345; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3346; ID:0; [0x95 0x8a 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B028 (31:0) ~[0x1B028] +Idx:3349; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b028:[0x9b044] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3350; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3350; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3351; ID:0; [0x9a 0x1d 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001674 (31:0); +Idx:3356; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001674:[0x100167c] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3357; ID:0; [0x9a 0x0a 0x43 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00098628 (31:0); +Idx:3362; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3362; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3362; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3362; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3362; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3363; ID:0; [0x9a 0x1f 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100167C (31:0); +Idx:3368; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100167c:[0x1001688] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001688:[0x1001690] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b090:[0x9b0a4] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3369; ID:0; [0x9a 0x29 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B0A4 (31:0); +Idx:3374; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3374; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0a4:[0x9b0ac] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3374; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3375; ID:0; [0x95 0x2b ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B0AC (31:0) ~[0xAC] +Idx:3377; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:3377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0ac:[0x9b0d4] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0d4:[0x9b0f0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b158:[0x9b168] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b168:[0x9b180] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3377; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3378; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3379; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3382; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3382; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3383; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3383; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3384; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3385; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3385; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3386; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3386; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3387; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3392; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3392; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3393; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3398; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3398; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3399; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3399; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3400; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3400; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3401; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3401; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3402; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3402; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3403; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3403; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3404; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3404; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3405; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3408; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3408; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3409; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3409; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3410; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3412; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3412; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3413; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3413; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3414; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3414; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3415; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3416; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3416; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3417; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3417; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3418; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3418; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3419; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3419; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3420; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3420; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3421; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3423; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3423; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3424; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3425; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3426; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3428; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3428; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3429; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3430; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3431; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3431; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3432; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3432; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3433; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3433; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3434; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3435; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3436; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3437; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3438; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3441; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3441; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3442; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3444; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3445; ID:0; [0x95 0xe0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B180 (31:0) ~[0x1B180] +Idx:3448; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:3448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b180:[0x9b1a8] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b124:[0x9b144] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:3448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3448; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3449; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3449; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b144:[0x9b158] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3450; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3451; ID:0; [0x9a 0x24 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001690 (31:0); +Idx:3456; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:3458; ID:0; [0x95 0x36 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010016D8 (31:0) ~[0xD8] +Idx:3456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001690:[0x10016d8] num_i(18) last_sz(4) (ISA=A64) E --- ) +Idx:3456; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10016d8; excep num (0x02) ) +Idx:3460; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:3462; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:3467; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3460; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:3467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3468; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:3469; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:3474; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3475; ID:0; [0xd9 ]; I_ATOM_F2 : Atom format 2.; EN +Idx:3475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3476; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:3478; ID:0; [0x95 0xdf 0x87 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00010F7C (31:0) ~[0x10F7C] +Idx:3476; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f60:[0x10f7c] num_i(7) last_sz(4) (ISA=A64) E --- ) +Idx:3476; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10f7c; excep num (0x02) ) +Idx:3481; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:3482; ID:0; [0x82 0x36 0x0b 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????010016D8 (31:0); Ctxt: AArch64,EL0, NS; +Idx:3488; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3481; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:3482; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:3488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10016d8:[0x1001704] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3489; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3490; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:3495; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3496; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3496; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3497; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3497; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3498; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3499; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3499; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3500; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3505; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3506; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3511; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3512; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3512; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3513; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3513; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3514; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3514; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3515; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3515; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3516; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3516; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3517; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3518; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3518; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3519; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3519; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3520; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3520; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3521; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3521; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3522; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3522; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3523; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3524; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3524; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3525; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3525; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3526; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3526; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3527; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3528; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3528; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3529; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3529; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3530; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3531; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3532; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3532; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3532; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3532; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3533; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3533; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3534; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3534; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3535; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3536; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3536; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3536; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3536; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3537; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3537; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3538; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3538; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3538; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3538; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3539; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3540; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3540; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3540; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3540; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3541; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3541; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3542; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3542; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3543; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3543; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3544; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3544; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3544; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3544; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3545; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3545; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3546; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3546; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3547; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3547; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3547; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3547; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3548; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3548; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3549; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3549; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3550; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3550; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3550; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3550; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3551; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3551; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3552; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3552; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3553; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3553; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3554; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3555; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3556; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3557; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3558; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3558; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3559; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3559; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3560; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3560; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3561; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3561; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3562; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3562; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3563; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3564; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3564; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3565; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3565; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3566; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3567; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3567; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3568; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3568; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3569; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3569; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3570; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3571; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3571; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3572; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3572; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3573; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3573; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3574; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3575; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3575; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3576; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3576; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3577; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3577; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3578; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3579; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3579; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3579; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3579; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3580; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3580; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3581; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3581; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3582; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3583; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3586; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3586; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3587; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3589; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3589; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3590; ID:0; [0x9a 0x41 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001704 (31:0); +Idx:3595; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:3597; ID:0; [0x95 0x49 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001724 (31:0) ~[0x124] +Idx:3595; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001704:[0x1001724] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:3595; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001724; excep num (0x03) ) +Idx:3599; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:3600; ID:0; [0x82 0x4a 0x0b 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????01001728 (31:0); Ctxt: AArch64,EL0, NS; +Idx:3606; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3599; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:3600; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:3606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001728:[0x100176c] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3606; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3607; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:3612; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3612; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3613; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:3615; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3616; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3616; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3617; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3617; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3618; ID:0; [0x9a 0x5b 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100176C (31:0); +Idx:3623; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100176c:[0x10017b8] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3623; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3624; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3625; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3626; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3627; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3628; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3628; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3629; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3629; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3630; ID:0; [0x9a 0x6e 0x0b 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010017B8 (31:0); +Idx:3635; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10017b8:[0x1001804] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3635; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3636; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3637; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3637; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3638; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3639; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3640; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3641; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3642; ID:0; [0x9a 0x01 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001804 (31:0); +Idx:3647; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001804:[0x1001848] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3647; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3648; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:3649; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3649; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3650; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:3651; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3651; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3652; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3652; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3653; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3653; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3654; ID:0; [0x9a 0x12 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001848 (31:0); +Idx:3659; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001848:[0x1001850] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad40:[0x9ad5c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3659; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3660; ID:0; [0x9a 0x57 0x56 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009AD5C (31:0); +Idx:3665; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad5c:[0x9ad64] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3665; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3666; ID:0; [0x95 0x59 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AD64 (31:0) ~[0x164] +Idx:3668; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad64:[0x9ad84] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad84:[0x9ada4] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:3668; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ada4:[0x9adcc] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3669; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3669; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9adcc:[0x9adec] num_i(8) last_sz(4) (ISA=A64) E iBR ) +Idx:3670; ID:0; [0x95 0xb5 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AED4 (31:0) ~[0x1AED4] +Idx:3673; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aed4:[0x9aedc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aedc:[0x9aef4] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3674; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3675; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3678; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3678; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3679; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3679; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3680; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3680; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3681; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3681; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3682; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3682; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3683; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3688; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3689; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3694; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3694; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3695; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3695; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3696; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3696; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3697; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3697; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3698; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3698; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3699; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3699; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3700; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3700; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3701; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3701; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3702; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3705; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3705; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3706; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3706; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3707; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3709; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3709; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3710; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3710; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3711; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3711; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3712; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3712; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3713; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3713; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3714; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3715; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3715; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3716; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3716; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3717; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:3717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3717; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3718; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3718; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3719; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3719; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3720; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3722; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3722; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3723; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3723; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3724; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3725; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3727; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3727; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3728; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3728; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3729; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3729; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3730; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3730; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3730; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3730; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3731; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3731; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3732; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3732; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3732; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3732; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3733; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3733; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3734; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3734; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3735; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3735; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3736; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3739; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3740; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3742; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3742; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3743; ID:0; [0x95 0xbd 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AEF4 (31:0) ~[0x1AEF4] +Idx:3746; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:3746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aef4:[0x9aef8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9af10:[0x9af40] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afa0:[0x9afb0] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3747; ID:0; [0x95 0x6c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AFB0 (31:0) ~[0x1B0] +Idx:3749; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb0:[0x9afb8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb8:[0x9afbc] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3749; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afbc:[0x9afc4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3750; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afc4:[0x9afcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b01c:[0x9b028] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3750; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3751; ID:0; [0x95 0x8a 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B028 (31:0) ~[0x1B028] +Idx:3754; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3754; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b028:[0x9b044] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3755; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3755; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3756; ID:0; [0x9a 0x14 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001850 (31:0); +Idx:3761; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:3761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001850:[0x1001854] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001878:[0x1001880] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3761; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3762; ID:0; [0x9a 0x0a 0x43 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00098628 (31:0); +Idx:3767; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3767; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3768; ID:0; [0x9a 0x20 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001880 (31:0); +Idx:3773; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001880:[0x100188c] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100188c:[0x1001894] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3774; ID:0; [0x91 ]; I_ADDR_MATCH : Exact Address Match., [1]; Addr=0x????????00098628 (31:0); +Idx:3775; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3776; ID:0; [0x9a 0x25 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001894 (31:0); +Idx:3781; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001894:[0x10018a0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10018a0:[0x10018a8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b090:[0x9b0a4] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3781; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:3782; ID:0; [0x9a 0x29 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B0A4 (31:0); +Idx:3787; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3787; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0a4:[0x9b0ac] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3787; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3788; ID:0; [0x95 0x2b ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B0AC (31:0) ~[0xAC] +Idx:3790; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:3790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0ac:[0x9b0d4] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b0d4:[0x9b0f0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b158:[0x9b168] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b168:[0x9b180] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3791; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3792; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:3795; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3796; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3797; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3798; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3799; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3800; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3805; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3806; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3811; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3812; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3812; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3813; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3813; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3814; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3815; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3815; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3816; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3816; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3817; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3817; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3818; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:3821; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3822; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3823; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:3825; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3825; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3826; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3826; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3827; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3827; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3828; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3828; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3829; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3829; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3830; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3830; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3831; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3831; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3832; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3832; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3833; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3833; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:3834; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:3836; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3837; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:3837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3838; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:3838; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3839; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:3841; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3841; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3842; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3842; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3843; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3843; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3844; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3844; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3845; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3845; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3846; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3846; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3847; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3847; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3848; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3848; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3849; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3849; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3850; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3850; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3851; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3854; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3854; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3855; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3857; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3857; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3858; ID:0; [0x95 0xe0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B180 (31:0) ~[0x1B180] +Idx:3861; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:3861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b180:[0x9b1a8] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:3861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b124:[0x9b144] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:3861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3861; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b134:[0x9b144] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3862; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3862; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b144:[0x9b158] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3863; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3863; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3864; ID:0; [0x9a 0x2a 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010018A8 (31:0); +Idx:3869; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:3871; ID:0; [0x95 0x3c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????010018F0 (31:0) ~[0xF0] +Idx:3869; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10018a8:[0x10018f0] num_i(18) last_sz(4) (ISA=A64) E --- ) +Idx:3869; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10018f0; excep num (0x02) ) +Idx:3873; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:3875; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:3880; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3873; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:3880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3880; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3881; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3881; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:3882; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:3887; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3887; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3888; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:3888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3888; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3889; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:3891; ID:0; [0x95 0xed 0x87 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00010FB4 (31:0) ~[0x10FB4] +Idx:3889; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb0:[0x10fb4] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:3889; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10fb4; excep num (0x03) ) +Idx:3894; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:3895; ID:0; [0x82 0x6d 0x07 0x01 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????00010FB4 (31:0); Ctxt: AArch64,EL1, NS; +Idx:3901; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3894; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:3895; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:3901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb4:[0x10fb8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3901; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fe0:[0x10ff4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3902; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:3902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1132c:[0x1134c] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:3902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3902; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3903; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:3903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11384:[0x11390] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:3903; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:3903; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:3904; ID:0; [0x9a 0x3c 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010018F0 (31:0); +Idx:3909; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:3911; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:3909; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:3911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10018f0:[0x100191c] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3911; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:3912; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3912; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3913; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:3918; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:3918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3918; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3919; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3919; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3920; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3920; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:3921; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:3921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3921; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:3922; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3922; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3923; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:3928; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3928; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3929; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:3934; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3934; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:3934; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3934; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3935; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3935; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3935; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3935; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3936; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3936; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3937; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:3937; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:3938; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3938; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3938; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:3938; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3939; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3939; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3940; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3940; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3941; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3941; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3942; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3942; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3943; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3943; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3944; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3944; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3945; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3945; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3946; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3946; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3947; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3947; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3947; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3947; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3948; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3948; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3948; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3948; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3949; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3949; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3950; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3950; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3950; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3950; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3951; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3951; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3952; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3952; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3952; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3952; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3953; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3953; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3954; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3954; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3954; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3954; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3955; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3955; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3956; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3956; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3956; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3956; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3957; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3957; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3958; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3958; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3959; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3959; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3960; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3960; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3960; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3960; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3961; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3961; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3962; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3962; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3963; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3963; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3964; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3964; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3965; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3965; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3966; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3966; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3967; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3967; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3968; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3968; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3969; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3969; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3970; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3970; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3971; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3971; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3972; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3972; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3973; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3973; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3974; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3974; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3975; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3975; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3975; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3975; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3976; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3976; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3977; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3977; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3978; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:3978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3978; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3979; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:3979; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3979; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3979; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3980; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3980; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3981; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3981; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3982; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3982; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3983; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3983; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3984; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3984; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3985; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3985; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3986; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3986; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3987; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:3987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3987; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3988; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:3988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:3988; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3989; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3989; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3990; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:3990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3990; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3991; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:3991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:3991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:3991; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:3992; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:3992; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:3992; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:3992; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3993; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:3996; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:3996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:3996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:3996; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:3997; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:3999; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:3999; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4000; ID:0; [0x9a 0x47 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0100191C (31:0); +Idx:4005; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4007; ID:0; [0x95 0x4f ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0100193C (31:0) ~[0x13C] +Idx:4005; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x100191c:[0x100193c] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:4005; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x100193c; excep num (0x03) ) +Idx:4009; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4011; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4016; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4009; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4016; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de54:[0x3de5c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4017; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4017; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4018; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4023; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4023; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4024; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:4026; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4026; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4027; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4032; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4032; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4033; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4035; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4035; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4036; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4036; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4037; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4037; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4038; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:4043; ID:0; [0xf6 ]; I_ATOM_F1 : Atom format 1.; N +Idx:4043; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4044; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1134c:[0x1135c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4044; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4044; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4045; ID:0; [0x9a 0x50 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001940 (31:0); +Idx:4050; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:4052; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4050; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:4052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001940:[0x1001984] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4052; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4053; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4058; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4058; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4059; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4061; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4061; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4062; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4062; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4063; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4063; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4064; ID:0; [0x9a 0x61 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001984 (31:0); +Idx:4069; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001984:[0x10019d0] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4069; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4070; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4071; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4071; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4072; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4073; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4073; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4074; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4074; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4075; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4075; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4076; ID:0; [0x9a 0x74 0x0c 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????010019D0 (31:0); +Idx:4081; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10019d0:[0x1001a1c] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4081; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4082; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4083; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4083; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4084; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4085; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4085; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4086; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4086; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4087; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4087; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4088; ID:0; [0x9a 0x07 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001A1C (31:0); +Idx:4093; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a1c:[0x1001a60] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4093; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4094; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4095; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4095; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4096; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4097; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4097; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4098; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4098; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4099; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4099; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4100; ID:0; [0x9a 0x18 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001A60 (31:0); +Idx:4105; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4107; ID:0; [0x95 0x1c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001A70 (31:0) ~[0x70] +Idx:4105; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a60:[0x1001a70] num_i(4) last_sz(4) (ISA=A64) E --- ) +Idx:4105; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001a70; excep num (0x02) ) +Idx:4109; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4111; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4116; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4109; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4116; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4117; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4117; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4118; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4123; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4123; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4124; ID:0; [0xe1 ]; I_ATOM_F6 : Atom format 6.; EEEEN +Idx:4124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4124; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4125; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4127; ID:0; [0x95 0xed 0x87 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00010FB4 (31:0) ~[0x10FB4] +Idx:4125; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb0:[0x10fb4] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4125; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x10fb4; excep num (0x03) ) +Idx:4130; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4131; ID:0; [0x82 0x6d 0x07 0x01 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????00010FB4 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4137; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4130; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4131; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb4:[0x10fb8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4137; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fe0:[0x10ff4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4138; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1132c:[0x1134c] num_i(8) last_sz(4) (ISA=A64) E BR ) +Idx:4138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4138; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4139; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11384:[0x11390] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4139; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4139; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4140; ID:0; [0x9a 0x1c 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001A70 (31:0); +Idx:4145; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:4147; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4149; ID:0; [0x95 0x1d ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001A74 (31:0) ~[0x74] +Idx:4145; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:4147; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a70:[0x1001a74] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4147; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001a74; excep num (0x02) ) +Idx:4151; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4153; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4158; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4151; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4158; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4159; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4159; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4160; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4165; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4165; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4166; ID:0; [0xc3 ]; I_ATOM_F6 : Atom format 6.; EEEEEEE +Idx:4166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb8:[0x10fc4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4166; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4167; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:4169; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4169; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4170; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4175; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4175; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4176; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4178; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4178; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4179; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4179; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4180; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4180; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4181; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:4186; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4186; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4187; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4189; ID:0; [0x95 0x60 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011380 (31:0) ~[0x180] +Idx:4187; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1137c:[0x11380] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4187; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x11380; excep num (0x03) ) +Idx:4191; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4192; ID:0; [0x82 0x1d 0x0d 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????01001A74 (31:0); Ctxt: AArch64,EL0, NS; +Idx:4198; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4191; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4192; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:4198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001a74:[0x1001aa0] num_i(11) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad30:[0x9ad34] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4198; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4199; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4199; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4200; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:4205; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4205; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4206; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4206; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4207; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4207; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:4208; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4208; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4209; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4209; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4210; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:4215; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4215; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4216; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:4221; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4221; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4222; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4222; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4223; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4223; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4224; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4224; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4225; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4225; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4226; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4226; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4227; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4227; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4228; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4228; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4229; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4229; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4230; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4230; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4231; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4231; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4232; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4232; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4233; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4233; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4234; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4234; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4235; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4235; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4236; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4236; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4237; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4237; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4238; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4238; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4239; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4239; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4240; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4240; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4241; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4241; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4242; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4242; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4243; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4243; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4244; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4244; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4245; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4245; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4246; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4246; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4247; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4247; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4248; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4248; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4249; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4249; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4250; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4250; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4251; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4251; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4252; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4252; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4253; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4253; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4254; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4254; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4255; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4255; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4256; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4256; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4257; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4257; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4258; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4258; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4259; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4259; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4260; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4260; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4261; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4261; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4262; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4262; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4263; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4263; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4264; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4264; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4265; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4265; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4266; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4266; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4267; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4267; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4268; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4268; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4269; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4269; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4270; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4270; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4271; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4271; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4272; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4272; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4273; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4273; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4274; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4274; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4275; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4275; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4276; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4276; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4277; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4277; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4278; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4278; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4279; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4279; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4280; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:4283; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4283; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4284; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:4286; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4286; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4287; ID:0; [0x9a 0x28 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001AA0 (31:0); +Idx:4292; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4294; ID:0; [0x95 0x30 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001AC0 (31:0) ~[0xC0] +Idx:4292; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001aa0:[0x1001ac0] num_i(8) last_sz(4) (ISA=A64) E --- ) +Idx:4292; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001ac0; excep num (0x03) ) +Idx:4296; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4297; ID:0; [0x82 0x31 0x0d 0x00 0x01 0x30 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????01001AC4 (31:0); Ctxt: AArch64,EL0, NS; +Idx:4303; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4296; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4297; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:4303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001ac4:[0x1001b08] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4303; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4304; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4309; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4309; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4310; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4312; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4312; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4313; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4313; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4314; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4314; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4315; ID:0; [0x9a 0x42 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001B08 (31:0); +Idx:4320; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001b08:[0x1001b54] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4320; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4321; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4322; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4322; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4323; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4324; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4324; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4325; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4325; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4326; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4326; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4327; ID:0; [0x9a 0x55 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001B54 (31:0); +Idx:4332; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001b54:[0x1001ba0] num_i(19) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4332; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4333; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4334; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4334; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4335; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4336; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4336; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4337; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4337; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4338; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4338; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4339; ID:0; [0x9a 0x68 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BA0 (31:0); +Idx:4344; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001ba0:[0x1001be4] num_i(17) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4344; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4345; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C0 (31:0); +Idx:4346; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4346; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4346; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4347; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????0009B1C8 (31:0); +Idx:4348; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4348; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4349; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4349; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4350; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4350; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4351; ID:0; [0x9a 0x79 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BE4 (31:0); +Idx:4356; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4358; ID:0; [0x95 0x7a ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????01001BE8 (31:0) ~[0x1E8] +Idx:4356; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001be4:[0x1001be8] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4356; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x1001be8; excep num (0x02) ) +Idx:4360; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4362; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4367; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4360; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4367; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4368; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4368; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x40908:[0x40924] num_i(7) last_sz(4) (ISA=A64) E iBR ) +Idx:4369; ID:0; [0x9a 0x00 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011200 (31:0); +Idx:4374; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4374; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11200:[0x11214] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4374; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10efc:[0x10f2c] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4374; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f2c:[0x10f38] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4375; ID:0; [0xc3 ]; I_ATOM_F6 : Atom format 6.; EEEEEEE +Idx:4375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f40:[0x10f4c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f54:[0x10f60] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f7c:[0x10f88] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10f90:[0x10f9c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fa4:[0x10fb0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fb8:[0x10fc4] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4375; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x10fcc:[0x10fe0] num_i(5) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4376; ID:0; [0x95 0x05 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00011214 (31:0) ~[0x14] +Idx:4378; ID:0; [0xc5 ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEE +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11214:[0x1122c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1126c:[0x11280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11288:[0x1129c] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112a4:[0x112b8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112c0:[0x112d8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112e0:[0x112f4] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x112fc:[0x11324] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1a8:[0x9b1c0] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4378; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4379; ID:0; [0x9a 0x70 0x58 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009B1C0 (31:0); +Idx:4384; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c0:[0x9b1c8] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4384; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4385; ID:0; [0x95 0x72 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B1C8 (31:0) ~[0x1C8] +Idx:4387; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b1c8:[0x9b1f0] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b210:[0x9b228] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4387; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b228:[0x9b234] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4388; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4388; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b26c:[0x9b280] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4389; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4389; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4390; ID:0; [0x9a 0x49 0x09 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00011324 (31:0); +Idx:4395; ID:0; [0xdf ]; I_ATOM_F4 : Atom format 4.; ENEN +Idx:4395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11324:[0x1134c] num_i(10) last_sz(4) (ISA=A64) E BR ) +Idx:4395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1135c:[0x1136c] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1136c:[0x1137c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4395; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11384:[0x11390] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4396; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4398; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????000113A0 (31:0) ~[0x1A0] +Idx:4396; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x11390:[0x113a0] num_i(4) last_sz(4) (ISA=A64) E --- ) +Idx:4396; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x113a0; excep num (0x03) ) +Idx:4400; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4401; ID:0; [0x82 0x68 0x09 0x01 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????000113A0 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4407; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4400; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4401; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4407; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x113a0:[0x113bc] num_i(7) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4407; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4408; ID:0; [0x9a 0x7a 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BE8 (31:0); +Idx:4413; ID:0; [0x81 0x30 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; +Idx:4415; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4413; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL0N; 64-bit; VMID=0x0; ) +Idx:4415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001be8:[0x1001bf0] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad40:[0x9ad5c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4415; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7330:[0xa7338] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4416; ID:0; [0x9a 0x57 0x56 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009AD5C (31:0); +Idx:4421; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad5c:[0x9ad64] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4421; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4422; ID:0; [0x95 0x59 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AD64 (31:0) ~[0x164] +Idx:4424; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad64:[0x9ad84] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:4424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ad84:[0x9ada4] num_i(8) last_sz(4) (ISA=A64) N BR ) +Idx:4424; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ada4:[0x9adcc] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4425; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4425; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9adcc:[0x9adec] num_i(8) last_sz(4) (ISA=A64) E iBR ) +Idx:4426; ID:0; [0x95 0xb5 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AED4 (31:0) ~[0x1AED4] +Idx:4429; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:4429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aed4:[0x9aedc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aedc:[0x9aef4] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4429; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4430; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4430; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4431; ID:0; [0x95 0xcd 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C534 (31:0) ~[0x1C534] +Idx:4434; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4434; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4435; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4435; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4436; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4436; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:4437; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4437; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4438; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4438; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4439; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:4444; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4444; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4445; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:4450; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4450; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4451; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4451; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4452; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4452; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4453; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4453; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4454; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4454; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4455; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4455; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4456; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4456; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4457; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4457; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:4458; ID:0; [0x95 0xb8 0x96 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092CE0 (31:0) ~[0x12CE0] +Idx:4461; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce0:[0x92ce8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ce8:[0x92cf8] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92e88:[0x92e94] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d04:[0x92d10] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4461; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4462; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c0:[0x956dc] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4462; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9570c:[0x95728] num_i(7) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4463; ID:0; [0x95 0x44 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D10 (31:0) ~[0x110] +Idx:4465; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d10:[0x92d18] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4465; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4466; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4466; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4467; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4467; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4468; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4468; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4469; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4469; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4470; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4470; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4471; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4471; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4472; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4472; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4473; ID:0; [0xde ]; I_ATOM_F4 : Atom format 4.; NENE +Idx:4473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4473; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4474; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4474; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c30:[0x92c44] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4475; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c44:[0x92c48] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cc4:[0x92cd0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4475; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92cd0:[0x92ce0] num_i(4) last_sz(4) (ISA=A64) E iBR ) +Idx:4476; ID:0; [0x95 0x46 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D18 (31:0) ~[0x118] +Idx:4478; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d18:[0x92d20] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d20:[0x92d30] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f50:[0x92f5c] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4478; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d3c:[0x92d48] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4479; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9566c:[0x95680] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95680:[0x956bc] num_i(15) last_sz(4) (ISA=A64) N BR ) +Idx:4479; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956bc:[0x956c0] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4480; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956c4:[0x956dc] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x956dc:[0x95704] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4480; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x95704:[0x9570c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4481; ID:0; [0x95 0x52 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00092D48 (31:0) ~[0x148] +Idx:4483; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92d48:[0x92d50] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4483; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4484; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4484; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4485; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4485; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4486; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4486; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4487; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4487; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4488; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4488; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4489; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4489; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4490; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4490; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4491; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4491; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4492; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:4495; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4495; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4496; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:4498; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4498; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4499; ID:0; [0x95 0xbd 0xd7 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AEF4 (31:0) ~[0x1AEF4] +Idx:4502; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:4502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9aef4:[0x9aef8] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9af10:[0x9af40] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afa0:[0x9afb0] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4502; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4503; ID:0; [0x95 0x6c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009AFB0 (31:0) ~[0x1B0] +Idx:4505; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb0:[0x9afb8] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afb8:[0x9afbc] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4505; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afbc:[0x9afc4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4506; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9afc4:[0x9afcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b01c:[0x9b028] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4506; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4507; ID:0; [0x95 0x8a 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009B028 (31:0) ~[0x1B028] +Idx:4510; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4510; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b028:[0x9b044] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4511; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4511; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7338:[0xa7340] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4512; ID:0; [0x9a 0x7c 0x0d 0x00 0x01 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????01001BF0 (31:0); +Idx:4517; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:4517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001bf0:[0x1001bf4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001c18:[0x1001c1c] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1001c40:[0x1001c44] num_i(1) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d7cc:[0x9d7d8] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4517; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4518; ID:0; [0x9a 0x76 0x6b 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009D7D8 (31:0); +Idx:4523; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d7d8:[0x9d80c] num_i(13) last_sz(4) (ISA=A64) E BR ) +Idx:4523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d854:[0x9d86c] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d398:[0x9d3ac] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4523; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4524; ID:0; [0x95 0xeb 0xe9 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D3AC (31:0) ~[0x1D3AC] +Idx:4527; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3ac:[0x9d3d4] num_i(10) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4527; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4528; ID:0; [0x95 0x75 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D3D4 (31:0) ~[0x1D4] +Idx:4530; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3d4:[0x9d3ec] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3ec:[0x9d408] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4530; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d408:[0x9d42c] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4531; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d3f8:[0x9d408] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d42c:[0x9d44c] num_i(8) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4531; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4532; ID:0; [0x95 0x93 0xea ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D44C (31:0) ~[0x1D44C] +Idx:4535; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d44c:[0x9d464] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4535; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d46c:[0x9d47c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4536; ID:0; [0x95 0x9b 0xec ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009D86C (31:0) ~[0x1D86C] +Idx:4539; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4539; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9d86c:[0x9d874] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4540; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4542; ID:0; [0x9a 0x4b 0x39 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A732C (31:0); +Idx:4540; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7328:[0xa732c] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4540; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xa732c; excep num (0x02) ) +Idx:4547; ID:0; [0x81 0x31 ]; I_CTXT : Context Packet.; Ctxt: AArch64,EL1, NS; +Idx:4549; ID:0; [0x9a 0x00 0x42 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038400 (31:0); +Idx:4554; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4547; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38400:[0x38404] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de3c:[0x3de54] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4554; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de5c:[0x3de68] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4555; ID:0; [0xdd ]; I_ATOM_F4 : Atom format 4.; NNNN +Idx:4555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de68:[0x3de70] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de70:[0x3de78] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de78:[0x3de80] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4555; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de80:[0x3de88] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4556; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3de88:[0x3de90] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x407d4:[0x407e4] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4556; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x407e4:[0x40800] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4557; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x137a0:[0x13840] num_i(40) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4557; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4558; ID:0; [0x9a 0x10 0x1c 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013840 (31:0); +Idx:4563; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13840:[0x13848] num_i(2) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4563; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9856c:[0x98578] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4564; ID:0; [0x95 0x12 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00013848 (31:0) ~[0x48] +Idx:4566; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4566; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13848:[0x13854] num_i(3) last_sz(4) (ISA=A64) E iBR b+link ) +Idx:4567; ID:0; [0x95 0xe7 0xa1 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0001439C (31:0) ~[0x1439C] +Idx:4570; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4570; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1439c:[0x143a4] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4571; ID:0; [0x95 0x95 0x9c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00013854 (31:0) ~[0x13854] +Idx:4574; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13854:[0x13864] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14340:[0x14350] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4574; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14dac:[0x14dc4] num_i(6) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4575; ID:0; [0x95 0xd4 0xa1 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00014350 (31:0) ~[0x14350] +Idx:4578; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4578; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14350:[0x14360] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4579; ID:0; [0x95 0x99 0x9c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00013864 (31:0) ~[0x13864] +Idx:4582; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13864:[0x13870] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4582; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4583; ID:0; [0x9a 0x0a 0x43 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00098628 (31:0); +Idx:4588; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4588; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4589; ID:0; [0x9a 0x1c 0x1c 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013870 (31:0); +Idx:4594; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13870:[0x1388c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9876c:[0x98778] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98794:[0x987a0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4594; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x987b0:[0x987bc] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4595; ID:0; [0x95 0x23 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0001388C (31:0) ~[0x8C] +Idx:4597; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1388c:[0x138e0] num_i(21) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x144fc:[0x14568] num_i(27) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4597; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4598; ID:0; [0x92 ]; I_ADDR_MATCH : Exact Address Match., [2]; Addr=0x????????00098628 (31:0); +Idx:4599; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4599; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4600; ID:0; [0x9a 0x5a 0x22 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014568 (31:0); +Idx:4605; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14568:[0x14580] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4605; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4606; ID:0; [0x91 ]; I_ADDR_MATCH : Exact Address Match., [1]; Addr=0x????????00098628 (31:0); +Idx:4607; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4607; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4608; ID:0; [0x9a 0x60 0x22 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014580 (31:0); +Idx:4613; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14580:[0x14598] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98618:[0x98628] num_i(4) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4613; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7350:[0xa7358] num_i(2) last_sz(4) (ISA=A64) E iBR ) +Idx:4614; ID:0; [0x91 ]; I_ADDR_MATCH : Exact Address Match., [1]; Addr=0x????????00098628 (31:0); +Idx:4615; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98628:[0x98634] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98634:[0x9863c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98654:[0x98678] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4615; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9868c:[0x9869c] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4616; ID:0; [0x9a 0x66 0x22 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014598 (31:0); +Idx:4621; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14598:[0x145b4] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9876c:[0x98778] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98794:[0x987a0] num_i(3) last_sz(4) (ISA=A64) E BR ) +Idx:4621; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x987b0:[0x987bc] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4622; ID:0; [0x95 0x6d ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????000145B4 (31:0) ~[0x1B4] +Idx:4624; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x145b4:[0x14610] num_i(23) last_sz(4) (ISA=A64) E BR ) +Idx:4624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14614:[0x14624] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4624; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14624:[0x14628] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4625; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14630:[0x14640] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14644:[0x1464c] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4625; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14658:[0x14680] num_i(10) last_sz(4) (ISA=A64) N BR ) +Idx:4626; ID:0; [0xc1 ]; I_ATOM_F6 : Atom format 6.; EEEEE +Idx:4626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14680:[0x14684] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14690:[0x146a8] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146ac:[0x146c8] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa6fc4:[0xa6fd8] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4626; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7010:[0xa7018] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4627; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4629; ID:0; [0x9a 0x11 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A7044 (31:0); +Idx:4627; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7030:[0xa7044] num_i(5) last_sz(4) (ISA=A64) E --- ) +Idx:4627; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xa7044; excep num (0x02) ) +Idx:4634; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4639; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4639; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4640; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4640; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4641; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38874:[0x38884] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3888c:[0x388a8] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38914:[0x38930] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4641; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38944:[0x38960] num_i(7) last_sz(4) (ISA=A64) E iBR b+link ) +Idx:4642; ID:0; [0x95 0xb0 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0C0 (31:0) ~[0x1B0C0] +Idx:4645; ID:0; [0x06 0x07 ]; I_EXCEPT : Exception.; Trap; Ret Addr Follows; +Idx:4647; ID:0; [0x95 0x31 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0C4 (31:0) ~[0xC4] +Idx:4645; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0c0:[0x3b0c4] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4645; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x3b0c4; excep num (0x03) ) +Idx:4649; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4650; ID:0; [0x82 0x31 0x58 0x03 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????0003B0C4 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4656; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4649; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4650; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4656; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0c4:[0x3b0c8] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4657; ID:0; [0x95 0xd8 0xc4 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00038960 (31:0) ~[0x18960] +Idx:4660; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38960:[0x38974] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4660; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x389a0:[0x389a4] num_i(1) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4660; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4661; ID:0; [0x9a 0x11 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A7044 (31:0); +Idx:4666; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4666; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7044:[0xa704c] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4667; ID:0; [0x9a 0x32 0x23 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000146C8 (31:0); +Idx:4672; ID:0; [0xf5 ]; I_ATOM_F5 : Atom format 5.; NEEEE +Idx:4672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146c8:[0x146d0] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146d0:[0x146d4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146ec:[0x146f4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x146f8:[0x14714] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4672; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa713c:[0xa7150] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4673; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4673; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa7188:[0xa7190] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4674; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4676; ID:0; [0x9a 0x79 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A71E4 (31:0); +Idx:4674; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa71d0:[0xa71e4] num_i(5) last_sz(4) (ISA=A64) E --- ) +Idx:4674; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0xa71e4; excep num (0x02) ) +Idx:4681; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4686; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4686; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4687; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4687; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4688; ID:0; [0xc0 ]; I_ATOM_F6 : Atom format 6.; EEEE +Idx:4688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38874:[0x38884] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3888c:[0x388a8] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38914:[0x38930] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4688; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38944:[0x38960] num_i(7) last_sz(4) (ISA=A64) E iBR b+link ) +Idx:4689; ID:0; [0x95 0xb2 0xd8 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0C8 (31:0) ~[0x1B0C8] +Idx:4692; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0c8:[0x3b0d4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0d4:[0x3b0dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4692; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0e4:[0x3b0ec] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4693; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4695; ID:0; [0x95 0x3c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0003B0F0 (31:0) ~[0xF0] +Idx:4693; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0ec:[0x3b0f0] num_i(1) last_sz(4) (ISA=A64) E --- ) +Idx:4693; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x3b0f0; excep num (0x02) ) +Idx:4697; ID:0; [0x04 ]; I_TRACE_ON : Trace On. +Idx:4698; ID:0; [0x82 0x3c 0x58 0x03 0x00 0x31 ]; I_ADDR_CTXT_L_32IS0 : Address & Context, Long, 32 bit, IS0.; Addr=0x????????0003B0F0 (31:0); Ctxt: AArch64,EL1, NS; +Idx:4704; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4697; ID:2; OCSD_GEN_TRC_ELEM_TRACE_ON( [begin or filter]) +Idx:4698; ID:2; OCSD_GEN_TRC_ELEM_PE_CONTEXT((ISA=A64) EL1N; 64-bit; VMID=0x0; ) +Idx:4704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b0f0:[0x3b0f4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4704; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b12c:[0x3b130] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4705; ID:0; [0x95 0xd8 0xc4 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????00038960 (31:0) ~[0x18960] +Idx:4708; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38960:[0x38974] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4708; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x389a0:[0x389a4] num_i(1) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4708; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4709; ID:0; [0x9a 0x79 0x38 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A71E4 (31:0); +Idx:4714; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4714; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0xa71e4:[0xa71ec] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4715; ID:0; [0x9a 0x45 0x23 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00014714 (31:0); +Idx:4720; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4720; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14714:[0x14720] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4721; ID:0; [0x95 0xb8 0x9c ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????000138E0 (31:0) ~[0x138E0] +Idx:4724; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x138e0:[0x138f8] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x138f8:[0x138fc] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4724; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13910:[0x1392c] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4725; ID:0; [0xfe ]; I_ATOM_F3 : Atom format 3.; NEE +Idx:4725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b6f4:[0x9b708] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b708:[0x9b710] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4725; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b760:[0x9b774] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4726; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4728; ID:0; [0x9a 0x10 0x78 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F040 (31:0); +Idx:4726; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f038:[0x9f040] num_i(2) last_sz(4) (ISA=A64) E --- ) +Idx:4726; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x9f040; excep num (0x02) ) +Idx:4733; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4738; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4738; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4739; ID:0; [0xd5 ]; I_ATOM_F5 : Atom format 5.; NNNNN +Idx:4739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38848:[0x38850] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4739; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38850:[0x38858] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4740; ID:0; [0xdc ]; I_ATOM_F4 : Atom format 4.; NEEE +Idx:4740; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38858:[0x38860] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4740; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38860:[0x38868] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4740; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b198:[0x3b1ac] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4740; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9b7cc:[0x9b7e0] num_i(5) last_sz(4) (ISA=A64) E iBR ) +Idx:4741; ID:0; [0x9a 0x20 0x7c 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F880 (31:0); +Idx:4746; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4746; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f880:[0x9f888] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4747; ID:0; [0x9a 0x6b 0x58 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0003B1AC (31:0); +Idx:4752; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4752; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b1ac:[0x3b1b4] num_i(2) last_sz(4) (ISA=A64) E iBR A64:eret ) +Idx:4752; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION_RET() +Idx:4753; ID:0; [0x9a 0x10 0x78 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F040 (31:0); +Idx:4758; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4758; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f040:[0x9f048] num_i(2) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4759; ID:0; [0x9a 0x4b 0x1c 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0001392C (31:0); +Idx:4764; ID:0; [0xd6 ]; I_ATOM_F5 : Atom format 5.; NENEN +Idx:4764; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1392c:[0x1398c] num_i(24) last_sz(4) (ISA=A64) N BR ) +Idx:4764; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1398c:[0x13990] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4764; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13ff8:[0x14008] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4764; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14008:[0x1400c] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4764; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14048:[0x14058] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4765; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14058:[0x1405c] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14078:[0x14088] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x14094:[0x140ac] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4765; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c4f0:[0x9c520] num_i(12) last_sz(4) (ISA=A64) N BR ) +Idx:4766; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4766; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c520:[0x9c534] num_i(5) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4766; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9895c:[0x9896c] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4766; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x98970:[0x98974] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4767; ID:0; [0x9a 0x4d 0x62 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009C534 (31:0); +Idx:4772; ID:0; [0xe0 ]; I_ATOM_F6 : Atom format 6.; EEEN +Idx:4772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c534:[0x9c584] num_i(20) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b48:[0x92b80] num_i(14) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13518:[0x13524] num_i(3) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4772; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135cc:[0x135d4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4773; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x135d4:[0x135dc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x1363c:[0x13644] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4773; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13644:[0x13658] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4774; ID:0; [0xea ]; I_ATOM_F6 : Atom format 6.; EEEEEEEEEEEEEN +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13658:[0x13688] num_i(12) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4774; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13664:[0x13688] num_i(9) last_sz(4) (ISA=A64) N BR ) +Idx:4775; ID:0; [0xf8 ]; I_ATOM_F3 : Atom format 3.; NNN +Idx:4775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13688:[0x136a0] num_i(6) last_sz(4) (ISA=A64) N BR ) +Idx:4775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136a0:[0x136ac] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4775; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136ac:[0x136bc] num_i(4) last_sz(4) (ISA=A64) N BR ) +Idx:4776; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4776; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x136bc:[0x136c8] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4777; ID:0; [0x9a 0x49 0x1a 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00013524 (31:0); +Idx:4782; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4782; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x13524:[0x13530] num_i(3) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4783; ID:0; [0x9a 0x60 0x15 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00092B80 (31:0); +Idx:4788; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4788; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92b80:[0x92ba4] num_i(9) last_sz(4) (ISA=A64) E BR ) +Idx:4788; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4788; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4789; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4789; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4790; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4790; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4791; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4791; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4792; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4792; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4793; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4793; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4794; ID:0; [0xf9 ]; I_ATOM_F3 : Atom format 3.; ENN +Idx:4794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92ba4:[0x92bc0] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4794; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) N BR ) +Idx:4795; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc4:[0x92bcc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bcc:[0x92bdc] num_i(4) last_sz(4) (ISA=A64) E BR ) +Idx:4795; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be0:[0x92bf4] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4796; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4796; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4797; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4797; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4798; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4798; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4799; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4799; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4800; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4800; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4801; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4801; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4802; ID:0; [0xfa ]; I_ATOM_F3 : Atom format 3.; NEN +Idx:4802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4802; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4803; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) N BR ) +Idx:4803; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c10:[0x92c28] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4804; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92be8:[0x92bf4] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4804; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4805; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bf4:[0x92bfc] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4805; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bfc:[0x92c10] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4806; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bec:[0x92bf4] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92c94:[0x92cb0] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4806; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bb4:[0x92bc0] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4807; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92bc0:[0x92bc4] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4807; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x92f98:[0x92fbc] num_i(9) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4808; ID:0; [0x95 0xe1 0xe2 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C584 (31:0) ~[0x1C584] +Idx:4811; ID:0; [0xff ]; I_ATOM_F3 : Atom format 3.; EEE +Idx:4811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c584:[0x9c5a0] num_i(7) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba5c:[0x9ba70] num_i(5) last_sz(4) (ISA=A64) E BR ) +Idx:4811; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9ba7c:[0x9ba80] num_i(1) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4812; ID:0; [0x95 0x68 ]; I_ADDR_S_IS0 : Address, Short, IS0.; Addr=0x????????0009C5A0 (31:0) ~[0x1A0] +Idx:4814; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4814; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9c5a0:[0x9c5b0] num_i(4) last_sz(4) (ISA=A64) E iBR A64:ret ) +Idx:4815; ID:0; [0x9a 0x2b 0x20 0x01 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000140AC (31:0); +Idx:4820; ID:0; [0xfd ]; I_ATOM_F3 : Atom format 3.; ENE +Idx:4820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x140ac:[0x140d0] num_i(9) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9db4c:[0x9db68] num_i(7) last_sz(4) (ISA=A64) N BR ) +Idx:4820; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9db68:[0x9db70] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4821; ID:0; [0xf7 ]; I_ATOM_F1 : Atom format 1.; E +Idx:4821; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9dbd0:[0x9dbec] num_i(7) last_sz(4) (ISA=A64) E BR ) +Idx:4822; ID:0; [0x06 0x05 ]; I_EXCEPT : Exception.; Call; Ret Addr Follows; +Idx:4824; ID:0; [0x9a 0x14 0x78 0x09 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????0009F050 (31:0); +Idx:4822; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9f048:[0x9f050] num_i(2) last_sz(4) (ISA=A64) E --- ) +Idx:4822; ID:2; OCSD_GEN_TRC_ELEM_EXCEPTION(pref ret addr:0x9f050; excep num (0x02) ) +Idx:4829; ID:0; [0x9a 0x00 0x41 0x03 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????00038200 (31:0); +Idx:4834; ID:0; [0xfb ]; I_ATOM_F3 : Atom format 3.; EEN +Idx:4834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38200:[0x38204] num_i(1) last_sz(4) (ISA=A64) E BR ) +Idx:4834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38804:[0x3881c] num_i(6) last_sz(4) (ISA=A64) E BR ) +Idx:4834; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38824:[0x38830] num_i(3) last_sz(4) (ISA=A64) N BR ) +Idx:4835; ID:0; [0xd5 ]; I_ATOM_F5 : Atom format 5.; NNNNN +Idx:4835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38830:[0x38838] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38838:[0x38840] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38840:[0x38848] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38848:[0x38850] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4835; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38850:[0x38858] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4836; ID:0; [0xfc ]; I_ATOM_F3 : Atom format 3.; NNE +Idx:4836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38858:[0x38860] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38860:[0x38868] num_i(2) last_sz(4) (ISA=A64) N BR ) +Idx:4836; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x38868:[0x38870] num_i(2) last_sz(4) (ISA=A64) E BR ) +Idx:4837; ID:0; [0xdb ]; I_ATOM_F2 : Atom format 2.; EE +Idx:4837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x3b1b4:[0x3b1cc] num_i(6) last_sz(4) (ISA=A64) E BR b+link ) +Idx:4837; ID:2; OCSD_GEN_TRC_ELEM_INSTR_RANGE(exec range=0x9dc4c:[0x9dc64] num_i(6) last_sz(4) (ISA=A64) E iBR ) +Idx:4838; ID:0; [0x9a 0x6c 0x08 0x0a 0x00 ]; I_ADDR_L_32IS0 : Address, Long, 32 bit, IS0.; Addr=0x????????000A11B0 (31:0); +Idx:4838; ID:2; OCSD_GEN_TRC_ELEM_EO_TRACE() +ID:0 END OF TRACE DATA +Trace Packet Lister : Trace buffer done, processed 4843 bytes. diff --git a/decoder/tests/snapshots-ete/trace_file_vmid/rs_entry.bin b/decoder/tests/snapshots-ete/trace_file_vmid/rs_entry.bin new file mode 100644 index 0000000000000000000000000000000000000000..7e59171b6d2e58e2eae9f72ef9140027902ed2ee GIT binary patch literal 264850 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+PC(size:64)=0x0 +SP(size:64)=0 +SCTLR_EL1=0x0 +CPSR=0x0 + + +[dump1] +file=bindir_64/OTHERS_exec +address=0x00060000 +length=0x67740 + +[dump2] +file=bindir_64/VAL_NON_DET_CODE_exec +address=0x00010000 +length=0x204a0 + diff --git a/decoder/tests/snapshots-ete/ts_marker/session1.bin b/decoder/tests/snapshots-ete/ts_marker/session1.bin new file mode 100644 index 0000000000000000000000000000000000000000..da3a4253319faf8b6d07a0aaca489e4504354d51 GIT binary patch literal 1378 zcmc&zyGjE=6rI_`6k?NBze2DOQf{MmRu=* zhrg32LzzSXB$--PPx9yldFI5%xODi<1utKvgpD>Vtt#E8BYy}mz5;mo3 z(6JJaotA5cGH3S2npyMg8Lk}2)j4K6DI4ZQKU!0IdeK}M+L}E>@yCK^dbLwMbplCD zlH(Uh421+d)9WMwrT93eS5~YAnnVud>bmQtY{*yUD5&hro~0|RXi~S% l?EP1q9s<7%RQQpGP5dR@w0@krmzK@Oy9Z`(`Vd;=c!MDG9q literal 0 HcmV?d00001 diff --git a/decoder/tests/snapshots-ete/ts_marker/snapshot.ini b/decoder/tests/snapshots-ete/ts_marker/snapshot.ini new file mode 100644 index 000000000000..fae7cd11a4b4 --- /dev/null +++ b/decoder/tests/snapshots-ete/ts_marker/snapshot.ini @@ -0,0 +1,11 @@ +[snapshot] +version=1.0 +description=checker_metadata.ini + +[device_list] +device0=cpu_0.ini +device1=ETE_0_s1.ini + +[trace] +metadata=trace.ini + diff --git a/decoder/tests/snapshots-ete/ts_marker/trace.ini b/decoder/tests/snapshots-ete/ts_marker/trace.ini new file mode 100644 index 000000000000..7e95dab0e5b0 --- /dev/null +++ b/decoder/tests/snapshots-ete/ts_marker/trace.ini @@ -0,0 +1,15 @@ +[trace_buffers] +buffers=buffer1 + +[buffer1] +name=ETB_1 +file=session1.bin +format=source_data + + +[source_buffers] +ETE_0_s1=ETB_1 + +[core_trace_sources] +cpu_0=ETE_0_s1 + diff --git a/decoder/tests/snapshots/stm-issue-27/device_0.ini b/decoder/tests/snapshots/stm-issue-27/device_0.ini new file mode 100644 index 000000000000..d875f164f367 --- /dev/null +++ b/decoder/tests/snapshots/stm-issue-27/device_0.ini @@ -0,0 +1,7 @@ +[device] +name=STM_0 +class=trace_source +type=STM + +[regs] +STMTCSR(0x3A0)=0x00100007 diff --git a/decoder/tests/snapshots/stm-issue-27/snapshot.ini b/decoder/tests/snapshots/stm-issue-27/snapshot.ini new file mode 100644 index 000000000000..d9e80577de9b --- /dev/null +++ b/decoder/tests/snapshots/stm-issue-27/snapshot.ini @@ -0,0 +1,8 @@ +[snapshot] +version=1.0 + +[device_list] +device0=device_0.ini + +[trace] +metadata=trace.ini diff --git a/decoder/tests/snapshots/stm-issue-27/stuck_trace.bin b/decoder/tests/snapshots/stm-issue-27/stuck_trace.bin new file mode 100644 index 0000000000000000000000000000000000000000..23d4e2c53698c2ace4ed8e27b4aa43cb30661906 GIT binary patch literal 768 zcmZ{i!7Bt&9LIly){tgjYun$!XM5EX-{Sy% z^^rRI8AGefFwdc6mxTq^lT!@7KJLQ_(V0|UmNotOeT91_$?XmO@Kvpy9y`roInFqaa9`hi-`KEZ==TjlxXb*?_g$;9ui%n;V9U|{p^>rC9&P~mVqjp36Kg2hrBw{;H;h>?#Jdq;;prn%IQQR; nyuFy)76o~Gu1wTn(@4-If4A5CZD9{M-yYXfh0B2VUu^F$U=0pQ literal 0 HcmV?d00001 diff --git a/decoder/tests/snapshots/stm-issue-27/trace.ini b/decoder/tests/snapshots/stm-issue-27/trace.ini new file mode 100644 index 000000000000..bf77ffc98596 --- /dev/null +++ b/decoder/tests/snapshots/stm-issue-27/trace.ini @@ -0,0 +1,12 @@ +[trace_buffers] +buffers=buffer1 + +[buffer1] +name=ETB_0 +file=stuck_trace.bin +format=coresight + +[source_buffers] +STM_0=ETB_0 + +[core_trace_sources] diff --git a/decoder/tests/source/c_api_pkt_print_test.c b/decoder/tests/source/c_api_pkt_print_test.c index 02c589e4f275..b930e0544cbd 100644 --- a/decoder/tests/source/c_api_pkt_print_test.c +++ b/decoder/tests/source/c_api_pkt_print_test.c @@ -116,6 +116,12 @@ static int test_printstr = 0; /* test the library printer API */ static int test_lib_printers = 0; +/* test the last error / error code api */ +static int test_error_api = 0; + +/* log statistics */ +static int stats = 0; + /* Process command line options - choose the operation to use for the test. */ static int process_cmd_line(int argc, char *argv[]) { @@ -124,52 +130,52 @@ static int process_cmd_line(int argc, char *argv[]) while(idx < argc) { - if(strcmp(argv[idx],"-decode_only") == 0) + if (strcmp(argv[idx], "-decode_only") == 0) { op = TEST_PKT_DECODEONLY; } - else if(strcmp(argv[idx],"-decode") == 0) + else if (strcmp(argv[idx], "-decode") == 0) { op = TEST_PKT_DECODE; } - else if(strcmp(argv[idx],"-id") == 0) + else if (strcmp(argv[idx], "-id") == 0) { idx++; - if(idx < argc) + if (idx < argc) { - test_trc_id_override = (uint8_t)(strtoul(argv[idx],0,0)); - printf("ID override = 0x%02X\n",test_trc_id_override); + test_trc_id_override = (uint8_t)(strtoul(argv[idx], 0, 0)); + printf("ID override = 0x%02X\n", test_trc_id_override); } } - else if(strcmp(argv[idx],"-etmv3") == 0) + else if (strcmp(argv[idx], "-etmv3") == 0) { - test_protocol = OCSD_PROTOCOL_ETMV3; + test_protocol = OCSD_PROTOCOL_ETMV3; selected_snapshot = tc2_snapshot; mem_dump_address = mem_dump_address_tc2; } - else if(strcmp(argv[idx],"-ptm") == 0) + else if (strcmp(argv[idx], "-ptm") == 0) { - test_protocol = OCSD_PROTOCOL_PTM; + test_protocol = OCSD_PROTOCOL_PTM; selected_snapshot = tc2_snapshot; mem_dump_address = mem_dump_address_tc2; } - else if(strcmp(argv[idx],"-stm") == 0) + else if (strcmp(argv[idx], "-stm") == 0) { test_protocol = OCSD_PROTOCOL_STM; trace_data_filename = stmtrace_data_filename; } - else if(strcmp(argv[idx],"-test_cb") == 0) + else if (strcmp(argv[idx], "-test_cb") == 0) { using_mem_acc_cb = 1; use_region_file = 0; } else if (strcmp(argv[idx], "-test_cb_id") == 0) - { + { using_mem_acc_cb = 1; use_region_file = 0; using_mem_acc_cb_id = 1; } - else if(strcmp(argv[idx],"-test_region_file") == 0) + else if (strcmp(argv[idx], "-test_region_file") == 0) { use_region_file = 1; using_mem_acc_cb = 0; @@ -182,6 +188,10 @@ static int process_cmd_line(int argc, char *argv[]) { frame_raw_unpacked = 1; } + else if (strcmp(argv[idx], "-stats") == 0) + { + stats = 1; + } else if (strcmp(argv[idx], "-raw_packed") == 0) { frame_raw_packed = 1; @@ -194,10 +204,10 @@ static int process_cmd_line(int argc, char *argv[]) { test_lib_printers = 1; } - else if(strcmp(argv[idx],"-ss_path") == 0) + else if (strcmp(argv[idx], "-ss_path") == 0) { idx++; - if((idx >= argc) || (strlen(argv[idx]) == 0)) + if ((idx >= argc) || (strlen(argv[idx]) == 0)) { printf("-ss_path: Missing path parameter or zero length\n"); return -1; @@ -205,14 +215,18 @@ static int process_cmd_line(int argc, char *argv[]) else { len = strlen(argv[idx]); - if(len > (MAX_TRACE_FILE_PATH_LEN - 32)) + if (len > (MAX_TRACE_FILE_PATH_LEN - 32)) { printf("-ss_path: path too long\n"); return -1; } usr_snapshot_path = argv[idx]; } - + + } + else if (strcmp(argv[idx], "-test_err_api") == 0) + { + test_error_api = 1; } else if(strcmp(argv[idx],"-help") == 0) { @@ -641,6 +655,7 @@ static ocsd_err_t create_decoder_etmv4(dcd_tree_handle_t dcd_tree_h) { trace_config.reg_traceidr = (uint32_t)test_trc_id_override; } + test_trc_id_override = trace_config.reg_traceidr; /* remember what ID we actually used */ trace_config.reg_idr0 = 0x28000EA1; trace_config.reg_idr1 = 0x4100F403; @@ -676,6 +691,7 @@ static ocsd_err_t create_decoder_etmv3(dcd_tree_handle_t dcd_tree_h) { trace_config_etmv3.reg_trc_id = (uint32_t)test_trc_id_override; } + test_trc_id_override = trace_config_etmv3.reg_trc_id; /* remember what ID we actually used */ /* create an ETMV3 decoder - no context needed as we have a single stream to a single handler. */ return create_generic_decoder(dcd_tree_h,OCSD_BUILTIN_DCD_ETMV3,(void *)&trace_config_etmv3,0); @@ -701,6 +717,7 @@ static ocsd_err_t create_decoder_ptm(dcd_tree_handle_t dcd_tree_h) { trace_config_ptm.reg_trc_id = (uint32_t)test_trc_id_override; } + test_trc_id_override = trace_config_ptm.reg_trc_id; /* remember what ID we actually used */ /* create an PTM decoder - no context needed as we have a single stream to a single handler. */ return create_generic_decoder(dcd_tree_h,OCSD_BUILTIN_DCD_PTM,(void *)&trace_config_ptm,0); @@ -747,6 +764,7 @@ static ocsd_err_t create_decoder_extern(dcd_tree_handle_t dcd_tree_h) { trace_cfg_ext.cs_id = (uint32_t)test_trc_id_override; } + test_trc_id_override = trace_cfg_ext.cs_id; /* create an external decoder - no context needed as we have a single stream to a single handler. */ return create_generic_decoder(dcd_tree_h, EXT_DCD_NAME, (void *)&trace_cfg_ext, 0); @@ -874,6 +892,28 @@ ocsd_err_t process_data_block(dcd_tree_handle_t dcd_tree_h, int block_index, uin return ret; } +void print_statistics(dcd_tree_handle_t dcdtree_handle) +{ + ocsd_decode_stats_t *p_stats = 0; + ocsd_err_t err; + + sprintf(packet_str, "\nReading packet decoder statistics for ID:0x%02x...\n", test_trc_id_override); + ocsd_def_errlog_msgout(packet_str); + + err = ocsd_dt_get_decode_stats(dcdtree_handle, test_trc_id_override, &p_stats); + if (!err && p_stats) + { + sprintf(packet_str, "Total Bytes %ld; Unsynced Bytes: %ld\nBad Header Errors: %d; Bad sequence errors: %d\n", (long)p_stats->channel_total, + (long)p_stats->channel_unsynced, p_stats->bad_header_errs, p_stats->bad_sequence_errs); + ocsd_dt_reset_decode_stats(dcdtree_handle, test_trc_id_override); + } + else + { + sprintf(packet_str, "Not available for this ID.\n"); + } + ocsd_def_errlog_msgout(packet_str); +} + int process_trace_data(FILE *pf) { ocsd_err_t ret = OCSD_OK; @@ -936,7 +976,9 @@ int process_trace_data(FILE *pf) if(ret == OCSD_OK) ocsd_dt_process_data(dcdtree_handle, OCSD_OP_EOT, 0,0,NULL,NULL); - + if (stats) { + print_statistics(dcdtree_handle); + } /* shut down the mem acc CB if in use. */ if(using_mem_acc_cb) { @@ -955,6 +997,57 @@ int process_trace_data(FILE *pf) return (int)ret; } +#define ERR_BUFFER_SIZE 256 +int test_err_api() +{ + dcd_tree_handle_t dcdtree_handle = C_API_INVALID_TREE_HANDLE; + ocsd_err_t ret = OCSD_OK, err_test; + ocsd_trc_index_t index = 0, err_index = 0; + uint8_t cs_id; + char err_buffer[ERR_BUFFER_SIZE]; + + /* Create a decode tree for this source data. + source data is frame formatted, memory aligned from an ETR (no frame syncs) so create tree accordingly + */ + dcdtree_handle = ocsd_create_dcd_tree(OCSD_TRC_SRC_SINGLE, OCSD_DFRMTR_FRAME_MEM_ALIGN); + + if (dcdtree_handle != C_API_INVALID_TREE_HANDLE) + { + + ret = create_decoder(dcdtree_handle); + if (ret == OCSD_OK) + { + /* attach the generic trace element output callback */ + if (test_lib_printers) + ret = ocsd_dt_set_gen_elem_printer(dcdtree_handle); + else + ret = ocsd_dt_set_gen_elem_outfn(dcdtree_handle, gen_trace_elem_print, 0); + } + + + /* raw print and str print cb options tested in their init functions */ + if (ret == OCSD_OK) + ret = test_printstr_cb(dcdtree_handle); + + if (ret == OCSD_OK) + ret = attach_raw_printers(dcdtree_handle); + + /* feed some duff data into a decoder to provoke an error! */ + uint8_t trace_data[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x80, 0x04, 0x60, 0x71 }; + + if (ret == OCSD_OK) + ret = process_data_block(dcdtree_handle, index, trace_data, sizeof(trace_data)); + + ocsd_err_str(ret, err_buffer, ERR_BUFFER_SIZE); + printf("testing error API for code %d: %s\n", ret, err_buffer); + err_test = ocsd_get_last_err(&err_index, &cs_id, err_buffer, ERR_BUFFER_SIZE); + printf("get last error:\ncode = 0x%02x; trace index %d; cs_id 0x%02x;\nstring: %s\n", err_test, err_index, cs_id, err_buffer); + + } + return ret; +} + int main(int argc, char *argv[]) { FILE *trace_data; @@ -1012,9 +1105,12 @@ int main(int argc, char *argv[]) ocsd_def_errlog_msgout(message); /* process the trace data */ - if(ret == 0) - ret = process_trace_data(trace_data); - + if (ret == 0) { + if (test_error_api) + ret = test_err_api(); + else + ret = process_trace_data(trace_data); + } /* close the data file */ fclose(trace_data); } diff --git a/decoder/tests/source/frame_demux_test.cpp b/decoder/tests/source/frame_demux_test.cpp new file mode 100644 index 000000000000..69856cc7118a --- /dev/null +++ b/decoder/tests/source/frame_demux_test.cpp @@ -0,0 +1,524 @@ +/* +* \file frame_demux_test.cpp +* \brief OpenCSD: Test the frame demux code for robustness with correct and invalid data. +* +* \copyright Copyright (c) 2022, ARM Limited. All Rights Reserved. +*/ + +/* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +/* Runs sets of test data through the frame demuxer to ensure that it is robust for valid and + * invalid inputs + */ + +#include +#include +#include +#include +#include + +#include "opencsd.h" // the library + + /* Decode tree is the main decoder framework - contains the frame demuxer + and will have an output printer attached to the raw output */ +static DecodeTree* pDecoder = 0; +static const uint32_t base_cfg = OCSD_DFRMTR_FRAME_MEM_ALIGN | + OCSD_DFRMTR_PACKED_RAW_OUT | OCSD_DFRMTR_UNPACKED_RAW_OUT; +static ocsdDefaultErrorLogger err_log; +static ocsdMsgLogger logger; + +/* test data */ +#define ID_BYTE_ID(id) ((uint8_t)(id) << 1 | 0x01) +#define ID_BYTE_DATA(data) ((uint8_t)(data & 0xFE)) +#define FLAGS_BYTE(id0, id1, id2, id3, id4, id5, id6, id7) ((uint8_t) ( \ + ((id7 & 0x1) << 7) | ((id6 & 0x1) << 6) | ((id5 & 0x1) << 5) | ((id4 & 0x1) << 4) | \ + ((id3 & 0x1) << 3) | ((id2 & 0x1) << 2) | ((id1 & 0x1) << 1) | (id0 & 0x1) )) +#define HSYNC_BYTES() 0xff, 0x7f +#define FSYNC_BYTES() 0xff, 0xff, 0xff, 0x7f +#define DATASIZE(array) static const size_t array##_sz = sizeof(array) / sizeof(array[0]) + + +static const uint8_t buf_hsync_fsync[] = { + FSYNC_BYTES(), + ID_BYTE_ID(0x10), 0x01, ID_BYTE_DATA(0x2), 0x03, + HSYNC_BYTES(), ID_BYTE_ID(0x20), 0x4, ID_BYTE_DATA(0x5), 0x6, + ID_BYTE_DATA(0x7), 0x08, HSYNC_BYTES(), ID_BYTE_DATA(0x9), 0xA, + ID_BYTE_ID(0x10), 0x0B, ID_BYTE_DATA(0xC), + FLAGS_BYTE(0, 0, 0, 1, 1, 1, 1, 0), +}; +DATASIZE(buf_hsync_fsync); + +static const uint8_t buf_mem_align[] = { + ID_BYTE_ID(0x10), 0x01, ID_BYTE_DATA(0x02), 0x03, + ID_BYTE_DATA(0x04), 0x05, ID_BYTE_DATA(0x06), 0x07, + ID_BYTE_ID(0x20), 0x08, ID_BYTE_DATA(0x09), 0x0A, + ID_BYTE_DATA(0x0B), 0x0C, ID_BYTE_DATA(0x0D), + FLAGS_BYTE(0, 0, 0, 0, 0, 1, 1, 1), + ID_BYTE_DATA(0x0E), 0x0F, ID_BYTE_ID(0x30), 0x10, + ID_BYTE_DATA(0x11), 0x12, ID_BYTE_DATA(0x13), 0x14, + ID_BYTE_DATA(0x15), 0x16, ID_BYTE_ID(0x10), 0x17, + ID_BYTE_DATA(0x18), 0x19, ID_BYTE_DATA(0x20), + FLAGS_BYTE(0, 0, 1, 1, 1, 1, 0, 0), +}; +DATASIZE(buf_mem_align); + +static const uint8_t buf_mem_align_8id[] = { + ID_BYTE_ID(0x10), 0x01, ID_BYTE_DATA(0x02), 0x03, + ID_BYTE_DATA(0x04), 0x05, ID_BYTE_DATA(0x06), 0x07, + ID_BYTE_ID(0x20), 0x08, ID_BYTE_DATA(0x09), 0x0A, + ID_BYTE_DATA(0x0B), 0x0C, ID_BYTE_DATA(0x0D), + FLAGS_BYTE(0, 0, 0, 0, 0, 1, 1, 1), + // 8 IDs, all with prev flag + ID_BYTE_ID(0x01), 0x0E, ID_BYTE_ID(0x02), 0x0F, + ID_BYTE_ID(0x03), 0x10, ID_BYTE_ID(0x04), 0x11, + ID_BYTE_ID(0x05), 0x12, ID_BYTE_ID(0x06), 0x13, + ID_BYTE_ID(0x07), 0x14, ID_BYTE_DATA(0x50), + FLAGS_BYTE(1, 1, 1, 1, 1, 1, 1, 1), + ID_BYTE_DATA(0x15), 0x16, ID_BYTE_DATA(0x17), 0x18, + ID_BYTE_DATA(0x19), 0x1A, ID_BYTE_DATA(0x1B), 0x1C, + ID_BYTE_ID(0x20), 0x1D, ID_BYTE_DATA(0x1E), 0x1F, + ID_BYTE_DATA(0x20), 0x21, ID_BYTE_DATA(0x22), + FLAGS_BYTE(1, 1, 1, 1, 0, 0, 0, 0), +}; +DATASIZE(buf_mem_align_8id); + +static const uint8_t buf_mem_align_st_rst[] = { + FSYNC_BYTES(), FSYNC_BYTES(), FSYNC_BYTES(), FSYNC_BYTES(), + ID_BYTE_ID(0x10), 0x01, ID_BYTE_DATA(0x02), 0x03, + ID_BYTE_DATA(0x04), 0x05, ID_BYTE_DATA(0x06), 0x07, + ID_BYTE_ID(0x20), 0x08, ID_BYTE_DATA(0x09), 0x0A, + ID_BYTE_DATA(0x0B), 0x0C, ID_BYTE_DATA(0x0D), + FLAGS_BYTE(0, 0, 0, 0, 0, 1, 1, 1), + ID_BYTE_DATA(0x0E), 0x0F, ID_BYTE_ID(0x30), 0x10, + ID_BYTE_DATA(0x11), 0x12, ID_BYTE_DATA(0x13), 0x14, + ID_BYTE_DATA(0x15), 0x16, ID_BYTE_ID(0x10), 0x17, + ID_BYTE_DATA(0x18), 0x19, ID_BYTE_DATA(0x20), + FLAGS_BYTE(0, 0, 1, 1, 1, 1, 0, 0), +}; +DATASIZE(buf_mem_align_st_rst); + +static const uint8_t buf_mem_align_mid_rst[] = { + ID_BYTE_ID(0x10), 0x01, ID_BYTE_DATA(0x02), 0x03, + ID_BYTE_DATA(0x04), 0x05, ID_BYTE_DATA(0x06), 0x07, + ID_BYTE_ID(0x20), 0x08, ID_BYTE_DATA(0x09), 0x0A, + ID_BYTE_DATA(0x0B), 0x0C, ID_BYTE_DATA(0x0D), + FLAGS_BYTE(0, 0, 0, 0, 0, 1, 1, 1), + FSYNC_BYTES(), FSYNC_BYTES(), FSYNC_BYTES(), FSYNC_BYTES(), + ID_BYTE_DATA(0x0E), 0x0F, ID_BYTE_ID(0x30), 0x10, + ID_BYTE_DATA(0x11), 0x12, ID_BYTE_DATA(0x13), 0x14, + ID_BYTE_DATA(0x15), 0x16, ID_BYTE_ID(0x10), 0x17, + ID_BYTE_DATA(0x18), 0x19, ID_BYTE_DATA(0x20), + FLAGS_BYTE(0, 0, 1, 1, 1, 1, 0, 0), +}; +DATASIZE(buf_mem_align_mid_rst); + +static const uint8_t buf_mem_align_en_rst[] = { + ID_BYTE_ID(0x10), 0x01, ID_BYTE_DATA(0x02), 0x03, + ID_BYTE_DATA(0x04), 0x05, ID_BYTE_DATA(0x06), 0x07, + ID_BYTE_ID(0x20), 0x08, ID_BYTE_DATA(0x09), 0x0A, + ID_BYTE_DATA(0x0B), 0x0C, ID_BYTE_DATA(0x0D), + FLAGS_BYTE(0, 0, 0, 0, 0, 1, 1, 1), + ID_BYTE_DATA(0x0E), 0x0F, ID_BYTE_ID(0x30), 0x10, + ID_BYTE_DATA(0x11), 0x12, ID_BYTE_DATA(0x13), 0x14, + ID_BYTE_DATA(0x15), 0x16, ID_BYTE_ID(0x10), 0x17, + ID_BYTE_DATA(0x18), 0x19, ID_BYTE_DATA(0x20), + FLAGS_BYTE(0, 0, 1, 1, 1, 1, 0, 0), + FSYNC_BYTES(), FSYNC_BYTES(), FSYNC_BYTES(), FSYNC_BYTES(), +}; +DATASIZE(buf_mem_align_en_rst); + +static const uint8_t buf_bad_data[] = { +0xff, 0xff, 0xff, 0x7f, 0x30, 0xff, 0x53, 0x54, 0x4d, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0, 0x36, 0xff, 0xb1, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x2b, +0x36, 0x36, 0x3a, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, +0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, +0x36, 0x36, 0x36, 0x36, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0, +0, 0x2c, 0, 0, 0, 0x32, 0x1, 0, +}; +DATASIZE(buf_bad_data); + +static ocsd_err_t initDecoder(int init_opts) +{ + pDecoder = DecodeTree::CreateDecodeTree(OCSD_TRC_SRC_FRAME_FORMATTED, init_opts); + if (!pDecoder) + return OCSD_ERR_MEM; + return OCSD_OK; +} + +static void destroyDecoder() +{ + delete pDecoder; + pDecoder = 0; +} + +static void printTestHeaderStr(const char* hdr_str) +{ + std::ostringstream oss; + + oss << "\n---------------------------------------------------------\n"; + oss << hdr_str; + oss << "\n---------------------------------------------------------\n"; + logger.LogMsg(oss.str()); +} + +static void printSubTestName(const int test_num, const char* name) +{ + std::ostringstream oss; + + oss << "\n..Sub Test " << test_num << " : " << name << "\n"; + logger.LogMsg(oss.str()); +} + +static ocsd_err_t setConfig(uint32_t flags) +{ + TraceFormatterFrameDecoder* pFmt = pDecoder->getFrameDeformatter(); + return pFmt->Configure(flags); + +} + +// fail and print on none RESP_CONT response. +static ocsd_datapath_resp_t checkDataPathValue(ocsd_datapath_resp_t resp, int& failed_count) +{ + if (resp == OCSD_RESP_CONT) + return resp; + + std::ostringstream oss; + oss << "\nTest Datapath error response: " << ocsdDataRespStr(resp).getStr() << "\n"; + logger.LogMsg(oss.str()); + failed_count++; + return resp; +} + +static void resetDecoder(int& failed) +{ + checkDataPathValue(pDecoder->TraceDataIn(OCSD_OP_RESET, 0, 0, 0, 0), failed); +} + + +static void checkInOutSizes(const char *test, size_t in, size_t out, int& failed) +{ + if (in != out) { + failed++; + std::ostringstream oss; + oss << test << " test failed - mismatch between processed and input sizes:"; + oss << " In=" << in << "; Out=" << out; + logger.LogMsg(oss.str()); + } +} + +static int checkResult(int failed) +{ + std::ostringstream oss; + oss << "\nTEST : " << ((failed) ? "FAIL" : "PASS") << "\n"; + logger.LogMsg(oss.str()); + return failed; +} +static int testDemuxInit() +{ + ocsd_err_t err; + std::ostringstream oss; + int failed = 0; + + printTestHeaderStr("Demux Init Tests - check bad input rejected"); + + // init with invalid no flags + oss.str(""); + oss << "\nCheck 0 flag error: "; + err = initDecoder(0); + if (err) { + err = err_log.GetLastError()->getErrorCode(); + } + if (err != OCSD_ERR_INVALID_PARAM_VAL) { + oss << "FAIL: expected error code not returned\n"; + failed++; + } + else + oss << "PASS\n"; + logger.LogMsg(oss.str()); + + // init with invalid unknown flags + oss.str(""); + oss << "\nCheck unknown flag error: "; + err = initDecoder(0x80 | OCSD_DFRMTR_FRAME_MEM_ALIGN); + if (err) { + err = err_log.GetLastError()->getErrorCode(); + } + if (err != OCSD_ERR_INVALID_PARAM_VAL) { + oss << "FAIL: expected error code not returned\n"; + failed++; + } + else + oss << "PASS\n"; + logger.LogMsg(oss.str()); + + // init with bad combo + oss.str(""); + oss << "\nCheck bad combination flag error: "; + err = initDecoder(OCSD_DFRMTR_FRAME_MEM_ALIGN | OCSD_DFRMTR_HAS_FSYNCS); + if (err) { + err = err_log.GetLastError()->getErrorCode(); + } + if (err != OCSD_ERR_INVALID_PARAM_VAL) { + oss << "FAIL: expected error code not returned\n"; + failed++; + } + else + oss << "PASS\n"; + logger.LogMsg(oss.str()); + + return failed; +} + +static int runDemuxBadDataTest() +{ + + int failed = 0; + uint32_t processed = 0; + std::ostringstream oss; + ocsd_datapath_resp_t resp; + + printTestHeaderStr("Demux Bad Data Test - arbitrary test data input"); + + setConfig(base_cfg | OCSD_DFRMTR_RESET_ON_4X_FSYNC); + + // reset the decoder. + resetDecoder(failed); + resp = checkDataPathValue(pDecoder->TraceDataIn(OCSD_OP_DATA, 0, buf_bad_data_sz, buf_bad_data, &processed), failed); + if ((resp == OCSD_RESP_FATAL_INVALID_DATA) && + (err_log.GetLastError()->getErrorCode() == OCSD_ERR_DFMTR_BAD_FHSYNC)) + { + failed--; // cancel the fail - we require that the error happens for bad input + oss << "Got correct error response for invalid input\n"; + } + else + { + oss << "Expected error code not returned\n"; + } + logger.LogMsg(oss.str()); + + setConfig(base_cfg); + return checkResult(failed); +} + +static int runHSyncFSyncTest() +{ + uint32_t cfg_flags = base_cfg; + uint32_t processed = 0, total = 0; + ocsd_trc_index_t index = 0; + int failed = 0; + ocsd_datapath_resp_t resp; + std::ostringstream oss; + + printTestHeaderStr("FSYNC & HSYNC tests: check hander code for TPIU captures works."); + + // set for hsync / fsync operation + cfg_flags &= ~OCSD_DFRMTR_FRAME_MEM_ALIGN; // clear mem align + cfg_flags |= OCSD_DFRMTR_HAS_HSYNCS | OCSD_DFRMTR_HAS_FSYNCS; + setConfig(cfg_flags); + + // straight frame test with fsync + hsync + printSubTestName(1, "HSyncFSync frame"); + resetDecoder(failed); + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, index, buf_hsync_fsync_sz, buf_hsync_fsync, &processed), + failed); + checkInOutSizes("HSyncFSync frame", buf_hsync_fsync_sz, processed, failed); + + // test fsync broken across 2 input blocks + printSubTestName(2, "HSyncFSync split frame"); + resetDecoder(failed); + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, index, 2, buf_hsync_fsync, &processed), + failed); + total += processed; + index += processed; + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, index, buf_hsync_fsync_sz - processed, buf_hsync_fsync + processed, &processed), + failed); + total += processed; + checkInOutSizes("HSyncFSync split frame", buf_hsync_fsync_sz, total, failed); + + // check bad input data is rejected. + printSubTestName(3, "HSyncFSync bad input data"); + resetDecoder(failed); + resp = checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, index, buf_bad_data_sz, buf_bad_data, &processed), + failed); + if ((resp == OCSD_RESP_FATAL_INVALID_DATA) && + (err_log.GetLastError()->getErrorCode() == OCSD_ERR_DFMTR_BAD_FHSYNC)) + { + failed--; // cancel the fail - we require that the error happens for bad input + oss << "Got correct error response for invalid input\n"; + } + else + { + oss << "Expected error code not returned\n"; + } + logger.LogMsg(oss.str()); + + + setConfig(base_cfg); + return checkResult(failed); +} + +static int runMemAlignTest() +{ + uint32_t processed = 0; + int failed = 0; + + printTestHeaderStr("MemAligned Buffer tests: exercise the 16 byte frame buffer handler"); + + // default decoder set to mem align so just run the test. + + // straight frame pair + printSubTestName(1, "MemAlignFrame"); + resetDecoder(failed); + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, 0, buf_mem_align_sz, buf_mem_align, &processed), + failed); + checkInOutSizes("MemAlignFrame", buf_mem_align_sz, processed, failed); + + // frame with 8 id test + printSubTestName(2, "MemAlignFrame-8-ID"); + resetDecoder(failed); + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, 0, buf_mem_align_8id_sz, buf_mem_align_8id, &processed), + failed); + checkInOutSizes("MemAlignFrame-8-ID", buf_mem_align_8id_sz, processed, failed); + + // check reset FSYNC frame handling + setConfig(base_cfg | OCSD_DFRMTR_RESET_ON_4X_FSYNC); + printSubTestName(3, "MemAlignFrame-rst_st"); + resetDecoder(failed); + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, 0, buf_mem_align_st_rst_sz, buf_mem_align_st_rst, &processed), + failed); + checkInOutSizes("MemAlignFrame-rst_st", buf_mem_align_st_rst_sz, processed, failed); + + printSubTestName(4, "MemAlignFrame-rst_mid"); + resetDecoder(failed); + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, 0, buf_mem_align_mid_rst_sz, buf_mem_align_mid_rst, &processed), + failed); + checkInOutSizes("MemAlignFrame-rst_mid", buf_mem_align_mid_rst_sz, processed, failed); + + printSubTestName(5, "MemAlignFrame-rst_en"); + resetDecoder(failed); + checkDataPathValue( + pDecoder->TraceDataIn(OCSD_OP_DATA, 0, buf_mem_align_en_rst_sz, buf_mem_align_en_rst, &processed), + failed); + checkInOutSizes("MemAlignFrame-rst_en", buf_mem_align_en_rst_sz, processed, failed); + + setConfig(base_cfg); + return checkResult(failed); +} + +int main(int argc, char* argv[]) +{ + int failed = 0; + ocsd_err_t err; + std::ostringstream moss; + RawFramePrinter* framePrinter = 0; + + /* initialise logger */ + + static const int logOpts = ocsdMsgLogger::OUT_STDOUT | ocsdMsgLogger::OUT_FILE; + + logger.setLogOpts(logOpts); + logger.setLogFileName("frame_demux_test.ppl"); + moss << "---------------------------------------------------------\n"; + moss << "Trace Demux Frame Test - check CoreSight frame processing\n"; + moss << "---------------------------------------------------------\n\n"; + moss << "** Library Version : " << ocsdVersion::vers_str() << "\n\n"; + logger.LogMsg(moss.str()); + + /* initialise error logger */ + err_log.initErrorLogger(OCSD_ERR_SEV_INFO); + err_log.setOutputLogger(&logger); + DecodeTree::setAlternateErrorLogger(&err_log); + + /* run the init tests */ + failed += testDemuxInit(); + + /* create a decoder for the remainder of the tests */ + err = initDecoder(base_cfg); + moss.str(""); + moss << "Creating Decoder for active Demux testing\n"; + if (!err && pDecoder) { + err = pDecoder->addRawFramePrinter(&framePrinter, OCSD_DFRMTR_PACKED_RAW_OUT | OCSD_DFRMTR_UNPACKED_RAW_OUT); + if (err) + moss << "Failed to add Frame printer\n"; + } + if (err || !pDecoder) { + + moss << "Failed to initialise decoder for remainder of the tests\nSkipping active demux tests\n"; + failed++; + } + + /* remainder of the tests that need an active decoder */ + if (!err) { + try { + failed += runMemAlignTest(); + failed += runHSyncFSyncTest(); + failed += runDemuxBadDataTest(); + } + catch (ocsdError& err) { + moss.str(""); + moss << "*** TEST ERROR: Unhandled error from tests. Aborting test run ***\n"; + moss << err.getErrorString(err) << "\n"; + logger.LogMsg(moss.str()); + failed++; + } + } + + /* testing done */ + moss.str(""); + moss << "\n\n---------------------------------------------------------\n"; + moss << "Trace Demux Testing Complete\n"; + if (failed) + moss << "FAILED: recorded " << failed << " errors or failures.\n"; + else + moss << "PASSED ALL tests\n"; + moss << "\n\n---------------------------------------------------------\n"; + + logger.LogMsg(moss.str()); + + if (pDecoder) + destroyDecoder(); + + return failed ? -1 : 0; +} diff --git a/decoder/tests/source/mem_buff_demo.cpp b/decoder/tests/source/mem_buff_demo.cpp index cacc227e941f..052870fd3e56 100644 --- a/decoder/tests/source/mem_buff_demo.cpp +++ b/decoder/tests/source/mem_buff_demo.cpp @@ -126,6 +126,7 @@ static int initDataBuffers() FILE *fp; std::string filename; long size; + size_t bytes_read; /* the file names to create the data buffers */ #ifdef _WIN32 @@ -158,8 +159,10 @@ static int initDataBuffers() return OCSD_ERR_MEM; } rewind(fp); - fread(input_trace_data, 1, input_trace_data_size, fp); + bytes_read = fread(input_trace_data, 1, input_trace_data_size, fp); fclose(fp); + if (bytes_read < (size_t)input_trace_data_size) + return OCSD_ERR_FILE_ERROR; /* load up a memory image */ filename = default_base_snapshot_path; @@ -178,8 +181,10 @@ static int initDataBuffers() return OCSD_ERR_MEM; } rewind(fp); - fread(program_image_buffer, 1, program_image_size, fp); + bytes_read = fread(program_image_buffer, 1, program_image_size, fp); fclose(fp); + if (bytes_read < (size_t)program_image_size) + return OCSD_ERR_FILE_ERROR; program_image_address = mem_dump_address; return OCSD_OK; } diff --git a/decoder/tests/source/trc_pkt_lister.cpp b/decoder/tests/source/trc_pkt_lister.cpp index 50260a5f8b9b..9760351c9c7b 100644 --- a/decoder/tests/source/trc_pkt_lister.cpp +++ b/decoder/tests/source/trc_pkt_lister.cpp @@ -73,6 +73,8 @@ static int test_waits = 0; static bool dstream_format = false; static bool tpiu_format = false; static bool has_hsync = false; +static bool src_addr_n = false; +static bool stats = false; int main(int argc, char* argv[]) { @@ -185,14 +187,16 @@ void print_help() oss << "\nDecode:\n\n"; oss << "-id Set an ID to list (may be used multiple times) - default if no id set is for all IDs to be printed\n"; oss << "-src_name List packets from a given snapshot source name (defaults to first source found)\n"; - oss << "-dstream_format Input is DSTREAM framed."; - oss << "-tpiu Input from TPIU - sync by FSYNC."; - oss << "-tpiu_hsync Input from TPIU - sync by FSYNC and HSYNC."; + oss << "-dstream_format Input is DSTREAM framed.\n"; + oss << "-tpiu Input from TPIU - sync by FSYNC.\n"; + oss << "-tpiu_hsync Input from TPIU - sync by FSYNC and HSYNC.\n"; oss << "-decode Full decode of the packets from the trace snapshot (default is to list undecoded packets only\n"; oss << "-decode_only Does not list the undecoded packets, just the trace decode.\n"; oss << "-o_raw_packed Output raw packed trace frames\n"; oss << "-o_raw_unpacked Output raw unpacked trace data per ID\n"; oss << "-test_waits Force wait from packet printer for N packets - test the wait/flush mechanisms for the decoder\n"; + oss << "-src_addr_n ETE protocol: Split source address ranges on N atoms\n"; + oss << "-stats Output packet processing statistics (if available).\n"; oss << "\nOutput:\n"; oss << " Setting any of these options cancels the default output to file & stdout,\n using _only_ the options supplied.\n\n"; oss << "-logstdout Output to stdout -> console.\n"; @@ -390,6 +394,14 @@ bool process_cmd_line_opts(int argc, char* argv[]) no_undecoded_packets = true; decode = true; } + else if (strcmp(argv[optIdx], "-src_addr_n") == 0) + { + src_addr_n = true; + } + else if (strcmp(argv[optIdx], "-stats") == 0) + { + stats = true; + } else if((strcmp(argv[optIdx], "-help") == 0) || (strcmp(argv[optIdx], "--help") == 0) || (strcmp(argv[optIdx], "-h") == 0)) { print_help(); @@ -518,8 +530,9 @@ void ConfigureFrameDeMux(DecodeTree *dcd_tree, RawFramePrinter **framePrinter) if (!configFlags) { configFlags = OCSD_DFRMTR_FRAME_MEM_ALIGN; - pDeformatter->Configure(configFlags); } + pDeformatter->Configure(configFlags); + if (outRawPacked || outRawUnpacked) { if (outRawPacked) configFlags |= OCSD_DFRMTR_PACKED_RAW_OUT; @@ -529,13 +542,67 @@ void ConfigureFrameDeMux(DecodeTree *dcd_tree, RawFramePrinter **framePrinter) } } +void PrintDecodeStats(DecodeTree *dcd_tree) +{ + uint8_t elemID; + std::ostringstream oss; + ocsd_decode_stats_t *pStats = 0; + ocsd_err_t err; + bool gotDemuxStats = false; + ocsd_demux_stats_t demux_stats; + + oss << "\nReading packet decoder statistics....\n\n"; + logger.LogMsg(oss.str()); + + DecodeTreeElement *pElement = dcd_tree->getFirstElement(elemID); + while (pElement) + { + oss.str(""); + err = dcd_tree->getDecoderStats(elemID, &pStats); + if (!err && pStats) + { + oss << "Decode stats ID 0x" << std::hex << (uint32_t)elemID << "\n"; + oss << "Total Bytes: " << std::dec << pStats->channel_total << "; Unsynced Bytes: " << std::dec << pStats->channel_unsynced << "\n"; + oss << "Bad Header Errors: " << std::dec << pStats->bad_header_errs << "; Bad Sequence Errors: " << std::dec << pStats->bad_sequence_errs << "\n"; + + // demux stats same for all IDs - grab them at the first opportunity.. + if (!gotDemuxStats) { + memcpy(&demux_stats, &pStats->demux, sizeof(ocsd_demux_stats_t)); + gotDemuxStats = true; + } + + } + else + oss << "Decode stats unavailable on Trace ID 0x" << std::hex << (uint32_t)elemID << "\n"; + + + logger.LogMsg(oss.str()); + pElement = dcd_tree->getNextElement(elemID); + } + + // if we have copied over the stats and there is at least 1 frame byte (impossible for there to be 0 if demuxing) + if (gotDemuxStats && demux_stats.frame_bytes) { + uint64_t total = demux_stats.valid_id_bytes + demux_stats.no_id_bytes + demux_stats.unknown_id_bytes + + demux_stats.reserved_id_bytes + demux_stats.frame_bytes; + oss.str(""); + oss << "\nFrame Demux Stats\n"; + oss << "Trace data bytes sent to registered ID decoders: " << std::dec << demux_stats.valid_id_bytes << "\n"; + oss << "Trace data bytes without registered ID decoders: " << std::dec << demux_stats.no_id_bytes << "\n"; + oss << "Trace data bytes with unknown ID: " << std::dec << demux_stats.unknown_id_bytes << "\n"; + oss << "Trace data bytes with reserved ID: " << std::dec << demux_stats.reserved_id_bytes << "\n"; + oss << "Frame demux bytes, ID bytes and sync bytes: " << std::dec << demux_stats.frame_bytes << "\n"; + oss << "Total bytes processed by frame demux: " << std::dec << total << "\n\n"; + logger.LogMsg(oss.str()); + } +} + void ListTracePackets(ocsdDefaultErrorLogger &err_logger, SnapShotReader &reader, const std::string &trace_buffer_name) { CreateDcdTreeFromSnapShot tree_creator; tree_creator.initialise(&reader, &err_logger); - if(tree_creator.createDecodeTree(trace_buffer_name, (decode == false))) + if(tree_creator.createDecodeTree(trace_buffer_name, (decode == false), src_addr_n ? ETE_OPFLG_PKTDEC_SRCADDR_N_ATOMS : 0)) { DecodeTree *dcd_tree = tree_creator.getDecodeTree(); dcd_tree->setAlternateErrorLogger(&err_logger); @@ -672,7 +739,8 @@ void ListTracePackets(ocsdDefaultErrorLogger &err_logger, SnapShotReader &reader std::ostringstream oss; oss << "Trace Packet Lister : Trace buffer done, processed " << trace_index << " bytes.\n"; logger.LogMsg(oss.str()); - + if (stats) + PrintDecodeStats(dcd_tree); } else {