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- Add SPI bus driver for ar71xx SoC
This commit is contained in:
Oleksandr Tymoshenko
parent
28bdd4f5c3
commit
495d422f49
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/projects/mips/; revision=192357
228
sys/mips/atheros/ar71xx_spi.c
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228
sys/mips/atheros/ar71xx_spi.c
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@ -0,0 +1,228 @@
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/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_extern.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/pmap.h>
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#include <dev/spibus/spi.h>
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#include <dev/spibus/spibusvar.h>
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#include "spibus_if.h"
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#include <mips/atheros/ar71xxreg.h>
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#undef AR71XX_SPI_DEBUG
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#ifdef AR71XX_SPI_DEBUG
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#define dprintf printf
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#else
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#define dprintf(x, arg...)
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#endif
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/*
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* register space access macros
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*/
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#define SPI_WRITE(sc, reg, val) do { \
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bus_write_4(sc->sc_mem_res, (reg), (val)); \
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} while (0)
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#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg))
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#define SPI_SET_BITS(sc, reg, bits) \
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SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
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#define SPI_CLEAR_BITS(sc, reg, bits) \
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SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
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struct ar71xx_spi_softc {
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device_t sc_dev;
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struct resource *sc_mem_res;
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uint32_t sc_reg_ioctrl;
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};
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static int
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ar71xx_spi_probe(device_t dev)
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{
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device_set_desc(dev, "AR71XX SPI");
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return (0);
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}
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static int
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ar71xx_spi_attach(device_t dev)
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{
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struct ar71xx_spi_softc *sc = device_get_softc(dev);
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int rid;
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sc->sc_dev = dev;
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->sc_mem_res) {
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device_printf(dev, "Could not map memory\n");
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return (ENXIO);
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}
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sc->sc_reg_ioctrl = SPI_READ(sc, AR71XX_SPI_IO_CTRL);
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SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, SPI_IO_CTRL_CS0 | SPI_IO_CTRL_CS1 |
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SPI_IO_CTRL_CS2);
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SPI_WRITE(sc, AR71XX_SPI_CTRL, sc->sc_reg_ioctrl);
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SPI_WRITE(sc, AR71XX_SPI_FS, 0);
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device_add_child(dev, "spibus", 0);
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return (bus_generic_attach(dev));
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}
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static void
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ar71xx_spi_chip_activate(struct ar71xx_spi_softc *sc, int cs)
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{
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uint32_t ioctrl = SPI_IO_CTRL_CS0 |SPI_IO_CTRL_CS1 | SPI_IO_CTRL_CS2;
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/*
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* Put respective CSx to low
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*/
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ioctrl &= ~(SPI_IO_CTRL_CS0 << cs);
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SPI_WRITE(sc, AR71XX_SPI_FS, 1);
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SPI_WRITE(sc, AR71XX_SPI_CTRL, 0x43);
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SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, ioctrl);
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}
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static void
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ar71xx_spi_chip_deactivate(struct ar71xx_spi_softc *sc, int cs)
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{
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/*
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* Put all CSx to high
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*/
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SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, SPI_IO_CTRL_CS0 | SPI_IO_CTRL_CS1 |
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SPI_IO_CTRL_CS2);
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SPI_WRITE(sc, AR71XX_SPI_CTRL, sc->sc_reg_ioctrl);
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SPI_WRITE(sc, AR71XX_SPI_FS, 0);
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}
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static uint8_t
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ar71xx_spi_txrx(struct ar71xx_spi_softc *sc, uint8_t data)
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{
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int bit;
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/* CS0 */
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uint32_t ioctrl = SPI_IO_CTRL_CS1 | SPI_IO_CTRL_CS2;
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uint32_t iod, rds;
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for (bit = 7; bit >=0; bit--) {
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if (data & (1 << bit))
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iod = ioctrl | SPI_IO_CTRL_DO;
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else
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iod = ioctrl & ~SPI_IO_CTRL_DO;
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SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod);
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SPI_WRITE(sc, AR71XX_SPI_IO_CTRL, iod | SPI_IO_CTRL_CLK);
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}
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rds = SPI_READ(sc, AR71XX_SPI_RDS);
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return (rds & 0xff);
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}
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static int
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ar71xx_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
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{
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struct ar71xx_spi_softc *sc;
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uint8_t *buf_in, *buf_out;
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struct spibus_ivar *devi = SPIBUS_IVAR(child);
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int i;
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sc = device_get_softc(dev);
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ar71xx_spi_chip_activate(sc, devi->cs);
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KASSERT(cmd->tx_cmd_sz == cmd->rx_cmd_sz,
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("TX/RX command sizes should be equal"));
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KASSERT(cmd->tx_data_sz == cmd->rx_data_sz,
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("TX/RX data sizes should be equal"));
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/*
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* Transfer command
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*/
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buf_out = (uint8_t *)cmd->tx_cmd;
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buf_in = (uint8_t *)cmd->rx_cmd;
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for (i = 0; i < cmd->tx_cmd_sz; i++)
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buf_in[i] = ar71xx_spi_txrx(sc, buf_out[i]);
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/*
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* Receive/transmit data (depends on command)
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*/
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buf_out = (uint8_t *)cmd->tx_data;
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buf_in = (uint8_t *)cmd->rx_data;
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for (i = 0; i < cmd->tx_data_sz; i++)
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buf_in[i] = ar71xx_spi_txrx(sc, buf_out[i]);
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ar71xx_spi_chip_deactivate(sc, devi->cs);
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return (0);
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}
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static int
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ar71xx_spi_detach(device_t dev)
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{
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return (EBUSY); /* XXX */
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}
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static device_method_t ar71xx_spi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ar71xx_spi_probe),
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DEVMETHOD(device_attach, ar71xx_spi_attach),
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DEVMETHOD(device_detach, ar71xx_spi_detach),
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DEVMETHOD(spibus_transfer, ar71xx_spi_transfer),
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{0, 0}
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};
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static driver_t ar71xx_spi_driver = {
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"spi",
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ar71xx_spi_methods,
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sizeof(struct ar71xx_spi_softc),
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};
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static devclass_t ar71xx_spi_devclass;
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DRIVER_MODULE(ar71xx_spi, nexus, ar71xx_spi_driver, ar71xx_spi_devclass, 0, 0);
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@ -6,6 +6,7 @@ mips/atheros/ar71xx_ehci.c optional ehci
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mips/atheros/ar71xx_ohci.c optional ohci
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mips/atheros/ar71xx_pci.c optional pci
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mips/atheros/ar71xx_pci_bus_space.c optional pci
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mips/atheros/ar71xx_spi.c optional ar71xx_spi
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mips/atheros/if_arge.c optional arge
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mips/atheros/uart_bus_ar71xx.c optional uart
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mips/atheros/uart_cpu_ar71xx.c optional uart
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