mirror of
https://github.com/freebsd/freebsd-src.git
synced 2024-12-05 03:39:02 +00:00
Add 'wl' Wavelan driver.
Obtained from: Jim Binkley <jrb@cs.pdx.edu>
This commit is contained in:
Mike Smith
parent
98d46ad0c9
commit
4eb256367e
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=26003
2265
sys/dev/wl/if_wl.c
Normal file
2265
sys/dev/wl/if_wl.c
Normal file
File diff suppressed because it is too large
Load Diff
120
sys/dev/wl/if_wl.h
Normal file
120
sys/dev/wl/if_wl.h
Normal file
@ -0,0 +1,120 @@
|
||||
/*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain all copyright
|
||||
* notices, this list of conditions and the following disclaimer.
|
||||
* 2. The names of the authors may not be used to endorse or promote products
|
||||
* derived from this software withough specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
/* Definitions for WaveLAN driver */
|
||||
|
||||
#ifndef _IF_WL_H
|
||||
#define _IF_WL_H
|
||||
|
||||
#define STATUS_TRIES 15000
|
||||
|
||||
#define N_FD 100
|
||||
#define N_RBD 100
|
||||
#define N_TBD 72
|
||||
#define RCVBUFSIZE 540
|
||||
#define I82586NULL 0xffff
|
||||
|
||||
#define DSF_RUNNING 1
|
||||
|
||||
#define MOD_ENAL 1
|
||||
#define MOD_PROM 2
|
||||
|
||||
typedef struct {
|
||||
rbd_t r;
|
||||
char rbd_pad[2];
|
||||
char rbuffer[RCVBUFSIZE];
|
||||
} ru_t;
|
||||
|
||||
/* Board 64k RAM layout. Offsets from 0x0000 */
|
||||
|
||||
#define OFFSET_RU 0x0000 /* 0x64 * fd_t = 0x898 */
|
||||
#define OFFSET_RBD 0x0900 /* 0x64 * ru_t = 0xd7a0 */
|
||||
#define OFFSET_CU 0xe0a0 /* 0x100 */
|
||||
#define OFFSET_TBD 0xe1a0 /* 0x48 * tbd_t = 0x240 */
|
||||
#define OFFSET_TBUF 0xe3e0 /* 0x1bfe */
|
||||
#define OFFSET_SCB 0xffde /* 0x1 * scb_t = 0x10 */
|
||||
#define OFFSET_ISCP 0xffee /* 0x1 * iscp_t = 0x8 */
|
||||
#define OFFSET_SCP 0xfff6 /* 0x1 * scp_t = 0xa */
|
||||
|
||||
/* WaveLAN host interface definitions */
|
||||
|
||||
#define HACR(base) (base) /* Host Adapter Command Register */
|
||||
#define HASR(base) (base) /* Host Adapter Status Register */
|
||||
#define MMCR(base) (base+0x2) /* Modem Management Ctrl Register */
|
||||
#define PIOR0(base) (base+0x4) /* Program I/O Address Register 0 */
|
||||
#define PIOP0(base) (base+0x6) /* Program I/O Port 0 */
|
||||
#define PIOR1(base) (base+0x8) /* Program I/O Address Register 1 */
|
||||
#define PIOP1(base) (base+0xa) /* Program I/O Port 1 */
|
||||
#define PIOR2(base) (base+0xc) /* Program I/O Address Register 2 */
|
||||
#define PIOP2(base) (base+0xe) /* Program I/O Port 2 */
|
||||
|
||||
/* Program I/O Mode Register values */
|
||||
|
||||
#define STATIC_PIO 0 /* Mode 1: static mode */
|
||||
#define AUTOINCR_PIO 1 /* Mode 2: auto increment mode */
|
||||
#define AUTODECR_PIO 2 /* Mode 3: auto decrement mode */
|
||||
#define PARAM_ACCESS_PIO 3 /* Mode 4: LAN parameter access mode */
|
||||
#define PIO_MASK 3 /* register mask */
|
||||
#define PIOM(cmd,piono) ((u_short)cmd << 10 << (piono * 2))
|
||||
|
||||
/* Host Adapter status register definitions */
|
||||
|
||||
#define HASR_INTR 0x0001 /* Interrupt request from 82586 */
|
||||
#define HASR_MMC_INTR 0x0002 /* Interrupt request from MMC */
|
||||
#define HASR_MMC_BUSY 0x0004 /* MMC busy indication */
|
||||
#define HASR_PARA_BUSY 0x0008 /* LAN parameter storage area busy */
|
||||
|
||||
/* Host Adapter command register definitions */
|
||||
|
||||
#define HACR_RESET 0x0001 /* Reset board */
|
||||
#define HACR_CA 0x0002 /* Set Channel Attention for 82586 */
|
||||
#define HACR_16BITS 0x0004 /* 1==16 bits operation, 0==8 bits */
|
||||
#define HACR_OUT1 0x0008 /* General purpose output pin */
|
||||
#define HACR_OUT2 0x0010 /* General purpose output pin */
|
||||
#define HACR_MASK_82586 0x0020 /* Mask 82586 interrupts, 1==unmask */
|
||||
#define HACR_MASK_MMC 0x0040 /* Mask MMC interrupts, 1==unmask */
|
||||
#define HACR_INTR_CLEN 0x0080 /* interrupt status clear enable */
|
||||
|
||||
#define HACR_DEFAULT (HACR_OUT1 | HACR_OUT2 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
|
||||
#define HACR_INTRON (HACR_MASK_82586 | HACR_MASK_MMC | HACR_INTR_CLEN)
|
||||
#define CMD(unit) \
|
||||
{ \
|
||||
outw(HACR(WLSOFTC(unit)->base),WLSOFTC(unit)->hacr); \
|
||||
/* delay for 50 us, might only be needed sometimes */ \
|
||||
DELAY(DELAYCONST); \
|
||||
}
|
||||
|
||||
/* macro for setting the channel attention bit. No delays here since
|
||||
* it is used in critical sections
|
||||
*/
|
||||
#define SET_CHAN_ATTN(unit) \
|
||||
{ \
|
||||
outw(HACR(WLSOFTC(unit)->base),WLSOFTC(unit)->hacr | HACR_CA); \
|
||||
}
|
||||
|
||||
|
||||
#define MMC_WRITE(cmd,val) \
|
||||
while(inw(HASR(WLSOFTC(unit)->base)) & HASR_MMC_BUSY) ; \
|
||||
outw(MMCR(WLSOFTC(unit)->base), \
|
||||
(u_short)(((u_short)(val) << 8) | ((cmd) << 1) | 1))
|
||||
|
||||
#endif _IF_WL_H
|
||||
|
||||
139
sys/i386/include/if_wl_wavelan.h
Normal file
139
sys/i386/include/if_wl_wavelan.h
Normal file
@ -0,0 +1,139 @@
|
||||
/*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain all copyright
|
||||
* notices, this list of conditions and the following disclaimer.
|
||||
* 2. The names of the authors may not be used to endorse or promote products
|
||||
* derived from this software withough specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
#ifndef _CHIPS_WAVELAN_H
|
||||
#define _CHIPS_WAVELAN_H
|
||||
|
||||
/* This file contains definitions that are common for all versions of
|
||||
* the NCR WaveLAN
|
||||
*/
|
||||
|
||||
#define WAVELAN_ADDR_SIZE 6 /* Size of a MAC address */
|
||||
#define WAVELAN_MTU 1500 /* Maximum size of Wavelan packet */
|
||||
|
||||
/* Modem Management Controler write commands */
|
||||
|
||||
#define MMC_LOOPT_SEL 0x10
|
||||
#define MMC_JABBER_ENABLE 0x11
|
||||
#define MMC_FREEZE 0x12
|
||||
#define MMC_ANTEN_SEL 0x13
|
||||
#define MMC_IFS 0x14
|
||||
#define MMC_MOD_DELAY 0x15
|
||||
#define MMC_JAM_TIME 0x16
|
||||
#define MMC_THR_PRE_SET 0x18
|
||||
#define MMC_DECAY_PRM 0x19
|
||||
#define MMC_DECAY_UPDAT_PRM 0x1a
|
||||
#define MMC_QUALITY_THR 0x1b
|
||||
#define MMC_NETW_ID_L 0x1c
|
||||
#define MMC_NETW_ID_H 0x1d
|
||||
#define MMC_MODE_SEL 0x1e
|
||||
#define MMC_ENCR_KEY 0x00 /* to 0x07 */
|
||||
#define MMC_ENCR_ENABLE 0x08
|
||||
#define MMC_DES_IO_INVERT 0x0a
|
||||
|
||||
/* MMC read register names */
|
||||
|
||||
#define MMC_DCE_STATUS 0x10
|
||||
#define MMC_CORRECT_NWID_L 0x14
|
||||
#define MMC_CORRECT_NWID_H 0x15
|
||||
#define MMC_WRONG_NWID_L 0x16
|
||||
#define MMC_WRONG_NWID_H 0x17
|
||||
#define MMC_THR_PRE_SET 0x18
|
||||
#define MMC_SIGNAL_LVL 0x19
|
||||
#define MMC_SILENCE_LVL 0x1a
|
||||
#define MMC_SIGN_QUAL 0x1b
|
||||
#define MMC_DES_AVAIL 0x09
|
||||
|
||||
|
||||
#endif _CHIPS_WAVELAN_H
|
||||
|
||||
/* additional socket ioctl params for wl card
|
||||
* see sys/sockio.h for numbers. The 2nd params here
|
||||
* must be greater than any values in sockio.h
|
||||
*/
|
||||
|
||||
#define SIOCGWLCNWID _IOWR('i', 60, struct ifreq) /* get wlan current nwid */
|
||||
#define SIOCSWLCNWID _IOWR('i', 61, struct ifreq) /* set wlan current nwid */
|
||||
#define SIOCGWLPSA _IOWR('i', 62, struct ifreq) /* get wlan PSA (all) */
|
||||
#define SIOCSWLPSA _IOWR('i', 63, struct ifreq) /* set wlan PSA (all) */
|
||||
|
||||
/* PSA address definitions */
|
||||
#define WLPSA_ID 0x0 /* ID byte (0 for ISA, 0x14 for MCA) */
|
||||
#define WLPSA_IO1 0x1 /* I/O address 1 */
|
||||
#define WLPSA_IO2 0x2 /* I/O address 2 */
|
||||
#define WLPSA_IO3 0x3 /* I/O address 3 */
|
||||
#define WLPSA_BR1 0x4 /* Bootrom address 1 */
|
||||
#define WLPSA_BR2 0x5 /* Bootrom address 2 */
|
||||
#define WLPSA_BR3 0x6 /* Bootrom address 3 */
|
||||
#define WLPSA_HWCONF 0x7 /* HW config bits */
|
||||
#define WLPSA_IRQNO 0x8 /* IRQ value */
|
||||
#define WLPSA_UNIMAC 0x10 /* Universal MAC address */
|
||||
#define WLPSA_LOCALMAC 0x16 /* Locally configured MAC address */
|
||||
#define WLPSA_MACSEL 0x1c /* MAC selector */
|
||||
#define WLPSA_COMPATNO 0x1d /* compatability number */
|
||||
#define WLPSA_THRESH 0x1e /* RF modem threshold preset */
|
||||
#define WLPSA_FEATSEL 0x1f /* feature select */
|
||||
#define WLPSA_SUBBAND 0x20 /* subband selector */
|
||||
#define WLPSA_QUALTHRESH 0x21 /* RF modem quality threshold preset */
|
||||
#define WLPSA_HWVERSION 0x22 /* hardware version indicator */
|
||||
#define WLPSA_NWID 0x23 /* network ID */
|
||||
#define WLPSA_NWIDENABLE 0x24 /* network ID enable */
|
||||
#define WLPSA_SECURITY 0x25 /* datalink security enable */
|
||||
#define WLPSA_DESKEY 0x26 /* datalink security DES key */
|
||||
#define WLPSA_DBWIDTH 0x2f /* databus width select */
|
||||
#define WLPSA_CALLCODE 0x30 /* call code (japan only) */
|
||||
#define WLPSA_CONFIGURED 0x3c /* configuration status */
|
||||
#define WLPSA_CRCLOW 0x3d /* CRC-16 (lowbyte) */
|
||||
#define WLPSA_CRCHIGH 0x3e /* (highbyte) */
|
||||
#define WLPSA_CRCOK 0x3f /* CRC OK flag */
|
||||
|
||||
/*
|
||||
* signal strength cache
|
||||
*
|
||||
* driver (wlp only at the moment) keeps cache of last
|
||||
* IP (only) packets to arrive including signal strength info.
|
||||
* daemons may read this with kvm. See if_wlp.c for globals
|
||||
* that may be accessed through kvm.
|
||||
*
|
||||
* Each entry in the w_sigcache has a unique macsrc and age.
|
||||
* Each entry is identified by its macsrc field.
|
||||
* Age of the packet is identified by its age field.
|
||||
*/
|
||||
|
||||
#define MAXCACHEITEMS 10
|
||||
#ifndef INT_MAX
|
||||
#define INT_MAX 2147483647
|
||||
#endif
|
||||
#define MAX_AGE (INT_MAX - MAXCACHEITEMS)
|
||||
|
||||
/* signal is 7 bits, 0..63, although it doesn't seem to get to 63.
|
||||
* silence is 7 bits, 0..63
|
||||
* quality is 4 bits, 0..15
|
||||
*/
|
||||
struct w_sigcache {
|
||||
char macsrc[6]; /* unique MAC address for entry */
|
||||
int ipsrc; /* ip address associated with packet */
|
||||
int signal; /* signal strength of the packet */
|
||||
int silence; /* silence of the packet */
|
||||
int quality; /* quality of the packet */
|
||||
int age; /* packet has unique age between 1 to MAX_AGE - 1 */
|
||||
};
|
||||
|
||||
264
sys/i386/isa/ic/if_wl_i82586.h
Normal file
264
sys/i386/isa/ic/if_wl_i82586.h
Normal file
@ -0,0 +1,264 @@
|
||||
/*
|
||||
* Mach Operating System
|
||||
* Copyright (c) 1991,1990,1989 Carnegie Mellon University
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Permission to use, copy, modify and distribute this software and its
|
||||
* documentation is hereby granted, provided that both the copyright
|
||||
* notice and this permission notice appear in all copies of the
|
||||
* software, derivative works or modified versions, and any portions
|
||||
* thereof, and that both notices appear in supporting documentation.
|
||||
*
|
||||
* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
|
||||
* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
|
||||
* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
|
||||
*
|
||||
* Carnegie Mellon requests users of this software to return to
|
||||
*
|
||||
* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
|
||||
* School of Computer Science
|
||||
* Carnegie Mellon University
|
||||
* Pittsburgh PA 15213-3890
|
||||
*
|
||||
* any improvements or extensions that they make and grant Carnegie Mellon
|
||||
* the rights to redistribute these changes.
|
||||
*/
|
||||
/*
|
||||
Copyright 1988, 1989 by Olivetti Advanced Technology Center, Inc.,
|
||||
Cupertino, California.
|
||||
|
||||
All Rights Reserved
|
||||
|
||||
Permission to use, copy, modify, and distribute this software and
|
||||
its documentation for any purpose and without fee is hereby
|
||||
granted, provided that the above copyright notice appears in all
|
||||
copies and that both the copyright notice and this permission notice
|
||||
appear in supporting documentation, and that the name of Olivetti
|
||||
not be used in advertising or publicity pertaining to distribution
|
||||
of the software without specific, written prior permission.
|
||||
|
||||
OLIVETTI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
|
||||
INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
|
||||
IN NO EVENT SHALL OLIVETTI BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
|
||||
CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
|
||||
LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
|
||||
NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
|
||||
WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Defines for managing the status word of the 82586 cpu. For details see
|
||||
* the Intel LAN Component User's Manual starting at p. 2-14.
|
||||
*
|
||||
*/
|
||||
|
||||
#define SCB_SW_INT 0xf000
|
||||
#define SCB_SW_CX 0x8000 /* CU finished w/ int. bit set */
|
||||
#define SCB_SW_FR 0x4000 /* RU finished receiving a frame */
|
||||
#define SCB_SW_CNA 0x2000 /* CU left active state */
|
||||
#define SCB_SW_RNR 0x1000 /* RU left ready state */
|
||||
|
||||
/*
|
||||
* Defines for managing the Command Unit Status portion of the 82586
|
||||
* System Control Block.
|
||||
*
|
||||
*/
|
||||
|
||||
#define SCB_CUS_IDLE 0x0000
|
||||
#define SCB_CUS_SUSPND 0x0100
|
||||
#define SCB_CUS_ACTV 0x0200
|
||||
|
||||
/*
|
||||
* Defines for managing the Receive Unit Status portion of the System
|
||||
* Control Block.
|
||||
*
|
||||
*/
|
||||
|
||||
#define SCB_RUS_IDLE 0x0000
|
||||
#define SCB_RUS_SUSPND 0x0010
|
||||
#define SCB_RUS_NORESRC 0x0020
|
||||
#define SCB_RUS_READY 0x0040
|
||||
|
||||
/*
|
||||
* Defines that manage portions of the Command Word in the System Control
|
||||
* Block of the 82586. Below are the Interrupt Acknowledge Bits and their
|
||||
* appropriate masks.
|
||||
*
|
||||
*/
|
||||
|
||||
#define SCB_ACK_CX 0x8000
|
||||
#define SCB_ACK_FR 0x4000
|
||||
#define SCB_ACK_CNA 0x2000
|
||||
#define SCB_ACK_RNR 0x1000
|
||||
|
||||
/*
|
||||
* Defines for managing the Command Unit Control word, and the Receive
|
||||
* Unit Control word. The software RESET bit is also defined.
|
||||
*
|
||||
*/
|
||||
|
||||
#define SCB_CU_STRT 0x0100
|
||||
#define SCB_CU_RSUM 0x0200
|
||||
#define SCB_CU_SUSPND 0x0300
|
||||
#define SCB_CU_ABRT 0x0400
|
||||
|
||||
#define SCB_RESET 0x0080
|
||||
|
||||
#define SCB_RU_STRT 0x0010
|
||||
#define SCB_RU_RSUM 0x0020
|
||||
#define SCB_RU_SUSPND 0x0030
|
||||
#define SCB_RU_ABRT 0x0040
|
||||
|
||||
|
||||
/*
|
||||
* The following define Action Commands for the 82586 chip.
|
||||
*
|
||||
*/
|
||||
|
||||
#define AC_NOP 0x00
|
||||
#define AC_IASETUP 0x01
|
||||
#define AC_CONFIGURE 0x02
|
||||
#define AC_MCSETUP 0x03
|
||||
#define AC_TRANSMIT 0x04
|
||||
#define AC_TDR 0x05
|
||||
#define AC_DUMP 0x06
|
||||
#define AC_DIAGNOSE 0x07
|
||||
|
||||
|
||||
/*
|
||||
* Defines for General Format for Action Commands, both Status Words, and
|
||||
* Command Words.
|
||||
*
|
||||
*/
|
||||
|
||||
#define AC_SW_C 0x8000
|
||||
#define AC_SW_B 0x4000
|
||||
#define AC_SW_OK 0x2000
|
||||
#define AC_SW_A 0x1000
|
||||
#define TC_CARRIER 0x0400
|
||||
#define TC_CLS 0x0200
|
||||
#define TC_DMA 0x0100
|
||||
#define TC_DEFER 0x0080
|
||||
#define TC_SQE 0x0040
|
||||
#define TC_COLLISION 0x0020
|
||||
#define AC_CW_EL 0x8000
|
||||
#define AC_CW_S 0x4000
|
||||
#define AC_CW_I 0x2000
|
||||
|
||||
/*
|
||||
* Specific defines for the transmit action command.
|
||||
*
|
||||
*/
|
||||
|
||||
#define TBD_SW_EOF 0x8000
|
||||
#define TBD_SW_COUNT 0x3fff
|
||||
|
||||
/*
|
||||
* Specific defines for the receive frame actions.
|
||||
*
|
||||
*/
|
||||
|
||||
#define RBD_SW_EOF 0x8000
|
||||
#define RBD_SW_COUNT 0x3fff
|
||||
|
||||
#define RFD_DONE 0x8000
|
||||
#define RFD_BUSY 0x4000
|
||||
#define RFD_OK 0x2000
|
||||
#define RFD_CRC 0x0800
|
||||
#define RFD_ALN 0x0400
|
||||
#define RFD_RSC 0x0200
|
||||
#define RFD_DMA 0x0100
|
||||
#define RFD_SHORT 0x0080
|
||||
#define RFD_EOF 0x0040
|
||||
#define RFD_EL 0x8000
|
||||
#define RFD_SUSP 0x4000
|
||||
/*
|
||||
* 82586 chip specific structure definitions. For details, see the Intel
|
||||
* LAN Components manual.
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short scp_sysbus;
|
||||
u_short scp_unused[2];
|
||||
u_short scp_iscp;
|
||||
u_short scp_iscp_base;
|
||||
} scp_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short iscp_busy;
|
||||
u_short iscp_scb_offset;
|
||||
u_short iscp_scb;
|
||||
u_short iscp_scb_base;
|
||||
} iscp_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short scb_status;
|
||||
u_short scb_command;
|
||||
u_short scb_cbl_offset;
|
||||
u_short scb_rfa_offset;
|
||||
u_short scb_crcerrs;
|
||||
u_short scb_alnerrs;
|
||||
u_short scb_rscerrs;
|
||||
u_short scb_ovrnerrs;
|
||||
} scb_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short tbd_offset;
|
||||
u_char dest_addr[6];
|
||||
u_short length;
|
||||
} transmit_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short fifolim_bytecnt;
|
||||
u_short addrlen_mode;
|
||||
u_short linprio_interframe;
|
||||
u_short slot_time;
|
||||
u_short hardware;
|
||||
u_short min_frame_len;
|
||||
} configure_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short ac_status;
|
||||
u_short ac_command;
|
||||
u_short ac_link_offset;
|
||||
union {
|
||||
transmit_t transmit;
|
||||
configure_t configure;
|
||||
u_char iasetup[6];
|
||||
} cmd;
|
||||
} ac_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short act_count;
|
||||
u_short next_tbd_offset;
|
||||
u_short buffer_addr;
|
||||
u_short buffer_base;
|
||||
} tbd_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short status;
|
||||
u_short command;
|
||||
u_short link_offset;
|
||||
u_short rbd_offset;
|
||||
u_char destination[6];
|
||||
u_char source[6];
|
||||
u_short length;
|
||||
} fd_t;
|
||||
|
||||
|
||||
typedef struct {
|
||||
u_short status;
|
||||
u_short next_rbd_offset;
|
||||
u_short buffer_addr;
|
||||
u_short buffer_base;
|
||||
u_short size;
|
||||
} rbd_t;
|
||||
2265
sys/i386/isa/if_wl.c
Normal file
2265
sys/i386/isa/if_wl.c
Normal file
File diff suppressed because it is too large
Load Diff
120
sys/i386/isa/if_wl.h
Normal file
120
sys/i386/isa/if_wl.h
Normal file
@ -0,0 +1,120 @@
|
||||
/*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain all copyright
|
||||
* notices, this list of conditions and the following disclaimer.
|
||||
* 2. The names of the authors may not be used to endorse or promote products
|
||||
* derived from this software withough specific prior written permission
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
*/
|
||||
/* Definitions for WaveLAN driver */
|
||||
|
||||
#ifndef _IF_WL_H
|
||||
#define _IF_WL_H
|
||||
|
||||
#define STATUS_TRIES 15000
|
||||
|
||||
#define N_FD 100
|
||||
#define N_RBD 100
|
||||
#define N_TBD 72
|
||||
#define RCVBUFSIZE 540
|
||||
#define I82586NULL 0xffff
|
||||
|
||||
#define DSF_RUNNING 1
|
||||
|
||||
#define MOD_ENAL 1
|
||||
#define MOD_PROM 2
|
||||
|
||||
typedef struct {
|
||||
rbd_t r;
|
||||
char rbd_pad[2];
|
||||
char rbuffer[RCVBUFSIZE];
|
||||
} ru_t;
|
||||
|
||||
/* Board 64k RAM layout. Offsets from 0x0000 */
|
||||
|
||||
#define OFFSET_RU 0x0000 /* 0x64 * fd_t = 0x898 */
|
||||
#define OFFSET_RBD 0x0900 /* 0x64 * ru_t = 0xd7a0 */
|
||||
#define OFFSET_CU 0xe0a0 /* 0x100 */
|
||||
#define OFFSET_TBD 0xe1a0 /* 0x48 * tbd_t = 0x240 */
|
||||
#define OFFSET_TBUF 0xe3e0 /* 0x1bfe */
|
||||
#define OFFSET_SCB 0xffde /* 0x1 * scb_t = 0x10 */
|
||||
#define OFFSET_ISCP 0xffee /* 0x1 * iscp_t = 0x8 */
|
||||
#define OFFSET_SCP 0xfff6 /* 0x1 * scp_t = 0xa */
|
||||
|
||||
/* WaveLAN host interface definitions */
|
||||
|
||||
#define HACR(base) (base) /* Host Adapter Command Register */
|
||||
#define HASR(base) (base) /* Host Adapter Status Register */
|
||||
#define MMCR(base) (base+0x2) /* Modem Management Ctrl Register */
|
||||
#define PIOR0(base) (base+0x4) /* Program I/O Address Register 0 */
|
||||
#define PIOP0(base) (base+0x6) /* Program I/O Port 0 */
|
||||
#define PIOR1(base) (base+0x8) /* Program I/O Address Register 1 */
|
||||
#define PIOP1(base) (base+0xa) /* Program I/O Port 1 */
|
||||
#define PIOR2(base) (base+0xc) /* Program I/O Address Register 2 */
|
||||
#define PIOP2(base) (base+0xe) /* Program I/O Port 2 */
|
||||
|
||||
/* Program I/O Mode Register values */
|
||||
|
||||
#define STATIC_PIO 0 /* Mode 1: static mode */
|
||||
#define AUTOINCR_PIO 1 /* Mode 2: auto increment mode */
|
||||
#define AUTODECR_PIO 2 /* Mode 3: auto decrement mode */
|
||||
#define PARAM_ACCESS_PIO 3 /* Mode 4: LAN parameter access mode */
|
||||
#define PIO_MASK 3 /* register mask */
|
||||
#define PIOM(cmd,piono) ((u_short)cmd << 10 << (piono * 2))
|
||||
|
||||
/* Host Adapter status register definitions */
|
||||
|
||||
#define HASR_INTR 0x0001 /* Interrupt request from 82586 */
|
||||
#define HASR_MMC_INTR 0x0002 /* Interrupt request from MMC */
|
||||
#define HASR_MMC_BUSY 0x0004 /* MMC busy indication */
|
||||
#define HASR_PARA_BUSY 0x0008 /* LAN parameter storage area busy */
|
||||
|
||||
/* Host Adapter command register definitions */
|
||||
|
||||
#define HACR_RESET 0x0001 /* Reset board */
|
||||
#define HACR_CA 0x0002 /* Set Channel Attention for 82586 */
|
||||
#define HACR_16BITS 0x0004 /* 1==16 bits operation, 0==8 bits */
|
||||
#define HACR_OUT1 0x0008 /* General purpose output pin */
|
||||
#define HACR_OUT2 0x0010 /* General purpose output pin */
|
||||
#define HACR_MASK_82586 0x0020 /* Mask 82586 interrupts, 1==unmask */
|
||||
#define HACR_MASK_MMC 0x0040 /* Mask MMC interrupts, 1==unmask */
|
||||
#define HACR_INTR_CLEN 0x0080 /* interrupt status clear enable */
|
||||
|
||||
#define HACR_DEFAULT (HACR_OUT1 | HACR_OUT2 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
|
||||
#define HACR_INTRON (HACR_MASK_82586 | HACR_MASK_MMC | HACR_INTR_CLEN)
|
||||
#define CMD(unit) \
|
||||
{ \
|
||||
outw(HACR(WLSOFTC(unit)->base),WLSOFTC(unit)->hacr); \
|
||||
/* delay for 50 us, might only be needed sometimes */ \
|
||||
DELAY(DELAYCONST); \
|
||||
}
|
||||
|
||||
/* macro for setting the channel attention bit. No delays here since
|
||||
* it is used in critical sections
|
||||
*/
|
||||
#define SET_CHAN_ATTN(unit) \
|
||||
{ \
|
||||
outw(HACR(WLSOFTC(unit)->base),WLSOFTC(unit)->hacr | HACR_CA); \
|
||||
}
|
||||
|
||||
|
||||
#define MMC_WRITE(cmd,val) \
|
||||
while(inw(HASR(WLSOFTC(unit)->base)) & HASR_MMC_BUSY) ; \
|
||||
outw(MMCR(WLSOFTC(unit)->base), \
|
||||
(u_short)(((u_short)(val) << 8) | ((cmd) << 1) | 1))
|
||||
|
||||
#endif _IF_WL_H
|
||||
|
||||
Loading…
Reference in New Issue
Block a user