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- Make mips_bus_space_generic be of type bus_space_tag_t instead of

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struct bus_space and update all relevant places.
This commit is contained in:
Oleksandr Tymoshenko 2009-04-19 22:02:14 +00:00
parent cf6e3ada35
commit 50b3024887
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/projects/mips/; revision=191282
15 changed files with 24 additions and 25 deletions
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2
sys/mips/adm5120/obio.c
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@ -269,7 +269,7 @@ obio_activate_resource(device_t bus, device_t child, int type, int rid,
vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
rman_set_virtual(r, vaddr);
rman_set_bustag(r, &mips_bus_space_generic);
rman_set_bustag(r, mips_bus_space_generic);
rman_set_bushandle(r, (bus_space_handle_t)vaddr);
}

4
sys/mips/adm5120/uart_cpu_adm5120.c
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@ -67,7 +67,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->ops = uart_getops(&uart_adm5120_uart_class);
di->bas.chan = 0;
di->bas.bst = &mips_bus_space_generic;
di->bas.bst = mips_bus_space_generic;
di->bas.regshft = 0;
di->bas.rclk = 0;
di->baudrate = 115200;
@ -76,7 +76,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->parity = UART_PARITY_NONE;
uart_bus_space_io = 0;
uart_bus_space_mem = &mips_bus_space_generic;
uart_bus_space_mem = mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(ADM5120_BASE_UART0);
return (0);

2
sys/mips/alchemy/obio.c
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@ -269,7 +269,7 @@ obio_activate_resource(device_t bus, device_t child, int type, int rid,
vaddr = (void *)MIPS_PHYS_TO_KSEG1((intptr_t)rman_get_start(r));
rman_set_virtual(r, vaddr);
rman_set_bustag(r, &mips_bus_space_generic);
rman_set_bustag(r, mips_bus_space_generic);
rman_set_bushandle(r, (bus_space_handle_t)vaddr);
}

4
sys/mips/alchemy/uart_cpu_alchemy.c
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@ -63,7 +63,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
di->bas.bst = &mips_bus_space_generic;
di->bas.bst = mips_bus_space_generic;
di->bas.regshft = 0;
di->bas.rclk = 0;
di->baudrate = 115200;
@ -72,7 +72,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->parity = UART_PARITY_NONE;
uart_bus_space_io = 0;
uart_bus_space_mem = &mips_bus_space_generic;
uart_bus_space_mem = mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(UART0_BASE);
return (0);

4
sys/mips/idt/uart_bus_rc32434.c
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@ -88,10 +88,10 @@ uart_rc32434_probe(device_t dev)
sc->sc_class = &uart_ns8250_class;
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_sysdev->bas.regshft = 2;
sc->sc_sysdev->bas.bst = &mips_bus_space_generic;
sc->sc_sysdev->bas.bst = mips_bus_space_generic;
sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
sc->sc_bas.regshft = 2;
sc->sc_bas.bst = &mips_bus_space_generic;
sc->sc_bas.bst = mips_bus_space_generic;
sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0);
return (uart_bus_probe(dev, 2, 330000000UL/2, 0, 0));

4
sys/mips/idt/uart_cpu_rc32434.c
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@ -71,7 +71,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
/* Got it. Fill in the instance and return it. */
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
di->bas.bst = &mips_bus_space_generic;
di->bas.bst = mips_bus_space_generic;
di->bas.regshft = 2;
di->bas.rclk = 330000000UL/2; /* IPbus clock */
di->baudrate = 115200;
@ -79,7 +79,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->stopbits = 1;
di->parity = UART_PARITY_NONE;
uart_bus_space_io = 0;
uart_bus_space_mem = &mips_bus_space_generic;
uart_bus_space_mem = mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(maddr);
return (0);
}

2
sys/mips/include/bus.h
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@ -717,7 +717,7 @@ void __bs_c(f,_bs_c_8) (void *t, bus_space_handle_t bsh1, \
* declare generic bus space, it suits all needs in
*/
DECLARE_BUS_SPACE_PROTOTYPES(generic);
extern struct bus_space mips_bus_space_generic;
extern bus_space_tag_t mips_bus_space_generic;
#include <machine/bus_dma.h>
#endif /* _MACHINE_BUS_H_ */

2
sys/mips/malta/gt_pci.c
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@ -206,7 +206,7 @@ gt_pci_attach(device_t dev)
busno = 0;
sc->sc_dev = dev;
sc->sc_busno = busno;
sc->sc_st = &mips_bus_space_generic;
sc->sc_st = mips_bus_space_generic;
/* Use KSEG1 to access IO ports for it is uncached */
sc->sc_io = MIPS_PHYS_TO_KSEG1(MALTA_PCI0_IO_BASE);

2
sys/mips/malta/obio.c
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@ -84,7 +84,7 @@ obio_attach(device_t dev)
{
struct obio_softc *sc = device_get_softc(dev);
sc->oba_st = &mips_bus_space_generic;
sc->oba_st = mips_bus_space_generic;
sc->oba_addr = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
sc->oba_size = MALTA_PCIMEM3_SIZE;
sc->oba_rman.rm_type = RMAN_ARRAY;

4
sys/mips/malta/uart_bus_maltausart.c
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@ -88,9 +88,9 @@ uart_malta_probe(device_t dev)
sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
sc->sc_class = &uart_ns8250_class;
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_sysdev->bas.bst = &mips_bus_space_generic;
sc->sc_sysdev->bas.bst = mips_bus_space_generic;
sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
sc->sc_bas.bst = &mips_bus_space_generic;
sc->sc_bas.bst = mips_bus_space_generic;
sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
return(uart_bus_probe(dev, 0, 0, 0, 0));
}

4
sys/mips/malta/uart_cpu_maltausart.c
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@ -67,7 +67,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
{
di->ops = uart_getops(&uart_ns8250_class);
di->bas.chan = 0;
di->bas.bst = &mips_bus_space_generic;
di->bas.bst = mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR);
di->bas.regshft = 0;
di->bas.rclk = 0;
@ -77,6 +77,6 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->parity = UART_PARITY_NONE;
uart_bus_space_io = NULL;
uart_bus_space_mem = &mips_bus_space_generic;
uart_bus_space_mem = mips_bus_space_generic;
return (0);
}

5
sys/mips/mips/bus_space_generic.c
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@ -89,7 +89,7 @@ __FBSDID("$FreeBSD$");
#include <machine/bus.h>
#include <machine/cache.h>
struct bus_space mips_bus_space_generic = {
static struct bus_space generic_space = {
/* cookie */
(void *) 0,
@ -196,7 +196,8 @@ struct bus_space mips_bus_space_generic = {
NULL,
};
/* generic bus_space tag */
bus_space_tag_t mips_bus_space_generic = &generic_space;
int
generic_bs_map(void *t __unused, bus_addr_t addr,

4
sys/mips/sentry5/obio.c
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@ -119,7 +119,6 @@ obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
{
struct resource *rv;
struct rman *rm;
bus_space_tag_t bt = 0;
bus_space_handle_t bh = 0;
struct obio_softc *sc = device_get_softc(bus);
@ -131,7 +130,6 @@ obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
return (NULL);
case SYS_RES_IOPORT:
rm = &sc->oba_rman;
bt = sc->oba_st;
bh = sc->oba_addr;
start = bh;
break;
@ -146,7 +144,7 @@ obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
if (type == SYS_RES_IRQ)
return (rv);
rman_set_rid(rv, *rid);
rman_set_bustag(rv, bt);
rman_set_bustag(rv, mips_bus_space_generic);
rman_set_bushandle(rv, bh);
if (0) {

4
sys/mips/sentry5/uart_bus_sbusart.c
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@ -85,9 +85,9 @@ uart_malta_probe(device_t dev)
sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
sc->sc_class = &uart_ns8250_class;
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_sysdev->bas.bst = 0;
sc->sc_sysdev->bas.bst = mips_bus_space_generic;
sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
sc->sc_bas.bst = 0;
sc->sc_bas.bst = mips_bus_space_generic;
sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
return(uart_bus_probe(dev, 0, 0, 0, 0));
}

2
sys/mips/sentry5/uart_cpu_sbusart.c
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@ -76,7 +76,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
di->parity = UART_PARITY_NONE;
uart_bus_space_io = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
uart_bus_space_mem = mips_bus_space_generic;
di->bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
return (0);
}