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nvme: Use the NVMEF macro to construct fields
Reviewed by: chuck, imp Sponsored by: Chelsio Communications Differential Revision: https://reviews.freebsd.org/D43605
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3a477a9b70
commit
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@ -344,25 +344,25 @@ nvme_ctrlr_enable(struct nvme_controller *ctrlr)
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qsize = ctrlr->adminq.num_entries - 1;
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aqa = 0;
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aqa = (qsize & NVME_AQA_REG_ACQS_MASK) << NVME_AQA_REG_ACQS_SHIFT;
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aqa |= (qsize & NVME_AQA_REG_ASQS_MASK) << NVME_AQA_REG_ASQS_SHIFT;
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aqa |= NVMEF(NVME_AQA_REG_ACQS, qsize);
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aqa |= NVMEF(NVME_AQA_REG_ASQS, qsize);
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nvme_mmio_write_4(ctrlr, aqa, aqa);
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/* Initialization values for CC */
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cc = 0;
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cc |= 1 << NVME_CC_REG_EN_SHIFT;
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cc |= 0 << NVME_CC_REG_CSS_SHIFT;
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cc |= 0 << NVME_CC_REG_AMS_SHIFT;
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cc |= 0 << NVME_CC_REG_SHN_SHIFT;
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cc |= 6 << NVME_CC_REG_IOSQES_SHIFT; /* SQ entry size == 64 == 2^6 */
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cc |= 4 << NVME_CC_REG_IOCQES_SHIFT; /* CQ entry size == 16 == 2^4 */
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cc |= NVMEF(NVME_CC_REG_EN, 1);
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cc |= NVMEF(NVME_CC_REG_CSS, 0);
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cc |= NVMEF(NVME_CC_REG_AMS, 0);
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cc |= NVMEF(NVME_CC_REG_SHN, 0);
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cc |= NVMEF(NVME_CC_REG_IOSQES, 6); /* SQ entry size == 64 == 2^6 */
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cc |= NVMEF(NVME_CC_REG_IOCQES, 4); /* CQ entry size == 16 == 2^4 */
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/*
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* Use the Memory Page Size selected during device initialization. Note
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* that value stored in mps is suitable to use here without adjusting by
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* NVME_MPS_SHIFT.
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*/
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cc |= ctrlr->mps << NVME_CC_REG_MPS_SHIFT;
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cc |= NVMEF(NVME_CC_REG_MPS, ctrlr->mps);
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nvme_ctrlr_barrier(ctrlr, BUS_SPACE_BARRIER_WRITE);
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nvme_mmio_write_4(ctrlr, cc, cc);
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@ -1557,7 +1557,7 @@ nvme_ctrlr_shutdown(struct nvme_controller *ctrlr)
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cc = nvme_mmio_read_4(ctrlr, cc);
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cc &= ~NVMEM(NVME_CC_REG_SHN);
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cc |= NVME_SHN_NORMAL << NVME_CC_REG_SHN_SHIFT;
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cc |= NVMEF(NVME_CC_REG_SHN, NVME_SHN_NORMAL);
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nvme_mmio_write_4(ctrlr, cc, cc);
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timeout = ticks + (ctrlr->cdata.rtd3e == 0 ? 5 * hz :
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@ -286,7 +286,8 @@ nvme_bio_child_inbed(struct bio *parent, int bio_error)
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bzero(&parent_cpl, sizeof(parent_cpl));
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if (parent->bio_flags & BIO_ERROR) {
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parent_cpl.status &= ~NVMEM(NVME_STATUS_SC);
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parent_cpl.status |= (NVME_SC_DATA_TRANSFER_ERROR) << NVME_STATUS_SC_SHIFT;
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parent_cpl.status |= NVMEF(NVME_STATUS_SC,
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NVME_SC_DATA_TRANSFER_ERROR);
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}
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nvme_ns_bio_done(parent, &parent_cpl);
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}
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@ -493,9 +493,9 @@ nvme_qpair_manual_complete_tracker(
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cpl.sqid = qpair->id;
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cpl.cid = tr->cid;
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cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
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cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
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cpl.status |= (dnr & NVME_STATUS_DNR_MASK) << NVME_STATUS_DNR_SHIFT;
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cpl.status |= NVMEF(NVME_STATUS_SCT, sct);
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cpl.status |= NVMEF(NVME_STATUS_SC, sc);
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cpl.status |= NVMEF(NVME_STATUS_DNR, dnr);
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/* M=0 : this is artificial so no data in error log page */
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/* CRD=0 : this is artificial and no delayed retry support anyway */
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/* P=0 : phase not checked */
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@ -511,8 +511,8 @@ nvme_qpair_manual_complete_request(struct nvme_qpair *qpair,
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memset(&cpl, 0, sizeof(cpl));
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cpl.sqid = qpair->id;
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cpl.status |= (sct & NVME_STATUS_SCT_MASK) << NVME_STATUS_SCT_SHIFT;
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cpl.status |= (sc & NVME_STATUS_SC_MASK) << NVME_STATUS_SC_SHIFT;
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cpl.status |= NVMEF(NVME_STATUS_SCT, sct);
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cpl.status |= NVMEF(NVME_STATUS_SC, sc);
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error = nvme_completion_is_error(&cpl);
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