Merge from projects/mips to head by hand:

r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP.  Provide a missing prototype.

r201845 | imp | 2010-01-08 15:48:21 -0700 (Fri, 08 Jan 2010) | 2 lines
Centralize initialization of pcpu, and set curthread early...

r201631 | neel | 2010-01-05 23:42:08 -0700 (Tue, 05 Jan 2010) | 5 lines
Remove all CFE-specific code from locore.S. The CFE entrypoint initialization
is now done in platform-specific code.
Approved by: imp (mentor)

r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
 making it run ;-)

r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines

Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
   intr_machdep.c.  This allows us to have an architecture dependant
   intr_machdep.c (which we will need for RMI) in the machine specific
   directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
   may need to look at finding a better place to put this. But first I want to
   get this thing compiling.

r196236 | imp | 2009-08-14 19:03:13 -0600 (Fri, 14 Aug 2009) | 3 lines
Fix style error replicated multiple times.  Move to
mips_bus_space_generic for octeon obio impl.

r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
    struct bus_space and update all relevant places.

r187415 | gonzo | 2009-01-18 16:49:02 -0700 (Sun, 18 Jan 2009) | 3 lines
- Move Silicon Backplanes code out to system-wide level (dev/siba) as
    it's going to be used not only for siba5 devices.

sys/mips/sentry5/files.sentry5

@@ -4,11 +4,6 @@
 # for USB 1.1 OHCI, Ethernet and IPSEC cores
 # which are believed to be devices we have drivers for
 # which just need to be tweaked for attachment to an SSB system bus.
-
 mips/sentry5/s5_machdep.c		standard
-dev/siba/siba.c					optional siba
-dev/siba/siba_pcib.c				optional siba pci
-mips/sentry5/siba_cc.c			optional siba
-
-# notyet
-#mips/sentry5/siba_mips.c			optional siba
+mips/mips/intr_machdep.c		standard
+mips/mips/tick.c			standard

sys/mips/sentry5/obio.c

@@ -72,13 +72,11 @@ static int have_one = 0;
 int
 obio_probe(device_t dev)
 {
-	if(!have_one)
-	{
+	if (!have_one) {
 		have_one = 1;
 		return 0;
 	}
-	else
-		return (ENXIO);
+	return (ENXIO);
 }
 
 int
@@ -119,7 +117,6 @@ obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
 {
 	struct resource *rv;
 	struct rman *rm;
-	bus_space_tag_t bt = 0;
 	bus_space_handle_t bh = 0;
 	struct obio_softc *sc = device_get_softc(bus);
 
@@ -131,7 +128,6 @@ obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
 		return (NULL);
 	case SYS_RES_IOPORT:
 		rm = &sc->oba_rman;
-		bt = sc->oba_st;
 		bh = sc->oba_addr;
 		start = bh;
 		break;
@@ -146,7 +142,7 @@ obio_alloc_resource(device_t bus, device_t child, int type, int *rid,
 	if (type == SYS_RES_IRQ)
 		return (rv);
 	rman_set_rid(rv, *rid);
-	rman_set_bustag(rv, bt);
+	rman_set_bustag(rv, mips_bus_space_generic);
 	rman_set_bushandle(rv, bh);
 	
 	if (0) {

sys/mips/sentry5/s5_machdep.c

@@ -79,14 +79,15 @@ __FBSDID("$FreeBSD$");
 #include <dev/cfe/cfe_api.h>
 #endif
 
-#ifdef CFE
-extern uint32_t cfe_handle;
-extern uint32_t cfe_vector;
-#endif
-
 extern int *edata;
 extern int *end;
 
+void
+platform_cpu_init()
+{
+	/* Nothing special */
+}
+
 static void
 mips_init(void)
 {
@@ -177,8 +178,8 @@ platform_trap_exit(void)
 }
 
 void
-platform_start(__register_t a0 __unused, __register_t a1 __unused, 
-    __register_t a2 __unused, __register_t a3 __unused)
+platform_start(__register_t a0, __register_t a1, __register_t a2,
+	       __register_t a3)
 {
 	vm_offset_t kernend;
 	uint64_t platform_counter_freq;
@@ -187,20 +188,24 @@ platform_start(__register_t a0 __unused, __register_t a1 __unused,
 	kernend = round_page((vm_offset_t)&end);
 	memset(&edata, 0, kernend - (vm_offset_t)(&edata));
 
+	/* Initialize pcpu stuff */
+	mips_pcpu0_init();
+
 #ifdef CFE
 	/*
 	 * Initialize CFE firmware trampolines before
 	 * we initialize the low-level console.
+	 *
+	 * CFE passes the following values in registers:
+	 * a0: firmware handle
+	 * a2: firmware entry point
+	 * a3: entry point seal
 	 */
-	if (cfe_handle != 0)
-		cfe_init(cfe_handle, cfe_vector);
+	if (a3 == CFE_EPTSEAL)
+		cfe_init(a0, a2);
 #endif
 	cninit();
 
-#ifdef CFE
-	if (cfe_handle == 0)
-		panic("CFE was not detected by locore.\n");
-#endif
 	mips_init();
 
 # if 0

sys/mips/sentry5/uart_bus_sbusart.c

@@ -85,9 +85,9 @@ uart_malta_probe(device_t dev)
 	sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
 	sc->sc_class = &uart_ns8250_class;
 	bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
-	sc->sc_sysdev->bas.bst = 0;
+	sc->sc_sysdev->bas.bst = mips_bus_space_generic;
 	sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
-	sc->sc_bas.bst = 0;
+	sc->sc_bas.bst = mips_bus_space_generic;
 	sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
 	return(uart_bus_probe(dev, 0, 0, 0, 0));
 }

sys/mips/sentry5/uart_cpu_sbusart.c

@@ -76,7 +76,7 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	di->parity = UART_PARITY_NONE;
 
 	uart_bus_space_io = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
-	uart_bus_space_mem = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
+	uart_bus_space_mem = mips_bus_space_generic;
 	di->bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR);
 	return (0);
 }