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Update the StrongArm port to match the current code.
- Implement arm_mask_irqs and arm_unmask_irqs - Provide the available physical address range after pmap_bootstrap allocated things, instead or before, or bad things happen.
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=139022
@ -40,7 +40,6 @@ options SOFTUPDATES #Enable FFS soft updates support
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options UFS_ACL #Support for access control lists
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options UFS_DIRHASH #Improve performance on big directories
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options MD_ROOT #MD is a potential root device
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options MD_ROOT_SIZE=65535
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options ROOTDEVNAME=\"ufs:md0\"
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options NFSCLIENT #Network Filesystem Client
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options NFSSERVER #Network Filesystem Server
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@ -134,7 +134,7 @@ struct pcpu __pcpu;
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struct pcpu *pcpup = &__pcpu;
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#ifndef MD_ROOT_SIZE
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#error SIMICS needs MD_ROOT and MD_ROOT_SIZE
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#define MD_ROOT_SIZE 65535
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#endif
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/* Physical and virtual addresses for some global pages */
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@ -400,14 +400,14 @@ initarm(void *arg, void *arg2)
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pmap_curmaxkvaddr = freemempos + KERNEL_PT_VMDATA_NUM * 0x400000;
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pmap_bootstrap(KERNEL_VM_BASE,
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pmap_bootstrap(freemempos,
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0xd0000000, &kernel_l1pt);
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mutex_init();
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phys_avail[0] = round_page(freemempos);
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phys_avail[0] = round_page(virtual_avail);
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phys_avail[1] = 0xc0000000 + 0x02000000 - 1;
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phys_avail[2] = 0;
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phys_avail[3] = 0;
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@ -115,16 +115,26 @@ arm_get_irqnb(void *frame)
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return(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAIPIC_IP));
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}
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static uint32_t sa11x0_irq_mask = 0xfffffff;
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extern vm_offset_t saipic_base;
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void
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arm_mask_irqs(int irq)
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{
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/* XXX */
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sa11x0_irq_mask &= ~irq;
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__asm __volatile("str %0, [%1, #0x04]" /* SAIPIC_MR */
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: : "r" (sa11x0_irq_mask), "r" (saipic_base));
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}
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void
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arm_unmask_irqs(int irq)
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{
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/* XXX */
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sa11x0_irq_mask |= irq;
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__asm __volatile("str %0, [%1, #0x04]" /* SAIPIC_MR */
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: : "r" (sa11x0_irq_mask), "r" (saipic_base));
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}
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void stray_irqhandler(void *);
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