From 96ff3b75d4f8574bb210c6035cd9f6f08ef81ea7 Mon Sep 17 00:00:00 2001 From: Fabien Thomas Date: Mon, 12 Dec 2011 12:30:44 +0000 Subject: [PATCH] Add VIA microde update support to cpuctl(4) and cpucontrol(8). Support have been tested with X2 CPU and QuadCore CPU. MFC after: 1 month --- sys/dev/cpuctl/cpuctl.c | 81 ++++++++++- usr.sbin/cpucontrol/Makefile | 2 +- usr.sbin/cpucontrol/cpucontrol.c | 2 + usr.sbin/cpucontrol/via.c | 222 +++++++++++++++++++++++++++++++ usr.sbin/cpucontrol/via.h | 63 +++++++++ 5 files changed, 368 insertions(+), 2 deletions(-) create mode 100644 usr.sbin/cpucontrol/via.c create mode 100644 usr.sbin/cpucontrol/via.h diff --git a/sys/dev/cpuctl/cpuctl.c b/sys/dev/cpuctl/cpuctl.c index c3a2434835fe..15534570ff9c 100644 --- a/sys/dev/cpuctl/cpuctl.c +++ b/sys/dev/cpuctl/cpuctl.c @@ -74,6 +74,8 @@ static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data, static int update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td); static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td); +static int update_via(int cpu, cpuctl_update_args_t *args, + struct thread *td); static struct cdev **cpuctl_devs; static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); @@ -281,8 +283,10 @@ cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td) vendor[12] = '\0'; if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) ret = update_intel(cpu, data, td); - else if(strncmp(vendor, INTEL_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) + else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) ret = update_amd(cpu, data, td); + else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0) + ret = update_via(cpu, data, td); else ret = ENXIO; return (ret); @@ -402,6 +406,81 @@ fail: return (ret); } +static int +update_via(int cpu, cpuctl_update_args_t *args, struct thread *td) +{ + void *ptr = NULL; + uint64_t rev0, rev1, res; + uint32_t tmp[4]; + int is_bound = 0; + int oldcpu; + int ret; + + if (args->size == 0 || args->data == NULL) { + DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); + return (EINVAL); + } + if (args->size > UCODE_SIZE_MAX) { + DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); + return (EINVAL); + } + + /* + * 4 byte alignment required. + */ + ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK); + ptr = (void *)(16 + ((intptr_t)ptr & ~0xf)); + if (copyin(args->data, ptr, args->size) != 0) { + DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", + __LINE__, args->data, ptr, args->size); + ret = EFAULT; + goto fail; + } + oldcpu = td->td_oncpu; + is_bound = cpu_sched_is_bound(td); + set_cpu(cpu, td); + critical_enter(); + rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current micorcode revision. */ + + /* + * Perform update. + */ + wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); + do_cpuid(1, tmp); + + /* + * Result are in low byte of MSR FCR5: + * 0x00: No update has been attempted since RESET. + * 0x01: The last attempted update was successful. + * 0x02: The last attempted update was unsuccessful due to a bad + * environment. No update was loaded and any preexisting + * patches are still active. + * 0x03: The last attempted update was not applicable to this processor. + * No update was loaded and any preexisting patches are still + * active. + * 0x04: The last attempted update was not successful due to an invalid + * update data block. No update was loaded and any preexisting + * patches are still active + */ + rdmsr_safe(0x1205, &res); + res &= 0xff; + critical_exit(); + rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ + restore_cpu(oldcpu, is_bound, td); + + DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, + (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); + + if (res != 0x01) + ret = EINVAL; + else + ret = 0; +fail: + if (ptr != NULL) + contigfree(ptr, args->size, M_CPUCTL); + return (ret); +} + int cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td) { diff --git a/usr.sbin/cpucontrol/Makefile b/usr.sbin/cpucontrol/Makefile index a048dd77c3db..759e13d13b11 100644 --- a/usr.sbin/cpucontrol/Makefile +++ b/usr.sbin/cpucontrol/Makefile @@ -2,6 +2,6 @@ PROG= cpucontrol MAN= cpucontrol.8 -SRCS= cpucontrol.c intel.c amd.c +SRCS= cpucontrol.c intel.c amd.c via.c .include diff --git a/usr.sbin/cpucontrol/cpucontrol.c b/usr.sbin/cpucontrol/cpucontrol.c index 82bbf053eb6b..7477007b8f27 100644 --- a/usr.sbin/cpucontrol/cpucontrol.c +++ b/usr.sbin/cpucontrol/cpucontrol.c @@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$"); #include "cpucontrol.h" #include "amd.h" #include "intel.h" +#include "via.h" int verbosity_level = 0; @@ -91,6 +92,7 @@ struct ucode_handler { } handlers[] = { { intel_probe, intel_update }, { amd_probe, amd_update }, + { via_probe, via_update }, }; #define NHANDLERS (sizeof(handlers) / sizeof(*handlers)) diff --git a/usr.sbin/cpucontrol/via.c b/usr.sbin/cpucontrol/via.c new file mode 100644 index 000000000000..de5e3868eb21 --- /dev/null +++ b/usr.sbin/cpucontrol/via.c @@ -0,0 +1,222 @@ +/*- + * Copyright (c) 2011 Fabien Thomas . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "cpucontrol.h" +#include "via.h" + +int +via_probe(int fd) +{ + char vendor[13]; + int error; + cpuctl_cpuid_args_t idargs = { + .level = 0, + }; + + error = ioctl(fd, CPUCTL_CPUID, &idargs); + if (error < 0) { + WARN(0, "ioctl()"); + return (1); + } + ((uint32_t *)vendor)[0] = idargs.data[1]; + ((uint32_t *)vendor)[1] = idargs.data[3]; + ((uint32_t *)vendor)[2] = idargs.data[2]; + vendor[12] = '\0'; + if (strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) != 0) + return (1); + + /* TODO: detect Nano CPU. */ + return (0); +} + +void +via_update(const char *dev, const char *path) +{ + int fd, devfd; + struct stat st; + uint32_t *fw_image; + uint32_t sum; + unsigned int i; + size_t payload_size; + via_fw_header_t *fw_header; + uint32_t signature, flags; + int32_t revision; + void *fw_data; + size_t data_size, total_size; + cpuctl_msr_args_t msrargs = { + .msr = MSR_IA32_PLATFORM_ID, + }; + cpuctl_cpuid_args_t idargs = { + .level = 1, /* Signature. */ + }; + cpuctl_update_args_t args; + int error; + + assert(path); + assert(dev); + + fd = -1; + devfd = -1; + fw_image = MAP_FAILED; + devfd = open(dev, O_RDWR); + if (devfd < 0) { + WARN(0, "could not open %s for writing", dev); + return; + } + error = ioctl(devfd, CPUCTL_CPUID, &idargs); + if (error < 0) { + WARN(0, "ioctl(%s)", dev); + goto fail; + } + signature = idargs.data[0]; + error = ioctl(devfd, CPUCTL_RDMSR, &msrargs); + if (error < 0) { + WARN(0, "ioctl(%s)", dev); + goto fail; + } + + /* + * MSR_IA32_PLATFORM_ID contains flag in BCD in bits 52-50. + */ + flags = 1 << ((msrargs.data >> 50) & 7); + msrargs.msr = MSR_BIOS_SIGN; + error = ioctl(devfd, CPUCTL_RDMSR, &msrargs); + if (error < 0) { + WARN(0, "ioctl(%s)", dev); + goto fail; + } + revision = msrargs.data >> 32; /* Revision in the high dword. */ + WARNX(2, "found cpu type %#x family %#x model %#x stepping %#x.", + (signature >> 12) & 0x03, (signature >> 8) & 0x0f, + (signature >> 4) & 0x0f, (signature >> 0) & 0x0f); + /* + * Open firmware image. + */ + fd = open(path, O_RDONLY, 0); + if (fd < 0) { + WARN(0, "open(%s)", path); + return; + } + error = fstat(fd, &st); + if (error != 0) { + WARN(0, "fstat(%s)", path); + goto fail; + } + if (st.st_size < 0 || (unsigned)st.st_size < sizeof(*fw_header)) { + WARNX(2, "file too short: %s", path); + goto fail; + } + + /* + * mmap the whole image. + */ + fw_image = (uint32_t *)mmap(NULL, st.st_size, PROT_READ, + MAP_PRIVATE, fd, 0); + if (fw_image == MAP_FAILED) { + WARN(0, "mmap(%s)", path); + goto fail; + } + fw_header = (via_fw_header_t *)fw_image; + if (fw_header->signature != VIA_HEADER_SIGNATURE || + fw_header->loader_revision != VIA_LOADER_REVISION) { + WARNX(2, "%s is not a valid via firmware: version mismatch", + path); + goto fail; + } + data_size = fw_header->data_size; + total_size = fw_header->total_size; + if (total_size > (unsigned)st.st_size || st.st_size < 0) { + WARNX(2, "file too short: %s", path); + goto fail; + } + payload_size = data_size + sizeof(*fw_header); + + /* + * Check the primary checksum. + */ + sum = 0; + for (i = 0; i < (payload_size / sizeof(uint32_t)); i++) + sum += *((uint32_t *)fw_image + i); + if (sum != 0) { + WARNX(2, "%s: update data checksum invalid", path); + goto fail; + } + + fw_data = fw_header + 1; /* Pointer to the update data. */ + + /* + * Check if the given image is ok for this cpu. + */ + if (signature != fw_header->cpu_signature) + goto fail; + + if (fw_header->revision != 0 && revision >= fw_header->revision) { + WARNX(1, "skipping %s of rev %#x: up to date", + path, fw_header->revision); + goto fail; + } + fprintf(stderr, "%s: updating cpu %s from rev %#x to rev %#x... ", + path, dev, revision, fw_header->revision); + args.data = fw_data; + args.size = data_size; + error = ioctl(devfd, CPUCTL_UPDATE, &args); + if (error < 0) { + fprintf(stderr, "failed.\n"); + WARN(0, "ioctl()"); + goto fail; + } + fprintf(stderr, "done.\n"); + +fail: + if (fw_image != MAP_FAILED) + if (munmap(fw_image, st.st_size) != 0) + warn("munmap(%s)", path); + if (devfd >= 0) + close(devfd); + if (fd >= 0) + close(fd); + return; +} diff --git a/usr.sbin/cpucontrol/via.h b/usr.sbin/cpucontrol/via.h new file mode 100644 index 000000000000..ea99eac99130 --- /dev/null +++ b/usr.sbin/cpucontrol/via.h @@ -0,0 +1,63 @@ +/*- + * Copyright (c) 2011 Fabien Thomas . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef VIA_H +#define VIA_H + +/* + * Prototypes. + */ +ucode_probe_t via_probe; +ucode_update_t via_update; + +typedef struct via_fw_header { + uint32_t signature; /* Signature. */ + int32_t revision; /* Unique version number. */ + uint32_t date; /* Date of creation in BCD. */ + uint32_t cpu_signature; /* Extended family, extended + model, type, family, model + and stepping. */ + uint32_t checksum; /* Sum of all DWORDS should + be 0. */ + uint32_t loader_revision; /* Version of the loader + required to load update. */ + uint32_t reserverd1; /* Platform IDs encoded in + the lower 8 bits. */ + uint32_t data_size; + uint32_t total_size; + uint8_t reserved2[12]; +} via_fw_header_t; + +typedef struct via_cpu_signature { + uint32_t cpu_signature; + uint32_t checksum; +} via_cpu_signature_t; + +#define VIA_HEADER_SIGNATURE 0x53415252 +#define VIA_LOADER_REVISION 0x00000001 + +#endif /* !VIA_H */