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After some comments from bde, rewrite the loops to avoid turning the
previously used "micro-optimization" (count-down loop) into a pessimization. Now the loops are written in the more natural count-up form. Also, while being there, i made the logic in out_fdc() similar to the logic in in_fdc(). The old implementation was a bit bogus anyway since it first tested the DIO bit and only afterwards the RQM bit. However, according to the description of the i82077, the DIO bit is only guaranteed to be valid once the RQM bit is set. Thus, the old implementatoin would have had the chance to misbehave on a controller that is implemented in accordance with the i82077 description (but is not bug-for-bug compatible). MFC after: 3 days
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parent
35213a76a9
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a2642c4d67
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=96611
@ -1482,26 +1482,29 @@ fdc_reset(fdc_p fdc)
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/*
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* FDC IO functions, take care of the main status register, timeout
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* in case the desired status bits are never set.
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*
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* These PIO loops initially start out with short delays between
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* each iteration in the expectation that the required condition
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* is usually met quickly, so it can be handled immediately. After
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* about 1 ms, stepping is increased to achieve a better timing
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* accuracy in the calls to DELAY().
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*/
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static int
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fd_in(struct fdc_data *fdc, int *ptr)
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{
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int i, j = FDSTS_TIMEOUT;
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while ((i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM))
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!= (NE7_DIO|NE7_RQM) && j-- > 0) {
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int i, j, step;
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for (j = 0, step = 1;
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(i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM)) != (NE7_DIO|NE7_RQM) &&
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j < FDSTS_TIMEOUT;
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j += step) {
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if (i == NE7_RQM)
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return (fdc_err(fdc, "ready for output in input\n"));
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/*
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* After (maybe) 1 msec of waiting, back off to larger
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* stepping to get the timing more accurate.
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*/
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if (FDSTS_TIMEOUT - j > 1000) {
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DELAY(1000);
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j -= 999;
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} else
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DELAY(1);
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if (j == 1000)
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step = 1000;
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DELAY(step);
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}
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if (j <= 0)
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if (j >= FDSTS_TIMEOUT)
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return (fdc_err(fdc, bootverbose? "input ready timeout\n": 0));
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#ifdef FDC_DEBUG
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i = fddata_rd(fdc);
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@ -1519,36 +1522,19 @@ fd_in(struct fdc_data *fdc, int *ptr)
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int
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out_fdc(struct fdc_data *fdc, int x)
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{
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int i;
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int i, j, step;
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/* Check that the direction bit is set */
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i = FDSTS_TIMEOUT;
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while ((fdsts_rd(fdc) & NE7_DIO) && i-- > 0)
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/*
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* After (maybe) 1 msec of waiting, back off to larger
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* stepping to get the timing more accurate.
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*/
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if (FDSTS_TIMEOUT - i > 1000) {
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DELAY(1000);
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i -= 999;
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} else
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DELAY(1);
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if (i <= 0)
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return (fdc_err(fdc, "direction bit not set\n"));
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/* Check that the floppy controller is ready for a command */
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i = FDSTS_TIMEOUT;
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while ((fdsts_rd(fdc) & NE7_RQM) == 0 && i-- > 0)
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/*
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* After (maybe) 1 msec of waiting, back off to larger
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* stepping to get the timing more accurate.
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*/
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if (FDSTS_TIMEOUT - i > 1000) {
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DELAY(1000);
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i -= 999;
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} else
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DELAY(1);
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if (i <= 0)
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for (j = 0, step = 1;
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(i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM)) != NE7_RQM &&
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j < FDSTS_TIMEOUT;
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j += step) {
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if (i == (NE7_DIO|NE7_RQM))
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return (fdc_err(fdc, "ready for input in output\n"));
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if (j == 1000)
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step = 1000;
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DELAY(step);
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}
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if (j >= FDSTS_TIMEOUT)
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return (fdc_err(fdc, bootverbose? "output ready timeout\n": 0));
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/* Send the command and return */
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70
sys/isa/fd.c
70
sys/isa/fd.c
@ -1482,26 +1482,29 @@ fdc_reset(fdc_p fdc)
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/*
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* FDC IO functions, take care of the main status register, timeout
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* in case the desired status bits are never set.
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*
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* These PIO loops initially start out with short delays between
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* each iteration in the expectation that the required condition
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* is usually met quickly, so it can be handled immediately. After
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* about 1 ms, stepping is increased to achieve a better timing
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* accuracy in the calls to DELAY().
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*/
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static int
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fd_in(struct fdc_data *fdc, int *ptr)
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{
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int i, j = FDSTS_TIMEOUT;
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while ((i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM))
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!= (NE7_DIO|NE7_RQM) && j-- > 0) {
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int i, j, step;
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for (j = 0, step = 1;
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(i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM)) != (NE7_DIO|NE7_RQM) &&
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j < FDSTS_TIMEOUT;
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j += step) {
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if (i == NE7_RQM)
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return (fdc_err(fdc, "ready for output in input\n"));
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/*
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* After (maybe) 1 msec of waiting, back off to larger
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* stepping to get the timing more accurate.
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*/
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if (FDSTS_TIMEOUT - j > 1000) {
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DELAY(1000);
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j -= 999;
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} else
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DELAY(1);
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if (j == 1000)
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step = 1000;
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DELAY(step);
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}
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if (j <= 0)
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if (j >= FDSTS_TIMEOUT)
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return (fdc_err(fdc, bootverbose? "input ready timeout\n": 0));
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#ifdef FDC_DEBUG
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i = fddata_rd(fdc);
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@ -1519,36 +1522,19 @@ fd_in(struct fdc_data *fdc, int *ptr)
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int
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out_fdc(struct fdc_data *fdc, int x)
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{
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int i;
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int i, j, step;
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/* Check that the direction bit is set */
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i = FDSTS_TIMEOUT;
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while ((fdsts_rd(fdc) & NE7_DIO) && i-- > 0)
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/*
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* After (maybe) 1 msec of waiting, back off to larger
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* stepping to get the timing more accurate.
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*/
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if (FDSTS_TIMEOUT - i > 1000) {
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DELAY(1000);
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i -= 999;
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} else
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DELAY(1);
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if (i <= 0)
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return (fdc_err(fdc, "direction bit not set\n"));
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/* Check that the floppy controller is ready for a command */
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i = FDSTS_TIMEOUT;
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while ((fdsts_rd(fdc) & NE7_RQM) == 0 && i-- > 0)
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/*
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* After (maybe) 1 msec of waiting, back off to larger
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* stepping to get the timing more accurate.
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*/
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if (FDSTS_TIMEOUT - i > 1000) {
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DELAY(1000);
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i -= 999;
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} else
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DELAY(1);
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if (i <= 0)
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for (j = 0, step = 1;
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(i = fdsts_rd(fdc) & (NE7_DIO|NE7_RQM)) != NE7_RQM &&
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j < FDSTS_TIMEOUT;
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j += step) {
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if (i == (NE7_DIO|NE7_RQM))
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return (fdc_err(fdc, "ready for input in output\n"));
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if (j == 1000)
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step = 1000;
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DELAY(step);
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}
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if (j >= FDSTS_TIMEOUT)
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return (fdc_err(fdc, bootverbose? "output ready timeout\n": 0));
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/* Send the command and return */
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