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In pci_cfgregread() and pci_cfgregwrite(), multiplex the domain and

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bus number into the bus argument. The bus number occupies the least
significant 8 bits. The PCI domain occupies the most significant 24
bits.

On the Altix 350, the PCI domain is a required parameter, but
changing the prototype of the pci_cfgreg*() functions to include a
separate domain argument has wide-spread consequences across the
supported architectures. We'd be changing a known interface.

Multiplexing is an acceptable kluge to give us what we need with
manageable impact. Note that the PCI bus number fits in 8 bits,
so the multiplexing of the domain is a backward compatible change.
This commit is contained in:
Marcel Moolenaar 2013-07-23 03:03:17 +00:00
parent a992fcc26c
commit ae9742be10
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=253560
1 changed files with 2 additions and 2 deletions
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4
sys/ia64/pci/pci_cfgreg.c
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@ -70,7 +70,7 @@ pci_cfgregread(int bus, int slot, int func, int reg, int len)
register_t is; register_t is;
u_long addr; u_long addr;
addr = pci_sal_address(0, bus, slot, func, reg); addr = pci_sal_address(bus >> 8, bus & 0xff, slot, func, reg);
if (addr == ~0ul) if (addr == ~0ul)
return (~0); return (~0);
@ -91,7 +91,7 @@ pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data, int len)
register_t is; register_t is;
u_long addr; u_long addr;
addr = pci_sal_address(0, bus, slot, func, reg); addr = pci_sal_address(bus >> 8, bus & 0xff, slot, func, reg);
if (addr == ~0ul) if (addr == ~0ul)
return; return;