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Removed check for interrupting board before interrupts were enabled.
This should result in more AST clones getting seen.
This commit is contained in:
parent
5f021e6ca8
commit
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=162
@ -41,7 +41,7 @@
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* into the patch kit. Added in sioselect
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* from com.c. Added port 4 support.
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*/
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static char rcsid[] = "$Header: /a/cvs/386BSD/src/sys.386bsd/i386/isa/sio.c,v 1.2 1993/07/15 17:53:12 davidg Exp $";
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static char rcsid[] = "$Header: /a/cvs/386BSD/src/sys.386bsd/i386/isa/sio.c,v 1.3 1993/07/18 21:27:57 rgrimes Exp $";
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#include "sio.h"
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#if NSIO > 0
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@ -377,7 +377,6 @@ sioprobe(dev)
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if ( inb(iobase + com_cfcr) != CFCR_8BITS
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|| inb(iobase + com_ier) != IER_ETXRDY
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|| inb(iobase + com_mcr) != MCR_IENABLE
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|| !isa_irq_pending(dev)
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|| (inb(iobase + com_iir) & IIR_IMASK) != IIR_TXRDY
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|| isa_irq_pending(dev)
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|| (inb(iobase + com_iir) & IIR_IMASK) != IIR_NOPEND)
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@ -41,7 +41,7 @@
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* into the patch kit. Added in sioselect
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* from com.c. Added port 4 support.
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*/
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static char rcsid[] = "$Header: /a/cvs/386BSD/src/sys.386bsd/i386/isa/sio.c,v 1.2 1993/07/15 17:53:12 davidg Exp $";
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static char rcsid[] = "$Header: /a/cvs/386BSD/src/sys.386bsd/i386/isa/sio.c,v 1.3 1993/07/18 21:27:57 rgrimes Exp $";
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#include "sio.h"
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#if NSIO > 0
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@ -377,7 +377,6 @@ sioprobe(dev)
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if ( inb(iobase + com_cfcr) != CFCR_8BITS
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|| inb(iobase + com_ier) != IER_ETXRDY
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|| inb(iobase + com_mcr) != MCR_IENABLE
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|| !isa_irq_pending(dev)
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|| (inb(iobase + com_iir) & IIR_IMASK) != IIR_TXRDY
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|| isa_irq_pending(dev)
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|| (inb(iobase + com_iir) & IIR_IMASK) != IIR_NOPEND)
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@ -41,7 +41,7 @@
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* into the patch kit. Added in sioselect
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* from com.c. Added port 4 support.
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*/
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static char rcsid[] = "$Header: /a/cvs/386BSD/src/sys.386bsd/i386/isa/sio.c,v 1.2 1993/07/15 17:53:12 davidg Exp $";
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static char rcsid[] = "$Header: /a/cvs/386BSD/src/sys.386bsd/i386/isa/sio.c,v 1.3 1993/07/18 21:27:57 rgrimes Exp $";
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#include "sio.h"
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#if NSIO > 0
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@ -377,7 +377,6 @@ sioprobe(dev)
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if ( inb(iobase + com_cfcr) != CFCR_8BITS
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|| inb(iobase + com_ier) != IER_ETXRDY
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|| inb(iobase + com_mcr) != MCR_IENABLE
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|| !isa_irq_pending(dev)
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|| (inb(iobase + com_iir) & IIR_IMASK) != IIR_TXRDY
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|| isa_irq_pending(dev)
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|| (inb(iobase + com_iir) & IIR_IMASK) != IIR_NOPEND)
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