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- Add pci bus space that translates byte order to little endian,
may be it will be merged with bus_space_reversed later - Handle memory resources close to bus in order to control bus_space_tag
This commit is contained in:
parent
b75cca0708
commit
bcc90b6ff5
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/projects/mips/; revision=192161
@ -52,7 +52,8 @@ __FBSDID("$FreeBSD$");
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include "mips/atheros/ar71xxreg.h"
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#include <mips/atheros/ar71xxreg.h>
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#include <mips/atheros/ar71xx_pci_bus_space.h>
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#undef AR71XX_PCI_DEBUG
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#ifdef AR71XX_PCI_DEBUG
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@ -354,7 +355,7 @@ ar71xx_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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{
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struct ar71xx_pci_softc *sc = device_get_softc(bus);
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struct resource *rv = NULL;
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struct resource *rv;
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struct rman *rm;
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switch (type) {
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@ -382,9 +383,32 @@ ar71xx_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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}
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}
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return (rv);
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}
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static int
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ar71xx_pci_activate_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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int res = (BUS_ACTIVATE_RESOURCE(device_get_parent(bus),
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child, type, rid, r));
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if (!res) {
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switch(type) {
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case SYS_RES_MEMORY:
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case SYS_RES_IOPORT:
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rman_set_bustag(r, ar71xx_bus_space_pcimem);
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break;
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}
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}
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return (res);
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}
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static int
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ar71xx_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
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int flags, driver_filter_t *filt, driver_intr_t *handler,
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@ -495,7 +519,7 @@ static device_method_t ar71xx_pci_methods[] = {
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DEVMETHOD(bus_write_ivar, ar71xx_pci_write_ivar),
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DEVMETHOD(bus_alloc_resource, ar71xx_pci_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_activate_resource, ar71xx_pci_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, ar71xx_pci_setup_intr),
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DEVMETHOD(bus_teardown_intr, ar71xx_pci_teardown_intr),
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198
sys/mips/atheros/ar71xx_pci_bus_space.c
Normal file
198
sys/mips/atheros/ar71xx_pci_bus_space.c
Normal file
@ -0,0 +1,198 @@
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/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <machine/bus.h>
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#include <mips/atheros/ar71xx_pci_bus_space.h>
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static bs_r_1_s_proto(pcimem);
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static bs_r_2_s_proto(pcimem);
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static bs_r_4_s_proto(pcimem);
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static bs_w_1_s_proto(pcimem);
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static bs_w_2_s_proto(pcimem);
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static bs_w_4_s_proto(pcimem);
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/*
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* Bus space that handles offsets in word for 1/2 bytes read/write access.
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* Byte order of values is handled by device drivers itself.
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*/
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static struct bus_space bus_space_pcimem = {
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/* cookie */
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(void *) 0,
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/* mapping/unmapping */
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generic_bs_map,
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generic_bs_unmap,
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generic_bs_subregion,
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/* allocation/deallocation */
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NULL,
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NULL,
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/* barrier */
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generic_bs_barrier,
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/* read (single) */
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generic_bs_r_1,
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generic_bs_r_2,
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generic_bs_r_4,
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NULL,
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/* read multiple */
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generic_bs_rm_1,
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generic_bs_rm_2,
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generic_bs_rm_4,
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NULL,
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/* read region */
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generic_bs_rr_1,
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generic_bs_rr_2,
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generic_bs_rr_4,
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NULL,
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/* write (single) */
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generic_bs_w_1,
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generic_bs_w_2,
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generic_bs_w_4,
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NULL,
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/* write multiple */
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generic_bs_wm_1,
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generic_bs_wm_2,
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generic_bs_wm_4,
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NULL,
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/* write region */
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NULL,
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generic_bs_wr_2,
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generic_bs_wr_4,
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NULL,
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/* set multiple */
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NULL,
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NULL,
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NULL,
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NULL,
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/* set region */
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NULL,
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generic_bs_sr_2,
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generic_bs_sr_4,
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NULL,
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/* copy */
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NULL,
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generic_bs_c_2,
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NULL,
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NULL,
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/* read (single) stream */
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pcimem_bs_r_1_s,
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pcimem_bs_r_2_s,
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pcimem_bs_r_4_s,
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NULL,
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/* read multiple stream */
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generic_bs_rm_1,
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generic_bs_rm_2,
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generic_bs_rm_4,
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NULL,
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/* read region stream */
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generic_bs_rr_1,
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generic_bs_rr_2,
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generic_bs_rr_4,
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NULL,
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/* write (single) stream */
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pcimem_bs_w_1_s,
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pcimem_bs_w_2_s,
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pcimem_bs_w_4_s,
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NULL,
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/* write multiple stream */
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generic_bs_wm_1,
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generic_bs_wm_2,
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generic_bs_wm_4,
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NULL,
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/* write region stream */
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NULL,
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generic_bs_wr_2,
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generic_bs_wr_4,
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NULL,
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};
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bus_space_tag_t ar71xx_bus_space_pcimem = &bus_space_pcimem;
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static uint8_t
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pcimem_bs_r_1_s(void *t, bus_space_handle_t h, bus_size_t o)
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{
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return readb(h + (o &~ 3) + (3 - (o & 3)));
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}
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static void
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pcimem_bs_w_1_s(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
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{
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writeb(h + (o &~ 3) + (3 - (o & 3)), v);
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}
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static uint16_t
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pcimem_bs_r_2_s(void *t, bus_space_handle_t h, bus_size_t o)
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{
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return readw(h + (o &~ 3) + (2 - (o & 3)));
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}
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static void
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pcimem_bs_w_2_s(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
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{
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writew(h + (o &~ 3) + (2 - (o & 3)), v);
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}
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static uint32_t
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pcimem_bs_r_4_s(void *t, bus_space_handle_t h, bus_size_t o)
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{
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return le32toh(readl(h + o));
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}
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static void
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pcimem_bs_w_4_s(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v)
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{
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writel(h + o, htole32(v));
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}
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33
sys/mips/atheros/ar71xx_pci_bus_space.h
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33
sys/mips/atheros/ar71xx_pci_bus_space.h
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@ -0,0 +1,33 @@
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/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __AR71XX_PCI_BUS_SPACEH__
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#define __AR71XX_PCI_BUS_SPACEH__
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extern bus_space_tag_t ar71xx_bus_space_pcimem;
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#endif /* __AR71XX_PCI_BUS_SPACEH__ */
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@ -5,6 +5,7 @@ mips/atheros/ar71xx_machdep.c standard
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mips/atheros/ar71xx_ehci.c optional ehci
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mips/atheros/ar71xx_ohci.c optional ohci
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mips/atheros/ar71xx_pci.c optional pci
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mips/atheros/ar71xx_pci_bus_space.c optional pci
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mips/atheros/if_arge.c optional arge
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mips/atheros/uart_bus_ar71xx.c optional uart
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mips/atheros/uart_cpu_ar71xx.c optional uart
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