This commit was manufactured by cvs2svn to create branch 'RELENG_7'.

This commit is contained in:
cvs2svn 2007-12-02 13:10:45 +00:00
parent 1d5ed42e42
commit c27e674e3e
Notes: svn2git 2020-12-20 02:59:44 +00:00
svn path=/stable/7/; revision=174175
7 changed files with 5418 additions and 0 deletions

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/*
* Copyright (c) 2007 Olivier Houchard
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <string.h>
#include <sys/types.h>
#include <proc_service.h>
#include <thread_db.h>
#include "libpthread_db.h"
void
pt_reg_to_ucontext(const struct reg *r, ucontext_t *uc)
{
mcontext_t *mc = &uc->uc_mcontext;
__greg_t *gr = mc->__gregs;
gr[_REG_R0] = r->r[0];
gr[_REG_R1] = r->r[1];
gr[_REG_R2] = r->r[2];
gr[_REG_R3] = r->r[3];
gr[_REG_R4] = r->r[4];
gr[_REG_R5] = r->r[5];
gr[_REG_R6] = r->r[6];
gr[_REG_R7] = r->r[7];
gr[_REG_R8] = r->r[8];
gr[_REG_R9] = r->r[9];
gr[_REG_R10] = r->r[10];
gr[_REG_R11] = r->r[11];
gr[_REG_R12] = r->r[12];
gr[_REG_SP] = r->r_sp;
gr[_REG_LR] = r->r_lr;
gr[_REG_PC] = r->r_pc;
gr[_REG_CPSR] = r->r_cpsr;
}
void
pt_ucontext_to_reg(const ucontext_t *uc, struct reg *r)
{
const mcontext_t *mc = &uc->uc_mcontext;
const __greg_t *gr = mc->__gregs;
r->r[0] = gr[_REG_R0];
r->r[1] = gr[_REG_R1];
r->r[2] = gr[_REG_R2];
r->r[3] = gr[_REG_R3];
r->r[4] = gr[_REG_R4];
r->r[5] = gr[_REG_R5];
r->r[6] = gr[_REG_R6];
r->r[7] = gr[_REG_R7];
r->r[8] = gr[_REG_R8];
r->r[9] = gr[_REG_R9];
r->r[10] = gr[_REG_R10];
r->r[11] = gr[_REG_R11];
r->r[12] = gr[_REG_R12];
r->r_sp = gr[_REG_SP];
r->r_lr = gr[_REG_LR];
r->r_pc = gr[_REG_PC];
r->r_cpsr = gr[_REG_CPSR];
}
void
pt_fpreg_to_ucontext(const struct fpreg *r, ucontext_t *uc)
{
mcontext_t *mc = &uc->uc_mcontext;
/* XXX */
memset(&mc->__fpu.__fpregs, 0, sizeof(__fpregset_t));
}
void
pt_ucontext_to_fpreg(const ucontext_t *uc, struct fpreg *r)
{
const mcontext_t *mc = &uc->uc_mcontext;
/* XXX */
memset(r, 0, sizeof(*r));
}
void
pt_md_init(void)
{
}
int
pt_reg_sstep(struct reg *reg, int step)
{
/* XXX */
}

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share/man/man4/wpi.4 Normal file
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.\" Copyright (c) 2004-2007
.\" Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
.\" Benjamin Close <Benjamin.Close@clearchain.com>. All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice unmodified, this list of conditions, and the following
.\" disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
.\" $FreeBSD$
.\"
.Dd March 6, 2007
.Os
.Dt WPI 4
.Sh NAME
.Nm wpi
.Nd "Intel 3945ABG Wireless LAN IEEE 802.11 driver"
.Sh SYNOPSIS
To compile this driver into the kernel,
place the following lines in your
kernel configuration file:
.Bd -ragged -offset indent
.Cd "device wpi"
.Cd "device pci"
.Cd "device wlan"
.Cd "device wlan_amrr"
.Cd "device firmware"
.Ed
.Pp
Alternatively, to load the driver as a
module at boot time, place the following lines in
.Xr loader.conf 5 :
.Bd -literal -offset indent
if_wpi_load="YES"
wlan_load="YES"
wlan_amrr_load="YES"
firmware_load="YES"
.Ed
.Pp
In both cases, place the following line in
.Xr loader.conf 5
to load the firmware modules:
.Bd -literal -offset indent
wpifw_load="YES"
.Ed
.Sh DESCRIPTION
The
.Nm
driver is an experimental driver providing support for the
.Tn Intel
3945ABG Wireless network adapter
.Pp
By default, the
.Nm
driver configures the adapter for BSS operation (aka infrastructure mode).
This mode requires the use of an access point.
.Pp
For more information on configuring this device, see
.Xr ifconfig 8 .
.Pp
This driver requires firmware to be loaded before it will work.
For the loaded firmware to work the license at
.Pa /usr/share/doc/legal/intel_wpi/LICENSE
must be agreed to and the following line be added to
.Xr loader.conf 5 :
.Pp
.Dl "legal.intel_wpi.license_ack=1"
.Sh FILES
.Bl -tag -width ".Pa /usr/share/doc/legal/intel_wpi/LICENSE" -compact
.It Pa /usr/share/doc/legal/intel_wpi/LICENSE
.Nm
firmware license
.El
.Sh EXAMPLES
Join an existing BSS network (i.e., connect to an access point):
.Pp
.Dl "ifconfig wpi0 inet 192.168.0.20 netmask 0xffffff00"
.Pp
Join a specific BSS network with network name
.Dq Li my_net :
.Pp
.Dl "ifconfig wpi0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net"
.Pp
Join a specific BSS network with 40-bit WEP encryption:
.Bd -literal -offset indent
ifconfig wpi0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
wepmode on wepkey 0x1234567890 weptxkey 1
.Ed
.Pp
Join a specific BSS network with 104-bit WEP encryption:
.Bd -literal -offset indent
ifconfig wpi0 inet 192.168.0.20 netmask 0xffffff00 ssid my_net \e
wepmode on wepkey 0x01020304050607080910111213 weptxkey 1
.Ed
.Sh DIAGNOSTICS
.Bl -diag
.Xr firmware 9
subsystem.
Verify that the necessary firmware modules are loaded and the
license agreement
.Xr loader 8
tunable has been set.
.It "wpi%d: could not load firmware"
An attempt to upload the firmware image to the onboard microcontroller failed.
This should not happen.
.It "wpi%d: fatal firmware error"
An unknown error has occurred in the uploaded firmware, you may have to
unload/reload the driver to continue.
.It "wpi%d: Radio transmitter is switched off"
The hardware switch controlling the radio is currently turned off.
Data transmission is not possible in this state.
.Sh BUGS
Not all the error messages are documented here.
.Pp
Automatic recovery of firmware failures is not currently supported, nor is
detection of toggling the radio switch on.
.Pp
Background scanning is not currently supported.
.El
.Sh SEE ALSO
.Xr altq 4 ,
.Xr ipw 4 ,
.Xr iwi 4 ,
.Xr pci 4 ,
.Xr wlan 4 ,
.Xr ifconfig 8
.Sh AUTHORS
.An -nosplit
The
.Nm
driver was written by
.An Damien Bergamini Aq damien.bergamini@free.fr
and
.An Benjamin Close Aq benjsc@FreeBSD.org .

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sys/arm/conf/HL200 Normal file
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# KB920X -- Custom kernel configuration for the KB9200, 9201 and 9202
# AT91RM9200 based Hot-e configuration file
#
# For more information on this file, please read the handbook section on
# Kernel Configuration Files:
#
# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
#
# The handbook is also available locally in /usr/share/doc/handbook
# if you've installed the doc distribution, otherwise always see the
# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
# latest information.
#
# An exhaustive list of options and more detailed explanations of the
# device lines is also present in the ../../conf/NOTES and NOTES files.
# If you are in doubt as to the purpose or necessity of a line, check first
# in NOTES.
#
# $FreeBSD$
machine arm
ident HL200
include "../at91/std.at91"
files "../at91/files.kb920x"
options STARTUP_PAGETABLE_ADDR=0x20000000
makeoptions KERNPHYSADDR=0x20100000
makeoptions KERNVIRTADDR=0xc0100000
options KERNPHYSADDR=0x20100000
options KERNVIRTADDR=0xc0100000
#To statically compile in device wiring instead of /boot/device.hints
#hints "GENERIC.hints" #Default places to look for devices.
hints "KB920X.hints"
makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols
options DDB
options KDB
options AT91C_MASTER_CLOCK=45000000
options SCHED_4BSD #4BSD scheduler
options INET #InterNETworking
#options INET6 #IPv6 communications protocols
options FFS #Berkeley Fast Filesystem
#options SOFTUPDATES #Enable FFS soft updates support
#options UFS_ACL #Support for access control lists
#options UFS_DIRHASH #Improve performance on big directories
#options MD_ROOT #MD is a potential root device
#options MD_ROOT_SIZE=4096 # 3MB ram disk
#options ROOTDEVNAME=\"ufs:/dev/mmcsd0s1a\"
options NFSCLIENT #Network Filesystem Client
#options NFSSERVER #Network Filesystem Server
options NFS_ROOT #NFS usable as /, requires NFSCLIENT
options BOOTP_NFSROOT
options BOOTP
options BOOTP_NFSV3
options BOOTP_WIRED_TO=ate0
options BOOTP_COMPAT
#options MSDOSFS #MSDOS Filesystem
#options CD9660 #ISO 9660 Filesystem
#options PROCFS #Process filesystem (requires PSEUDOFS)
options PSEUDOFS #Pseudo-filesystem framework
#options SCSI_DELAY=5000 #Delay (in ms) before probing SCSI
#options KTRACE #ktrace(1) support
options SYSVSHM #SYSV-style shared memory
options SYSVMSG #SYSV-style message queues
options SYSVSEM #SYSV-style semaphores
options _KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
#options SYSCTL_OMIT_DESCR
options MUTEX_NOINLINE
options RWLOCK_NOINLINE
options NO_FFS_SNAPSHOT
options NO_SWAPPING
device genclock
device random
device pty
device loop
device ether
device uart
device ate
device mii
device lxtphy
# Debugging for use in -current
#options INVARIANTS #Enable calls of extra sanity checking
#options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS
#options WITNESS #Enable checks to detect deadlocks and cycles
#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed
device mem # Memory and kernel memory devices
device md
device at91_twi # TWI: Two Wire Interface
device at91_spi # SPI:
device spibus
# MMC/SD
device at91_mci
device mmc
device mmcsd
# iic
device iic
device iicbus
device icee
device bpf
# USB support
device ohci # OHCI localbus->USB interface
device usb # USB Bus (required)
#device udbp # USB Double Bulk Pipe devices
device ugen # Generic
device uhid # "Human Interface Devices"
device ulpt # Printer
device umass # Disks/Mass storage - Requires scbus and da
device ural # Ralink Technology RT2500USB wireless NICs
device rum # Ralink Technology RT2501USB wireless NICs
device urio # Diamond Rio 500 MP3 player
device uscanner # Scanners
# USB Ethernet, requires miibus
device miibus
device aue # ADMtek USB Ethernet
device axe # ASIX Electronics USB Ethernet
device cdce # Generic USB over Ethernet
device cue # CATC USB Ethernet
device kue # Kawasaki LSI USB Ethernet
device rue # RealTek RTL8150 USB Ethernet
device udav
# usb serial
device ucom
device uark
device ubsa
device ubser
device uftdi
device uipaq
device uplcom
device uvisor
device uvscom
# SCSI peripherals
device scbus # SCSI bus (required for SCSI)
device da # Direct Access (disks)
device cd # CD
device pass # Passthrough device (direct SCSI access)
# Wireless NIC cards
device wlan # 802.11 support
device wlan_wep # 802.11 WEP support
device wlan_ccmp # 802.11 CCMP support
device wlan_tkip # 802.11 TKIP support
device wlan_amrr # AMRR transmit rate control algorithm
device wlan_scan_ap # 802.11 AP mode scanning
device wlan_scan_sta # 802.11 STA mode scanning

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/*-
* Copyright (c) 2007 Yahoo!, Inc.
* All rights reserved.
* Written by: John Baldwin <jhb@FreeBSD.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*
* Partly from: src/sys/boot/i386/boot2/boot1.S 1.31
*/
/* Memory Locations */
.set MEM_REL,0x700 # Relocation address
.set MEM_ARG,0x900 # Arguments
.set MEM_ORG,0x7c00 # Origin
.set MEM_BUF,0x8cec # Load area
.set MEM_BTX,0x9000 # BTX start
.set MEM_JMP,0x9010 # BTX entry point
.set MEM_USR,0xa000 # Client start
.set BDA_BOOT,0x472 # Boot howto flag
/* Misc. Constants */
.set SIZ_PAG,0x1000 # Page size
.set SIZ_SEC,0x200 # Sector size
.globl start
.code16
/*
* Copy BTX and boot2 to the right locations and start it all up.
*/
/*
* Setup the segment registers to flat addressing (segment 0) and setup the
* stack to end just below the start of our code.
*/
start: xor %cx,%cx # Zero
mov %cx,%es # Address
mov %cx,%ds # data
mov %cx,%ss # Set up
mov $start,%sp # stack
/*
* BTX is right after us at 'end'. We read the length of BTX out of
* its header to find boot2. We need to copy boot2 to MEM_USR and BTX
* to MEM_BTX. Since those might overlap, we have to copy boot2
* backwards first and then copy BTX. We aren't sure exactly how long
* boot2 is, but we assume it can't be longer than 64k, so we just always
* copy 64k.
*/
mov $end,%bx # BTX
mov 0xa(%bx),%si # Get BTX length and set
add %bx,%si # %si to start of boot2
mov %si,%ax # Align %ds:%si on a
shr $4,%ax # paragraph boundary
and $0xf,%si # with the smallest
mov %ax,%ds # possible %si
add $(64 * 1024 - 16),%si
mov $MEM_USR/16,%ax # Point %es:%di at end of
mov $(64 * 1024 - 16),%di # largest boot2 range
mov %ax,%es
std
mov %di,%cx # Copy 64k - paragraph + 1
inc %cx # bytes
rep movsb
mov %cx,%ds # Reset %ds and %es
mov %cx,%es
mov 0xa(%bx),%cx # Get BTX length and set
mov %bx,%si # %si to end of BTX
mov $MEM_BTX,%di # %di -> end of BTX at
add %cx,%si # MEM_BTX
add %cx,%di
dec %si
dec %di
rep movsb # Move BTX
cld # String ops inc
/*
* Enable A20 so we can access memory above 1 meg.
* Use the zero-valued %cx as a timeout for embedded hardware which do not
* have a keyboard controller.
*/
seta20: cli # Disable interrupts
seta20.1: dec %cx # Timeout?
jz seta20.3 # Yes
inb $0x64,%al # Get status
testb $0x2,%al # Busy?
jnz seta20.1 # Yes
movb $0xd1,%al # Command: Write
outb %al,$0x64 # output port
seta20.2: inb $0x64,%al # Get status
testb $0x2,%al # Busy?
jnz seta20.2 # Yes
movb $0xdf,%al # Enable
outb %al,$0x60 # A20
seta20.3: sti # Enable interrupts
/*
* Save drive number from BIOS so boot2 can see it and start BTX.
*/
movb %dl,MEM_ARG
jmp MEM_JMP # Start BTX
end:

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sys/boot/i386/pmbr/pmbr.s Normal file
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#-
# Copyright (c) 2007 Yahoo!, Inc.
# All rights reserved.
# Written by: John Baldwin <jhb@FreeBSD.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# 3. Neither the name of the author nor the names of any co-contributors
# may be used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
# SUCH DAMAGE.
#
# $FreeBSD$
#
# Partly from: src/sys/boot/i386/mbr/mbr.s 1.7
# A 512 byte PMBR boot manager that looks for a FreeBSD boot GPT partition
# and boots it.
.set LOAD,0x7c00 # Load address
.set EXEC,0x600 # Execution address
.set MAGIC,0xaa55 # Magic: bootable
.set SECSIZE,0x200 # Size of a single disk sector
.set DISKSIG,440 # Disk signature offset
.set STACK,EXEC+SECSIZE*4 # Stack address
.set GPT_ADDR,STACK # GPT header address
.set GPT_SIG,0
.set GPT_SIG_0,0x20494645
.set GPT_SIG_1,0x54524150
.set GPT_MYLBA,24
.set GPT_PART_LBA,72
.set GPT_NPART,80
.set GPT_PART_SIZE,84
.set PART_ADDR,GPT_ADDR+SECSIZE # GPT partition array address
.set PART_TYPE,0
.set PART_START_LBA,32
.set PART_END_LBA,40
.set NHRDRV,0x475 # Number of hard drives
.globl start # Entry point
.code16
#
# Setup the segment registers for flat addressing and setup the stack.
#
start: cld # String ops inc
xorw %ax,%ax # Zero
movw %ax,%es # Address
movw %ax,%ds # data
movw %ax,%ss # Set up
movw $STACK,%sp # stack
#
# Relocate ourself to a lower address so that we have more room to load
# other sectors.
#
movw $main-EXEC+LOAD,%si # Source
movw $main,%di # Destination
movw $SECSIZE-(main-start),%cx # Byte count
rep # Relocate
movsb # code
#
# Jump to the relocated code.
#
jmp main-LOAD+EXEC # To relocated code
#
# Validate drive number in %dl.
#
main: cmpb $0x80,%dl # Drive valid?
jb main.1 # No
movb NHRDRV,%dh # Calculate the highest
addb $0x80,%dh # drive number available
cmpb %dh,%dl # Within range?
jb main.2 # Yes
main.1: movb $0x80,%dl # Assume drive 0x80
#
# Load the primary GPT header from LBA 1 and verify signature.
#
main.2: movw $GPT_ADDR,%bx
movw $lba,%si
call read
cmpl $GPT_SIG_0,GPT_ADDR+GPT_SIG
jnz err_pt
cmpl $GPT_SIG_1,GPT_ADDR+GPT_SIG+4
jnz err_pt
#
# Load a partition table sector from disk and look for a FreeBSD boot
# partition.
#
load_part: movw $GPT_ADDR+GPT_PART_LBA,%si
movw $PART_ADDR,%bx
call read
scan: movw %bx,%si # Compare partition UUID
movw $boot_uuid,%di # with FreeBSD boot UUID
movb $0x10,%cl
repe cmpsb
jnz next_part # Didn't match, next partition
#
# We found a boot partition. Load it into RAM starting at 0x7c00.
#
movw %bx,%di # Save partition pointer in %di
leaw PART_START_LBA(%di),%si
movw $LOAD/16,%bx
movw %bx,%es
xorw %bx,%bx
load_boot: push %si # Save %si
call read
pop %si # Restore
movl PART_END_LBA(%di),%eax # See if this was the last LBA
cmpl (%si),%eax
jnz next_boot
movl PART_END_LBA+4(%di),%eax
cmpl 4(%si),%eax
jnz next_boot
mov %bx,%es # Reset %es to zero
jmp LOAD # Jump to boot code
next_boot: incl (%si) # Next LBA
adcl $0,4(%si)
mov %es,%ax # Adjust segment for next
addw $SECSIZE/16,%ax # sector
cmp $0x9000,%ax # Don't load past 0x90000,
jae err_big # 545k should be enough for
mov %ax,%es # any boot code. :)
jmp load_boot
#
# Move to the next partition. If we walk off the end of the sector, load
# the next sector. We assume that partition entries are smaller than 64k
# and that they won't span a sector boundary.
#
# XXX: Should we int 0x18 instead of err_noboot if we hit the end of the table?
#
next_part: decl GPT_ADDR+GPT_NPART # Was this the last partition?
jz err_noboot
movw GPT_ADDR+GPT_PART_SIZE,%ax
addw %ax,%bx # Next partition
cmpw $PART_ADDR+0x200,%bx # Still in sector?
jb scan
incl GPT_ADDR+GPT_PART_LBA # Next sector
adcl $0,GPT_ADDR+GPT_PART_LBA+4
jmp load_part
#
# Load a sector (64-bit LBA at %si) from disk %dl into %es:%bx by creating
# a EDD packet on the stack and passing it to the BIOS. Trashes %ax and %si.
#
read: pushl 0x4(%si) # Set the LBA
pushl 0x0(%si) # address
pushw %es # Set the address of
pushw %bx # the transfer buffer
pushw $0x1 # Read 1 sector
pushw $0x10 # Packet length
movw %sp,%si # Packer pointer
movw $0x4200,%ax # BIOS: LBA Read from disk
int $0x13 # Call the BIOS
add $0x10,%sp # Restore stack
jc err_rd # If error
ret
#
# Various error message entry points.
#
err_big: movw $msg_big,%si # "Boot loader too
jmp putstr # large"
err_pt: movw $msg_pt,%si # "Invalid partition
jmp putstr # table"
err_rd: movw $msg_rd,%si # "I/O error loading
jmp putstr # boot loader"
err_noboot: movw $msg_noboot,%si # "Missing boot
jmp putstr # loader"
#
# Output an ASCIZ string to the console via the BIOS.
#
putstr.0: movw $0x7,%bx # Page:attribute
movb $0xe,%ah # BIOS: Display
int $0x10 # character
putstr: lodsb # Get character
testb %al,%al # End of string?
jnz putstr.0 # No
putstr.1: jmp putstr.1 # Await reset
msg_big: .asciz "Boot loader too large"
msg_pt: .asciz "Invalid partition table"
msg_rd: .asciz "I/O error loading boot loader"
msg_noboot: .asciz "Missing boot loader"
lba: .quad 1 # LBA of GPT header
boot_uuid: .long 0x83bd6b9d
.word 0x7f41
.word 0x11dc
.byte 0xbe
.byte 0x0b
.byte 0x00
.byte 0x15
.byte 0x60
.byte 0xb8
.byte 0x4f
.byte 0x0f
.org DISKSIG,0x90
sig: .long 0 # OS Disk Signature
.word 0 # "Unknown" in PMBR
partbl: .fill 0x10,0x4,0x0 # Partition table
.word MAGIC # Magic number

3916
sys/dev/wpi/if_wpi.c Normal file

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737
sys/dev/wpi/if_wpireg.h Normal file
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/* $FreeBSD$ */
/*-
* Copyright (c) 2006,2007
* Damien Bergamini <damien.bergamini@free.fr>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#define WPI_TX_RING_COUNT 256
#define WPI_CMD_RING_COUNT 256
#define WPI_RX_RING_COUNT 64
/*
* Rings must be aligned on a 16K boundary.
*/
#define WPI_RING_DMA_ALIGN 0x4000
/* maximum scatter/gather */
#define WPI_MAX_SCATTER 4
/* maximum Rx buffer size */
#define WPI_RBUF_SIZE ( 3 * 1024 ) /* XXX 3000 but must be aligned */
/*
* Control and status registers.
*/
#define WPI_HWCONFIG 0x000
#define WPI_INTR 0x008
#define WPI_MASK 0x00c
#define WPI_INTR_STATUS 0x010
#define WPI_GPIO_STATUS 0x018
#define WPI_RESET 0x020
#define WPI_GPIO_CTL 0x024
#define WPI_EEPROM_CTL 0x02c
#define WPI_EEPROM_STATUS 0x030
#define WPI_UCODE_CLR 0x05c
#define WPI_TEMPERATURE 0x060
#define WPI_CHICKEN 0x100
#define WPI_PLL_CTL 0x20c
#define WPI_WRITE_MEM_ADDR 0x444
#define WPI_READ_MEM_ADDR 0x448
#define WPI_WRITE_MEM_DATA 0x44c
#define WPI_READ_MEM_DATA 0x450
#define WPI_TX_WIDX 0x460
#define WPI_TX_CTL(qid) (0x940 + (qid) * 8)
#define WPI_TX_BASE(qid) (0x944 + (qid) * 8)
#define WPI_TX_DESC(qid) (0x980 + (qid) * 80)
#define WPI_RX_CONFIG 0xc00
#define WPI_RX_BASE 0xc04
#define WPI_RX_WIDX 0xc20
#define WPI_RX_RIDX_PTR 0xc24
#define WPI_RX_CTL 0xcc0
#define WPI_RX_STATUS 0xcc4
#define WPI_TX_CONFIG(qid) (0xd00 + (qid) * 32)
#define WPI_TX_CREDIT(qid) (0xd04 + (qid) * 32)
#define WPI_TX_STATE(qid) (0xd08 + (qid) * 32)
#define WPI_TX_BASE_PTR 0xe80
#define WPI_MSG_CONFIG 0xe88
#define WPI_TX_STATUS 0xe90
/*
* NIC internal memory offsets.
*/
#define WPI_MEM_MODE 0x2e00
#define WPI_MEM_RA 0x2e04
#define WPI_MEM_TXCFG 0x2e10
#define WPI_MEM_MAGIC4 0x2e14
#define WPI_MEM_MAGIC5 0x2e20
#define WPI_MEM_BYPASS1 0x2e2c
#define WPI_MEM_BYPASS2 0x2e30
#define WPI_MEM_CLOCK1 0x3004
#define WPI_MEM_CLOCK2 0x3008
#define WPI_MEM_POWER 0x300c
#define WPI_MEM_PCIDEV 0x3010
#define WPI_MEM_HW_RADIO_OFF 0x3014
#define WPI_MEM_UCODE_CTL 0x3400
#define WPI_MEM_UCODE_SRC 0x3404
#define WPI_MEM_UCODE_DST 0x3408
#define WPI_MEM_UCODE_SIZE 0x340c
#define WPI_MEM_UCODE_BASE 0x3800
#define WPI_MEM_TEXT_BASE 0x3490
#define WPI_MEM_TEXT_SIZE 0x3494
#define WPI_MEM_DATA_BASE 0x3498
#define WPI_MEM_DATA_SIZE 0x349c
/* possible flags for register WPI_HWCONFIG */
#define WPI_HW_ALM_MB (1 << 8)
#define WPI_HW_ALM_MM (1 << 9)
#define WPI_HW_SKU_MRC (1 << 10)
#define WPI_HW_REV_D (1 << 11)
#define WPI_HW_TYPE_B (1 << 12)
/* possible flags for registers WPI_READ_MEM_ADDR/WPI_WRITE_MEM_ADDR */
#define WPI_MEM_4 ((sizeof (uint32_t) - 1) << 24)
/* possible values for WPI_MEM_UCODE_DST */
#define WPI_FW_TEXT 0x00000000
/* possible flags for WPI_GPIO_STATUS */
#define WPI_POWERED (1 << 9)
/* possible flags for register WPI_RESET */
#define WPI_NEVO_RESET (1 << 0)
#define WPI_SW_RESET (1 << 7)
#define WPI_MASTER_DISABLED (1 << 8)
#define WPI_STOP_MASTER (1 << 9)
/* possible flags for register WPI_GPIO_CTL */
#define WPI_GPIO_CLOCK (1 << 0)
#define WPI_GPIO_INIT (1 << 2)
#define WPI_GPIO_MAC (1 << 3)
#define WPI_GPIO_SLEEP (1 << 4)
#define WPI_GPIO_PWR_STATUS 0x07000000
#define WPI_GPIO_PWR_SLEEP (4 << 24)
/* possible flags for register WPI_CHICKEN */
#define WPI_CHICKEN_RXNOLOS (1 << 23)
/* possible flags for register WPI_PLL_CTL */
#define WPI_PLL_INIT (1 << 24)
/* possible flags for register WPI_UCODE_CLR */
#define WPI_RADIO_OFF (1 << 1)
#define WPI_DISABLE_CMD (1 << 2)
/* possible flags for WPI_RX_STATUS */
#define WPI_RX_IDLE (1 << 24)
/* possible flags for register WPI_UC_CTL */
#define WPI_UC_ENABLE (1 << 30)
#define WPI_UC_RUN (1 << 31)
/* possible flags for register WPI_INTR_CSR */
#define WPI_ALIVE_INTR (1 << 0)
#define WPI_WAKEUP_INTR (1 << 1)
#define WPI_SW_ERROR (1 << 25)
#define WPI_TX_INTR (1 << 27)
#define WPI_HW_ERROR (1 << 29)
#define WPI_RX_INTR (1 << 31)
#define WPI_INTR_MASK \
(WPI_SW_ERROR | WPI_HW_ERROR | WPI_TX_INTR | WPI_RX_INTR | \
WPI_ALIVE_INTR | WPI_WAKEUP_INTR)
/* possible flags for register WPI_TX_STATUS */
#define WPI_TX_IDLE(qid) (1 << ((qid) + 24) | 1 << ((qid) + 16))
/* possible flags for register WPI_EEPROM_CTL */
#define WPI_EEPROM_READY (1 << 0)
/* possible flags for register WPI_EEPROM_STATUS */
#define WPI_EEPROM_VERSION 0x00000007
#define WPI_EEPROM_LOCKED 0x00000180
struct wpi_shared {
uint32_t txbase[8];
uint32_t next;
uint32_t reserved[2];
} __packed;
#define WPI_MAX_SEG_LEN 65520
struct wpi_tx_desc {
uint32_t flags;
#define WPI_PAD32(x) (roundup2(x, 4) - (x))
struct {
uint32_t addr;
uint32_t len;
} __attribute__((__packed__)) segs[WPI_MAX_SCATTER];
uint8_t reserved[28];
} __packed;
struct wpi_tx_stat {
uint8_t nrts;
uint8_t ntries;
uint8_t nkill;
uint8_t rate;
uint32_t duration;
uint32_t status;
} __packed;
struct wpi_rx_desc {
uint32_t len;
uint8_t type;
#define WPI_UC_READY 1
#define WPI_RX_DONE 27
#define WPI_TX_DONE 28
#define WPI_START_SCAN 130
#define WPI_STOP_SCAN 132
#define WPI_STATE_CHANGED 161
#define WPI_MISSED_BEACON 162
uint8_t flags;
uint8_t idx;
uint8_t qid;
} __packed;
struct wpi_rx_stat {
uint8_t len;
#define WPI_STAT_MAXLEN 20
uint8_t id;
uint8_t rssi; /* received signal strength */
#define WPI_RSSI_OFFSET 95
uint8_t agc; /* access gain control */
uint16_t signal;
uint16_t noise;
} __packed;
struct wpi_rx_head {
uint16_t chan;
uint16_t flags;
uint8_t reserved;
uint8_t rate;
uint16_t len;
} __packed;
struct wpi_rx_tail {
uint32_t flags;
#if 0
#define WPI_RX_NO_CRC_ERR (1 << 0)
#define WPI_RX_NO_OVFL_ERR (1 << 1)
/* shortcut for the above */
#define WPI_RX_NOERROR (WPI_RX_NO_CRC_ERR | WPI_RX_NO_OVFL_ERR)
#endif
uint64_t tstamp;
uint32_t tbeacon;
} __packed;
struct wpi_tx_cmd {
uint8_t code;
#define WPI_CMD_CONFIGURE 16
#define WPI_CMD_ASSOCIATE 17
#define WPI_CMD_SET_WME 19
#define WPI_CMD_TSF 20
#define WPI_CMD_ADD_NODE 24
#define WPI_CMD_TX_DATA 28
#define WPI_CMD_MRR_SETUP 71
#define WPI_CMD_SET_LED 72
#define WPI_CMD_SET_POWER_MODE 119
#define WPI_CMD_SCAN 128
#define WPI_CMD_SET_BEACON 145
#define WPI_CMD_TXPOWER 151
#define WPI_CMD_BLUETOOTH 155
uint8_t flags;
uint8_t idx;
uint8_t qid;
uint8_t data[360];
} __packed;
/* structure for WPI_CMD_CONFIGURE */
struct wpi_config {
uint8_t myaddr[IEEE80211_ADDR_LEN];
uint16_t reserved1;
uint8_t bssid[IEEE80211_ADDR_LEN];
uint16_t reserved2;
uint8_t wlap_bssid_addr[6];
uint16_t reserved3;
uint8_t mode;
#define WPI_MODE_HOSTAP 1
#define WPI_MODE_STA 3
#define WPI_MODE_IBSS 4
#define WPI_MODE_MONITOR 6
uint8_t air_propogation;
uint16_t reserved4;
uint8_t ofdm_mask;
uint8_t cck_mask;
uint16_t associd;
uint32_t flags;
#define WPI_CONFIG_24GHZ (1 << 0)
#define WPI_CONFIG_CCK (1 << 1)
#define WPI_CONFIG_AUTO (1 << 2)
#define WPI_CONFIG_SHSLOT (1 << 4)
#define WPI_CONFIG_SHPREAMBLE (1 << 5)
#define WPI_CONFIG_NODIVERSITY (1 << 7)
#define WPI_CONFIG_ANTENNA_A (1 << 8)
#define WPI_CONFIG_ANTENNA_B (1 << 9)
#define WPI_CONFIG_TSF (1 << 15)
uint32_t filter;
#define WPI_FILTER_PROMISC (1 << 0)
#define WPI_FILTER_CTL (1 << 1)
#define WPI_FILTER_MULTICAST (1 << 2)
#define WPI_FILTER_NODECRYPT (1 << 3)
#define WPI_FILTER_BSS (1 << 5)
#define WPI_FILTER_BEACON (1 << 6)
uint8_t chan;
uint16_t reserved6;
} __packed;
/* structure for command WPI_CMD_ASSOCIATE */
struct wpi_assoc {
uint32_t flags;
uint32_t filter;
uint8_t ofdm_mask;
uint8_t cck_mask;
uint16_t reserved;
} __packed;
/* structure for command WPI_CMD_SET_WME */
struct wpi_wme_setup {
uint32_t flags;
struct {
uint16_t cwmin;
uint16_t cwmax;
uint8_t aifsn;
uint8_t reserved;
uint16_t txop;
} __packed ac[WME_NUM_AC];
} __packed;
/* structure for command WPI_CMD_TSF */
struct wpi_cmd_tsf {
uint64_t tstamp;
uint16_t bintval;
uint16_t atim;
uint32_t binitval;
uint16_t lintval;
uint16_t reserved;
} __packed;
/* structure for WPI_CMD_ADD_NODE */
struct wpi_node_info {
uint8_t control;
#define WPI_NODE_UPDATE (1 << 0)
uint8_t reserved1[3];
uint8_t bssid[IEEE80211_ADDR_LEN];
uint16_t reserved2;
uint8_t id;
#define WPI_ID_BSS 0
#define WPI_ID_BROADCAST 24
uint8_t flags;
uint16_t reserved3;
uint16_t key_flags;
uint8_t tkip;
uint8_t reserved4;
uint16_t ttak[5];
uint16_t reserved5;
uint8_t key[IEEE80211_KEYBUF_SIZE];
uint32_t action;
#define WPI_ACTION_SET_RATE 4
uint32_t mask;
uint16_t tid;
uint8_t rate;
uint8_t antenna;
#define WPI_ANTENNA_A (1<<6)
#define WPI_ANTENNA_B (1<<7)
#define WPI_ANTENNA_BOTH (WPI_ANTENNA_A|WPI_ANTENNA_B)
uint8_t add_imm;
uint8_t del_imm;
uint16_t add_imm_start;
} __packed;
/* structure for command WPI_CMD_TX_DATA */
struct wpi_cmd_data {
uint16_t len;
uint16_t lnext;
uint32_t flags;
#define WPI_TX_NEED_RTS (1 << 1)
#define WPI_TX_NEED_CTS (1 << 2)
#define WPI_TX_NEED_ACK (1 << 3)
#define WPI_TX_FULL_TXOP (1 << 7)
#define WPI_TX_BT_DISABLE (1 << 12) /* bluetooth coexistence */
#define WPI_TX_AUTO_SEQ (1 << 13)
#define WPI_TX_INSERT_TSTAMP (1 << 16)
uint8_t rate;
uint8_t id;
uint8_t tid;
uint8_t security;
uint8_t key[IEEE80211_KEYBUF_SIZE];
uint8_t tkip[IEEE80211_WEP_MICLEN];
uint32_t fnext;
uint32_t lifetime;
#define WPI_LIFETIME_INFINITE 0xffffffff
uint8_t ofdm_mask;
uint8_t cck_mask;
uint8_t rts_ntries;
uint8_t data_ntries;
uint16_t timeout;
uint16_t txop;
struct ieee80211_frame wh;
} __packed;
/* structure for command WPI_CMD_SET_BEACON */
struct wpi_cmd_beacon {
uint16_t len;
uint16_t reserved1;
uint32_t flags; /* same as wpi_cmd_data */
uint8_t rate;
uint8_t id;
uint8_t reserved2[30];
uint32_t lifetime;
uint8_t ofdm_mask;
uint8_t cck_mask;
uint16_t reserved3[3];
uint16_t tim;
uint8_t timsz;
uint8_t reserved4;
struct ieee80211_frame wh;
} __packed;
/* structure for notification WPI_MISSED_BEACON */
struct wpi_missed_beacon {
uint32_t consecutive;
uint32_t total;
uint32_t expected;
uint32_t received;
} __packed;
/* structure for WPI_CMD_MRR_SETUP */
struct wpi_mrr_setup {
uint8_t which;
#define WPI_MRR_CTL 0
#define WPI_MRR_DATA 1
uint8_t reserved[3];
struct {
uint8_t signal;
uint8_t flags;
uint8_t ntries;
uint8_t next;
#define WPI_OFDM6 0
#define WPI_OFDM54 7
#define WPI_CCK1 8
#define WPI_CCK2 9
#define WPI_CCK11 11
} __attribute__((__packed__)) rates[WPI_CCK11 + 1];
} __packed;
/* structure for WPI_CMD_SET_LED */
struct wpi_cmd_led {
uint32_t unit; /* multiplier (in usecs) */
uint8_t which;
#define WPI_LED_ACTIVITY 1
#define WPI_LED_LINK 2
uint8_t off;
uint8_t on;
uint8_t reserved;
} __packed;
/* structure for WPI_CMD_SET_POWER_MODE */
struct wpi_power {
uint32_t flags;
#define WPI_POWER_CAM 0 /* constantly awake mode */
uint32_t rx_timeout;
uint32_t tx_timeout;
uint32_t sleep[5];
} __packed;
/* structure for command WPI_CMD_SCAN */
struct wpi_scan_hdr {
uint16_t len;
uint8_t reserved1;
uint8_t nchan;
uint16_t quiet;
uint16_t threshold;
uint16_t promotion;
uint16_t reserved2;
uint32_t maxtimeout;
uint32_t suspend;
uint32_t flags;
uint32_t filter;
struct {
uint16_t len;
uint16_t lnext;
uint32_t flags;
uint8_t rate;
uint8_t id;
uint8_t tid;
uint8_t security;
uint8_t key[IEEE80211_KEYBUF_SIZE];
uint8_t tkip[IEEE80211_WEP_MICLEN];
uint32_t fnext;
uint32_t lifetime;
uint8_t ofdm_mask;
uint8_t cck_mask;
uint8_t rts_ntries;
uint8_t data_ntries;
uint16_t timeout;
uint16_t txop;
} tx __attribute__((__packed__));
#define WPI_SCAN_MAX_ESSIDS 4
struct {
uint8_t id;
uint8_t esslen;
uint8_t essid[32];
}scan_essids[WPI_SCAN_MAX_ESSIDS];
/* followed by probe request body */
/* followed by nchan x wpi_scan_chan */
} __packed;
struct wpi_scan_chan {
uint8_t flags;
uint8_t chan;
#define WPI_CHAN_ACTIVE (1 << 0)
#define WPI_CHAN_DIRECT (1 << 1)
uint8_t gain_radio;
uint8_t gain_dsp;
uint16_t active; /* msecs */
uint16_t passive; /* msecs */
} __packed;
/* structure for WPI_CMD_BLUETOOTH */
struct wpi_bluetooth {
uint8_t flags;
uint8_t lead;
uint8_t kill;
uint8_t reserved;
uint32_t ack;
uint32_t cts;
} __packed;
/* structure for command WPI_CMD_TXPOWER */
struct wpi_cmd_txpower {
uint8_t band;
#define WPI_RATE_5GHZ 0
#define WPI_RATE_2GHZ 1
uint8_t reserved;
uint16_t channel;
#define WPI_RATE_MAPPING_COUNT 12
struct {
uint8_t rate;
uint8_t gain_radio;
uint8_t gain_dsp;
uint8_t reserved;
} __packed rates [WPI_RATE_MAPPING_COUNT];
} __packed;
#define WPI_FW_MAIN_TEXT_MAXSZ (80 * 1024 )
#define WPI_FW_MAIN_DATA_MAXSZ (32 * 1024 )
#define WPI_FW_INIT_TEXT_MAXSZ (80 * 1024 )
#define WPI_FW_INIT_DATA_MAXSZ (32 * 1024 )
#define WPI_FW_BOOT_TEXT_MAXSZ 1024
#define WPI_FW_UPDATED (1 << 31 )
/* firmware image header */
struct wpi_firmware_hdr {
#define WPI_FW_MINVERSION 2144
uint32_t version;
uint32_t rtextsz;
uint32_t rdatasz;
uint32_t itextsz;
uint32_t idatasz;
uint32_t btextsz;
} __packed;
/* structure for WPI_UC_READY notification */
struct wpi_ucode_info {
uint32_t version;
uint8_t revision[8];
uint8_t type;
uint8_t subtype;
uint16_t reserved;
uint32_t logptr;
uint32_t errorptr;
uint32_t timestamp;
uint32_t valid;
} __packed;
/* structure for WPI_START_SCAN notification */
struct wpi_start_scan {
uint64_t tstamp;
uint32_t tbeacon;
uint8_t chan;
uint8_t band;
uint16_t reserved;
uint32_t status;
} __packed;
/* structure for WPI_STOP_SCAN notification */
struct wpi_stop_scan {
uint8_t nchan;
uint8_t status;
uint8_t reserved;
uint8_t chan;
uint64_t tsf;
} __packed;
#define WPI_EEPROM_MAC 0x015
#define WPI_EEPROM_REVISION 0x035
#define WPI_EEPROM_CAPABILITIES 0x045
#define WPI_EEPROM_TYPE 0x04a
#define WPI_EEPROM_DOMAIN 0x060
#define WPI_EEPROM_BAND1 0x063
#define WPI_EEPROM_BAND2 0x072
#define WPI_EEPROM_BAND3 0x080
#define WPI_EEPROM_BAND4 0x08d
#define WPI_EEPROM_BAND5 0x099
#define WPI_EEPROM_POWER_GRP 0x100
struct wpi_eeprom_chan {
uint8_t flags;
#define WPI_EEPROM_CHAN_VALID (1<<0)
#define WPI_EEPROM_CHAN_IBSS (1<<1)
#define WPI_EEPROM_CHAN_ACTIVE (1<<3)
#define WPI_EEPROM_CHAN_RADAR (1<<4)
int8_t maxpwr;
} __packed;
struct wpi_eeprom_sample {
uint8_t index;
int8_t power;
uint16_t volt;
};
#define WPI_POWER_GROUPS_COUNT 5
struct wpi_eeprom_group {
struct wpi_eeprom_sample samples[5];
int32_t coef[5];
int32_t corr[5];
int8_t maxpwr;
uint8_t chan;
int16_t temp;
} __packed;
#define WPI_CHAN_BANDS_COUNT 5
#define WPI_MAX_CHAN_PER_BAND 14
static const struct wpi_chan_band {
uint32_t addr; /* offset in EEPROM */
uint8_t nchan;
uint8_t chan[WPI_MAX_CHAN_PER_BAND];
} wpi_bands[5] = {
{ WPI_EEPROM_BAND1, 14,
{ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 }},
{ WPI_EEPROM_BAND2, 13,
{ 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16 }},
{ WPI_EEPROM_BAND3, 12,
{ 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 }},
{ WPI_EEPROM_BAND4, 11,
{ 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 }},
{ WPI_EEPROM_BAND5, 6,
{ 145, 149, 153, 157, 161, 165 }}
};
#define WPI_MAX_PWR_INDEX 77
/*
* RF Tx gain values from highest to lowest power (values obtained from
* the reference driver.)
*/
static const uint8_t wpi_rf_gain_2ghz[WPI_MAX_PWR_INDEX + 1] = {
0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xbb, 0xbb, 0xbb,
0xbb, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xd3, 0xd3, 0xb3, 0xb3, 0xb3,
0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x73, 0xeb, 0xeb, 0xeb,
0xcb, 0xcb, 0xcb, 0xcb, 0xcb, 0xcb, 0xcb, 0xab, 0xab, 0xab, 0x8b,
0xe3, 0xe3, 0xe3, 0xe3, 0xe3, 0xe3, 0xc3, 0xc3, 0xc3, 0xc3, 0xa3,
0xa3, 0xa3, 0xa3, 0x83, 0x83, 0x83, 0x83, 0x63, 0x63, 0x63, 0x63,
0x43, 0x43, 0x43, 0x43, 0x23, 0x23, 0x23, 0x23, 0x03, 0x03, 0x03,
0x03
};
static const uint8_t wpi_rf_gain_5ghz[WPI_MAX_PWR_INDEX + 1] = {
0xfb, 0xfb, 0xfb, 0xdb, 0xdb, 0xbb, 0xbb, 0x9b, 0x9b, 0x7b, 0x7b,
0x7b, 0x7b, 0x5b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x1b, 0x1b,
0x1b, 0x73, 0x73, 0x73, 0x53, 0x53, 0x53, 0x53, 0x53, 0x33, 0x33,
0x33, 0x33, 0x13, 0x13, 0x13, 0x13, 0x13, 0xab, 0xab, 0xab, 0x8b,
0x8b, 0x8b, 0x8b, 0x6b, 0x6b, 0x6b, 0x6b, 0x4b, 0x4b, 0x4b, 0x4b,
0x2b, 0x2b, 0x2b, 0x2b, 0x0b, 0x0b, 0x0b, 0x0b, 0x83, 0x83, 0x63,
0x63, 0x63, 0x63, 0x43, 0x43, 0x43, 0x43, 0x23, 0x23, 0x23, 0x23,
0x03
};
/*
* DSP pre-DAC gain values from highest to lowest power (values obtained
* from the reference driver.)
*/
static const uint8_t wpi_dsp_gain_2ghz[WPI_MAX_PWR_INDEX + 1] = {
0x7f, 0x7f, 0x7f, 0x7f, 0x7d, 0x6e, 0x69, 0x62, 0x7d, 0x73, 0x6c,
0x63, 0x77, 0x6f, 0x69, 0x61, 0x5c, 0x6a, 0x64, 0x78, 0x71, 0x6b,
0x7d, 0x77, 0x70, 0x6a, 0x65, 0x61, 0x5b, 0x6b, 0x79, 0x73, 0x6d,
0x7f, 0x79, 0x73, 0x6c, 0x66, 0x60, 0x5c, 0x6e, 0x68, 0x62, 0x74,
0x7d, 0x77, 0x71, 0x6b, 0x65, 0x60, 0x71, 0x6a, 0x66, 0x5f, 0x71,
0x6a, 0x66, 0x5f, 0x71, 0x6a, 0x66, 0x5f, 0x71, 0x6a, 0x66, 0x5f,
0x71, 0x6a, 0x66, 0x5f, 0x71, 0x6a, 0x66, 0x5f, 0x71, 0x6a, 0x66,
0x5f
};
static const uint8_t wpi_dsp_gain_5ghz[WPI_MAX_PWR_INDEX + 1] = {
0x7f, 0x78, 0x72, 0x77, 0x65, 0x71, 0x66, 0x72, 0x67, 0x75, 0x6b,
0x63, 0x5c, 0x6c, 0x7d, 0x76, 0x6d, 0x66, 0x60, 0x5a, 0x68, 0x62,
0x5c, 0x76, 0x6f, 0x68, 0x7e, 0x79, 0x71, 0x69, 0x63, 0x76, 0x6f,
0x68, 0x62, 0x74, 0x6d, 0x66, 0x62, 0x5d, 0x71, 0x6b, 0x63, 0x78,
0x71, 0x6b, 0x63, 0x78, 0x71, 0x6b, 0x63, 0x78, 0x71, 0x6b, 0x63,
0x78, 0x71, 0x6b, 0x63, 0x78, 0x71, 0x6b, 0x63, 0x6b, 0x63, 0x78,
0x71, 0x6b, 0x63, 0x78, 0x71, 0x6b, 0x63, 0x78, 0x71, 0x6b, 0x63,
0x78
};
#define WPI_READ(sc, reg) \
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
#define WPI_WRITE(sc, reg, val) \
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
#define WPI_WRITE_REGION_4(sc, offset, datap, count) \
bus_space_write_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
(datap), (count))