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https://github.com/freebsd/freebsd-src.git
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Reimplement all functions to access the system control unit in C.
The only reason we need to have the sb_load64() and sb_store64() functions in assembly is to cheat the compiler and generate the 'ld' and 'sd' instructions which it otherwise will not do when compiling for a 32-bit architecture. There are some 64-bit registers in the SCD unit that must be accessed using 64-bit load and store instructions.
This commit is contained in:
Neel Natu
parent
c8f4860360
commit
c3f7e882dc
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=203509
@ -22,6 +22,8 @@
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <machine/asm.h>
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@ -41,115 +43,40 @@
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.set noreorder
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/*
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* return (MIPS_PHYS_TO_KSEG1(0x10020008))
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* Parameters: none
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* Parameters: uint32_t ptr
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* Return value: *(uint64_t *)ptr
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*/
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LEAF(sb_read_syscfg)
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lui v0, 0xb002
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ori v0, v0, 0x8
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ld v1, 0(v0) /* syscfg = MIPS_PHYS_TO_KSEG1(0x10020008) */
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LEAF(sb_load64)
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ld v1, 0(a0) /* result = *(uint64_t *)ptr */
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move v0, v1
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#if defined(TARGET_BIG_ENDIAN)
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dsll32 v1, v1, 0
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dsrl32 v1, v1, 0 /* v1 = lower_uint32(result) */
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jr ra
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dsrl32 v0, v0, 0 /* v0 = upper_uint32(result) */
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#else
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dsll32 v0, v0, 0
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dsrl32 v0, v0, 0 /* v0 = lower_uint32(mask) */
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dsrl32 v0, v0, 0 /* v0 = lower_uint32(result) */
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jr ra
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dsrl32 v1, v1, 0 /* v1 = upper_uint32(mask) */
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END(sb_read_syscfg)
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dsrl32 v1, v1, 0 /* v1 = upper_uint32(result) */
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#endif
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END(sb_load64)
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/*
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* MIPS_PHYS_TO_KSEG1(0x10020008) = (uint64_t)val
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* Parameters:
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* - lower_uint32(val): a0
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* - upper_uint32(val): a1
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* Parameters: uint32_t ptr, uint64_t val
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* Return value: void
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*/
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LEAF(sb_write_syscfg)
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lui v0, 0xb002
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ori v0, v0, 0x8
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dsll32 a1, a1, 0 /* clear lower 32 bits of a1 */
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dsll32 a0, a0, 0
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dsrl32 a0, a0, 0 /* clear upper 32 bits of a0 */
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or a1, a1, a0
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sd a1, 0(v0) /* MIPS_PHYS_TO_KSEG1(0x10020008) = val */
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LEAF(sb_store64)
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#if defined(TARGET_BIG_ENDIAN)
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dsll32 a2, a2, 0 /* a2 = upper_uint32(val) */
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dsll32 a3, a3, 0 /* a3 = lower_uint32(val) */
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dsrl32 a3, a3, 0
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#else
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dsll32 a3, a3, 0 /* a3 = upper_uint32(val) */
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dsll32 a2, a2, 0 /* a2 = lower_uint32(val) */
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dsrl32 a2, a2, 0
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#endif
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or t0, a2, a3
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jr ra
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nop
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nop
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END(sb_write_syscfg)
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/*
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* MIPS_PHYS_TO_KSEG1(0x10020028) |= (1 << intsrc)
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*
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* Parameters:
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* - intsrc (a0)
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*/
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LEAF(sb_disable_intsrc)
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lui v0, 0xb002
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ori v0, v0, 0x28
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ld v1, 0(v0) /* mask = MIPS_PHYS_TO_KSEG1(0x10020028) */
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li a1, 1
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dsllv a1, a1, a0
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or a1, a1, v1 /* mask |= (1 << intsrc) */
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jr ra
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sd a1, 0(v0) /* MIPS_PHYS_TO_KSEG1(0x10020028) = mask */
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END(sb_disable_intsrc)
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/*
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* MIPS_PHYS_TO_KSEG1(0x10020028) &= ~(1 << intsrc)
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*
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* Parameters:
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* - intsrc (a0)
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*/
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LEAF(sb_enable_intsrc)
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lui v0, 0xb002
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ori v0, v0, 0x28
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ld v1, 0(v0) /* mask = MIPS_PHYS_TO_KSEG1(0x10020028) */
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li a2, 1
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dsllv a2, a2, a0
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nor a2, zero, a2
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and a2, a2, v1 /* mask &= ~(1 << intsrc) */
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sd a2, 0(v0) /* MIPS_PHYS_TO_KSEG1(0x10020028) = mask */
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jr ra
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nop
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END(sb_enable_intsrc)
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/*
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* return ((uint64_t)MIPS_PHYS_TO_KSEG1(0x10020028))
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* Parameters: none
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*/
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LEAF(sb_read_intsrc_mask)
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lui v0, 0xb002
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ori v0, v0, 0x28
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ld v1, 0(v0) /* mask = MIPS_PHYS_TO_KSEG1(0x10020028) */
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move v0, v1
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dsll32 v0, v0, 0
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dsrl32 v0, v0, 0 /* v0 = lower_uint32(mask) */
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jr ra
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dsrl32 v1, v1, 0 /* v1 = upper_uint32(mask) */
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END(sb_read_intsrc_mask)
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/*
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* return ((uint64_t *)MIPS_PHYS_TO_KSEG1(0x10020200) + intsrc)
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* Parameters:
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* - intsrc (a0)
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*/
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LEAF(sb_read_intmap)
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sll a0, a0, 3 /* compute the offset of the intmap register */
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lui v0, 0xb002
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addu a0, a0, v0
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ld v0, 512(a0) /* v0 = MIPS_PHYS_TO_KSEG1(0x10020200) + off */
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jr ra
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nop
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END(sb_read_intmap)
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/*
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* (uint64_t *)MIPS_PHYS_TO_KSEG1(0x10020200) + intsrc = irq
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* Parameters:
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* - intsrc (a0)
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* - irq (a1)
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*/
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LEAF(sb_write_intmap)
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sll a0, a0, 0x3 /* compute the offset of the intmap register */
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lui v0, 0xb002
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addu a0, a0, v0
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sd a1, 512(a0) /* MIPS_PHYS_TO_KSEG1(0x10020200) + off = irq */
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jr ra
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nop
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END(sb_write_intmap)
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sd t0, 0(a0)
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END(sb_store64)
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@ -23,6 +23,10 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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@ -30,10 +34,12 @@
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#include <sys/bus.h>
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#include <machine/resource.h>
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#include <machine/intr_machdep.h>
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#include "sb_scd.h"
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__FBSDID("$FreeBSD$");
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extern void sb_store64(uint32_t addr, uint64_t val);
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extern uint64_t sb_load64(uint32_t addr);
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/*
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* System Control and Debug (SCD) unit on the Sibyte ZBbus.
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@ -44,8 +50,38 @@ __FBSDID("$FreeBSD$");
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*/
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#define GET_VAL_64(x, b, n) (((x) >> (b)) & ((1ULL << (n)) - 1))
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#define SYSREV_ADDR MIPS_PHYS_TO_KSEG1(0x10020000)
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#define SYSREV_NUM_PROCESSORS(x) GET_VAL_64((x), 24, 4)
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#define SYSCFG_ADDR MIPS_PHYS_TO_KSEG1(0x10020008)
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#define SYSCFG_PLLDIV(x) GET_VAL_64((x), 7, 5)
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#define INTSRC_MASK_ADDR(cpu) \
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(MIPS_PHYS_TO_KSEG1(0x10020028) | ((cpu) << 13))
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#define INTSRC_MAP_ADDR(cpu, intsrc) \
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(MIPS_PHYS_TO_KSEG1(0x10020200) | ((cpu) << 13)) + (intsrc * 8)
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#define MAILBOX_SET_ADDR(cpu) \
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(MIPS_PHYS_TO_KSEG1(0x100200C8) | ((cpu) << 13))
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#define MAILBOX_CLEAR_ADDR(cpu) \
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(MIPS_PHYS_TO_KSEG1(0x100200D0) | ((cpu) << 13))
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static uint64_t
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sb_read_syscfg(void)
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{
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return (sb_load64(SYSCFG_ADDR));
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}
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static void
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sb_write_syscfg(uint64_t val)
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{
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sb_store64(SYSCFG_ADDR, val);
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}
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uint64_t
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sb_cpu_speed(void)
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{
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@ -76,6 +112,71 @@ sb_system_reset(void)
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sb_write_syscfg(syscfg);
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}
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void
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sb_disable_intsrc(int cpu, int src)
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{
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uint32_t regaddr;
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uint64_t val;
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regaddr = INTSRC_MASK_ADDR(cpu);
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val = sb_load64(regaddr);
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val |= 1ULL << src;
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sb_store64(regaddr, val);
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}
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void
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sb_enable_intsrc(int cpu, int src)
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{
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uint32_t regaddr;
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uint64_t val;
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regaddr = INTSRC_MASK_ADDR(cpu);
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val = sb_load64(regaddr);
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val &= ~(1ULL << src);
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sb_store64(regaddr, val);
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}
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void
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sb_write_intsrc_mask(int cpu, uint64_t val)
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{
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uint32_t regaddr;
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regaddr = INTSRC_MASK_ADDR(cpu);
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sb_store64(regaddr, val);
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}
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uint64_t
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sb_read_intsrc_mask(int cpu)
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{
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uint32_t regaddr;
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uint64_t val;
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regaddr = INTSRC_MASK_ADDR(cpu);
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val = sb_load64(regaddr);
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return (val);
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}
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void
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sb_write_intmap(int cpu, int intsrc, int intrnum)
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{
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uint32_t regaddr;
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regaddr = INTSRC_MAP_ADDR(cpu, intsrc);
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sb_store64(regaddr, intrnum);
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}
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int
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sb_read_intmap(int cpu, int intsrc)
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{
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uint32_t regaddr;
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regaddr = INTSRC_MAP_ADDR(cpu, intsrc);
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return (sb_load64(regaddr) & 0x7);
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}
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int
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sb_route_intsrc(int intsrc)
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{
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@ -86,16 +187,10 @@ sb_route_intsrc(int intsrc)
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/*
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* Interrupt 5 is used by sources internal to the CPU (e.g. timer).
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* Use a deterministic mapping for the remaining sources to map to
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* interrupt numbers 0 through 4.
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* Use a deterministic mapping for the remaining sources.
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*/
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intrnum = intsrc % 5;
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/*
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* Program the interrupt mapper while we are here.
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*/
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sb_write_intmap(intsrc, intrnum);
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return (intrnum);
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}
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@ -116,16 +211,14 @@ scd_attach(device_t dev)
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int rid;
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struct resource *res;
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if (bootverbose) {
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if (bootverbose)
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device_printf(dev, "attached.\n");
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}
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rid = 0;
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res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, SCD_PHYSADDR,
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SCD_PHYSADDR + SCD_SIZE - 1, SCD_SIZE, 0);
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if (res == NULL) {
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if (res == NULL)
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panic("Cannot allocate resource for system control and debug.");
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}
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return (0);
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}
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@ -22,6 +22,8 @@
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SB_SCD_H_
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@ -33,14 +35,11 @@ uint64_t sb_cpu_speed(void);
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void sb_system_reset(void);
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int sb_route_intsrc(int src);
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void sb_enable_intsrc(int src);
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void sb_disable_intsrc(int src);
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uint64_t sb_read_intsrc_mask(void);
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int sb_read_intmap(int intsrc);
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void sb_write_intmap(int intsrc, int intrnum);
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uint64_t sb_read_syscfg(void);
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void sb_write_syscfg(uint64_t val);
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void sb_enable_intsrc(int cpu, int src);
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void sb_disable_intsrc(int cpu, int src);
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uint64_t sb_read_intsrc_mask(int cpu);
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void sb_write_intsrc_mask(int cpu, uint64_t mask);
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void sb_write_intmap(int cpu, int intsrc, int intrnum);
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int sb_read_intmap(int cpu, int intsrc);
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#endif /* _SB_SCD_H_ */
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@ -118,7 +118,7 @@ sb_intmap_activate(int intrnum, device_t dev, int rid)
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map = sb_intmap_lookup(intrnum, dev, rid);
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if (map) {
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sb_enable_intsrc(map->intsrc);
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sb_enable_intsrc(0, map->intsrc);
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} else {
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/*
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* In zbbus_setup_intr() we blindly call sb_intmap_activate()
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