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Correct a comment - we are not setting the exception level but rather are

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disabling interrupts.

Simplify register usage - we can directly load 'curpcb' into 'k1' after
interrupts are disabled. There is no need to do so indirectly through 'a1'.
This commit is contained in:
Neel Natu 2010-02-05 06:36:03 +00:00
parent d3e24a4579
commit ca98449e12
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=203511
1 changed files with 10 additions and 17 deletions
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27
sys/mips/mips/swtch.S
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@ -161,21 +161,19 @@ LEAF(fork_trampoline)
DO_AST
/*
* Since interrupts are enabled at this point, we use a1 instead of
* k0 or k1 to store the PCB pointer. This is because k0 and k1
* are not preserved across interrupts.
*/
GET_CPU_PCPU(a1)
lw a1, PC_CURPCB(a1)
1:
mfc0 v0, COP_0_STATUS_REG # set exeption level bit.
mfc0 v0, COP_0_STATUS_REG
and v0, ~(SR_INT_ENAB)
mtc0 v0, COP_0_STATUS_REG # set exeption level bit.
mtc0 v0, COP_0_STATUS_REG # disable interrupts
COP0_SYNC
/*
* The use of k1 for storing the PCB pointer must be done only
* after interrupts are disabled. Otherwise it will get overwritten
* by the interrupt code.
*/
.set noat
move k1, a1
GET_CPU_PCPU(k1)
lw k1, PC_CURPCB(k1)
RESTORE_U_PCB_REG(t0, MULLO, k1)
RESTORE_U_PCB_REG(t1, MULHI, k1)
mtlo t0
@ -185,11 +183,6 @@ LEAF(fork_trampoline)
RESTORE_U_PCB_REG(v0, V0, k1)
_MTC0 a0, COP_0_EXC_PC # set return address
/*
* The use of k1 for storing the PCB pointer must be done only
* after interrupts are disabled. Otherwise it will get overwritten
* by the interrupt code.
*/
RESTORE_U_PCB_REG(v1, V1, k1)
RESTORE_U_PCB_REG(a0, A0, k1)
RESTORE_U_PCB_REG(a1, A1, k1)