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Fix a bug in the description of the "p6-div" event. [1]

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Update the description of the "p6-div" and "p6-mul" events according
to the "Intel(r) 64 and IA-32 Architectures Software Developers
Manual Volume 3B: System Programming Guide, Part 2, November 2006".

Reported by: 	Harald Servat <redcrash at gmail dot com> [1]
This commit is contained in:
Joseph Koshy 2007-04-12 09:16:54 +00:00
parent 959bf73928
commit d62f5d4e5c
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=168660
1 changed files with 4 additions and 2 deletions
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lib/libpmc/pmc.3
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@ -1600,7 +1600,8 @@ Count the weighted number of cycles while a data cache unit miss is
outstanding, incremented by the number of outstanding cache misses at
any time.
.It Li p6-div
Count the number of floating point multiplies.
Count the number of integer and floating-point divides including
speculative divides.
This event is only allocated on counter 1.
.It Li p6-emon-esp-uops
.Pq Tn "Pentium M"
@ -2046,7 +2047,8 @@ Count the number of MMX saturating instructions executed.
.Pq Tn "Pentium II" , Tn "Pentium III"
Count the number of MMX micro-ops executed.
.It Li p6-mul
Count the number of floating point multiplies.
Count the number of integer and floating-point multiplies, including
speculative multiplies.
This event is only allocated on counter 1.
.It Li p6-partial-rat-stalls
Count the number of cycles or events for partial stalls.