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Don't disable CPU cache in init_486dlc. If BIOS supports Cyrix 486,
BIOS enables CPU cache and other registers. If BIOS does not supports it, CPU cache is disabled at reset time. This commit closes PR/3292. PR: 3292
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=25015
@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: initcpu.c,v 1.1 1997/03/22 19:00:36 kato Exp $
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* $Id: initcpu.c,v 1.2 1997/03/24 07:23:05 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -100,8 +100,6 @@ init_486dlc(void)
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eflags = read_eflags();
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disable_intr();
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load_cr0(rcr0() | CR0_CD | CR0_NW);
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invd();
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ccr0 = read_cyrix_reg(CCR0);
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: initcpu.c,v 1.1 1997/03/22 19:00:36 kato Exp $
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* $Id: initcpu.c,v 1.2 1997/03/24 07:23:05 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -100,8 +100,6 @@ init_486dlc(void)
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eflags = read_eflags();
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disable_intr();
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load_cr0(rcr0() | CR0_CD | CR0_NW);
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invd();
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ccr0 = read_cyrix_reg(CCR0);
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