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RISC-V ISA does not specify how to manage physical memory attributes (PMA).

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So do nothing in pmap_page_set_memattr() and don't panic.

Reviewed by:	markj
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D20209
This commit is contained in:
Ruslan Bukin 2019-05-10 11:21:57 +00:00
parent 16e55b9e0e
commit ef68f03ec2
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=347427
1 changed files with 0 additions and 10 deletions
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10
sys/riscv/riscv/pmap.c
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@ -4200,16 +4200,6 @@ pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
{
m->md.pv_memattr = ma;
/*
* RISCVTODO: Implement the below (from the amd64 pmap)
* If "m" is a normal page, update its direct mapping. This update
* can be relied upon to perform any cache operations that are
* required for data coherence.
*/
if ((m->flags & PG_FICTITIOUS) == 0 &&
PHYS_IN_DMAP(VM_PAGE_TO_PHYS(m)))
panic("RISCVTODO: pmap_page_set_memattr");
}
/*