loader/powerpc: Add some CAS support for newer POWER CPUs

* Add PVR bits for POWER10 and POWER11
* Initialize the `err` outvar, in case it's not touched on success by
  the hypervisor, to prevent spurious errors.
This commit is contained in:
Justin Hibbits 2024-10-11 17:01:15 -04:00
parent 1e434da3b0
commit f2e62e6013

View File

@ -40,10 +40,13 @@
#define PVR_CPU_P8NVL 0x004c0000
#define PVR_CPU_P8 0x004d0000
#define PVR_CPU_P9 0x004e0000
#define PVR_CPU_P10 0x00800000
#define PVR_CPU_P11 0x00820000
#define PVR_CPU_MASK 0xffff0000
#define PVR_ISA_207 0x0f000004
#define PVR_ISA_300 0x0f000005
#define PVR_ISA_31 0x0f000006
#define PVR_ISA_MASK 0xffffffff
/* loader version of kernel's CPU_MAXSIZE */
@ -122,7 +125,7 @@ struct opt_vec5 {
} __packed;
static struct ibm_arch_vec {
struct pvr pvr_list[7];
struct pvr pvr_list[10];
uint8_t num_opts;
struct opt_vec_ignore vec1;
struct opt_vec_ignore vec2;
@ -135,8 +138,11 @@ static struct ibm_arch_vec {
{ htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8E) },
{ htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P8NVL) },
{ htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P9) },
{ htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P10) },
{ htobe32(PVR_CPU_MASK), htobe32(PVR_CPU_P11) },
{ htobe32(PVR_ISA_MASK), htobe32(PVR_ISA_207) },
{ htobe32(PVR_ISA_MASK), htobe32(PVR_ISA_300) },
{ htobe32(PVR_ISA_MASK), htobe32(PVR_ISA_31) },
{ 0, 0xffffffffu } /* terminator */
},
4, /* num_opts (4 actually means 5 option vectors) */
@ -185,7 +191,7 @@ ppc64_cas(void)
{
phandle_t pkg;
ihandle_t inst;
cell_t err;
cell_t err = 0;
uint8_t buf[16], idx, val;
int i, len, rc, radix_mmu;
const char *var;