From fcc3a0f6302524d6860d64ff472d05c91d117cd3 Mon Sep 17 00:00:00 2001 From: Ruslan Bukin Date: Wed, 8 May 2019 16:06:54 +0000 Subject: [PATCH] Connect Xilinx AXI drivers and Cadence Ethernet MAC to the RISC-V build. Sponsored by: DARPA, AFRL --- sys/conf/files.riscv | 3 +++ sys/riscv/conf/GENERIC | 10 ++++++++++ 2 files changed, 13 insertions(+) diff --git a/sys/conf/files.riscv b/sys/conf/files.riscv index 09b12c2d13e5..b5f5309a88b3 100644 --- a/sys/conf/files.riscv +++ b/sys/conf/files.riscv @@ -5,10 +5,13 @@ cddl/dev/dtrace/riscv/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" cddl/dev/fbt/riscv/fbt_isa.c optional dtrace_fbt | dtraceall compile-with "${FBT_C}" crypto/blowfish/bf_enc.c optional crypto | ipsec | ipsec_support crypto/des/des_enc.c optional crypto | ipsec | ipsec_support | netsmb +dev/cadence/if_cgem.c optional cgem dev/ofw/ofw_cpu.c optional fdt dev/uart/uart_cpu_fdt.c optional uart fdt dev/uart/uart_dev_lowrisc.c optional uart_lowrisc dev/xilinx/axi_quad_spi.c optional xilinx_spi +dev/xilinx/axidma.c optional axidma xdma +dev/xilinx/if_xae.c optional xae kern/kern_clocksource.c standard kern/msi_if.m standard kern/pic_if.m standard diff --git a/sys/riscv/conf/GENERIC b/sys/riscv/conf/GENERIC index 33c234b32074..4b692415a194 100644 --- a/sys/riscv/conf/GENERIC +++ b/sys/riscv/conf/GENERIC @@ -102,6 +102,16 @@ device uart # Generic UART driver device uart_lowrisc # lowRISC UART driver device uart_ns8250 # ns8250-type UART driver + +# Ethernet drivers +device miibus # MII bus support +device cgem # Cadence Gigabit Ethernet MAC +device xae # Xilinx AXI Ethernet MAC + +# DMA support +device xdma # DMA interface +device axidma # Xilinx AXI DMA Controller + # Uncomment for memory disk # options MD_ROOT # options MD_ROOT_SIZE=32768 # 32MB ram disk