Commit Graph

9 Commits

Author SHA1 Message Date
Brooks Davis
1b9574b685 MFC r274820:
Merge from CheriBSD (2e28d2a309):

Remove initalized, but unused devname variable

Sponsored by:	DARPA, AFRL
2014-12-02 21:23:13 +00:00
Ian Lepore
359c68281f MFC r261410
Follow r261352 by updating all drivers which are children of simplebus
  to check the status property in their probe routines.
2014-05-15 16:11:06 +00:00
Ian Lepore
4dd6ff8e4d MFC r257334, r257336, r257337, r257338, r257341, r257342, r257343, r257370,
r257368, r257416

  Hints-only devices should return BUS_PROBE_NOWILDCARD from their probe
  methods.
2014-05-14 01:35:43 +00:00
Robert Watson
6a347d023b Merge Perforce changeset 219952 to head:
Make different bus attachments for Altera and Terasice
  device drivers share the same devclass_t.

Sponsored by:	DARPA, AFRL
2013-01-13 16:57:11 +00:00
Robert Watson
0a349699f4 Partially merge Perforce changeset 219942 to head:
Implement an FDT attachment for altera_avgen(4).

Portions of the changeset updating DTS and device.hints will be merged
separately.

Sponsored by:	DARPA, AFRL
2013-01-13 16:51:57 +00:00
Robert Watson
1925f29537 Merge Perforce changeset 219941 to head:
Copy altera_avgen(4) nexus attachment as a starting point for an
  FDT attachment.

Sponsored by:	DARPA, AFRL
2013-01-13 16:44:45 +00:00
Robert Watson
b364a5252e Merge Perforce changeset 219940 to head:
Rework altera_avgen(4) to cleanly(ish) separate nexus bus
  attachment from the driver itself.  This should allow us to
  plug in an fdt attachment more easily.

Sponsored by:	DARPA, AFRL
2013-01-13 16:43:59 +00:00
Robert Watson
86f4a437c9 Merge Perforce changeset 219939 to head:
Start restructuring of altera_avgen(4) so that it can have an FDT
  attachment -- this requires first properly breaking out the current
  nexus attachment from the driver implementation.

Sponsored by:	DARPA, AFRL
2013-01-13 16:41:25 +00:00
Robert Watson
cf8248866d Add altera_avgen(4), a generic device driver to be used by hard and soft
CPU cores on Altera FPGAs.  The device driver allows memory-mapped devices
on Altera's Avalon SoC bus to be exported to userspace via device nodes.
device.hints directories dictate device name, permissible access methods,
physical address and length, and I/O alignment.  Devices can be accessed
using read(2)/write(2), but also memory mapped in userspace using mmap(2).

Devices attach directly to the Nexus, as is common for embedded device
drivers; in the future something more mature might be desirable.  There is
currently no facility to support directing device-originated interrupts to
userspace.

In the future, this device driver may be renamed to socgen(4), as it can
in principle also be used with other system-on-chip (SoC) busses, such as
Axi on ASICs and FPGAs.  However, we have only tested it on Avalon busses
with memory-mapped ROMs, frame buffers, etc.

Sponsored by:	DARPA, AFRL
2012-08-25 11:07:43 +00:00