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1de7b4b805
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. No functional change intended.
315 lines
7.6 KiB
C
315 lines
7.6 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013 Hudson River Trading LLC
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* Written by: John H. Baldwin <jhb@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <machine/vmm.h>
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#include <assert.h>
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#include <errno.h>
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#include <pthread.h>
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#include <signal.h>
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#include <vmmapi.h>
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#include "acpi.h"
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#include "inout.h"
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#include "mevent.h"
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#include "pci_irq.h"
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#include "pci_lpc.h"
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static pthread_mutex_t pm_lock = PTHREAD_MUTEX_INITIALIZER;
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static struct mevent *power_button;
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static sig_t old_power_handler;
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/*
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* Reset Control register at I/O port 0xcf9. Bit 2 forces a system
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* reset when it transitions from 0 to 1. Bit 1 selects the type of
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* reset to attempt: 0 selects a "soft" reset, and 1 selects a "hard"
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* reset.
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*/
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static int
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reset_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint32_t *eax, void *arg)
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{
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int error;
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static uint8_t reset_control;
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if (bytes != 1)
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return (-1);
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if (in)
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*eax = reset_control;
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else {
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reset_control = *eax;
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/* Treat hard and soft resets the same. */
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if (reset_control & 0x4) {
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error = vm_suspend(ctx, VM_SUSPEND_RESET);
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assert(error == 0 || errno == EALREADY);
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}
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}
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return (0);
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}
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INOUT_PORT(reset_reg, 0xCF9, IOPORT_F_INOUT, reset_handler);
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/*
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* ACPI's SCI is a level-triggered interrupt.
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*/
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static int sci_active;
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static void
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sci_assert(struct vmctx *ctx)
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{
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if (sci_active)
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return;
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vm_isa_assert_irq(ctx, SCI_INT, SCI_INT);
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sci_active = 1;
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}
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static void
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sci_deassert(struct vmctx *ctx)
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{
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if (!sci_active)
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return;
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vm_isa_deassert_irq(ctx, SCI_INT, SCI_INT);
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sci_active = 0;
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}
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/*
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* Power Management 1 Event Registers
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*
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* The only power management event supported is a power button upon
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* receiving SIGTERM.
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*/
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static uint16_t pm1_enable, pm1_status;
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#define PM1_TMR_STS 0x0001
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#define PM1_BM_STS 0x0010
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#define PM1_GBL_STS 0x0020
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#define PM1_PWRBTN_STS 0x0100
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#define PM1_SLPBTN_STS 0x0200
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#define PM1_RTC_STS 0x0400
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#define PM1_WAK_STS 0x8000
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#define PM1_TMR_EN 0x0001
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#define PM1_GBL_EN 0x0020
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#define PM1_PWRBTN_EN 0x0100
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#define PM1_SLPBTN_EN 0x0200
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#define PM1_RTC_EN 0x0400
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static void
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sci_update(struct vmctx *ctx)
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{
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int need_sci;
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/* See if the SCI should be active or not. */
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need_sci = 0;
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if ((pm1_enable & PM1_TMR_EN) && (pm1_status & PM1_TMR_STS))
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need_sci = 1;
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if ((pm1_enable & PM1_GBL_EN) && (pm1_status & PM1_GBL_STS))
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need_sci = 1;
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if ((pm1_enable & PM1_PWRBTN_EN) && (pm1_status & PM1_PWRBTN_STS))
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need_sci = 1;
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if ((pm1_enable & PM1_SLPBTN_EN) && (pm1_status & PM1_SLPBTN_STS))
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need_sci = 1;
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if ((pm1_enable & PM1_RTC_EN) && (pm1_status & PM1_RTC_STS))
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need_sci = 1;
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if (need_sci)
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sci_assert(ctx);
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else
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sci_deassert(ctx);
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}
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static int
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pm1_status_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint32_t *eax, void *arg)
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{
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if (bytes != 2)
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return (-1);
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pthread_mutex_lock(&pm_lock);
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if (in)
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*eax = pm1_status;
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else {
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/*
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* Writes are only permitted to clear certain bits by
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* writing 1 to those flags.
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*/
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pm1_status &= ~(*eax & (PM1_WAK_STS | PM1_RTC_STS |
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PM1_SLPBTN_STS | PM1_PWRBTN_STS | PM1_BM_STS));
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sci_update(ctx);
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}
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pthread_mutex_unlock(&pm_lock);
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return (0);
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}
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static int
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pm1_enable_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint32_t *eax, void *arg)
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{
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if (bytes != 2)
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return (-1);
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pthread_mutex_lock(&pm_lock);
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if (in)
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*eax = pm1_enable;
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else {
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/*
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* Only permit certain bits to be set. We never use
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* the global lock, but ACPI-CA whines profusely if it
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* can't set GBL_EN.
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*/
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pm1_enable = *eax & (PM1_PWRBTN_EN | PM1_GBL_EN);
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sci_update(ctx);
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}
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pthread_mutex_unlock(&pm_lock);
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return (0);
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}
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INOUT_PORT(pm1_status, PM1A_EVT_ADDR, IOPORT_F_INOUT, pm1_status_handler);
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INOUT_PORT(pm1_enable, PM1A_EVT_ADDR + 2, IOPORT_F_INOUT, pm1_enable_handler);
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static void
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power_button_handler(int signal, enum ev_type type, void *arg)
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{
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struct vmctx *ctx;
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ctx = arg;
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pthread_mutex_lock(&pm_lock);
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if (!(pm1_status & PM1_PWRBTN_STS)) {
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pm1_status |= PM1_PWRBTN_STS;
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sci_update(ctx);
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}
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pthread_mutex_unlock(&pm_lock);
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}
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/*
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* Power Management 1 Control Register
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*
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* This is mostly unimplemented except that we wish to handle writes that
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* set SPL_EN to handle S5 (soft power off).
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*/
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static uint16_t pm1_control;
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#define PM1_SCI_EN 0x0001
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#define PM1_SLP_TYP 0x1c00
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#define PM1_SLP_EN 0x2000
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#define PM1_ALWAYS_ZERO 0xc003
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static int
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pm1_control_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint32_t *eax, void *arg)
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{
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int error;
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if (bytes != 2)
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return (-1);
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if (in)
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*eax = pm1_control;
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else {
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/*
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* Various bits are write-only or reserved, so force them
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* to zero in pm1_control. Always preserve SCI_EN as OSPM
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* can never change it.
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*/
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pm1_control = (pm1_control & PM1_SCI_EN) |
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(*eax & ~(PM1_SLP_EN | PM1_ALWAYS_ZERO));
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/*
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* If SLP_EN is set, check for S5. Bhyve's _S5_ method
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* says that '5' should be stored in SLP_TYP for S5.
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*/
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if (*eax & PM1_SLP_EN) {
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if ((pm1_control & PM1_SLP_TYP) >> 10 == 5) {
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error = vm_suspend(ctx, VM_SUSPEND_POWEROFF);
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assert(error == 0 || errno == EALREADY);
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}
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}
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}
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return (0);
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}
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INOUT_PORT(pm1_control, PM1A_CNT_ADDR, IOPORT_F_INOUT, pm1_control_handler);
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SYSRES_IO(PM1A_EVT_ADDR, 8);
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/*
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* ACPI SMI Command Register
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*
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* This write-only register is used to enable and disable ACPI.
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*/
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static int
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smi_cmd_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint32_t *eax, void *arg)
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{
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assert(!in);
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if (bytes != 1)
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return (-1);
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pthread_mutex_lock(&pm_lock);
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switch (*eax) {
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case BHYVE_ACPI_ENABLE:
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pm1_control |= PM1_SCI_EN;
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if (power_button == NULL) {
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power_button = mevent_add(SIGTERM, EVF_SIGNAL,
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power_button_handler, ctx);
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old_power_handler = signal(SIGTERM, SIG_IGN);
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}
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break;
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case BHYVE_ACPI_DISABLE:
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pm1_control &= ~PM1_SCI_EN;
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if (power_button != NULL) {
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mevent_delete(power_button);
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power_button = NULL;
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signal(SIGTERM, old_power_handler);
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}
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break;
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}
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pthread_mutex_unlock(&pm_lock);
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return (0);
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}
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INOUT_PORT(smi_cmd, SMI_CMD, IOPORT_F_OUT, smi_cmd_handler);
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SYSRES_IO(SMI_CMD, 1);
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void
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sci_init(struct vmctx *ctx)
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{
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/*
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* Mark ACPI's SCI as level trigger and bump its use count
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* in the PIRQ router.
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*/
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pci_irq_use(SCI_INT);
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vm_isa_set_irq_trigger(ctx, SCI_INT, LEVEL_TRIGGER);
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}
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