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d2aaaeac19
o Introduce a uart bus space so that we don't have to hack dev/uart to do 8 byte reads. This also handles the shift properly, so reset the shift we want dev/uart doing to 0. In effect, this bus space makes the octeon registers have an interface to dev/uart that looks just like the old ISA bus, but does the necessary 64-bit read/write to the bus. We only support read/write operations. We do all the widths, but likely could get away with only 64-bit and 8-bit given the restricted nature of use of this bus. o use bus_space_map to set the .bsh rather than a direct assignment. o Minor cleanup of uart_cpu_getdev to make it conform more to the other implementations. o Add some coments for future work. # with these changes, we now make it through cninit, but there's still some # problem that's preventing output, as well as another problem that causes # us to call panic just after we return from cninit() in platform_start.
122 lines
3.5 KiB
C
122 lines
3.5 KiB
C
/*-
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* Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* $Id$
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*/
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/*
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* Skeleton of this file was based on respective code for ARM
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* code written by Olivier Houchard.
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*/
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/*
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* XXXMIPS: This file is hacked from arm/... . XXXMIPS here means this file is
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* experimental and was written for MIPS32 port.
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*/
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#include "opt_uart.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcivar.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_bus.h>
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#include <dev/uart/uart_cpu.h>
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/*
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* XXXMIPS:
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*/
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#include <mips/octeon1/octeonreg.h>
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#include "uart_if.h"
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extern struct uart_class uart_oct16550_class;
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static int uart_octeon_probe(device_t dev);
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static void octeon_uart_identify(driver_t * drv, device_t parent);
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extern struct uart_class octeon_uart_class;
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static device_method_t uart_octeon_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, uart_octeon_probe),
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DEVMETHOD(device_attach, uart_bus_attach),
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DEVMETHOD(device_detach, uart_bus_detach),
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DEVMETHOD(device_identify, octeon_uart_identify),
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{0, 0}
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};
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static driver_t uart_octeon_driver = {
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uart_driver_name,
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uart_octeon_methods,
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sizeof(struct uart_softc),
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};
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extern
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SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
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static int
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uart_octeon_probe(device_t dev)
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{
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struct uart_softc *sc;
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int unit;
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unit = device_get_unit(dev);
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sc = device_get_softc(dev);
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sc->sc_class = &uart_oct16550_class;
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#if 1
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/*
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* We inherit the settings from the systme console. Note, the bst
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* bad bus_space_map are bogus here, but obio doesn't yet support
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* them, it seems.
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*/
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sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
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bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
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sc->sc_bas.bst = uart_bus_space_mem;
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if (bus_space_map(sc->sc_bas.bst, OCTEON_UART0ADR, OCTEON_UART_SIZE,
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0, &sc->sc_bas.bsh) != 0)
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return (ENXIO);
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#endif
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return (uart_bus_probe(dev, sc->sc_bas.regshft, 0, 0, unit));
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}
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static void
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octeon_uart_identify(driver_t * drv, device_t parent)
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{
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BUS_ADD_CHILD(parent, 0, "uart", 0);
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}
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DRIVER_MODULE(uart, obio, uart_octeon_driver, uart_devclass, 0, 0);
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