KATO Takenori 4c024bbdf8 Improved CPU identification and initialization routines. This ... supports All Cyrix CPUs, IBM Blue Lightning CPU and NexGen (now AMD) Nx586 CPU, and initialize special registers of Cyrix CPU and msr of IBM Blue Lightning CPU. If revision of Cyrix 6x86 CPU < 2.7, CPU cache is enabled in write-through mode. This can be disabled by kernel configuration options. Reviewed by: Bruce Evans <bde@freebsd.org> and Jordan K. Hubbard <jkh@freebsd.org>		1997-03-22 18:54:54 +00:00
..
apm	Makefile generates boths IBM-PC and PC-98 version of object code in	1997-03-09 16:46:05 +00:00
bios	Makefile generates boths IBM-PC and PC-98 version of object code in	1997-03-09 16:46:05 +00:00
boot	Don't attempt to read past EOF.	1997-03-15 16:49:51 +00:00
conf	Improved CPU identification and initialization routines. This	1997-03-22 18:54:54 +00:00
eisa	The register definition file is now in the compile directory.	1997-03-16 07:09:32 +00:00
i386	Improved CPU identification and initialization routines. This	1997-03-22 18:54:54 +00:00
ibcs2	Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not	1997-02-22 09:48:43 +00:00
include	Improved CPU identification and initialization routines. This	1997-03-22 18:54:54 +00:00
isa	Improved CPU identification and initialization routines. This	1997-03-22 18:54:54 +00:00
linux	Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not	1997-02-22 09:48:43 +00:00
pci	improve pcibus_check: Only assume PCI if at least one PCI to anything bridge	1997-03-05 20:52:00 +00:00
scsi	Adapt to some changes in the register definitions. Clear the selection	1997-03-16 07:12:07 +00:00
Makefile	Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not	1997-02-22 09:48:43 +00:00