Mark Johnston 6f8ba91638 RISC-V: Implement get_cyclecount(9). ... Add the missing implementation for get_cyclecount(9) on RISC-V by reading the cycle CSR. Submitted by: Mitchell Horne <mhorne063@gmail.com> Reviewed by: jhb MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D17953		2018-11-13 18:20:27 +00:00
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_align.h
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
asm.h	Permit supervisor to access user VA space for certain functions only.	2018-09-05 11:34:58 +00:00
atomic.h	Implement atomic_swap_{int,long,ptr}(9).	2018-08-07 18:56:51 +00:00
bus_dma.h
bus.h
clock.h
counter.h	Back pcpu zone with domain correct pages	2018-07-06 02:06:03 +00:00
cpu.h	RISC-V: Implement get_cyclecount(9).	2018-11-13 18:20:27 +00:00
cpufunc.h	RISC-V: Add macros for reading performance counter CSRs.	2018-11-13 18:12:06 +00:00
db_machdep.h
dump.h
efi.h
elf.h	Consolidate identical ELF auxargs type defintions.	2018-10-22 22:24:32 +00:00
encoding.h	Add RISC-V instructions encoding.	2018-08-13 16:07:18 +00:00
endian.h
exec.h
float.h
floatingpoint.h
fpe.h	Various fixes for floating point on RISC-V.	2018-09-19 23:45:18 +00:00
frame.h
ieeefp.h
in_cksum.h
intr.h
kdb.h	Various fixes for TLB management on RISC-V.	2018-10-15 18:56:54 +00:00
machdep.h
md_var.h
memdev.h
minidump.h
ofw_machdep.h
param.h
pcb.h
pcpu.h
pmap.h	Support RISC-V implementations that do not manage the A and D bits	2018-10-18 15:25:07 +00:00
pmc_mdep.h
proc.h
profile.h
psl.h
pte.h	Restrict setting PTE execute permissions on RISC-V.	2018-11-01 22:23:15 +00:00
ptrace.h
reg.h
reloc.h
resource.h
riscvreg.h	RISC-V: Add macros for reading performance counter CSRs.	2018-11-13 18:12:06 +00:00
runq.h
sbi.h	Various fixes for TLB management on RISC-V.	2018-10-15 18:56:54 +00:00
setjmp.h	Fix setjmp for RISC-V:	2018-07-23 09:54:28 +00:00
sf_buf.h
signal.h
smp.h
stack.h
stdarg.h
sysarch.h
trap.h
ucontext.h
vdso.h
vm.h
vmparam.h	Implement uma_small_alloc(), uma_small_free().	2018-08-08 16:08:38 +00:00