mirror of
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070fc2ce12
on the console, and no longer uses "SLXOS" which I suspect may be a trademark... (I'm not sure, but this is not really a SLXOS driver anyway)
500 lines
14 KiB
C
500 lines
14 KiB
C
/*
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* Device driver for Specialix range (SI/XIO) of serial line multiplexors.
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* 'C' definitions for Specialix serial multiplex driver.
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*
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* Copyright (C) 1990, 1992 Specialix International,
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* Copyright (C) 1993, Andy Rutter <andy@acronym.co.uk>
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* Copyright (C) 1995, Peter Wemm <peter@haywire.dialix.com>
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*
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* Derived from: SunOS 4.x version
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notices, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notices, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Andy Rutter of
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* Advanced Methods and Tools Ltd. based on original information
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* from Specialix International.
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* 4. Neither the name of Advanced Methods and Tools, nor Specialix
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* International may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE.
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*
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* $Id: si.h,v 1.5 1995/11/09 21:53:48 peter Exp $
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*/
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/*
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* Macro to turn a device number into various parameters, and test for
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* CONTROL device.
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* max of 4 controllers with up to 32 ports per controller.
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* minor device allocation is:
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* adapter port
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* 0 0-31
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* 1 32-63
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* 2 64-95
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* 3 96-127
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*/
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#define SI_MAXPORTPERCARD 32
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#define SI_MAXCONTROLLER 4
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/*
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* breakup of minor device number:
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* lowest 5 bits: port number on card 0x1f
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* next 2 bits: card number 0x60
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* top bit: callout 0x80
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* next 8 bits is the major number
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* next 2 bits select initial/lock states
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* next 1 bit selects the master control device
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*/
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#define SI_PORT_MASK 0x1f
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#define SI_CARD_MASK 0x60
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#define SI_TTY_MASK 0x7f
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#define SI_CALLOUT_MASK 0x80
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#define SI_INIT_STATE_MASK 0x10000
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#define SI_LOCK_STATE_MASK 0x20000
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#define SI_STATE_MASK 0x30000
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#define SI_CONTROLDEV_MASK 0x40000
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#define SI_SPECIAL_MASK 0x70000
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#define SI_PORT(m) (m & SI_PORT_MASK)
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#define SI_CARD(m) ((m & SI_CARD_MASK) >> 5)
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#define SI_TTY(m) (m & SI_TTY_MASK)
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#define IS_CALLOUT(m) (m & SI_CALLOUT_MASK)
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#define IS_STATE(m) (m & SI_STATE_MASK)
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#define IS_CONTROLDEV(m) (m & SI_CONTROLDEV_MASK)
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#define IS_SPECIAL(m) (m & SI_SPECIAL_MASK)
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#define MINOR2SC(m) (&si_softc[SI_CARD(m)])
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#define MINOR2PP(m) (MINOR2SC((m))->sc_ports + SI_PORT((m)))
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#define MINOR2TP(m) (MINOR2PP((m))->sp_tty)
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#define TP2PP(tp) (MINOR2PP(SI_TTY(minor((tp)->t_dev))))
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/* Adapter types */
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#define SIEMPTY 0
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#define SIHOST 1
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#define SI2 2
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#define SIHOST2 3
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#define SIEISA 4
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/* Buffer parameters */
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#define SI_BUFFERSIZE 256
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typedef unsigned char BYTE; /* Type cast for unsigned 8 bit */
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typedef unsigned short WORD; /* Type cast for unsigned 16 bit */
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/*
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* Hardware `registers', stored in the shared memory.
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* These are related to the firmware running on the Z280.
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*/
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struct si_reg {
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BYTE initstat;
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BYTE memsize;
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WORD int_count;
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WORD revision;
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BYTE rx_int_count;
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BYTE spare;
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WORD int_pending;
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WORD int_counter;
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BYTE int_scounter;
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BYTE res[0x80 - 13];
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};
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/*
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* Per module control structure, stored in shared memory.
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*/
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struct si_module {
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WORD sm_next; /* Next module */
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BYTE sm_type; /* Number of channels */
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BYTE sm_number; /* Module number on cable */
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BYTE sm_dsr; /* Private dsr copy */
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BYTE sm_res[0x80 - 5]; /* Reserve space to 128 bytes */
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};
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/*
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* The 'next' pointer & with 0x7fff + SI base addres give
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* the address of the next module block if fitted. (else 0)
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* Note that next points to the TX buffer so 0x60 must be
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* subtracted to find the true base.
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*
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* Type is a bit field as follows: The bottom 5 bits are the
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* number of channels on this module, the top 3 bits are
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* as the module type thus:
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*
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* 000 2698 RS232 module (4 port or 8 port)
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* 001 Reserved for 2698 RS422 module
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* 010 Reserved for 8530 based sync module
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* 011 Reserved for parallel printer module
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* 100 Reserved for network module
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* 101-111 Reserved for expansion.
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*
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* The number field is the cable position of the module.
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*/
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#define M232 0x00
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#define M422 0x20 /* not supported */
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#define MSYNC 0x40 /* this is the Telebit Netblazer module */
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#define MCENT 0x60 /* not supported */
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#define MNET 0x80 /* not supported */
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#define MMASK 0x1F
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/*
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* Per channel(port) control structure, stored in shared memory.
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*/
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struct si_channel {
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/*
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* Generic stuff
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*/
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WORD next; /* Next Channel */
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WORD addr_uart; /* Uart address */
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WORD module; /* address of module struct */
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BYTE type; /* Uart type */
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BYTE fill;
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/*
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* Uart type specific stuff
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*/
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BYTE x_status; /* XON / XOFF status */
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BYTE c_status; /* cooking status */
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BYTE hi_rxipos; /* stuff into rx buff */
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BYTE hi_rxopos; /* stuff out of rx buffer */
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BYTE hi_txopos; /* Stuff into tx ptr */
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BYTE hi_txipos; /* ditto out */
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BYTE hi_stat; /* Command register */
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BYTE dsr_bit; /* Magic bit for DSR */
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BYTE txon; /* TX XON char */
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BYTE txoff; /* ditto XOFF */
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BYTE rxon; /* RX XON char */
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BYTE rxoff; /* ditto XOFF */
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BYTE hi_mr1; /* mode 1 image */
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BYTE hi_mr2; /* mode 2 image */
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BYTE hi_csr; /* clock register */
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BYTE hi_op; /* Op control */
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BYTE hi_ip; /* Input pins */
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BYTE hi_state; /* status */
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BYTE hi_prtcl; /* Protocol */
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BYTE hi_txon; /* host copy tx xon stuff */
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BYTE hi_txoff;
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BYTE hi_rxon;
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BYTE hi_rxoff;
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BYTE close_prev; /* Was channel previously closed */
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BYTE hi_break; /* host copy break process */
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BYTE break_state; /* local copy ditto */
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BYTE hi_mask; /* Mask for CS7 etc. */
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BYTE mask_z280; /* Z280's copy */
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BYTE res[0x60 - 36];
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BYTE hi_txbuf[SI_BUFFERSIZE];
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BYTE hi_rxbuf[SI_BUFFERSIZE];
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BYTE res1[0xA0];
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};
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/*
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* Register definitions
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*/
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/*
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* Break input control register definitions
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*/
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#define BR_IGN 0x01 /* Ignore any received breaks */
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#define BR_INT 0x02 /* Interrupt on received break */
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#define BR_PARMRK 0x04 /* Enable parmrk parity error processing */
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#define BR_PARIGN 0x08 /* Ignore chars with parity errors */
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/*
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* Protocol register provided by host for XON/XOFF and cooking
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*/
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#define SP_TANY 0x01 /* Tx XON any char */
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#define SP_TXEN 0x02 /* Tx XON/XOFF enabled */
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#define SP_CEN 0x04 /* Cooking enabled */
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#define SP_RXEN 0x08 /* Rx XON/XOFF enabled */
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#define SP_DCEN 0x20 /* DCD / DTR check */
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#define SP_PAEN 0x80 /* Parity checking enabled */
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/*
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* HOST STATUS / COMMAND REGISTER
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*/
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#define IDLE_OPEN 0x00 /* Default mode, TX and RX polled
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buffer updated etc */
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#define LOPEN 0x02 /* Local open command (no modem ctl */
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#define MOPEN 0x04 /* Open and monitor modem lines (blocks
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for DCD */
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#define MPEND 0x06 /* Wating for DCD */
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#define CONFIG 0x08 /* Channel config has changed */
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#define CLOSE 0x0A /* Close channel */
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#define SBREAK 0x0C /* Start break */
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#define EBREAK 0x0E /* End break */
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#define IDLE_CLOSE 0x10 /* Closed channel */
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#define IDLE_BREAK 0x12 /* In a break */
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#define FCLOSE 0x14 /* Force a close */
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#define RESUME 0x16 /* Clear a pending xoff */
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#define WFLUSH 0x18 /* Flush output buffer */
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#define RFLUSH 0x1A /* Flush input buffer */
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/*
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* Host status register
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*/
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#define ST_BREAK 0x01 /* Break received (clear with config) */
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/*
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* OUTPUT PORT REGISTER
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*/
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#define OP_CTS 0x01 /* Enable CTS */
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#define OP_DSR 0x02 /* Enable DSR */
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/*
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* INPUT PORT REGISTER
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*/
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#define IP_DCD 0x04 /* DCD High */
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#define IP_DTR 0x20 /* DTR High */
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#define IP_RTS 0x02 /* RTS High */
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#define IP_RI 0x40 /* RI High */
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/*
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* Mode register and uart specific stuff
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*/
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/*
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* MODE REGISTER 1
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*/
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#define MR1_5_BITS 0x00
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#define MR1_6_BITS 0x01
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#define MR1_7_BITS 0x02
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#define MR1_8_BITS 0x03
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/*
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* Parity
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*/
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#define MR1_ODD 0x04
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#define MR1_EVEN 0x00
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/*
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* Parity mode
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*/
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#define MR1_WITH 0x00
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#define MR1_FORCE 0x08
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#define MR1_NONE 0x10
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#define MR1_SPECIAL 0x18
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/*
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* Error mode
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*/
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#define MR1_CHAR 0x00
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#define MR1_BLOCK 0x20
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/*
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* Request to send line automatic control
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*/
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#define MR1_CTSCONT 0x80
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/*
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* MODE REGISTER 2
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*/
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/*
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* Number of stop bits
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*/
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#define MR2_1_STOP 0x07
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#define MR2_2_STOP 0x0F
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/*
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* Clear to send automatic testing before character sent
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*/
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#define MR2_RTSCONT 0x10
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/*
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* Reset RTS automatically after sending character?
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*/
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#define MR2_CTSCONT 0x20
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/*
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* Channel mode
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*/
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#define MR2_NORMAL 0x00
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#define MR2_AUTO 0x40
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#define MR2_LOCAL 0x80
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#define MR2_REMOTE 0xC0
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/*
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* CLOCK SELECT REGISTER - this and the code assumes ispeed == ospeed
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*/
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/*
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* Clocking rates are in lower and upper nibbles.. R = upper, T = lower
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*/
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#define CLK75 0x0
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#define CLK110 0x1 /* 110 on XIO!! */
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#define CLK38400 0x2 /* out of sequence */
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#define CLK150 0x3
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#define CLK300 0x4
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#define CLK600 0x5
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#define CLK1200 0x6
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#define CLK2000 0x7
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#define CLK2400 0x8
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#define CLK4800 0x9
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#define CLK7200 0xa /* unchecked */
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#define CLK9600 0xb
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#define CLK19200 0xc
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#define CLK57600 0xd
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/*
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* Per-port (channel) soft information structure, stored in the driver.
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* This is visible via ioctl()'s.
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*/
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struct si_port {
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volatile struct si_channel *sp_ccb;
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struct tty *sp_tty;
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int sp_pend; /* pending command */
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int sp_last_hi_ip; /* cached DCD */
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int sp_state;
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int sp_active_out; /* callout is open */
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int sp_dtr_wait; /* DTR holddown in hz */
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int sp_delta_overflows;
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u_int sp_wopeners; /* # procs waiting DCD */
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u_char sp_hotchar; /* ldisc specific ASAP char */
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/* Initial state. */
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struct termios sp_iin;
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struct termios sp_iout;
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/* Lock state. */
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struct termios sp_lin;
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struct termios sp_lout;
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#ifdef SI_DEBUG
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int sp_debug; /* debug mask */
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#endif
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};
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/* sp_state */
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#define SS_CLOSED 0x0000
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#define SS_OPEN 0x0001 /* Port is active */
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/* 0x0002 -- */
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/* 0x0004 -- */
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/* 0x0008 -- */
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/* 0x0010 -- */
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/* 0x0020 -- */
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/* 0x0040 -- */
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/* 0x0080 -- */
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#define SS_LSTART 0x0100 /* lstart timeout pending */
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#define SS_INLSTART 0x0200 /* running an lstart induced t_oproc */
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#define SS_CLOSING 0x0400 /* in the middle of a siclose() */
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/* 0x0800 -- */
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#define SS_WAITWRITE 0x1000
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#define SS_BLOCKWRITE 0x2000
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#define SS_DTR_OFF 0x4000 /* DTR held off */
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/*
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* Command post flags
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*/
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#define SI_NOWAIT 0x00 /* Don't wait for command */
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#define SI_WAIT 0x01 /* Wait for complete */
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/*
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* Extensive debugging stuff - manipulated using siconfig(8)
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*/
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#define DBG_ENTRY 0x00000001
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#define DBG_DRAIN 0x00000002
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#define DBG_OPEN 0x00000004
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#define DBG_CLOSE 0x00000008
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#define DBG_READ 0x00000010
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#define DBG_WRITE 0x00000020
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#define DBG_PARAM 0x00000040
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#define DBG_INTR 0x00000080
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#define DBG_IOCTL 0x00000100
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/* 0x00000200 */
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#define DBG_SELECT 0x00000400
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#define DBG_OPTIM 0x00000800
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#define DBG_START 0x00001000
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#define DBG_EXIT 0x00002000
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#define DBG_FAIL 0x00004000
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#define DBG_STOP 0x00008000
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#define DBG_AUTOBOOT 0x00010000
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#define DBG_MODEM 0x00020000
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#define DBG_DOWNLOAD 0x00040000
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#define DBG_LSTART 0x00080000
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#define DBG_POLL 0x00100000
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#define DBG_ALL 0xffffffff
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/*
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* SI ioctls
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*/
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/*
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* struct for use by Specialix ioctls - used by siconfig(8)
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*/
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typedef struct {
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unsigned char
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sid_port:5, /* 0 - 31 ports per card */
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sid_card:2, /* 0 - 3 cards */
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sid_control:1; /* controlling device (all cards) */
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} sidev_t;
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struct si_tcsi {
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sidev_t tc_dev;
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union {
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int x_int;
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int x_dbglvl;
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} tc_action;
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#define tc_card tc_dev.sid_card
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#define tc_port tc_dev.sid_port
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#define tc_int tc_action.x_int
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#define tc_dbglvl tc_action.x_dbglvl
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};
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struct si_pstat {
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sidev_t tc_dev;
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union {
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struct si_port x_siport;
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struct si_channel x_ccb;
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struct tty x_tty;
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} tc_action;
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#define tc_siport tc_action.x_siport
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#define tc_ccb tc_action.x_ccb
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#define tc_tty tc_action.x_tty
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};
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#define IOCTL_MIN 96
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#define TCSIDEBUG _IOW('S', 96, struct si_tcsi) /* Toggle debug */
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#define TCSIRXIT _IOW('S', 97, struct si_tcsi) /* RX int throttle */
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#define TCSIIT _IOW('S', 98, struct si_tcsi) /* TX int throttle */
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/* 99 defunct */
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/* 100 defunct */
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/* 101 defunct */
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/* 102 defunct */
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/* 103 defunct */
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/* 104 defunct */
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#define TCSISTATE _IOWR('S', 105, struct si_tcsi) /* get current state of RTS
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DCD and DTR pins */
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/* 106 defunct */
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#define TCSIPORTS _IOR('S', 107, int) /* Number of ports found */
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#define TCSISDBG_LEVEL _IOW('S', 108, struct si_tcsi) /* equivalent of TCSIDEBUG which sets a
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* particular debug level (DBG_??? bit
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* mask), default is 0xffff */
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#define TCSIGDBG_LEVEL _IOWR('S', 109, struct si_tcsi)
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#define TCSIGRXIT _IOWR('S', 110, struct si_tcsi)
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#define TCSIGIT _IOWR('S', 111, struct si_tcsi)
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/* 112 defunct */
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/* 113 defunct */
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/* 114 defunct */
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/* 115 defunct */
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/* 116 defunct */
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/* 117 defunct */
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#define TCSISDBG_ALL _IOW('S', 118, int) /* set global debug level */
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#define TCSIGDBG_ALL _IOR('S', 119, int) /* get global debug level */
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/* 120 defunct */
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/* 121 defunct */
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/* 122 defunct */
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/* 123 defunct */
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#define TCSIMODULES _IOR('S', 124, int) /* Number of modules found */
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/* Various stats and monitoring hooks per tty device */
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#define TCSI_PORT _IOWR('S', 125, struct si_pstat) /* get si_port */
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#define TCSI_CCB _IOWR('S', 126, struct si_pstat) /* get si_ccb */
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#define TCSI_TTY _IOWR('S', 127, struct si_pstat) /* get tty struct */
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#define IOCTL_MAX 127
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#define IS_SI_IOCTL(cmd) ((u_int)((cmd)&0xff00) == ('S'<<8) && \
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(u_int)((cmd)&0xff) >= IOCTL_MIN && \
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(u_int)((cmd)&0xff) <= IOCTL_MAX)
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#define CONTROLDEV "/dev/si_control"
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