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117 lines
4.9 KiB
C
117 lines
4.9 KiB
C
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)rtc.h 7.1 (Berkeley) 5/12/91
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* $Id: rtc.h,v 1.7 1994/12/04 20:22:20 joerg Exp $
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*/
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#ifndef _I386_ISA_RTC_H_
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#define _I386_ISA_RTC_H_ 1
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/*
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* RTC Register locations
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*/
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#define RTC_SEC 0x00 /* seconds */
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#define RTC_SECALRM 0x01 /* seconds alarm */
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#define RTC_MIN 0x02 /* minutes */
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#define RTC_MINALRM 0x03 /* minutes alarm */
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#define RTC_HRS 0x04 /* hours */
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#define RTC_HRSALRM 0x05 /* hours alarm */
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#define RTC_WDAY 0x06 /* week day */
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#define RTC_DAY 0x07 /* day of month */
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#define RTC_MONTH 0x08 /* month of year */
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#define RTC_YEAR 0x09 /* month of year */
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#define RTC_STATUSA 0x0a /* status register A */
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#define RTCSA_TUP 0x80 /* time update, don't look now */
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#define RTCSA_DIVIDER 0x20 /* divider correct for 32768 Hz */
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#define RTCSA_8192 0x03
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#define RTCSA_4096 0x04
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#define RTCSA_2048 0x05
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#define RTCSA_1024 0x06 /* default for profiling */
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#define RTCSA_PROF RTCSA_1024
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#define RTC_PROFRATE 1024
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#define RTCSA_512 0x07
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#define RTCSA_256 0x08
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#define RTCSA_128 0x09
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#define RTCSA_NOPROF RTCSA_128
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#define RTC_NOPROFRATE 128
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#define RTCSA_64 0x0a
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#define RTCSA_32 0x0b
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#define RTC_STATUSB 0x0b /* status register B */
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#define RTCSB_DST 0x01 /* Daylight Savings Time enable */
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#define RTCSB_24HR 0x02 /* 0 = 12 hours, 1 = 24 hours */
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#define RTCSB_BCD 0x04 /* 0 = BCD, 1 = Binary coded time */
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#define RTCSB_SQWE 0x08 /* 1 = output sqare wave at SQW pin */
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#define RTCSB_UINTR 0x10 /* 1 = enable update-ended interrupt */
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#define RTCSB_AINTR 0x20 /* 1 = enable alarm interrupt */
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#define RTCSB_PINTR 0x40 /* 1 = enable periodic clock interrupt */
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#define RTCSB_HALT 0x80 /* stop clock updates */
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#define RTC_INTR 0x0c /* status register C (R) interrupt source */
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#define RTCIR_UPDATE 0x10 /* update intr */
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#define RTCIR_ALARM 0x20 /* alarm intr */
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#define RTCIR_PERIOD 0x40 /* periodic intr */
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#define RTCIR_INT 0x80 /* interrupt output signal */
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#define RTC_STATUSD 0x0d /* status register D (R) Lost Power */
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#define RTCSD_PWR 0x80 /* clock lost power */
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#define RTC_DIAG 0x0e /* status register E - bios diagnostic */
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#define RTCDG_BITS "\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time"
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#define RTC_RESET 0x0f /* status register F - reset code byte */
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#define RTCRS_RST 0x00 /* normal reset */
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#define RTCRS_LOAD 0x04 /* load system */
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#define RTC_FDISKETTE 0x10 /* diskette drive type in upper/lower nibble */
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#define RTCFDT_NONE 0 /* none present */
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#define RTCFDT_360K 0x10 /* 360K */
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#define RTCFDT_12M 0x20 /* 1.2M */
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#define RTCFDT_720K 0x30 /* 720K */
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#define RTCFDT_144M 0x40 /* 1.44M */
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#define RTCFDT_288M_1 0x50 /* 2.88M, some BIOSes */
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#define RTCFDT_288M 0x60 /* 2.88M */
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#define RTC_BASELO 0x15 /* low byte of basemem size */
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#define RTC_BASEHI 0x16 /* high byte of basemem size */
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#define RTC_EXTLO 0x17 /* low byte of extended mem size */
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#define RTC_EXTHI 0x18 /* low byte of extended mem size */
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#define RTC_CENTURY 0x32 /* current century */
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#endif /* _I386_ISA_RTC_H_ */
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