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dfe57951f0
This is the first major quirk we need to support in order to run on current T-HEAD/XuanTie CPUs, e.g. the C906 or C910, found in several existing RISC-V SBCs. With these custom dcache routines installed, busdma can reliably communicate with devices which are not coherent w.r.t. the CPU's data caches. This patch introduces the first quirk/errata handling functions to identcpu.c, and thus is forced to make some decisions about how this code is structured. It will be amended with the changes that follow in the series, yet I feel the final result is (unavoidably) somewhat clumsy. I expect the CPU identification code will continue to evolve as more CPUs and their quirks are eventually supported. Discussed with: jrtc27 Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D47455 |
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.. | ||
config.mk | ||
debuginfo.ldscript | ||
dtb.build.mk | ||
dtb.mk | ||
files | ||
files.amd64 | ||
files.arm | ||
files.arm64 | ||
files.i386 | ||
files.powerpc | ||
files.riscv | ||
files.x86 | ||
kern.mk | ||
kern.opts.mk | ||
kern.post.mk | ||
kern.pre.mk | ||
kmod_syms_prefix.awk | ||
kmod_syms.awk | ||
kmod.mk | ||
kmod.opts.mk | ||
ldscript.amd64 | ||
ldscript.arm | ||
ldscript.arm64 | ||
ldscript.i386 | ||
ldscript.kmod.amd64 | ||
ldscript.kmod.i386 | ||
ldscript.powerpc | ||
ldscript.powerpc64 | ||
ldscript.powerpc64le | ||
ldscript.powerpcspe | ||
ldscript.riscv | ||
Makefile.amd64 | ||
Makefile.arm | ||
Makefile.arm64 | ||
Makefile.i386 | ||
Makefile.powerpc | ||
Makefile.riscv | ||
newvers.sh | ||
NOTES | ||
options | ||
options.amd64 | ||
options.arm | ||
options.arm64 | ||
options.i386 | ||
options.powerpc | ||
options.riscv | ||
std.debug | ||
std.nodebug | ||
sysent.mk | ||
systags.sh | ||
vdso_amd64_ia32.ldscript | ||
vdso_amd64.ldscript | ||
WITHOUT_SOURCELESS | ||
WITHOUT_SOURCELESS_HOST | ||
WITHOUT_SOURCELESS_UCODE |