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change the default ABI of riscv64-linux-musl
Before, this would cause a link failure when mixing Zig and C code for RISC-V targets. Now, the ABIs match and Zig and C code can be mixed successfully. I will file a follow-up issue for the ability to deal more explicitly with ABIs. closes #4863
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@ -8940,10 +8940,24 @@ static void init(CodeGen *g) {
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fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
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fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
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}
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// TODO handle float ABI better- it should depend on the ABI portion of std.Target
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ZigLLVMABIType float_abi = ZigLLVMABITypeDefault;
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// TODO a way to override this as part of std.Target ABI?
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const char *abi_name = nullptr;
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if (target_is_riscv(g->zig_target)) {
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// RISC-V Linux defaults to ilp32d/lp64d
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if (g->zig_target->os == OsLinux) {
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abi_name = (g->zig_target->arch == ZigLLVM_riscv32) ? "ilp32d" : "lp64d";
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} else {
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abi_name = (g->zig_target->arch == ZigLLVM_riscv32) ? "ilp32" : "lp64";
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}
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}
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g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
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target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
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to_llvm_code_model(g), g->function_sections);
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to_llvm_code_model(g), g->function_sections, float_abi, abi_name);
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g->target_data_ref = LLVMCreateTargetDataLayout(g->target_machine);
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@ -100,7 +100,7 @@ static const bool assertions_on = false;
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LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Triple,
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const char *CPU, const char *Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc,
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LLVMCodeModel CodeModel, bool function_sections)
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LLVMCodeModel CodeModel, bool function_sections, ZigLLVMABIType float_abi, const char *abi_name)
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{
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Optional<Reloc::Model> RM;
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switch (Reloc){
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@ -147,6 +147,21 @@ LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Tri
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TargetOptions opt;
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opt.FunctionSections = function_sections;
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switch (float_abi) {
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case ZigLLVMABITypeDefault:
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opt.FloatABIType = FloatABI::Default;
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break;
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case ZigLLVMABITypeSoft:
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opt.FloatABIType = FloatABI::Soft;
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break;
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case ZigLLVMABITypeHard:
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opt.FloatABIType = FloatABI::Hard;
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break;
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}
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if (abi_name != nullptr) {
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opt.MCOptions.ABIName = abi_name;
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}
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TargetMachine *TM = reinterpret_cast<Target*>(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM,
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OL, JIT);
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@ -51,9 +51,16 @@ ZIG_EXTERN_C bool ZigLLVMTargetMachineEmitToFile(LLVMTargetMachineRef targ_machi
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bool is_small, bool time_report,
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const char *asm_filename, const char *bin_filename, const char *llvm_ir_filename);
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enum ZigLLVMABIType {
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ZigLLVMABITypeDefault, // Target-specific (either soft or hard depending on triple, etc).
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ZigLLVMABITypeSoft, // Soft float.
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ZigLLVMABITypeHard // Hard float.
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};
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ZIG_EXTERN_C LLVMTargetMachineRef ZigLLVMCreateTargetMachine(LLVMTargetRef T, const char *Triple,
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const char *CPU, const char *Features, LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc,
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LLVMCodeModel CodeModel, bool function_sections);
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LLVMCodeModel CodeModel, bool function_sections, ZigLLVMABIType float_abi, const char *abi_name);
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ZIG_EXTERN_C LLVMTypeRef ZigLLVMTokenTypeInContext(LLVMContextRef context_ref);
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@ -160,15 +160,14 @@ const test_targets = blk: {
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},
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},
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// https://github.com/ziglang/zig/issues/4863
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//TestTarget{
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// .target = .{
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// .cpu_arch = .riscv64,
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// .os_tag = .linux,
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// .abi = .musl,
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// },
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// .link_libc = true,
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//},
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TestTarget{
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.target = .{
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.cpu_arch = .riscv64,
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.os_tag = .linux,
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.abi = .musl,
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},
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.link_libc = true,
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},
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// https://github.com/ziglang/zig/issues/3340
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//TestTarget{
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