From 3a5142af8dcafea7062588b9d217ae82735c0bac Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Mon, 28 Oct 2024 20:24:41 +0100
Subject: [PATCH] compiler: Handle arm_aapcs16_vfp alongside arm_aapcs_vfp in
 some places.

---
 src/Zcu.zig          |  6 +++++-
 src/codegen/c.zig    |  2 +-
 src/codegen/llvm.zig | 16 +++++++++++-----
 src/link/Dwarf.zig   |  5 +++--
 4 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/src/Zcu.zig b/src/Zcu.zig
index 88bc4750af..67c8f14729 100644
--- a/src/Zcu.zig
+++ b/src/Zcu.zig
@@ -3615,12 +3615,16 @@ pub fn callconvSupported(zcu: *Zcu, cc: std.builtin.CallingConvention) union(enu
                 .aarch64_vfabi,
                 .aarch64_vfabi_sve,
                 .arm_aapcs,
-                .arm_aapcs_vfp,
                 .riscv64_lp64_v,
                 .riscv32_ilp32_v,
                 .m68k_rtd,
                 => |opts| opts.incoming_stack_alignment == null,
 
+                .arm_aapcs_vfp,
+                => |opts| opts.incoming_stack_alignment == null and target.os.tag != .watchos,
+                .arm_aapcs16_vfp,
+                => |opts| opts.incoming_stack_alignment == null and target.os.tag == .watchos,
+
                 .x86_sysv,
                 .x86_win,
                 .x86_stdcall,
diff --git a/src/codegen/c.zig b/src/codegen/c.zig
index 4d55637f27..d7b2ca3d09 100644
--- a/src/codegen/c.zig
+++ b/src/codegen/c.zig
@@ -7623,7 +7623,7 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8
         .aarch64_vfabi => "aarch64_vector_pcs",
         .aarch64_vfabi_sve => "aarch64_sve_pcs",
         .arm_aapcs => "pcs(\"aapcs\")",
-        .arm_aapcs_vfp => "pcs(\"aapcs-vfp\")",
+        .arm_aapcs_vfp, .arm_aapcs16_vfp => "pcs(\"aapcs-vfp\")",
         .riscv64_lp64_v, .riscv32_ilp32_v => "riscv_vector_cc",
         .m68k_rtd => "m68k_rtd",
 
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index fc7d26a815..217c14d9bb 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -11747,7 +11747,14 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
         .aarch64_vfabi_sve => .aarch64_sve_vector_pcs,
         .arm_apcs => .arm_apcscc,
         .arm_aapcs => .arm_aapcscc,
-        .arm_aapcs_vfp => .arm_aapcs_vfpcc,
+        .arm_aapcs_vfp => if (target.os.tag != .watchos)
+            .arm_aapcs_vfpcc
+        else
+            null,
+        .arm_aapcs16_vfp => if (target.os.tag == .watchos)
+            .arm_aapcs_vfpcc
+        else
+            null,
         .riscv64_lp64_v => .riscv_vectorcallcc,
         .riscv32_ilp32_v => .riscv_vectorcallcc,
         .avr_builtin => .avr_builtincc,
@@ -11777,7 +11784,6 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
         .aarch64_aapcs,
         .aarch64_aapcs_darwin,
         .aarch64_aapcs_win,
-        .arm_aapcs16_vfp,
         .mips64_n64,
         .mips64_n32,
         .mips_o32,
@@ -11957,7 +11963,7 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe
         .aarch64_aapcs_darwin,
         .aarch64_aapcs_win,
         => aarch64_c_abi.classifyType(return_type, zcu) == .memory,
-        .arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
+        .arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
             .memory, .i64_array => true,
             .i32_array => |size| size != 1,
             .byval => false,
@@ -12007,7 +12013,7 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
             .integer => return o.builder.intType(@intCast(return_type.bitSize(zcu))),
             .double_integer => return o.builder.arrayType(2, .i64),
         },
-        .arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
+        .arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
             .memory, .i64_array => return .void,
             .i32_array => |len| return if (len == 1) .i32 else .void,
             .byval => return o.lowerType(return_type),
@@ -12256,7 +12262,7 @@ const ParamTypeIterator = struct {
                     .double_integer => return Lowering{ .i64_array = 2 },
                 }
             },
-            .arm_aapcs, .arm_aapcs_vfp => {
+            .arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => {
                 it.zig_index += 1;
                 it.llvm_index += 1;
                 switch (arm_c_abi.classifyType(ty, zcu, .arg)) {
diff --git a/src/link/Dwarf.zig b/src/link/Dwarf.zig
index 2babe2b090..b96124438b 100644
--- a/src/link/Dwarf.zig
+++ b/src/link/Dwarf.zig
@@ -3433,8 +3433,9 @@ fn updateType(
 
                     .arm_apcs => .nocall,
                     .arm_aapcs => .LLVM_AAPCS,
-                    .arm_aapcs_vfp => .LLVM_AAPCS_VFP,
-                    .arm_aapcs16_vfp => .nocall,
+                    .arm_aapcs_vfp,
+                    .arm_aapcs16_vfp,
+                    => .LLVM_AAPCS_VFP,
 
                     .riscv64_lp64_v,
                     .riscv32_ilp32_v,