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stage2 codegen: move bit definitions to src/arch

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joachimschmidt557 2021-09-23 22:47:12 +02:00 committed by Andrew Kelley
parent 664941bf14
commit 8f58e2d779
9 changed files with 31 additions and 31 deletions
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8
CMakeLists.txt
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@ -551,18 +551,18 @@ set(ZIG_STAGE2_SOURCES
"${CMAKE_SOURCE_DIR}/src/TypedValue.zig"
"${CMAKE_SOURCE_DIR}/src/WaitGroup.zig"
"${CMAKE_SOURCE_DIR}/src/Zir.zig"
"${CMAKE_SOURCE_DIR}/src/arch/aarch64/bits.zig"
"${CMAKE_SOURCE_DIR}/src/arch/arm/bits.zig"
"${CMAKE_SOURCE_DIR}/src/arch/riscv64/bits.zig"
"${CMAKE_SOURCE_DIR}/src/arch/x86_64/bits.zig"
"${CMAKE_SOURCE_DIR}/src/clang.zig"
"${CMAKE_SOURCE_DIR}/src/clang_options.zig"
"${CMAKE_SOURCE_DIR}/src/clang_options_data.zig"
"${CMAKE_SOURCE_DIR}/src/codegen.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/aarch64.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/arm.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/c.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/llvm.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/llvm/bindings.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/riscv64.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/wasm.zig"
"${CMAKE_SOURCE_DIR}/src/codegen/x86_64.zig"
"${CMAKE_SOURCE_DIR}/src/glibc.zig"
"${CMAKE_SOURCE_DIR}/src/introspect.zig"
"${CMAKE_SOURCE_DIR}/src/libc_installation.zig"

0
src/codegen/aarch64.zig → src/arch/aarch64/bits.zig
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0
src/codegen/arm.zig → src/arch/arm/bits.zig
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0
src/codegen/riscv64.zig → src/arch/riscv64/bits.zig
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0
src/codegen/x86.zig → src/arch/x86/bits.zig
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0
src/codegen/x86_64.zig → src/arch/x86_64/bits.zig
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48
src/codegen.zig
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@ -21,7 +21,7 @@ const log = std.log.scoped(.codegen);
const build_options = @import("build_options");
const RegisterManager = @import("register_manager.zig").RegisterManager;
const X8664Encoder = @import("codegen/x86_64.zig").Encoder;
const X8664Encoder = @import("arch/x86_64/bits.zig").Encoder;
pub const FnResult = union(enum) {
/// The `code` parameter passed to `generateSymbol` has the value appended.
@ -470,7 +470,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
/// A branch in the ARM instruction set
arm_branch: struct {
pos: usize,
cond: @import("codegen/arm.zig").Condition,
cond: @import("arch/arm/bits.zig").Condition,
},
};
@ -5336,11 +5336,11 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
}
const Register = switch (arch) {
.i386 => @import("codegen/x86.zig").Register,
.x86_64 => @import("codegen/x86_64.zig").Register,
.riscv64 => @import("codegen/riscv64.zig").Register,
.arm, .armeb => @import("codegen/arm.zig").Register,
.aarch64, .aarch64_be, .aarch64_32 => @import("codegen/aarch64.zig").Register,
.i386 => @import("arch/x86/bits.zig").Register,
.x86_64 => @import("arch/x86_64/bits.zig").Register,
.riscv64 => @import("arch/riscv64/bits.zig").Register,
.arm, .armeb => @import("arch/arm/bits.zig").Register,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").Register,
else => enum {
dummy,
@ -5352,39 +5352,39 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
};
const Instruction = switch (arch) {
.riscv64 => @import("codegen/riscv64.zig").Instruction,
.arm, .armeb => @import("codegen/arm.zig").Instruction,
.aarch64, .aarch64_be, .aarch64_32 => @import("codegen/aarch64.zig").Instruction,
.riscv64 => @import("arch/riscv64/bits.zig").Instruction,
.arm, .armeb => @import("arch/arm/bits.zig").Instruction,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").Instruction,
else => void,
};
const Condition = switch (arch) {
.arm, .armeb => @import("codegen/arm.zig").Condition,
.arm, .armeb => @import("arch/arm/bits.zig").Condition,
else => void,
};
const callee_preserved_regs = switch (arch) {
.i386 => @import("codegen/x86.zig").callee_preserved_regs,
.x86_64 => @import("codegen/x86_64.zig").callee_preserved_regs,
.riscv64 => @import("codegen/riscv64.zig").callee_preserved_regs,
.arm, .armeb => @import("codegen/arm.zig").callee_preserved_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("codegen/aarch64.zig").callee_preserved_regs,
.i386 => @import("arch/x86/bits.zig").callee_preserved_regs,
.x86_64 => @import("arch/x86_64/bits.zig").callee_preserved_regs,
.riscv64 => @import("arch/riscv64/bits.zig").callee_preserved_regs,
.arm, .armeb => @import("arch/arm/bits.zig").callee_preserved_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").callee_preserved_regs,
else => [_]Register{},
};
const c_abi_int_param_regs = switch (arch) {
.i386 => @import("codegen/x86.zig").c_abi_int_param_regs,
.x86_64 => @import("codegen/x86_64.zig").c_abi_int_param_regs,
.arm, .armeb => @import("codegen/arm.zig").c_abi_int_param_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("codegen/aarch64.zig").c_abi_int_param_regs,
.i386 => @import("arch/x86/bits.zig").c_abi_int_param_regs,
.x86_64 => @import("arch/x86_64/bits.zig").c_abi_int_param_regs,
.arm, .armeb => @import("arch/arm/bits.zig").c_abi_int_param_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").c_abi_int_param_regs,
else => [_]Register{},
};
const c_abi_int_return_regs = switch (arch) {
.i386 => @import("codegen/x86.zig").c_abi_int_return_regs,
.x86_64 => @import("codegen/x86_64.zig").c_abi_int_return_regs,
.arm, .armeb => @import("codegen/arm.zig").c_abi_int_return_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("codegen/aarch64.zig").c_abi_int_return_regs,
.i386 => @import("arch/x86/bits.zig").c_abi_int_return_regs,
.x86_64 => @import("arch/x86_64/bits.zig").c_abi_int_return_regs,
.arm, .armeb => @import("arch/arm/bits.zig").c_abi_int_return_regs,
.aarch64, .aarch64_be, .aarch64_32 => @import("arch/aarch64/bits.zig").c_abi_int_return_regs,
else => [_]Register{},
};

4
src/link/MachO.zig
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@ -12,7 +12,7 @@ const math = std.math;
const mem = std.mem;
const meta = std.meta;
const aarch64 = @import("../codegen/aarch64.zig");
const aarch64 = @import("../arch/aarch64/bits.zig");
const bind = @import("MachO/bind.zig");
const codegen = @import("../codegen.zig");
const commands = @import("MachO/commands.zig");
@ -200,7 +200,7 @@ atoms: std.AutoHashMapUnmanaged(MatchingSection, *Atom) = .{},
/// List of atoms that are owned directly by the linker.
/// Currently these are only atoms that are the result of linking
/// object files. Atoms which take part in incremental linking are
/// object files. Atoms which take part in incremental linking are
/// at present owned by Module.Decl.
/// TODO consolidate this.
managed_atoms: std.ArrayListUnmanaged(*Atom) = .{},

2
src/link/MachO/Atom.zig
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@ -2,7 +2,7 @@ const Atom = @This();
const std = @import("std");
const build_options = @import("build_options");
const aarch64 = @import("../../codegen/aarch64.zig");
const aarch64 = @import("../../arch/aarch64/bits.zig");
const assert = std.debug.assert;
const commands = @import("commands.zig");
const log = std.log.scoped(.text_block);