diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index 7cb7d6f61f..e9d5a1af02 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -12419,7 +12419,8 @@ fn isScalar(zcu: *Zcu, ty: Type) bool { } /// This function returns true if we expect LLVM to lower x86_fp80 correctly -/// and false if we expect LLVM to crash if it counters an x86_fp80 type. +/// and false if we expect LLVM to crash if it encounters an x86_fp80 type, +/// or if it produces miscompilations. fn backendSupportsF80(target: std.Target) bool { return switch (target.cpu.arch) { .x86_64, .x86 => !std.Target.x86.featureSetHas(target.cpu.features, .soft_float), @@ -12428,8 +12429,8 @@ fn backendSupportsF80(target: std.Target) bool { } /// This function returns true if we expect LLVM to lower f16 correctly -/// and false if we expect LLVM to crash if it counters an f16 type or -/// if it produces miscompilations. +/// and false if we expect LLVM to crash if it encounters an f16 type, +/// or if it produces miscompilations. fn backendSupportsF16(target: std.Target) bool { return switch (target.cpu.arch) { .hexagon, @@ -12443,7 +12444,6 @@ fn backendSupportsF16(target: std.Target) bool { .mipsel, .mips64, .mips64el, - .riscv32, .s390x, => false, .arm, @@ -12459,7 +12459,7 @@ fn backendSupportsF16(target: std.Target) bool { } /// This function returns true if we expect LLVM to lower f128 correctly, -/// and false if we expect LLVm to crash if it encounters and f128 type +/// and false if we expect LLVM to crash if it encounters an f128 type, /// or if it produces miscompilations. fn backendSupportsF128(target: std.Target) bool { return switch (target.cpu.arch) { @@ -12486,7 +12486,7 @@ fn backendSupportsF128(target: std.Target) bool { } /// LLVM does not support all relevant intrinsics for all targets, so we -/// may need to manually generate a libc call +/// may need to manually generate a compiler-rt call. fn intrinsicsAllowed(scalar_ty: Type, target: std.Target) bool { return switch (scalar_ty.toIntern()) { .f16_type => backendSupportsF16(target),