jimzah/zig
1
0
Fork 0
mirror of https://github.com/ziglang/zig.git synced 2024-11-27 07:32:44 +00:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

[Stage2/x86] Fix 8-bit register order

Browse Source
This commit is contained in:
Noam Preil 2020-06-05 14:11:30 -04:00 committed by Andrew Kelley
parent 37695ed81e
commit c405844b0a
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src-self-hosted/codegen/x86.zig
View File

@ -7,7 +7,7 @@ pub const Register = enum(u8) {
ax, cx, dx, bx, sp, bp, si, di,
// 16-23, 8-bit registers. id is int value - 16.
al, bl, cl, dl, ah, ch, dh, bh,
al, cl, dl, bl, ah, ch, dh, bh,
/// Returns the bit-width of the register.
pub fn size(self: @This()) u7 {

2
src-self-hosted/codegen/x86_64.zig
View File

@ -33,7 +33,7 @@ pub const Register = enum(u8) {
// 48-63, 8-bit registers. 56-63 are extended.
// id is int value - 48.
al, bl, cl, dl, ah, ch, dh, bh,
al, cl, dl, bl, ah, ch, dh, bh,
r8b, r9b, r10b, r11b, r12b, r13b, r14b, r15b,
/// Returns the bit-width of the register.