mirror of
https://github.com/ziglang/zig.git
synced 2024-11-27 07:32:44 +00:00
f000f8a59a
allow test cases to chose wether to link libc or not. default behavior is to not link libc, except for `exeUsingLLVMBackend`
74 lines
2.0 KiB
Zig
74 lines
2.0 KiB
Zig
const std = @import("std");
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const TestContext = @import("../../src/test.zig").TestContext;
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pub fn addCases(ctx: *TestContext) !void {
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{
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var case = addPtx(ctx, "nvptx: simple addition and subtraction");
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case.compiles(
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\\fn add(a: i32, b: i32) i32 {
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\\ return a + b;
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\\}
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\\
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\\pub export fn add_and_substract(a: i32, out: *i32) callconv(.PtxKernel) void {
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\\ const x = add(a, 7);
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\\ var y = add(2, 0);
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\\ y -= x;
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\\ out.* = y;
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\\}
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);
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}
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{
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var case = addPtx(ctx, "nvptx: read special registers");
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case.compiles(
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\\fn threadIdX() usize {
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\\ var tid = asm volatile ("mov.u32 \t$0, %tid.x;"
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\\ : [ret] "=r" (-> u32),
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\\ );
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\\ return @as(usize, tid);
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\\}
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\\
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\\pub export fn special_reg(a: []const i32, out: []i32) callconv(.PtxKernel) void {
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\\ const i = threadIdX();
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\\ out[i] = a[i] + 7;
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\\}
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);
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}
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{
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var case = addPtx(ctx, "nvptx: address spaces");
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case.compiles(
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\\var x: i32 addrspace(.global) = 0;
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\\
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\\pub export fn increment(out: *i32) callconv(.PtxKernel) void {
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\\ x += 1;
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\\ out.* = x;
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\\}
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);
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}
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}
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const nvptx_target = std.zig.CrossTarget{
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.cpu_arch = .nvptx64,
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.os_tag = .cuda,
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};
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pub fn addPtx(
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ctx: *TestContext,
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name: []const u8,
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) *TestContext.Case {
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ctx.cases.append(TestContext.Case{
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.name = name,
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.target = nvptx_target,
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.updates = std.ArrayList(TestContext.Update).init(ctx.cases.allocator),
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.output_mode = .Obj,
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.files = std.ArrayList(TestContext.File).init(ctx.cases.allocator),
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.link_libc = false,
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.backend = .llvm,
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}) catch @panic("out of memory");
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return &ctx.cases.items[ctx.cases.items.len - 1];
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}
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