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195 lines
7.6 KiB
C
Vendored
195 lines
7.6 KiB
C
Vendored
/*===----------------- gfniintrin.h - GFNI intrinsics ----------------------===
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*
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <gfniintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __GFNIINTRIN_H
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#define __GFNIINTRIN_H
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/* Default attributes for simple form (no masking). */
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#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("gfni"), __min_vector_width__(128)))
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/* Default attributes for YMM unmasked form. */
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#define __DEFAULT_FN_ATTRS_Y __attribute__((__always_inline__, __nodebug__, __target__("avx,gfni"), __min_vector_width__(256)))
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/* Default attributes for ZMM unmasked forms. */
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#define __DEFAULT_FN_ATTRS_Z __attribute__((__always_inline__, __nodebug__, __target__("avx512f,gfni"), __min_vector_width__(512)))
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/* Default attributes for ZMM masked forms. */
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#define __DEFAULT_FN_ATTRS_Z_MASK __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,gfni"), __min_vector_width__(512)))
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/* Default attributes for VLX masked forms. */
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#define __DEFAULT_FN_ATTRS_VL128 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,avx512vl,gfni"), __min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS_VL256 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,avx512vl,gfni"), __min_vector_width__(256)))
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#define _mm_gf2p8affineinv_epi64_epi8(A, B, I) \
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((__m128i)__builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \
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(__v16qi)(__m128i)(B), \
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(char)(I)))
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#define _mm_gf2p8affine_epi64_epi8(A, B, I) \
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((__m128i)__builtin_ia32_vgf2p8affineqb_v16qi((__v16qi)(__m128i)(A), \
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(__v16qi)(__m128i)(B), \
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(char)(I)))
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static __inline__ __m128i __DEFAULT_FN_ATTRS
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_mm_gf2p8mul_epi8(__m128i __A, __m128i __B)
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{
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return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A,
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(__v16qi) __B);
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}
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#ifdef __AVXINTRIN_H
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#define _mm256_gf2p8affineinv_epi64_epi8(A, B, I) \
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((__m256i)__builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A), \
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(__v32qi)(__m256i)(B), \
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(char)(I)))
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#define _mm256_gf2p8affine_epi64_epi8(A, B, I) \
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((__m256i)__builtin_ia32_vgf2p8affineqb_v32qi((__v32qi)(__m256i)(A), \
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(__v32qi)(__m256i)(B), \
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(char)(I)))
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static __inline__ __m256i __DEFAULT_FN_ATTRS_Y
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_mm256_gf2p8mul_epi8(__m256i __A, __m256i __B)
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{
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return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi((__v32qi) __A,
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(__v32qi) __B);
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}
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#endif /* __AVXINTRIN_H */
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#ifdef __AVX512BWINTRIN_H
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#define _mm512_gf2p8affineinv_epi64_epi8(A, B, I) \
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((__m512i)__builtin_ia32_vgf2p8affineinvqb_v64qi((__v64qi)(__m512i)(A), \
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(__v64qi)(__m512i)(B), \
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(char)(I)))
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#define _mm512_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \
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((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \
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(__v64qi)_mm512_gf2p8affineinv_epi64_epi8(A, B, I), \
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(__v64qi)(__m512i)(S)))
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#define _mm512_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \
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_mm512_mask_gf2p8affineinv_epi64_epi8((__m512i)_mm512_setzero_si512(), \
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U, A, B, I)
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#define _mm512_gf2p8affine_epi64_epi8(A, B, I) \
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((__m512i)__builtin_ia32_vgf2p8affineqb_v64qi((__v64qi)(__m512i)(A), \
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(__v64qi)(__m512i)(B), \
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(char)(I)))
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#define _mm512_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \
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((__m512i)__builtin_ia32_selectb_512((__mmask64)(U), \
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(__v64qi)_mm512_gf2p8affine_epi64_epi8((A), (B), (I)), \
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(__v64qi)(__m512i)(S)))
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#define _mm512_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \
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_mm512_mask_gf2p8affine_epi64_epi8((__m512i)_mm512_setzero_si512(), \
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U, A, B, I)
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static __inline__ __m512i __DEFAULT_FN_ATTRS_Z
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_mm512_gf2p8mul_epi8(__m512i __A, __m512i __B)
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{
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return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi((__v64qi) __A,
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(__v64qi) __B);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS_Z_MASK
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_mm512_mask_gf2p8mul_epi8(__m512i __S, __mmask64 __U, __m512i __A, __m512i __B)
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{
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return (__m512i) __builtin_ia32_selectb_512(__U,
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(__v64qi) _mm512_gf2p8mul_epi8(__A, __B),
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(__v64qi) __S);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS_Z_MASK
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_mm512_maskz_gf2p8mul_epi8(__mmask64 __U, __m512i __A, __m512i __B)
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{
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return _mm512_mask_gf2p8mul_epi8((__m512i)_mm512_setzero_si512(),
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__U, __A, __B);
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}
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#endif /* __AVX512BWINTRIN_H */
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#ifdef __AVX512VLBWINTRIN_H
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#define _mm_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \
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((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \
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(__v16qi)_mm_gf2p8affineinv_epi64_epi8(A, B, I), \
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(__v16qi)(__m128i)(S)))
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#define _mm_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \
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_mm_mask_gf2p8affineinv_epi64_epi8((__m128i)_mm_setzero_si128(), \
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U, A, B, I)
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#define _mm256_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \
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((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \
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(__v32qi)_mm256_gf2p8affineinv_epi64_epi8(A, B, I), \
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(__v32qi)(__m256i)(S)))
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#define _mm256_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \
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_mm256_mask_gf2p8affineinv_epi64_epi8((__m256i)_mm256_setzero_si256(), \
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U, A, B, I)
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#define _mm_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \
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((__m128i)__builtin_ia32_selectb_128((__mmask16)(U), \
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(__v16qi)_mm_gf2p8affine_epi64_epi8(A, B, I), \
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(__v16qi)(__m128i)(S)))
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#define _mm_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \
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_mm_mask_gf2p8affine_epi64_epi8((__m128i)_mm_setzero_si128(), U, A, B, I)
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#define _mm256_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \
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((__m256i)__builtin_ia32_selectb_256((__mmask32)(U), \
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(__v32qi)_mm256_gf2p8affine_epi64_epi8(A, B, I), \
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(__v32qi)(__m256i)(S)))
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#define _mm256_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \
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_mm256_mask_gf2p8affine_epi64_epi8((__m256i)_mm256_setzero_si256(), \
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U, A, B, I)
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static __inline__ __m128i __DEFAULT_FN_ATTRS_VL128
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_mm_mask_gf2p8mul_epi8(__m128i __S, __mmask16 __U, __m128i __A, __m128i __B)
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{
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return (__m128i) __builtin_ia32_selectb_128(__U,
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(__v16qi) _mm_gf2p8mul_epi8(__A, __B),
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(__v16qi) __S);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS_VL128
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_mm_maskz_gf2p8mul_epi8(__mmask16 __U, __m128i __A, __m128i __B)
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{
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return _mm_mask_gf2p8mul_epi8((__m128i)_mm_setzero_si128(),
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__U, __A, __B);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS_VL256
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_mm256_mask_gf2p8mul_epi8(__m256i __S, __mmask32 __U, __m256i __A, __m256i __B)
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{
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return (__m256i) __builtin_ia32_selectb_256(__U,
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(__v32qi) _mm256_gf2p8mul_epi8(__A, __B),
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(__v32qi) __S);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS_VL256
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_mm256_maskz_gf2p8mul_epi8(__mmask32 __U, __m256i __A, __m256i __B)
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{
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return _mm256_mask_gf2p8mul_epi8((__m256i)_mm256_setzero_si256(),
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__U, __A, __B);
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}
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#endif /* __AVX512VLBWINTRIN_H */
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#undef __DEFAULT_FN_ATTRS
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#undef __DEFAULT_FN_ATTRS_Y
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#undef __DEFAULT_FN_ATTRS_Z
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#undef __DEFAULT_FN_ATTRS_VL128
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#undef __DEFAULT_FN_ATTRS_VL256
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#endif /* __GFNIINTRIN_H */
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