mirror of
https://github.com/ziglang/zig.git
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bac3c2748f
We do not yet have correct implementation to access xmm registers from the world of ucontext/mcontext. Unimplement .netbsd to allow building zig compiler.
399 lines
18 KiB
Zig
399 lines
18 KiB
Zig
const builtin = @import("builtin");
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const std = @import("../std.zig");
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const os = std.os;
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const mem = std.mem;
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pub fn supportsUnwinding(target: std.Target) bool {
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return switch (target.cpu.arch) {
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.x86 => switch (target.os.tag) {
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.linux, .netbsd, .solaris => true,
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else => false,
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},
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.x86_64 => switch (target.os.tag) {
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.linux, .netbsd, .freebsd, .openbsd, .macos, .ios, .solaris => true,
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else => false,
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},
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.arm => switch (target.os.tag) {
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.linux => true,
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else => false,
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},
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.aarch64 => switch (target.os.tag) {
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.linux, .netbsd, .freebsd, .macos, .ios => true,
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else => false,
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},
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else => false,
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};
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}
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pub fn ipRegNum() u8 {
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return switch (builtin.cpu.arch) {
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.x86 => 8,
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.x86_64 => 16,
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.arm => 15,
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.aarch64 => 32,
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else => unreachable,
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};
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}
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pub fn fpRegNum(reg_context: RegisterContext) u8 {
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return switch (builtin.cpu.arch) {
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// GCC on OS X historicaly did the opposite of ELF for these registers (only in .eh_frame), and that is now the convention for MachO
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.x86 => if (reg_context.eh_frame and reg_context.is_macho) 4 else 5,
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.x86_64 => 6,
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.arm => 11,
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.aarch64 => 29,
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else => unreachable,
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};
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}
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pub fn spRegNum(reg_context: RegisterContext) u8 {
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return switch (builtin.cpu.arch) {
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.x86 => if (reg_context.eh_frame and reg_context.is_macho) 5 else 4,
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.x86_64 => 7,
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.arm => 13,
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.aarch64 => 31,
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else => unreachable,
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};
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}
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/// Some platforms use pointer authentication - the upper bits of instruction pointers contain a signature.
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/// This function clears these signature bits to make the pointer usable.
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pub inline fn stripInstructionPtrAuthCode(ptr: usize) usize {
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if (builtin.cpu.arch == .aarch64) {
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// `hint 0x07` maps to `xpaclri` (or `nop` if the hardware doesn't support it)
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// The save / restore is because `xpaclri` operates on x30 (LR)
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return asm (
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\\mov x16, x30
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\\mov x30, x15
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\\hint 0x07
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\\mov x15, x30
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\\mov x30, x16
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: [ret] "={x15}" (-> usize),
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: [ptr] "{x15}" (ptr),
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: "x16"
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);
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}
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return ptr;
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}
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pub const RegisterContext = struct {
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eh_frame: bool,
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is_macho: bool,
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};
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pub const AbiError = error{
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InvalidRegister,
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UnimplementedArch,
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UnimplementedOs,
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RegisterContextRequired,
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ThreadContextNotSupported,
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};
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fn RegValueReturnType(comptime ContextPtrType: type, comptime T: type) type {
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const reg_bytes_type = comptime RegBytesReturnType(ContextPtrType);
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const info = @typeInfo(reg_bytes_type).Pointer;
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return @Type(.{
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.Pointer = .{
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.size = .One,
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.is_const = info.is_const,
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.is_volatile = info.is_volatile,
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.is_allowzero = info.is_allowzero,
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.alignment = info.alignment,
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.address_space = info.address_space,
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.child = T,
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.sentinel = null,
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},
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});
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}
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/// Returns a pointer to a register stored in a ThreadContext, preserving the pointer attributes of the context.
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pub fn regValueNative(
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comptime T: type,
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thread_context_ptr: anytype,
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reg_number: u8,
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reg_context: ?RegisterContext,
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) !RegValueReturnType(@TypeOf(thread_context_ptr), T) {
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const reg_bytes = try regBytes(thread_context_ptr, reg_number, reg_context);
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if (@sizeOf(T) != reg_bytes.len) return error.IncompatibleRegisterSize;
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return mem.bytesAsValue(T, reg_bytes[0..@sizeOf(T)]);
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}
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fn RegBytesReturnType(comptime ContextPtrType: type) type {
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const info = @typeInfo(ContextPtrType);
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if (info != .Pointer or info.Pointer.child != std.debug.ThreadContext) {
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@compileError("Expected a pointer to std.debug.ThreadContext, got " ++ @typeName(@TypeOf(ContextPtrType)));
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}
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return if (info.Pointer.is_const) return []const u8 else []u8;
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}
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/// Returns a slice containing the backing storage for `reg_number`.
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///
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/// `reg_context` describes in what context the register number is used, as it can have different
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/// meanings depending on the DWARF container. It is only required when getting the stack or
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/// frame pointer register on some architectures.
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pub fn regBytes(
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thread_context_ptr: anytype,
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reg_number: u8,
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reg_context: ?RegisterContext,
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) AbiError!RegBytesReturnType(@TypeOf(thread_context_ptr)) {
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if (builtin.os.tag == .windows) {
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return switch (builtin.cpu.arch) {
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.x86 => switch (reg_number) {
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0 => mem.asBytes(&thread_context_ptr.Eax),
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1 => mem.asBytes(&thread_context_ptr.Ecx),
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2 => mem.asBytes(&thread_context_ptr.Edx),
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3 => mem.asBytes(&thread_context_ptr.Ebx),
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4 => mem.asBytes(&thread_context_ptr.Esp),
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5 => mem.asBytes(&thread_context_ptr.Ebp),
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6 => mem.asBytes(&thread_context_ptr.Esi),
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7 => mem.asBytes(&thread_context_ptr.Edi),
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8 => mem.asBytes(&thread_context_ptr.Eip),
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9 => mem.asBytes(&thread_context_ptr.EFlags),
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10 => mem.asBytes(&thread_context_ptr.SegCs),
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11 => mem.asBytes(&thread_context_ptr.SegSs),
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12 => mem.asBytes(&thread_context_ptr.SegDs),
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13 => mem.asBytes(&thread_context_ptr.SegEs),
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14 => mem.asBytes(&thread_context_ptr.SegFs),
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15 => mem.asBytes(&thread_context_ptr.SegGs),
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else => error.InvalidRegister,
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},
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.x86_64 => switch (reg_number) {
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0 => mem.asBytes(&thread_context_ptr.Rax),
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1 => mem.asBytes(&thread_context_ptr.Rdx),
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2 => mem.asBytes(&thread_context_ptr.Rcx),
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3 => mem.asBytes(&thread_context_ptr.Rbx),
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4 => mem.asBytes(&thread_context_ptr.Rsi),
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5 => mem.asBytes(&thread_context_ptr.Rdi),
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6 => mem.asBytes(&thread_context_ptr.Rbp),
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7 => mem.asBytes(&thread_context_ptr.Rsp),
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8 => mem.asBytes(&thread_context_ptr.R8),
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9 => mem.asBytes(&thread_context_ptr.R9),
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10 => mem.asBytes(&thread_context_ptr.R10),
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11 => mem.asBytes(&thread_context_ptr.R11),
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12 => mem.asBytes(&thread_context_ptr.R12),
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13 => mem.asBytes(&thread_context_ptr.R13),
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14 => mem.asBytes(&thread_context_ptr.R14),
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15 => mem.asBytes(&thread_context_ptr.R15),
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16 => mem.asBytes(&thread_context_ptr.Rip),
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else => error.InvalidRegister,
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},
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.aarch64 => switch (reg_number) {
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0...30 => mem.asBytes(&thread_context_ptr.DUMMYUNIONNAME.X[reg_number]),
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31 => mem.asBytes(&thread_context_ptr.Sp),
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32 => mem.asBytes(&thread_context_ptr.Pc),
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else => error.InvalidRegister,
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},
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else => error.UnimplementedArch,
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};
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}
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if (!std.debug.have_ucontext) return error.ThreadContextNotSupported;
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const ucontext_ptr = thread_context_ptr;
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return switch (builtin.cpu.arch) {
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.x86 => switch (builtin.os.tag) {
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.linux, .netbsd, .solaris => switch (reg_number) {
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0 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EAX]),
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1 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.ECX]),
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2 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EDX]),
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3 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EBX]),
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4...5 => if (reg_context) |r| bytes: {
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if (reg_number == 4) {
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break :bytes if (r.eh_frame and r.is_macho)
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mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EBP])
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else
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mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.ESP]);
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} else {
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break :bytes if (r.eh_frame and r.is_macho)
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mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.ESP])
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else
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mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EBP]);
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}
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} else error.RegisterContextRequired,
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6 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.ESI]),
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7 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EDI]),
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8 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EIP]),
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9 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.EFL]),
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10 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.CS]),
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11 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.SS]),
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12 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.DS]),
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13 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.ES]),
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14 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.FS]),
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15 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.GS]),
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16...23 => error.InvalidRegister, // TODO: Support loading ST0-ST7 from mcontext.fpregs
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32...39 => error.InvalidRegister, // TODO: Support loading XMM0-XMM7 from mcontext.fpregs
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else => error.InvalidRegister,
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},
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else => error.UnimplementedOs,
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},
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.x86_64 => switch (builtin.os.tag) {
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.linux, .solaris => switch (reg_number) {
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0 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RAX]),
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1 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RDX]),
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2 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RCX]),
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3 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RBX]),
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4 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RSI]),
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5 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RDI]),
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6 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RBP]),
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7 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RSP]),
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8 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R8]),
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9 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R9]),
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10 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R10]),
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11 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R11]),
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12 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R12]),
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13 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R13]),
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14 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R14]),
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15 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.R15]),
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16 => mem.asBytes(&ucontext_ptr.mcontext.gregs[os.REG.RIP]),
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17...32 => |i| mem.asBytes(&ucontext_ptr.mcontext.fpregs.xmm[i - 17]),
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else => error.InvalidRegister,
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},
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.freebsd => switch (reg_number) {
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0 => mem.asBytes(&ucontext_ptr.mcontext.rax),
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1 => mem.asBytes(&ucontext_ptr.mcontext.rdx),
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2 => mem.asBytes(&ucontext_ptr.mcontext.rcx),
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3 => mem.asBytes(&ucontext_ptr.mcontext.rbx),
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4 => mem.asBytes(&ucontext_ptr.mcontext.rsi),
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5 => mem.asBytes(&ucontext_ptr.mcontext.rdi),
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6 => mem.asBytes(&ucontext_ptr.mcontext.rbp),
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7 => mem.asBytes(&ucontext_ptr.mcontext.rsp),
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8 => mem.asBytes(&ucontext_ptr.mcontext.r8),
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9 => mem.asBytes(&ucontext_ptr.mcontext.r9),
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10 => mem.asBytes(&ucontext_ptr.mcontext.r10),
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11 => mem.asBytes(&ucontext_ptr.mcontext.r11),
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12 => mem.asBytes(&ucontext_ptr.mcontext.r12),
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13 => mem.asBytes(&ucontext_ptr.mcontext.r13),
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14 => mem.asBytes(&ucontext_ptr.mcontext.r14),
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15 => mem.asBytes(&ucontext_ptr.mcontext.r15),
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16 => mem.asBytes(&ucontext_ptr.mcontext.rip),
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// TODO: Extract xmm state from mcontext.fpstate?
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else => error.InvalidRegister,
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},
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.openbsd => switch (reg_number) {
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0 => mem.asBytes(&ucontext_ptr.sc_rax),
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1 => mem.asBytes(&ucontext_ptr.sc_rdx),
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2 => mem.asBytes(&ucontext_ptr.sc_rcx),
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3 => mem.asBytes(&ucontext_ptr.sc_rbx),
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4 => mem.asBytes(&ucontext_ptr.sc_rsi),
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5 => mem.asBytes(&ucontext_ptr.sc_rdi),
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6 => mem.asBytes(&ucontext_ptr.sc_rbp),
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7 => mem.asBytes(&ucontext_ptr.sc_rsp),
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8 => mem.asBytes(&ucontext_ptr.sc_r8),
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9 => mem.asBytes(&ucontext_ptr.sc_r9),
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10 => mem.asBytes(&ucontext_ptr.sc_r10),
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11 => mem.asBytes(&ucontext_ptr.sc_r11),
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12 => mem.asBytes(&ucontext_ptr.sc_r12),
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13 => mem.asBytes(&ucontext_ptr.sc_r13),
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14 => mem.asBytes(&ucontext_ptr.sc_r14),
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15 => mem.asBytes(&ucontext_ptr.sc_r15),
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16 => mem.asBytes(&ucontext_ptr.sc_rip),
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// TODO: Extract xmm state from sc_fpstate?
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else => error.InvalidRegister,
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},
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.macos, .ios => switch (reg_number) {
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0 => mem.asBytes(&ucontext_ptr.mcontext.ss.rax),
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1 => mem.asBytes(&ucontext_ptr.mcontext.ss.rdx),
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2 => mem.asBytes(&ucontext_ptr.mcontext.ss.rcx),
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3 => mem.asBytes(&ucontext_ptr.mcontext.ss.rbx),
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4 => mem.asBytes(&ucontext_ptr.mcontext.ss.rsi),
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5 => mem.asBytes(&ucontext_ptr.mcontext.ss.rdi),
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6 => mem.asBytes(&ucontext_ptr.mcontext.ss.rbp),
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7 => mem.asBytes(&ucontext_ptr.mcontext.ss.rsp),
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8 => mem.asBytes(&ucontext_ptr.mcontext.ss.r8),
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9 => mem.asBytes(&ucontext_ptr.mcontext.ss.r9),
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10 => mem.asBytes(&ucontext_ptr.mcontext.ss.r10),
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11 => mem.asBytes(&ucontext_ptr.mcontext.ss.r11),
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12 => mem.asBytes(&ucontext_ptr.mcontext.ss.r12),
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13 => mem.asBytes(&ucontext_ptr.mcontext.ss.r13),
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14 => mem.asBytes(&ucontext_ptr.mcontext.ss.r14),
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15 => mem.asBytes(&ucontext_ptr.mcontext.ss.r15),
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16 => mem.asBytes(&ucontext_ptr.mcontext.ss.rip),
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else => error.InvalidRegister,
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},
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else => error.UnimplementedOs,
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},
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.arm => switch (builtin.os.tag) {
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.linux => switch (reg_number) {
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0 => mem.asBytes(&ucontext_ptr.mcontext.arm_r0),
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1 => mem.asBytes(&ucontext_ptr.mcontext.arm_r1),
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2 => mem.asBytes(&ucontext_ptr.mcontext.arm_r2),
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3 => mem.asBytes(&ucontext_ptr.mcontext.arm_r3),
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4 => mem.asBytes(&ucontext_ptr.mcontext.arm_r4),
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5 => mem.asBytes(&ucontext_ptr.mcontext.arm_r5),
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6 => mem.asBytes(&ucontext_ptr.mcontext.arm_r6),
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7 => mem.asBytes(&ucontext_ptr.mcontext.arm_r7),
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8 => mem.asBytes(&ucontext_ptr.mcontext.arm_r8),
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9 => mem.asBytes(&ucontext_ptr.mcontext.arm_r9),
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10 => mem.asBytes(&ucontext_ptr.mcontext.arm_r10),
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11 => mem.asBytes(&ucontext_ptr.mcontext.arm_fp),
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12 => mem.asBytes(&ucontext_ptr.mcontext.arm_ip),
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13 => mem.asBytes(&ucontext_ptr.mcontext.arm_sp),
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14 => mem.asBytes(&ucontext_ptr.mcontext.arm_lr),
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15 => mem.asBytes(&ucontext_ptr.mcontext.arm_pc),
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// CPSR is not allocated a register number (See: https://github.com/ARM-software/abi-aa/blob/main/aadwarf32/aadwarf32.rst, Section 4.1)
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else => error.InvalidRegister,
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},
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else => error.UnimplementedOs,
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},
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.aarch64 => switch (builtin.os.tag) {
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.macos, .ios => switch (reg_number) {
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0...28 => mem.asBytes(&ucontext_ptr.mcontext.ss.regs[reg_number]),
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29 => mem.asBytes(&ucontext_ptr.mcontext.ss.fp),
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30 => mem.asBytes(&ucontext_ptr.mcontext.ss.lr),
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31 => mem.asBytes(&ucontext_ptr.mcontext.ss.sp),
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32 => mem.asBytes(&ucontext_ptr.mcontext.ss.pc),
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// TODO: Find storage for this state
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//34 => mem.asBytes(&ucontext_ptr.ra_sign_state),
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// V0-V31
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64...95 => mem.asBytes(&ucontext_ptr.mcontext.ns.q[reg_number - 64]),
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else => error.InvalidRegister,
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},
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.netbsd => switch (reg_number) {
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0...34 => mem.asBytes(&ucontext_ptr.mcontext.gregs[reg_number]),
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else => error.InvalidRegister,
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},
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.freebsd => switch (reg_number) {
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0...29 => mem.asBytes(&ucontext_ptr.mcontext.gpregs.x[reg_number]),
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30 => mem.asBytes(&ucontext_ptr.mcontext.gpregs.lr),
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31 => mem.asBytes(&ucontext_ptr.mcontext.gpregs.sp),
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// TODO: This seems wrong, but it was in the previous debug.zig code for mapping PC, check this
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32 => mem.asBytes(&ucontext_ptr.mcontext.gpregs.elr),
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else => error.InvalidRegister,
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},
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else => switch (reg_number) {
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0...30 => mem.asBytes(&ucontext_ptr.mcontext.regs[reg_number]),
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31 => mem.asBytes(&ucontext_ptr.mcontext.sp),
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32 => mem.asBytes(&ucontext_ptr.mcontext.pc),
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else => error.InvalidRegister,
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},
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},
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else => error.UnimplementedArch,
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};
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}
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/// Returns the ABI-defined default value this register has in the unwinding table
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/// before running any of the CIE instructions. The DWARF spec defines these as having
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/// the .undefined rule by default, but allows ABI authors to override that.
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pub fn getRegDefaultValue(reg_number: u8, context: *std.dwarf.UnwindContext, out: []u8) !void {
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switch (builtin.cpu.arch) {
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.aarch64 => {
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// Callee-saved registers are initialized as if they had the .same_value rule
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|
if (reg_number >= 19 and reg_number <= 28) {
|
|
const src = try regBytes(context.thread_context, reg_number, context.reg_context);
|
|
if (src.len != out.len) return error.RegisterSizeMismatch;
|
|
@memcpy(out, src);
|
|
return;
|
|
}
|
|
},
|
|
else => {},
|
|
}
|
|
|
|
@memset(out, undefined);
|
|
}
|