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118 lines
3.8 KiB
C++
118 lines
3.8 KiB
C++
//===-- sanitizer_atomic_clang_mips.h ---------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is a part of ThreadSanitizer/AddressSanitizer runtime.
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// Not intended for direct inclusion. Include sanitizer_atomic.h.
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//
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//===----------------------------------------------------------------------===//
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#ifndef SANITIZER_ATOMIC_CLANG_MIPS_H
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#define SANITIZER_ATOMIC_CLANG_MIPS_H
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namespace __sanitizer {
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// MIPS32 does not support atomics > 4 bytes. To address this lack of
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// functionality, the sanitizer library provides helper methods which use an
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// internal spin lock mechanism to emulate atomic oprations when the size is
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// 8 bytes.
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static void __spin_lock(volatile int *lock) {
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while (__sync_lock_test_and_set(lock, 1))
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while (*lock) {
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}
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}
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static void __spin_unlock(volatile int *lock) { __sync_lock_release(lock); }
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// Make sure the lock is on its own cache line to prevent false sharing.
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// Put it inside a struct that is aligned and padded to the typical MIPS
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// cacheline which is 32 bytes.
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static struct {
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int lock;
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char pad[32 - sizeof(int)];
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} __attribute__((aligned(32))) lock = {0, {0}};
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template <>
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INLINE atomic_uint64_t::Type atomic_fetch_add(volatile atomic_uint64_t *ptr,
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atomic_uint64_t::Type val,
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memory_order mo) {
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DCHECK(mo &
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(memory_order_relaxed | memory_order_releasae | memory_order_seq_cst));
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DCHECK(!((uptr)ptr % sizeof(*ptr)));
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atomic_uint64_t::Type ret;
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__spin_lock(&lock.lock);
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ret = *(const_cast<atomic_uint64_t::Type volatile *>(&ptr->val_dont_use));
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ptr->val_dont_use = ret + val;
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__spin_unlock(&lock.lock);
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return ret;
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}
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template <>
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INLINE atomic_uint64_t::Type atomic_fetch_sub(volatile atomic_uint64_t *ptr,
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atomic_uint64_t::Type val,
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memory_order mo) {
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return atomic_fetch_add(ptr, -val, mo);
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}
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template <>
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INLINE bool atomic_compare_exchange_strong(volatile atomic_uint64_t *ptr,
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atomic_uint64_t::Type *cmp,
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atomic_uint64_t::Type xchg,
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memory_order mo) {
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DCHECK(mo &
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(memory_order_relaxed | memory_order_releasae | memory_order_seq_cst));
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DCHECK(!((uptr)ptr % sizeof(*ptr)));
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typedef atomic_uint64_t::Type Type;
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Type cmpv = *cmp;
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Type prev;
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bool ret = false;
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__spin_lock(&lock.lock);
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prev = *(const_cast<Type volatile *>(&ptr->val_dont_use));
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if (prev == cmpv) {
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ret = true;
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ptr->val_dont_use = xchg;
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}
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__spin_unlock(&lock.lock);
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return ret;
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}
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template <>
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INLINE atomic_uint64_t::Type atomic_load(const volatile atomic_uint64_t *ptr,
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memory_order mo) {
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DCHECK(mo &
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(memory_order_relaxed | memory_order_releasae | memory_order_seq_cst));
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DCHECK(!((uptr)ptr % sizeof(*ptr)));
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atomic_uint64_t::Type zero = 0;
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volatile atomic_uint64_t *Newptr =
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const_cast<volatile atomic_uint64_t *>(ptr);
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return atomic_fetch_add(Newptr, zero, mo);
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}
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template <>
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INLINE void atomic_store(volatile atomic_uint64_t *ptr, atomic_uint64_t::Type v,
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memory_order mo) {
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DCHECK(mo &
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(memory_order_relaxed | memory_order_releasae | memory_order_seq_cst));
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DCHECK(!((uptr)ptr % sizeof(*ptr)));
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__spin_lock(&lock.lock);
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ptr->val_dont_use = v;
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__spin_unlock(&lock.lock);
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}
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} // namespace __sanitizer
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#endif // SANITIZER_ATOMIC_CLANG_MIPS_H
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