mirror of
https://github.com/ziglang/zig.git
synced 2024-11-27 23:52:31 +00:00
50339f595a
Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
967 lines
30 KiB
Zig
967 lines
30 KiB
Zig
//! This file is auto-generated by tools/update_cpu_features.zig.
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const std = @import("../std.zig");
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const CpuFeature = std.Target.Cpu.Feature;
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const CpuModel = std.Target.Cpu.Model;
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pub const Feature = enum {
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@"32bit",
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@"64bit",
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a,
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c,
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d,
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e,
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experimental_zawrs,
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experimental_zca,
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experimental_zcd,
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experimental_zcf,
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experimental_zihintntl,
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experimental_ztso,
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experimental_zvfh,
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f,
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forced_atomics,
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h,
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lui_addi_fusion,
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m,
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no_default_unroll,
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no_optimized_zero_stride_load,
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no_rvc_hints,
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relax,
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reserve_x1,
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reserve_x10,
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reserve_x11,
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reserve_x12,
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reserve_x13,
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reserve_x14,
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reserve_x15,
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reserve_x16,
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reserve_x17,
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reserve_x18,
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reserve_x19,
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reserve_x2,
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reserve_x20,
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reserve_x21,
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reserve_x22,
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reserve_x23,
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reserve_x24,
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reserve_x25,
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reserve_x26,
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reserve_x27,
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reserve_x28,
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reserve_x29,
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reserve_x3,
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reserve_x30,
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reserve_x31,
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reserve_x4,
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reserve_x5,
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reserve_x6,
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reserve_x7,
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reserve_x8,
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reserve_x9,
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save_restore,
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short_forward_branch_opt,
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svinval,
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svnapot,
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svpbmt,
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tagged_globals,
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unaligned_scalar_mem,
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v,
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xtheadvdot,
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xventanacondops,
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zba,
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zbb,
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zbc,
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zbkb,
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zbkc,
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zbkx,
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zbs,
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zdinx,
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zfh,
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zfhmin,
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zfinx,
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zhinx,
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zhinxmin,
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zicbom,
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zicbop,
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zicboz,
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zihintpause,
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zk,
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zkn,
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zknd,
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zkne,
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zknh,
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zkr,
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zks,
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zksed,
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zksh,
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zkt,
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zmmul,
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zve32f,
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zve32x,
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zve64d,
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zve64f,
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zve64x,
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zvl1024b,
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zvl128b,
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zvl16384b,
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zvl2048b,
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zvl256b,
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zvl32768b,
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zvl32b,
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zvl4096b,
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zvl512b,
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zvl64b,
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zvl65536b,
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zvl8192b,
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};
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pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
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pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
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pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
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pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
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pub const all_features = blk: {
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const len = @typeInfo(Feature).Enum.fields.len;
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std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
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var result: [len]CpuFeature = undefined;
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result[@intFromEnum(Feature.@"32bit")] = .{
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.llvm_name = "32bit",
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.description = "Implements RV32",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.@"64bit")] = .{
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.llvm_name = "64bit",
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.description = "Implements RV64",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.a)] = .{
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.llvm_name = "a",
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.description = "'A' (Atomic Instructions)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.c)] = .{
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.llvm_name = "c",
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.description = "'C' (Compressed Instructions)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.d)] = .{
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.llvm_name = "d",
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.description = "'D' (Double-Precision Floating-Point)",
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.dependencies = featureSet(&[_]Feature{
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.f,
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}),
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};
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result[@intFromEnum(Feature.e)] = .{
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.llvm_name = "e",
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.description = "Implements RV32E (provides 16 rather than 32 GPRs)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.experimental_zawrs)] = .{
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.llvm_name = "experimental-zawrs",
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.description = "'Zawrs' (Wait on Reservation Set)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.experimental_zca)] = .{
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.llvm_name = "experimental-zca",
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.description = "'Zca' (part of the C extension, excluding compressed floating point loads/stores)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.experimental_zcd)] = .{
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.llvm_name = "experimental-zcd",
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.description = "'Zcd' (Compressed Double-Precision Floating-Point Instructions)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.experimental_zcf)] = .{
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.llvm_name = "experimental-zcf",
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.description = "'Zcf' (Compressed Single-Precision Floating-Point Instructions)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.experimental_zihintntl)] = .{
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.llvm_name = "experimental-zihintntl",
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.description = "'zihintntl' (Non-Temporal Locality Hints)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.experimental_ztso)] = .{
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.llvm_name = "experimental-ztso",
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.description = "'Ztso' (Memory Model - Total Store Order)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.experimental_zvfh)] = .{
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.llvm_name = "experimental-zvfh",
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.description = "'Zvfh' (Vector Half-Precision Floating-Point)",
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.dependencies = featureSet(&[_]Feature{
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.zve32f,
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}),
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};
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result[@intFromEnum(Feature.f)] = .{
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.llvm_name = "f",
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.description = "'F' (Single-Precision Floating-Point)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.forced_atomics)] = .{
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.llvm_name = "forced-atomics",
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.description = "Assume that lock-free native-width atomics are available",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.h)] = .{
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.llvm_name = "h",
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.description = "'H' (Hypervisor)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.lui_addi_fusion)] = .{
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.llvm_name = "lui-addi-fusion",
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.description = "Enable LUI+ADDI macrofusion",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.m)] = .{
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.llvm_name = "m",
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.description = "'M' (Integer Multiplication and Division)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.no_default_unroll)] = .{
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.llvm_name = "no-default-unroll",
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.description = "Disable default unroll preference.",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.no_optimized_zero_stride_load)] = .{
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.llvm_name = "no-optimized-zero-stride-load",
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.description = "Hasn't optimized (perform fewer memory operations)zero-stride vector load",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.no_rvc_hints)] = .{
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.llvm_name = "no-rvc-hints",
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.description = "Disable RVC Hint Instructions.",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.relax)] = .{
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.llvm_name = "relax",
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.description = "Enable Linker relaxation.",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x1)] = .{
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.llvm_name = "reserve-x1",
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.description = "Reserve X1",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x10)] = .{
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.llvm_name = "reserve-x10",
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.description = "Reserve X10",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x11)] = .{
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.llvm_name = "reserve-x11",
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.description = "Reserve X11",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x12)] = .{
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.llvm_name = "reserve-x12",
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.description = "Reserve X12",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x13)] = .{
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.llvm_name = "reserve-x13",
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.description = "Reserve X13",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x14)] = .{
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.llvm_name = "reserve-x14",
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.description = "Reserve X14",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x15)] = .{
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.llvm_name = "reserve-x15",
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.description = "Reserve X15",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x16)] = .{
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.llvm_name = "reserve-x16",
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.description = "Reserve X16",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x17)] = .{
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.llvm_name = "reserve-x17",
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.description = "Reserve X17",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x18)] = .{
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.llvm_name = "reserve-x18",
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.description = "Reserve X18",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x19)] = .{
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.llvm_name = "reserve-x19",
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.description = "Reserve X19",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x2)] = .{
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.llvm_name = "reserve-x2",
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.description = "Reserve X2",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x20)] = .{
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.llvm_name = "reserve-x20",
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.description = "Reserve X20",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x21)] = .{
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.llvm_name = "reserve-x21",
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.description = "Reserve X21",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x22)] = .{
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.llvm_name = "reserve-x22",
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.description = "Reserve X22",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x23)] = .{
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.llvm_name = "reserve-x23",
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.description = "Reserve X23",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x24)] = .{
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.llvm_name = "reserve-x24",
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.description = "Reserve X24",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x25)] = .{
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.llvm_name = "reserve-x25",
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.description = "Reserve X25",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x26)] = .{
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.llvm_name = "reserve-x26",
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.description = "Reserve X26",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x27)] = .{
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.llvm_name = "reserve-x27",
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.description = "Reserve X27",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x28)] = .{
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.llvm_name = "reserve-x28",
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.description = "Reserve X28",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x29)] = .{
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.llvm_name = "reserve-x29",
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.description = "Reserve X29",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x3)] = .{
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.llvm_name = "reserve-x3",
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.description = "Reserve X3",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x30)] = .{
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.llvm_name = "reserve-x30",
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.description = "Reserve X30",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x31)] = .{
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.llvm_name = "reserve-x31",
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.description = "Reserve X31",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x4)] = .{
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.llvm_name = "reserve-x4",
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.description = "Reserve X4",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x5)] = .{
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.llvm_name = "reserve-x5",
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.description = "Reserve X5",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x6)] = .{
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.llvm_name = "reserve-x6",
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.description = "Reserve X6",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x7)] = .{
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.llvm_name = "reserve-x7",
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.description = "Reserve X7",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x8)] = .{
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.llvm_name = "reserve-x8",
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.description = "Reserve X8",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.reserve_x9)] = .{
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.llvm_name = "reserve-x9",
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.description = "Reserve X9",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.save_restore)] = .{
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.llvm_name = "save-restore",
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.description = "Enable save/restore.",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.short_forward_branch_opt)] = .{
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.llvm_name = "short-forward-branch-opt",
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.description = "Enable short forward branch optimization",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.svinval)] = .{
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.llvm_name = "svinval",
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.description = "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.svnapot)] = .{
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.llvm_name = "svnapot",
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.description = "'Svnapot' (NAPOT Translation Contiguity)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.svpbmt)] = .{
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.llvm_name = "svpbmt",
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.description = "'Svpbmt' (Page-Based Memory Types)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.tagged_globals)] = .{
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.llvm_name = "tagged-globals",
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.description = "Use an instruction sequence for taking the address of a global that allows a memory tag in the upper address bits",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.unaligned_scalar_mem)] = .{
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.llvm_name = "unaligned-scalar-mem",
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.description = "Has reasonably performant unaligned scalar loads and stores",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.v)] = .{
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.llvm_name = "v",
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.description = "'V' (Vector Extension for Application Processors)",
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.dependencies = featureSet(&[_]Feature{
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.d,
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.zve64d,
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.zvl128b,
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}),
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};
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result[@intFromEnum(Feature.xtheadvdot)] = .{
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.llvm_name = "xtheadvdot",
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.description = "'xtheadvdot' (T-Head Vector Extensions for Dot)",
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.dependencies = featureSet(&[_]Feature{
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.v,
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}),
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};
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result[@intFromEnum(Feature.xventanacondops)] = .{
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.llvm_name = "xventanacondops",
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.description = "'XVentanaCondOps' (Ventana Conditional Ops)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.zba)] = .{
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.llvm_name = "zba",
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.description = "'Zba' (Address Generation Instructions)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.zbb)] = .{
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.llvm_name = "zbb",
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.description = "'Zbb' (Basic Bit-Manipulation)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.zbc)] = .{
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.llvm_name = "zbc",
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.description = "'Zbc' (Carry-Less Multiplication)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.zbkb)] = .{
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.llvm_name = "zbkb",
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.description = "'Zbkb' (Bitmanip instructions for Cryptography)",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.zbkc)] = .{
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.llvm_name = "zbkc",
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.description = "'Zbkc' (Carry-less multiply instructions for Cryptography)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zbkx)] = .{
|
|
.llvm_name = "zbkx",
|
|
.description = "'Zbkx' (Crossbar permutation instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zbs)] = .{
|
|
.llvm_name = "zbs",
|
|
.description = "'Zbs' (Single-Bit Instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zdinx)] = .{
|
|
.llvm_name = "zdinx",
|
|
.description = "'Zdinx' (Double in Integer)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zfinx,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zfh)] = .{
|
|
.llvm_name = "zfh",
|
|
.description = "'Zfh' (Half-Precision Floating-Point)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.f,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zfhmin)] = .{
|
|
.llvm_name = "zfhmin",
|
|
.description = "'Zfhmin' (Half-Precision Floating-Point Minimal)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.f,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zfinx)] = .{
|
|
.llvm_name = "zfinx",
|
|
.description = "'Zfinx' (Float in Integer)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zhinx)] = .{
|
|
.llvm_name = "zhinx",
|
|
.description = "'Zhinx' (Half Float in Integer)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zfinx,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zhinxmin)] = .{
|
|
.llvm_name = "zhinxmin",
|
|
.description = "'Zhinxmin' (Half Float in Integer Minimal)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zfinx,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zicbom)] = .{
|
|
.llvm_name = "zicbom",
|
|
.description = "'Zicbom' (Cache-Block Management Instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zicbop)] = .{
|
|
.llvm_name = "zicbop",
|
|
.description = "'Zicbop' (Cache-Block Prefetch Instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zicboz)] = .{
|
|
.llvm_name = "zicboz",
|
|
.description = "'Zicboz' (Cache-Block Zero Instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zihintpause)] = .{
|
|
.llvm_name = "zihintpause",
|
|
.description = "'zihintpause' (Pause Hint)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zk)] = .{
|
|
.llvm_name = "zk",
|
|
.description = "'Zk' (Standard scalar cryptography extension)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zkn,
|
|
.zkr,
|
|
.zkt,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zkn)] = .{
|
|
.llvm_name = "zkn",
|
|
.description = "'Zkn' (NIST Algorithm Suite)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zbkb,
|
|
.zbkc,
|
|
.zbkx,
|
|
.zknd,
|
|
.zkne,
|
|
.zknh,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zknd)] = .{
|
|
.llvm_name = "zknd",
|
|
.description = "'Zknd' (NIST Suite: AES Decryption)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zkne)] = .{
|
|
.llvm_name = "zkne",
|
|
.description = "'Zkne' (NIST Suite: AES Encryption)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zknh)] = .{
|
|
.llvm_name = "zknh",
|
|
.description = "'Zknh' (NIST Suite: Hash Function Instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zkr)] = .{
|
|
.llvm_name = "zkr",
|
|
.description = "'Zkr' (Entropy Source Extension)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zks)] = .{
|
|
.llvm_name = "zks",
|
|
.description = "'Zks' (ShangMi Algorithm Suite)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zbkb,
|
|
.zbkc,
|
|
.zbkx,
|
|
.zksed,
|
|
.zksh,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zksed)] = .{
|
|
.llvm_name = "zksed",
|
|
.description = "'Zksed' (ShangMi Suite: SM4 Block Cipher Instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zksh)] = .{
|
|
.llvm_name = "zksh",
|
|
.description = "'Zksh' (ShangMi Suite: SM3 Hash Function Instructions)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zkt)] = .{
|
|
.llvm_name = "zkt",
|
|
.description = "'Zkt' (Data Independent Execution Latency)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zmmul)] = .{
|
|
.llvm_name = "zmmul",
|
|
.description = "'Zmmul' (Integer Multiplication)",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zve32f)] = .{
|
|
.llvm_name = "zve32f",
|
|
.description = "'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zve32x,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zve32x)] = .{
|
|
.llvm_name = "zve32x",
|
|
.description = "'Zve32x' (Vector Extensions for Embedded Processors with maximal 32 EEW)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl32b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zve64d)] = .{
|
|
.llvm_name = "zve64d",
|
|
.description = "'Zve64d' (Vector Extensions for Embedded Processors with maximal 64 EEW, F and D extension)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zve64f,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zve64f)] = .{
|
|
.llvm_name = "zve64f",
|
|
.description = "'Zve64f' (Vector Extensions for Embedded Processors with maximal 64 EEW and F extension)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zve32f,
|
|
.zve64x,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zve64x)] = .{
|
|
.llvm_name = "zve64x",
|
|
.description = "'Zve64x' (Vector Extensions for Embedded Processors with maximal 64 EEW)",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zve32x,
|
|
.zvl64b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl1024b)] = .{
|
|
.llvm_name = "zvl1024b",
|
|
.description = "'Zvl' (Minimum Vector Length) 1024",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl512b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl128b)] = .{
|
|
.llvm_name = "zvl128b",
|
|
.description = "'Zvl' (Minimum Vector Length) 128",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl64b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl16384b)] = .{
|
|
.llvm_name = "zvl16384b",
|
|
.description = "'Zvl' (Minimum Vector Length) 16384",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl8192b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl2048b)] = .{
|
|
.llvm_name = "zvl2048b",
|
|
.description = "'Zvl' (Minimum Vector Length) 2048",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl1024b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl256b)] = .{
|
|
.llvm_name = "zvl256b",
|
|
.description = "'Zvl' (Minimum Vector Length) 256",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl128b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl32768b)] = .{
|
|
.llvm_name = "zvl32768b",
|
|
.description = "'Zvl' (Minimum Vector Length) 32768",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl16384b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl32b)] = .{
|
|
.llvm_name = "zvl32b",
|
|
.description = "'Zvl' (Minimum Vector Length) 32",
|
|
.dependencies = featureSet(&[_]Feature{}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl4096b)] = .{
|
|
.llvm_name = "zvl4096b",
|
|
.description = "'Zvl' (Minimum Vector Length) 4096",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl2048b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl512b)] = .{
|
|
.llvm_name = "zvl512b",
|
|
.description = "'Zvl' (Minimum Vector Length) 512",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl256b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl64b)] = .{
|
|
.llvm_name = "zvl64b",
|
|
.description = "'Zvl' (Minimum Vector Length) 64",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl32b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl65536b)] = .{
|
|
.llvm_name = "zvl65536b",
|
|
.description = "'Zvl' (Minimum Vector Length) 65536",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl32768b,
|
|
}),
|
|
};
|
|
result[@intFromEnum(Feature.zvl8192b)] = .{
|
|
.llvm_name = "zvl8192b",
|
|
.description = "'Zvl' (Minimum Vector Length) 8192",
|
|
.dependencies = featureSet(&[_]Feature{
|
|
.zvl4096b,
|
|
}),
|
|
};
|
|
const ti = @typeInfo(Feature);
|
|
for (&result, 0..) |*elem, i| {
|
|
elem.index = i;
|
|
elem.name = ti.Enum.fields[i].name;
|
|
}
|
|
break :blk result;
|
|
};
|
|
|
|
pub const cpu = struct {
|
|
pub const baseline_rv32 = CpuModel{
|
|
.name = "baseline_rv32",
|
|
.llvm_name = null,
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.a,
|
|
.c,
|
|
.d,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const baseline_rv64 = CpuModel{
|
|
.name = "baseline_rv64",
|
|
.llvm_name = null,
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
.a,
|
|
.c,
|
|
.d,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const generic = CpuModel{
|
|
.name = "generic",
|
|
.llvm_name = "generic",
|
|
.features = featureSet(&[_]Feature{}),
|
|
};
|
|
pub const generic_rv32 = CpuModel{
|
|
.name = "generic_rv32",
|
|
.llvm_name = "generic-rv32",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
}),
|
|
};
|
|
pub const generic_rv64 = CpuModel{
|
|
.name = "generic_rv64",
|
|
.llvm_name = "generic-rv64",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
}),
|
|
};
|
|
pub const rocket = CpuModel{
|
|
.name = "rocket",
|
|
.llvm_name = "rocket",
|
|
.features = featureSet(&[_]Feature{}),
|
|
};
|
|
pub const rocket_rv32 = CpuModel{
|
|
.name = "rocket_rv32",
|
|
.llvm_name = "rocket-rv32",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
}),
|
|
};
|
|
pub const rocket_rv64 = CpuModel{
|
|
.name = "rocket_rv64",
|
|
.llvm_name = "rocket-rv64",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
}),
|
|
};
|
|
pub const sifive_7_series = CpuModel{
|
|
.name = "sifive_7_series",
|
|
.llvm_name = "sifive-7-series",
|
|
.features = featureSet(&[_]Feature{
|
|
.no_default_unroll,
|
|
.short_forward_branch_opt,
|
|
}),
|
|
};
|
|
pub const sifive_e20 = CpuModel{
|
|
.name = "sifive_e20",
|
|
.llvm_name = "sifive-e20",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.c,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_e21 = CpuModel{
|
|
.name = "sifive_e21",
|
|
.llvm_name = "sifive-e21",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.a,
|
|
.c,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_e24 = CpuModel{
|
|
.name = "sifive_e24",
|
|
.llvm_name = "sifive-e24",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.a,
|
|
.c,
|
|
.f,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_e31 = CpuModel{
|
|
.name = "sifive_e31",
|
|
.llvm_name = "sifive-e31",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.a,
|
|
.c,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_e34 = CpuModel{
|
|
.name = "sifive_e34",
|
|
.llvm_name = "sifive-e34",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.a,
|
|
.c,
|
|
.f,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_e76 = CpuModel{
|
|
.name = "sifive_e76",
|
|
.llvm_name = "sifive-e76",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.a,
|
|
.c,
|
|
.f,
|
|
.m,
|
|
.no_default_unroll,
|
|
.short_forward_branch_opt,
|
|
}),
|
|
};
|
|
pub const sifive_s21 = CpuModel{
|
|
.name = "sifive_s21",
|
|
.llvm_name = "sifive-s21",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
.a,
|
|
.c,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_s51 = CpuModel{
|
|
.name = "sifive_s51",
|
|
.llvm_name = "sifive-s51",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
.a,
|
|
.c,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_s54 = CpuModel{
|
|
.name = "sifive_s54",
|
|
.llvm_name = "sifive-s54",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
.a,
|
|
.c,
|
|
.d,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_s76 = CpuModel{
|
|
.name = "sifive_s76",
|
|
.llvm_name = "sifive-s76",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
.a,
|
|
.c,
|
|
.d,
|
|
.m,
|
|
.no_default_unroll,
|
|
.short_forward_branch_opt,
|
|
}),
|
|
};
|
|
pub const sifive_u54 = CpuModel{
|
|
.name = "sifive_u54",
|
|
.llvm_name = "sifive-u54",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
.a,
|
|
.c,
|
|
.d,
|
|
.m,
|
|
}),
|
|
};
|
|
pub const sifive_u74 = CpuModel{
|
|
.name = "sifive_u74",
|
|
.llvm_name = "sifive-u74",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"64bit",
|
|
.a,
|
|
.c,
|
|
.d,
|
|
.m,
|
|
.no_default_unroll,
|
|
.short_forward_branch_opt,
|
|
}),
|
|
};
|
|
pub const syntacore_scr1_base = CpuModel{
|
|
.name = "syntacore_scr1_base",
|
|
.llvm_name = "syntacore-scr1-base",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.c,
|
|
.no_default_unroll,
|
|
}),
|
|
};
|
|
pub const syntacore_scr1_max = CpuModel{
|
|
.name = "syntacore_scr1_max",
|
|
.llvm_name = "syntacore-scr1-max",
|
|
.features = featureSet(&[_]Feature{
|
|
.@"32bit",
|
|
.c,
|
|
.m,
|
|
.no_default_unroll,
|
|
}),
|
|
};
|
|
};
|