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74872263cc
upstream revision: 3cce3790072249cbe51b96cea26bc78019c11fd0
291 lines
10 KiB
C
Vendored
291 lines
10 KiB
C
Vendored
/*===---- pmmintrin.h - SSE3 intrinsics ------------------------------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __PMMINTRIN_H
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#define __PMMINTRIN_H
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#include <emmintrin.h>
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS \
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__attribute__((__always_inline__, __nodebug__, __target__("sse3"), __min_vector_width__(128)))
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/// Loads data from an unaligned memory location to elements in a 128-bit
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/// vector.
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///
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/// If the address of the data is not 16-byte aligned, the instruction may
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/// read two adjacent aligned blocks of memory to retrieve the requested
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/// data.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VLDDQU </c> instruction.
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///
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/// \param __p
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/// A pointer to a 128-bit integer vector containing integer values.
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/// \returns A 128-bit vector containing the moved values.
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static __inline__ __m128i __DEFAULT_FN_ATTRS
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_mm_lddqu_si128(__m128i const *__p)
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{
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return (__m128i)__builtin_ia32_lddqu((char const *)__p);
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}
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/// Adds the even-indexed values and subtracts the odd-indexed values of
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/// two 128-bit vectors of [4 x float].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VADDSUBPS </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [4 x float] containing the left source operand.
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/// \param __b
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/// A 128-bit vector of [4 x float] containing the right source operand.
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/// \returns A 128-bit vector of [4 x float] containing the alternating sums and
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/// differences of both operands.
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_addsub_ps(__m128 __a, __m128 __b)
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{
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return __builtin_ia32_addsubps((__v4sf)__a, (__v4sf)__b);
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}
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/// Horizontally adds the adjacent pairs of values contained in two
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/// 128-bit vectors of [4 x float].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VHADDPS </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [4 x float] containing one of the source operands.
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/// The horizontal sums of the values are stored in the lower bits of the
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/// destination.
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/// \param __b
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/// A 128-bit vector of [4 x float] containing one of the source operands.
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/// The horizontal sums of the values are stored in the upper bits of the
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/// destination.
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/// \returns A 128-bit vector of [4 x float] containing the horizontal sums of
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/// both operands.
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_hadd_ps(__m128 __a, __m128 __b)
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{
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return __builtin_ia32_haddps((__v4sf)__a, (__v4sf)__b);
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}
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/// Horizontally subtracts the adjacent pairs of values contained in two
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/// 128-bit vectors of [4 x float].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VHSUBPS </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [4 x float] containing one of the source operands.
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/// The horizontal differences between the values are stored in the lower
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/// bits of the destination.
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/// \param __b
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/// A 128-bit vector of [4 x float] containing one of the source operands.
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/// The horizontal differences between the values are stored in the upper
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/// bits of the destination.
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/// \returns A 128-bit vector of [4 x float] containing the horizontal
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/// differences of both operands.
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_hsub_ps(__m128 __a, __m128 __b)
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{
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return __builtin_ia32_hsubps((__v4sf)__a, (__v4sf)__b);
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}
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/// Moves and duplicates odd-indexed values from a 128-bit vector
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/// of [4 x float] to float values stored in a 128-bit vector of
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/// [4 x float].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VMOVSHDUP </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [4 x float]. \n
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/// Bits [127:96] of the source are written to bits [127:96] and [95:64] of
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/// the destination. \n
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/// Bits [63:32] of the source are written to bits [63:32] and [31:0] of the
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/// destination.
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/// \returns A 128-bit vector of [4 x float] containing the moved and duplicated
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/// values.
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_movehdup_ps(__m128 __a)
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{
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return __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 1, 1, 3, 3);
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}
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/// Duplicates even-indexed values from a 128-bit vector of
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/// [4 x float] to float values stored in a 128-bit vector of [4 x float].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VMOVSLDUP </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [4 x float] \n
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/// Bits [95:64] of the source are written to bits [127:96] and [95:64] of
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/// the destination. \n
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/// Bits [31:0] of the source are written to bits [63:32] and [31:0] of the
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/// destination.
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/// \returns A 128-bit vector of [4 x float] containing the moved and duplicated
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/// values.
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static __inline__ __m128 __DEFAULT_FN_ATTRS
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_mm_moveldup_ps(__m128 __a)
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{
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return __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 0, 2, 2);
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}
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/// Adds the even-indexed values and subtracts the odd-indexed values of
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/// two 128-bit vectors of [2 x double].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VADDSUBPD </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing the left source operand.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing the right source operand.
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/// \returns A 128-bit vector of [2 x double] containing the alternating sums
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/// and differences of both operands.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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_mm_addsub_pd(__m128d __a, __m128d __b)
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{
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return __builtin_ia32_addsubpd((__v2df)__a, (__v2df)__b);
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}
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/// Horizontally adds the pairs of values contained in two 128-bit
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/// vectors of [2 x double].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VHADDPD </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// The horizontal sum of the values is stored in the lower bits of the
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/// destination.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// The horizontal sum of the values is stored in the upper bits of the
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/// destination.
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/// \returns A 128-bit vector of [2 x double] containing the horizontal sums of
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/// both operands.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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_mm_hadd_pd(__m128d __a, __m128d __b)
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{
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return __builtin_ia32_haddpd((__v2df)__a, (__v2df)__b);
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}
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/// Horizontally subtracts the pairs of values contained in two 128-bit
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/// vectors of [2 x double].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VHSUBPD </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// The horizontal difference of the values is stored in the lower bits of
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/// the destination.
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/// \param __b
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/// A 128-bit vector of [2 x double] containing one of the source operands.
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/// The horizontal difference of the values is stored in the upper bits of
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/// the destination.
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/// \returns A 128-bit vector of [2 x double] containing the horizontal
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/// differences of both operands.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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_mm_hsub_pd(__m128d __a, __m128d __b)
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{
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return __builtin_ia32_hsubpd((__v2df)__a, (__v2df)__b);
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}
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/// Moves and duplicates one double-precision value to double-precision
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/// values stored in a 128-bit vector of [2 x double].
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///
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/// \headerfile <x86intrin.h>
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///
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/// \code
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/// __m128d _mm_loaddup_pd(double const *dp);
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/// \endcode
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///
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/// This intrinsic corresponds to the <c> VMOVDDUP </c> instruction.
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///
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/// \param dp
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/// A pointer to a double-precision value to be moved and duplicated.
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/// \returns A 128-bit vector of [2 x double] containing the moved and
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/// duplicated values.
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#define _mm_loaddup_pd(dp) _mm_load1_pd(dp)
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/// Moves and duplicates the double-precision value in the lower bits of
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/// a 128-bit vector of [2 x double] to double-precision values stored in a
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/// 128-bit vector of [2 x double].
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> VMOVDDUP </c> instruction.
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///
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/// \param __a
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/// A 128-bit vector of [2 x double]. Bits [63:0] are written to bits
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/// [127:64] and [63:0] of the destination.
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/// \returns A 128-bit vector of [2 x double] containing the moved and
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/// duplicated values.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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_mm_movedup_pd(__m128d __a)
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{
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return __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
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}
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/// Establishes a linear address memory range to be monitored and puts
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/// the processor in the monitor event pending state. Data stored in the
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/// monitored address range causes the processor to exit the pending state.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> MONITOR </c> instruction.
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///
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/// \param __p
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/// The memory range to be monitored. The size of the range is determined by
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/// CPUID function 0000_0005h.
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/// \param __extensions
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/// Optional extensions for the monitoring state.
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/// \param __hints
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/// Optional hints for the monitoring state.
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static __inline__ void __DEFAULT_FN_ATTRS
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_mm_monitor(void const *__p, unsigned __extensions, unsigned __hints)
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{
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__builtin_ia32_monitor(__p, __extensions, __hints);
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}
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/// Used with the MONITOR instruction to wait while the processor is in
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/// the monitor event pending state. Data stored in the monitored address
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/// range causes the processor to exit the pending state.
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///
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/// \headerfile <x86intrin.h>
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///
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/// This intrinsic corresponds to the <c> MWAIT </c> instruction.
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///
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/// \param __extensions
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/// Optional extensions for the monitoring state, which may vary by
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/// processor.
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/// \param __hints
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/// Optional hints for the monitoring state, which may vary by processor.
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static __inline__ void __DEFAULT_FN_ATTRS
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_mm_mwait(unsigned __extensions, unsigned __hints)
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{
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__builtin_ia32_mwait(__extensions, __hints);
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}
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#undef __DEFAULT_FN_ATTRS
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#endif /* __PMMINTRIN_H */
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