mirror of
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305 lines
13 KiB
C
Vendored
305 lines
13 KiB
C
Vendored
/*===------------- avx512vlvnniintrin.h - VNNI intrinsics ------------------===
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*
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avx512vlvnniintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __AVX512VLVNNIINTRIN_H
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#define __AVX512VLVNNIINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512vnni"), __min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512vnni"), __min_vector_width__(256)))
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
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/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a S, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 7
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/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3]))
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/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endoperation
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#define _mm256_dpbusd_epi32(S, A, B) \
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(__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v8si)(A), (__v8si)(B))
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
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/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a S using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 7
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/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3]))
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/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endoperation
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#define _mm256_dpbusds_epi32(S, A, B) \
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(__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v8si)(A), (__v8si)(B))
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
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/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a S,
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/// and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 7
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/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
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/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
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/// DST.dword[j] := S.dword[j] + tmp1 + tmp2
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endoperation
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#define _mm256_dpwssd_epi32(S, A, B) \
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(__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v8si)(A), (__v8si)(B))
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
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/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a S
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/// using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 7
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/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
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/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
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/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2)
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endoperation
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#define _mm256_dpwssds_epi32(S, A, B) \
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(__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v8si)(A), (__v8si)(B))
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
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/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a S, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 3
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/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3]))
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/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endoperation
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#define _mm_dpbusd_epi32(S, A, B) \
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(__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v4si)(A), (__v4si)(B))
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a A with
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/// corresponding signed 8-bit integers in \a B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a S using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 3
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/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(A.byte[4*j+2]) * SignExtend16(B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(A.byte[4*j+3]) * SignExtend16(B.byte[4*j+3]))
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/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endoperation
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#define _mm_dpbusds_epi32(S, A, B) \
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(__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v4si)(A), (__v4si)(B))
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
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/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a S,
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/// and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 3
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/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
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/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
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/// DST.dword[j] := S.dword[j] + tmp1 + tmp2
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endoperation
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#define _mm_dpwssd_epi32(S, A, B) \
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(__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v4si)(A), (__v4si)(B))
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a A with
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/// corresponding 16-bit integers in \a B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a S
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/// using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
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///
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/// \operation
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/// FOR j := 0 to 3
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/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
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/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
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/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2)
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endoperation
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#define _mm_dpwssds_epi32(S, A, B) \
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(__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v4si)(A), (__v4si)(B))
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_mask_dpbusd_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpbusd_epi32(__S, __A, __B),
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(__v8si)__S);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_maskz_dpbusd_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpbusd_epi32(__S, __A, __B),
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(__v8si)_mm256_setzero_si256());
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_mask_dpbusds_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpbusds_epi32(__S, __A, __B),
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(__v8si)__S);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_maskz_dpbusds_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpbusds_epi32(__S, __A, __B),
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(__v8si)_mm256_setzero_si256());
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_mask_dpwssd_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpwssd_epi32(__S, __A, __B),
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(__v8si)__S);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_maskz_dpwssd_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpwssd_epi32(__S, __A, __B),
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(__v8si)_mm256_setzero_si256());
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_mask_dpwssds_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpwssds_epi32(__S, __A, __B),
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(__v8si)__S);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_maskz_dpwssds_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_selectd_256(__U,
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(__v8si)_mm256_dpwssds_epi32(__S, __A, __B),
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(__v8si)_mm256_setzero_si256());
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_mask_dpbusd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpbusd_epi32(__S, __A, __B),
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(__v4si)__S);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_maskz_dpbusd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpbusd_epi32(__S, __A, __B),
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(__v4si)_mm_setzero_si128());
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_mask_dpbusds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpbusds_epi32(__S, __A, __B),
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(__v4si)__S);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_maskz_dpbusds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpbusds_epi32(__S, __A, __B),
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(__v4si)_mm_setzero_si128());
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_mask_dpwssd_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpwssd_epi32(__S, __A, __B),
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(__v4si)__S);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_maskz_dpwssd_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpwssd_epi32(__S, __A, __B),
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(__v4si)_mm_setzero_si128());
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_mask_dpwssds_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpwssds_epi32(__S, __A, __B),
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(__v4si)__S);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_maskz_dpwssds_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_selectd_128(__U,
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(__v4si)_mm_dpwssds_epi32(__S, __A, __B),
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(__v4si)_mm_setzero_si128());
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}
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#undef __DEFAULT_FN_ATTRS128
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#undef __DEFAULT_FN_ATTRS256
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#endif
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