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Author	SHA1	Message	Date
Andrew Kelley	96e5f476c3	Merge pull request #4264 from ziglang/layneson-cpus_and_features ... Add support for target details (CPUs and their supported features)	2020-01-26 09:57:25 -05:00
Andrew Kelley	3839ea8978	fix debug info code not being freestanding compatible ... in stack tracing code, the idea was to detect the tty settings at the top of the stack and pass the information down. somewhere along the way this got changed so that setTtyColor was assuming the global stderr_file was related to the output stream the stack trace was being printed to. now, tty_color is changed to tty_config, and it is an enum rather than a bool, telling how tty colors are expected to be handled. windows is still incorrectly looking at stderr_file.	2020-01-26 09:55:04 -05:00
Andrew Kelley	d9fb6c2054	fix compilation error	2020-01-26 00:55:04 -05:00
Andrew Kelley	9dffc369f1	Merge remote-tracking branch 'origin/master' into layneson-cpus_and_features	2020-01-25 23:25:29 -05:00
Andrew Kelley	4e9b1f5479	Merge pull request #4290 from ziglang/split-ir-structs ... split IrInstruction into IrInst, IrInstSrc, IrInstGen	2020-01-25 23:24:41 -05:00
Andrew Kelley	32f0039b43	fix memory profiling	2020-01-25 22:02:10 -05:00
Andrew Kelley	6aac423964	split IrInstruction into IrInst, IrInstSrc, IrInstGen ... This makes it so that less memory is used for IR instructions, as well as catching bugs when one expected one kind of instruction and received the other.	2020-01-25 21:49:32 -05:00
LemonBoy	aaa2f9ab2f	Fix handling of DW_LNE_end_sequence ... The DWARF specification states that LNE_end_sequence should just reset the state machine, it's not an error.	2020-01-25 20:03:50 -05:00
LemonBoy	8516ee392c	Fix parsing of DW_AT_Ranges debug entry ... Follow the specification about what the base address is and how it can be changed by some entries in the list itself.	2020-01-25 16:12:11 -05:00
Feix Weiglhofer	a4a9330648	translate-c: Don't make const parameters mutable. (#4273) ... * translate-c: Remove arg-prefix from const parameters. * translate-c: Add unittest for const parameters.	2020-01-24 15:32:32 -05:00
Michael Dusan	aa75df36df	Merge pull request #4279 from mikdusan/create-global-cache ... stage1: make sure to create native_libc.txt dir	2020-01-24 00:31:18 -05:00
Tadeo Kondrak	3d8328abce	Don't include stdbool.h for void and unreachable ... Fixes https://github.com/ziglang/zig/issues/4272	2020-01-23 23:24:45 -05:00
Michael Dusan	b54040d394	stage1: make sure to create native_libc.txt dir ... - fix regression from #4186	2020-01-23 21:59:28 -05:00
Andrew Kelley	fbfda7f00e	fix incorrect list of sub-arches for aarch64 ... tests use older sub-arch that works in the older qemu	2020-01-23 13:02:45 -05:00
Andrew Kelley	c86589a738	disable f128 compiler_rt tests failing on windows ... These were never working with native CPU features. In this branch, we fix native CPU features not being enabled on Windows, and regress f128 language features. In the llvm10 branch, all this is fixed, and the tests are re-enabled.	2020-01-23 02:05:24 -05:00
Andrew Kelley	ead7d15772	use an older arm64 sub-arch for test suite ... hopefully this avoids the older qemu version crashing	2020-01-23 00:41:46 -05:00
Michael Dusan	357f42da6c	compiler_rt: fix mulsi3 test typo	2020-01-22 20:17:38 -05:00
Andrew Kelley	9845264a0b	aarch64: less feature-full baseline CPU	2020-01-22 18:40:34 -05:00
LemonBoy	a284be3f69	Fix unsafe cast in translate_c ... Fixes #4250	2020-01-22 17:58:57 -05:00
Andrew Kelley	0c477f3c79	fix std.Target.Arch.parseCpuFeatureSet unit test	2020-01-22 17:47:18 -05:00
Andrew Kelley	3227aec848	fix not respecting sub-arch feature	2020-01-22 17:35:57 -05:00
Andrew Kelley	b94525c45b	Merge pull request #4263 from LemonBoy/debug-thing ... Refactor some debug stuff	2020-01-22 17:32:48 -05:00
Andrew Kelley	48c7e6c48b	std.Target.CpuFeatures is now a struct with both CPU and feature set ... Previously it was a tagged union which was one of: * baseline * a specific CPU * a set of features Now, it's possible to have a CPU but also modify the CPU's feature set on top of that. This is closer to what LLVM does. This is more correct because Zig's notion of CPUs (and LLVM's) is not exact CPU models. For example "skylake" is not one very specific model; there are several different pieces of hardware that match "skylake" that have different feature sets enabled.	2020-01-22 17:13:31 -05:00
LemonBoy	69c72e24d4	compiler-rt: Port __mulsi3 builtin	2020-01-22 13:04:45 -05:00
Andrew Kelley	c6bfece1d5	Revert "tests: use an older aarch64 sub-arch" ... This reverts commit 4640ef589e. This attempted workaround did not have the desired effect.	2020-01-21 22:24:40 -05:00
Andrew Kelley	cbe9a51518	don't trust llvm's GetHostCPUName ... comment from this commit reproduced here: I have observed the CPU name reported by LLVM being incorrect. On the SourceHut build services, LLVM 9.0 reports the CPU as "athlon-xp", which is a 32-bit CPU, even though the system is 64-bit and the reported CPU features include, among other things, +64bit. So the strategy taken here is that we observe both reported CPU, and the reported CPU features. The features are trusted more; but if the features match exactly the features of the reported CPU, then we trust the reported CPU.	2020-01-21 22:02:13 -05:00
Andrew Kelley	830e0ba2d2	enable native CPU feature for windows; disable failing tests ... See #508. These can be re-enabled when we upgrade to LLVM 10.	2020-01-21 21:46:06 -05:00
Andrew Kelley	4640ef589e	tests: use an older aarch64 sub-arch ... to avoid an illegal instruction error with the older qemu version that is available on the CI server.	2020-01-21 21:02:33 -05:00
Andrew Kelley	6e6ec3d71d	put hack back in to disable windows native cpu features ... See #508. This can be removed when we upgrade to LLVM 10.	2020-01-21 21:01:36 -05:00
Andrew Kelley	68b6867e76	lazily compute the full cpu features dependencies	2020-01-21 20:11:36 -05:00
Andrew Kelley	92559cd02c	hit a comptime limitation with computing dense sets	2020-01-21 19:40:44 -05:00
LemonBoy	b8601e9252	Adjust tests & work around a nasty ICE	2020-01-21 23:17:02 +01:00
LemonBoy	59d0dda080	Make writeByteNTimes faster and leaner	2020-01-21 20:58:02 +01:00
LemonBoy	bc82e0f3d3	Refactor some code in the debug output	2020-01-21 20:51:57 +01:00
Andrew Kelley	15d5cab569	fix target_triple_zig to emit zig-compatible triples	2020-01-21 12:25:22 -05:00
Andrew Kelley	91ecce3bc0	fix cache of cpu features	2020-01-21 12:14:43 -05:00
Andrew Kelley	6793af8d8b	these are not real cpu features	2020-01-21 12:14:36 -05:00
Andrew Kelley	327ad0ae89	target_triple_llvm: emit none instead of unknown	2020-01-21 03:05:56 -05:00
Andrew Kelley	1f7babbc80	properly forward baseline target cpu features to llvm	2020-01-21 03:01:20 -05:00
Andrew Kelley	0abaee79af	fix self-hosted compiler regression	2020-01-21 01:51:21 -05:00
Andrew Kelley	5974f95cb7	add cpus and cpu features to zig targets	2020-01-21 01:48:25 -05:00
Andrew Kelley	0c2dde2fda	add libc and glibcs to self-hosted zig targets	2020-01-21 01:31:27 -05:00
Andrew Kelley	39759b90fc	make zig targets show native cpu name and features	2020-01-21 01:22:37 -05:00
Andrew Kelley	e640d01535	fixups to arch data, support any number of cpu features	2020-01-21 00:34:54 -05:00
Andrew Kelley	6118b11afa	Revert "aarch64: remove CPU features that are actually just CPUs" ... This reverts commit 6dd514ac8a. This strategy won't work for arm 32-bit; instead need to try to figure out how to get more bits into the bit set.	2020-01-20 23:15:07 -05:00
Andrew Kelley	89e107ee4e	uncomment all the archs in target.zig	2020-01-20 23:14:35 -05:00
Andrew Kelley	6dd514ac8a	aarch64: remove CPU features that are actually just CPUs	2020-01-20 22:49:26 -05:00
Andrew Kelley	6e88883edf	import data from llvm 9	2020-01-20 22:21:45 -05:00
Andrew Kelley	f3dd9bbdac	improve zig targets	2020-01-20 13:40:25 -05:00
Andrew Kelley	bf82929557	fix std.Target.Arch.parseCpuFeatureSet	2020-01-20 12:41:18 -05:00